From 25f8063e9afe078cd652d8ebaae6bfb9dba4bad2 Mon Sep 17 00:00:00 2001 From: Zapta Date: Thu, 9 Jan 2025 16:27:49 -0800 Subject: [PATCH 1/6] Redirection apio to the remote control file on the official apio repository. (Was zapta's dev). --- apio/resources/distribution.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/apio/resources/distribution.json b/apio/resources/distribution.json index 2eb20fb8..c1b49038 100644 --- a/apio/resources/distribution.json +++ b/apio/resources/distribution.json @@ -1,5 +1,5 @@ { - "remote-config": "https://github.com/zapta/apio_dev/raw/develop/remote-config/apio-%V.json", + "remote-config": "https://github.com/FPGAwars/apio/raw/develop/remote-config/apio-%V.json", "pip_packages": { "blackiceprog": ">=2.0.0,<3.0.0", From 149a5951a9c8a36ecc6287e2e3eee599aa80b375 Mon Sep 17 00:00:00 2001 From: Zapta Date: Thu, 9 Jan 2025 19:54:58 -0800 Subject: [PATCH 2/6] Moved misplaced test examples. --- .../ice40/edu-ciaa-fpga}/and-gate/and_gate.pcf | 0 {ice40 => test-examples/ice40/edu-ciaa-fpga}/and-gate/and_gate.sv | 0 .../ice40/edu-ciaa-fpga}/and-gate/and_gate_tb.gtkw | 0 .../ice40/edu-ciaa-fpga}/and-gate/and_gate_tb.sv | 0 {ice40 => test-examples/ice40/edu-ciaa-fpga}/and-gate/apio.ini | 0 {ice40 => test-examples/ice40/edu-ciaa-fpga}/fdd/apio.ini | 0 {ice40 => test-examples/ice40/edu-ciaa-fpga}/fdd/ffd.pcf | 0 {ice40 => test-examples/ice40/edu-ciaa-fpga}/fdd/ffd.sv | 0 {ice40 => test-examples/ice40/edu-ciaa-fpga}/fdd/ffd_tb.gtkw | 0 {ice40 => test-examples/ice40/edu-ciaa-fpga}/fdd/ffd_tb.sv | 0 10 files changed, 0 insertions(+), 0 deletions(-) rename {ice40 => test-examples/ice40/edu-ciaa-fpga}/and-gate/and_gate.pcf (100%) rename {ice40 => test-examples/ice40/edu-ciaa-fpga}/and-gate/and_gate.sv (100%) rename {ice40 => test-examples/ice40/edu-ciaa-fpga}/and-gate/and_gate_tb.gtkw (100%) rename {ice40 => test-examples/ice40/edu-ciaa-fpga}/and-gate/and_gate_tb.sv (100%) rename {ice40 => test-examples/ice40/edu-ciaa-fpga}/and-gate/apio.ini (100%) rename {ice40 => test-examples/ice40/edu-ciaa-fpga}/fdd/apio.ini (100%) rename {ice40 => test-examples/ice40/edu-ciaa-fpga}/fdd/ffd.pcf (100%) rename {ice40 => test-examples/ice40/edu-ciaa-fpga}/fdd/ffd.sv (100%) rename {ice40 => test-examples/ice40/edu-ciaa-fpga}/fdd/ffd_tb.gtkw (100%) rename {ice40 => test-examples/ice40/edu-ciaa-fpga}/fdd/ffd_tb.sv (100%) diff --git a/ice40/and-gate/and_gate.pcf b/test-examples/ice40/edu-ciaa-fpga/and-gate/and_gate.pcf similarity index 100% rename from ice40/and-gate/and_gate.pcf rename to test-examples/ice40/edu-ciaa-fpga/and-gate/and_gate.pcf diff --git a/ice40/and-gate/and_gate.sv b/test-examples/ice40/edu-ciaa-fpga/and-gate/and_gate.sv similarity index 100% rename from ice40/and-gate/and_gate.sv rename to test-examples/ice40/edu-ciaa-fpga/and-gate/and_gate.sv diff --git a/ice40/and-gate/and_gate_tb.gtkw b/test-examples/ice40/edu-ciaa-fpga/and-gate/and_gate_tb.gtkw similarity index 100% rename from ice40/and-gate/and_gate_tb.gtkw rename to test-examples/ice40/edu-ciaa-fpga/and-gate/and_gate_tb.gtkw diff --git a/ice40/and-gate/and_gate_tb.sv b/test-examples/ice40/edu-ciaa-fpga/and-gate/and_gate_tb.sv similarity index 100% rename from ice40/and-gate/and_gate_tb.sv rename to test-examples/ice40/edu-ciaa-fpga/and-gate/and_gate_tb.sv diff --git a/ice40/and-gate/apio.ini b/test-examples/ice40/edu-ciaa-fpga/and-gate/apio.ini similarity index 100% rename from ice40/and-gate/apio.ini rename to test-examples/ice40/edu-ciaa-fpga/and-gate/apio.ini diff --git a/ice40/fdd/apio.ini b/test-examples/ice40/edu-ciaa-fpga/fdd/apio.ini similarity index 100% rename from ice40/fdd/apio.ini rename to test-examples/ice40/edu-ciaa-fpga/fdd/apio.ini diff --git a/ice40/fdd/ffd.pcf b/test-examples/ice40/edu-ciaa-fpga/fdd/ffd.pcf similarity index 100% rename from ice40/fdd/ffd.pcf rename to test-examples/ice40/edu-ciaa-fpga/fdd/ffd.pcf diff --git a/ice40/fdd/ffd.sv b/test-examples/ice40/edu-ciaa-fpga/fdd/ffd.sv similarity index 100% rename from ice40/fdd/ffd.sv rename to test-examples/ice40/edu-ciaa-fpga/fdd/ffd.sv diff --git a/ice40/fdd/ffd_tb.gtkw b/test-examples/ice40/edu-ciaa-fpga/fdd/ffd_tb.gtkw similarity index 100% rename from ice40/fdd/ffd_tb.gtkw rename to test-examples/ice40/edu-ciaa-fpga/fdd/ffd_tb.gtkw diff --git a/ice40/fdd/ffd_tb.sv b/test-examples/ice40/edu-ciaa-fpga/fdd/ffd_tb.sv similarity index 100% rename from ice40/fdd/ffd_tb.sv rename to test-examples/ice40/edu-ciaa-fpga/fdd/ffd_tb.sv From daecb483158b3f6de70cf66a6a6ab9a5751f2cf3 Mon Sep 17 00:00:00 2001 From: Zapta Date: Thu, 9 Jan 2025 19:58:21 -0800 Subject: [PATCH 3/6] Removed an obsolete file. The recomanded way to debug the scons process is using the env var APIO_SCONS_DEBUGGER which allows to attach a debugger to the scons process of a standard apio invocation. --- scons_run.py | 20 -------------------- 1 file changed, 20 deletions(-) delete mode 100755 scons_run.py diff --git a/scons_run.py b/scons_run.py deleted file mode 100755 index 1643a52a..00000000 --- a/scons_run.py +++ /dev/null @@ -1,20 +0,0 @@ -#!venv/bin/python -"""Run scons for debugging""" - -# --------------------------------------------------- -# -- Run scons for debugging by apio developers. -# -- It is not part of apio and is not installed. -# --------------------------------------------------- - -# Apio developers, you can run it directly from -# command line or via Visual Studio Code debug -# targets at .vscode/launch.json. - -import sys -import SCons.Script - -try: - SCons.Script.main() - -except SystemExit as e: - print(f"Scons exit code: {e.code}") From 9d93058606bbaddcfd8041fd2d7153122be98cf0 Mon Sep 17 00:00:00 2001 From: Zapta Date: Thu, 9 Jan 2025 20:15:59 -0800 Subject: [PATCH 4/6] Tweaked an error message. No change in functionality. --- apio/scons/plugin_util.py | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/apio/scons/plugin_util.py b/apio/scons/plugin_util.py index f3d74945..56e7c3e3 100644 --- a/apio/scons/plugin_util.py +++ b/apio/scons/plugin_util.py @@ -621,25 +621,25 @@ def programmer_cmd(apio_env: ApioEnv) -> str: arg.""" # Get the programer command template arg. - prog_arg = apio_env.args.PROG + command = apio_env.args.PROG # If empty then return as is. This must be an apio command that # doesn't use the programmer. - if not prog_arg: - return prog_arg + if not command: + return command # It's an error if the programmer command doesn't have the $SOURCE # placeholder when scons inserts the binary file name. - if "$SOURCE" not in prog_arg: + if "$SOURCE" not in command: secho( - "Error: [Internal] 'prog' argument does not contain " - f"the '$SOURCE' marker. [{prog_arg}]", + "Error: [Internal] $SOURCE is missing in programmer command: " + f"{command}", fg="red", color=True, ) sys.exit(1) - return prog_arg + return command # pylint: disable=too-many-arguments From 673b25032657dfa479d1087bd08edbfb876c8e38 Mon Sep 17 00:00:00 2001 From: Zapta Date: Fri, 10 Jan 2025 11:24:24 -0800 Subject: [PATCH 5/6] Harmonized theh iverilog library usage across ice40/ecp5/gowin architectures. --- apio/scons/plugin_ecp5.py | 4 +++- apio/scons/plugin_gowin.py | 3 +++ apio/scons/plugin_ice40.py | 2 ++ test/scons/test_plugin_util.py | 2 +- 4 files changed, 9 insertions(+), 2 deletions(-) diff --git a/apio/scons/plugin_ecp5.py b/apio/scons/plugin_ecp5.py index bab8e35e..fa150b9c 100644 --- a/apio/scons/plugin_ecp5.py +++ b/apio/scons/plugin_ecp5.py @@ -43,7 +43,7 @@ def __init__(self, apio_env: ApioEnv): apio_env.args.TRELLIS_PATH, "database" ) self.yosys_lib_dir = apio_env.args.YOSYS_PATH + "/ecp5" - self.constrain_file_extension = ".lpf" + self.yosys_lib_file = self.yosys_lib_dir + "/cells_sim.v" def plugin_info(self) -> ArchPluginInfo: """Return plugin specific parameters.""" @@ -145,6 +145,7 @@ def action_generator(source, target, env, for_signature): vcd_output_name=testbench_name, is_interactive=apio_env.targeting("sim"), lib_dirs=[self.yosys_lib_dir], + lib_files=[self.yosys_lib_file], ), ] return action @@ -189,6 +190,7 @@ def lint_builder(self) -> BuilderBase: warns=args.VERILATOR_WARNS, top_module=args.TOP_MODULE, lib_dirs=[self.yosys_lib_dir], + lib_files=[self.yosys_lib_file], ), src_suffix=SRC_SUFFIXES, source_scanner=self.verilog_src_scanner, diff --git a/apio/scons/plugin_gowin.py b/apio/scons/plugin_gowin.py index ecb09a51..2eecca90 100644 --- a/apio/scons/plugin_gowin.py +++ b/apio/scons/plugin_gowin.py @@ -39,6 +39,7 @@ def __init__(self, apio_env: ApioEnv): # -- Cache values. self.yosys_lib_dir = apio_env.args.YOSYS_PATH + "/gowin" + self.yosys_lib_file = self.yosys_lib_dir + "/cells_sim.v" def plugin_info(self) -> ArchPluginInfo: """Return plugin specific parameters.""" @@ -137,6 +138,7 @@ def action_generator(source, target, env, for_signature): vcd_output_name=testbench_name, is_interactive=apio_env.targeting("sim"), lib_dirs=[self.yosys_lib_dir], + lib_files=[self.yosys_lib_file], ), ] return action @@ -177,6 +179,7 @@ def lint_builder(self) -> BuilderBase: warns=args.VERILATOR_WARNS, top_module=args.TOP_MODULE, lib_dirs=[self.yosys_lib_dir], + lib_files=[self.yosys_lib_file], ), src_suffix=SRC_SUFFIXES, source_scanner=self.verilog_src_scanner, diff --git a/apio/scons/plugin_ice40.py b/apio/scons/plugin_ice40.py index 1196d3d7..b9b362b3 100644 --- a/apio/scons/plugin_ice40.py +++ b/apio/scons/plugin_ice40.py @@ -133,6 +133,7 @@ def action_generator(source, target, env, for_signature): vcd_output_name=testbench_name, is_interactive=apio_env.targeting("sim"), extra_params=["-DNO_ICE40_DEFAULT_ASSIGNMENTS"], + lib_dirs=[self.yosys_lib_dir], lib_files=[self.yosys_lib_file], ), ] @@ -174,6 +175,7 @@ def lint_builder(self) -> BuilderBase: warns=args.VERILATOR_WARNS, top_module=args.TOP_MODULE, extra_params=["-DNO_ICE40_DEFAULT_ASSIGNMENTS"], + lib_dirs=[self.yosys_lib_dir], lib_files=[self.yosys_lib_file], ), src_suffix=SRC_SUFFIXES, diff --git a/test/scons/test_plugin_util.py b/test/scons/test_plugin_util.py index 3f197692..51f5a8a3 100644 --- a/test/scons/test_plugin_util.py +++ b/test/scons/test_plugin_util.py @@ -216,7 +216,7 @@ def test_get_programmer_cmd(capsys: LogCaptureFixture): programmer_cmd(apio_env) captured = capsys.readouterr() assert e.value.code == 1 - assert "does not contain the '$SOURCE'" in captured.out + assert "$SOURCE is missing" in captured.out def test_map_params(): From 4f02dae02c6adf362aa8ddeb538752bf83f25941 Mon Sep 17 00:00:00 2001 From: Zapta Date: Fri, 10 Jan 2025 12:10:40 -0800 Subject: [PATCH 6/6] Now filtering out iverilog warnings about unsupported timing checks in yosys cells lib. See https://github.com/FPGAwars/apio/issues/530 --- apio/managers/scons_filter.py | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/apio/managers/scons_filter.py b/apio/managers/scons_filter.py index f539adbf..5e2c3d6a 100644 --- a/apio/managers/scons_filter.py +++ b/apio/managers/scons_filter.py @@ -110,6 +110,21 @@ def classify_line(self, pipe_id: PipeId, line: str) -> RangeEvents: return None +class IVerilogRangeDetector(RangeDetector): + """Implements a RangeDetector for the iverolog command output.""" + + def classify_line(self, pipe_id: PipeId, line: str) -> RangeEvents: + # -- Range start: an iverolog command on stdout. + if pipe_id == PipeId.STDOUT and line.startswith("iverilog"): + return RangeEvents.START_AFTER + + # Range end: The end message of nextnpr. + if pipe_id == PipeId.STDOUT and line.startswith("gtkwave"): + return RangeEvents.END_BEFORE + + return None + + class IceProgRangeDetector(RangeDetector): """Implements a RangeDetector for the iceprog command output.""" @@ -142,6 +157,7 @@ class SconsFilter: def __init__(self, colors_enabled: bool): self.colors_enabled = colors_enabled self._pnr_detector = PnrRangeDetector() + self._iverilog_detector = IVerilogRangeDetector() self._iceprog_detector = IceProgRangeDetector() def on_stdout_line(self, line: str) -> None: @@ -190,6 +206,7 @@ def _assign_line_color( return color return default_color + # pylint: disable=too-many-return-statements def on_line(self, pipe_id: PipeId, line: str) -> None: """A shared handler for stdout/err lines from the scons sub process. The handler writes both stdout and stderr lines to stdout, possibly @@ -204,6 +221,7 @@ def on_line(self, pipe_id: PipeId, line: str) -> None: # -- Update the range detectors. in_pnr_verbose_range = self._pnr_detector.update(pipe_id, line) + in_iverolog_range = self._iverilog_detector.update(pipe_id, line) in_iceprog_range = self._iceprog_detector.update(pipe_id, line) # -- Handle the line while in the nextpnr verbose log range. @@ -225,6 +243,17 @@ def on_line(self, pipe_id: PipeId, line: str) -> None: self.emit_line(line, fg=line_color) return + # -- Special handling of iverilog lines. We drop warning line spam + # -- per Per https://github.com/FPGAwars/apio/issues/530 + if ( + in_iverolog_range + and pipe_id == PipeId.STDERR + and "cells_sim.v" in line + and "Timing checks are not supported" in line + ): + # -- Drop the line. + return + # -- Special handling for iceprog line range. if pipe_id == PipeId.STDERR and in_iceprog_range: # -- Iceprog prints blank likes that are used as line erasers.