diff --git a/drivers/bms_ic/bq769x2/bq769x2_interface.c b/drivers/bms_ic/bq769x2/bq769x2_interface.c
index 522ab39f..135de0e0 100644
--- a/drivers/bms_ic/bq769x2/bq769x2_interface.c
+++ b/drivers/bms_ic/bq769x2/bq769x2_interface.c
@@ -272,18 +272,29 @@ int bq769x2_config_update_mode(const struct device *dev, bool config_update)
 
     if (config_update) {
         err = bq769x2_subcmd_cmd_only(dev, BQ769X2_SUBCMD_SET_CFGUPDATE);
-        k_usleep(2000);
+        k_usleep(2000); /* Datasheet: Table 9-2 */
     }
     else {
         err = bq769x2_subcmd_cmd_only(dev, BQ769X2_SUBCMD_EXIT_CFGUPDATE);
-        k_usleep(1000);
+        k_usleep(1000); /* Datasheet: Table 9-2 */
     }
 
-    if (!err) {
-        data->config_update_mode_enabled = config_update;
+    if (err != 0) {
+        return err;
     }
 
-    return err;
+    /* Check mode change and wait for up to 2 more ms for change to take effect. */
+    for (int attempt = 0; attempt < 5; attempt++) {
+        union bq769x2_reg_bat_status bat_status;
+        err = bq769x2_direct_read_u2(dev, BQ769X2_CMD_BATTERY_STATUS, &bat_status.u16);
+        if (err == 0 && !!bat_status.CFGUPDATE == config_update) {
+            data->config_update_mode_enabled = config_update;
+            return 0;
+        }
+        k_usleep(500);
+    }
+
+    return -EIO;
 }
 
 int bq769x2_datamem_read_u1(const struct device *dev, const uint16_t reg_addr, uint8_t *value)
diff --git a/drivers/bms_ic/bq769x2/bq769x2_registers.h b/drivers/bms_ic/bq769x2/bq769x2_registers.h
index d15ac12f..65984b98 100644
--- a/drivers/bms_ic/bq769x2/bq769x2_registers.h
+++ b/drivers/bms_ic/bq769x2/bq769x2_registers.h
@@ -500,6 +500,28 @@ union bq769x2_reg_mfg_status {
     uint16_t u16;
 };
 
+union bq769x2_reg_bat_status {
+    struct
+    {
+        uint16_t CFGUPDATE : 1;
+        uint16_t PCHG_MODE : 1;
+        uint16_t SLEEP_EN : 1;
+        uint16_t POR : 1;
+        uint16_t WD : 1;
+        uint16_t COW_CHK : 1;
+        uint16_t OTPW : 1;
+        uint16_t OTPB : 1;
+        uint16_t SEC : 2;
+        uint16_t FUSE : 1;
+        uint16_t SS : 1;
+        uint16_t PF : 1;
+        uint16_t SD_CMD : 1;
+        uint16_t RSVD_0 : 1;
+        uint16_t SLEEP : 1;
+    };
+    uint16_t u16;
+};
+
 #define bq769x2_reg_alarm_sf_alert_mask_a bq769x2_reg_safety_a
 
 #define bq769x2_reg_alarm_sf_alert_mask_b bq769x2_reg_safety_b