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Chip: BQ76952 Microcontroller: esp32 Project:bms-c1 Functions: bms-state-machine() in file bms_common.c and bms_ic_bq769x2_set_switches() in file bq769x2.c
Description:
According to the bms-state-machine() function, if we start with the simple case that all FETs are off, state is BMS_STATE_OFF and only discharge mode is allowed, then the function bms_ic_bq769x2_set_switches(BMS_SWITCH_DIS, true) will be called to enable the DSG FET.
Inside this function, it reads the FET_STATUS first with the bit order "PDSG-DSG-PCHG-CHG" that are currently "0b0000", then it will update the buffer by setting the DSG bit to 1, so the value will become "0b0100".
Then, it will write this new data to the FET_CONTROL register, BUT here the order is different "PCHG-CHG-PDSG-DSG", and so the CHG bit is set to 1 not DSG.
Till now it's ok, because setting the bit to 1 in FET_CONTROL will disable the corresponding FET, so CHG FET will be off and DSG FET will be on.
The issue comes after that, that the function sends the command ALL_FETS_ON, so DSG and CHG FETs will be both on now, why is this done?
Second issue comes when we continue the flow, as the state now will be moved to BMS_STATE_DIS, in case there is a discharge error, then the function bms_ic_bq769x2_set_switches(BMS_SWITCH_DIS, false) will be called to disable the DSG FET, and again called bms_ic_bq769x2_set_switches(BMS_SWITCH_CHG, false) to disable the CHG FET. BUT, according to the above understanding, the FET_CONTROL bits will be all 0, means it will turn on the DSG and CHG FETs?
Lastly, I noticed that the DSG and CHG pins can be both on at the same time leading to the BMS_STATE_NORMAL state, but what is the case that the user can enable both FETs (except that it can be done automatically for the body diode threshold protection of the FETs)?
The text was updated successfully, but these errors were encountered:
Chip: BQ76952
Microcontroller: esp32
Project: bms-c1
Functions: bms-state-machine() in file bms_common.c and bms_ic_bq769x2_set_switches() in file bq769x2.c
Description:
According to the
bms-state-machine()
function, if we start with the simple case that all FETs are off, state is BMS_STATE_OFF and only discharge mode is allowed, then the functionbms_ic_bq769x2_set_switches(BMS_SWITCH_DIS, true)
will be called to enable the DSG FET.Inside this function, it reads the FET_STATUS first with the bit order

"PDSG-DSG-PCHG-CHG"
that are currently"0b0000"
, then it will update the buffer by setting the DSG bit to 1, so the value will become"0b0100"
.Then, it will write this new data to the FET_CONTROL register, BUT here the order is different
"PCHG-CHG-PDSG-DSG"
, and so the CHG bit is set to 1 not DSG.Till now it's ok, because setting the bit to 1 in FET_CONTROL will disable the corresponding FET, so CHG FET will be off and DSG FET will be on.

The issue comes after that, that the function sends the command ALL_FETS_ON, so DSG and CHG FETs will be both on now, why is this done?
Second issue comes when we continue the flow, as the state now will be moved to BMS_STATE_DIS, in case there is a discharge error, then the function
bms_ic_bq769x2_set_switches(BMS_SWITCH_DIS, false)
will be called to disable the DSG FET, and again calledbms_ic_bq769x2_set_switches(BMS_SWITCH_CHG, false)
to disable the CHG FET.BUT, according to the above understanding, the FET_CONTROL bits will be all 0, means it will turn on the DSG and CHG FETs?
Lastly, I noticed that the DSG and CHG pins can be both on at the same time leading to the BMS_STATE_NORMAL state, but what is the case that the user can enable both FETs (except that it can be done automatically for the body diode threshold protection of the FETs)?
The text was updated successfully, but these errors were encountered: