AMDGPU: Replace some undef pointer uses in test

ROCm · Feb 25, 2025 · 28002dd · 28002dd
1 parent a60e8a2
commit 28002dd
Showing 1 changed file with 22 additions and 22 deletions.
diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll b/llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
@@ -2845,26 +2845,26 @@ declare i32 @llvm.amdgcn.readfirstlane(i32)
 
 @gv = constant i32 0
 
-define amdgpu_kernel void @readfirstlane_constant(i32 %arg) {
+define amdgpu_kernel void @readfirstlane_constant(i32 %arg, ptr %ptr) {
 ; CHECK-LABEL: @readfirstlane_constant(
 ; CHECK-NEXT:    [[VAR:%.*]] = call i32 @llvm.amdgcn.readfirstlane.i32(i32 [[ARG:%.*]])
-; CHECK-NEXT:    store volatile i32 [[VAR]], ptr undef, align 4
-; CHECK-NEXT:    store volatile i32 0, ptr undef, align 4
-; CHECK-NEXT:    store volatile i32 123, ptr undef, align 4
-; CHECK-NEXT:    store volatile i32 ptrtoint (ptr @gv to i32), ptr undef, align 4
-; CHECK-NEXT:    store volatile i32 undef, ptr undef, align 4
+; CHECK-NEXT:    store volatile i32 [[VAR]], ptr [[PTR:%.*]], align 4
+; CHECK-NEXT:    store volatile i32 0, ptr [[PTR]], align 4
+; CHECK-NEXT:    store volatile i32 123, ptr [[PTR]], align 4
+; CHECK-NEXT:    store volatile i32 ptrtoint (ptr @gv to i32), ptr [[PTR]], align 4
+; CHECK-NEXT:    store volatile i32 undef, ptr [[PTR]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %var = call i32 @llvm.amdgcn.readfirstlane(i32 %arg)
   %zero = call i32 @llvm.amdgcn.readfirstlane(i32 0)
   %imm = call i32 @llvm.amdgcn.readfirstlane(i32 123)
   %constexpr = call i32 @llvm.amdgcn.readfirstlane(i32 ptrtoint (ptr @gv to i32))
   %undef = call i32 @llvm.amdgcn.readfirstlane(i32 undef)
-  store volatile i32 %var, ptr undef
-  store volatile i32 %zero, ptr undef
-  store volatile i32 %imm, ptr undef
-  store volatile i32 %constexpr, ptr undef
-  store volatile i32 %undef, ptr undef
+  store volatile i32 %var, ptr %ptr
+  store volatile i32 %zero, ptr %ptr
+  store volatile i32 %imm, ptr %ptr
+  store volatile i32 %constexpr, ptr %ptr
+  store volatile i32 %undef, ptr %ptr
   ret void
 }
 
@@ -2931,26 +2931,26 @@ bb1:
 
 declare i32 @llvm.amdgcn.readlane(i32, i32)
 
-define amdgpu_kernel void @readlane_constant(i32 %arg, i32 %lane) {
+define amdgpu_kernel void @readlane_constant(i32 %arg, i32 %lane, ptr %ptr) {
 ; CHECK-LABEL: @readlane_constant(
 ; CHECK-NEXT:    [[VAR:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[ARG:%.*]], i32 7)
-; CHECK-NEXT:    store volatile i32 [[VAR]], ptr undef, align 4
-; CHECK-NEXT:    store volatile i32 0, ptr undef, align 4
-; CHECK-NEXT:    store volatile i32 123, ptr undef, align 4
-; CHECK-NEXT:    store volatile i32 ptrtoint (ptr @gv to i32), ptr undef, align 4
-; CHECK-NEXT:    store volatile i32 undef, ptr undef, align 4
+; CHECK-NEXT:    store volatile i32 [[VAR]], ptr [[PTR:%.*]], align 4
+; CHECK-NEXT:    store volatile i32 0, ptr [[PTR]], align 4
+; CHECK-NEXT:    store volatile i32 123, ptr [[PTR]], align 4
+; CHECK-NEXT:    store volatile i32 ptrtoint (ptr @gv to i32), ptr [[PTR]], align 4
+; CHECK-NEXT:    store volatile i32 undef, ptr [[PTR]], align 4
 ; CHECK-NEXT:    ret void
 ;
   %var = call i32 @llvm.amdgcn.readlane(i32 %arg, i32 7)
   %zero = call i32 @llvm.amdgcn.readlane(i32 0, i32 %lane)
   %imm = call i32 @llvm.amdgcn.readlane(i32 123, i32 %lane)
   %constexpr = call i32 @llvm.amdgcn.readlane(i32 ptrtoint (ptr @gv to i32), i32 %lane)
   %undef = call i32 @llvm.amdgcn.readlane(i32 undef, i32 %lane)
-  store volatile i32 %var, ptr undef
-  store volatile i32 %zero, ptr undef
-  store volatile i32 %imm, ptr undef
-  store volatile i32 %constexpr, ptr undef
-  store volatile i32 %undef, ptr undef
+  store volatile i32 %var, ptr %ptr
+  store volatile i32 %zero, ptr %ptr
+  store volatile i32 %imm, ptr %ptr
+  store volatile i32 %constexpr, ptr %ptr
+  store volatile i32 %undef, ptr %ptr
   ret void
 }