diff --git a/.gitmodules b/.gitmodules index 104587f3a..5881b482b 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,4 +1,4 @@ [submodule "gen-machine-conf"] path = meta-xilinx-core/gen-machine-conf url = https://github.com/Xilinx/gen-machine-conf.git - branch = xlnx_rel_v2024.1 + branch = xlnx_rel_v2024.2 diff --git a/MAINTAINERS.md b/MAINTAINERS.md index d9067769d..7e842dc4a 100644 --- a/MAINTAINERS.md +++ b/MAINTAINERS.md @@ -8,10 +8,10 @@ the [meta-xilinx mailing list](https://lists.yoctoproject.org/g/meta-xilinx): When sending patches, please make sure the email subject line includes `[meta-xilinx][][PATCH]` and cc'ing the maintainers. -For more details follow the OE community patch submission guidelines, as described in: +For more details follow the Yocto Project community patch submission guidelines, +as described in: -https://www.openembedded.org/wiki/Commit_Patch_Message_Guidelines -https://www.openembedded.org/wiki/How_to_submit_a_patch_to_OpenEmbedded +https://docs.yoctoproject.org/dev/contributor-guide/submit-changes.html# `git send-email --to meta-xilinx@lists.yoctoproject.org *.patch` @@ -24,13 +24,14 @@ https://www.openembedded.org/wiki/How_to_submit_a_patch_to_OpenEmbedded `git format-patch -s --subject-prefix="meta-xilinx][][PATCH" -1` **Example:** -`git format-patch -s --subject-prefix="meta-xilinx][langdale][PATCH" -1` +`git format-patch -s --subject-prefix="meta-xilinx][scarthgap][PATCH" -1` **Maintainers:** Mark Hatle Sandeep Gundlupet Raju John Toomey + Trevor Woerner > **Note:** @@ -43,3 +44,4 @@ https://www.openembedded.org/wiki/How_to_submit_a_patch_to_OpenEmbedded Mark Hatle Sandeep Gundlupet Raju John Toomey + Trevor Woerner diff --git a/README.building.md b/README.building.md index 456aa6346..7cbeb2629 100644 --- a/README.building.md +++ b/README.building.md @@ -6,25 +6,34 @@ layers. The following instructions require OE-Core meta and BitBake. Poky provides these components, however they can be acquired separately. -> **Pre-requisites:** Refer [Preparing Build Host](https://docs.yoctoproject.org/4.1.2/singleindex.html#preparing-the-build-host) documentation. +> **Pre-requisites:** Refer [Preparing Build Host](https://docs.yoctoproject.org/5.0.4/singleindex.html#preparing-the-build-host) documentation. 1. Create a project directory. ``` $ mkdir sources $ cd sources ``` -2. Clone the poky, openembedded and amd xilinx repository. + +2. Clone the poky, openembedded and AMD repository. > **Note:** > * *release_branch:* refers to upstream stable release branch. -> * *rel-version:* refers to amd xilinx release version. +> * *rel-version:* refers to AMD release version. +> * *README:* By default README file link will be pointing to master branch so make +> sure to checkout the release_branch or rel-version branch. +> * *Upstream Pending Patches:* It is intended to resync Scarthgap (upstream) for +> both meta-virtualization and meta-openamp, but currently there are some patches +> in there that have not yet been accepted by upstream. So using the fork from +> https://github.com/Xilinx is recommended. ``` $ mkdir sources -$ git clone -b https://git.yoctoproject.org/poky.git -$ git clone -b https://git.openembedded.org/meta-openembedded.git -$ git clone -b https://git.yoctoproject.org/git/meta-virtualization -$ git clone -b https://github.com/Xilinx/meta-xilinx.git --recurse-submodules -$ git clone -b https://github.com/Xilinx/meta-xilinx-tools.git +$ git clone -b https://git.yoctoproject.org/poky +$ git clone -b https://git.openembedded.org/meta-openembedded +$ git clone -b https://git.yoctoproject.org/meta-virtualization +$ git clone -b https://git.yoctoproject.org/meta-arm +$ git clone -b https://github.com/OpenAMP/meta-openamp +$ git clone -b https://github.com/Xilinx/meta-xilinx --recurse-submodules +$ git clone -b https://github.com/Xilinx/meta-xilinx-tools ``` > **Note:** > * When meta-xilinx layer is cloned using git tool by default it will clone @@ -37,6 +46,7 @@ $ git clone -b https://github.com/Xilinx/meta-xilinx-tools.git ``` $ source poky/oe-init-build-env ``` + 4. Once initialized configure `bblayers.conf` by adding dependency layers as shown below using `bitbake-layers` command. > **Note:** From step 3 by default `meta-yocto-bsp` will be included in bblayers.conf @@ -46,29 +56,34 @@ $ source poky/oe-init-build-env ``` $ bitbake-layers add-layer .//meta-openembedded/meta-oe $ bitbake-layers add-layer .//meta-openembedded/meta-python -$ bitbake-layers add-layer .//meta-openembedded/meta-filesystems $ bitbake-layers add-layer .//meta-openembedded/meta-networking +$ bitbake-layers add-layer .//meta-openembedded/meta-filesystems $ bitbake-layers add-layer .//meta-virtualization +$ bitbake-layers add-layer .//meta-arm/meta-arm-toolchain +$ bitbake-layers add-layer .//meta-arm/meta-arm +$ bitbake-layers add-layer .//meta-openamp $ bitbake-layers add-layer .//meta-xilinx/meta-microblaze $ bitbake-layers add-layer .//meta-xilinx/meta-xilinx-core $ bitbake-layers add-layer .//meta-xilinx/meta-xilinx-standalone +$ bitbake-layers add-layer .//meta-xilinx/meta-xilinx-standalone-sdt $ bitbake-layers add-layer .//meta-xilinx/meta-xilinx-bsp -$ bitbake-layers add-layer .//meta-xilinx/meta-xilinx-vendor -$ bitbake-layers add-layer .//meta-xilinx/meta-xilinx-contrib $ bitbake-layers add-layer .//meta-xilinx-tools ``` -> **Note:** We recommend using meta-xilinx-tools, the version that is built as -> standalone may not work on many boards as it does not know the board configuration. - -5. Set hardware `MACHINE` configuration variable in /build/conf/local.conf - file for a specific target which can boot and run the in the board or QEMU. +> **Note:** +> 1. For SDT build flow user can remove meta-xilinx-tools as this layer is +> optional. +> 2. If user wants to build machine files supported by meta-xilinx-vendor or +> met-xilinx-contrib layer then include these layer running following commands. ``` -MACHINE = "" +$ bitbake-layers add-layer .//meta-xilinx-vendor +$ bitbake-layers add-layer .//meta-xilinx-contrib ``` -* For list of available target machines see meta layer README files. - * [meta-xilinx-bsp README](https://github.com/Xilinx/meta-xilinx/tree/master/meta-xilinx-bsp#amd-xilinx-evaluation-boards-bsp-machines-files) - * [meta-kria README](https://github.com/Xilinx/meta-xilinx/tree/master/meta-xilinx-bsp#amd-xilinx-evaluation-boards-bsp-machines-files) +5. Create a new layer to for SDT or XSCT machine files geneated using gen-machineconf + tool. If user already has a custom-bsp layer then you can skip this step. +``` +$ bitbake-layers create-layer --add-layer --layerid +``` 6. For NFS build host system modify the build/conf/local.conf and add TMPDIR path as shown below. On local storage $TMPDIR will be set to build/tmp @@ -76,36 +91,104 @@ MACHINE = "" TMPDIR = "/tmp/$USER/yocto/release_version/build" ``` -7. Modify the build/conf/local.conf file to add wic image to default target +7. Follow generating SDT or XSCT machine configuration file instructions using + gen-machineconf tool. SDT or XSCT machine files are generated using sdtgen + output or xsa. + * [SDT](https://github.com/Xilinx/meta-xilinx/blob/master/meta-xilinx-standalone-sdt/README.sdt.bsp.md) + * [XSCT](https://github.com/Xilinx/meta-xilinx-tools/blob/master/README.xsct.bsp.md) + +8. Set hardware `MACHINE` configuration variable in /build/conf/local.conf + file for a specific target which can boot and run the in the board or QEMU. +``` +MACHINE = "" +``` +* For list of available pre-built target machines see meta layer README files. + + * [meta-amd-adaptive-socs-bsp README](https://github.com/Xilinx/meta-amd-adaptive-socs/blob/master/meta-amd-adaptive-socs-bsp/README.asoc.bsp.md) + * [meta-xilinx-tools README](https://github.com/Xilinx/meta-xilinx-tools/blob/master/README.xsct.bsp.md) + * [meta-kria README](https://github.com/Xilinx/meta-kria/blob/master/README.kria.bsp.md) + +9. Once machine files are generated in /machine/---.conf, + include the QEMU DT files, See [QEMU Configurations](#qemu-configurations) + section for more details. This step can be skipped if you are using pre-built + target machines files. + +10. Modify the build/conf/local.conf file to add wic image to default target image as shown below. ``` IMAGE_FSTYPES += "wic" WKS_FILES = "xilinx-default-sd.wks" ``` -8. Build the qemu-helper-native package to setup QEMU network tap devices. +11. Build the qemu-helper-native package to setup QEMU network tap devices. ``` $ bitbake qemu-helper-native ``` -9. Manually configure a tap interface for your build system. As root run +12. Manually configure a tap interface for your build system. As root run /sources/poky/scripts/runqemu-gen-tapdevs, which should generate a list of tap devices. Once tap interfaces are successfully create you should be able to see all the interfaces by running ifconfig command. ``` -$ sudo .//poky/scripts/runqemu-gen-tapdevs $(id -u $USER) $(id -g $USER) 4 tmp/sysroots-components/x86_64/qemu-helper-native/usr/bin +$ sudo .//poky/scripts/runqemu-gen-tapdevs $(id -g $USER) 4 ``` -10. Build an OS image for the target using `bitbake` command. +13. Build an OS image for the target using `bitbake` command. > **Note:** Refer .//conf/templates/default/conf-notes.txt > for available target image-name. e.g. core-image-minimal or petalinux-image-minimal - ``` $ bitbake ``` -7. Once complete the images for the target machine will be available in the output +14. Once complete the images for the target machine will be available in the output directory `${TMPDIR}/deploy/images/${MACHINE}/`. -8. Follow [Booting Instructions](https://github.com/Xilinx/meta-xilinx/blob/master/README.booting.md) +15. Follow [Booting Instructions](https://github.com/Xilinx/meta-xilinx/blob/master/README.booting.md) + +## QEMU Configurations + +This section describes the QEMU settings which must be added to the generated +machine configuration file in order to use the runqemu command. The following +board settings need to be added in sdt or xsct machine configuration file to +define which QEMU device trees should be used. + +> **Variable usage examples:** +> +> QEMU Device tree deploy directory: `QEMU_HW_DTB_PATH = "${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch"` +> +> QEMU PMU Device tree: `QEMU_HW_DTB_PMU = "${QEMU_HW_DTB_PATH}/zynqmp-pmu.dtb"` +> +> QEMU PS Device tree: `QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/board-versal-ps-vck190.dtb"` +> +> QEMU PMC Board Device tree: `QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb"` +> +> QEMU Memory: Some boards for example VEK280 and VH158 memory configurations are +> different, Hence we need to adjust the same in QB_MEM to match board dtsi files. +> Below are some examples. +> * ZynqMP `QB_MEM = "-m 4096"` +> * Versal VEK280 `QB_MEM = "-m 12G"` + +> **Note:** QEMU_HW_DTB_PS files are based on eval board schematics. If you are +> using a custom board then user has to create a QEMU_HW_DTB_PS to match their +> custom boards. Refer https://github.com/Xilinx/qemu-devicetrees/blob/master/board-versal-ps-vek280.dts +> as an example. + +| Devices | Evaluation Board | QEMU PMC or PMU DTB file | QEMU PS DTB file | QB Mem | +|---------|-------------------------------------------------------------------------------|-----------------------------|-------------------------------|--------| +| ZynqMP | [ZCU102](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | +| | [ZCU104](https://www.xilinx.com/products/boards-and-kits/zcu104.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | +| | [ZCU106](https://www.xilinx.com/products/boards-and-kits/zcu106.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | +| | [ZCU111](https://www.xilinx.com/products/boards-and-kits/zcu111.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | +| | [ZCU208](https://www.xilinx.com/products/boards-and-kits/zcu208.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | +| | [ZCU216](https://www.xilinx.com/products/boards-and-kits/zcu216.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | +| | [ZCU670](https://www.xilinx.com/products/boards-and-kits/zcu670.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | +| Versal | [VCK190](https://www.xilinx.com/products/boards-and-kits/vck190.html) | `board-versal-pmc-virt.dtb` | `board-versal-ps-vck190.dtb` | 8G | +| | [VMK180](https://www.xilinx.com/products/boards-and-kits/vmk180.html) | `board-versal-pmc-virt.dtb` | `board-versal-ps-vmk180.dtb` | 8G | +| | [VPK120](https://www.xilinx.com/products/boards-and-kits/vpk120.html) | `board-versal-pmc-virt.dtb` | `board-versal-ps-vpk120.dtb` | 8G | +| | [VPK180](https://www.xilinx.com/products/boards-and-kits/vpk180.html) | `board-versal-pmc-virt.dtb` | `board-versal-ps-vpk180.dtb` | 8G | +| | [VEK280](https://www.xilinx.com/products/boards-and-kits/vek280.html) | `board-versal-pmc-virt.dtb` | `board-versal-ps-vek280.dtb` | 12G | +| | [VHK158](https://www.xilinx.com/products/boards-and-kits/vhk158.html) | `board-versal-pmc-virt.dtb` | `board-versal-ps-vhk158.dtb` | 32G | + +> **Note:** Additional information on AMD Adaptive SoC's and FPGA's can be found at: + https://www.amd.com/en/products/adaptive-socs-and-fpgas.html diff --git a/README.md b/README.md index 428b8cad1..5dea20de0 100644 --- a/README.md +++ b/README.md @@ -19,7 +19,7 @@ components, kernel etc. * **meta-xilinx-standalone**: layer containing the AMD Xilinx Baremetal or Standalone Toolchains metadata to build baremetal firmware and applications. -* **meta-xilinx-standalone-experimental**: layer containing metadata to build +* **meta-xilinx-standalone-sdt**: layer containing metadata to build all the boot images using lopper and system device tree without using the meta-xilinx-tools layer. diff --git a/docs/README.booting.microblaze.md b/docs/README.booting.microblaze.md index 91c0eda98..21bd1dad5 100644 --- a/docs/README.booting.microblaze.md +++ b/docs/README.booting.microblaze.md @@ -2,18 +2,20 @@ Booting OS images on MicroBlaze target boards can be done using JTAG and QSPI boot modes. -* [Setting Up the Target](#setting-up-the-target) -* [Booting from JTAG](#booting-from-jtag) - * [Sourcing the XSDB tools](#sourcing-the-xsdb-tools) - * [Deploying the images to target](#deploying-the-images-to-target) - * [Using devtool boot-jtag script](#using-devtool-boot-jtag-script) - * [Manually executing xsdb commands](#manually-executing-xsdb-commands) - * [Loading Bitstream using XSDB](#loading-bitstream-using-xsdb) - * [Loading U-boot using XSDB](#loading-u-boot-using-xsdb) - * [Loading Kernel, Device tree, Root Filesystem and U-boot boot script](#loading-kernel-device-tree-root-filesystem-and-u-boot-boot-script) - * [Using XSDB](#using-xsdb) - * [Using TFTP](#using-tftp) - * [Booting Linux](#booting-linux) +- [Booting OS Images on MicroBlaze target boards](#booting-os-images-on-microblaze-target-boards) + - [Setting Up the Target](#setting-up-the-target) + - [Booting from JTAG](#booting-from-jtag) + - [Sourcing the XSDB tools](#sourcing-the-xsdb-tools) + - [Deploying the images to target](#deploying-the-images-to-target) + - [Using devtool boot-jtag script](#using-devtool-boot-jtag-script) + - [Manually executing xsdb commands](#manually-executing-xsdb-commands) + - [Loading Bitstream using XSDB](#loading-bitstream-using-xsdb) + - [Loading U-boot using XSDB](#loading-u-boot-using-xsdb) + - [Loading Kernel, Device tree, Root Filesystem and U-boot boot script](#loading-kernel-device-tree-root-filesystem-and-u-boot-boot-script) + - [Using XSDB](#using-xsdb) + - [Using TFTP](#using-tftp) + - [Booting Linux](#booting-linux) + - [Limitation](#limitation) ## Setting Up the Target @@ -195,3 +197,27 @@ xsdb% exit ``` U-Boot> boot ``` + +## Limitation + +1. Booting core-image-minimal or other image target excluding + petalinux-image-minimal you can observe below error message. + +``` +Error: argument "/en*" is wrong: "dev" not a valid ifname +Starting syslogd/klogd: done + +Poky (Yocto Project Reference Distro) 5.0.2 kcu105-microblazeel ttyUL0 + +INIT: Id "1" respawning too fast: disabled for 5 minutes + +kcu105-microblazeel login: +``` + +This is due to pni-names distro feature is not enabled by default and eudev uses +classic network interface naming scheme. To resolve this issue add pni-names +distro feature from .conf or local.file. + +``` +DISTRO_FEATURES:append:microblaze = " pni-names" +``` \ No newline at end of file diff --git a/docs/README.booting.zynq.md b/docs/README.booting.zynq.md index 28aad78fd..660cc64f6 100644 --- a/docs/README.booting.zynq.md +++ b/docs/README.booting.zynq.md @@ -3,19 +3,21 @@ Booting OS images on Zynq boards can be done using JTAG, SD, eMMC, QSPI and NAND boot modes. -* [Setting Up the Target](#setting-up-the-target) -* [Booting from JTAG](#booting-from-jtag) - * [Sourcing the XSDB tools](#sourcing-the-xsdb-tools) - * [Deploying the images to target](#deploying-the-images-to-target) - * [Using devtool boot-jtag script](#using-devtool-boot-jtag-script) - * [Manually executing xsdb commands](#manually-executing-xsdb-commands) - * [Loading boot components using XSDB](#loading-boot-components-using-xsdb) - * [Loading Kernel, Root Filesystem and U-boot boot script](#loading-kernel-root-filesystem-and-u-boot-boot-script) - * [Using XSDB](#using-xsdb) - * [Using TFTP](#using-tftp) - * [Booting Linux](#booting-linux) -* [Booting from SD](#booting-from-sd) -* [Booting from QSPI](#booting-from-qspi) +- [Booting OS Images on Zynq target boards](#booting-os-images-on-zynq-target-boards) + - [Setting Up the Target](#setting-up-the-target) + - [Booting from JTAG](#booting-from-jtag) + - [Sourcing the XSDB tools](#sourcing-the-xsdb-tools) + - [Deploying the images to target](#deploying-the-images-to-target) + - [Using devtool boot-jtag script](#using-devtool-boot-jtag-script) + - [Manually executing xsdb commands](#manually-executing-xsdb-commands) + - [Loading boot components using XSDB](#loading-boot-components-using-xsdb) + - [Loading Kernel, Root Filesystem and U-boot boot script](#loading-kernel-root-filesystem-and-u-boot-boot-script) + - [Using XSDB](#using-xsdb) + - [Using TFTP](#using-tftp) + - [Booting Linux](#booting-linux) + - [Booting from SD](#booting-from-sd) + - [Booting from QSPI](#booting-from-qspi) + - [Limitation](#limitation) ## Setting Up the Target 1. Connect a USB cable between the CP210x USB-to-UART bridge USB Mini-B on @@ -214,7 +216,7 @@ U-Boot> boot --- ## Booting from QSPI -1. To boot ZC702 board in QSPI boot mode, Power on the ZCU102 board and boot +1. To boot ZC702 board in QSPI boot mode, Power on the ZC702 board and boot using JTAG or SD boot mode, to ensure that U-Boot is running and also have boot.bin copied to DDR location using XSDB `dow` or `tftpboot` or `fatload` command. @@ -222,3 +224,25 @@ U-Boot> boot 3. After flashing the images, turn off the power switch on the board, and change the SW16 boot mode pin settings to QSPI boot mode (1-OFF, 2-ON, 3-OFF, 4-OFF, 5-OFF) by setting the SW16. Refer [Setting Up the Target](#setting-up-the-target). + +## Limitation + +1. Booting core-image-minimal or other image target excluding + petalinux-image-minimal you can observe below error message. + +``` +Error: argument "/en*" is wrong: "dev" not a valid ifname +Starting syslogd/klogd: done + +Poky (Yocto Project Reference Distro) 5.0.2 zc702-zynq7 ttyPS0 + +zc702-zynq7 login: +``` + +This is due to pni-names distro feature is not enabled by default and eudev uses +classic network interface naming scheme. To resolve this issue add pni-names +distro feature from .conf or local.file. + +``` +DISTRO_FEATURES:append:zynq = " pni-names" +``` diff --git a/docs/README.dfx.user.dts.md b/docs/README.dfx.user.dts.md index 9caf866ee..09e68be52 100644 --- a/docs/README.dfx.user.dts.md +++ b/docs/README.dfx.user.dts.md @@ -283,7 +283,7 @@ SRC_URI = " \ 1. Follow SDT or XSCT Build instructions whichever build method is used but not both. - a. [SDT Building Instructions](../meta-xilinx-standalone-experimental/README.md) upto step 4. + a. [SDT Building Instructions](../meta-xilinx-standalone-sdt/README.md) upto step 4. b. [XSCT Building Instructions](../README.building.md) upto step 4.b (With SDT overlay). 2. Create recipes-firmware directory in meta layer and copy the .bit/bin/pdi, @@ -326,7 +326,7 @@ IMAGE_INSTALL:append = " \ ``` 6. Follow SDT or XSCT Build instructions whichever build method is used but not both. - a. [SDT Building Instructions](../meta-xilinx-standalone-experimental/README.md ) and continue from step 5. + a. [SDT Building Instructions](../meta-xilinx-standalone-sdt/README.md ) and continue from step 5. b. [XSCT Building Instructions](../README.building.md) and continue from step 5. 7. Once images are built firmware app files will be installed on target_rootfs. diff --git a/docs/README.fw.package.md b/docs/README.fw.package.md index a7e544025..696687d60 100644 --- a/docs/README.fw.package.md +++ b/docs/README.fw.package.md @@ -1,4 +1,4 @@ -# How to package and depoly firmware elf or bin to linux root filesystem +# How to package and deploy firmware elf or bin to linux root filesystem * [Introduction](#introduction) * [How to create and install firmware package recipe](#how-to-create-and-install-firmware-package-recipe) @@ -14,16 +14,19 @@ filesystem. ## How to create and install firmware package recipe -1. Follow [SDT Building Instructions](../meta-xilinx-standalone-experimental/README.md ) upto step 4. +1. Follow [SDT Mulitconfig Building Instructions](../meta-xilinx-standalone-sdt/README.sdt.mc.build.md) + upto step 3. 2. Create recipes-firmware directory in distribution meta layer. ``` $ mkdir -p /recipes-firmware// ``` + 3. Now create the recipes firmware package using recipetool. ``` $ recipetool create -o /recipes-firmware//firmware-package-name.bb ``` + 4. Modify the recipe and inherit fw-package bbclass as shown below. > **Note:** @@ -33,9 +36,9 @@ $ recipetool create -o /recipes-firmware//fir > * **FW_NAME:** Variable to define firmware baremetal or freertos application > recipe name. > * **TARGET_MC:** Variable to define one of the multiconfig target name -> (ex: cortexr5-0-zynqmp-baremetal) from the BBMULTICONFIG list -> generated at [SDT Building Instructions](../meta-xilinx-standalone-experimental/README.md ) -> step 4. +> (ex: --sdt--cortexr5-0-baremetal) +> from the BBMULTICONFIG list generated at [SDT Mulitconfig Building Instructions](../meta-xilinx-standalone-sdt/README.sdt.mc.build.md) +> step 2. ``` SUMMARY = "Recipe to package and deploy baremetal or freertos elf or bin to linux rootfs" @@ -45,7 +48,7 @@ inherit fw-package FW_NAME = "hello-world" -TARGET_MC = "cortexr5-0-zynqmp-baremetal" +TARGET_MC = "--sdt--cortexr5-0-baremetal" FW_MCDEPENDS := "mc::${TARGET_MC}:${FW_NAME}:do_deploy" FW_DEPLOY_DIR := "${TOPDIR}/tmp-${TARGET_MC}/deploy/images/${MACHINE}" @@ -57,5 +60,5 @@ IMAGE_INSTALL:append = " \ firmware-package-name \ " ``` -6. Follow [SDT Building Instructions](../meta-xilinx-standalone-experimental/README.md ) and continue from +6. Follow [SDT Building Instructions](../meta-xilinx-standalone-sdt/README.sdt.bsp.md) and continue from step 5. diff --git a/meta-microblaze/README.md b/meta-microblaze/README.md index 9da3f8139..262b26793 100644 --- a/meta-microblaze/README.md +++ b/meta-microblaze/README.md @@ -8,14 +8,18 @@ This layer depends on: URI: https://git.yoctoproject.org/poky layers: meta, meta-poky - branch: langdale + branch: scarthgap URI: https://git.openembedded.org/meta-openembedded layers: meta-oe - branch: langdale + branch: scarthgap + + URI: https://git.yoctoproject.org/meta-arm + layers: meta-arm, meta-arm-toolchain + branch: scarthgap URI: https://git.yoctoproject.org/meta-xilinx (official version) - https://github.com/Xilinx/meta-xilinx (development and amd xilinx release) + https://github.com/Xilinx/meta-xilinx (development and AMD release) layers: meta-xilinx-core - branch: langdale or amd xilinx release version (e.g. rel-v2023.1) + branch: scarthgap or AMD release version (e.g. rel-v2024.2) diff --git a/meta-microblaze/conf/layer.conf b/meta-microblaze/conf/layer.conf index 045550eba..ea8a1e4b2 100644 --- a/meta-microblaze/conf/layer.conf +++ b/meta-microblaze/conf/layer.conf @@ -20,14 +20,6 @@ OLDEST_KERNEL:microblaze = "3.15" INHERIT += "rust_microblaze" -# We want to use gcc 12.x for the microblaze stuff, and 14.x for any host tooling -GCCVERSION:microblaze = "12.2.%" -SDKGCCVERSION:microblaze = "14.%" - -GDBVERSION:microblaze = "12.1" -# canon-prefix-map doesn't exist in gcc 12.x -DEBUG_PREFIX_MAP:remove:microblaze = "-fcanon-prefix-map" - MICROBLAZE_SKIP_MSG = "" MICROBLAZE_SKIP_MSG:microblaze = "This recipe does not currently work on microblaze." diff --git a/meta-microblaze/recipes-core/newlib/files/0001-Patch-microblaze-Add-config-microblaze.mt-for-target.patch b/meta-microblaze/recipes-core/newlib/files/0001-Patch-microblaze-Add-config-microblaze.mt-for-target.patch deleted file mode 100644 index 310762089..000000000 --- a/meta-microblaze/recipes-core/newlib/files/0001-Patch-microblaze-Add-config-microblaze.mt-for-target.patch +++ /dev/null @@ -1,88 +0,0 @@ -From d3b09cb319fb1af1bcb83aa50d559ccccdeac639 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati -Date: Mon, 23 Jan 2017 15:27:25 +0530 -Subject: [PATCH 01/11] [Patch, microblaze]: Add config/microblaze.mt for - target_makefile_frag Mirror MIPS method of creating copy of default.mt which - drops the compilation of generic sbrk.c to instead continue using the - microblaze provided version. - -[Libgloss] - -Changelog - -2013-07-15 David Holsgrove - - * config/microblaze.mt: New file. - * microblaze/configure.in: Switch default.mt to microblaze.mt. - * microblaze/configure: Likewise. - -Signed-off-by: David Holsgrove - -Upstream-Status: Pending - ---- - libgloss/config/microblaze.mt | 30 ++++++++++++++++++++++++++++++ - libgloss/microblaze/configure | 2 +- - libgloss/microblaze/configure.ac | 2 +- - 3 files changed, 32 insertions(+), 2 deletions(-) - create mode 100644 libgloss/config/microblaze.mt - -Index: git/libgloss/config/microblaze.mt -=================================================================== ---- /dev/null -+++ git/libgloss/config/microblaze.mt -@@ -0,0 +1,30 @@ -+# -+# Match default.mt to compile generic objects but continue building -+# MicroBlaze specific sbrk.c -+# -+close.o: ${srcdir}/../close.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -+fstat.o: ${srcdir}/../fstat.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -+getpid.o: ${srcdir}/../getpid.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -+isatty.o: ${srcdir}/../isatty.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -+kill.o: ${srcdir}/../kill.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -+lseek.o: ${srcdir}/../lseek.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -+open.o: ${srcdir}/../open.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -+print.o: ${srcdir}/../print.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -+putnum.o: ${srcdir}/../putnum.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -+read.o: ${srcdir}/../read.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -+stat.o: ${srcdir}/../stat.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -+unlink.o: ${srcdir}/../unlink.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -+write.o: ${srcdir}/../write.c -+ $(CC) $(CFLAGS_FOR_TARGET) -O2 $(INCLUDES) -c $(CFLAGS) $? -Index: git/libgloss/configure -=================================================================== ---- git.orig/libgloss/configure -+++ git/libgloss/configure -@@ -2909,6 +2909,7 @@ case "${target}" in - ac_config_files="$ac_config_files microblaze/Makefile" - - subdirs="$subdirs microblaze" -+ target_makefile_frag=${srcdir}/config/microblaze.mt - ;; - mt-*-*) - ac_config_files="$ac_config_files mt/Makefile" -Index: git/libgloss/configure.ac -=================================================================== ---- git.orig/libgloss/configure.ac -+++ git/libgloss/configure.ac -@@ -172,6 +172,7 @@ case "${target}" in - microblaze*-*-*) - AC_CONFIG_FILES([microblaze/Makefile]) - subdirs="$subdirs microblaze" -+ target_makefile_frag=${srcdir}/config/microblaze.mt - ;; - mt-*-*) - AC_CONFIG_FILES([mt/Makefile]) diff --git a/meta-microblaze/recipes-core/newlib/files/0002-Patch-microblaze-Modified-_exceptional_handler.patch b/meta-microblaze/recipes-core/newlib/files/0001-Patch-microblaze-Modified-_exceptional_handler.patch similarity index 76% rename from meta-microblaze/recipes-core/newlib/files/0002-Patch-microblaze-Modified-_exceptional_handler.patch rename to meta-microblaze/recipes-core/newlib/files/0001-Patch-microblaze-Modified-_exceptional_handler.patch index 3c940329d..6e0e2377c 100644 --- a/meta-microblaze/recipes-core/newlib/files/0002-Patch-microblaze-Modified-_exceptional_handler.patch +++ b/meta-microblaze/recipes-core/newlib/files/0001-Patch-microblaze-Modified-_exceptional_handler.patch @@ -1,13 +1,12 @@ -From c96521b00af5259e1404c921cc6a22fbb16c1ace Mon Sep 17 00:00:00 2001 +From e2293e32df22089aa9a9fb3727aba4faa3774b7c Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 23 Jan 2017 15:30:02 +0530 -Subject: [PATCH 02/11] [Patch, microblaze]: Modified _exceptional_handler +Subject: [PATCH 01/11] [Patch, microblaze]: Modified _exceptional_handler Modified the _exceptional_handler to support the changes made in GCC related to Superviosry call Signed-off-by:Nagaraju Mekala - -Upstream-Status: Pending +(cherry picked from commit c96521b00af5259e1404c921cc6a22fbb16c1ace) --- libgloss/microblaze/_exception_handler.S | 1 - 1 file changed, 1 deletion(-) @@ -23,5 +22,5 @@ index 59385ad9b..7a91a781e 100644 - addi r11,r11,8 bra r11 -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-core/newlib/files/0003-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch b/meta-microblaze/recipes-core/newlib/files/0002-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch similarity index 72% rename from meta-microblaze/recipes-core/newlib/files/0003-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch rename to meta-microblaze/recipes-core/newlib/files/0002-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch index 96b832694..74389b078 100644 --- a/meta-microblaze/recipes-core/newlib/files/0003-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch +++ b/meta-microblaze/recipes-core/newlib/files/0002-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch @@ -1,24 +1,24 @@ -From 765f715f4077780395d381bf25870b61008f8013 Mon Sep 17 00:00:00 2001 +From b7b5423f937e63dcb09dbd2d14566e82ff7adc67 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 23 Jan 2017 15:39:45 +0530 -Subject: [PATCH 03/11] [LOCAL]: Add missing declarations for xil_printf to +Subject: [PATCH 02/11] [LOCAL]: Add missing declarations for xil_printf to stdio.h for inclusion in toolchain and use in c++ apps Signed-off-by: David Holsgrove -Upstream-Status: Pending - Conflicts: newlib/libc/include/stdio.h + +(cherry picked from commit 765f715f4077780395d381bf25870b61008f8013) --- newlib/libc/include/stdio.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/newlib/libc/include/stdio.h b/newlib/libc/include/stdio.h -index 7748351f0..fd95f1344 100644 +index 77966578d..fda52fdba 100644 --- a/newlib/libc/include/stdio.h +++ b/newlib/libc/include/stdio.h -@@ -245,6 +245,9 @@ int sprintf (char *__restrict, const char *__restrict, ...) +@@ -251,6 +251,9 @@ int sprintf (char *__restrict, const char *__restrict, ...) _ATTRIBUTE ((__format__ (__printf__, 2, 3))); int remove (const char *); int rename (const char *, const char *); @@ -29,5 +29,5 @@ index 7748351f0..fd95f1344 100644 int _rename (const char *, const char *); #endif -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-core/newlib/files/0004-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch b/meta-microblaze/recipes-core/newlib/files/0003-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch similarity index 97% rename from meta-microblaze/recipes-core/newlib/files/0004-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch rename to meta-microblaze/recipes-core/newlib/files/0003-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch index 6d398bdcd..d3775f4e1 100644 --- a/meta-microblaze/recipes-core/newlib/files/0004-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch +++ b/meta-microblaze/recipes-core/newlib/files/0003-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch @@ -1,11 +1,10 @@ -From edf132aae14fadd15630916781a14a29cafd37ef Mon Sep 17 00:00:00 2001 +From 471a4a4ee556af3274b6d3652cfd4f35801b9b57 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 23 Jan 2017 15:42:11 +0530 -Subject: [PATCH 04/11] [Local]: deleting the xil_printf.c file as now it part +Subject: [PATCH 03/11] [Local]: deleting the xil_printf.c file as now it part of BSP -Upstream-Status: Pending - +(cherry picked from commit edf132aae14fadd15630916781a14a29cafd37ef) --- libgloss/microblaze/xil_printf.c | 284 ------------------------------- 1 file changed, 284 deletions(-) @@ -302,5 +301,5 @@ index f18ee8446..000000000 - -/*---------------------------------------------------*/ -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-core/newlib/files/0005-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch b/meta-microblaze/recipes-core/newlib/files/0004-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch similarity index 69% rename from meta-microblaze/recipes-core/newlib/files/0005-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch rename to meta-microblaze/recipes-core/newlib/files/0004-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch index 1576e54de..b441c3200 100644 --- a/meta-microblaze/recipes-core/newlib/files/0005-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch +++ b/meta-microblaze/recipes-core/newlib/files/0004-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch @@ -1,19 +1,18 @@ -From 250aa479da0b688b87f1fa42f45ecd4536194a45 Mon Sep 17 00:00:00 2001 +From cff1abc10b20e8f9083ee7a5dc3ebfae431c430c Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 23 Jan 2017 15:44:17 +0530 -Subject: [PATCH 05/11] [Local]: deleting the xil_printf.o from MAKEFILE - -Upstream-Status: Pending +Subject: [PATCH 04/11] [Local]: deleting the xil_printf.o from MAKEFILE +(cherry picked from commit 250aa479da0b688b87f1fa42f45ecd4536194a45) --- libgloss/microblaze/Makefile.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libgloss/microblaze/Makefile.in b/libgloss/microblaze/Makefile.in -index fe04a08c9..32aafda37 100644 +index f1fa286bb..6d369242d 100644 --- a/libgloss/microblaze/Makefile.in +++ b/libgloss/microblaze/Makefile.in -@@ -81,7 +81,7 @@ GENOBJS = fstat.o getpid.o isatty.o kill.o lseek.o print.o putnum.o stat.o unlin +@@ -83,7 +83,7 @@ GENOBJS = fstat.o getpid.o isatty.o kill.o lseek.o print.o putnum.o stat.o unlin open.o close.o read.o write.o OBJS = ${GENOBJS} sbrk.o timer.o _exception_handler.o _hw_exception_handler.o \ _interrupt_handler.o _program_clean.o _program_init.o \ @@ -23,5 +22,5 @@ index fe04a08c9..32aafda37 100644 # Tiny Linux BSP. -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-core/newlib/files/0006-MB-X-intial-commit.patch b/meta-microblaze/recipes-core/newlib/files/0005-MB-X-intial-commit.patch similarity index 97% rename from meta-microblaze/recipes-core/newlib/files/0006-MB-X-intial-commit.patch rename to meta-microblaze/recipes-core/newlib/files/0005-MB-X-intial-commit.patch index 779580b67..3f113228b 100644 --- a/meta-microblaze/recipes-core/newlib/files/0006-MB-X-intial-commit.patch +++ b/meta-microblaze/recipes-core/newlib/files/0005-MB-X-intial-commit.patch @@ -1,10 +1,9 @@ -From 97684eb81807189dbcdca560d086100ba8bfa906 Mon Sep 17 00:00:00 2001 +From 6c4a1e25108584fc472f42d58b14ee5f951080d9 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Fri, 27 Jul 2018 16:10:36 +0530 -Subject: [PATCH 06/11] MB-X intial commit - -Upstream-Status: Pending +Subject: [PATCH 05/11] MB-X intial commit +(cherry picked from commit 97684eb81807189dbcdca560d086100ba8bfa906) --- libgloss/microblaze/crt0.S | 2 +- libgloss/microblaze/crt1.S | 2 +- @@ -192,5 +191,5 @@ index 434195e2c..3119d82c5 100644 { /* To get here, *a1 == *a2, thus if we find a null in *a1, -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-core/newlib/files/0007-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch b/meta-microblaze/recipes-core/newlib/files/0006-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch similarity index 99% rename from meta-microblaze/recipes-core/newlib/files/0007-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch rename to meta-microblaze/recipes-core/newlib/files/0006-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch index f3e20253f..52a4319b6 100644 --- a/meta-microblaze/recipes-core/newlib/files/0007-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch +++ b/meta-microblaze/recipes-core/newlib/files/0006-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch @@ -1,14 +1,14 @@ -From e7b0c93274c2f51adc7c20c24a28d3cd5974fddc Mon Sep 17 00:00:00 2001 +From 9fcd09b603d8deb2bbd3557aae6faba311dbdf12 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 11 Sep 2018 14:32:20 +0530 -Subject: [PATCH 07/11] [Patch, Microblaze]: newlib port for microblaze m64 +Subject: [PATCH 06/11] [Patch, Microblaze]: newlib port for microblaze m64 flag... -Upstream-Status: Pending - Conflicts: libgloss/microblaze/_hw_exception_handler.S libgloss/microblaze/_interrupt_handler.S + +(cherry picked from commit e7b0c93274c2f51adc7c20c24a28d3cd5974fddc) --- libgloss/microblaze/_exception_handler.S | 6 +- libgloss/microblaze/_hw_exception_handler.S | 7 +- @@ -1135,5 +1135,5 @@ index cdd87c76f..971862bcb 100644 +#endif .end setjmp -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-core/newlib/files/0008-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch b/meta-microblaze/recipes-core/newlib/files/0007-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch similarity index 95% rename from meta-microblaze/recipes-core/newlib/files/0008-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch rename to meta-microblaze/recipes-core/newlib/files/0007-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch index b82d7b5c0..6e7b2e489 100644 --- a/meta-microblaze/recipes-core/newlib/files/0008-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch +++ b/meta-microblaze/recipes-core/newlib/files/0007-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch @@ -1,11 +1,10 @@ -From 924721fdb8eed60fe58c8a7976955bac02efc200 Mon Sep 17 00:00:00 2001 +From eb41f08c22949726576d001e27ec8be3531d947a Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Fri, 28 Sep 2018 12:07:43 +0530 -Subject: [PATCH 08/11] fixing the bug in crt files, added addlik instead of +Subject: [PATCH 07/11] fixing the bug in crt files, added addlik instead of lli insn -Upstream-Status: Pending - +(cherry picked from commit 924721fdb8eed60fe58c8a7976955bac02efc200) --- libgloss/microblaze/crt0.S | 6 +++--- libgloss/microblaze/crt1.S | 6 +++--- @@ -100,5 +99,5 @@ index 54ba473ea..a25c84734 100644 brealid r15, _crtinit /* Initialize BSS and run program */ nop -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-core/newlib/files/0009-Patch-MicroBlaze-Added-MB-64-support-to-strcmp-strcp.patch b/meta-microblaze/recipes-core/newlib/files/0008-Patch-MicroBlaze-Added-MB-64-support-to-strcmp-strcp.patch similarity index 98% rename from meta-microblaze/recipes-core/newlib/files/0009-Patch-MicroBlaze-Added-MB-64-support-to-strcmp-strcp.patch rename to meta-microblaze/recipes-core/newlib/files/0008-Patch-MicroBlaze-Added-MB-64-support-to-strcmp-strcp.patch index 1a89c31b2..7eaf0a88a 100644 --- a/meta-microblaze/recipes-core/newlib/files/0009-Patch-MicroBlaze-Added-MB-64-support-to-strcmp-strcp.patch +++ b/meta-microblaze/recipes-core/newlib/files/0008-Patch-MicroBlaze-Added-MB-64-support-to-strcmp-strcp.patch @@ -1,11 +1,10 @@ -From e7a5086bc3e38cf5bc5c5943de6cf5135ed6a77b Mon Sep 17 00:00:00 2001 +From 82e5a92af613455cb7aed4eee7da3d723e5f5011 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 17 Nov 2020 13:06:41 +0530 -Subject: [PATCH 09/11] [Patch,MicroBlaze] : Added MB-64 support to +Subject: [PATCH 08/11] [Patch,MicroBlaze] : Added MB-64 support to strcmp/strcpy/strlen files Signed-off-by:Mahesh Bodapati -Upstream-Status: Pending - +(cherry picked from commit e7a5086bc3e38cf5bc5c5943de6cf5135ed6a77b) --- newlib/libc/machine/microblaze/strcmp.c | 63 ++++++++++++++++++++++++- newlib/libc/machine/microblaze/strcpy.c | 57 ++++++++++++++++++++++ @@ -228,5 +227,5 @@ index acb4464bc..b6f2d3c13 100644 #endif /* ! HAVE_HW_PCMP */ } -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-core/newlib/files/0010-Patch-MicroBlaze-Removing-the-Assembly-implementatio.patch b/meta-microblaze/recipes-core/newlib/files/0009-Patch-MicroBlaze-Removing-the-Assembly-implementatio.patch similarity index 98% rename from meta-microblaze/recipes-core/newlib/files/0010-Patch-MicroBlaze-Removing-the-Assembly-implementatio.patch rename to meta-microblaze/recipes-core/newlib/files/0009-Patch-MicroBlaze-Removing-the-Assembly-implementatio.patch index aaa2a0098..2a3d86320 100644 --- a/meta-microblaze/recipes-core/newlib/files/0010-Patch-MicroBlaze-Removing-the-Assembly-implementatio.patch +++ b/meta-microblaze/recipes-core/newlib/files/0009-Patch-MicroBlaze-Removing-the-Assembly-implementatio.patch @@ -1,12 +1,12 @@ -From 6b8e5c7a773de4609f9c855aa714eca5a3f8b4ab Mon Sep 17 00:00:00 2001 +From 5a7955b68f5066b00413e751d1de967181c88b94 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 9 Nov 2021 22:53:44 +0530 -Subject: [PATCH 10/11] [Patch,MicroBlaze] : Removing the Assembly +Subject: [PATCH 09/11] [Patch,MicroBlaze] : Removing the Assembly implementation of 64bit string function. Revisit in next release and fix it -Upstream-Status: Pending +(cherry picked from commit 6b8e5c7a773de4609f9c855aa714eca5a3f8b4ab) --- newlib/libc/machine/microblaze/mb_endian.h | 4 + newlib/libc/machine/microblaze/strcmp.c | 95 ++++++++-------------- @@ -337,5 +337,5 @@ index b6f2d3c13..940753996 100644 #endif /* ! HAVE_HW_PCMP */ } -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-core/newlib/files/0011-Fixed-the-bug-in-crtinit.s-for-MB-64.patch b/meta-microblaze/recipes-core/newlib/files/0010-Fixed-the-bug-in-crtinit.s-for-MB-64.patch similarity index 71% rename from meta-microblaze/recipes-core/newlib/files/0011-Fixed-the-bug-in-crtinit.s-for-MB-64.patch rename to meta-microblaze/recipes-core/newlib/files/0010-Fixed-the-bug-in-crtinit.s-for-MB-64.patch index 5e89db18d..76b833722 100644 --- a/meta-microblaze/recipes-core/newlib/files/0011-Fixed-the-bug-in-crtinit.s-for-MB-64.patch +++ b/meta-microblaze/recipes-core/newlib/files/0010-Fixed-the-bug-in-crtinit.s-for-MB-64.patch @@ -1,10 +1,9 @@ -From bab2eafd2d4ca1f2caacd50120e8ac94aca1b7c4 Mon Sep 17 00:00:00 2001 +From 3790e623bec70441d7d34f9390760b611a968e9d Mon Sep 17 00:00:00 2001 From: Nagaraju Date: Tue, 14 Jan 2020 22:32:30 +0530 -Subject: [PATCH 11/11] Fixed the bug in crtinit.s for MB-64 - -Upstream-Status: Pending +Subject: [PATCH 10/11] Fixed the bug in crtinit.s for MB-64 +(cherry picked from commit bab2eafd2d4ca1f2caacd50120e8ac94aca1b7c4) --- libgloss/microblaze/crtinit.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) @@ -23,5 +22,5 @@ index 854117536..f79140734 100644 beagti r18, .Lloopsbss .Lendsbss: -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-core/newlib/files/0011-Use-port-specific-sbrk.patch b/meta-microblaze/recipes-core/newlib/files/0011-Use-port-specific-sbrk.patch new file mode 100644 index 000000000..52df9e34f --- /dev/null +++ b/meta-microblaze/recipes-core/newlib/files/0011-Use-port-specific-sbrk.patch @@ -0,0 +1,24 @@ +From c7e7aea9c60f87096a38604a9d4738cf762669dd Mon Sep 17 00:00:00 2001 +From: Aayush Misra +Date: Fri, 26 Jul 2024 19:08:17 +0530 +Subject: [PATCH 11/11] Use port-specific sbrk + +--- + libgloss/microblaze/Makefile.in | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/libgloss/microblaze/Makefile.in b/libgloss/microblaze/Makefile.in +index 6d369242d..d5206a849 100644 +--- a/libgloss/microblaze/Makefile.in ++++ b/libgloss/microblaze/Makefile.in +@@ -122,6 +122,7 @@ linux-crt0.o: linux-crt0.S + crtinit.o: crtinit.S + sim-crtinit.o: sim-crtinit.S + sim-pgcrtinit.o: sim-pgcrtinit.S ++sbrk.o: sbrk.c + + # target specific makefile fragment comes in here. + @target_makefile_frag@ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-core/newlib/libgloss-microblaze.inc b/meta-microblaze/recipes-core/newlib/libgloss-microblaze.inc new file mode 100644 index 000000000..5410286b6 --- /dev/null +++ b/meta-microblaze/recipes-core/newlib/libgloss-microblaze.inc @@ -0,0 +1,13 @@ +require microblaze-newlib.inc + +do_configure:prepend() { + # hack for microblaze, which needs xilinx.ld to literally do any linking (its hard coded in its LINK_SPEC) + export CC="${CC} -L${S}/libgloss/microblaze" +} + +# Libgloss provides various .o files in libdir +# These must NOT be stripped, but for some reason they are installed +x +# which triggers them to be stripped. +do_install:append() { + chmod 0644 ${D}${libdir}/*.o +} diff --git a/meta-microblaze/recipes-core/newlib/libgloss_%.bbappend b/meta-microblaze/recipes-core/newlib/libgloss_%.bbappend index 15be17326..0ebe2e138 100644 --- a/meta-microblaze/recipes-core/newlib/libgloss_%.bbappend +++ b/meta-microblaze/recipes-core/newlib/libgloss_%.bbappend @@ -1,13 +1,4 @@ -require microblaze-newlib.inc +MICROBLAZEPATCHES = "" +MICROBLAZEPATCHES:microblaze = "libgloss-microblaze.inc" -do_configure:prepend:microblaze() { - # hack for microblaze, which needs xilinx.ld to literally do any linking (its hard coded in its LINK_SPEC) - export CC="${CC} -L${S}/libgloss/microblaze" -} - -# Libgloss provides various .o files in libdir -# These must NOT be stripped, but for some reason they are installed +x -# which triggers them to be stripped. -do_install:append:microblaze() { - chmod 0644 ${D}${libdir}/*.o -} +require ${MICROBLAZEPATCHES} diff --git a/meta-microblaze/recipes-core/newlib/microblaze-newlib.inc b/meta-microblaze/recipes-core/newlib/microblaze-newlib.inc index a1e3b92f5..99d3d02ee 100644 --- a/meta-microblaze/recipes-core/newlib/microblaze-newlib.inc +++ b/meta-microblaze/recipes-core/newlib/microblaze-newlib.inc @@ -1,19 +1,23 @@ # Add MicroBlaze Patches -FILESEXTRAPATHS:append:microblaze := ":${THISDIR}/files" -SRC_URI:append:microblaze = " \ - file://0001-Patch-microblaze-Add-config-microblaze.mt-for-target.patch \ - file://0002-Patch-microblaze-Modified-_exceptional_handler.patch \ - file://0003-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch \ - file://0004-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch \ - file://0005-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch \ - file://0006-MB-X-intial-commit.patch \ - file://0007-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch \ - file://0008-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch \ - file://0009-Patch-MicroBlaze-Added-MB-64-support-to-strcmp-strcp.patch \ - file://0010-Patch-MicroBlaze-Removing-the-Assembly-implementatio.patch \ - file://0011-Fixed-the-bug-in-crtinit.s-for-MB-64.patch \ +FILESEXTRAPATHS:append := ":${THISDIR}/files" + +# Our changes are all local, no real patch-status +ERROR_QA:remove = "patch-status" + +SRC_URI += " \ + file://0001-Patch-microblaze-Modified-_exceptional_handler.patch \ + file://0002-LOCAL-Add-missing-declarations-for-xil_printf-to-std.patch \ + file://0003-Local-deleting-the-xil_printf.c-file-as-now-it-part-.patch \ + file://0004-Local-deleting-the-xil_printf.o-from-MAKEFILE.patch \ + file://0005-MB-X-intial-commit.patch \ + file://0006-Patch-Microblaze-newlib-port-for-microblaze-m64-flag.patch \ + file://0007-fixing-the-bug-in-crt-files-added-addlik-instead-of-.patch \ + file://0008-Patch-MicroBlaze-Added-MB-64-support-to-strcmp-strcp.patch \ + file://0009-Patch-MicroBlaze-Removing-the-Assembly-implementatio.patch \ + file://0010-Fixed-the-bug-in-crtinit.s-for-MB-64.patch \ + file://0011-Use-port-specific-sbrk.patch \ " -EXTRA_OECONF:append:xilinx-standalone:microblaze = " \ +EXTRA_OECONF:append:xilinx-standalone = " \ --disable-newlib-reent-check-verify \ " diff --git a/meta-microblaze/recipes-core/newlib/newlib-microblaze.inc b/meta-microblaze/recipes-core/newlib/newlib-microblaze.inc new file mode 100644 index 000000000..116bfbf39 --- /dev/null +++ b/meta-microblaze/recipes-core/newlib/newlib-microblaze.inc @@ -0,0 +1,7 @@ +require microblaze-newlib.inc + +do_configure:prepend() { + # hack for microblaze, which needs xilinx.ld to literally do any linking (its hard coded in its LINK_SPEC) + export CC="${CC} -L${S}/libgloss/microblaze" +} + diff --git a/meta-microblaze/recipes-core/newlib/newlib_%.bbappend b/meta-microblaze/recipes-core/newlib/newlib_%.bbappend index d30e61ec3..27bdee489 100644 --- a/meta-microblaze/recipes-core/newlib/newlib_%.bbappend +++ b/meta-microblaze/recipes-core/newlib/newlib_%.bbappend @@ -1,7 +1,4 @@ -require microblaze-newlib.inc - -do_configure:prepend:microblaze() { - # hack for microblaze, which needs xilinx.ld to literally do any linking (its hard coded in its LINK_SPEC) - export CC="${CC} -L${S}/libgloss/microblaze" -} +MICROBLAZEPATCHES = "" +MICROBLAZEPATCHES:microblaze = "newlib-microblaze.inc" +require ${MICROBLAZEPATCHES} diff --git a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc index 3701d2458..014729a52 100644 --- a/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc +++ b/meta-microblaze/recipes-devtools/binutils/binutils-microblaze.inc @@ -2,3 +2,62 @@ FILESEXTRAPATHS:append := ":${THISDIR}/binutils" LDGOLD_ALTS:microblaze = "" USE_ALTERNATIVES_FOR:remove:microblaze = "gprof" + +# Our changes are all local, no real patch-status +ERROR_QA:remove = "patch-status" + +SRC_URI += " \ + file://0001-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch \ + file://0002-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch \ + file://0003-Initial-port-of-core-reading-support-Added-support-f.patch \ + file://0004-Fix-debug-message-when-register-is-unavailable.patch \ + file://0005-MicroBlaze-native-gdb-port.patch \ + file://0006-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch \ + file://0007-these-changes-will-make-64-bit-vectors-as-default-ta.patch \ + file://0008-Added-m64-abi-for-64-bit-target-descriptions.-set-m6.patch \ + file://0009-Depth-Total-number-of-inline-functions-refer-inline-.patch \ + file://0010-Fix-gdb-14-build-errors-for-microblaze-xilinx-elf-20.patch \ + file://0011-fix-gdb-microblaze-xilinx-elf-crash-issue-on-invocat.patch \ + file://0012-Add-mlittle-endian-and-mbig-endian-flags.patch \ + file://0013-Disable-the-warning-message-for-eh_frame_hdr.patch \ + file://0014-Fix-relaxation-of-assembler-resolved-references-Fixu.patch \ + file://0015-upstream-change-to-garbage-collection-sweep-causes-m.patch \ + file://0016-Add-new-bit-field-instructions.patch \ + file://0017-fixed-bug-in-GCC-so-that-It-will-support-.long-0U-an.patch \ + file://0018-Compiler-will-give-error-messages-in-more-detail-for.patch \ + file://0019-initial-support-for-MicroBlaze-64-bit-m64.patch \ + file://0020-initial-support-for-MicroBlaze-64-bit-m64.patch \ + file://0021-Added-relocations-for-MB-X.patch \ + file://0022-initial-support-for-MicroBlaze-64-bit-m64.patch \ + file://0023-Added-relocations-for-MB-X.patch \ + file://0024-Fixed-MB-x-relocation-issues-Added-imml-for-required.patch \ + file://0025-Fixed-address-computation-issues-with-64bit-address-.patch \ + file://0026-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch \ + file://0027-Revert-ld-Remove-unused-expression-state-defsym-symb.patch \ + file://0028-fixing-the-long-long-long-mingw-toolchain-issue.patch \ + file://0029-Added-support-to-new-arithmetic-single-register-inst.patch \ + file://0030-double-imml-generation-for-64-bit-values.patch \ + file://0031-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch \ + file://0032-This-patch-will-remove-imml-0-and-imml-1-instruction.patch \ + file://0033-Changing-the-long-to-long-long-as-in-Windows-long-is.patch \ + file://0034-gas-revert-moving-of-md_pseudo_table-from-const.patch \ + file://0035-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch \ + file://0036-Invalid-data-offsets-pointer-after-relaxation.-Propo.patch \ + file://0037-Double-free-with-ld-no-keep-memory.-Proposed-patches.patch \ + file://0038-MB-binutils-Upstream-port-issues.patch \ + file://0039-Initial-port-of-core-reading-support-Added-support-f.patch \ + file://0040-Fix-build-issues-after-Xilinx-2023.2-binutils-merge.patch \ + file://0041-disable-truncated-register-warning-gdb-remote.c.patch \ + file://0042-Fix-unresolved-conflicts-from-binutils_2_42_merge.patch \ + file://0043-microblaze_gdbarch_init-set-microblaze_abi-based-on-.patch \ + file://0044-Start-bfd_mach_microblaze-values-from-0-0-1-instead-.patch \ + file://0045-Fix-build-issues-bfd-reloc.c-add-missing-relocs-used.patch \ + file://0046-Regenerate-bfd-bfd-in2.h-bfd-libbfd.h.patch \ + file://0047-gdb-remote.c-revert-earlier-change-to-process_g_pack.patch \ + file://0048-Fix-build-issues-after-Xilinx-2023.2-binutils-patch-.patch \ + file://0049-When-unwinding-pc-value-adjust-return-pc-value.patch \ + file://0050-info-reg-pc-does-not-print-symbolic-value.patch \ + file://0051-Wrong-target-description-accepted-by-microblaze-arch.patch \ + file://0052-Merge-gdb-microblaze-linux-tdep.c-to-gdb-14-and-fix-.patch \ + file://0053-Roll-back-an-improvement-which-inlines-target_gdbarc.patch \ +" diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch new file mode 100644 index 000000000..fd8a96c93 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0001-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch @@ -0,0 +1,42 @@ +From add4545f804219232f16f96e3a83af2fadf41463 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 10 Oct 2022 15:07:22 +0530 +Subject: [PATCH 01/53] Add initial port of linux gdbserver add + gdb_proc_service_h to gdbserver microblaze-linux + +gdbserver needs to initialise the microblaze registers + +other archs use this step to run a *_arch_setup() to carry out all +architecture specific setup - may need to add in future + + * add linux-ptrace.o to gdbserver configure + * Update breakpoint opcode + * fix segfault on connecting gdbserver + * add microblaze_linux_memory_remove_breakpoint + * add set_solib_svr4_fetch_link_map_offsets + * add set_gdbarch_fetch_tls_load_module_address + * Force reading of r0 as 0, prevent stores + +Signed-off-by: David Holsgrove +Signed-off-by: Nathan Rossi +Signed-off-by: Mahesh Bodapati +Signed-off-by: Aayush Misra +--- + gdbserver/Makefile.in | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in +index d12f8746611..ee606908bae 100644 +--- a/gdbserver/Makefile.in ++++ b/gdbserver/Makefile.in +@@ -180,6 +180,7 @@ SFILES = \ + $(srcdir)/linux-loongarch-low.cc \ + $(srcdir)/linux-low.cc \ + $(srcdir)/linux-m68k-low.cc \ ++ $(srcdir)/linux-microblaze-low.cc \ + $(srcdir)/linux-mips-low.cc \ + $(srcdir)/linux-nios2-low.cc \ + $(srcdir)/linux-or1k-low.cc \ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-initial-port-of-linux-gdbserver.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch similarity index 94% rename from meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-initial-port-of-linux-gdbserver.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch index 050bdde5e..ea6689fe6 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-initial-port-of-linux-gdbserver.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0002-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch @@ -1,7 +1,7 @@ -From baac387700a72407b3994bfd0a03825112c9745f Mon Sep 17 00:00:00 2001 +From aebe2fdb45467fe4a07874cc310e441a38c23f84 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 10 Oct 2022 15:07:22 +0530 -Subject: [PATCH 1/8] Add initial port of linux gdbserver add +Subject: [PATCH 02/53] Add initial port of linux gdbserver add gdb_proc_service_h to gdbserver microblaze-linux gdbserver needs to initialise the microblaze registers @@ -17,11 +17,10 @@ architecture specific setup - may need to add in future * add set_gdbarch_fetch_tls_load_module_address * Force reading of r0 as 0, prevent stores -Upstream-Status: Pending - Signed-off-by: David Holsgrove Signed-off-by: Nathan Rossi Signed-off-by: Mahesh Bodapati +Signed-off-by: Aayush Misra --- gdb/configure.host | 2 + gdb/features/Makefile | 1 + @@ -31,10 +30,9 @@ Signed-off-by: Mahesh Bodapati gdb/microblaze-tdep.h | 4 +- gdb/regformats/microblaze-linux.dat | 64 +++++++ gdb/regformats/reg-microblaze.dat | 41 +++++ - gdbserver/Makefile.in | 1 + gdbserver/configure.srv | 10 ++ gdbserver/linux-microblaze-low.cc | 269 ++++++++++++++++++++++++++++ - 11 files changed, 466 insertions(+), 3 deletions(-) + 10 files changed, 465 insertions(+), 3 deletions(-) create mode 100644 gdb/features/microblaze-linux.xml create mode 100644 gdb/regformats/microblaze-linux.dat create mode 100644 gdb/regformats/reg-microblaze.dat @@ -61,7 +59,7 @@ index da71675b201..877537d06ef 100644 mips*-*-netbsdaout* | mips*-*-knetbsd*-gnu) gdb_host=nbsd ;; diff --git a/gdb/features/Makefile b/gdb/features/Makefile -index 68e17d0085d..fc3196864c9 100644 +index cda6a49d563..8ac30d8cea3 100644 --- a/gdb/features/Makefile +++ b/gdb/features/Makefile @@ -46,6 +46,7 @@ @@ -92,7 +90,7 @@ index 00000000000..688a3f83d1e + + diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c -index daa7ddf7e4d..5748556a556 100644 +index 7d620a3688b..d25100ef867 100644 --- a/gdb/microblaze-linux-tdep.c +++ b/gdb/microblaze-linux-tdep.c @@ -37,6 +37,22 @@ @@ -152,7 +150,7 @@ index daa7ddf7e4d..5748556a556 100644 void _initialize_microblaze_linux_tdep (); diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index 3d5dd669341..3e8e8fe35b9 100644 +index fc83634d1e6..3ff7ec644b6 100644 --- a/gdb/microblaze-tdep.c +++ b/gdb/microblaze-tdep.c @@ -128,7 +128,38 @@ microblaze_fetch_instruction (CORE_ADDR pc) @@ -195,7 +193,7 @@ index 3d5dd669341..3e8e8fe35b9 100644 /* Allocate and initialize a frame cache. */ -@@ -716,6 +747,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -714,6 +745,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) microblaze_breakpoint::kind_from_pc); set_gdbarch_sw_breakpoint_from_kind (gdbarch, microblaze_breakpoint::bp_from_kind); @@ -203,14 +201,14 @@ index 3d5dd669341..3e8e8fe35b9 100644 set_gdbarch_frame_args_skip (gdbarch, 8); -@@ -756,4 +788,5 @@ When non-zero, microblaze specific debugging is enabled."), +@@ -754,4 +786,5 @@ When non-zero, microblaze specific debugging is enabled."), NULL, &setdebuglist, &showdebuglist); + } diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h -index 4d90e8785dc..53fcb2297e6 100644 +index 0b4a5a3f472..56736b9b0c9 100644 --- a/gdb/microblaze-tdep.h +++ b/gdb/microblaze-tdep.h @@ -118,6 +118,8 @@ struct microblaze_frame_cache @@ -340,23 +338,11 @@ index 00000000000..bd8a4384424 +32:fsr +32:slr +32:shr -diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in -index 47648b8d962..55a5f5b81ae 100644 ---- a/gdbserver/Makefile.in -+++ b/gdbserver/Makefile.in -@@ -178,6 +178,7 @@ SFILES = \ - $(srcdir)/linux-ia64-low.cc \ - $(srcdir)/linux-low.cc \ - $(srcdir)/linux-m68k-low.cc \ -+ $(srcdir)/linux-microblaze-low.cc \ - $(srcdir)/linux-mips-low.cc \ - $(srcdir)/linux-nios2-low.cc \ - $(srcdir)/linux-or1k-low.cc \ diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv -index 6e09b0eeb79..1817f1f04fb 100644 +index 9e861a75088..11ce617e72f 100644 --- a/gdbserver/configure.srv +++ b/gdbserver/configure.srv -@@ -145,6 +145,16 @@ case "${gdbserver_host}" in +@@ -159,6 +159,16 @@ case "${gdbserver_host}" in srv_linux_regsets=yes srv_linux_thread_db=yes ;; @@ -649,5 +635,5 @@ index 00000000000..bf9eecc41ab +} + -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0002-Patch-MicroBlaze-Initial-port-of-core-reading-suppor.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Initial-port-of-core-reading-support-Added-support-f.patch similarity index 89% rename from meta-microblaze/recipes-devtools/gdb/gdb/0002-Patch-MicroBlaze-Initial-port-of-core-reading-suppor.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0003-Initial-port-of-core-reading-support-Added-support-f.patch index f7af2a626..c0515aa68 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0002-Patch-MicroBlaze-Initial-port-of-core-reading-suppor.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0003-Initial-port-of-core-reading-support-Added-support-f.patch @@ -1,16 +1,14 @@ -From 7da397cae8c0f8826184d6e12fda9ccd11f92753 Mon Sep 17 00:00:00 2001 +From 67943e124abc6b1228d84399fbde5b129015ac7f Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 10 Oct 2022 16:37:53 +0530 -Subject: [PATCH 2/8] [Patch,MicroBlaze]: Initial port of core reading support - Added support for reading notes in linux core dumps Support for reading of - PRSTATUS and PSINFO information for rebuilding ".reg" sections of core dumps - at run time. - -Upstream-Status: Pending +Subject: [PATCH 03/53] Initial port of core reading support Added support for + reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO + information for rebuilding ".reg" sections of core dumps at run time. Signed-off-by: David Holsgrove Signed-off-by: Nathan Rossi Signed-off-by: Mahesh Bodapati +Signed-off-by: Aayush Misra --- bfd/elf32-microblaze.c | 84 +++++++++++++++++++++++++++++++++++++ gdb/configure.tgt | 2 +- @@ -20,10 +18,10 @@ Signed-off-by: Mahesh Bodapati 5 files changed, 177 insertions(+), 2 deletions(-) diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index d09b3f7095d..d3b3c66cf00 100644 +index 64198b8f1a6..022ce365c59 100644 --- a/bfd/elf32-microblaze.c +++ b/bfd/elf32-microblaze.c -@@ -713,6 +713,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name) +@@ -772,6 +772,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name) return _bfd_elf_is_local_label_name (abfd, name); } @@ -111,7 +109,7 @@ index d09b3f7095d..d3b3c66cf00 100644 /* ELF linker hash entry. */ struct elf32_mb_link_hash_entry -@@ -3434,4 +3515,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd, +@@ -3500,4 +3581,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd, #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook @@ -120,10 +118,10 @@ index d09b3f7095d..d3b3c66cf00 100644 + #include "elf32-target.h" diff --git a/gdb/configure.tgt b/gdb/configure.tgt -index 0705ccf32b8..7ea186481f3 100644 +index 47a674201f9..d0673abd2b8 100644 --- a/gdb/configure.tgt +++ b/gdb/configure.tgt -@@ -400,7 +400,7 @@ mep-*-*) +@@ -415,7 +415,7 @@ mep-*-*) microblaze*-linux-*|microblaze*-*-linux*) # Target: Xilinx MicroBlaze running Linux @@ -133,7 +131,7 @@ index 0705ccf32b8..7ea186481f3 100644 ;; microblaze*-*-*) diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c -index 5748556a556..d6197c49dfd 100644 +index d25100ef867..eef09bacec0 100644 --- a/gdb/microblaze-linux-tdep.c +++ b/gdb/microblaze-linux-tdep.c @@ -36,6 +36,7 @@ @@ -179,10 +177,10 @@ index 5748556a556..d6197c49dfd 100644 set_gdbarch_fetch_tls_load_module_address (gdbarch, svr4_fetch_objfile_link_map); diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index 3e8e8fe35b9..ccd37d085d6 100644 +index 3ff7ec644b6..7c98331f8a9 100644 --- a/gdb/microblaze-tdep.c +++ b/gdb/microblaze-tdep.c -@@ -666,6 +666,43 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) +@@ -665,6 +665,43 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) tdesc_microblaze_with_stack_protect); } @@ -226,9 +224,9 @@ index 3e8e8fe35b9..ccd37d085d6 100644 static struct gdbarch * microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) { -@@ -718,6 +755,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - microblaze_gdbarch_tdep *tdep = new microblaze_gdbarch_tdep; - gdbarch = gdbarch_alloc (&info, tdep); +@@ -716,6 +753,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + gdbarch *gdbarch + = gdbarch_alloc (&info, gdbarch_tdep_up (new microblaze_gdbarch_tdep)); + tdep->gregset = NULL; + tdep->sizeof_gregset = 0; @@ -237,7 +235,7 @@ index 3e8e8fe35b9..ccd37d085d6 100644 set_gdbarch_long_double_bit (gdbarch, 128); set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS); -@@ -766,6 +807,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -764,6 +805,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); if (tdesc_data != NULL) tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data)); @@ -252,7 +250,7 @@ index 3e8e8fe35b9..ccd37d085d6 100644 return gdbarch; } diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h -index 53fcb2297e6..2e853d84d72 100644 +index 56736b9b0c9..07a160a463c 100644 --- a/gdb/microblaze-tdep.h +++ b/gdb/microblaze-tdep.h @@ -23,8 +23,23 @@ @@ -267,7 +265,7 @@ index 53fcb2297e6..2e853d84d72 100644 + unsigned int pregs[16]; +}; + - struct microblaze_gdbarch_tdep : gdbarch_tdep + struct microblaze_gdbarch_tdep : gdbarch_tdep_base { + int dummy; // declare something. + @@ -299,5 +297,5 @@ index 53fcb2297e6..2e853d84d72 100644 #endif /* microblaze-tdep.h */ -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0004-Fix-debug-message-when-register-is-unavailable.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0004-Fix-debug-message-when-register-is-unavailable.patch new file mode 100644 index 000000000..1383efd8e --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0004-Fix-debug-message-when-register-is-unavailable.patch @@ -0,0 +1,45 @@ +From 087f77ebdbdf5b9b5d199ba92b31c6503cb66b37 Mon Sep 17 00:00:00 2001 +From: Nathan Rossi +Date: Tue, 8 May 2012 18:11:17 +1000 +Subject: [PATCH 04/53] Fix debug message when register is unavailable + +Signed-off-by: Nathan Rossi + +Conflicts: + gdb/frame.c +Signed-off-by: Aayush Misra +--- + gdb/frame.c | 14 +++++++++++--- + 1 file changed, 11 insertions(+), 3 deletions(-) + +diff --git a/gdb/frame.c b/gdb/frame.c +index d95d63eb0f6..859e1a6553d 100644 +--- a/gdb/frame.c ++++ b/gdb/frame.c +@@ -1317,12 +1317,20 @@ frame_unwind_register_value (frame_info_ptr next_frame, int regnum) + else + { + int i; +- gdb::array_view buf = value->contents (); ++ ++ const gdb_byte *buf = NULL; ++ if (value_entirely_available(value)) { ++ gdb::array_view buf = value->contents (); ++ } + + gdb_printf (&debug_file, " bytes="); + gdb_printf (&debug_file, "["); +- for (i = 0; i < register_size (gdbarch, regnum); i++) +- gdb_printf (&debug_file, "%02x", buf[i]); ++ if (buf != NULL) { ++ for (i = 0; i < register_size (gdbarch, regnum); i++) ++ gdb_printf (&debug_file, "%02x", buf[i]); ++ } else { ++ gdb_printf (&debug_file, "unavailable"); ++ } + gdb_printf (&debug_file, "]"); + } + } +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0004-Patch-MicroBlaze-MicroBlaze-native-gdb-port.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0005-MicroBlaze-native-gdb-port.patch similarity index 95% rename from meta-microblaze/recipes-devtools/gdb/gdb/0004-Patch-MicroBlaze-MicroBlaze-native-gdb-port.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0005-MicroBlaze-native-gdb-port.patch index 08b0ae176..75c06b621 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0004-Patch-MicroBlaze-MicroBlaze-native-gdb-port.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0005-MicroBlaze-native-gdb-port.patch @@ -1,13 +1,11 @@ -From 8d05b79cda7617f228fa4bb6e5147689b662699e Mon Sep 17 00:00:00 2001 +From 5b633480eb0b45dc15b6416c54535c54c062d23c Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 10 Oct 2022 18:53:46 +0530 -Subject: [PATCH 4/8] [Patch,MicroBlaze] : MicroBlaze native gdb port. +Subject: [PATCH 05/53] MicroBlaze native gdb port. signed-off-by : Mahesh Bodapati -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Signed-off-by: Aayush Misra --- gdb/Makefile.in | 2 + gdb/configure.nat | 4 + @@ -23,10 +21,10 @@ Signed-off-by: Mark Hatle create mode 100644 gdb/microblaze-linux-tdep.h diff --git a/gdb/Makefile.in b/gdb/Makefile.in -index aecab41eeb8..fb63e1662c1 100644 +index 0e0f19c40c9..056588d88d0 100644 --- a/gdb/Makefile.in +++ b/gdb/Makefile.in -@@ -1374,6 +1374,7 @@ HFILES_NO_SRCDIR = \ +@@ -1409,6 +1409,7 @@ HFILES_NO_SRCDIR = \ memory-map.h \ memrange.h \ microblaze-tdep.h \ @@ -34,7 +32,7 @@ index aecab41eeb8..fb63e1662c1 100644 mips-linux-tdep.h \ mips-netbsd-tdep.h \ mips-tdep.h \ -@@ -2249,6 +2250,7 @@ ALLDEPFILES = \ +@@ -1757,6 +1758,7 @@ ALLDEPFILES = \ m68k-linux-nat.c \ m68k-linux-tdep.c \ m68k-tdep.c \ @@ -43,10 +41,10 @@ index aecab41eeb8..fb63e1662c1 100644 microblaze-tdep.c \ mingw-hdep.c \ diff --git a/gdb/configure.nat b/gdb/configure.nat -index b45519fd116..256c666e760 100644 +index 8b98511cef7..c9f0fb25010 100644 --- a/gdb/configure.nat +++ b/gdb/configure.nat -@@ -270,6 +270,10 @@ case ${gdb_host} in +@@ -274,6 +274,10 @@ case ${gdb_host} in # Host: Motorola m68k running GNU/Linux. NATDEPFILES="${NATDEPFILES} m68k-linux-nat.o" ;; @@ -144,378 +142,378 @@ index 00000000000..267e12f6d59 +} diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c new file mode 100755 -index 00000000000..6b9daa23120 +index 00000000000..a348001a3e2 --- /dev/null +++ b/gdb/microblaze-linux-nat.c @@ -0,0 +1,366 @@ -+/* Native-dependent code for GNU/Linux MicroBlaze. -+ Copyright (C) 2021 Free Software Foundation, Inc. -+ -+ This file is part of GDB. -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 3 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program. If not, see . */ -+ -+#include "defs.h" -+#include "arch-utils.h" -+#include "dis-asm.h" -+#include "frame.h" -+#include "trad-frame.h" -+#include "symtab.h" -+#include "value.h" -+#include "gdbcmd.h" -+#include "breakpoint.h" -+#include "inferior.h" -+#include "gdbthread.h" -+#include "gdbcore.h" -+#include "regcache.h" -+#include "regset.h" -+#include "target.h" -+#include "frame.h" -+#include "frame-base.h" -+#include "frame-unwind.h" -+#include "osabi.h" -+#include "gdbsupport/gdb_assert.h" -+#include -+#include "target-descriptions.h" -+#include "opcodes/microblaze-opcm.h" -+#include "opcodes/microblaze-dis.h" -+#include "gregset.h" -+ -+#include "linux-nat.h" -+#include "linux-tdep.h" -+#include "target-descriptions.h" -+ -+#include -+#include -+#include -+#include "gdbsupport/gdb_wait.h" -+#include -+#include -+#include "nat/gdb_ptrace.h" -+#include "nat/linux-ptrace.h" -+#include "inf-ptrace.h" -+#include -+#include -+#include -+#include -+ -+/* Prototypes for supply_gregset etc. */ -+#include "gregset.h" -+ -+#include "microblaze-tdep.h" -+#include "microblaze-linux-tdep.h" -+#include "inferior.h" -+ -+#include "elf/common.h" -+ -+#include "auxv.h" -+#include "linux-tdep.h" -+ -+#include -+ -+ -+//int have_ptrace_getsetregs=1; -+ -+/* MicroBlaze Linux native additions to the default linux support. */ -+ -+class microblaze_linux_nat_target final : public linux_nat_target -+{ -+public: -+ /* Add our register access methods. */ -+ void fetch_registers (struct regcache *regcache, int regnum) override; -+ void store_registers (struct regcache *regcache, int regnum) override; -+ -+ /* Read suitable target description. */ -+ const struct target_desc *read_description () override; -+}; -+ -+static microblaze_linux_nat_target the_microblaze_linux_nat_target; -+ -+static int -+microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) -+{ -+ int u_addr = -1; -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace -+ * interface, and not the wordsize of the program's ABI. */ -+ int wordsize = sizeof (long); -+ -+ /* General purpose registers occupy 1 slot each in the buffer. */ -+ if (regno >= MICROBLAZE_R0_REGNUM -+ && regno <= MICROBLAZE_FSR_REGNUM) -+ u_addr = ((regno - MICROBLAZE_R0_REGNUM)* wordsize); -+ -+ return u_addr; -+} -+ -+/* Copy general purpose register REGNUM (or all gp regs if REGNUM == -1) -+ from regset GREGS into REGCACHE. */ -+ -+static void -+supply_gregset_regnum (struct regcache *regcache, const prgregset_t *gregs, -+ int regnum) -+{ -+ int i; -+ const elf_greg_t *regp = *gregs; -+ /* Access all registers */ -+ if (regnum == -1) -+ { -+ /* We fill the general purpose registers. */ -+ for (i = MICROBLAZE_R0_REGNUM + 1; i < MICROBLAZE_FSR_REGNUM; i++) -+ regcache->raw_supply (i, regp + i); -+ -+ /* Supply MICROBLAZE_PC_REGNUM from index 32. */ -+ regcache->raw_supply (MICROBLAZE_PC_REGNUM, regp + 32); -+ -+ /* Fill the inaccessible zero register with zero. */ -+ regcache->raw_supply_zeroed (0); -+ } -+ else if (regnum == MICROBLAZE_R0_REGNUM) -+ regcache->raw_supply_zeroed (0); -+ else if (regnum == MICROBLAZE_PC_REGNUM) -+ regcache->raw_supply (MICROBLAZE_PC_REGNUM, regp + 32); -+ else if (regnum > MICROBLAZE_R0_REGNUM && regnum < MICROBLAZE_FSR_REGNUM) -+ regcache->raw_supply (regnum, regp + regnum); -+} -+ -+/* Copy all general purpose registers from regset GREGS into REGCACHE. */ -+ -+void -+supply_gregset (struct regcache *regcache, const prgregset_t *gregs) -+{ -+ supply_gregset_regnum (regcache, gregs, -1); -+} -+ -+/* Copy general purpose register REGNUM (or all gp regs if REGNUM == -1) -+ from REGCACHE into regset GREGS. */ -+ -+void -+fill_gregset (const struct regcache *regcache, prgregset_t *gregs, int regnum) -+{ -+ elf_greg_t *regp = *gregs; -+ if (regnum == -1) -+ { -+ /* We fill the general purpose registers. */ -+ for (int i = MICROBLAZE_R0_REGNUM + 1; i < MICROBLAZE_FSR_REGNUM; i++) -+ regcache->raw_collect (i, regp + i); -+ -+ regcache->raw_collect (MICROBLAZE_PC_REGNUM, regp + 32); -+ } -+ else if (regnum == MICROBLAZE_R0_REGNUM) -+ /* Nothing to do here. */ -+ ; -+ else if (regnum > MICROBLAZE_R0_REGNUM && regnum < MICROBLAZE_FSR_REGNUM) -+ regcache->raw_collect (regnum, regp + regnum); -+ else if (regnum == MICROBLAZE_PC_REGNUM) -+ regcache->raw_collect (MICROBLAZE_PC_REGNUM, regp + 32); -+} -+ -+/* Transfering floating-point registers between GDB, inferiors and cores. -+ Since MicroBlaze floating-point registers are the same as GPRs these do -+ nothing. */ -+ -+void -+supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregs) -+{ -+} -+ -+void -+fill_fpregset (const struct regcache *regcache, -+ gdb_fpregset_t *fpregs, int regno) -+{ -+} -+ -+ -+static void -+fetch_register (struct regcache *regcache, int tid, int regno) -+{ -+ struct gdbarch *gdbarch = regcache->arch (); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ /* This isn't really an address. But ptrace thinks of it as one. */ -+ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); -+ int bytes_transferred; -+ char buf[MICROBLAZE_MAX_REGISTER_SIZE]; -+ -+ if (regaddr == -1) -+ { -+ memset (buf, '\0', register_size (gdbarch, regno)); /* Supply zeroes */ -+ regcache->raw_supply (regno, buf); -+ return; -+ } -+ -+ /* Read the raw register using sizeof(long) sized chunks. On a -+ * 32-bit platform, 64-bit floating-point registers will require two -+ * transfers. */ -+ for (bytes_transferred = 0; -+ bytes_transferred < register_size (gdbarch, regno); -+ bytes_transferred += sizeof (long)) -+ { -+ long l; -+ -+ errno = 0; -+ l = ptrace (PTRACE_PEEKUSER, tid, (PTRACE_TYPE_ARG3) regaddr, 0); -+ if (errno == EIO) -+ { -+ printf("ptrace io error\n"); -+ } -+ regaddr += sizeof (long); -+ if (errno != 0) -+ { -+ char message[128]; -+ sprintf (message, "reading register %s (#%d)", -+ gdbarch_register_name (gdbarch, regno), regno); -+ perror_with_name (message); -+ } -+ memcpy (&buf[bytes_transferred], &l, sizeof (l)); -+ } -+ -+ /* Now supply the register. Keep in mind that the regcache's idea -+ * of the register's size may not be a multiple of sizeof -+ * (long). */ -+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) -+ { -+ /* Little-endian values are always found at the left end of the -+ * bytes transferred. */ -+ regcache->raw_supply (regno, buf); -+ } -+ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) -+ { -+ /* Big-endian values are found at the right end of the bytes -+ * transferred. */ -+ size_t padding = (bytes_transferred - register_size (gdbarch, regno)); -+ regcache->raw_supply (regno, buf + padding); -+ } -+ else -+ internal_error (__FILE__, __LINE__, -+ _("fetch_register: unexpected byte order: %d"), -+ gdbarch_byte_order (gdbarch)); -+} -+ -+ -+/* This is a wrapper for the fetch_all_gp_regs function. It is -+ * responsible for verifying if this target has the ptrace request -+ * that can be used to fetch all general-purpose registers at one -+ * shot. If it doesn't, then we should fetch them using the -+ * old-fashioned way, which is to iterate over the registers and -+ * request them one by one. */ -+static void -+fetch_gp_regs (struct regcache *regcache, int tid) -+{ -+ int i; -+/* If we've hit this point, it doesn't really matter which -+ architecture we are using. We just need to read the -+ registers in the "old-fashioned way". */ -+ for (i = MICROBLAZE_R0_REGNUM; i <= MICROBLAZE_FSR_REGNUM; i++) -+ fetch_register (regcache, tid, i); -+} -+ -+/* Return a target description for the current target. */ -+ -+const struct target_desc * -+microblaze_linux_nat_target::read_description () -+{ -+ return tdesc_microblaze_linux; -+} -+ -+/* Fetch REGNUM (or all registers if REGNUM == -1) from the target -+ into REGCACHE using PTRACE_GETREGSET. */ -+ -+void -+microblaze_linux_nat_target::fetch_registers (struct regcache * regcache, -+ int regno) -+{ -+ /* Get the thread id for the ptrace call. */ -+ int tid = regcache->ptid ().lwp (); -+//int tid = get_ptrace_pid (regcache->ptid()); -+#if 1 -+ if (regno == -1) -+#endif -+ fetch_gp_regs (regcache, tid); -+#if 1 -+ else -+ fetch_register (regcache, tid, regno); -+#endif -+} -+ -+ -+/* Store REGNUM (or all registers if REGNUM == -1) to the target -+ from REGCACHE using PTRACE_SETREGSET. */ -+ -+void -+microblaze_linux_nat_target::store_registers (struct regcache *regcache, int regno) -+{ -+ int tid; -+ -+ tid = get_ptrace_pid (regcache->ptid ()); -+ -+ struct gdbarch *gdbarch = regcache->arch (); -+ /* This isn't really an address. But ptrace thinks of it as one. */ -+ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); -+ int i; -+ size_t bytes_to_transfer; -+ char buf[MICROBLAZE_MAX_REGISTER_SIZE]; -+ -+ if (regaddr == -1) -+ return; -+ -+ /* First collect the register. Keep in mind that the regcache's -+ * idea of the register's size may not be a multiple of sizeof -+ * (long). */ -+ memset (buf, 0, sizeof buf); -+ bytes_to_transfer = align_up (register_size (gdbarch, regno), sizeof (long)); -+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) -+ { -+ /* Little-endian values always sit at the left end of the buffer. */ -+ regcache->raw_collect (regno, buf); -+ } -+ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) -+ { -+ /* Big-endian values sit at the right end of the buffer. */ -+ size_t padding = (bytes_to_transfer - register_size (gdbarch, regno)); -+ regcache->raw_collect (regno, buf + padding); -+ } -+ -+ for (i = 0; i < bytes_to_transfer; i += sizeof (long)) -+ { -+ long l; -+ -+ memcpy (&l, &buf[i], sizeof (l)); -+ errno = 0; -+ ptrace (PTRACE_POKEUSER, tid, (PTRACE_TYPE_ARG3) regaddr, l); -+ regaddr += sizeof (long); -+ -+ if (errno != 0) -+ { -+ char message[128]; -+ sprintf (message, "writing register %s (#%d)", -+ gdbarch_register_name (gdbarch, regno), regno); -+ perror_with_name (message); -+ } -+ } -+} -+ -+void _initialize_microblaze_linux_nat (void); -+ -+void -+_initialize_microblaze_linux_nat (void) -+{ -+ /* Register the target. */ -+ linux_target = &the_microblaze_linux_nat_target; -+ add_inf_child_target (linux_target); -+} ++/* Native-dependent code for GNU/Linux MicroBlaze. ++ Copyright (C) 2021 Free Software Foundation, Inc. ++ ++ This file is part of GDB. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program. If not, see . */ ++ ++#include "defs.h" ++#include "arch-utils.h" ++#include "dis-asm.h" ++#include "frame.h" ++#include "trad-frame.h" ++#include "symtab.h" ++#include "value.h" ++#include "gdbcmd.h" ++#include "breakpoint.h" ++#include "inferior.h" ++#include "gdbthread.h" ++#include "gdbcore.h" ++#include "regcache.h" ++#include "regset.h" ++#include "target.h" ++#include "frame.h" ++#include "frame-base.h" ++#include "frame-unwind.h" ++#include "osabi.h" ++#include "gdbsupport/gdb_assert.h" ++#include ++#include "target-descriptions.h" ++#include "opcodes/microblaze-opcm.h" ++#include "opcodes/microblaze-dis.h" ++#include "gregset.h" ++ ++#include "linux-nat.h" ++#include "linux-tdep.h" ++#include "target-descriptions.h" ++ ++#include ++#include ++#include ++#include "gdbsupport/gdb_wait.h" ++#include ++#include ++#include "nat/gdb_ptrace.h" ++#include "nat/linux-ptrace.h" ++#include "inf-ptrace.h" ++#include ++#include ++#include ++#include ++ ++/* Prototypes for supply_gregset etc. */ ++#include "gregset.h" ++ ++#include "microblaze-tdep.h" ++#include "microblaze-linux-tdep.h" ++#include "inferior.h" ++ ++#include "elf/common.h" ++ ++#include "auxv.h" ++#include "linux-tdep.h" ++ ++#include ++ ++ ++//int have_ptrace_getsetregs=1; ++ ++/* MicroBlaze Linux native additions to the default linux support. */ ++ ++class microblaze_linux_nat_target final : public linux_nat_target ++{ ++public: ++ /* Add our register access methods. */ ++ void fetch_registers (struct regcache *regcache, int regnum) override; ++ void store_registers (struct regcache *regcache, int regnum) override; ++ ++ /* Read suitable target description. */ ++ const struct target_desc *read_description () override; ++}; ++ ++static microblaze_linux_nat_target the_microblaze_linux_nat_target; ++ ++static int ++microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) ++{ ++ int u_addr = -1; ++ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); ++ /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace ++ * interface, and not the wordsize of the program's ABI. */ ++ int wordsize = sizeof (long); ++ ++ /* General purpose registers occupy 1 slot each in the buffer. */ ++ if (regno >= MICROBLAZE_R0_REGNUM ++ && regno <= MICROBLAZE_FSR_REGNUM) ++ u_addr = ((regno - MICROBLAZE_R0_REGNUM)* wordsize); ++ ++ return u_addr; ++} ++ ++/* Copy general purpose register REGNUM (or all gp regs if REGNUM == -1) ++ from regset GREGS into REGCACHE. */ ++ ++static void ++supply_gregset_regnum (struct regcache *regcache, const prgregset_t *gregs, ++ int regnum) ++{ ++ int i; ++ const elf_greg_t *regp = *gregs; ++ /* Access all registers */ ++ if (regnum == -1) ++ { ++ /* We fill the general purpose registers. */ ++ for (i = MICROBLAZE_R0_REGNUM + 1; i < MICROBLAZE_FSR_REGNUM; i++) ++ regcache->raw_supply (i, regp + i); ++ ++ /* Supply MICROBLAZE_PC_REGNUM from index 32. */ ++ regcache->raw_supply (MICROBLAZE_PC_REGNUM, regp + 32); ++ ++ /* Fill the inaccessible zero register with zero. */ ++ regcache->raw_supply_zeroed (0); ++ } ++ else if (regnum == MICROBLAZE_R0_REGNUM) ++ regcache->raw_supply_zeroed (0); ++ else if (regnum == MICROBLAZE_PC_REGNUM) ++ regcache->raw_supply (MICROBLAZE_PC_REGNUM, regp + 32); ++ else if (regnum > MICROBLAZE_R0_REGNUM && regnum < MICROBLAZE_FSR_REGNUM) ++ regcache->raw_supply (regnum, regp + regnum); ++} ++ ++/* Copy all general purpose registers from regset GREGS into REGCACHE. */ ++ ++void ++supply_gregset (struct regcache *regcache, const prgregset_t *gregs) ++{ ++ supply_gregset_regnum (regcache, gregs, -1); ++} ++ ++/* Copy general purpose register REGNUM (or all gp regs if REGNUM == -1) ++ from REGCACHE into regset GREGS. */ ++ ++void ++fill_gregset (const struct regcache *regcache, prgregset_t *gregs, int regnum) ++{ ++ elf_greg_t *regp = *gregs; ++ if (regnum == -1) ++ { ++ /* We fill the general purpose registers. */ ++ for (int i = MICROBLAZE_R0_REGNUM + 1; i < MICROBLAZE_FSR_REGNUM; i++) ++ regcache->raw_collect (i, regp + i); ++ ++ regcache->raw_collect (MICROBLAZE_PC_REGNUM, regp + 32); ++ } ++ else if (regnum == MICROBLAZE_R0_REGNUM) ++ /* Nothing to do here. */ ++ ; ++ else if (regnum > MICROBLAZE_R0_REGNUM && regnum < MICROBLAZE_FSR_REGNUM) ++ regcache->raw_collect (regnum, regp + regnum); ++ else if (regnum == MICROBLAZE_PC_REGNUM) ++ regcache->raw_collect (MICROBLAZE_PC_REGNUM, regp + 32); ++} ++ ++/* Transfering floating-point registers between GDB, inferiors and cores. ++ Since MicroBlaze floating-point registers are the same as GPRs these do ++ nothing. */ ++ ++void ++supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregs) ++{ ++} ++ ++void ++fill_fpregset (const struct regcache *regcache, ++ gdb_fpregset_t *fpregs, int regno) ++{ ++} ++ ++ ++static void ++fetch_register (struct regcache *regcache, int tid, int regno) ++{ ++ struct gdbarch *gdbarch = regcache->arch (); ++ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); ++ /* This isn't really an address. But ptrace thinks of it as one. */ ++ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); ++ int bytes_transferred; ++ char buf[MICROBLAZE_MAX_REGISTER_SIZE]; ++ ++ if (regaddr == -1) ++ { ++ memset (buf, '\0', register_size (gdbarch, regno)); /* Supply zeroes */ ++ regcache->raw_supply (regno, buf); ++ return; ++ } ++ ++ /* Read the raw register using sizeof(long) sized chunks. On a ++ * 32-bit platform, 64-bit floating-point registers will require two ++ * transfers. */ ++ for (bytes_transferred = 0; ++ bytes_transferred < register_size (gdbarch, regno); ++ bytes_transferred += sizeof (long)) ++ { ++ long l; ++ ++ errno = 0; ++ l = ptrace (PTRACE_PEEKUSER, tid, (PTRACE_TYPE_ARG3) regaddr, 0); ++ if (errno == EIO) ++ { ++ printf("ptrace io error\n"); ++ } ++ regaddr += sizeof (long); ++ if (errno != 0) ++ { ++ char message[128]; ++ sprintf (message, "reading register %s (#%d)", ++ gdbarch_register_name (gdbarch, regno), regno); ++ perror_with_name (message); ++ } ++ memcpy (&buf[bytes_transferred], &l, sizeof (l)); ++ } ++ ++ /* Now supply the register. Keep in mind that the regcache's idea ++ * of the register's size may not be a multiple of sizeof ++ * (long). */ ++ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) ++ { ++ /* Little-endian values are always found at the left end of the ++ * bytes transferred. */ ++ regcache->raw_supply (regno, buf); ++ } ++ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) ++ { ++ /* Big-endian values are found at the right end of the bytes ++ * transferred. */ ++ size_t padding = (bytes_transferred - register_size (gdbarch, regno)); ++ regcache->raw_supply (regno, buf + padding); ++ } ++ else ++ internal_error (__FILE__, __LINE__, ++ _("fetch_register: unexpected byte order: %d"), ++ gdbarch_byte_order (gdbarch)); ++} ++ ++ ++/* This is a wrapper for the fetch_all_gp_regs function. It is ++ * responsible for verifying if this target has the ptrace request ++ * that can be used to fetch all general-purpose registers at one ++ * shot. If it doesn't, then we should fetch them using the ++ * old-fashioned way, which is to iterate over the registers and ++ * request them one by one. */ ++static void ++fetch_gp_regs (struct regcache *regcache, int tid) ++{ ++ int i; ++/* If we've hit this point, it doesn't really matter which ++ architecture we are using. We just need to read the ++ registers in the "old-fashioned way". */ ++ for (i = MICROBLAZE_R0_REGNUM; i <= MICROBLAZE_FSR_REGNUM; i++) ++ fetch_register (regcache, tid, i); ++} ++ ++/* Return a target description for the current target. */ ++ ++const struct target_desc * ++microblaze_linux_nat_target::read_description () ++{ ++ return tdesc_microblaze_linux; ++} ++ ++/* Fetch REGNUM (or all registers if REGNUM == -1) from the target ++ into REGCACHE using PTRACE_GETREGSET. */ ++ ++void ++microblaze_linux_nat_target::fetch_registers (struct regcache * regcache, ++ int regno) ++{ ++ /* Get the thread id for the ptrace call. */ ++ int tid = regcache->ptid ().lwp (); ++//int tid = get_ptrace_pid (regcache->ptid()); ++#if 1 ++ if (regno == -1) ++#endif ++ fetch_gp_regs (regcache, tid); ++#if 1 ++ else ++ fetch_register (regcache, tid, regno); ++#endif ++} ++ ++ ++/* Store REGNUM (or all registers if REGNUM == -1) to the target ++ from REGCACHE using PTRACE_SETREGSET. */ ++ ++void ++microblaze_linux_nat_target::store_registers (struct regcache *regcache, int regno) ++{ ++ int tid; ++ ++ tid = get_ptrace_pid (regcache->ptid ()); ++ ++ struct gdbarch *gdbarch = regcache->arch (); ++ /* This isn't really an address. But ptrace thinks of it as one. */ ++ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); ++ int i; ++ size_t bytes_to_transfer; ++ char buf[MICROBLAZE_MAX_REGISTER_SIZE]; ++ ++ if (regaddr == -1) ++ return; ++ ++ /* First collect the register. Keep in mind that the regcache's ++ * idea of the register's size may not be a multiple of sizeof ++ * (long). */ ++ memset (buf, 0, sizeof buf); ++ bytes_to_transfer = align_up (register_size (gdbarch, regno), sizeof (long)); ++ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) ++ { ++ /* Little-endian values always sit at the left end of the buffer. */ ++ regcache->raw_collect (regno, buf); ++ } ++ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) ++ { ++ /* Big-endian values sit at the right end of the buffer. */ ++ size_t padding = (bytes_to_transfer - register_size (gdbarch, regno)); ++ regcache->raw_collect (regno, buf + padding); ++ } ++ ++ for (i = 0; i < bytes_to_transfer; i += sizeof (long)) ++ { ++ long l; ++ ++ memcpy (&l, &buf[i], sizeof (l)); ++ errno = 0; ++ ptrace (PTRACE_POKEUSER, tid, (PTRACE_TYPE_ARG3) regaddr, l); ++ regaddr += sizeof (long); ++ ++ if (errno != 0) ++ { ++ char message[128]; ++ sprintf (message, "writing register %s (#%d)", ++ gdbarch_register_name (gdbarch, regno), regno); ++ perror_with_name (message); ++ } ++ } ++} ++ ++void _initialize_microblaze_linux_nat (void); ++ ++void ++_initialize_microblaze_linux_nat (void) ++{ ++ /* Register the target. */ ++ linux_target = &the_microblaze_linux_nat_target; ++ add_inf_child_target (linux_target); ++} diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c -index d6197c49dfd..fc52adffb72 100644 +index eef09bacec0..d086debc4f8 100644 --- a/gdb/microblaze-linux-tdep.c +++ b/gdb/microblaze-linux-tdep.c @@ -37,6 +37,7 @@ @@ -563,7 +561,7 @@ index 00000000000..a2c744e2961 + +#endif /* MICROBLAZE_LINUX_TDEP_H */ diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index ccd37d085d6..ccb6b730d64 100644 +index 7c98331f8a9..b0b4c1b2614 100644 --- a/gdb/microblaze-tdep.c +++ b/gdb/microblaze-tdep.c @@ -285,6 +285,7 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, @@ -595,7 +593,7 @@ index ccd37d085d6..ccb6b730d64 100644 if (ostart_pc > start_pc) return ostart_pc; return start_pc; -@@ -453,6 +456,7 @@ microblaze_frame_cache (struct frame_info *next_frame, void **this_cache) +@@ -453,6 +456,7 @@ microblaze_frame_cache (frame_info_ptr next_frame, void **this_cache) struct microblaze_frame_cache *cache; struct gdbarch *gdbarch = get_frame_arch (next_frame); int rn; @@ -603,7 +601,7 @@ index ccd37d085d6..ccb6b730d64 100644 if (*this_cache) return (struct microblaze_frame_cache *) *this_cache; -@@ -466,10 +470,17 @@ microblaze_frame_cache (struct frame_info *next_frame, void **this_cache) +@@ -466,10 +470,17 @@ microblaze_frame_cache (frame_info_ptr next_frame, void **this_cache) cache->register_offsets[rn] = -1; /* Call for side effects. */ @@ -625,7 +623,7 @@ index ccd37d085d6..ccb6b730d64 100644 return cache; } -@@ -494,6 +505,25 @@ microblaze_frame_prev_register (struct frame_info *this_frame, +@@ -494,6 +505,25 @@ microblaze_frame_prev_register (frame_info_ptr this_frame, struct microblaze_frame_cache *cache = microblaze_frame_cache (this_frame, this_cache); @@ -651,7 +649,7 @@ index ccd37d085d6..ccb6b730d64 100644 if (cache->frameless_p) { if (regnum == MICROBLAZE_PC_REGNUM) -@@ -506,7 +536,9 @@ microblaze_frame_prev_register (struct frame_info *this_frame, +@@ -506,7 +536,9 @@ microblaze_frame_prev_register (frame_info_ptr this_frame, else return trad_frame_get_prev_register (this_frame, cache->saved_regs, regnum); @@ -662,8 +660,8 @@ index ccd37d085d6..ccb6b730d64 100644 } static const struct frame_unwind microblaze_frame_unwind = -@@ -622,7 +654,106 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type) - return (TYPE_LENGTH (type) == 16); +@@ -621,7 +653,106 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type) + return (type->length () == 16); } - @@ -770,7 +768,7 @@ index ccd37d085d6..ccb6b730d64 100644 static int dwarf2_to_reg_map[78] = { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */ 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */ -@@ -790,6 +921,8 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -788,6 +919,8 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) microblaze_breakpoint::bp_from_kind); set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); @@ -780,7 +778,7 @@ index ccd37d085d6..ccb6b730d64 100644 set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc); diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h -index 2e853d84d72..2415acfe7b6 100644 +index 07a160a463c..c4c8098308f 100644 --- a/gdb/microblaze-tdep.h +++ b/gdb/microblaze-tdep.h @@ -60,11 +60,11 @@ enum microblaze_regnum @@ -832,5 +830,5 @@ index 2e853d84d72..2415acfe7b6 100644 int frameless_p; -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0006-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0006-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch new file mode 100644 index 000000000..a61c17d9c --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0006-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch @@ -0,0 +1,1841 @@ +From ff4596845becf48fa17f06ea30a59658e9722e06 Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Thu, 31 Jan 2019 14:36:00 +0530 +Subject: [PATCH 06/53] Adding 64 bit MB support Added new architecture to + Microblaze 64-bit support to GDB Signed-off-by :Nagaraju Mekala + Signed-off-by :Mahesh Bodapati + +Conflicts: + gdb/Makefile.in + +Conflicts: + bfd/cpu-microblaze.c + gdb/microblaze-tdep.c + ld/Makefile.am + ld/Makefile.in + opcodes/microblaze-dis.c + +Conflicts: + bfd/configure + gas/config/tc-microblaze.c + ld/Makefile.in + opcodes/microblaze-opcm.h + +Conflicts: + gdb/microblaze-tdep.c + +Conflicts: + bfd/elf32-microblaze.c + gas/config/tc-microblaze.c + gdb/features/Makefile + gdb/features/microblaze-with-stack-protect.c + gdb/microblaze-tdep.c + gdb/regformats/microblaze-with-stack-protect.dat + gdbserver/linux-microblaze-low.c + include/elf/common.h + +Signed-off-by: Aayush Misra +--- + bfd/Makefile.am | 2 + + bfd/Makefile.in | 3 + + bfd/archures.c | 2 + + bfd/bfd-in2.h | 41 ++++- + bfd/config.bfd | 4 + + bfd/configure | 2 + + bfd/cpu-microblaze.c | 55 +++++- + bfd/elf32-microblaze.c | 133 ++++++++++++-- + bfd/libbfd.h | 2 + + bfd/reloc.c | 20 +++ + bfd/targets.c | 6 + + gdb/features/Makefile | 2 + + gdb/features/microblaze-core.xml | 6 +- + gdb/features/microblaze-stack-protect.xml | 4 +- + gdb/features/microblaze-with-stack-protect.c | 8 +- + gdb/features/microblaze.c | 6 +- + gdb/features/microblaze64-core.xml | 69 ++++++++ + gdb/features/microblaze64-stack-protect.xml | 12 ++ + .../microblaze64-with-stack-protect.c | 79 +++++++++ + .../microblaze64-with-stack-protect.xml | 12 ++ + gdb/features/microblaze64.c | 77 +++++++++ + gdb/features/microblaze64.xml | 11 ++ + gdb/microblaze-linux-tdep.c | 36 +++- + gdb/microblaze-tdep.c | 125 ++++++++++---- + gdb/microblaze-tdep.h | 4 +- + include/elf/common.h | 1 + + include/elf/microblaze.h | 2 + + opcodes/microblaze-dis.c | 52 +++--- + opcodes/microblaze-opc.h | 162 ++++++++++++++++-- + opcodes/microblaze-opcm.h | 24 ++- + 30 files changed, 853 insertions(+), 109 deletions(-) + create mode 100644 gdb/features/microblaze64-core.xml + create mode 100644 gdb/features/microblaze64-stack-protect.xml + create mode 100644 gdb/features/microblaze64-with-stack-protect.c + create mode 100644 gdb/features/microblaze64-with-stack-protect.xml + create mode 100644 gdb/features/microblaze64.c + create mode 100644 gdb/features/microblaze64.xml + +diff --git a/bfd/Makefile.am b/bfd/Makefile.am +index 4f67b59585d..510f96439b7 100644 +--- a/bfd/Makefile.am ++++ b/bfd/Makefile.am +@@ -568,6 +568,7 @@ BFD64_BACKENDS = \ + elf64-ppc.lo \ + elf64-riscv.lo \ + elf64-s390.lo \ ++ elf64-microblaze.lo \ + elf64-sparc.lo \ + elf64-tilegx.lo \ + elf64-x86-64.lo \ +@@ -617,6 +618,7 @@ BFD64_BACKENDS_CFILES = \ + elf64-nfp.c \ + elf64-ppc.c \ + elf64-s390.c \ ++ elf64-microblaze.c \ + elf64-sparc.c \ + elf64-tilegx.c \ + elf64-x86-64.c \ +diff --git a/bfd/Makefile.in b/bfd/Makefile.in +index faaa0c424b8..71982d9f729 100644 +--- a/bfd/Makefile.in ++++ b/bfd/Makefile.in +@@ -1036,6 +1036,7 @@ BFD64_BACKENDS = \ + elf64-ppc.lo \ + elf64-riscv.lo \ + elf64-s390.lo \ ++ elf64-microblaze.lo \ + elf64-sparc.lo \ + elf64-tilegx.lo \ + elf64-x86-64.lo \ +@@ -1085,6 +1086,7 @@ BFD64_BACKENDS_CFILES = \ + elf64-nfp.c \ + elf64-ppc.c \ + elf64-s390.c \ ++ elf64-microblaze.c \ + elf64-sparc.c \ + elf64-tilegx.c \ + elf64-x86-64.c \ +@@ -1661,6 +1663,7 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@ +diff --git a/bfd/archures.c b/bfd/archures.c +index 94118b8d2cf..b9db26627ea 100644 +--- a/bfd/archures.c ++++ b/bfd/archures.c +@@ -515,6 +515,8 @@ DESCRIPTION + . bfd_arch_lm32, {* Lattice Mico32. *} + .#define bfd_mach_lm32 1 + . bfd_arch_microblaze,{* Xilinx MicroBlaze. *} ++.#define bfd_mach_microblaze 1 ++.#define bfd_mach_microblaze64 2 + . bfd_arch_kvx, {* Kalray VLIW core of the MPPA processor family *} + .#define bfd_mach_kv3_unknown 0 + .#define bfd_mach_kv3_1 1 +diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h +index 581d8fe0b3e..7ccc155394d 100644 +--- a/bfd/bfd-in2.h ++++ b/bfd/bfd-in2.h +@@ -1771,6 +1771,8 @@ enum bfd_architecture + bfd_arch_lm32, /* Lattice Mico32. */ + #define bfd_mach_lm32 1 + bfd_arch_microblaze,/* Xilinx MicroBlaze. */ ++#define bfd_mach_microblaze 1 ++#define bfd_mach_microblaze64 2 + bfd_arch_kvx, /* Kalray VLIW core of the MPPA processor family */ + #define bfd_mach_kv3_unknown 0 + #define bfd_mach_kv3_1 1 +@@ -6444,23 +6446,44 @@ enum bfd_reloc_code_real + the form "Symbol Op Symbol". */ + BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, + +- /* This is a 32 bit reloc that stores the 32 bit pc relative value in +- two words (with an imm instruction). No relocation is done here - +- only used for relaxing. */ ++/* This is a 32 bit reloc that stores the 32 bit pc relative ++value in two words (with an imm instruction). No relocation is ++done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_32_NONE, + +- /* This is a 64 bit reloc that stores the 32 bit pc relative value in +- two words (with an imm instruction). No relocation is done here - +- only used for relaxing. */ +- BFD_RELOC_MICROBLAZE_64_NONE, ++/* This is a 64 bit reloc that stores the 32 bit pc relative ++ * +value in two words (with an imml instruction). No relocation is ++ * +done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64_PCREL, ++ ++/* This is a 64 bit reloc that stores the 32 bit relative ++ * +value in two words (with an imml instruction). No relocation is ++ * +done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64, ++ ++/* This is a 64 bit reloc that stores the 32 bit relative ++ * +value in two words (with an imml instruction). No relocation is ++ * +done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_EA64, ++ ++/* This is a 64 bit reloc that stores the 32 bit pc relative ++ * +value in two words (with an imm instruction). No relocation is ++ * +done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64_NONE, + + /* This is a 64 bit reloc that stores the 32 bit pc relative value in + two words (with an imm instruction). The relocation is PC-relative + GOT offset. */ + BFD_RELOC_MICROBLAZE_64_GOTPC, + +- /* This is a 64 bit reloc that stores the 32 bit pc relative value in +- two words (with an imm instruction). The relocation is GOT offset. */ ++/* This is a 64 bit reloc that stores the 32 bit pc relative ++value in two words (with an imml instruction). The relocation is ++PC-relative GOT offset */ ++ BFD_RELOC_MICROBLAZE_64_GPC, ++ ++/* This is a 64 bit reloc that stores the 32 bit pc relative ++value in two words (with an imm instruction). The relocation is ++GOT offset */ + BFD_RELOC_MICROBLAZE_64_GOT, + + /* This is a 64 bit reloc that stores the 32 bit pc relative value in +diff --git a/bfd/config.bfd b/bfd/config.bfd +index bbf12447517..cbba305354f 100644 +--- a/bfd/config.bfd ++++ b/bfd/config.bfd +@@ -884,11 +884,15 @@ case "${targ}" in + microblazeel*-*) + targ_defvec=microblaze_elf32_le_vec + targ_selvecs=microblaze_elf32_vec ++ targ64_selvecs=microblaze_elf64_vec ++ targ64_selvecs=microblaze_elf64_le_vec + ;; + + microblaze*-*) + targ_defvec=microblaze_elf32_vec + targ_selvecs=microblaze_elf32_le_vec ++ targ64_selvecs=microblaze_elf64_vec ++ targ64_selvecs=microblaze_elf64_le_vec + ;; + + #ifdef BFD64 +diff --git a/bfd/configure b/bfd/configure +index 5618c5d3217..3c5b58c33b4 100755 +--- a/bfd/configure ++++ b/bfd/configure +@@ -16016,6 +16016,8 @@ do + rx_elf32_linux_le_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; + s390_elf32_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;; + s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; ++ microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; ++ microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; + score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; + score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; + sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; +diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c +index a7af3a17237..caf4fb66826 100644 +--- a/bfd/cpu-microblaze.c ++++ b/bfd/cpu-microblaze.c +@@ -23,13 +23,30 @@ + #include "bfd.h" + #include "libbfd.h" + +-const bfd_arch_info_type bfd_microblaze_arch = ++const bfd_arch_info_type bfd_microblaze_arch[] = ++{ ++#if BFD_DEFAULT_TARGET_SIZE == 64 ++{ ++ 64, /* 32 bits in a word. */ ++ 64, /* 32 bits in an address. */ ++ 8, /* 8 bits in a byte. */ ++ bfd_arch_microblaze, /* Architecture. */ ++ bfd_mach_microblaze64, /* 64 bit Machine */ ++ "microblaze", /* Architecture name. */ ++ "MicroBlaze", /* Printable name. */ ++ 3, /* Section align power. */ ++ false, /* Is this the default architecture ? */ ++ bfd_default_compatible, /* Architecture comparison function. */ ++ bfd_default_scan, /* String to architecture conversion. */ ++ bfd_arch_default_fill, /* Default fill. */ ++ &bfd_microblaze_arch[1] /* Next in list. */ ++}, + { + 32, /* Bits in a word. */ + 32, /* Bits in an address. */ + 8, /* Bits in a byte. */ + bfd_arch_microblaze, /* Architecture number. */ +- 0, /* Machine number - 0 for now. */ ++ bfd_mach_microblaze, /* Machine number - 0 for now. */ + "microblaze", /* Architecture name. */ + "MicroBlaze", /* Printable name. */ + 3, /* Section align power. */ +@@ -39,4 +56,38 @@ const bfd_arch_info_type bfd_microblaze_arch = + bfd_arch_default_fill, /* Default fill. */ + NULL, /* Next in list. */ + 0 /* Maximum offset of a reloc from the start of an insn. */ ++} ++#else ++{ ++ 32, /* 32 bits in a word. */ ++ 32, /* 32 bits in an address. */ ++ 8, /* 8 bits in a byte. */ ++ bfd_arch_microblaze, /* Architecture. */ ++ bfd_mach_microblaze, /* 32 bit Machine */ ++ "microblaze", /* Architecture name. */ ++ "MicroBlaze", /* Printable name. */ ++ 3, /* Section align power. */ ++ true, /* Is this the default architecture ? */ ++ bfd_default_compatible, /* Architecture comparison function. */ ++ bfd_default_scan, /* String to architecture conversion. */ ++ bfd_arch_default_fill, /* Default fill. */ ++ &bfd_microblaze_arch[1] /* Next in list. */ ++}, ++{ ++ 64, /* 32 bits in a word. */ ++ 64, /* 32 bits in an address. */ ++ 8, /* 8 bits in a byte. */ ++ bfd_arch_microblaze, /* Architecture. */ ++ bfd_mach_microblaze64, /* 64 bit Machine */ ++ "microblaze", /* Architecture name. */ ++ "MicroBlaze", /* Printable name. */ ++ 3, /* Section align power. */ ++ false, /* Is this the default architecture ? */ ++ bfd_default_compatible, /* Architecture comparison function. */ ++ bfd_default_scan, /* String to architecture conversion. */ ++ bfd_arch_default_fill, /* Default fill. */ ++ NULL, /* Next in list. */ ++ 0 ++} ++#endif + }; +diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c +index 022ce365c59..7e7c4bf471d 100644 +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -114,6 +114,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = + 0x0000ffff, /* Dest Mask. */ + true), /* PC relative offset? */ + ++ HOWTO (R_MICROBLAZE_IMML_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 2, /* Size (0 = byte, 1 = short, 2 = long). */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_IMML_64", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ + /* A 64 bit relocation. Table entry not really used. */ + HOWTO (R_MICROBLAZE_64, /* Type. */ + 0, /* Rightshift. */ +@@ -279,6 +293,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = + 0x0000ffff, /* Dest Mask. */ + true), /* PC relative offset? */ + ++ /* A 64 bit GOTPC relocation. Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 2, /* Size (0 = byte, 1 = short, 2 = long). */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc, /* Special Function. */ ++ "R_MICROBLAZE_GPC_64", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ true), /* PC relative offset? */ ++ + /* A 64 bit GOT relocation. Table-entry not really used. */ + HOWTO (R_MICROBLAZE_GOT_64, /* Type. */ + 0, /* Rightshift. */ +@@ -618,9 +647,15 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, + case BFD_RELOC_VTABLE_ENTRY: + microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY; + break; ++ case BFD_RELOC_MICROBLAZE_64: ++ microblaze_reloc = R_MICROBLAZE_IMML_64; ++ break; + case BFD_RELOC_MICROBLAZE_64_GOTPC: + microblaze_reloc = R_MICROBLAZE_GOTPC_64; + break; ++ case BFD_RELOC_MICROBLAZE_64_GPC: ++ microblaze_reloc = R_MICROBLAZE_GPC_64; ++ break; + case BFD_RELOC_MICROBLAZE_64_GOT: + microblaze_reloc = R_MICROBLAZE_GOT_64; + break; +@@ -1582,7 +1617,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, + if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) + { + relocation += addend; +- if (r_type == R_MICROBLAZE_32) ++ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) + bfd_put_32 (input_bfd, relocation, contents + offset); + else + { +@@ -1987,8 +2022,7 @@ microblaze_elf_relax_section (bfd *abfd, + else + symval += irel->r_addend; + +- if ((symval & 0xffff8000) == 0 +- || (symval & 0xffff8000) == 0xffff8000) ++ if ((symval & 0xffff8000) == 0) + { + /* We can delete this instruction. */ + sdata->relax[sdata->relax_count].addr = irel->r_offset; +@@ -2052,16 +2086,45 @@ microblaze_elf_relax_section (bfd *abfd, + irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); + } + break; ++ case R_MICROBLAZE_IMML_64: ++ { ++ /* This was a PC-relative instruction that was ++ completely resolved. */ ++ int sfix, efix; ++ unsigned int val; ++ bfd_vma target_address; ++ target_address = irel->r_addend + irel->r_offset; ++ sfix = calc_fixup (irel->r_offset, 0, sec); ++ efix = calc_fixup (target_address, 0, sec); ++ ++ /* Validate the in-band val. */ ++ val = bfd_get_32 (abfd, contents + irel->r_offset); ++ if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { ++ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); ++ } ++ irel->r_addend -= (efix - sfix); ++ /* Should use HOWTO. */ ++ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, ++ irel->r_addend); ++ } ++ break; + case R_MICROBLAZE_NONE: + case R_MICROBLAZE_32_NONE: + { + /* This was a PC-relative instruction that was + completely resolved. */ + size_t sfix, efix; ++ unsigned int val; + bfd_vma target_address; + target_address = irel->r_addend + irel->r_offset; + sfix = calc_fixup (irel->r_offset, 0, sec); + efix = calc_fixup (target_address, 0, sec); ++ ++ /* Validate the in-band val. */ ++ val = bfd_get_32 (abfd, contents + irel->r_offset); ++ if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { ++ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); ++ } + irel->r_addend -= (efix - sfix); + /* Should use HOWTO. */ + microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, +@@ -2078,8 +2141,8 @@ microblaze_elf_relax_section (bfd *abfd, + sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); + efix = calc_fixup (target_address, 0, sec); + irel->r_addend -= (efix - sfix); +- microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset +- + INST_WORD_SIZE, irel->r_addend); ++ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, ++ irel->r_addend); + } + break; + } +@@ -2109,10 +2172,50 @@ microblaze_elf_relax_section (bfd *abfd, + irelscanend = irelocs + o->reloc_count; + for (irelscan = irelocs; irelscan < irelscanend; irelscan++) + { +- if ((ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) +- || (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE)) +- { +- isym = isymbuf + ELF32_R_SYM (irelscan->r_info); ++ if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) ++ { ++ unsigned int val; ++ ++ isym = isymbuf + ELF32_R_SYM (irelscan->r_info); ++ ++ /* hax: We only do the following fixup for debug location lists. */ ++ if (strcmp(".debug_loc", o->name)) ++ continue; ++ ++ /* This was a PC-relative instruction that was completely resolved. */ ++ if (ocontents == NULL) ++ { ++ if (elf_section_data (o)->this_hdr.contents != NULL) ++ ocontents = elf_section_data (o)->this_hdr.contents; ++ else ++ { ++ /* We always cache the section contents. ++ Perhaps, if info->keep_memory is FALSE, we ++ should free them, if we are permitted to. */ ++ ++ if (o->rawsize == 0) ++ o->rawsize = o->size; ++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); ++ if (ocontents == NULL) ++ goto error_return; ++ if (!bfd_get_section_contents (abfd, o, ocontents, ++ (file_ptr) 0, ++ o->rawsize)) ++ goto error_return; ++ elf_section_data (o)->this_hdr.contents = ocontents; ++ } ++ } ++ val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); ++ if (val != irelscan->r_addend) { ++ fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); ++ } ++ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); ++ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, ++ irelscan->r_addend); ++ } ++ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)// || ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64) ++ { ++ isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* Look at the reloc only if the value has been resolved. */ + if (isym->st_shndx == shndx +@@ -3510,6 +3613,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd, + return true; + } + ++ ++static bool ++elf_microblaze_object_p (bfd *abfd) ++{ ++ /* Set the right machine number for an s390 elf32 file. */ ++ return bfd_default_set_arch_mach (abfd, bfd_arch_microblaze, bfd_mach_microblaze); ++} ++ + /* Hook called by the linker routine which adds symbols from an object + file. We use it to put .comm items in .sbss, and not .bss. */ + +@@ -3580,8 +3691,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd, + #define elf_backend_finish_dynamic_symbol microblaze_elf_finish_dynamic_symbol + #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections + #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook +- +-#define elf_backend_grok_prstatus microblaze_elf_grok_prstatus +-#define elf_backend_grok_psinfo microblaze_elf_grok_psinfo ++#define elf_backend_object_p elf_microblaze_object_p + + #include "elf32-target.h" +diff --git a/bfd/libbfd.h b/bfd/libbfd.h +index ebd4f24149b..7a3e558d70a 100644 +--- a/bfd/libbfd.h ++++ b/bfd/libbfd.h +@@ -3011,6 +3011,8 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", + "BFD_RELOC_MICROBLAZE_64_GOTOFF", + "BFD_RELOC_MICROBLAZE_32_GOTOFF", + "BFD_RELOC_MICROBLAZE_COPY", ++ "BFD_RELOC_MICROBLAZE_64", ++ "BFD_RELOC_MICROBLAZE_64_PCREL", + "BFD_RELOC_MICROBLAZE_64_TLS", + "BFD_RELOC_MICROBLAZE_64_TLSGD", + "BFD_RELOC_MICROBLAZE_64_TLSLD", +diff --git a/bfd/reloc.c b/bfd/reloc.c +index e74cbd75e96..fda67e5ffda 100644 +--- a/bfd/reloc.c ++++ b/bfd/reloc.c +@@ -6665,6 +6665,12 @@ ENUMDOC + This is a 32 bit reloc that stores the 32 bit pc relative value in + two words (with an imm instruction). No relocation is done here - + only used for relaxing. ++ENUM ++ BFD_RELOC_MICROBLAZE_32_NONE ++ENUMDOC ++ This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imm instruction). No relocation is ++ done here - only used for relaxing + ENUM + BFD_RELOC_MICROBLAZE_64_NONE + ENUMDOC +@@ -7886,6 +7892,20 @@ ENUMX + ENUMDOC + Tilera TILE-Gx Relocations. + ++ This is a 64 bit reloc that stores 64-bit thread pointer relative offset ++ to two words (uses imml instruction). ++ENUM ++BFD_RELOC_MICROBLAZE_64, ++ENUMDOC ++ This is a 64 bit reloc that stores the 64 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++BFD_RELOC_MICROBLAZE_64_PCREL, ++ENUMDOC ++ This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing + ENUM + BFD_RELOC_BPF_64 + ENUMX +diff --git a/bfd/targets.c b/bfd/targets.c +index 3addf2fe373..a9a9b975c82 100644 +--- a/bfd/targets.c ++++ b/bfd/targets.c +@@ -799,6 +799,8 @@ extern const bfd_target mep_elf32_le_vec; + extern const bfd_target metag_elf32_vec; + extern const bfd_target microblaze_elf32_vec; + extern const bfd_target microblaze_elf32_le_vec; ++extern const bfd_target microblaze_elf64_vec; ++extern const bfd_target microblaze_elf64_le_vec; + extern const bfd_target mips_ecoff_be_vec; + extern const bfd_target mips_ecoff_le_vec; + extern const bfd_target mips_ecoff_bele_vec; +@@ -1167,6 +1169,10 @@ static const bfd_target * const _bfd_target_vector[] = + + &metag_elf32_vec, + ++#ifdef BFD64 ++ µblaze_elf64_vec, ++ µblaze_elf64_le_vec, ++#endif + µblaze_elf32_vec, + + &mips_ecoff_be_vec, +diff --git a/gdb/features/Makefile b/gdb/features/Makefile +index 8ac30d8cea3..690f1e94570 100644 +--- a/gdb/features/Makefile ++++ b/gdb/features/Makefile +@@ -102,7 +102,9 @@ OUTPUTS = $(patsubst %,$(outdir)/%.dat,$(WHICH)) + # to make on the command line. + XMLTOC = \ + microblaze-with-stack-protect.xml \ ++ microblaze64-with-stack-protect.xml \ + microblaze.xml \ ++ microblaze64.xml \ + mips-dsp-linux.xml \ + mips-linux.xml \ + mips64-dsp-linux.xml \ +diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml +index d1d7d538461..4d77d9d898f 100644 +--- a/gdb/features/microblaze-core.xml ++++ b/gdb/features/microblaze-core.xml +@@ -8,7 +8,7 @@ + + + +- ++ + + + +@@ -39,7 +39,7 @@ + + + +- ++ + + + +@@ -64,4 +64,6 @@ + + + ++ ++ + +diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml +index b5f68403bd5..013240ce798 100644 +--- a/gdb/features/microblaze-stack-protect.xml ++++ b/gdb/features/microblaze-stack-protect.xml +@@ -7,6 +7,6 @@ + + + +- +- ++ ++ + +diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c +index 574dc02db67..8ab9565a047 100644 +--- a/gdb/features/microblaze-with-stack-protect.c ++++ b/gdb/features/microblaze-with-stack-protect.c +@@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) + + feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "data_ptr"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); +@@ -45,7 +45,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "code_ptr"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); +@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void) + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.stack-protect"); +- tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int"); + + tdesc_microblaze_with_stack_protect = result.release (); + } +diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c +index 8f1fb0a142f..ed12e5bcfd2 100644 +--- a/gdb/features/microblaze.c ++++ b/gdb/features/microblaze.c +@@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void) + + feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "data_ptr"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); +@@ -45,7 +45,7 @@ initialize_tdesc_microblaze (void) + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "code_ptr"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); +@@ -70,6 +70,8 @@ initialize_tdesc_microblaze (void) + tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); + + tdesc_microblaze = result.release (); + } +diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml +new file mode 100644 +index 00000000000..96e99e2fb24 +--- /dev/null ++++ b/gdb/features/microblaze64-core.xml +@@ -0,0 +1,69 @@ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml +new file mode 100644 +index 00000000000..1bbf5fc3cea +--- /dev/null ++++ b/gdb/features/microblaze64-stack-protect.xml +@@ -0,0 +1,12 @@ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c +new file mode 100644 +index 00000000000..a4de4666c76 +--- /dev/null ++++ b/gdb/features/microblaze64-with-stack-protect.c +@@ -0,0 +1,79 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: ++ Original: microblaze-with-stack-protect.xml */ ++ ++#include "defs.h" ++#include "osabi.h" ++#include "target-descriptions.h" ++ ++struct target_desc *tdesc_microblaze64_with_stack_protect; ++static void ++initialize_tdesc_microblaze64_with_stack_protect (void) ++{ ++ target_desc_up result = allocate_target_description (); ++ struct tdesc_feature *feature; ++ ++ feature = tdesc_create_feature (result.get() , "org.gnu.gdb.microblaze64.core"); ++ tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rear", 34, 1, NULL, 64, "int"); ++ tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rfsr", 36, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rbtr", 37, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpvr0", 38, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr1", 39, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr2", 40, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr3", 41, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr4", 42, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr5", 43, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr6", 44, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr7", 45, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr8", 46, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpvr9", 47, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpvr10", 48, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr11", 49, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "redr", 50, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpid", 51, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rzpr", 52, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbx", 53, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); ++ ++ feature = tdesc_create_feature (result.get(), "org.gnu.gdb.microblaze64.stack-protect"); ++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); ++ ++ tdesc_microblaze64_with_stack_protect = result.release(); ++} +diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml +new file mode 100644 +index 00000000000..0e9f01611f3 +--- /dev/null ++++ b/gdb/features/microblaze64-with-stack-protect.xml +@@ -0,0 +1,12 @@ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c +new file mode 100644 +index 00000000000..8ab7a90dd95 +--- /dev/null ++++ b/gdb/features/microblaze64.c +@@ -0,0 +1,77 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: ++ Original: microblaze.xml */ ++ ++#include "defs.h" ++#include "osabi.h" ++#include "target-descriptions.h" ++ ++struct target_desc *tdesc_microblaze64; ++static void ++initialize_tdesc_microblaze64 (void) ++{ ++ target_desc_up result = allocate_target_description (); ++ struct tdesc_feature *feature; ++ ++ feature = tdesc_create_feature (result.get(), "org.gnu.gdb.microblaze64.core"); ++ tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rear", 34, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rfsr", 36, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rbtr", 37, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpvr0", 38, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr1", 39, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr2", 40, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr3", 41, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr4", 42, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr5", 43, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr6", 44, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr7", 45, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr8", 46, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpvr9", 47, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpvr10", 48, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr11", 49, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "redr", 50, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpid", 51, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rzpr", 52, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbx", 53, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); ++ ++ tdesc_microblaze64 = result.release(); ++} +diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml +new file mode 100644 +index 00000000000..515d18e65cf +--- /dev/null ++++ b/gdb/features/microblaze64.xml +@@ -0,0 +1,11 @@ ++ ++ ++ ++ ++ ++ ++ +diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c +index d086debc4f8..f34b0fa9fd4 100644 +--- a/gdb/microblaze-linux-tdep.c ++++ b/gdb/microblaze-linux-tdep.c +@@ -40,6 +40,7 @@ + #include "features/microblaze-linux.c" + + static int microblaze_debug_flag = 0; ++int MICROBLAZE_REGISTER_SIZE=4; + + static void + microblaze_debug (const char *fmt, ...) +@@ -55,6 +56,7 @@ microblaze_debug (const char *fmt, ...) + } + } + ++#if 0 + static int + microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, + struct bp_target_info *bp_tgt) +@@ -86,6 +88,8 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, + return val; + } + ++#endif ++ + static void + microblaze_linux_sigtramp_cache (frame_info_ptr next_frame, + struct trad_frame_cache *this_cache, +@@ -147,8 +151,8 @@ microblaze_linux_init_abi (struct gdbarch_info info, + + linux_init_abi (info, gdbarch, 0); + +- set_gdbarch_memory_remove_breakpoint (gdbarch, +- microblaze_linux_memory_remove_breakpoint); ++ // set_gdbarch_memory_remove_breakpoint (gdbarch, ++ // microblaze_linux_memory_remove_breakpoint); + + /* Shared library handling. */ + set_solib_svr4_fetch_link_map_offsets (gdbarch, +@@ -160,10 +164,30 @@ microblaze_linux_init_abi (struct gdbarch_info info, + + /* BFD target for core files. */ + if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) +- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); ++ { ++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze"); ++ MICROBLAZE_REGISTER_SIZE=8; ++ } ++ else ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); ++ } + else +- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); ++ { ++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel"); ++ MICROBLAZE_REGISTER_SIZE=8; ++ } ++ else ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); ++ } + ++ switch (info.bfd_arch_info->mach) ++ { ++ case bfd_mach_microblaze64: ++ set_gdbarch_ptr_bit (gdbarch, 64); ++ break; ++ } + + /* Shared library handling. */ + set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); +@@ -178,7 +202,9 @@ void _initialize_microblaze_linux_tdep (); + void + _initialize_microblaze_linux_tdep () + { +- gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, ++ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, ++ microblaze_linux_init_abi); ++ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, + microblaze_linux_init_abi); + initialize_tdesc_microblaze_linux (); + } +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index b0b4c1b2614..7cbbc8986a1 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -40,7 +40,9 @@ + #include "remote.h" + + #include "features/microblaze-with-stack-protect.c" ++#include "features/microblaze64-with-stack-protect.c" + #include "features/microblaze.c" ++#include "features/microblaze64.c" + + /* Instruction macros used for analyzing the prologue. */ + /* This set of instruction macros need to be changed whenever the +@@ -75,12 +77,13 @@ static const char * const microblaze_register_names[] = + "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6", + "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11", + "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi", +- "rslr", "rshr" ++ "slr", "shr" + }; + + #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names) + + static unsigned int microblaze_debug_flag = 0; ++int reg_size = 4; + + #define microblaze_debug(fmt, ...) \ + debug_prefixed_printf_cond_nofunc (microblaze_debug_flag, "MICROBLAZE", \ +@@ -128,6 +131,15 @@ microblaze_fetch_instruction (CORE_ADDR pc) + constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT; + + typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint; ++static CORE_ADDR ++microblaze_store_arguments (struct regcache *regcache, int nargs, ++ struct value **args, CORE_ADDR sp, ++ int struct_return, CORE_ADDR struct_addr) ++{ ++ error (_("store_arguments not implemented")); ++ return sp; ++} ++#if 0 + static int + microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, + struct bp_target_info *bp_tgt) +@@ -146,7 +158,6 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, + /* Make sure we see the memory breakpoints. */ + scoped_restore restore_memory + = make_scoped_restore_show_memory_breakpoints (1); +- + val = target_read_memory (addr, old_contents, bplen); + + /* If our breakpoint is no longer at the address, this means that the +@@ -161,6 +172,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, + return val; + } + ++#endif + /* Allocate and initialize a frame cache. */ + + static struct microblaze_frame_cache * +@@ -583,11 +595,11 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache, + { + case 1: /* return last byte in the register. */ + regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf); +- memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1); ++ memcpy(valbuf, buf + reg_size - 1, 1); + return; + case 2: /* return last 2 bytes in register. */ + regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf); +- memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2); ++ memcpy(valbuf, buf + reg_size - 2, 2); + return; + case 4: /* for sizes 4 or 8, copy the required length. */ + case 8: +@@ -753,6 +765,12 @@ microblaze_software_single_step (struct regcache *regcache) + } + #endif + ++static void ++microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc) ++{ ++ regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc); ++} ++ + static int dwarf2_to_reg_map[78] = + { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */ + 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */ +@@ -787,13 +805,14 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) + static void + microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) + { ++ + register_remote_g_packet_guess (gdbarch, + 4 * MICROBLAZE_NUM_CORE_REGS, +- tdesc_microblaze); ++ tdesc_microblaze64); + + register_remote_g_packet_guess (gdbarch, + 4 * MICROBLAZE_NUM_REGS, +- tdesc_microblaze_with_stack_protect); ++ tdesc_microblaze64_with_stack_protect); + } + + void +@@ -801,7 +820,7 @@ microblaze_supply_gregset (const struct regset *regset, + struct regcache *regcache, + int regnum, const void *gregs) + { +- const unsigned int *regs = (const unsigned int *)gregs; ++ const gdb_byte *regs = (const gdb_byte *) gregs; + if (regnum >= 0) + regcache->raw_supply (regnum, regs + regnum); + +@@ -809,7 +828,7 @@ microblaze_supply_gregset (const struct regset *regset, + int i; + + for (i = 0; i < 50; i++) { +- regcache->raw_supply (i, regs + i); ++ regcache->raw_supply (regnum, regs + i); + } + } + } +@@ -832,6 +851,17 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, + } + + ++static void ++make_regs (struct gdbarch *arch) ++{ ++ struct gdbarch_tdep *tdep = gdbarch_tdep (arch); ++ int mach = gdbarch_bfd_arch_info (arch)->mach; ++ ++ if (mach == bfd_mach_microblaze64) ++ { ++ set_gdbarch_ptr_bit (arch, 64); ++ } ++} + + static struct gdbarch * + microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -844,8 +874,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + if (arches != NULL) + return arches->gdbarch; + if (tdesc == NULL) +- tdesc = tdesc_microblaze; +- ++ { ++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ { ++ tdesc = tdesc_microblaze64; ++ reg_size = 8; ++ } ++ else ++ tdesc = tdesc_microblaze; ++ } + /* Check any target description for validity. */ + if (tdesc_has_registers (tdesc)) + { +@@ -853,31 +890,42 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + int valid_p; + int i; + +- feature = tdesc_find_feature (tdesc, +- "org.gnu.gdb.microblaze.core"); ++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ feature = tdesc_find_feature (tdesc, ++ "org.gnu.gdb.microblaze64.core"); ++ else ++ feature = tdesc_find_feature (tdesc, ++ "org.gnu.gdb.microblaze.core"); + if (feature == NULL) + return NULL; + tdesc_data = tdesc_data_alloc (); + + valid_p = 1; +- for (i = 0; i < MICROBLAZE_NUM_CORE_REGS; i++) +- valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i, +- microblaze_register_names[i]); +- feature = tdesc_find_feature (tdesc, +- "org.gnu.gdb.microblaze.stack-protect"); ++ for (i = 0; i < MICROBLAZE_NUM_REGS; i++) ++ valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), i, ++ microblaze_register_names[i]); ++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ feature = tdesc_find_feature (tdesc, ++ "org.gnu.gdb.microblaze64.stack-protect"); ++ else ++ feature = tdesc_find_feature (tdesc, ++ "org.gnu.gdb.microblaze.stack-protect"); + if (feature != NULL) +- { +- valid_p = 1; +- valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), +- MICROBLAZE_SLR_REGNUM, +- "rslr"); +- valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), +- MICROBLAZE_SHR_REGNUM, +- "rshr"); +- } ++ { ++ valid_p = 1; ++ valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), ++ MICROBLAZE_SLR_REGNUM, ++ "slr"); ++ valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), ++ MICROBLAZE_SHR_REGNUM, ++ "shr"); ++ } + + if (!valid_p) +- return NULL; ++ { ++ // tdesc_data_cleanup (tdesc_data.get ()); ++ return NULL; ++ } + } + + /* Allocate space for the new architecture. */ +@@ -897,7 +945,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + /* Register numbers of various important registers. */ + set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM); + set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM); ++ ++ /* Register set. ++ make_regs (gdbarch); */ ++ switch (info.bfd_arch_info->mach) ++ { ++ case bfd_mach_microblaze64: ++ set_gdbarch_ptr_bit (gdbarch, 64); ++ break; ++ } + ++ + /* Map Dwarf2 registers to GDB registers. */ + set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); + +@@ -917,7 +975,9 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + microblaze_breakpoint::kind_from_pc); + set_gdbarch_sw_breakpoint_from_kind (gdbarch, + microblaze_breakpoint::bp_from_kind); +- set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); ++// set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); ++ ++// set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); + + set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); + +@@ -925,7 +985,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + + set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc); + +- microblaze_register_g_packet_guesses (gdbarch); ++ //microblaze_register_g_packet_guesses (gdbarch); + + frame_base_set_default (gdbarch, µblaze_frame_base); + +@@ -940,12 +1000,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data)); + //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer); + +- /* If we have register sets, enable the generic core file support. */ ++ /* If we have register sets, enable the generic core file support. + if (tdep->gregset) { + set_gdbarch_iterate_over_regset_sections (gdbarch, + microblaze_iterate_over_regset_sections); +- } +- ++ }*/ + return gdbarch; + } + +@@ -957,6 +1016,8 @@ _initialize_microblaze_tdep () + + initialize_tdesc_microblaze_with_stack_protect (); + initialize_tdesc_microblaze (); ++ initialize_tdesc_microblaze64_with_stack_protect (); ++ initialize_tdesc_microblaze64 (); + /* Debug this files internals. */ + add_setshow_zuinteger_cmd ("microblaze", class_maintenance, + µblaze_debug_flag, _("\ +diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h +index c4c8098308f..81f7f30cb8e 100644 +--- a/gdb/microblaze-tdep.h ++++ b/gdb/microblaze-tdep.h +@@ -28,7 +28,7 @@ struct microblaze_gregset + microblaze_gregset() {} + unsigned int gregs[32]; + unsigned int fpregs[32]; +- unsigned int pregs[16]; ++ unsigned int pregs[18]; + }; + + struct microblaze_gdbarch_tdep : gdbarch_tdep_base +@@ -134,7 +134,7 @@ struct microblaze_frame_cache + struct trad_frame_saved_reg *saved_regs; + }; + /* All registers are 32 bits. */ +-#define MICROBLAZE_REGISTER_SIZE 4 ++//#define MICROBLAZE_REGISTER_SIZE 8 + + /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used. + Only used for native debugging. */ +diff --git a/include/elf/common.h b/include/elf/common.h +index 6a66456cd22..11f5d1a3cc9 100644 +--- a/include/elf/common.h ++++ b/include/elf/common.h +@@ -360,6 +360,7 @@ + #define EM_U16_U8CORE 260 /* LAPIS nX-U16/U8 */ + #define EM_TACHYUM 261 /* Tachyum */ + #define EM_56800EF 262 /* NXP 56800EF Digital Signal Controller (DSC) */ ++#define EM_MB_64 263 /* Xilinx MicroBlaze 32-bit RISC soft processor core */ + + /* If it is necessary to assign new unofficial EM_* values, please pick large + random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision +diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h +index a48b1358efd..c515f15bfb8 100644 +--- a/include/elf/microblaze.h ++++ b/include/elf/microblaze.h +@@ -62,6 +62,8 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) + RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ + RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ + RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) ++ RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34) ++ RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */ + END_RELOC_NUMBERS (R_MICROBLAZE_max) + + /* Global base address names. */ +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index 3d696325803..ee447cecc3f 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c +@@ -33,6 +33,7 @@ + #define get_field_r1(buf, instr) get_field (buf, instr, RA_MASK, RA_LOW) + #define get_field_r2(buf, instr) get_field (buf, instr, RB_MASK, RB_LOW) + #define get_int_field_imm(instr) ((instr & IMM_MASK) >> IMM_LOW) ++#define get_int_field_imml(instr) ((instr & IMML_MASK) >> IMM_LOW) + #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW) + + #define NUM_STRBUFS 4 +@@ -73,11 +74,20 @@ get_field_imm (struct string_buf *buf, long instr) + } + + static char * +-get_field_imm5 (struct string_buf *buf, long instr) ++get_field_imml (struct string_buf *buf, long instr) + { + char *p = strbuf (buf); + +- sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW)); ++ sprintf (p, "%d", (int)((instr & IMML_MASK) >> IMM_LOW)); ++ return p; ++} ++ ++static char * ++get_field_imms (struct string_buf *buf, long instr) ++{ ++ char *p = strbuf (buf); ++ ++ sprintf (p, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW)); + return p; + } + +@@ -96,12 +106,9 @@ get_field_immw (struct string_buf *buf, long instr) + char *p = strbuf (buf); + + if (instr & 0x00004000) +- sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) +- >> IMM_WIDTH_LOW))); /* bsefi */ +- else +- sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> +- IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> +- IMM_LOW) + 1)); /* bsifi */ ++ sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ ++ else ++ sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */ + return p; + } + +@@ -311,9 +318,14 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + } + } + break; +- case INST_TYPE_RD_R1_IMM5: ++ case INST_TYPE_RD_R1_IMML: ++ print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst), ++ get_field_r1(&buf, inst), get_field_imm (&buf, inst)); ++ /* TODO: Also print symbol */ ++ break; ++ case INST_TYPE_RD_R1_IMMS: + print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst), +- get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst)); ++ get_field_r1(&buf, inst), get_field_imms (&buf, inst)); + break; + case INST_TYPE_RD_RFSL: + print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), +@@ -417,9 +429,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + } + } + break; +- case INST_TYPE_RD_R2: +- print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), +- get_field_r2 (&buf, inst)); ++ case INST_TYPE_IMML: ++ print_func (stream, "\t%s", get_field_imml (&buf, inst)); ++ /* TODO: Also print symbol */ ++ break; ++ case INST_TYPE_RD_R2: ++ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst)); + break; + case INST_TYPE_R2: + print_func (stream, "\t%s", get_field_r2 (&buf, inst)); +@@ -442,15 +457,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + /* For mbar 16 or sleep insn. */ + case INST_TYPE_NONE: + break; +- /* For bit field insns. */ ++ /* For bit field insns. */ + case INST_TYPE_RD_R1_IMMW_IMMS: +- print_func (stream, "\t%s, %s, %s, %s", +- get_field_rd (&buf, inst), +- get_field_r1 (&buf, inst), +- get_field_immw (&buf, inst), +- get_field_imm5 (&buf, inst)); ++ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), ++ get_field_immw (&buf, inst), get_field_imms (&buf, inst)); + break; +- /* For tuqula instruction */ ++ /* For tuqula instruction */ + case INST_TYPE_RD: + print_func (stream, "\t%s", get_field_rd (&buf, inst)); + break; +diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h +index fe23b0af56a..afc1220e357 100644 +--- a/opcodes/microblaze-opc.h ++++ b/opcodes/microblaze-opc.h +@@ -40,7 +40,7 @@ + #define INST_TYPE_RD_SPECIAL 11 + #define INST_TYPE_R1 12 + /* New instn type for barrel shift imms. */ +-#define INST_TYPE_RD_R1_IMM5 13 ++#define INST_TYPE_RD_R1_IMMS 13 + #define INST_TYPE_RD_RFSL 14 + #define INST_TYPE_R1_RFSL 15 + +@@ -62,6 +62,11 @@ + /* For bsefi and bsifi */ + #define INST_TYPE_RD_R1_IMMW_IMMS 21 + ++/* For 64-bit instructions */ ++#define INST_TYPE_IMML 22 ++#define INST_TYPE_RD_R1_IMML 23 ++#define INST_TYPE_R1_IMML 24 ++ + #define INST_TYPE_NONE 25 + + +@@ -91,15 +96,14 @@ + #define OPCODE_MASK_H24 0xFC1F07FF /* High 6, bits 20-16 and low 11 bits. */ + #define OPCODE_MASK_H124 0xFFFF07FF /* High 16, and low 11 bits. */ + #define OPCODE_MASK_H1234 0xFFFFFFFF /* All 32 bits. */ +-#define OPCODE_MASK_H3 0xFC000600 /* High 6 bits and bits 21, 22. */ +-#define OPCODE_MASK_H3B 0xFC00F9E0 /* High 6 bits and bits 16:20 and +- bits 23:26. */ ++#define OPCODE_MASK_H3 0xFC000700 /* High 6 bits and bits 21, 22, 23. */ ++#define OPCODE_MASK_H3B 0xFC00E600 /* High 6 bits and bits 16, 17, 18, 21, 22. */ + #define OPCODE_MASK_H32 0xFC00FC00 /* High 6 bits and bit 16-21. */ +-#define OPCODE_MASK_H32B 0xFC00F820 /* High 6 bits and bits 16:20 and +- bit 26 */ ++#define OPCODE_MASK_H32B 0xFC00E000 /* High 6 bits and bit 16, 17, 18. */ + #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits. */ + #define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits. */ + #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26. */ ++#define OPCODE_MASK_H8 0xFF000000 /* High 8 bits only. */ + + /* New Mask for msrset, msrclr insns. */ + #define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */ +@@ -109,7 +113,7 @@ + #define DELAY_SLOT 1 + #define NO_DELAY_SLOT 0 + +-#define MAX_OPCODES 291 ++#define MAX_OPCODES 412 + + const struct op_code_struct + { +@@ -127,6 +131,7 @@ const struct op_code_struct + /* More info about output format here. */ + } microblaze_opcodes[MAX_OPCODES] = + { ++ /* 32-bit instructions */ + {"add", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x00000000, OPCODE_MASK_H4, add, arithmetic_inst }, + {"rsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H4, rsub, arithmetic_inst }, + {"addc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000000, OPCODE_MASK_H4, addc, arithmetic_inst }, +@@ -163,9 +168,9 @@ const struct op_code_struct + {"ncget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006000, OPCODE_MASK_H32, ncget, anyware_inst }, + {"ncput", INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00E000, OPCODE_MASK_H32, ncput, anyware_inst }, + {"muli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x60000000, OPCODE_MASK_H, muli, mult_inst }, +- {"bslli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3B, bslli, barrel_shift_inst }, +- {"bsrai", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3B, bsrai, barrel_shift_inst }, +- {"bsrli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3B, bsrli, barrel_shift_inst }, ++ {"bslli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3B, bslli, barrel_shift_inst }, ++ {"bsrai", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3B, bsrai, barrel_shift_inst }, ++ {"bsrli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3B, bsrli, barrel_shift_inst }, + {"bsefi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64004000, OPCODE_MASK_H32B, bsefi, barrel_shift_inst }, + {"bsifi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64008000, OPCODE_MASK_H32B, bsifi, barrel_shift_inst }, + {"or", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H4, microblaze_or, logical_inst }, +@@ -269,9 +274,7 @@ const struct op_code_struct + {"la", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* la translates to addik. */ + {"tuqula",INST_TYPE_RD, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3000002A, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* tuqula rd translates to addik rd, r0, 42. */ + {"not", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA800FFFF, OPCODE_MASK_H34, invalid_inst, logical_inst }, /* not translates to xori rd,ra,-1. */ +- {"neg", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0. */ + {"rtb", INST_TYPE_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6000004, OPCODE_MASK_H1, invalid_inst, return_inst }, /* rtb translates to rts rd, 4. */ +- {"sub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra. */ + {"lmi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, + {"smi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, + {"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst }, +@@ -427,7 +430,131 @@ const struct op_code_struct + {"suspend", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBB020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 24. */ + {"swapb", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4, swapb, arithmetic_inst }, + {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst }, +- {NULL, 0, 0, 0, 0, 0, 0, 0, 0}, ++ /* 64-bit instructions */ ++ {"addl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x00000100, OPCODE_MASK_H4, addl, arithmetic_inst }, ++ {"rsubl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000100, OPCODE_MASK_H4, rsubl, arithmetic_inst }, ++ {"addlc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000100, OPCODE_MASK_H4, addlc, arithmetic_inst }, ++ {"rsublc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x0C000100, OPCODE_MASK_H4, rsublc, arithmetic_inst }, ++ {"addlk", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x10000100, OPCODE_MASK_H4, addlk, arithmetic_inst }, ++ {"rsublk", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000100, OPCODE_MASK_H4, rsublk, arithmetic_inst }, ++ {"addlkc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x18000100, OPCODE_MASK_H4, addlkc, arithmetic_inst }, ++ {"rsublkc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x1C000100, OPCODE_MASK_H4, rsublkc, arithmetic_inst }, ++ {"cmpl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst }, ++ {"cmplu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst }, ++ {"addli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x20000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsubli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x24000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addlic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x28000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsublic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x2C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addlik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsublik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x34000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addlikc", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x38000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsublikc",INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"mull", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000100, OPCODE_MASK_H4, mull, mult_inst }, ++ {"bslll", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000500, OPCODE_MASK_H3, bslll, barrel_shift_inst }, ++ {"bslra", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000300, OPCODE_MASK_H3, bslra, barrel_shift_inst }, ++ {"bslrl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000100, OPCODE_MASK_H3, bslrl, barrel_shift_inst }, ++ {"bsllli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002400, OPCODE_MASK_H3B, bsllli, barrel_shift_inst }, ++ {"bslrai", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002200, OPCODE_MASK_H3B, bslrai, barrel_shift_inst }, ++ {"bslrli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002000, OPCODE_MASK_H3B, bslrli, barrel_shift_inst }, ++ {"bslefi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64006000, OPCODE_MASK_H32B, bslefi, barrel_shift_inst }, ++ {"bslifi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6400a000, OPCODE_MASK_H32B, bslifi, barrel_shift_inst }, ++ {"orl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000100, OPCODE_MASK_H4, orl, logical_inst }, ++ {"andl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000100, OPCODE_MASK_H4, andl, logical_inst }, ++ {"xorl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000100, OPCODE_MASK_H4, xorl, logical_inst }, ++ {"andnl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000100, OPCODE_MASK_H4, andnl, logical_inst }, ++ {"pcmplbf", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000500, OPCODE_MASK_H4, pcmplbf, logical_inst }, ++ {"pcmpleq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000500, OPCODE_MASK_H4, pcmpleq, logical_inst }, ++ {"pcmplne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000500, OPCODE_MASK_H4, pcmplne, logical_inst }, ++ {"srla", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000101, OPCODE_MASK_H34, srla, logical_inst }, ++ {"srlc", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000121, OPCODE_MASK_H34, srlc, logical_inst }, ++ {"srll", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000141, OPCODE_MASK_H34, srll, logical_inst }, ++ {"sextl8", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000160, OPCODE_MASK_H34, sextl8, logical_inst }, ++ {"sextl16", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000161, OPCODE_MASK_H34, sextl16, logical_inst }, ++ {"sextl32", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000162, OPCODE_MASK_H34, sextl32, logical_inst }, ++ {"brea", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98010000, OPCODE_MASK_H124, brea, branch_inst }, ++ {"bread", INST_TYPE_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98110000, OPCODE_MASK_H124, bread, branch_inst }, ++ {"breald", INST_TYPE_RD_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98150000, OPCODE_MASK_H24, breald, branch_inst }, ++ {"beaeq", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D000000, OPCODE_MASK_H14, beaeq, branch_inst }, ++ {"bealeq", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D000100, OPCODE_MASK_H14, bealeq, branch_inst }, ++ {"beaeqd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F000000, OPCODE_MASK_H14, beaeqd, branch_inst }, ++ {"bealeqd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F000100, OPCODE_MASK_H14, bealeqd, branch_inst }, ++ {"beane", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D200000, OPCODE_MASK_H14, beane, branch_inst }, ++ {"bealne", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D200100, OPCODE_MASK_H14, bealne, branch_inst }, ++ {"beaned", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F200000, OPCODE_MASK_H14, beaned, branch_inst }, ++ {"bealned", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F200100, OPCODE_MASK_H14, bealned, branch_inst }, ++ {"bealt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D400000, OPCODE_MASK_H14, bealt, branch_inst }, ++ {"beallt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D400100, OPCODE_MASK_H14, beallt, branch_inst }, ++ {"bealtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F400000, OPCODE_MASK_H14, bealtd, branch_inst }, ++ {"bealltd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F400100, OPCODE_MASK_H14, bealltd, branch_inst }, ++ {"beale", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D600000, OPCODE_MASK_H14, beale, branch_inst }, ++ {"bealle", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D600100, OPCODE_MASK_H14, bealle, branch_inst }, ++ {"bealed", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F600000, OPCODE_MASK_H14, bealed, branch_inst }, ++ {"bealled", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F600100, OPCODE_MASK_H14, bealled, branch_inst }, ++ {"beagt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D800000, OPCODE_MASK_H14, beagt, branch_inst }, ++ {"bealgt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D800100, OPCODE_MASK_H14, bealgt, branch_inst }, ++ {"beagtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F800000, OPCODE_MASK_H14, beagtd, branch_inst }, ++ {"bealgtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F800100, OPCODE_MASK_H14, bealgtd, branch_inst }, ++ {"beage", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9DA00000, OPCODE_MASK_H14, beage, branch_inst }, ++ {"bealge", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9DA00100, OPCODE_MASK_H14, bealge, branch_inst }, ++ {"beaged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00000, OPCODE_MASK_H14, beaged, branch_inst }, ++ {"bealged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00100, OPCODE_MASK_H14, bealged, branch_inst }, ++ {"orli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA0000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"andli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA4000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"xorli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA8000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"andnli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xAC000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"imml", INST_TYPE_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB2000000, OPCODE_MASK_H8, imml, immediate_inst }, ++ {"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst }, ++ {"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst }, ++ {"brealid", INST_TYPE_RD_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8150000, OPCODE_MASK_H2, brealid, branch_inst }, ++ {"beaeqi", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD000000, OPCODE_MASK_H1, beaeqi, branch_inst }, ++ {"bealeqi", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD000000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaeqi */ ++ {"beaeqid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF000000, OPCODE_MASK_H1, beaeqid, branch_inst }, ++ {"bealeqid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF000000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaeqid */ ++ {"beanei", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD200000, OPCODE_MASK_H1, beanei, branch_inst }, ++ {"bealnei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD200000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beanei */ ++ {"beaneid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF200000, OPCODE_MASK_H1, beaneid, branch_inst }, ++ {"bealneid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF200000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaneid */ ++ {"bealti", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD400000, OPCODE_MASK_H1, bealti, branch_inst }, ++ {"beallti", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD400000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealti */ ++ {"bealtid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF400000, OPCODE_MASK_H1, bealtid, branch_inst }, ++ {"bealltid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF400000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealtid */ ++ {"bealei", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD600000, OPCODE_MASK_H1, bealei, branch_inst }, ++ {"beallei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD600000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealei */ ++ {"bealeid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF600000, OPCODE_MASK_H1, bealeid, branch_inst }, ++ {"bealleid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF600000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealeid */ ++ {"beagti", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD800000, OPCODE_MASK_H1, beagti, branch_inst }, ++ {"bealgti", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD800000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagti */ ++ {"beagtid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF800000, OPCODE_MASK_H1, beagtid, branch_inst }, ++ {"bealgtid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF800000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagtid */ ++ {"beagei", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBDA00000, OPCODE_MASK_H1, beagei, branch_inst }, ++ {"bealgei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBDA00000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagei */ ++ {"beageid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBFA00000, OPCODE_MASK_H1, beageid, branch_inst }, ++ {"bealgeid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBFA00000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beageid */ ++ {"ll", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000100, OPCODE_MASK_H4, ll, memory_load_inst }, ++ {"llr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000300, OPCODE_MASK_H4, llr, memory_load_inst }, ++ {"sl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000100, OPCODE_MASK_H4, sl, memory_store_inst }, ++ {"slr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000300, OPCODE_MASK_H4, slr, memory_store_inst }, ++ {"lli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xEC000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, /* Identical to 32-bit */ ++ {"sli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xFC000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, /* Identical to 32-bit */ ++ {"lla", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* lla translates to addlik */ ++ {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst }, ++ {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst }, ++ {"dmul", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000500, OPCODE_MASK_H4, dmul, arithmetic_inst }, ++ {"ddiv", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000580, OPCODE_MASK_H4, ddiv, arithmetic_inst }, ++ {"dcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000610, OPCODE_MASK_H4, dcmp_lt, arithmetic_inst }, ++ {"dcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000620, OPCODE_MASK_H4, dcmp_eq, arithmetic_inst }, ++ {"dcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000630, OPCODE_MASK_H4, dcmp_le, arithmetic_inst }, ++ {"dcmp.gt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000640, OPCODE_MASK_H4, dcmp_gt, arithmetic_inst }, ++ {"dcmp.ne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000650, OPCODE_MASK_H4, dcmp_ne, arithmetic_inst }, ++ {"dcmp.ge", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000660, OPCODE_MASK_H4, dcmp_ge, arithmetic_inst }, ++ {"dcmp.un", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000600, OPCODE_MASK_H4, dcmp_un, arithmetic_inst }, ++ {"dbl", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000680, OPCODE_MASK_H4, dbl, arithmetic_inst }, ++ {"dlong", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000700, OPCODE_MASK_H4, dlong, arithmetic_inst }, ++ {"dsqrt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000780, OPCODE_MASK_H4, dsqrt, arithmetic_inst }, ++ {"neg", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0. */ ++ {"sub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra. */ ++ ++ {"", 0, 0, 0, 0, 0, 0, 0, 0}, + }; + + /* Prefix for register names. */ +@@ -447,8 +574,17 @@ char pvr_register_prefix[] = "rpvr"; + #define MIN_IMM5 ((int) 0x00000000) + #define MAX_IMM5 ((int) 0x0000001f) + ++#define MIN_IMM6 ((int) 0x00000000) ++#define MAX_IMM6 ((int) 0x0000003f) ++ + #define MIN_IMM_WIDTH ((int) 0x00000001) + #define MAX_IMM_WIDTH ((int) 0x00000020) + ++#define MIN_IMM6_WIDTH ((int) 0x00000001) ++#define MAX_IMM6_WIDTH ((int) 0x00000040) ++ ++#define MIN_IMML ((long) 0xffffff8000000000L) ++#define MAX_IMML ((long) 0x0000007fffffffffL) ++ + #endif /* MICROBLAZE_OPC */ + +diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h +index cb8d3a59949..08ed44352ee 100644 +--- a/opcodes/microblaze-opcm.h ++++ b/opcodes/microblaze-opcm.h +@@ -25,6 +25,7 @@ + + enum microblaze_instr + { ++ /* 32-bit instructions */ + add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, clz, cmp, cmpu, + addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, + mulh, mulhu, mulhsu, swapb, swaph, +@@ -39,8 +40,8 @@ enum microblaze_instr + imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid, + brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, + bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, +- sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, +- sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, ++ sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli, ++ sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, + fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, + /* 'fsqrt' is a glibc:math.h symbol. */ + fint, microblaze_fsqrt, +@@ -59,6 +60,18 @@ enum microblaze_instr + aputd, taputd, caputd, tcaputd, naputd, tnaputd, ncaputd, tncaputd, + eagetd, teagetd, ecagetd, tecagetd, neagetd, tneagetd, necagetd, tnecagetd, + eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd, ++ ++ /* 64-bit instructions */ ++ addl, rsubl, addlc, rsublc, addlk, rsublk, addlkc, rsublkc, cmpl, cmplu, mull, ++ bslll, bslra, bslrl, bsllli, bslrai, bslrli, bslefi, bslifi, orl, andl, xorl, ++ andnl, pcmplbf, pcmpleq, pcmplne, srla, srlc, srll, sextl8, sextl16, sextl32, ++ brea, bread, breald, beaeq, bealeq, beaeqd, bealeqd, beane, bealne, beaned, ++ bealned, bealt, beallt, bealtd, bealltd, beale, bealle, bealed, bealled, beagt, ++ bealgt, beagtd, bealgtd, beage, bealge, beaged, bealged, breai, breaid, brealid, ++ beaeqi, beaeqid, beanei, beaneid, bealti, bealtid, bealei, bealeid, beagti, ++ beagtid, beagei, beageid, imml, ll, llr, sl, slr, ++ dadd, drsub, dmul, ddiv, dcmp_lt, dcmp_eq, dcmp_le, dcmp_gt, dcmp_ne, dcmp_ge, ++ dcmp_un, dbl, dlong, dsqrt, + invalid_inst + }; + +@@ -136,15 +149,18 @@ enum microblaze_instr_type + #define RA_MASK 0x001F0000 + #define RB_MASK 0x0000F800 + #define IMM_MASK 0x0000FFFF ++#define IMML_MASK 0x00FFFFFF + +-/* Imm mask for barrel shifts. */ ++/* Imm masks for barrel shifts. */ + #define IMM5_MASK 0x0000001F ++#define IMM6_MASK 0x0000003F + + /* Imm mask for mbar. */ + #define IMM5_MBAR_MASK 0x03E00000 + +-/* Imm mask for extract/insert width. */ ++/* Imm masks for extract/insert width. */ + #define IMM5_WIDTH_MASK 0x000007C0 ++#define IMM6_WIDTH_MASK 0x00000FC0 + + /* FSL imm mask for get, put instructions. */ + #define RFSL_MASK 0x000000F +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0006-Patch-MicroBlaze-these-changes-will-make-64-bit-vect.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0007-these-changes-will-make-64-bit-vectors-as-default-ta.patch similarity index 57% rename from meta-microblaze/recipes-devtools/gdb/gdb/0006-Patch-MicroBlaze-these-changes-will-make-64-bit-vect.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0007-these-changes-will-make-64-bit-vectors-as-default-ta.patch index 9d12cc537..a744bcb41 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0006-Patch-MicroBlaze-these-changes-will-make-64-bit-vect.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0007-these-changes-will-make-64-bit-vectors-as-default-ta.patch @@ -1,23 +1,20 @@ -From ef411b49f3b2c9e4048eb273f43ab4ee96f96b7e Mon Sep 17 00:00:00 2001 +From 6c699df5c33f13ea3226d144f544d5a295edcf17 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 19 Apr 2021 14:33:27 +0530 -Subject: [PATCH 6/8] [Patch,MicroBlaze] : these changes will make 64 bit - vectors as default target types when we built gdb with microblaze 64 bit type - targets,for instance microblaze-xilinx-elf64/microblazeel-xilinx-elf64 - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 07/53] these changes will make 64 bit vectors as default + target types when we built gdb with microblaze 64 bit type targets,for + instance microblaze-xilinx-elf64/microblazeel-xilinx-elf64 +Signed-off-by: Aayush Misra --- bfd/config.bfd | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/bfd/config.bfd b/bfd/config.bfd -index 5e9ba3d9805..deb3d078439 100644 +index cbba305354f..f7134608693 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd -@@ -856,7 +856,15 @@ case "${targ}" in +@@ -880,7 +880,15 @@ case "${targ}" in targ_defvec=metag_elf32_vec targ_underscore=yes ;; @@ -34,5 +31,5 @@ index 5e9ba3d9805..deb3d078439 100644 targ_defvec=microblaze_elf32_le_vec targ_selvecs=microblaze_elf32_vec -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0005-Patch-microblaze-Adding-64-bit-MB-support.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0008-Added-m64-abi-for-64-bit-target-descriptions.-set-m6.patch similarity index 55% rename from meta-microblaze/recipes-devtools/gdb/gdb/0005-Patch-microblaze-Adding-64-bit-MB-support.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0008-Added-m64-abi-for-64-bit-target-descriptions.-set-m6.patch index 6eea28fec..10517953b 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0005-Patch-microblaze-Adding-64-bit-MB-support.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0008-Added-m64-abi-for-64-bit-target-descriptions.-set-m6.patch @@ -1,591 +1,21 @@ -From 6aadc445a00275c37112e431c6a29f5a331e6e16 Mon Sep 17 00:00:00 2001 -From: Nagaraju Mekala -Date: Thu, 31 Jan 2019 14:36:00 +0530 -Subject: [PATCH 5/8] [Patch, microblaze]: Adding 64 bit MB support Added new - architecture to Microblaze 64-bit support to GDB Signed-off-by :Nagaraju - Mekala Signed-off-by :Mahesh Bodapati - +From 815e641399628fcde8e13f925e4a6d3bc565a762 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Tue, 9 Nov 2021 16:19:17 +0530 +Subject: [PATCH 08/53] Added m64 abi for 64 bit target descriptions. set m64 + abi for 64 bit elf. Conflicts: - gdb/Makefile.in - -Conflicts: - bfd/cpu-microblaze.c gdb/microblaze-tdep.c - ld/Makefile.am - ld/Makefile.in - opcodes/microblaze-dis.c - -Conflicts: - bfd/configure - gas/config/tc-microblaze.c - ld/Makefile.in - opcodes/microblaze-opcm.h - -Conflicts: - gdb/microblaze-tdep.c - -Conflicts: - bfd/elf32-microblaze.c - gas/config/tc-microblaze.c - gdb/features/Makefile - gdb/features/microblaze-with-stack-protect.c - gdb/microblaze-tdep.c - gdb/regformats/microblaze-with-stack-protect.dat - gdbserver/linux-microblaze-low.c - include/elf/common.h -Upstream-Status: Pending - -Signed-off-by: Mark Hatle + gdb/microblaze-tdep.h +Signed-off-by: Aayush Misra --- - bfd/Makefile.am | 2 + - bfd/Makefile.in | 3 + - bfd/archures.c | 2 + - bfd/bfd-in2.h | 31 +- - bfd/config.bfd | 4 + - bfd/configure | 2 + - bfd/cpu-microblaze.c | 55 +- - bfd/elf32-microblaze.c | 162 +- - bfd/elf64-microblaze.c | 3810 +++++++++++++++++ - bfd/libbfd.h | 3 + - bfd/reloc.c | 20 + - bfd/targets.c | 6 + - gdb/features/Makefile | 2 + - gdb/features/microblaze-core.xml | 6 +- - gdb/features/microblaze-stack-protect.xml | 4 +- - gdb/features/microblaze-with-stack-protect.c | 8 +- - gdb/features/microblaze.c | 6 +- - gdb/features/microblaze64-core.xml | 69 + - gdb/features/microblaze64-stack-protect.xml | 12 + - .../microblaze64-with-stack-protect.c | 79 + - .../microblaze64-with-stack-protect.xml | 12 + - gdb/features/microblaze64.c | 77 + - gdb/features/microblaze64.xml | 11 + - gdb/microblaze-linux-tdep.c | 36 +- - gdb/microblaze-tdep.c | 126 +- - gdb/microblaze-tdep.h | 4 +- - include/elf/common.h | 1 + - include/elf/microblaze.h | 4 + - opcodes/microblaze-dis.c | 51 +- - opcodes/microblaze-opc.h | 180 +- - opcodes/microblaze-opcm.h | 36 +- - 31 files changed, 4729 insertions(+), 95 deletions(-) + bfd/elf64-microblaze.c | 3810 ++++++++++++++++++++++++++++++++++++++++ + gdb/microblaze-tdep.c | 160 +- + gdb/microblaze-tdep.h | 13 +- + 3 files changed, 3975 insertions(+), 8 deletions(-) create mode 100755 bfd/elf64-microblaze.c - create mode 100644 gdb/features/microblaze64-core.xml - create mode 100644 gdb/features/microblaze64-stack-protect.xml - create mode 100644 gdb/features/microblaze64-with-stack-protect.c - create mode 100644 gdb/features/microblaze64-with-stack-protect.xml - create mode 100644 gdb/features/microblaze64.c - create mode 100644 gdb/features/microblaze64.xml -diff --git a/bfd/Makefile.am b/bfd/Makefile.am -index b9a3f8207ac..2ddd7891661 100644 ---- a/bfd/Makefile.am -+++ b/bfd/Makefile.am -@@ -571,6 +571,7 @@ BFD64_BACKENDS = \ - elf64-riscv.lo \ - elfxx-riscv.lo \ - elf64-s390.lo \ -+ elf64-microblaze.lo \ - elf64-sparc.lo \ - elf64-tilegx.lo \ - elf64-x86-64.lo \ -@@ -608,6 +609,7 @@ BFD64_BACKENDS_CFILES = \ - elf64-nfp.c \ - elf64-ppc.c \ - elf64-s390.c \ -+ elf64-microblaze.c \ - elf64-sparc.c \ - elf64-tilegx.c \ - elf64-x86-64.c \ -diff --git a/bfd/Makefile.in b/bfd/Makefile.in -index 934dd4bc066..7efb10f111d 100644 ---- a/bfd/Makefile.in -+++ b/bfd/Makefile.in -@@ -1040,6 +1040,7 @@ BFD64_BACKENDS = \ - elf64-riscv.lo \ - elfxx-riscv.lo \ - elf64-s390.lo \ -+ elf64-microblaze.lo \ - elf64-sparc.lo \ - elf64-tilegx.lo \ - elf64-x86-64.lo \ -@@ -1077,6 +1078,7 @@ BFD64_BACKENDS_CFILES = \ - elf64-nfp.c \ - elf64-ppc.c \ - elf64-s390.c \ -+ elf64-microblaze.c \ - elf64-sparc.c \ - elf64-tilegx.c \ - elf64-x86-64.c \ -@@ -1664,6 +1666,7 @@ distclean-compile: - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@ -+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@ - @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@ -diff --git a/bfd/archures.c b/bfd/archures.c -index fac9fe82a08..1790c741c58 100644 ---- a/bfd/archures.c -+++ b/bfd/archures.c -@@ -524,6 +524,8 @@ DESCRIPTION - . bfd_arch_lm32, {* Lattice Mico32. *} - .#define bfd_mach_lm32 1 - . bfd_arch_microblaze,{* Xilinx MicroBlaze. *} -+.#define bfd_mach_microblaze 1 -+.#define bfd_mach_microblaze64 2 - . bfd_arch_tilepro, {* Tilera TILEPro. *} - . bfd_arch_tilegx, {* Tilera TILE-Gx. *} - .#define bfd_mach_tilepro 1 -diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h -index c0b563aec02..ccaeecb9476 100644 ---- a/bfd/bfd-in2.h -+++ b/bfd/bfd-in2.h -@@ -1903,6 +1903,8 @@ enum bfd_architecture - bfd_arch_lm32, /* Lattice Mico32. */ - #define bfd_mach_lm32 1 - bfd_arch_microblaze,/* Xilinx MicroBlaze. */ -+#define bfd_mach_microblaze 1 -+#define bfd_mach_microblaze64 2 - bfd_arch_tilepro, /* Tilera TILEPro. */ - bfd_arch_tilegx, /* Tilera TILE-Gx. */ - #define bfd_mach_tilepro 1 -@@ -5443,16 +5445,41 @@ value relative to the read-write small data area anchor */ - expressions of the form "Symbol Op Symbol" */ - BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, - --/* This is a 64 bit reloc that stores the 32 bit pc relative -+/* This is a 32 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). No relocation is - done here - only used for relaxing */ -- BFD_RELOC_MICROBLAZE_64_NONE, -+ BFD_RELOC_MICROBLAZE_32_NONE, -+ -+/* This is a 64 bit reloc that stores the 32 bit pc relative -+ * +value in two words (with an imml instruction). No relocation is -+ * +done here - only used for relaxing */ -+ BFD_RELOC_MICROBLAZE_64_PCREL, -+ -+/* This is a 64 bit reloc that stores the 32 bit relative -+ * +value in two words (with an imml instruction). No relocation is -+ * +done here - only used for relaxing */ -+ BFD_RELOC_MICROBLAZE_64, -+ -+/* This is a 64 bit reloc that stores the 32 bit relative -+ * +value in two words (with an imml instruction). No relocation is -+ * +done here - only used for relaxing */ -+ BFD_RELOC_MICROBLAZE_EA64, -+ -+/* This is a 64 bit reloc that stores the 32 bit pc relative -+ * +value in two words (with an imm instruction). No relocation is -+ * +done here - only used for relaxing */ -+ BFD_RELOC_MICROBLAZE_64_NONE, - - /* This is a 64 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). The relocation is - PC-relative GOT offset */ - BFD_RELOC_MICROBLAZE_64_GOTPC, - -+/* This is a 64 bit reloc that stores the 32 bit pc relative -+value in two words (with an imml instruction). The relocation is -+PC-relative GOT offset */ -+ BFD_RELOC_MICROBLAZE_64_GPC, -+ - /* This is a 64 bit reloc that stores the 32 bit pc relative - value in two words (with an imm instruction). The relocation is - GOT offset */ -diff --git a/bfd/config.bfd b/bfd/config.bfd -index 872685cfb72..5e9ba3d9805 100644 ---- a/bfd/config.bfd -+++ b/bfd/config.bfd -@@ -860,11 +860,15 @@ case "${targ}" in - microblazeel*-*) - targ_defvec=microblaze_elf32_le_vec - targ_selvecs=microblaze_elf32_vec -+ targ64_selvecs=microblaze_elf64_vec -+ targ64_selvecs=microblaze_elf64_le_vec - ;; - - microblaze*-*) - targ_defvec=microblaze_elf32_vec - targ_selvecs=microblaze_elf32_le_vec -+ targ64_selvecs=microblaze_elf64_vec -+ targ64_selvecs=microblaze_elf64_le_vec - ;; - - #ifdef BFD64 -diff --git a/bfd/configure b/bfd/configure -index 0ef4c206fb0..b7547c6777c 100755 ---- a/bfd/configure -+++ b/bfd/configure -@@ -13547,6 +13547,8 @@ do - rx_elf32_linux_le_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; - s390_elf32_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;; - s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; -+ microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; -+ microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; - score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; - score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; - sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; -diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c -index 0c1d2b1aa69..106f78229b5 100644 ---- a/bfd/cpu-microblaze.c -+++ b/bfd/cpu-microblaze.c -@@ -23,13 +23,30 @@ - #include "bfd.h" - #include "libbfd.h" - --const bfd_arch_info_type bfd_microblaze_arch = -+const bfd_arch_info_type bfd_microblaze_arch[] = -+{ -+#if BFD_DEFAULT_TARGET_SIZE == 64 -+{ -+ 64, /* 32 bits in a word. */ -+ 64, /* 32 bits in an address. */ -+ 8, /* 8 bits in a byte. */ -+ bfd_arch_microblaze, /* Architecture. */ -+ bfd_mach_microblaze64, /* 64 bit Machine */ -+ "microblaze", /* Architecture name. */ -+ "MicroBlaze", /* Printable name. */ -+ 3, /* Section align power. */ -+ false, /* Is this the default architecture ? */ -+ bfd_default_compatible, /* Architecture comparison function. */ -+ bfd_default_scan, /* String to architecture conversion. */ -+ bfd_arch_default_fill, /* Default fill. */ -+ &bfd_microblaze_arch[1] /* Next in list. */ -+}, - { - 32, /* Bits in a word. */ - 32, /* Bits in an address. */ - 8, /* Bits in a byte. */ - bfd_arch_microblaze, /* Architecture number. */ -- 0, /* Machine number - 0 for now. */ -+ bfd_mach_microblaze, /* Machine number - 0 for now. */ - "microblaze", /* Architecture name. */ - "MicroBlaze", /* Printable name. */ - 3, /* Section align power. */ -@@ -39,4 +56,38 @@ const bfd_arch_info_type bfd_microblaze_arch = - bfd_arch_default_fill, /* Default fill. */ - NULL, /* Next in list. */ - 0 /* Maximum offset of a reloc from the start of an insn. */ -+} -+#else -+{ -+ 32, /* 32 bits in a word. */ -+ 32, /* 32 bits in an address. */ -+ 8, /* 8 bits in a byte. */ -+ bfd_arch_microblaze, /* Architecture. */ -+ bfd_mach_microblaze, /* 32 bit Machine */ -+ "microblaze", /* Architecture name. */ -+ "MicroBlaze", /* Printable name. */ -+ 3, /* Section align power. */ -+ true, /* Is this the default architecture ? */ -+ bfd_default_compatible, /* Architecture comparison function. */ -+ bfd_default_scan, /* String to architecture conversion. */ -+ bfd_arch_default_fill, /* Default fill. */ -+ &bfd_microblaze_arch[1] /* Next in list. */ -+}, -+{ -+ 64, /* 32 bits in a word. */ -+ 64, /* 32 bits in an address. */ -+ 8, /* 8 bits in a byte. */ -+ bfd_arch_microblaze, /* Architecture. */ -+ bfd_mach_microblaze64, /* 64 bit Machine */ -+ "microblaze", /* Architecture name. */ -+ "MicroBlaze", /* Printable name. */ -+ 3, /* Section align power. */ -+ false, /* Is this the default architecture ? */ -+ bfd_default_compatible, /* Architecture comparison function. */ -+ bfd_default_scan, /* String to architecture conversion. */ -+ bfd_arch_default_fill, /* Default fill. */ -+ NULL, /* Next in list. */ -+ 0 -+} -+#endif - }; -diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c -index d3b3c66cf00..053c1b432f9 100644 ---- a/bfd/elf32-microblaze.c -+++ b/bfd/elf32-microblaze.c -@@ -114,6 +114,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = - 0x0000ffff, /* Dest Mask. */ - true), /* PC relative offset? */ - -+ HOWTO (R_MICROBLAZE_IMML_64, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ true, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc,/* Special Function. */ -+ "R_MICROBLAZE_IMML_64", /* Name. */ -+ false, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ false), /* PC relative offset? */ -+ - /* A 64 bit relocation. Table entry not really used. */ - HOWTO (R_MICROBLAZE_64, /* Type. */ - 0, /* Rightshift. */ -@@ -174,7 +188,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = - 0x0000ffff, /* Dest Mask. */ - false), /* PC relative offset? */ - -- /* This reloc does nothing. Used for relaxation. */ -+ HOWTO (R_MICROBLAZE_32_NONE, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 32, /* Bitsize. */ -+ true, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_bitfield, /* Complain on overflow. */ -+ NULL, /* Special Function. */ -+ "R_MICROBLAZE_32_NONE",/* Name. */ -+ false, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0, /* Dest Mask. */ -+ false), /* PC relative offset? */ -+ -+ /* This reloc does nothing. Used for relaxation. */ - HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ - 0, /* Rightshift. */ - 3, /* Size (0 = byte, 1 = short, 2 = long). */ -@@ -264,6 +292,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = - 0x0000ffff, /* Dest Mask. */ - true), /* PC relative offset? */ - -+ /* A 64 bit GOTPC relocation. Table-entry not really used. */ -+ HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ -+ 0, /* Rightshift. */ -+ 2, /* Size (0 = byte, 1 = short, 2 = long). */ -+ 16, /* Bitsize. */ -+ true, /* PC_relative. */ -+ 0, /* Bitpos. */ -+ complain_overflow_dont, /* Complain on overflow. */ -+ bfd_elf_generic_reloc, /* Special Function. */ -+ "R_MICROBLAZE_GPC_64", /* Name. */ -+ false, /* Partial Inplace. */ -+ 0, /* Source Mask. */ -+ 0x0000ffff, /* Dest Mask. */ -+ true), /* PC relative offset? */ -+ - /* A 64 bit GOT relocation. Table-entry not really used. */ - HOWTO (R_MICROBLAZE_GOT_64, /* Type. */ - 0, /* Rightshift. */ -@@ -560,6 +603,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, - case BFD_RELOC_NONE: - microblaze_reloc = R_MICROBLAZE_NONE; - break; -+ case BFD_RELOC_MICROBLAZE_32_NONE: -+ microblaze_reloc = R_MICROBLAZE_32_NONE; -+ break; - case BFD_RELOC_MICROBLAZE_64_NONE: - microblaze_reloc = R_MICROBLAZE_64_NONE; - break; -@@ -600,9 +646,15 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, - case BFD_RELOC_VTABLE_ENTRY: - microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY; - break; -+ case BFD_RELOC_MICROBLAZE_64: -+ microblaze_reloc = R_MICROBLAZE_IMML_64; -+ break; - case BFD_RELOC_MICROBLAZE_64_GOTPC: - microblaze_reloc = R_MICROBLAZE_GOTPC_64; - break; -+ case BFD_RELOC_MICROBLAZE_64_GPC: -+ microblaze_reloc = R_MICROBLAZE_GPC_64; -+ break; - case BFD_RELOC_MICROBLAZE_64_GOT: - microblaze_reloc = R_MICROBLAZE_GOT_64; - break; -@@ -1507,9 +1559,9 @@ microblaze_elf_relocate_section (bfd *output_bfd, - relocation += addend; - relocation -= dtprel_base(info); - bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, -- contents + offset + 2); -+ contents + offset + endian); - bfd_put_16 (input_bfd, relocation & 0xffff, -- contents + offset + 2 + INST_WORD_SIZE); -+ contents + offset + endian + INST_WORD_SIZE); - break; - case (int) R_MICROBLAZE_TEXTREL_64: - case (int) R_MICROBLAZE_TEXTREL_32_LO: -@@ -1523,7 +1575,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, - if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) - { - relocation += addend; -- if (r_type == R_MICROBLAZE_32) -+ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) - bfd_put_32 (input_bfd, relocation, contents + offset); - else - { -@@ -1925,8 +1977,7 @@ microblaze_elf_relax_section (bfd *abfd, - else - symval += irel->r_addend; - -- if ((symval & 0xffff8000) == 0 -- || (symval & 0xffff8000) == 0xffff8000) -+ if ((symval & 0xffff8000) == 0) - { - /* We can delete this instruction. */ - sec->relax[sec->relax_count].addr = irel->r_offset; -@@ -1990,21 +2041,51 @@ microblaze_elf_relax_section (bfd *abfd, - irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); - } - break; -+ case R_MICROBLAZE_IMML_64: -+ { -+ /* This was a PC-relative instruction that was -+ completely resolved. */ -+ int sfix, efix; -+ unsigned int val; -+ bfd_vma target_address; -+ target_address = irel->r_addend + irel->r_offset; -+ sfix = calc_fixup (irel->r_offset, 0, sec); -+ efix = calc_fixup (target_address, 0, sec); -+ -+ /* Validate the in-band val. */ -+ val = bfd_get_32 (abfd, contents + irel->r_offset); -+ if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { -+ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); -+ } -+ irel->r_addend -= (efix - sfix); -+ /* Should use HOWTO. */ -+ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, -+ irel->r_addend); -+ } -+ break; - case R_MICROBLAZE_NONE: -+ case R_MICROBLAZE_32_NONE: - { - /* This was a PC-relative instruction that was - completely resolved. */ - int sfix, efix; -+ unsigned int val; - bfd_vma target_address; - target_address = irel->r_addend + irel->r_offset; - sfix = calc_fixup (irel->r_offset, 0, sec); - efix = calc_fixup (target_address, 0, sec); -+ -+ /* Validate the in-band val. */ -+ val = bfd_get_32 (abfd, contents + irel->r_offset); -+ if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { -+ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); -+ } - irel->r_addend -= (efix - sfix); - /* Should use HOWTO. */ - microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, - irel->r_addend); -- } -- break; -+ } -+ break; - case R_MICROBLAZE_64_NONE: - { - /* This was a PC-relative 64-bit instruction that was -@@ -2015,8 +2096,8 @@ microblaze_elf_relax_section (bfd *abfd, - sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); - efix = calc_fixup (target_address, 0, sec); - irel->r_addend -= (efix - sfix); -- microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset -- + INST_WORD_SIZE, irel->r_addend); -+ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, -+ irel->r_addend); - } - break; - } -@@ -2046,9 +2127,50 @@ microblaze_elf_relax_section (bfd *abfd, - irelscanend = irelocs + o->reloc_count; - for (irelscan = irelocs; irelscan < irelscanend; irelscan++) - { -- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) -- { -- isym = isymbuf + ELF32_R_SYM (irelscan->r_info); -+ if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) -+ { -+ unsigned int val; -+ -+ isym = isymbuf + ELF32_R_SYM (irelscan->r_info); -+ -+ /* hax: We only do the following fixup for debug location lists. */ -+ if (strcmp(".debug_loc", o->name)) -+ continue; -+ -+ /* This was a PC-relative instruction that was completely resolved. */ -+ if (ocontents == NULL) -+ { -+ if (elf_section_data (o)->this_hdr.contents != NULL) -+ ocontents = elf_section_data (o)->this_hdr.contents; -+ else -+ { -+ /* We always cache the section contents. -+ Perhaps, if info->keep_memory is FALSE, we -+ should free them, if we are permitted to. */ -+ -+ if (o->rawsize == 0) -+ o->rawsize = o->size; -+ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); -+ if (ocontents == NULL) -+ goto error_return; -+ if (!bfd_get_section_contents (abfd, o, ocontents, -+ (file_ptr) 0, -+ o->rawsize)) -+ goto error_return; -+ elf_section_data (o)->this_hdr.contents = ocontents; -+ } -+ } -+ val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); -+ if (val != irelscan->r_addend) { -+ fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); -+ } -+ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); -+ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, -+ irelscan->r_addend); -+ } -+ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)// || ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64) -+ { -+ isym = isymbuf + ELF32_R_SYM (irelscan->r_info); - - /* Look at the reloc only if the value has been resolved. */ - if (isym->st_shndx == shndx -@@ -2105,7 +2227,7 @@ microblaze_elf_relax_section (bfd *abfd, - elf_section_data (o)->this_hdr.contents = ocontents; - } - } -- irelscan->r_addend -= calc_fixup (irel->r_addend -+ irelscan->r_addend -= calc_fixup (irelscan->r_addend - + isym->st_value, - 0, - sec); -@@ -3445,6 +3567,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd, - return true; - } - -+ -+static bool -+elf_microblaze_object_p (bfd *abfd) -+{ -+ /* Set the right machine number for an s390 elf32 file. */ -+ return bfd_default_set_arch_mach (abfd, bfd_arch_microblaze, bfd_mach_microblaze); -+} -+ - /* Hook called by the linker routine which adds symbols from an object - file. We use it to put .comm items in .sbss, and not .bss. */ - -@@ -3514,8 +3644,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd, - #define elf_backend_finish_dynamic_symbol microblaze_elf_finish_dynamic_symbol - #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections - #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook -- --#define elf_backend_grok_prstatus microblaze_elf_grok_prstatus --#define elf_backend_grok_psinfo microblaze_elf_grok_psinfo -+#define elf_backend_object_p elf_microblaze_object_p - - #include "elf32-target.h" diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c new file mode 100755 index 00000000000..6cd9753a592 @@ -4402,1388 +3832,273 @@ index 00000000000..6cd9753a592 +#define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook + +#include "elf64-target.h" -diff --git a/bfd/libbfd.h b/bfd/libbfd.h -index 6e62e556962..ef5568a78b0 100644 ---- a/bfd/libbfd.h -+++ b/bfd/libbfd.h -@@ -2992,6 +2992,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", - "BFD_RELOC_MICROBLAZE_32_ROSDA", - "BFD_RELOC_MICROBLAZE_32_RWSDA", - "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", -+ "BFD_RELOC_MICROBLAZE_32_NONE", - "BFD_RELOC_MICROBLAZE_64_NONE", - "BFD_RELOC_MICROBLAZE_64_GOTPC", - "BFD_RELOC_MICROBLAZE_64_GOT", -@@ -2999,6 +3000,8 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", - "BFD_RELOC_MICROBLAZE_64_GOTOFF", - "BFD_RELOC_MICROBLAZE_32_GOTOFF", - "BFD_RELOC_MICROBLAZE_COPY", -+ "BFD_RELOC_MICROBLAZE_64", -+ "BFD_RELOC_MICROBLAZE_64_PCREL", - "BFD_RELOC_MICROBLAZE_64_TLS", - "BFD_RELOC_MICROBLAZE_64_TLSGD", - "BFD_RELOC_MICROBLAZE_64_TLSLD", -diff --git a/bfd/reloc.c b/bfd/reloc.c -index 164060361a9..e733e2397f4 100644 ---- a/bfd/reloc.c -+++ b/bfd/reloc.c -@@ -6898,6 +6898,12 @@ ENUM - ENUMDOC - This is a 32 bit reloc for the microblaze to handle - expressions of the form "Symbol Op Symbol" -+ENUM -+ BFD_RELOC_MICROBLAZE_32_NONE -+ENUMDOC -+ This is a 32 bit reloc that stores the 32 bit pc relative -+ value in two words (with an imm instruction). No relocation is -+ done here - only used for relaxing - ENUM - BFD_RELOC_MICROBLAZE_64_NONE - ENUMDOC -@@ -6991,6 +6997,20 @@ ENUMDOC - value in two words (with an imm instruction). The relocation is - relative offset from start of TEXT. - -+ This is a 64 bit reloc that stores 64-bit thread pointer relative offset -+ to two words (uses imml instruction). -+ENUM -+BFD_RELOC_MICROBLAZE_64, -+ENUMDOC -+ This is a 64 bit reloc that stores the 64 bit pc relative -+ value in two words (with an imml instruction). No relocation is -+ done here - only used for relaxing -+ENUM -+BFD_RELOC_MICROBLAZE_64_PCREL, -+ENUMDOC -+ This is a 32 bit reloc that stores the 32 bit pc relative -+ value in two words (with an imml instruction). No relocation is -+ done here - only used for relaxing - ENUM - BFD_RELOC_AARCH64_RELOC_START - ENUMDOC -diff --git a/bfd/targets.c b/bfd/targets.c -index 417743efc0e..333f05c55f4 100644 ---- a/bfd/targets.c -+++ b/bfd/targets.c -@@ -795,6 +795,8 @@ extern const bfd_target mep_elf32_le_vec; - extern const bfd_target metag_elf32_vec; - extern const bfd_target microblaze_elf32_vec; - extern const bfd_target microblaze_elf32_le_vec; -+extern const bfd_target microblaze_elf64_vec; -+extern const bfd_target microblaze_elf64_le_vec; - extern const bfd_target mips_ecoff_be_vec; - extern const bfd_target mips_ecoff_le_vec; - extern const bfd_target mips_ecoff_bele_vec; -@@ -1165,6 +1167,10 @@ static const bfd_target * const _bfd_target_vector[] = - - &metag_elf32_vec, - -+#ifdef BFD64 -+ µblaze_elf64_vec, -+ µblaze_elf64_le_vec, -+#endif - µblaze_elf32_vec, - - &mips_ecoff_be_vec, -diff --git a/gdb/features/Makefile b/gdb/features/Makefile -index fc3196864c9..1bb198abfd3 100644 ---- a/gdb/features/Makefile -+++ b/gdb/features/Makefile -@@ -101,7 +101,9 @@ OUTPUTS = $(patsubst %,$(outdir)/%.dat,$(WHICH)) - # to make on the command line. - XMLTOC = \ - microblaze-with-stack-protect.xml \ -+ microblaze64-with-stack-protect.xml \ - microblaze.xml \ -+ microblaze64.xml \ - mips-dsp-linux.xml \ - mips-linux.xml \ - mips64-dsp-linux.xml \ -diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml -index 29fdd6c0a2f..a5c3cce069d 100644 ---- a/gdb/features/microblaze-core.xml -+++ b/gdb/features/microblaze-core.xml -@@ -8,7 +8,7 @@ - - - -- -+ - - - -@@ -39,7 +39,7 @@ - - - -- -+ - - - -@@ -64,4 +64,6 @@ - - - -+ -+ - -diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml -index aac51ea471c..722a51f0df5 100644 ---- a/gdb/features/microblaze-stack-protect.xml -+++ b/gdb/features/microblaze-stack-protect.xml -@@ -7,6 +7,6 @@ - - - -- -- -+ -+ - -diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c -index aa180bf35d5..6a9e74c7a6f 100644 ---- a/gdb/features/microblaze-with-stack-protect.c -+++ b/gdb/features/microblaze-with-stack-protect.c -@@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) - - feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.core"); - tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); -- tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "data_ptr"); -+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); -@@ -45,7 +45,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) - tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); -- tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "code_ptr"); -+ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); -@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void) - tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); - - feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.stack-protect"); -- tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int"); -- tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int"); - - tdesc_microblaze_with_stack_protect = result.release (); - } -diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c -index ef2c64c720e..201232dff83 100644 ---- a/gdb/features/microblaze.c -+++ b/gdb/features/microblaze.c -@@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void) - - feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.core"); - tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); -- tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "data_ptr"); -+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); -@@ -45,7 +45,7 @@ initialize_tdesc_microblaze (void) - tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); -- tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "code_ptr"); -+ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); -@@ -70,6 +70,8 @@ initialize_tdesc_microblaze (void) - tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); - tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 7cbbc8986a1..597507e53cd 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -65,8 +65,95 @@ + #define IS_SAVE_HIDDEN_PTR(op, rd, ra, rb) \ + ((op == add || op == addik) && ra == MICROBLAZE_FIRST_ARGREG && rb == 0) - tdesc_microblaze = result.release (); - } -diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml -new file mode 100644 -index 00000000000..96e99e2fb24 ---- /dev/null -+++ b/gdb/features/microblaze64-core.xml -@@ -0,0 +1,69 @@ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -+ -diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml -new file mode 100644 -index 00000000000..1bbf5fc3cea ---- /dev/null -+++ b/gdb/features/microblaze64-stack-protect.xml -@@ -0,0 +1,12 @@ -+ -+ -+ -+ -+ -+ -+ -+ -diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c -new file mode 100644 -index 00000000000..a4de4666c76 ---- /dev/null -+++ b/gdb/features/microblaze64-with-stack-protect.c -@@ -0,0 +1,79 @@ -+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: -+ Original: microblaze-with-stack-protect.xml */ ++static const char *microblaze_abi_string; + -+#include "defs.h" -+#include "osabi.h" -+#include "target-descriptions.h" ++static const char *const microblaze_abi_strings[] = { ++ "auto", ++ "m64", ++}; ++ ++enum microblaze_abi ++microblaze_abi (struct gdbarch *gdbarch) ++{ ++ microblaze_gdbarch_tdep *tdep = (microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); ++ return tdep->microblaze_abi; ++} + /* The registers of the Xilinx microblaze processor. */ + ++ static struct cmd_list_element *setmicroblazecmdlist = NULL; ++ static struct cmd_list_element *showmicroblazecmdlist = NULL; + -+struct target_desc *tdesc_microblaze64_with_stack_protect; +static void -+initialize_tdesc_microblaze64_with_stack_protect (void) ++microblaze_abi_update (const char *ignore_args, ++ int from_tty, struct cmd_list_element *c) +{ -+ target_desc_up result = allocate_target_description (); -+ struct tdesc_feature *feature; -+ -+ feature = tdesc_create_feature (result.get() , "org.gnu.gdb.microblaze64.core"); -+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rear", 34, 1, NULL, 64, "int"); -+ tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rfsr", 36, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rbtr", 37, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "rpvr0", 38, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr1", 39, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr2", 40, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr3", 41, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr4", 42, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr5", 43, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr6", 44, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr7", 45, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr8", 46, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "rpvr9", 47, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "rpvr10", 48, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr11", 49, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "redr", 50, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpid", 51, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rzpr", 52, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rtlbx", 53, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); -+ -+ feature = tdesc_create_feature (result.get(), "org.gnu.gdb.microblaze64.stack-protect"); -+ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); -+ -+ tdesc_microblaze64_with_stack_protect = result.release(); ++ struct gdbarch_info info; ++ ++ /* Force the architecture to update, and (if it's a microblaze architecture) ++ * microblaze_gdbarch_init will take care of the rest. */ ++// gdbarch_info_init (&info); ++ gdbarch_update_p (info); +} -diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml -new file mode 100644 -index 00000000000..0e9f01611f3 ---- /dev/null -+++ b/gdb/features/microblaze64-with-stack-protect.xml -@@ -0,0 +1,12 @@ -+ -+ -+ -+ -+ -+ -+ -+ -diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c -new file mode 100644 -index 00000000000..8ab7a90dd95 ---- /dev/null -+++ b/gdb/features/microblaze64.c -@@ -0,0 +1,77 @@ -+/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: -+ Original: microblaze.xml */ + -+#include "defs.h" -+#include "osabi.h" -+#include "target-descriptions.h" + -+struct target_desc *tdesc_microblaze64; -+static void -+initialize_tdesc_microblaze64 (void) ++static enum microblaze_abi ++global_microblaze_abi (void) +{ -+ target_desc_up result = allocate_target_description (); -+ struct tdesc_feature *feature; -+ -+ feature = tdesc_create_feature (result.get(), "org.gnu.gdb.microblaze64.core"); -+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rear", 34, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rfsr", 36, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rbtr", 37, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "rpvr0", 38, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr1", 39, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr2", 40, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr3", 41, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr4", 42, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr5", 43, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr6", 44, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr7", 45, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr8", 46, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "rpvr9", 47, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "rpvr10", 48, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpvr11", 49, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "redr", 50, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rpid", 51, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rzpr", 52, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rtlbx", 53, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); -+ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); -+ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); -+ -+ tdesc_microblaze64 = result.release(); ++ int i; ++ ++ for (i = 0; microblaze_abi_strings[i] != NULL; i++) ++ if (microblaze_abi_strings[i] == microblaze_abi_string) ++ return (enum microblaze_abi) i; ++ ++// internal_error (__FILE__, __LINE__, _("unknown ABI string")); +} -diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml -new file mode 100644 -index 00000000000..515d18e65cf ---- /dev/null -+++ b/gdb/features/microblaze64.xml -@@ -0,0 +1,11 @@ -+ -+ -+ -+ -+ -+ -+ -diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c -index fc52adffb72..f2db32f0087 100644 ---- a/gdb/microblaze-linux-tdep.c -+++ b/gdb/microblaze-linux-tdep.c -@@ -40,6 +40,7 @@ - #include "features/microblaze-linux.c" - - static int microblaze_debug_flag = 0; -+int MICROBLAZE_REGISTER_SIZE=4; - - static void - microblaze_debug (const char *fmt, ...) -@@ -55,6 +56,7 @@ microblaze_debug (const char *fmt, ...) - } - } - -+#if 0 - static int - microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, - struct bp_target_info *bp_tgt) -@@ -86,6 +88,8 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, - return val; - } - -+#endif + - static void - microblaze_linux_sigtramp_cache (struct frame_info *next_frame, - struct trad_frame_cache *this_cache, -@@ -147,8 +151,8 @@ microblaze_linux_init_abi (struct gdbarch_info info, - - linux_init_abi (info, gdbarch, 0); - -- set_gdbarch_memory_remove_breakpoint (gdbarch, -- microblaze_linux_memory_remove_breakpoint); -+ // set_gdbarch_memory_remove_breakpoint (gdbarch, -+ // microblaze_linux_memory_remove_breakpoint); - - /* Shared library handling. */ - set_solib_svr4_fetch_link_map_offsets (gdbarch, -@@ -160,10 +164,30 @@ microblaze_linux_init_abi (struct gdbarch_info info, - - /* BFD target for core files. */ - if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) -- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); -+ { -+ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { -+ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze"); -+ MICROBLAZE_REGISTER_SIZE=8; -+ } ++static void ++show_microblaze_abi (struct ui_file *file, ++ int from_tty, ++ struct cmd_list_element *ignored_cmd, ++ const char *ignored_value) ++{ ++ enum microblaze_abi global_abi = global_microblaze_abi (); ++ enum microblaze_abi actual_abi = microblaze_abi (target_gdbarch ()); ++ const char *actual_abi_str = microblaze_abi_strings[actual_abi]; ++ ++#if 1 ++ if (global_abi == MICROBLAZE_ABI_AUTO) ++ fprintf_filtered ++ (file, ++ "The microblaze ABI is set automatically (currently \"%s\").\n", ++ actual_abi_str); ++ else if (global_abi == actual_abi) ++ fprintf_filtered ++ (file, ++ "The microblaze ABI is assumed to be \"%s\" (due to user setting).\n", ++ actual_abi_str); + else -+ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); -+ } - else -- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); -+ { -+ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { -+ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel"); -+ MICROBLAZE_REGISTER_SIZE=8; ++ { ++#endif ++ /* Probably shouldn't happen... */ ++ fprintf_filtered (file, ++ "The (auto detected) microblaze ABI \"%s\" is in use " ++ "even though the user setting was \"%s\".\n", ++ actual_abi_str, microblaze_abi_strings[global_abi]); + } -+ else -+ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); -+ } - -+ switch (info.bfd_arch_info->mach) -+ { -+ case bfd_mach_microblaze64: -+ set_gdbarch_ptr_bit (gdbarch, 64); -+ break; -+ } - - /* Shared library handling. */ - set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); -@@ -178,7 +202,9 @@ void _initialize_microblaze_linux_tdep (); - void - _initialize_microblaze_linux_tdep () - { -- gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, -+ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, -+ microblaze_linux_init_abi); -+ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, - microblaze_linux_init_abi); - initialize_tdesc_microblaze_linux (); - } -diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index ccb6b730d64..c347bb9516b 100644 ---- a/gdb/microblaze-tdep.c -+++ b/gdb/microblaze-tdep.c -@@ -40,7 +40,9 @@ - #include "remote.h" - - #include "features/microblaze-with-stack-protect.c" -+#include "features/microblaze64-with-stack-protect.c" - #include "features/microblaze.c" -+#include "features/microblaze64.c" - - /* Instruction macros used for analyzing the prologue. */ - /* This set of instruction macros need to be changed whenever the -@@ -75,12 +77,13 @@ static const char * const microblaze_register_names[] = - "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6", - "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11", - "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi", -- "rslr", "rshr" -+ "slr", "shr" - }; - - #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names) - - static unsigned int microblaze_debug_flag = 0; -+int reg_size = 4; - - #define microblaze_debug(fmt, ...) \ - debug_prefixed_printf_cond_nofunc (microblaze_debug_flag, "MICROBLAZE", \ -@@ -128,6 +131,15 @@ microblaze_fetch_instruction (CORE_ADDR pc) - constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT; - - typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint; -+static CORE_ADDR -+microblaze_store_arguments (struct regcache *regcache, int nargs, -+ struct value **args, CORE_ADDR sp, -+ int struct_return, CORE_ADDR struct_addr) ++} ++ ++static void ++show_microblaze_command (const char *args, int from_tty) +{ -+ error (_("store_arguments not implemented")); -+ return sp; ++ help_list (showmicroblazecmdlist, "show microblaze ", all_commands, gdb_stdout); +} -+#if 0 - static int - microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, - struct bp_target_info *bp_tgt) -@@ -146,7 +158,6 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, - /* Make sure we see the memory breakpoints. */ - scoped_restore restore_memory - = make_scoped_restore_show_memory_breakpoints (1); -- - val = target_read_memory (addr, old_contents, bplen); - - /* If our breakpoint is no longer at the address, this means that the -@@ -161,6 +172,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, - return val; - } - -+#endif - /* Allocate and initialize a frame cache. */ - - static struct microblaze_frame_cache * -@@ -577,17 +589,16 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache, - gdb_byte *valbuf) - { - gdb_byte buf[8]; -- - /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */ - switch (TYPE_LENGTH (type)) - { - case 1: /* return last byte in the register. */ - regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf); -- memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1); -+ memcpy(valbuf, buf + reg_size - 1, 1); - return; - case 2: /* return last 2 bytes in register. */ - regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf); -- memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2); -+ memcpy(valbuf, buf + reg_size - 2, 2); - return; - case 4: /* for sizes 4 or 8, copy the required length. */ - case 8: -@@ -754,6 +765,12 @@ microblaze_software_single_step (struct regcache *regcache) - } - #endif - ++ +static void -+microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc) ++set_microblaze_command (const char *args, int from_tty) +{ -+ regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc); ++ printf_unfiltered ++ ("\"set microblaze\" must be followed by an appropriate subcommand.\n"); ++ help_list (setmicroblazecmdlist, "set microblaze ", all_commands, gdb_stdout); +} + - static int dwarf2_to_reg_map[78] = - { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */ - 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */ -@@ -788,13 +805,14 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) - static void - microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) + static const char * const microblaze_register_names[] = { -+ - register_remote_g_packet_guess (gdbarch, - 4 * MICROBLAZE_NUM_CORE_REGS, -- tdesc_microblaze); -+ tdesc_microblaze64); - - register_remote_g_packet_guess (gdbarch, - 4 * MICROBLAZE_NUM_REGS, -- tdesc_microblaze_with_stack_protect); -+ tdesc_microblaze64_with_stack_protect); - } - - void -@@ -802,7 +820,7 @@ microblaze_supply_gregset (const struct regset *regset, - struct regcache *regcache, - int regnum, const void *gregs) - { -- const unsigned int *regs = (const unsigned int *)gregs; -+ const gdb_byte *regs = (const gdb_byte *) gregs; - if (regnum >= 0) - regcache->raw_supply (regnum, regs + regnum); - -@@ -810,7 +828,7 @@ microblaze_supply_gregset (const struct regset *regset, - int i; - - for (i = 0; i < 50; i++) { -- regcache->raw_supply (i, regs + i); -+ regcache->raw_supply (regnum, regs + i); - } - } - } -@@ -833,6 +851,17 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, - } - + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", +@@ -85,9 +172,21 @@ static const char * const microblaze_register_names[] = + static unsigned int microblaze_debug_flag = 0; + int reg_size = 4; -+static void -+make_regs (struct gdbarch *arch) ++unsigned int ++microblaze_abi_regsize (struct gdbarch *gdbarch) +{ -+ struct gdbarch_tdep *tdep = gdbarch_tdep (arch); -+ int mach = gdbarch_bfd_arch_info (arch)->mach; -+ -+ if (mach == bfd_mach_microblaze64) ++ switch (microblaze_abi (gdbarch)) + { -+ set_gdbarch_ptr_bit (arch, 64); ++ case MICROBLAZE_ABI_M64: ++ return 8; ++ default: ++ return 4; + } +} ++ + #define microblaze_debug(fmt, ...) \ + debug_prefixed_printf_cond_nofunc (microblaze_debug_flag, "MICROBLAZE", \ +- fmt, ## __VA_ARGS__) ++ fmt, ## __VA_ARGS__) - static struct gdbarch * + + /* Return the name of register REGNUM. */ +@@ -867,15 +966,30 @@ static struct gdbarch * microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) -@@ -846,8 +875,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - if (arches != NULL) + { + tdesc_arch_data_up tdesc_data; ++ enum microblaze_abi microblaze_abi, found_abi, wanted_abi; + const struct target_desc *tdesc = info.target_desc; + ++ /* What has the user specified from the command line? */ ++ wanted_abi = global_microblaze_abi (); ++ if (gdbarch_debug) ++ fprintf_unfiltered (gdb_stdlog, "microblaze_gdbarch_init: wanted_abi = %d\n", ++ wanted_abi); ++ if (wanted_abi != MICROBLAZE_ABI_AUTO) ++ microblaze_abi = wanted_abi; ++ + /* If there is already a candidate, use it. */ + arches = gdbarch_list_lookup_by_info (arches, &info); +- if (arches != NULL) ++ if ((arches != NULL) && (microblaze_abi != MICROBLAZE_ABI_M64)) return arches->gdbarch; - if (tdesc == NULL) -- tdesc = tdesc_microblaze; -- ++ ++ if (microblaze_abi == MICROBLAZE_ABI_M64) + { -+ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) -+ { -+ tdesc = tdesc_microblaze64; ++ tdesc = tdesc_microblaze64; + reg_size = 8; -+ } -+ else -+ tdesc = tdesc_microblaze; + } - /* Check any target description for validity. */ - if (tdesc_has_registers (tdesc)) + if (tdesc == NULL) { -@@ -855,31 +891,42 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +- if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) + { + tdesc = tdesc_microblaze64; + reg_size = 8; +@@ -890,7 +1004,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) int valid_p; int i; -- feature = tdesc_find_feature (tdesc, -- "org.gnu.gdb.microblaze.core"); -+ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) -+ feature = tdesc_find_feature (tdesc, -+ "org.gnu.gdb.microblaze64.core"); -+ else -+ feature = tdesc_find_feature (tdesc, -+ "org.gnu.gdb.microblaze.core"); - if (feature == NULL) - return NULL; - tdesc_data = tdesc_data_alloc (); - - valid_p = 1; -- for (i = 0; i < MICROBLAZE_NUM_CORE_REGS; i++) -- valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i, -- microblaze_register_names[i]); -- feature = tdesc_find_feature (tdesc, -- "org.gnu.gdb.microblaze.stack-protect"); -+ for (i = 0; i < MICROBLAZE_NUM_REGS; i++) -+ valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), i, -+ microblaze_register_names[i]); -+ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) -+ feature = tdesc_find_feature (tdesc, -+ "org.gnu.gdb.microblaze64.stack-protect"); -+ else -+ feature = tdesc_find_feature (tdesc, -+ "org.gnu.gdb.microblaze.stack-protect"); - if (feature != NULL) -- { -- valid_p = 1; -- valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), -- MICROBLAZE_SLR_REGNUM, -- "rslr"); -- valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), -- MICROBLAZE_SHR_REGNUM, -- "rshr"); -- } -+ { -+ valid_p = 1; -+ valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), -+ MICROBLAZE_SLR_REGNUM, -+ "slr"); -+ valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), -+ MICROBLAZE_SHR_REGNUM, -+ "shr"); -+ } - - if (!valid_p) -- return NULL; -+ { -+ // tdesc_data_cleanup (tdesc_data.get ()); -+ return NULL; -+ } +- if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) + feature = tdesc_find_feature (tdesc, + "org.gnu.gdb.microblaze64.core"); + else +@@ -904,7 +1018,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + for (i = 0; i < MICROBLAZE_NUM_REGS; i++) + valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), i, + microblaze_register_names[i]); +- if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) + feature = tdesc_find_feature (tdesc, + "org.gnu.gdb.microblaze64.stack-protect"); + else +@@ -954,7 +1068,8 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + set_gdbarch_ptr_bit (gdbarch, 64); + break; } - - /* Allocate space for the new architecture. */ -@@ -899,7 +946,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - /* Register numbers of various important registers. */ - set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM); - set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM); -+ -+ /* Register set. -+ make_regs (gdbarch); */ -+ switch (info.bfd_arch_info->mach) -+ { -+ case bfd_mach_microblaze64: -+ set_gdbarch_ptr_bit (gdbarch, 64); -+ break; -+ } - -+ +- ++ if(microblaze_abi == MICROBLAZE_ABI_M64) ++ set_gdbarch_ptr_bit (gdbarch, 64); + /* Map Dwarf2 registers to GDB registers. */ set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); +@@ -1014,6 +1129,38 @@ _initialize_microblaze_tdep () + { + gdbarch_register (bfd_arch_microblaze, microblaze_gdbarch_init); -@@ -919,7 +976,9 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - microblaze_breakpoint::kind_from_pc); - set_gdbarch_sw_breakpoint_from_kind (gdbarch, - microblaze_breakpoint::bp_from_kind); -- set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); -+// set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); -+ -+// set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); - - set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); - -@@ -927,7 +986,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - - set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc); - -- microblaze_register_g_packet_guesses (gdbarch); -+ //microblaze_register_g_packet_guesses (gdbarch); - - frame_base_set_default (gdbarch, µblaze_frame_base); - -@@ -942,12 +1001,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data)); - //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer); ++// static struct cmd_list_element *setmicroblazecmdlist = NULL; ++// static struct cmd_list_element *showmicroblazecmdlist = NULL; ++ ++ /* Add root prefix command for all "set microblaze"/"show microblaze" commands. */ ++ ++ add_setshow_prefix_cmd ("microblaze", no_class, ++ _("Various microblaze specific commands."), ++ _("Various microblaze specific commands."), ++ &setmicroblazecmdlist,&showmicroblazecmdlist, ++ &setlist,&showlist); ++#if 0 ++ add_prefix_cmd ("microblaze", no_class, set_microblaze_command, ++ _("Various microblaze specific commands."), ++ &setmicroblazecmdlist, "set microblaze ", 0, &setlist); ++ ++ add_prefix_cmd ("microblaze", no_class, show_microblaze_command, ++ _("Various microblaze specific commands."), ++ &showmicroblazecmdlist, "show microblaze ", 0, &showlist); ++#endif ++ ++ /* Allow the user to override the ABI. */ ++ add_setshow_enum_cmd ("abi", class_obscure, microblaze_abi_strings, ++ µblaze_abi_string, _("\ ++Set the microblaze ABI used by this program."), _("\ ++Show the microblaze ABI used by this program."), _("\ ++This option can be set to one of:\n\ ++ auto - the default ABI associated with the current binary\n\ ++ m64"), ++ microblaze_abi_update, ++ show_microblaze_abi, ++ &setmicroblazecmdlist, &showmicroblazecmdlist); ++ + initialize_tdesc_microblaze_with_stack_protect (); + initialize_tdesc_microblaze (); + initialize_tdesc_microblaze64_with_stack_protect (); +@@ -1028,5 +1175,4 @@ When non-zero, microblaze specific debugging is enabled."), + NULL, + &setdebuglist, &showdebuglist); -- /* If we have register sets, enable the generic core file support. */ -+ /* If we have register sets, enable the generic core file support. - if (tdep->gregset) { - set_gdbarch_iterate_over_regset_sections (gdbarch, - microblaze_iterate_over_regset_sections); -- } - -+ }*/ - return gdbarch; } - -@@ -959,6 +1017,8 @@ _initialize_microblaze_tdep () - - initialize_tdesc_microblaze_with_stack_protect (); - initialize_tdesc_microblaze (); -+ initialize_tdesc_microblaze64_with_stack_protect (); -+ initialize_tdesc_microblaze64 (); - /* Debug this files internals. */ - add_setshow_zuinteger_cmd ("microblaze", class_maintenance, - µblaze_debug_flag, _("\ diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h -index 2415acfe7b6..f4d810303ca 100644 +index 81f7f30cb8e..f6cef7c9a33 100644 --- a/gdb/microblaze-tdep.h +++ b/gdb/microblaze-tdep.h -@@ -28,7 +28,7 @@ struct microblaze_gregset - microblaze_gregset() {} - unsigned int gregs[32]; - unsigned int fpregs[32]; -- unsigned int pregs[16]; -+ unsigned int pregs[18]; - }; - - struct microblaze_gdbarch_tdep : gdbarch_tdep -@@ -134,7 +134,7 @@ struct microblaze_frame_cache - struct trad_frame_saved_reg *saved_regs; - }; - /* All registers are 32 bits. */ --#define MICROBLAZE_REGISTER_SIZE 4 -+//#define MICROBLAZE_REGISTER_SIZE 8 - - /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used. - Only used for native debugging. */ -diff --git a/include/elf/common.h b/include/elf/common.h -index 70d63e3299c..8aa330d6631 100644 ---- a/include/elf/common.h -+++ b/include/elf/common.h -@@ -360,6 +360,7 @@ - #define EM_U16_U8CORE 260 /* LAPIS nX-U16/U8 */ - #define EM_TACHYUM 261 /* Tachyum */ - #define EM_56800EF 262 /* NXP 56800EF Digital Signal Controller (DSC) */ -+#define EM_MB_64 263 /* Xilinx MicroBlaze 32-bit RISC soft processor core */ - - /* If it is necessary to assign new unofficial EM_* values, please pick large - random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision -diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h -index 43ad3ad3904..79799b86a49 100644 ---- a/include/elf/microblaze.h -+++ b/include/elf/microblaze.h -@@ -61,6 +61,10 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) - RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */ - RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ - RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ -+ RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) -+ RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34) -+ RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */ -+ - END_RELOC_NUMBERS (R_MICROBLAZE_max) - - /* Global base address names. */ -diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c -index b057492ba93..283d87c04a2 100644 ---- a/opcodes/microblaze-dis.c -+++ b/opcodes/microblaze-dis.c -@@ -33,6 +33,7 @@ - #define get_field_r1(buf, instr) get_field (buf, instr, RA_MASK, RA_LOW) - #define get_field_r2(buf, instr) get_field (buf, instr, RB_MASK, RB_LOW) - #define get_int_field_imm(instr) ((instr & IMM_MASK) >> IMM_LOW) -+#define get_int_field_imml(instr) ((instr & IMML_MASK) >> IMM_LOW) - #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW) - - #define NUM_STRBUFS 3 -@@ -73,11 +74,20 @@ get_field_imm (struct string_buf *buf, long instr) - } +@@ -19,9 +19,17 @@ - static char * --get_field_imm5 (struct string_buf *buf, long instr) -+get_field_imml (struct string_buf *buf, long instr) - { - char *p = strbuf (buf); - -- sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW)); -+ sprintf (p, "%d", (int)((instr & IMML_MASK) >> IMM_LOW)); -+ return p; -+} -+ -+static char * -+get_field_imms (struct string_buf *buf, long instr) -+{ -+ char *p = strbuf (buf); -+ -+ sprintf (p, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW)); - return p; - } - -@@ -90,6 +100,18 @@ get_field_imm5_mbar (struct string_buf *buf, long instr) - return p; - } - -+static char * -+get_field_immw (struct string_buf *buf, long instr) -+{ -+ char *p = strbuf (buf); -+ -+ if (instr & 0x00004000) -+ sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ -+ else -+ sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */ -+ return p; -+} -+ - static char * - get_field_rfsl (struct string_buf *buf, long instr) - { -@@ -296,9 +318,14 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) - } - } - break; -- case INST_TYPE_RD_R1_IMM5: -+ case INST_TYPE_RD_R1_IMML: -+ print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst), -+ get_field_r1(&buf, inst), get_field_imm (&buf, inst)); -+ /* TODO: Also print symbol */ -+ break; -+ case INST_TYPE_RD_R1_IMMS: - print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst), -- get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst)); -+ get_field_r1(&buf, inst), get_field_imms (&buf, inst)); - break; - case INST_TYPE_RD_RFSL: - print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), -@@ -402,9 +429,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) - } - } - break; -- case INST_TYPE_RD_R2: -- print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), -- get_field_r2 (&buf, inst)); -+ case INST_TYPE_IMML: -+ print_func (stream, "\t%s", get_field_imml (&buf, inst)); -+ /* TODO: Also print symbol */ -+ break; -+ case INST_TYPE_RD_R2: -+ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst)); - break; - case INST_TYPE_R2: - print_func (stream, "\t%s", get_field_r2 (&buf, inst)); -@@ -427,7 +457,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) - /* For mbar 16 or sleep insn. */ - case INST_TYPE_NONE: - break; -- /* For tuqula instruction */ -+ /* For bit field insns. */ -+ case INST_TYPE_RD_R1_IMMW_IMMS: -+ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), -+ get_field_immw (&buf, inst), get_field_imms (&buf, inst)); -+ break; -+ /* For tuqula instruction */ - case INST_TYPE_RD: - print_func (stream, "\t%s", get_field_rd (&buf, inst)); - break; -diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h -index ffb0f08c692..5e45df995de 100644 ---- a/opcodes/microblaze-opc.h -+++ b/opcodes/microblaze-opc.h -@@ -40,7 +40,7 @@ - #define INST_TYPE_RD_SPECIAL 11 - #define INST_TYPE_R1 12 - /* New instn type for barrel shift imms. */ --#define INST_TYPE_RD_R1_IMM5 13 -+#define INST_TYPE_RD_R1_IMMS 13 - #define INST_TYPE_RD_RFSL 14 - #define INST_TYPE_R1_RFSL 15 - -@@ -59,6 +59,15 @@ - /* For mbar. */ - #define INST_TYPE_IMM5 20 - -+/* For bsefi and bsifi */ -+#define INST_TYPE_RD_R1_IMMW_IMMS 21 -+ -+/* For 64-bit instructions */ -+#define INST_TYPE_IMML 22 -+#define INST_TYPE_RD_R1_IMML 23 -+#define INST_TYPE_R1_IMML 24 -+#define INST_TYPE_RD_R1_IMMW_IMMS 21 -+ - #define INST_TYPE_NONE 25 - - -@@ -88,10 +97,14 @@ - #define OPCODE_MASK_H24 0xFC1F07FF /* High 6, bits 20-16 and low 11 bits. */ - #define OPCODE_MASK_H124 0xFFFF07FF /* High 16, and low 11 bits. */ - #define OPCODE_MASK_H1234 0xFFFFFFFF /* All 32 bits. */ --#define OPCODE_MASK_H3 0xFC000600 /* High 6 bits and bits 21, 22. */ -+#define OPCODE_MASK_H3 0xFC000700 /* High 6 bits and bits 21, 22, 23. */ -+#define OPCODE_MASK_H3B 0xFC00E600 /* High 6 bits and bits 16, 17, 18, 21, 22. */ - #define OPCODE_MASK_H32 0xFC00FC00 /* High 6 bits and bit 16-21. */ -+#define OPCODE_MASK_H32B 0xFC00E000 /* High 6 bits and bit 16, 17, 18. */ - #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits. */ -+#define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits. */ - #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26. */ -+#define OPCODE_MASK_H8 0xFF000000 /* High 8 bits only. */ - - /* New Mask for msrset, msrclr insns. */ - #define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */ -@@ -101,7 +114,7 @@ - #define DELAY_SLOT 1 - #define NO_DELAY_SLOT 0 - --#define MAX_OPCODES 289 -+#define MAX_OPCODES 412 + #ifndef MICROBLAZE_TDEP_H + #define MICROBLAZE_TDEP_H 1 +- ++#include "objfiles.h" + #include "gdbarch.h" - const struct op_code_struct ++struct gdbarch; ++enum microblaze_abi ++ { ++ MICROBLAZE_ABI_AUTO = 0, ++ MICROBLAZE_ABI_M64, ++ }; ++ ++enum microblaze_abi microblaze_abi (struct gdbarch *gdbarch); + /* Microblaze architecture-specific information. */ + struct microblaze_gregset { -@@ -119,6 +132,7 @@ const struct op_code_struct - /* More info about output format here. */ - } microblaze_opcodes[MAX_OPCODES] = +@@ -35,11 +43,14 @@ struct microblaze_gdbarch_tdep : gdbarch_tdep_base { -+ /* 32-bit instructions */ - {"add", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x00000000, OPCODE_MASK_H4, add, arithmetic_inst }, - {"rsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H4, rsub, arithmetic_inst }, - {"addc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000000, OPCODE_MASK_H4, addc, arithmetic_inst }, -@@ -155,9 +169,11 @@ const struct op_code_struct - {"ncget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006000, OPCODE_MASK_H32, ncget, anyware_inst }, - {"ncput", INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00E000, OPCODE_MASK_H32, ncput, anyware_inst }, - {"muli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x60000000, OPCODE_MASK_H, muli, mult_inst }, -- {"bslli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3, bslli, barrel_shift_inst }, -- {"bsrai", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3, bsrai, barrel_shift_inst }, -- {"bsrli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3, bsrli, barrel_shift_inst }, -+ {"bslli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3B, bslli, barrel_shift_inst }, -+ {"bsrai", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3B, bsrai, barrel_shift_inst }, -+ {"bsrli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3B, bsrli, barrel_shift_inst }, -+ {"bsefi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64004000, OPCODE_MASK_H32B, bsefi, barrel_shift_inst }, -+ {"bsifi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64008000, OPCODE_MASK_H32B, bsifi, barrel_shift_inst }, - {"or", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H4, microblaze_or, logical_inst }, - {"and", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000000, OPCODE_MASK_H4, microblaze_and, logical_inst }, - {"xor", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000000, OPCODE_MASK_H4, microblaze_xor, logical_inst }, -@@ -174,9 +190,14 @@ const struct op_code_struct - {"wic", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000068, OPCODE_MASK_H34B, wic, special_inst }, - {"wdc", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000064, OPCODE_MASK_H34B, wdc, special_inst }, - {"wdc.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000066, OPCODE_MASK_H34B, wdcclear, special_inst }, -+ {"wdc.ext.clear", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000466, OPCODE_MASK_H35B, wdcextclear, special_inst }, - {"wdc.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000074, OPCODE_MASK_H34B, wdcflush, special_inst }, -+ {"wdc.ext.flush", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000476, OPCODE_MASK_H35B, wdcextflush, special_inst }, -+ {"wdc.clear.ea", INST_TYPE_R1_R2_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E6, OPCODE_MASK_H34B, wdcclearea, special_inst }, - {"mts", INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9400C000, OPCODE_MASK_H13S, mts, special_inst }, -+ {"mtse", INST_TYPE_SPECIAL_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MTS, 0x9500C000, OPCODE_MASK_H13S, mtse,special_inst }, - {"mfs", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94008000, OPCODE_MASK_H23S, mfs, special_inst }, -+ {"mfse", INST_TYPE_RD_SPECIAL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_MFS, 0x94088000, OPCODE_MASK_H23S, mfse, special_inst }, - {"br", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98000000, OPCODE_MASK_H124, br, branch_inst }, - {"brd", INST_TYPE_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98100000, OPCODE_MASK_H124, brd, branch_inst }, - {"brld", INST_TYPE_RD_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98140000, OPCODE_MASK_H24, brld, branch_inst }, -@@ -226,18 +247,24 @@ const struct op_code_struct - {"bgeid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBEA00000, OPCODE_MASK_H1, bgeid, branch_inst }, - {"lbu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000000, OPCODE_MASK_H4, lbu, memory_load_inst }, - {"lbur", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000200, OPCODE_MASK_H4, lbur, memory_load_inst }, -+ {"lbuea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC0000080, OPCODE_MASK_H4, lbuea, memory_load_inst }, - {"lhu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000000, OPCODE_MASK_H4, lhu, memory_load_inst }, - {"lhur", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000200, OPCODE_MASK_H4, lhur, memory_load_inst }, -+ {"lhuea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC4000080, OPCODE_MASK_H4, lhuea, memory_load_inst }, - {"lw", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000000, OPCODE_MASK_H4, lw, memory_load_inst }, - {"lwr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000200, OPCODE_MASK_H4, lwr, memory_load_inst }, - {"lwx", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000400, OPCODE_MASK_H4, lwx, memory_load_inst }, -+ {"lwea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000080, OPCODE_MASK_H4, lwea, memory_load_inst }, - {"sb", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000000, OPCODE_MASK_H4, sb, memory_store_inst }, - {"sbr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000200, OPCODE_MASK_H4, sbr, memory_store_inst }, -+ {"sbea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD0000080, OPCODE_MASK_H4, sbea, memory_store_inst }, - {"sh", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000000, OPCODE_MASK_H4, sh, memory_store_inst }, - {"shr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000200, OPCODE_MASK_H4, shr, memory_store_inst }, -+ {"shea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD4000080, OPCODE_MASK_H4, shea, memory_store_inst }, - {"sw", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000000, OPCODE_MASK_H4, sw, memory_store_inst }, - {"swr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000200, OPCODE_MASK_H4, swr, memory_store_inst }, - {"swx", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000400, OPCODE_MASK_H4, swx, memory_store_inst }, -+ {"swea", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000080, OPCODE_MASK_H4, swea, memory_store_inst }, - {"lbui", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE0000000, OPCODE_MASK_H, lbui, memory_load_inst }, - {"lhui", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE4000000, OPCODE_MASK_H, lhui, memory_load_inst }, - {"lwi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, lwi, memory_load_inst }, -@@ -248,9 +275,7 @@ const struct op_code_struct - {"la", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* la translates to addik. */ - {"tuqula",INST_TYPE_RD, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3000002A, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* tuqula rd translates to addik rd, r0, 42. */ - {"not", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA800FFFF, OPCODE_MASK_H34, invalid_inst, logical_inst }, /* not translates to xori rd,ra,-1. */ -- {"neg", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0. */ - {"rtb", INST_TYPE_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6000004, OPCODE_MASK_H1, invalid_inst, return_inst }, /* rtb translates to rts rd, 4. */ -- {"sub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra. */ - {"lmi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, - {"smi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, - {"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst }, -@@ -402,8 +427,135 @@ const struct op_code_struct - {"clz", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34, clz, special_inst }, - {"mbar", INST_TYPE_IMM5, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN, mbar, special_inst }, - {"sleep", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBA020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 16. */ -+ {"hibernate", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB9020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 8. */ -+ {"suspend", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBB020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 24. */ - {"swapb", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4, swapb, arithmetic_inst }, - {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst }, -+ -+ /* 64-bit instructions */ -+ {"addl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x00000100, OPCODE_MASK_H4, addl, arithmetic_inst }, -+ {"rsubl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000100, OPCODE_MASK_H4, rsubl, arithmetic_inst }, -+ {"addlc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000100, OPCODE_MASK_H4, addlc, arithmetic_inst }, -+ {"rsublc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x0C000100, OPCODE_MASK_H4, rsublc, arithmetic_inst }, -+ {"addlk", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x10000100, OPCODE_MASK_H4, addlk, arithmetic_inst }, -+ {"rsublk", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000100, OPCODE_MASK_H4, rsublk, arithmetic_inst }, -+ {"addlkc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x18000100, OPCODE_MASK_H4, addlkc, arithmetic_inst }, -+ {"rsublkc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x1C000100, OPCODE_MASK_H4, rsublkc, arithmetic_inst }, -+ {"cmpl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst }, -+ {"cmplu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst }, -+ {"addli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x20000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"rsubli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x24000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"addlic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x28000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"rsublic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x2C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"addlik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"rsublik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x34000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"addlikc", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x38000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"rsublikc",INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ -+ {"mull", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000100, OPCODE_MASK_H4, mull, mult_inst }, -+ {"bslll", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000500, OPCODE_MASK_H3, bslll, barrel_shift_inst }, -+ {"bslra", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000300, OPCODE_MASK_H3, bslra, barrel_shift_inst }, -+ {"bslrl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000100, OPCODE_MASK_H3, bslrl, barrel_shift_inst }, -+ {"bsllli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002400, OPCODE_MASK_H3B, bsllli, barrel_shift_inst }, -+ {"bslrai", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002200, OPCODE_MASK_H3B, bslrai, barrel_shift_inst }, -+ {"bslrli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002000, OPCODE_MASK_H3B, bslrli, barrel_shift_inst }, -+ {"bslefi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64006000, OPCODE_MASK_H32B, bslefi, barrel_shift_inst }, -+ {"bslifi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6400a000, OPCODE_MASK_H32B, bslifi, barrel_shift_inst }, -+ {"orl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000100, OPCODE_MASK_H4, orl, logical_inst }, -+ {"andl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000100, OPCODE_MASK_H4, andl, logical_inst }, -+ {"xorl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000100, OPCODE_MASK_H4, xorl, logical_inst }, -+ {"andnl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000100, OPCODE_MASK_H4, andnl, logical_inst }, -+ {"pcmplbf", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000500, OPCODE_MASK_H4, pcmplbf, logical_inst }, -+ {"pcmpleq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000500, OPCODE_MASK_H4, pcmpleq, logical_inst }, -+ {"pcmplne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000500, OPCODE_MASK_H4, pcmplne, logical_inst }, -+ {"srla", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000101, OPCODE_MASK_H34, srla, logical_inst }, -+ {"srlc", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000121, OPCODE_MASK_H34, srlc, logical_inst }, -+ {"srll", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000141, OPCODE_MASK_H34, srll, logical_inst }, -+ {"sextl8", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000160, OPCODE_MASK_H34, sextl8, logical_inst }, -+ {"sextl16", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000161, OPCODE_MASK_H34, sextl16, logical_inst }, -+ {"sextl32", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000162, OPCODE_MASK_H34, sextl32, logical_inst }, -+ {"brea", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98010000, OPCODE_MASK_H124, brea, branch_inst }, -+ {"bread", INST_TYPE_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98110000, OPCODE_MASK_H124, bread, branch_inst }, -+ {"breald", INST_TYPE_RD_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98150000, OPCODE_MASK_H24, breald, branch_inst }, -+ {"beaeq", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D000000, OPCODE_MASK_H14, beaeq, branch_inst }, -+ {"bealeq", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D000100, OPCODE_MASK_H14, bealeq, branch_inst }, -+ {"beaeqd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F000000, OPCODE_MASK_H14, beaeqd, branch_inst }, -+ {"bealeqd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F000100, OPCODE_MASK_H14, bealeqd, branch_inst }, -+ {"beane", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D200000, OPCODE_MASK_H14, beane, branch_inst }, -+ {"bealne", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D200100, OPCODE_MASK_H14, bealne, branch_inst }, -+ {"beaned", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F200000, OPCODE_MASK_H14, beaned, branch_inst }, -+ {"bealned", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F200100, OPCODE_MASK_H14, bealned, branch_inst }, -+ {"bealt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D400000, OPCODE_MASK_H14, bealt, branch_inst }, -+ {"beallt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D400100, OPCODE_MASK_H14, beallt, branch_inst }, -+ {"bealtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F400000, OPCODE_MASK_H14, bealtd, branch_inst }, -+ {"bealltd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F400100, OPCODE_MASK_H14, bealltd, branch_inst }, -+ {"beale", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D600000, OPCODE_MASK_H14, beale, branch_inst }, -+ {"bealle", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D600100, OPCODE_MASK_H14, bealle, branch_inst }, -+ {"bealed", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F600000, OPCODE_MASK_H14, bealed, branch_inst }, -+ {"bealled", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F600100, OPCODE_MASK_H14, bealled, branch_inst }, -+ {"beagt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D800000, OPCODE_MASK_H14, beagt, branch_inst }, -+ {"bealgt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D800100, OPCODE_MASK_H14, bealgt, branch_inst }, -+ {"beagtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F800000, OPCODE_MASK_H14, beagtd, branch_inst }, -+ {"bealgtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F800100, OPCODE_MASK_H14, bealgtd, branch_inst }, -+ {"beage", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9DA00000, OPCODE_MASK_H14, beage, branch_inst }, -+ {"bealge", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9DA00100, OPCODE_MASK_H14, bealge, branch_inst }, -+ {"beaged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00000, OPCODE_MASK_H14, beaged, branch_inst }, -+ {"bealged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00100, OPCODE_MASK_H14, bealged, branch_inst }, -+ {"orli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA0000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ -+ {"andli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA4000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ -+ {"xorli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA8000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ -+ {"andnli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xAC000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ -+ {"imml", INST_TYPE_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB2000000, OPCODE_MASK_H8, imml, immediate_inst }, -+ {"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst }, -+ {"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst }, -+ {"brealid", INST_TYPE_RD_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8150000, OPCODE_MASK_H2, brealid, branch_inst }, -+ {"beaeqi", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD000000, OPCODE_MASK_H1, beaeqi, branch_inst }, -+ {"bealeqi", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD000000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaeqi */ -+ {"beaeqid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF000000, OPCODE_MASK_H1, beaeqid, branch_inst }, -+ {"bealeqid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF000000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaeqid */ -+ {"beanei", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD200000, OPCODE_MASK_H1, beanei, branch_inst }, -+ {"bealnei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD200000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beanei */ -+ {"beaneid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF200000, OPCODE_MASK_H1, beaneid, branch_inst }, -+ {"bealneid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF200000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaneid */ -+ {"bealti", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD400000, OPCODE_MASK_H1, bealti, branch_inst }, -+ {"beallti", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD400000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealti */ -+ {"bealtid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF400000, OPCODE_MASK_H1, bealtid, branch_inst }, -+ {"bealltid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF400000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealtid */ -+ {"bealei", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD600000, OPCODE_MASK_H1, bealei, branch_inst }, -+ {"beallei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD600000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealei */ -+ {"bealeid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF600000, OPCODE_MASK_H1, bealeid, branch_inst }, -+ {"bealleid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF600000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealeid */ -+ {"beagti", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD800000, OPCODE_MASK_H1, beagti, branch_inst }, -+ {"bealgti", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD800000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagti */ -+ {"beagtid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF800000, OPCODE_MASK_H1, beagtid, branch_inst }, -+ {"bealgtid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF800000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagtid */ -+ {"beagei", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBDA00000, OPCODE_MASK_H1, beagei, branch_inst }, -+ {"bealgei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBDA00000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagei */ -+ {"beageid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBFA00000, OPCODE_MASK_H1, beageid, branch_inst }, -+ {"bealgeid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBFA00000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beageid */ -+ {"ll", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000100, OPCODE_MASK_H4, ll, memory_load_inst }, -+ {"llr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000300, OPCODE_MASK_H4, llr, memory_load_inst }, -+ {"sl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000100, OPCODE_MASK_H4, sl, memory_store_inst }, -+ {"slr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000300, OPCODE_MASK_H4, slr, memory_store_inst }, -+ {"lli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xEC000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, /* Identical to 32-bit */ -+ {"sli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xFC000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, /* Identical to 32-bit */ -+ {"lla", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* lla translates to addlik */ -+ {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst }, -+ {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst }, -+ {"dmul", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000500, OPCODE_MASK_H4, dmul, arithmetic_inst }, -+ {"ddiv", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000580, OPCODE_MASK_H4, ddiv, arithmetic_inst }, -+ {"dcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000610, OPCODE_MASK_H4, dcmp_lt, arithmetic_inst }, -+ {"dcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000620, OPCODE_MASK_H4, dcmp_eq, arithmetic_inst }, -+ {"dcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000630, OPCODE_MASK_H4, dcmp_le, arithmetic_inst }, -+ {"dcmp.gt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000640, OPCODE_MASK_H4, dcmp_gt, arithmetic_inst }, -+ {"dcmp.ne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000650, OPCODE_MASK_H4, dcmp_ne, arithmetic_inst }, -+ {"dcmp.ge", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000660, OPCODE_MASK_H4, dcmp_ge, arithmetic_inst }, -+ {"dcmp.un", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000600, OPCODE_MASK_H4, dcmp_un, arithmetic_inst }, -+ {"dbl", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000680, OPCODE_MASK_H4, dbl, arithmetic_inst }, -+ {"dlong", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000700, OPCODE_MASK_H4, dlong, arithmetic_inst }, -+ {"dsqrt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000780, OPCODE_MASK_H4, dsqrt, arithmetic_inst }, -+ {"neg", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0. */ -+ {"sub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra. */ -+ - {"", 0, 0, 0, 0, 0, 0, 0, 0}, - }; - -@@ -424,5 +576,17 @@ char pvr_register_prefix[] = "rpvr"; - #define MIN_IMM5 ((int) 0x00000000) - #define MAX_IMM5 ((int) 0x0000001f) + int dummy; // declare something. -+#define MIN_IMM6 ((int) 0x00000000) -+#define MAX_IMM6 ((int) 0x0000003f) -+ -+#define MIN_IMM_WIDTH ((int) 0x00000001) -+#define MAX_IMM_WIDTH ((int) 0x00000020) -+ -+#define MIN_IMM6_WIDTH ((int) 0x00000001) -+#define MAX_IMM6_WIDTH ((int) 0x00000040) -+ -+#define MIN_IMML ((long) 0xffffff8000000000L) -+#define MAX_IMML ((long) 0x0000007fffffffffL) -+ - #endif /* MICROBLAZE_OPC */ - -diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h -index 8e293465fec..254d9fe911e 100644 ---- a/opcodes/microblaze-opcm.h -+++ b/opcodes/microblaze-opcm.h -@@ -25,22 +25,23 @@ - - enum microblaze_instr - { -+ /* 32-bit instructions */ - add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, clz, cmp, cmpu, - addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, - mulh, mulhu, mulhsu,swapb,swaph, - idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput, -- ncget, ncput, muli, bslli, bsrai, bsrli, mului, -+ ncget, ncput, muli, bslli, bsrai, bsrli, bsefi, bsifi, mului, - /* 'or/and/xor' are C++ keywords. */ - microblaze_or, microblaze_and, microblaze_xor, - andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, -- wic, wdc, wdcclear, wdcflush, mts, mfs, mbar, br, brd, -- brld, bra, brad, brald, microblaze_brk, beq, beqd, bne, bned, blt, -- bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni, -+ wic, wdc, wdcclear, wdcextclear, wdcflush, wdcextflush, wdcclearea, mts, mtse, -+ mfs, mfse, mbar, br, brd, brld, bra, brad, brald, microblaze_brk, beq, beqd, -+ bne, bned, blt, bltd, ble, bled, bgt, bgtd, bge, bged, ori, andi, xori, andni, - imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid, - brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, -- bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr, lwx, sb, sbr, sh, -- shr, sw, swr, swx, lbui, lhui, lwi, -- sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, -+ bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, -+ sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli, -+ sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, - fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, - /* 'fsqrt' is a glibc:math.h symbol. */ - fint, microblaze_fsqrt, -@@ -59,6 +60,18 @@ enum microblaze_instr - aputd, taputd, caputd, tcaputd, naputd, tnaputd, ncaputd, tncaputd, - eagetd, teagetd, ecagetd, tecagetd, neagetd, tneagetd, necagetd, tnecagetd, - eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd, -+ -+ /* 64-bit instructions */ -+ addl, rsubl, addlc, rsublc, addlk, rsublk, addlkc, rsublkc, cmpl, cmplu, mull, -+ bslll, bslra, bslrl, bsllli, bslrai, bslrli, bslefi, bslifi, orl, andl, xorl, -+ andnl, pcmplbf, pcmpleq, pcmplne, srla, srlc, srll, sextl8, sextl16, sextl32, -+ brea, bread, breald, beaeq, bealeq, beaeqd, bealeqd, beane, bealne, beaned, -+ bealned, bealt, beallt, bealtd, bealltd, beale, bealle, bealed, bealled, beagt, -+ bealgt, beagtd, bealgtd, beage, bealge, beaged, bealged, breai, breaid, brealid, -+ beaeqi, beaeqid, beanei, beaneid, bealti, bealtid, bealei, bealeid, beagti, -+ beagtid, beagei, beageid, imml, ll, llr, sl, slr, -+ dadd, drsub, dmul, ddiv, dcmp_lt, dcmp_eq, dcmp_le, dcmp_gt, dcmp_ne, dcmp_ge, -+ dcmp_un, dbl, dlong, dsqrt, - invalid_inst ++ enum microblaze_abi microblaze_abi {}; ++ enum microblaze_abi found_abi {}; + /* Register sets. */ + struct regset *gregset; + size_t sizeof_gregset; + struct regset *fpregset; + size_t sizeof_fpregset; ++ int register_size; }; -@@ -130,18 +143,25 @@ enum microblaze_instr_type - #define RB_LOW 11 /* Low bit for RB. */ - #define IMM_LOW 0 /* Low bit for immediate. */ - #define IMM_MBAR 21 /* low bit for mbar instruction. */ -+#define IMM_WIDTH_LOW 6 /* Low bit for immediate width */ - - #define RD_MASK 0x03E00000 - #define RA_MASK 0x001F0000 - #define RB_MASK 0x0000F800 - #define IMM_MASK 0x0000FFFF -+#define IMML_MASK 0x00FFFFFF - --/* Imm mask for barrel shifts. */ -+/* Imm masks for barrel shifts. */ - #define IMM5_MASK 0x0000001F -+#define IMM6_MASK 0x0000003F - - /* Imm mask for mbar. */ - #define IMM5_MBAR_MASK 0x03E00000 - -+/* Imm masks for extract/insert width. */ -+#define IMM5_WIDTH_MASK 0x000007C0 -+#define IMM6_WIDTH_MASK 0x00000FC0 -+ - /* FSL imm mask for get, put instructions. */ - #define RFSL_MASK 0x000000F - + /* Register numbers. */ -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0008-Patch-MicroBlaze.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Depth-Total-number-of-inline-functions-refer-inline-.patch similarity index 54% rename from meta-microblaze/recipes-devtools/gdb/gdb/0008-Patch-MicroBlaze.patch rename to meta-microblaze/recipes-devtools/binutils/binutils/0009-Depth-Total-number-of-inline-functions-refer-inline-.patch index 941a3b9c7..6ec184d0e 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0008-Patch-MicroBlaze.patch +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0009-Depth-Total-number-of-inline-functions-refer-inline-.patch @@ -1,32 +1,41 @@ -From 0532b1db08b9d8efc670f7288fe2d8168b8ed0d1 Mon Sep 17 00:00:00 2001 +From bd2d24cf21943babe2e0a73cf68da273a38d7058 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Thu, 21 Jul 2022 11:45:01 +0530 -Subject: [PATCH 8/8] =?UTF-8?q?[Patch,MicroBlaze]:=20Depth:=20=20Total=20n?= - =?UTF-8?q?umber=20of=20inline=20functions=20[refer=20inline-frame.c]=20st?= - =?UTF-8?q?ate->skipped=5Fframes=20:=20Number=20of=20inline=20functions=20?= - =?UTF-8?q?skipped.=20the=20current=20unwind=5Fpc=20is=20causing=20an=20is?= - =?UTF-8?q?sue=20when=20we=20try=20to=20step=20into=20inline=20functions[D?= - =?UTF-8?q?epth=20is=20becoming=200].=20It=E2=80=99s=20incrementing=20pc?= - =?UTF-8?q?=20by=208=20even=20with=20si=20instruction.?= +Subject: [PATCH 09/53] =?UTF-8?q?Depth:=20Total=20number=20of=20inline=20f?= + =?UTF-8?q?unctions=20[refer=20inline-frame.c]=20state->skipped=5Fframes?= + =?UTF-8?q?=20:=20Number=20of=20inline=20functions=20skipped.=20the=20curr?= + =?UTF-8?q?ent=20unwind=5Fpc=20is=20causing=20an=20issue=20when=20we=20try?= + =?UTF-8?q?=20to=20step=20into=20inline=20functions[Depth=20is=20becoming?= + =?UTF-8?q?=200].=20It=E2=80=99s=20incrementing=20pc=20by=208=20even=20wit?= + =?UTF-8?q?h=20si=20instruction.?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - +Signed-off-by: Aayush Misra --- - gdb/microblaze-tdep.c | 14 +++----------- - 1 file changed, 3 insertions(+), 11 deletions(-) + gdb/features/microblaze64.xml | 1 + + gdb/microblaze-tdep.c | 14 +++----------- + 2 files changed, 4 insertions(+), 11 deletions(-) +diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml +index 515d18e65cf..9c1b7d22003 100644 +--- a/gdb/features/microblaze64.xml ++++ b/gdb/features/microblaze64.xml +@@ -7,5 +7,6 @@ + + + ++ microblaze64 + + diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index d83072cdaef..38ba38e8c7d 100644 +index 597507e53cd..aed5f2ec30c 100644 --- a/gdb/microblaze-tdep.c +++ b/gdb/microblaze-tdep.c @@ -513,16 +513,8 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, static CORE_ADDR - microblaze_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) + microblaze_unwind_pc (struct gdbarch *gdbarch, frame_info_ptr next_frame) { - gdb_byte buf[4]; CORE_ADDR pc; @@ -61,5 +70,5 @@ index d83072cdaef..38ba38e8c7d 100644 static CORE_ADDR -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0010-Fix-gdb-14-build-errors-for-microblaze-xilinx-elf-20.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0010-Fix-gdb-14-build-errors-for-microblaze-xilinx-elf-20.patch new file mode 100644 index 000000000..78e4970b2 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0010-Fix-gdb-14-build-errors-for-microblaze-xilinx-elf-20.patch @@ -0,0 +1,133 @@ +From 3616ef25911d9fa8b5c0e4883f19131da48896d5 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 29 Feb 2024 10:53:04 +0530 +Subject: [PATCH 10/53] Fix gdb-14 build errors for microblaze-xilinx-elf + 2023.2 merge + +Signed-off-by: Aayush Misra +--- + bfd/elf64-microblaze.c | 12 ++++++++++++ + gdb/frame.c | 2 +- + gdb/microblaze-tdep.c | 17 +++++++++++------ + 3 files changed, 24 insertions(+), 7 deletions(-) + +diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c +index 6cd9753a592..119d266f95a 100755 +--- a/bfd/elf64-microblaze.c ++++ b/bfd/elf64-microblaze.c +@@ -750,6 +750,18 @@ microblaze_elf_info_to_howto (bfd * abfd, + return true; + } + ++/* Relax table contains information about instructions which can ++ be removed by relaxation -- replacing a long address with a ++ short address. */ ++struct relax_table ++{ ++ /* Address where bytes may be deleted. */ ++ bfd_vma addr; ++ ++ /* Number of bytes to be deleted. */ ++ size_t size; ++}; ++ + struct _microblaze_elf_section_data + { + struct bfd_elf_section_data elf; +diff --git a/gdb/frame.c b/gdb/frame.c +index 859e1a6553d..94bb026c4d9 100644 +--- a/gdb/frame.c ++++ b/gdb/frame.c +@@ -1319,7 +1319,7 @@ frame_unwind_register_value (frame_info_ptr next_frame, int regnum) + int i; + + const gdb_byte *buf = NULL; +- if (value_entirely_available(value)) { ++ if (value->entirely_available()) { + gdb::array_view buf = value->contents (); + } + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index aed5f2ec30c..e1a7a49eb84 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -75,7 +75,7 @@ static const char *const microblaze_abi_strings[] = { + enum microblaze_abi + microblaze_abi (struct gdbarch *gdbarch) + { +- microblaze_gdbarch_tdep *tdep = (microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); ++ microblaze_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + return tdep->microblaze_abi; + } + /* The registers of the Xilinx microblaze processor. */ +@@ -120,12 +120,12 @@ show_microblaze_abi (struct ui_file *file, + + #if 1 + if (global_abi == MICROBLAZE_ABI_AUTO) +- fprintf_filtered ++ gdb_printf + (file, + "The microblaze ABI is set automatically (currently \"%s\").\n", + actual_abi_str); + else if (global_abi == actual_abi) +- fprintf_filtered ++ gdb_printf + (file, + "The microblaze ABI is assumed to be \"%s\" (due to user setting).\n", + actual_abi_str); +@@ -133,7 +133,7 @@ show_microblaze_abi (struct ui_file *file, + { + #endif + /* Probably shouldn't happen... */ +- fprintf_filtered (file, ++ gdb_printf (file, + "The (auto detected) microblaze ABI \"%s\" is in use " + "even though the user setting was \"%s\".\n", + actual_abi_str, microblaze_abi_strings[global_abi]); +@@ -934,7 +934,7 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, + void *cb_data, + const struct regcache *regcache) + { +- struct microblaze_gdbarch_tdep *tdep =(microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); ++ microblaze_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data); + +@@ -942,6 +942,8 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, + } + + ++#if 0 ++// compilation errors - function is not actually used ? + static void + make_regs (struct gdbarch *arch) + { +@@ -953,6 +955,7 @@ make_regs (struct gdbarch *arch) + set_gdbarch_ptr_bit (arch, 64); + } + } ++#endif + + static struct gdbarch * + microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -964,7 +967,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + /* What has the user specified from the command line? */ + wanted_abi = global_microblaze_abi (); + if (gdbarch_debug) +- fprintf_unfiltered (gdb_stdlog, "microblaze_gdbarch_init: wanted_abi = %d\n", ++ gdb_printf (gdb_stdlog, "microblaze_gdbarch_init: wanted_abi = %d\n", + wanted_abi); + if (wanted_abi != MICROBLAZE_ABI_AUTO) + microblaze_abi = wanted_abi; +@@ -1038,6 +1041,8 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + gdbarch *gdbarch + = gdbarch_alloc (&info, gdbarch_tdep_up (new microblaze_gdbarch_tdep)); + ++ microblaze_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); ++ + tdep->gregset = NULL; + tdep->sizeof_gregset = 0; + tdep->fpregset = NULL; +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0011-fix-gdb-microblaze-xilinx-elf-crash-issue-on-invocat.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0011-fix-gdb-microblaze-xilinx-elf-crash-issue-on-invocat.patch new file mode 100644 index 000000000..d3da41d58 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0011-fix-gdb-microblaze-xilinx-elf-crash-issue-on-invocat.patch @@ -0,0 +1,28 @@ +From 9037b1a9e862263ba935314e8604a922d14c8dd4 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 29 Feb 2024 10:55:16 +0530 +Subject: [PATCH 11/53] fix gdb microblaze-xilinx-elf crash issue on invocation + Regression from merging microblaze 64-bit support + +Signed-off-by: Aayush Misra +--- + gdb/microblaze-tdep.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index e1a7a49eb84..f9cb3dfda33 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -1124,6 +1124,9 @@ void _initialize_microblaze_tdep (); + void + _initialize_microblaze_tdep () + { ++ //Setting abi to auto manually, should be able to modify in 'arch'_gdbarch_init function ++ microblaze_abi_string = microblaze_abi_strings[0]; ++ + gdbarch_register (bfd_arch_microblaze, microblaze_gdbarch_init); + + // static struct cmd_list_element *setmicroblazecmdlist = NULL; +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0012-Add-mlittle-endian-and-mbig-endian-flags.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0012-Add-mlittle-endian-and-mbig-endian-flags.patch new file mode 100644 index 000000000..e1074c851 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0012-Add-mlittle-endian-and-mbig-endian-flags.patch @@ -0,0 +1,46 @@ +From 05a5677c1b5cd7f109c49e6697b6716f7ac0fb97 Mon Sep 17 00:00:00 2001 +From: nagaraju +Date: Tue, 19 Mar 2013 17:18:23 +0530 +Subject: [PATCH 12/53] Add mlittle-endian and mbig-endian flags + +Added support in gas for mlittle-endian and mbig-endian flags +as options. + +Updated show usage for MicroBlaze specific assembler options +to include new entries. + +Signed-off-by:nagaraju +Signed-off-by: David Holsgrove +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index c971d187095..62238646a52 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -37,6 +37,8 @@ + + #define OPTION_EB (OPTION_MD_BASE + 0) + #define OPTION_EL (OPTION_MD_BASE + 1) ++#define OPTION_LITTLE (OPTION_MD_BASE + 2) ++#define OPTION_BIG (OPTION_MD_BASE + 3) + + void microblaze_generate_symbol (char *sym); + static bool check_spl_reg (unsigned *); +@@ -2565,9 +2567,11 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) + switch (c) + { + case OPTION_EB: ++ case OPTION_BIG: + target_big_endian = 1; + break; + case OPTION_EL: ++ case OPTION_LITTLE: + target_big_endian = 0; + break; + default: +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0013-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0013-Disable-the-warning-message-for-eh_frame_hdr.patch new file mode 100644 index 000000000..31529d0df --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0013-Disable-the-warning-message-for-eh_frame_hdr.patch @@ -0,0 +1,35 @@ +From a622ee3ff40515edf05a61a77fbcd8999ecf0905 Mon Sep 17 00:00:00 2001 +From: "Edgar E. Iglesias" +Date: Fri, 22 Jun 2012 01:20:20 +0200 +Subject: [PATCH 13/53] Disable the warning message for eh_frame_hdr + +Signed-off-by: Edgar E. Iglesias + +Conflicts: + bfd/elf-eh-frame.c +Signed-off-by: Aayush Misra +--- + bfd/elf-eh-frame.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c +index 9a504234163..5e393558293 100644 +--- a/bfd/elf-eh-frame.c ++++ b/bfd/elf-eh-frame.c +@@ -1045,10 +1045,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, + goto success; + + free_no_table: ++/* FIXME: Remove the microblaze specifics when relaxing gets fixed. */ ++if (bfd_get_arch(abfd) != bfd_arch_microblaze) { + _bfd_error_handler + /* xgettext:c-format */ + (_("error in %pB(%pA); no .eh_frame_hdr table will be created"), + abfd, sec); ++} + hdr_info->u.dwarf.table = false; + free (sec_info); + success: +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0014-Fix-relaxation-of-assembler-resolved-references-Fixu.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0014-Fix-relaxation-of-assembler-resolved-references-Fixu.patch new file mode 100644 index 000000000..7574067d9 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0014-Fix-relaxation-of-assembler-resolved-references-Fixu.patch @@ -0,0 +1,48 @@ +From 965a464418e8c8968453206f27763043fb38dc64 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Tue, 8 Nov 2016 11:54:08 +0530 +Subject: [PATCH 14/53] Fix relaxation of assembler resolved references,Fixup + debug_loc sections after linker relaxation Adds a new reloctype + R_MICROBLAZE_32_NONE, used for passing reloc info from the assembler to the + linker when the linker manages to fully resolve a local symbol reference. + +This is a workaround for design flaws in the assembler to +linker interface with regards to linker relaxation. + +Signed-off-by: Edgar E. Iglesias +Signed-off-by: David Holsgrove + +Conflicts: + bfd/elf32-microblaze.c + binutils/readelf.c + include/elf/microblaze.h + +Conflicts: + binutils/readelf.c + +Conflicts: + bfd/elf32-microblaze.c +Signed-off-by: Aayush Misra +--- + binutils/readelf.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/binutils/readelf.c b/binutils/readelf.c +index 5e4ad6ea6ad..3ca9f3697d1 100644 +--- a/binutils/readelf.c ++++ b/binutils/readelf.c +@@ -15288,6 +15288,11 @@ is_8bit_abs_reloc (Filedata * filedata, unsigned int reloc_type) + || reloc_type == 9 /* R_MICROBLAZE_64_NONE. */); + default: + return false; ++ /* REVISIT microblaze-binutils-merge */ ++ case EM_MICROBLAZE: ++ return reloc_type == 33 /* R_MICROBLAZE_32_NONE. */ ++ || reloc_type == 0 /* R_MICROBLAZE_NONE. */ ++ || reloc_type == 9; /* R_MICROBLAZE_64_NONE. */ + } + } + +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0015-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0015-upstream-change-to-garbage-collection-sweep-causes-m.patch new file mode 100644 index 000000000..c46af2e7b --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0015-upstream-change-to-garbage-collection-sweep-causes-m.patch @@ -0,0 +1,43 @@ +From 07743ed9395bfea466cdbdf0bbe9566fa93165de Mon Sep 17 00:00:00 2001 +From: David Holsgrove +Date: Wed, 27 Feb 2013 13:56:11 +1000 +Subject: [PATCH 15/53] upstream change to garbage collection sweep causes mb + regression + +Upstream change for PR13177 now clears the def_regular during gc_sweep of a +section. (All other archs in binutils/bfd/elf32-*.c received an update +to a warning about unresolvable relocations - this warning is not present +in binutils/bfd/elf32-microblaze.c, but this warning check would not +prevent the error being seen) + +The visible issue with this change is when running a c++ application +in Petalinux which links libstdc++.so for exception handling it segfaults +on execution. + +This does not occur if static linking libstdc++.a, so its during the +relocations for a shared lib with garbage collection this occurs + +Signed-off-by: David Holsgrove + +Conflicts: + bfd/elflink.c +Signed-off-by: Aayush Misra +--- + bfd/elflink.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/bfd/elflink.c b/bfd/elflink.c +index c2494b3e12e..1f8f54cd4e6 100644 +--- a/bfd/elflink.c ++++ b/bfd/elflink.c +@@ -6633,7 +6633,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data) + + inf = (struct elf_gc_sweep_symbol_info *) data; + (*inf->hide_symbol) (inf->info, h, true); +- h->def_regular = 0; + h->ref_regular = 0; + h->ref_regular_nonweak = 0; + } +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0016-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0016-Add-new-bit-field-instructions.patch new file mode 100644 index 000000000..aab6c5d11 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0016-Add-new-bit-field-instructions.patch @@ -0,0 +1,219 @@ +From 39ef5af3dd4551b24a47c8e48af67478183a7149 Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Mon, 18 Jul 2016 12:24:28 +0530 +Subject: [PATCH 16/53] Add new bit-field instructions + +This patches adds new bsefi and bsifi instructions. +BSEFI- The instruction shall extract a bit field from a +register and place it right-adjusted in the destination register. +The other bits in the destination register shall be set to zero +BSIFI- The instruction shall insert a right-adjusted bit field +from a register at another position in the destination register. +The rest of the bits in the destination register shall be unchanged + +Signed-off-by :Nagaraju Mekala + +Conflicts: + opcodes/microblaze-dis.c + +Conflicts: + gas/config/tc-microblaze.c + opcodes/microblaze-opc.h + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 82 ++++++++++++++++---------------------- + opcodes/microblaze-dis.c | 18 ++++++++- + opcodes/microblaze-opc.h | 6 +++ + 3 files changed, 58 insertions(+), 48 deletions(-) + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 62238646a52..f13efcae979 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -1150,88 +1150,76 @@ md_assemble (char * str) + inst |= (reg2 << RA_LOW) & RA_MASK; + inst |= (immed << IMM_LOW) & IMM5_MASK; + break; +- +- case INST_TYPE_RD_R1_IMMW_IMMS: ++ case INST_TYPE_RD_R1_IMM5_IMM5: + if (strcmp (op_end, "")) +- op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ ++ op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ + else + { +- as_fatal (_("Error in statement syntax")); +- reg1 = 0; +- } +- ++ as_fatal (_("Error in statement syntax")); ++ reg1 = 0; ++ } + if (strcmp (op_end, "")) +- op_end = parse_reg (op_end + 1, ®2); /* Get r1. */ ++ op_end = parse_reg (op_end + 1, ®2); /* Get r1. */ + else + { +- as_fatal (_("Error in statement syntax")); +- reg2 = 0; +- } ++ as_fatal (_("Error in statement syntax")); ++ reg2 = 0; ++ } + + /* Check for spl registers. */ + if (check_spl_reg (®1)) +- as_fatal (_("Cannot use special register with this instruction")); ++ as_fatal (_("Cannot use special register with this instruction")); + if (check_spl_reg (®2)) +- as_fatal (_("Cannot use special register with this instruction")); ++ as_fatal (_("Cannot use special register with this instruction")); + + /* Width immediate value. */ + if (strcmp (op_end, "")) +- op_end = parse_imm (op_end + 1, &exp, MIN_IMM_WIDTH, MAX_IMM_WIDTH); ++ op_end = parse_imm (op_end + 1, &exp, MIN_IMM_WIDTH, MAX_IMM_WIDTH); + else +- as_fatal (_("Error in statement syntax")); +- ++ as_fatal (_("Error in statement syntax")); + if (exp.X_op != O_constant) + { +- as_warn (_( +- "Symbol used as immediate width value for bit field instruction")); +- immed = 1; +- } ++ as_warn (_("Symbol used as immediate width value for bit field instruction")); ++ immed = 1; ++ } + else +- immed = exp.X_add_number; +- ++ immed = exp.X_add_number; + if (opcode->instr == bsefi && immed > 31) +- as_fatal (_("Width value must be less than 32")); ++ as_fatal (_("Width value must be less than 32")); + + /* Shift immediate value. */ + if (strcmp (op_end, "")) +- op_end = parse_imm (op_end + 1, &exp, MIN_IMM, MAX_IMM); ++ op_end = parse_imm (op_end + 1, &exp, MIN_IMM, MAX_IMM); + else +- as_fatal (_("Error in statement syntax")); +- ++ as_fatal (_("Error in statement syntax")); + if (exp.X_op != O_constant) +- { +- as_warn (_( +- "Symbol used as immediate shift value for bit field instruction")); +- immed2 = 0; +- } ++ { ++ as_warn (_("Symbol used as immediate shift value for bit field instruction")); ++ immed2 = 0; ++ } + else +- { +- output = frag_more (isize); +- immed2 = exp.X_add_number; +- } +- ++ { ++ output = frag_more (isize); ++ immed2 = exp.X_add_number; ++ } + if (immed2 != (immed2 % 32)) +- { +- as_warn (_("Shift value greater than 32. using ")); +- immed2 = immed2 % 32; +- } ++ { ++ as_warn (_("Shift value greater than 32. using ")); ++ immed2 = immed2 % 32; ++ } + + /* Check combined value. */ + if (immed + immed2 > 32) +- as_fatal (_("Width value + shift value must not be greater than 32")); ++ as_fatal (_("Width value + shift value must not be greater than 32")); + + inst |= (reg1 << RD_LOW) & RD_MASK; + inst |= (reg2 << RA_LOW) & RA_MASK; +- + if (opcode->instr == bsefi) +- inst |= (immed & IMM5_MASK) << IMM_WIDTH_LOW; /* bsefi */ ++ inst |= (immed & IMM5_MASK) << IMM_WIDTH_LOW; /* bsefi */ + else +- inst |= ((immed + immed2 - 1) & IMM5_MASK) +- << IMM_WIDTH_LOW; /* bsifi */ +- ++ inst |= ((immed + immed2 - 1) & IMM5_MASK) << IMM_WIDTH_LOW; /* bsifi */ + inst |= (immed2 << IMM_LOW) & IMM5_MASK; + break; +- + case INST_TYPE_R1_R2: + if (strcmp (op_end, "")) + op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index ee447cecc3f..45135f9d264 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c +@@ -113,7 +113,19 @@ get_field_immw (struct string_buf *buf, long instr) + } + + static char * +-get_field_rfsl (struct string_buf *buf, long instr) ++get_field_imm5width (struct string_buf *buf, long instr) ++{ ++ char *p = strbuf (buf); ++ ++ if (instr & 0x00004000) ++ sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ ++ else ++ sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */ ++ return p; ++} ++ ++static char * ++get_field_rfsl (struct string_buf *buf,long instr) + { + char *p = strbuf (buf); + +@@ -462,6 +474,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), + get_field_immw (&buf, inst), get_field_imms (&buf, inst)); + break; ++ /* For bit field insns. */ ++ case INST_TYPE_RD_R1_IMM5_IMM5: ++ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst)); ++ break; + /* For tuqula instruction */ + case INST_TYPE_RD: + print_func (stream, "\t%s", get_field_rd (&buf, inst)); +diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h +index afc1220e357..a952b9ac3c2 100644 +--- a/opcodes/microblaze-opc.h ++++ b/opcodes/microblaze-opc.h +@@ -67,6 +67,9 @@ + #define INST_TYPE_RD_R1_IMML 23 + #define INST_TYPE_R1_IMML 24 + ++/* For bsefi and bsifi */ ++#define INST_TYPE_RD_R1_IMM5_IMM5 21 ++ + #define INST_TYPE_NONE 25 + + +@@ -586,5 +589,8 @@ char pvr_register_prefix[] = "rpvr"; + #define MIN_IMML ((long) 0xffffff8000000000L) + #define MAX_IMML ((long) 0x0000007fffffffffL) + ++#define MIN_IMM_WIDTH ((int) 0x00000001) ++#define MAX_IMM_WIDTH ((int) 0x00000020) ++ + #endif /* MICROBLAZE_OPC */ + +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0017-fixed-bug-in-GCC-so-that-It-will-support-.long-0U-an.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0017-fixed-bug-in-GCC-so-that-It-will-support-.long-0U-an.patch new file mode 100644 index 000000000..f679971d4 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0017-fixed-bug-in-GCC-so-that-It-will-support-.long-0U-an.patch @@ -0,0 +1,34 @@ +From ea27bc6ec052b20f4c193054ecdef9bd4ecbcde7 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Fri, 29 Sep 2017 18:00:23 +0530 +Subject: [PATCH 17/53] fixed bug in GCC so that It will support .long 0U and + .long 0u + +Signed-off-by: Aayush Misra +--- + gas/expr.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/gas/expr.c b/gas/expr.c +index 3a01b88e310..8214bdf3263 100644 +--- a/gas/expr.c ++++ b/gas/expr.c +@@ -833,6 +833,15 @@ operand (expressionS *expressionP, enum expr_mode mode) + break; + } + } ++ if ((*input_line_pointer == 'U') || (*input_line_pointer == 'u')) ++ { ++ input_line_pointer--; ++ ++ integer_constant ((NUMBERS_WITH_SUFFIX || flag_m68k_mri) ++ ? 0 : 10, ++ expressionP); ++ break; ++ } + c = *input_line_pointer; + switch (c) + { +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Compiler-will-give-error-messages-in-more-detail-for.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Compiler-will-give-error-messages-in-more-detail-for.patch new file mode 100644 index 000000000..c63f4566b --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Compiler-will-give-error-messages-in-more-detail-for.patch @@ -0,0 +1,37 @@ +From 3056650d65b5bfa34bf16cd1ee7829a64dfb19ac Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Wed, 21 Feb 2018 12:32:02 +0530 +Subject: [PATCH 18/53] Compiler will give error messages in more detail for + mxl-gp-opt flag.. + +Signed-off-by: Aayush Misra +--- + ld/ldmain.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/ld/ldmain.c b/ld/ldmain.c +index e90c2021b33..e135939fade 100644 +--- a/ld/ldmain.c ++++ b/ld/ldmain.c +@@ -1575,6 +1575,18 @@ reloc_overflow (struct bfd_link_info *info, + break; + case bfd_link_hash_defined: + case bfd_link_hash_defweak: ++ ++ if((strcmp(reloc_name,"R_MICROBLAZE_SRW32") == 0) && entry->type == bfd_link_hash_defined) ++ { ++ einfo (_(" relocation truncated to fit: don't enable small data pointer optimizations[mxl-gp-opt] if extern or multiple declarations used: " ++ "%s against symbol `%T' defined in %A section in %B"), ++ reloc_name, entry->root.string, ++ entry->u.def.section, ++ entry->u.def.section == bfd_abs_section_ptr ++ ? info->output_bfd : entry->u.def.section->owner); ++ break; ++ } ++ + einfo (_(" relocation truncated to fit: " + "%s against symbol `%pT' defined in %pA section in %pB"), + reloc_name, entry->root.string, +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0019-initial-support-for-MicroBlaze-64-bit-m64.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0019-initial-support-for-MicroBlaze-64-bit-m64.patch new file mode 100644 index 000000000..452c14186 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0019-initial-support-for-MicroBlaze-64-bit-m64.patch @@ -0,0 +1,202 @@ +From 06c3e8ef9bdea329af1099e14abbde3d76a114a9 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 1 Nov 2021 19:06:53 +0530 +Subject: [PATCH 19/53] initial support for MicroBlaze 64 bit [-m64] + +Conflicts: + bfd/elf32-microblaze.c + include/elf/common.h + ld/Makefile.am + ld/Makefile.in +signed-off-by:Nagaraju Mekala + Mahesh Bodapati + +Signed-off-by: Aayush Misra +--- + bfd/bfd-in2.h | 14 ++++++++++++-- + bfd/libbfd.h | 2 ++ + bfd/reloc.c | 18 +++++++++++++++--- + gas/config/tc-microblaze.h | 4 +++- + ld/Makefile.am | 2 ++ + ld/configure.tgt | 3 +++ + opcodes/microblaze-dis.c | 8 ++++++-- + opcodes/microblaze-opc.h | 11 +++++++---- + 8 files changed, 50 insertions(+), 12 deletions(-) + +diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h +index 7ccc155394d..8b2815d7303 100644 +--- a/bfd/bfd-in2.h ++++ b/bfd/bfd-in2.h +@@ -6472,8 +6472,13 @@ done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_64_NONE, + + /* This is a 64 bit reloc that stores the 32 bit pc relative value in +- two words (with an imm instruction). The relocation is PC-relative +- GOT offset. */ ++ two words (with an imm instruction). No relocation is done here ++ only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64, ++ ++/* This is a 64 bit reloc that stores the 32 bit pc relative ++value in two words (with an imm instruction). The relocation is ++PC-relative GOT offset */ + BFD_RELOC_MICROBLAZE_64_GOTPC, + + /* This is a 64 bit reloc that stores the 32 bit pc relative +@@ -6481,6 +6486,11 @@ value in two words (with an imml instruction). The relocation is + PC-relative GOT offset */ + BFD_RELOC_MICROBLAZE_64_GPC, + ++/* This is a 64 bit reloc that stores the 32 bit pc relative ++value in two words (with an imml instruction). The relocation is ++PC-relative GOT offset */ ++ BFD_RELOC_MICROBLAZE_64_GPC, ++ + /* This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). The relocation is + GOT offset */ +diff --git a/bfd/libbfd.h b/bfd/libbfd.h +index 7a3e558d70a..603ed8260cb 100644 +--- a/bfd/libbfd.h ++++ b/bfd/libbfd.h +@@ -3005,7 +3005,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", + "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", + "BFD_RELOC_MICROBLAZE_32_NONE", + "BFD_RELOC_MICROBLAZE_64_NONE", ++ "BFD_RELOC_MICROBLAZE_64", + "BFD_RELOC_MICROBLAZE_64_GOTPC", ++ "BFD_RELOC_MICROBLAZE_64_GPC", + "BFD_RELOC_MICROBLAZE_64_GOT", + "BFD_RELOC_MICROBLAZE_64_PLT", + "BFD_RELOC_MICROBLAZE_64_GOTOFF", +diff --git a/bfd/reloc.c b/bfd/reloc.c +index fda67e5ffda..3e8647f601e 100644 +--- a/bfd/reloc.c ++++ b/bfd/reloc.c +@@ -6677,12 +6677,24 @@ ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative value in + two words (with an imm instruction). No relocation is done here - + only used for relaxing. ++ENUM ++ BFD_RELOC_MICROBLAZE_64 ++ENUMDOC ++ This is a 64 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imm instruction). No relocation is ++ done here - only used for relaxing + ENUM + BFD_RELOC_MICROBLAZE_64_GOTPC + ENUMDOC +- This is a 64 bit reloc that stores the 32 bit pc relative value in +- two words (with an imm instruction). The relocation is PC-relative +- GOT offset. ++ This is a 64 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++ BFD_RELOC_MICROBLAZE_64_GPC ++ENUMDOC ++ This is a 64 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imm instruction). The relocation is ++ PC-relative GOT offset + ENUM + BFD_RELOC_MICROBLAZE_64_GOT + ENUMDOC +diff --git a/gas/config/tc-microblaze.h b/gas/config/tc-microblaze.h +index 20d0da5496d..f0f861c3373 100644 +--- a/gas/config/tc-microblaze.h ++++ b/gas/config/tc-microblaze.h +@@ -81,7 +81,9 @@ extern const struct relax_type md_relax_table[]; + + #ifdef OBJ_ELF + +-#define TARGET_FORMAT (target_big_endian ? "elf32-microblaze" : "elf32-microblazeel") ++#define TARGET_FORMAT microblaze_target_format() ++extern const char *microblaze_target_format (void); ++//#define TARGET_FORMAT (target_big_endian ? "elf32-microblaze" : "elf32-microblazeel") + + #define ELF_TC_SPECIAL_SECTIONS \ + { ".sdata", SHT_PROGBITS, SHF_ALLOC + SHF_WRITE }, \ +diff --git a/ld/Makefile.am b/ld/Makefile.am +index f9ee05b1400..c1daf842444 100644 +--- a/ld/Makefile.am ++++ b/ld/Makefile.am +@@ -424,6 +424,8 @@ ALL_64_EMULATION_SOURCES = \ + eelf32ltsmipn32.c \ + eelf32ltsmipn32_fbsd.c \ + eelf32mipswindiss.c \ ++ eelf64microblazeel.c \ ++ eelf64microblaze.c \ + eelf64_aix.c \ + eelf64_ia64.c \ + eelf64_ia64_fbsd.c \ +diff --git a/ld/configure.tgt b/ld/configure.tgt +index f937f78b876..a9d3004e445 100644 +--- a/ld/configure.tgt ++++ b/ld/configure.tgt +@@ -527,6 +527,9 @@ microblaze*-linux*) targ_emul="elf32mb_linux" + microblazeel*) targ_emul=elf32microblazeel + targ_extra_emuls=elf32microblaze + ;; ++microblazeel64*) targ_emul=elf64microblazeel ++ targ_extra_emuls=elf64microblaze ++ ;; + microblaze*) targ_emul=elf32microblaze + targ_extra_emuls=elf32microblazeel + ;; +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index 45135f9d264..45262aef909 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c +@@ -457,6 +457,10 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + case INST_TYPE_R1_R2_SPECIAL: + print_func (stream, "\t%s, %s", get_field_r1 (&buf, inst), + get_field_r2 (&buf, inst)); ++ break; ++ case INST_TYPE_IMML: ++ print_func (stream, "\t%s", get_field_imml (&buf, inst)); ++ /* TODO: Also print symbol */ + break; + case INST_TYPE_RD_IMM15: + print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), +@@ -475,8 +479,8 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + get_field_immw (&buf, inst), get_field_imms (&buf, inst)); + break; + /* For bit field insns. */ +- case INST_TYPE_RD_R1_IMM5_IMM5: +- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst)); ++ case INST_TYPE_RD_R1_IMMW_IMMS: ++ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst)); + break; + /* For tuqula instruction */ + case INST_TYPE_RD: +diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h +index a952b9ac3c2..d9d05721dae 100644 +--- a/opcodes/microblaze-opc.h ++++ b/opcodes/microblaze-opc.h +@@ -68,7 +68,13 @@ + #define INST_TYPE_R1_IMML 24 + + /* For bsefi and bsifi */ +-#define INST_TYPE_RD_R1_IMM5_IMM5 21 ++#define INST_TYPE_RD_R1_IMMW_IMMS 21 ++ ++/* For 64-bit instructions */ ++#define INST_TYPE_IMML 22 ++#define INST_TYPE_RD_R1_IMML 23 ++#define INST_TYPE_R1_IMML 24 ++#define INST_TYPE_RD_R1_IMMW_IMMS 21 + + #define INST_TYPE_NONE 25 + +@@ -589,8 +595,5 @@ char pvr_register_prefix[] = "rpvr"; + #define MIN_IMML ((long) 0xffffff8000000000L) + #define MAX_IMML ((long) 0x0000007fffffffffL) + +-#define MIN_IMM_WIDTH ((int) 0x00000001) +-#define MAX_IMM_WIDTH ((int) 0x00000020) +- + #endif /* MICROBLAZE_OPC */ + +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0020-initial-support-for-MicroBlaze-64-bit-m64.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0020-initial-support-for-MicroBlaze-64-bit-m64.patch new file mode 100644 index 000000000..f3073f1e0 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0020-initial-support-for-MicroBlaze-64-bit-m64.patch @@ -0,0 +1,82 @@ +From f46a81a4ffa73453403a5e99e7005a8f1d974ecf Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 1 Nov 2021 19:06:53 +0530 +Subject: [PATCH 20/53] initial support for MicroBlaze 64 bit [-m64] + +Conflicts: + bfd/elf32-microblaze.c + include/elf/common.h + ld/Makefile.am + ld/Makefile.in +signed-off-by:Nagaraju Mekala + Mahesh Bodapati + +Signed-off-by: Aayush Misra +--- + ld/emulparams/elf64microblaze.sh | 23 +++++++++++++++++++++++ + ld/emulparams/elf64microblazeel.sh | 23 +++++++++++++++++++++++ + 2 files changed, 46 insertions(+) + create mode 100644 ld/emulparams/elf64microblaze.sh + create mode 100644 ld/emulparams/elf64microblazeel.sh + +diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh +new file mode 100644 +index 00000000000..9c7b0eb7080 +--- /dev/null ++++ b/ld/emulparams/elf64microblaze.sh +@@ -0,0 +1,23 @@ ++SCRIPT_NAME=elfmicroblaze ++OUTPUT_FORMAT="elf64-microblazeel" ++#BIG_OUTPUT_FORMAT="elf64-microblaze" ++LITTLE_OUTPUT_FORMAT="elf64-microblazeel" ++#TEXT_START_ADDR=0 ++NONPAGED_TEXT_START_ADDR=0x28 ++ALIGNMENT=4 ++MAXPAGESIZE=4 ++ARCH=microblaze ++EMBEDDED=yes ++ ++NOP=0x80000000 ++ ++# Hmmm, there's got to be a better way. This sets the stack to the ++# top of the simulator memory (2^19 bytes). ++#PAGE_SIZE=0x1000 ++#DATA_ADDR=0x10000 ++#OTHER_RELOCATING_SECTIONS='.stack 0x7000 : { _stack = .; *(.stack) }' ++#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} ++#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' ++ ++TEMPLATE_NAME=elf32 ++#GENERATE_SHLIB_SCRIPT=yes +diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh +new file mode 100644 +index 00000000000..9c7b0eb7080 +--- /dev/null ++++ b/ld/emulparams/elf64microblazeel.sh +@@ -0,0 +1,23 @@ ++SCRIPT_NAME=elfmicroblaze ++OUTPUT_FORMAT="elf64-microblazeel" ++#BIG_OUTPUT_FORMAT="elf64-microblaze" ++LITTLE_OUTPUT_FORMAT="elf64-microblazeel" ++#TEXT_START_ADDR=0 ++NONPAGED_TEXT_START_ADDR=0x28 ++ALIGNMENT=4 ++MAXPAGESIZE=4 ++ARCH=microblaze ++EMBEDDED=yes ++ ++NOP=0x80000000 ++ ++# Hmmm, there's got to be a better way. This sets the stack to the ++# top of the simulator memory (2^19 bytes). ++#PAGE_SIZE=0x1000 ++#DATA_ADDR=0x10000 ++#OTHER_RELOCATING_SECTIONS='.stack 0x7000 : { _stack = .; *(.stack) }' ++#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} ++#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' ++ ++TEMPLATE_NAME=elf32 ++#GENERATE_SHLIB_SCRIPT=yes +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0021-Added-relocations-for-MB-X.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0021-Added-relocations-for-MB-X.patch new file mode 100644 index 000000000..24e0894d9 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0021-Added-relocations-for-MB-X.patch @@ -0,0 +1,108 @@ +From 39ba1e8a13828ac3c860a72b95c3abae024044b5 Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Tue, 11 Sep 2018 17:30:17 +0530 +Subject: [PATCH 21/53] Added relocations for MB-X + +Conflicts: + bfd/bfd-in2.h + gas/config/tc-microblaze.c + +Conflicts: + gas/config/tc-microblaze.c + +Signed-off-by: Aayush Misra +--- + bfd/reloc.c | 26 ++++++++++++++------------ + gas/config/tc-microblaze.c | 11 +++++++++++ + 2 files changed, 25 insertions(+), 12 deletions(-) + +diff --git a/bfd/reloc.c b/bfd/reloc.c +index 3e8647f601e..c5c0ce5d060 100644 +--- a/bfd/reloc.c ++++ b/bfd/reloc.c +@@ -6661,12 +6661,6 @@ ENUMDOC + the form "Symbol Op Symbol". + ENUM + BFD_RELOC_MICROBLAZE_32_NONE +-ENUMDOC +- This is a 32 bit reloc that stores the 32 bit pc relative value in +- two words (with an imm instruction). No relocation is done here - +- only used for relaxing. +-ENUM +- BFD_RELOC_MICROBLAZE_32_NONE + ENUMDOC + This is a 32 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). No relocation is +@@ -6685,12 +6679,6 @@ ENUMDOC + done here - only used for relaxing + ENUM + BFD_RELOC_MICROBLAZE_64_GOTPC +-ENUMDOC +- This is a 64 bit reloc that stores the 32 bit pc relative +- value in two words (with an imml instruction). No relocation is +- done here - only used for relaxing +-ENUM +- BFD_RELOC_MICROBLAZE_64_GPC + ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). The relocation is +@@ -7929,6 +7917,20 @@ ENUMX + ENUMDOC + Linux eBPF relocations. + ++ This is a 64 bit reloc that stores 64-bit thread pointer relative offset ++ to two words (uses imml instruction). ++ENUM ++BFD_RELOC_MICROBLAZE_64, ++ENUMDOC ++ This is a 64 bit reloc that stores the 64 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++BFD_RELOC_MICROBLAZE_64_PCREL, ++ENUMDOC ++ This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing + ENUM + BFD_RELOC_EPIPHANY_SIMM8 + ENUMDOC +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index f13efcae979..9b8b129e309 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -91,6 +91,8 @@ const char FLT_CHARS[] = "rRsSfFdDxXpP"; + #define TLSTPREL_OFFSET 16 + #define TEXT_OFFSET 17 + #define TEXT_PC_OFFSET 18 ++#define DEFINED_64_OFFSET 19 ++#define DEFINED_64_PC_OFFSET 20 + + /* Initialize the relax table. */ + const relax_typeS md_relax_table[] = +@@ -114,6 +116,8 @@ const relax_typeS md_relax_table[] = + { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */ + { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */ + { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */ ++ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }, /* 19: DEFINED_64_OFFSET. */ ++ { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 } /* 20: DEFINED_64_PC_OFFSET. */ + }; + + static htab_t opcode_hash_control; /* Opcode mnemonics. */ +@@ -2330,6 +2334,13 @@ md_estimate_size_before_relax (fragS * fragP, + /* Variable part does not change. */ + fragP->fr_var = INST_WORD_SIZE*2; + } ++ else if (streq (fragP->fr_opcode, str_microblaze_64)) ++ { ++ /* Used as an absolute value. */ ++ fragP->fr_subtype = DEFINED_64_OFFSET; ++ /* Variable part does not change. */ ++ fragP->fr_var = INST_WORD_SIZE; ++ } + else if (streq (fragP->fr_opcode, str_microblaze_ro_anchor)) + { + /* It is accessed using the small data read only anchor. */ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0022-initial-support-for-MicroBlaze-64-bit-m64.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0022-initial-support-for-MicroBlaze-64-bit-m64.patch new file mode 100644 index 000000000..5ef086bde --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0022-initial-support-for-MicroBlaze-64-bit-m64.patch @@ -0,0 +1,958 @@ +From 6e30e2ce72e9257daae0633a6b57e7a5c4c918f2 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 1 Nov 2021 19:06:53 +0530 +Subject: [PATCH 22/53] initial support for MicroBlaze 64 bit [-m64] + +Conflicts: + bfd/elf32-microblaze.c + include/elf/common.h + ld/Makefile.am + ld/Makefile.in +signed-off-by:Nagaraju Mekala + Mahesh Bodapati + +Signed-off-by: Aayush Misra +--- + bfd/elf64-microblaze.c | 8 + + bfd/reloc.c | 36 +-- + gas/config/tc-microblaze.c | 556 ++++++++++++++++++++++++++++++++----- + 3 files changed, 499 insertions(+), 101 deletions(-) + +diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c +index 119d266f95a..ca92df647c9 100755 +--- a/bfd/elf64-microblaze.c ++++ b/bfd/elf64-microblaze.c +@@ -1666,6 +1666,14 @@ microblaze_elf_relocate_section (bfd *output_bfd, + outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL); + outrel.r_addend = relocation + addend; + } ++ unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); ++ if (insn == 0xb2000000 || insn == 0xb2ffffff) ++ { ++ insn &= ~0x00ffffff; ++ insn |= (relocation >> 16) & 0xffffff; ++ bfd_put_32 (input_bfd, insn, ++ contents + offset + endian); ++ } + else + { + BFD_FAIL (); +diff --git a/bfd/reloc.c b/bfd/reloc.c +index c5c0ce5d060..6eb93e993f0 100644 +--- a/bfd/reloc.c ++++ b/bfd/reloc.c +@@ -6677,8 +6677,20 @@ ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). No relocation is + done here - only used for relaxing ++ENUM ++BFD_RELOC_MICROBLAZE_64_PCREL, ++ENUMDOC ++ This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing + ENUM + BFD_RELOC_MICROBLAZE_64_GOTPC ++ENUMDOC ++ This is a 64 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++ BFD_RELOC_MICROBLAZE_64_GPC + ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). The relocation is +@@ -7894,18 +7906,6 @@ ENUMDOC + + This is a 64 bit reloc that stores 64-bit thread pointer relative offset + to two words (uses imml instruction). +-ENUM +-BFD_RELOC_MICROBLAZE_64, +-ENUMDOC +- This is a 64 bit reloc that stores the 64 bit pc relative +- value in two words (with an imml instruction). No relocation is +- done here - only used for relaxing +-ENUM +-BFD_RELOC_MICROBLAZE_64_PCREL, +-ENUMDOC +- This is a 32 bit reloc that stores the 32 bit pc relative +- value in two words (with an imml instruction). No relocation is +- done here - only used for relaxing + ENUM + BFD_RELOC_BPF_64 + ENUMX +@@ -7919,18 +7919,6 @@ ENUMDOC + + This is a 64 bit reloc that stores 64-bit thread pointer relative offset + to two words (uses imml instruction). +-ENUM +-BFD_RELOC_MICROBLAZE_64, +-ENUMDOC +- This is a 64 bit reloc that stores the 64 bit pc relative +- value in two words (with an imml instruction). No relocation is +- done here - only used for relaxing +-ENUM +-BFD_RELOC_MICROBLAZE_64_PCREL, +-ENUMDOC +- This is a 32 bit reloc that stores the 32 bit pc relative +- value in two words (with an imml instruction). No relocation is +- done here - only used for relaxing + ENUM + BFD_RELOC_EPIPHANY_SIMM8 + ENUMDOC +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 9b8b129e309..6640266cc47 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -35,10 +35,13 @@ + #define streq(a,b) (strcmp (a, b) == 0) + #endif + ++static int microblaze_arch_size = 0; ++ + #define OPTION_EB (OPTION_MD_BASE + 0) + #define OPTION_EL (OPTION_MD_BASE + 1) + #define OPTION_LITTLE (OPTION_MD_BASE + 2) + #define OPTION_BIG (OPTION_MD_BASE + 3) ++#define OPTION_M64 (OPTION_MD_BASE + 4) + + void microblaze_generate_symbol (char *sym); + static bool check_spl_reg (unsigned *); +@@ -360,7 +363,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED) + Integer arg to pass to the function. */ + /* If the pseudo-op is not found in this table, it searches in the obj-elf.c, + and then in the read.c table. */ +-const pseudo_typeS md_pseudo_table[] = ++pseudo_typeS md_pseudo_table[] = + { + {"lcomm", microblaze_s_lcomm, 1}, + {"data8", cons, 1}, /* Same as byte. */ +@@ -369,6 +372,7 @@ const pseudo_typeS md_pseudo_table[] = + {"ent", s_func, 0}, /* Treat ent as function entry point. */ + {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ + {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section. */ ++ {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section. */ + {"weakext", microblaze_s_weakext, 0}, + {"rodata", microblaze_s_rdata, 0}, + {"sdata2", microblaze_s_rdata, 1}, +@@ -378,6 +382,7 @@ const pseudo_typeS md_pseudo_table[] = + #endif + {"sbss", microblaze_s_sbss, 0}, + {"word", cons, 4}, ++ {"dword", cons, 8}, + {"frame", s_ignore, 0}, + {"mask", s_ignore, 0}, /* Emitted by gcc. */ + {NULL, NULL, 0} +@@ -749,6 +754,74 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) + return new_pointer; + } + ++ static char * ++parse_imml (char * s, expressionS * e, long min, long max) ++{ ++ char *new_pointer; ++ char *atp; ++ int itype, ilen; ++ ++ ilen = 0; ++ ++ /* Find the start of "@GOT" or "@PLT" suffix (if any) */ ++ for (atp = s; *atp != '@'; atp++) ++ if (is_end_of_line[(unsigned char) *atp]) ++ break; ++ ++ if (*atp == '@') ++ { ++ itype = match_imm (atp + 1, &ilen); ++ if (itype != 0) ++ { ++ *atp = 0; ++ e->X_md = itype; ++ } ++ else ++ { ++ atp = NULL; ++ e->X_md = 0; ++ ilen = 0; ++ } ++ *atp = 0; ++ } ++ else ++ { ++ atp = NULL; ++ e->X_md = 0; ++ } ++ ++ if (atp && !GOT_symbol) ++ { ++ GOT_symbol = symbol_find_or_make (GOT_SYMBOL_NAME); ++ } ++ ++ new_pointer = parse_exp (s, e); ++ ++ if (!GOT_symbol && ! strncmp (s, GOT_SYMBOL_NAME, 20)) ++ { ++ GOT_symbol = symbol_find_or_make (GOT_SYMBOL_NAME); ++ } ++ ++ if (e->X_op == O_absent) ++ ; /* An error message has already been emitted. */ ++ else if ((e->X_op != O_constant && e->X_op != O_symbol) ) ++ as_fatal (_("operand must be a constant or a label")); ++ else if ((e->X_op == O_constant) && ((long) e->X_add_number < min ++ || (long) e->X_add_number > max)) ++ { ++ as_fatal (_("operand must be absolute in range %ld..%ld, not %ld"), ++ min, max, (long) e->X_add_number); ++ } ++ ++ if (atp) ++ { ++ *atp = '@'; /* restore back (needed?) */ ++ if (new_pointer >= atp) ++ new_pointer += ilen + 1; /* sizeof (imm_suffix) + 1 for '@' */ ++ } ++ return new_pointer; ++} ++ + static char * + check_got (int * got_type, int * got_len) + { +@@ -803,7 +876,7 @@ check_got (int * got_type, int * got_len) + extern bfd_reloc_code_real_type + parse_cons_expression_microblaze (expressionS *exp, int size) + { +- if (size == 4) ++ if (size == 4 || (microblaze_arch_size == 64 && size == 8)) + { + /* Handle @GOTOFF et.al. */ + char *save, *gotfree_copy; +@@ -835,6 +908,7 @@ parse_cons_expression_microblaze (expressionS *exp, int size) + + static const char * str_microblaze_ro_anchor = "RO"; + static const char * str_microblaze_rw_anchor = "RW"; ++static const char * str_microblaze_64 = "64"; + + static bool + check_spl_reg (unsigned * reg) +@@ -893,9 +967,10 @@ md_assemble (char * str) + unsigned reg2; + unsigned reg3; + unsigned isize; +- unsigned int immed = 0, immed2 = 0, temp; ++ unsigned long immed = 0, immed2 = 0, temp; + expressionS exp; + char name[20]; ++ long immedl; + + /* Drop leading whitespace. */ + while (ISSPACE (* str)) +@@ -1014,8 +1089,9 @@ md_assemble (char * str) + as_fatal (_("lmi pseudo instruction should not use a label in imm field")); + else if (streq (name, "smi")) + as_fatal (_("smi pseudo instruction should not use a label in imm field")); +- +- if (reg2 == REG_ROSDP) ++ if(streq (name, "lli") || streq (name, "sli")) ++ opc = str_microblaze_64; ++ else if (reg2 == REG_ROSDP) + opc = str_microblaze_ro_anchor; + else if (reg2 == REG_RWSDP) + opc = str_microblaze_rw_anchor; +@@ -1082,36 +1158,60 @@ md_assemble (char * str) + inst |= (immed << IMM_LOW) & IMM_MASK; + } + } +- else +- { +- temp = immed & 0xFFFF8000; +- if ((temp != 0) && (temp != 0xFFFF8000)) +- { ++ else if (streq (name, "lli") || streq (name, "sli")) ++ { ++ temp = immed & 0xFFFFFF8000; ++ if (temp != 0 && temp != 0xFFFFFF8000) ++ { + /* Needs an immediate inst. */ + opcode1 + = (struct op_code_struct *) str_hash_find (opcode_hash_control, +- "imm"); ++ "imml"); + if (opcode1 == NULL) + { +- as_bad (_("unknown opcode \"%s\""), "imm"); ++ as_bad (_("unknown opcode \"%s\""), "imml"); + return; + } +- + inst1 = opcode1->bit_sequence; +- inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK; ++ inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; + output[0] = INST_BYTE0 (inst1); + output[1] = INST_BYTE1 (inst1); + output[2] = INST_BYTE2 (inst1); + output[3] = INST_BYTE3 (inst1); + output = frag_more (isize); +- } +- inst |= (reg1 << RD_LOW) & RD_MASK; +- inst |= (reg2 << RA_LOW) & RA_MASK; +- inst |= (immed << IMM_LOW) & IMM_MASK; +- } ++ } ++ inst |= (reg1 << RD_LOW) & RD_MASK; ++ inst |= (reg2 << RA_LOW) & RA_MASK; ++ inst |= (immed << IMM_LOW) & IMM_MASK; ++ } ++ else ++ { ++ temp = immed & 0xFFFF8000; ++ if ((temp != 0) && (temp != 0xFFFF8000)) ++ { ++ /* Needs an immediate inst. */ ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imm"); ++ return; ++ } ++ ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ inst |= (reg1 << RD_LOW) & RD_MASK; ++ inst |= (reg2 << RA_LOW) & RA_MASK; ++ inst |= (immed << IMM_LOW) & IMM_MASK; ++ } + break; + +- case INST_TYPE_RD_R1_IMM5: ++ case INST_TYPE_RD_R1_IMMS: + if (strcmp (op_end, "")) + op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ + else +@@ -1145,16 +1245,22 @@ md_assemble (char * str) + immed = exp.X_add_number; + } + +- if (immed != (immed % 32)) ++ if ((immed != (immed % 32)) && ++ (opcode->instr == bslli || opcode->instr == bsrai || opcode->instr == bsrli)) + { + as_warn (_("Shift value > 32. using ")); + immed = immed % 32; + } ++ else if (immed != (immed % 64)) ++ { ++ as_warn (_("Shift value > 64. using ")); ++ immed = immed % 64; ++ } + inst |= (reg1 << RD_LOW) & RD_MASK; + inst |= (reg2 << RA_LOW) & RA_MASK; +- inst |= (immed << IMM_LOW) & IMM5_MASK; ++ inst |= (immed << IMM_LOW) & IMM6_MASK; + break; +- case INST_TYPE_RD_R1_IMM5_IMM5: ++ case INST_TYPE_RD_R1_IMMW_IMMS: + if (strcmp (op_end, "")) + op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ + else +@@ -1178,7 +1284,7 @@ md_assemble (char * str) + + /* Width immediate value. */ + if (strcmp (op_end, "")) +- op_end = parse_imm (op_end + 1, &exp, MIN_IMM_WIDTH, MAX_IMM_WIDTH); ++ op_end = parse_imm (op_end + 1, &exp, MIN_IMM, MAX_IMM); + else + as_fatal (_("Error in statement syntax")); + if (exp.X_op != O_constant) +@@ -1190,6 +1296,8 @@ md_assemble (char * str) + immed = exp.X_add_number; + if (opcode->instr == bsefi && immed > 31) + as_fatal (_("Width value must be less than 32")); ++ else if (opcode->instr == bslefi && immed > 63) ++ as_fatal (_("Width value must be less than 64")); + + /* Shift immediate value. */ + if (strcmp (op_end, "")) +@@ -1206,23 +1314,31 @@ md_assemble (char * str) + output = frag_more (isize); + immed2 = exp.X_add_number; + } +- if (immed2 != (immed2 % 32)) +- { +- as_warn (_("Shift value greater than 32. using ")); ++ if ((immed2 != (immed2 % 32)) && (opcode->instr == bsefi || opcode->instr == bsifi)) ++ { ++ ++ as_warn (_("Shift value greater than 32. using ")); + immed2 = immed2 % 32; + } ++ else if (immed2 != (immed2 % 64)) ++ { ++ as_warn (_("Shift value greater than 64. using ")); ++ immed2 = immed2 % 64; ++ } + + /* Check combined value. */ +- if (immed + immed2 > 32) ++ if ((immed + immed2 > 32) && (opcode->instr == bsefi || opcode->instr == bsifi)) + as_fatal (_("Width value + shift value must not be greater than 32")); ++ else if (immed + immed2 > 64) ++ as_fatal (_("Width value + shift value must not be greater than 64")); + + inst |= (reg1 << RD_LOW) & RD_MASK; + inst |= (reg2 << RA_LOW) & RA_MASK; +- if (opcode->instr == bsefi) +- inst |= (immed & IMM5_MASK) << IMM_WIDTH_LOW; /* bsefi */ ++ if (opcode->instr == bsefi || opcode->instr == bslefi) ++ inst |= (immed & IMM6_MASK) << IMM_WIDTH_LOW; /* bsefi or bslefi */ + else +- inst |= ((immed + immed2 - 1) & IMM5_MASK) << IMM_WIDTH_LOW; /* bsifi */ +- inst |= (immed2 << IMM_LOW) & IMM5_MASK; ++ inst |= ((immed + immed2 - 1) & IMM6_MASK) << IMM_WIDTH_LOW; /* bsifi or bslifi */ ++ inst |= (immed2 << IMM_LOW) & IMM6_MASK; + break; + case INST_TYPE_R1_R2: + if (strcmp (op_end, "")) +@@ -1722,12 +1838,20 @@ md_assemble (char * str) + case INST_TYPE_IMM: + if (streq (name, "imm")) + as_fatal (_("An IMM instruction should not be present in the .s file")); +- +- op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM); ++ if (microblaze_arch_size == 64) ++ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); ++ else ++ op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM); + + if (exp.X_op != O_constant) + { +- char *opc = NULL; ++ char *opc; ++ if (microblaze_arch_size == 64 && (streq (name, "breai") || ++ streq (name, "breaid") || ++ streq (name, "brai") || streq (name, "braid"))) ++ opc = str_microblaze_64; ++ else ++ opc = NULL; + relax_substateT subtype; + + if (exp.X_md != 0) +@@ -1750,29 +1874,53 @@ md_assemble (char * str) + immed = exp.X_add_number; + } + +- +- temp = immed & 0xFFFF8000; +- if ((temp != 0) && (temp != 0xFFFF8000)) +- { +- /* Needs an immediate inst. */ +- opcode1 +- = (struct op_code_struct *) str_hash_find (opcode_hash_control, +- "imm"); +- if (opcode1 == NULL) +- { +- as_bad (_("unknown opcode \"%s\""), "imm"); +- return; ++ if (microblaze_arch_size == 64 && (streq (name, "breai") || ++ streq (name, "breaid") || ++ streq (name, "brai") || streq (name, "braid"))) ++ { ++ temp = immed & 0xFFFFFF8000; ++ if (temp != 0) ++ { ++ /* Needs an immediate inst. */ ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); + } ++ inst |= (immed << IMM_LOW) & IMM_MASK; ++ } ++ else ++ { ++ temp = immed & 0xFFFF8000; ++ if ((temp != 0) && (temp != 0xFFFF8000)) ++ { ++ /* Needs an immediate inst. */ ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imm"); ++ return; ++ } + +- inst1 = opcode1->bit_sequence; +- inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK; +- output[0] = INST_BYTE0 (inst1); +- output[1] = INST_BYTE1 (inst1); +- output[2] = INST_BYTE2 (inst1); +- output[3] = INST_BYTE3 (inst1); +- output = frag_more (isize); +- } +- inst |= (immed << IMM_LOW) & IMM_MASK; ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ inst |= (immed << IMM_LOW) & IMM_MASK; ++ } + break; + + case INST_TYPE_NONE: +@@ -1903,6 +2051,7 @@ struct option md_longopts[] = + {"EL", no_argument, NULL, OPTION_EL}, + {"mlittle-endian", no_argument, NULL, OPTION_EL}, + {"mbig-endian", no_argument, NULL, OPTION_EB}, ++ {"m64", no_argument, NULL, OPTION_M64}, + { NULL, no_argument, NULL, 0} + }; + +@@ -1947,13 +2096,23 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, + fragP->fr_fix += INST_WORD_SIZE * 2; + fragP->fr_var = 0; + break; ++ case DEFINED_64_OFFSET: ++ if (fragP->fr_symbol == GOT_symbol) ++ fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol, ++ fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64_GPC); ++ else ++ fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol, ++ fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64); ++ fragP->fr_fix += INST_WORD_SIZE * 2; ++ fragP->fr_var = 0; ++ break; + case DEFINED_ABS_SEGMENT: + if (fragP->fr_symbol == GOT_symbol) + fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol, + fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64_GOTPC); + else + fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol, +- fragP->fr_offset, false, BFD_RELOC_64); ++ fragP->fr_offset, true, BFD_RELOC_64); + fragP->fr_fix += INST_WORD_SIZE * 2; + fragP->fr_var = 0; + break; +@@ -2174,23 +2333,38 @@ md_apply_fix (fixS * fixP, + case BFD_RELOC_64_PCREL: + case BFD_RELOC_64: + case BFD_RELOC_MICROBLAZE_64_TEXTREL: ++ case BFD_RELOC_MICROBLAZE_64: + /* Add an imm instruction. First save the current instruction. */ + for (i = 0; i < INST_WORD_SIZE; i++) + buf[i + INST_WORD_SIZE] = buf[i]; ++ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) ++ { ++ /* Generate the imm instruction. */ ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } + +- /* Generate the imm instruction. */ +- opcode1 +- = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm"); +- if (opcode1 == NULL) +- { +- as_bad (_("unknown opcode \"%s\""), "imm"); +- return; +- } +- +- inst1 = opcode1->bit_sequence; +- if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) +- inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK; +- ++ inst1 = opcode1->bit_sequence; ++ if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) ++ inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; ++ } ++ else ++ { ++ /* Generate the imm instruction. */ ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imm"); ++ return; ++ } ++ ++ inst1 = opcode1->bit_sequence; ++ if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) ++ inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK; ++ } + buf[0] = INST_BYTE0 (inst1); + buf[1] = INST_BYTE1 (inst1); + buf[2] = INST_BYTE2 (inst1); +@@ -2219,6 +2393,7 @@ md_apply_fix (fixS * fixP, + /* Fall through. */ + + case BFD_RELOC_MICROBLAZE_64_GOTPC: ++ case BFD_RELOC_MICROBLAZE_64_GPC: + case BFD_RELOC_MICROBLAZE_64_GOT: + case BFD_RELOC_MICROBLAZE_64_PLT: + case BFD_RELOC_MICROBLAZE_64_GOTOFF: +@@ -2226,13 +2401,17 @@ md_apply_fix (fixS * fixP, + /* Add an imm instruction. First save the current instruction. */ + for (i = 0; i < INST_WORD_SIZE; i++) + buf[i + INST_WORD_SIZE] = buf[i]; +- + /* Generate the imm instruction. */ +- opcode1 +- = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm"); ++ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC) ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ else ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm"); + if (opcode1 == NULL) + { +- as_bad (_("unknown opcode \"%s\""), "imm"); ++ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC) ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ else ++ as_bad (_("unknown opcode \"%s\""), "imm"); + return; + } + +@@ -2256,6 +2435,8 @@ md_apply_fix (fixS * fixP, + moves code around due to relaxing. */ + if (fixP->fx_r_type == BFD_RELOC_64_PCREL) + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; ++ else if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) ++ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; + else if (fixP->fx_r_type == BFD_RELOC_32) + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; + else +@@ -2298,6 +2479,32 @@ md_estimate_size_before_relax (fragS * fragP, + as_bad (_("Absolute PC-relative value in relaxation code. Assembler error.....")); + abort (); + } ++ else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type ++ && !S_IS_WEAK (fragP->fr_symbol)) ++ { ++ if (fragP->fr_opcode != NULL) { ++ if(streq (fragP->fr_opcode, str_microblaze_64)) ++ { ++ /* Used as an absolute value. */ ++ fragP->fr_subtype = DEFINED_64_OFFSET; ++ /* Variable part does not change. */ ++ fragP->fr_var = INST_WORD_SIZE; ++ } ++ else ++ { ++ fragP->fr_subtype = DEFINED_PC_OFFSET; ++ /* Don't know now whether we need an imm instruction. */ ++ fragP->fr_var = INST_WORD_SIZE; ++ } ++ } ++ else ++ { ++ fragP->fr_subtype = DEFINED_PC_OFFSET; ++ /* Don't know now whether we need an imm instruction. */ ++ fragP->fr_var = INST_WORD_SIZE; ++ } ++ } ++#if 0 + else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type && + !S_IS_WEAK (fragP->fr_symbol)) + { +@@ -2305,6 +2512,7 @@ md_estimate_size_before_relax (fragS * fragP, + /* Don't know now whether we need an imm instruction. */ + fragP->fr_var = INST_WORD_SIZE; + } ++#endif + else if (S_IS_DEFINED (fragP->fr_symbol) + && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0)) + { +@@ -2316,7 +2524,14 @@ md_estimate_size_before_relax (fragS * fragP, + } + else + { +- fragP->fr_subtype = UNDEFINED_PC_OFFSET; ++ if (fragP->fr_opcode != NULL) { ++ if (streq (fragP->fr_opcode, str_microblaze_64)) ++ fragP->fr_subtype = DEFINED_64_PC_OFFSET; ++ else ++ fragP->fr_subtype = UNDEFINED_PC_OFFSET; ++ } ++ else ++ fragP->fr_subtype = UNDEFINED_PC_OFFSET; + fragP->fr_var = INST_WORD_SIZE*2; + } + break; +@@ -2395,6 +2610,33 @@ md_estimate_size_before_relax (fragS * fragP, + abort (); + } + } ++#if 0 //revisit ++ else if (streq (name, "lli") || streq (name, "sli")) ++ { ++ temp = immed & 0xFFFFFFFFFFFF8000; ++ if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000)) ++ { ++ /* Needs an immediate inst. */ ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ inst |= (reg1 << RD_LOW) & RD_MASK; ++ inst |= (reg2 << RA_LOW) & RA_MASK; ++ inst |= (immed << IMM_LOW) & IMM_MASK; ++ } ++#endif + else + { + /* We know the abs value: Should never happen. */ +@@ -2414,6 +2656,7 @@ md_estimate_size_before_relax (fragS * fragP, + case TLSLD_OFFSET: + case TLSTPREL_OFFSET: + case TLSDTPREL_OFFSET: ++ case DEFINED_64_OFFSET: + fragP->fr_var = INST_WORD_SIZE*2; + break; + case DEFINED_RO_SEGMENT: +@@ -2467,7 +2710,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) + else + { + /* The case where we are going to resolve things... */ +- if (fixp->fx_r_type == BFD_RELOC_64_PCREL) ++ if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64) + return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE; + else + return fixp->fx_where + fixp->fx_frag->fr_address; +@@ -2500,6 +2743,8 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) + case BFD_RELOC_MICROBLAZE_32_RWSDA: + case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: + case BFD_RELOC_MICROBLAZE_64_GOTPC: ++ case BFD_RELOC_MICROBLAZE_64_GPC: ++ case BFD_RELOC_MICROBLAZE_64: + case BFD_RELOC_MICROBLAZE_64_GOT: + case BFD_RELOC_MICROBLAZE_64_PLT: + case BFD_RELOC_MICROBLAZE_64_GOTOFF: +@@ -2515,6 +2760,143 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) + case BFD_RELOC_MICROBLAZE_64_TEXTREL: + code = fixp->fx_r_type; + break; ++ /* For 64-bit instructions */ ++ case INST_TYPE_RD_R1_IMML: ++ if (strcmp (op_end, "")) ++ op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ ++ else ++ { ++ as_fatal (_("Error in statement syntax")); ++ reg1 = 0; ++ } ++ if (strcmp (op_end, "")) ++ op_end = parse_reg (op_end + 1, ®2); /* Get r1. */ ++ else ++ { ++ as_fatal (_("Error in statement syntax")); ++ reg2 = 0; ++ } ++ if (strcmp (op_end, "")) ++ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); ++ else ++ as_fatal (_("Error in statement syntax")); ++ ++ /* Check for spl registers. */ ++ if (check_spl_reg (& reg1)) ++ as_fatal (_("Cannot use special register with this instruction")); ++ if (check_spl_reg (& reg2)) ++ as_fatal (_("Cannot use special register with this instruction")); ++ ++ if (exp.X_op != O_constant) ++ { ++ char *opc = NULL; ++ //char *opc = str_microblaze_64; ++ relax_substateT subtype; ++ ++ if (exp.X_md != 0) ++ subtype = get_imm_otype(exp.X_md); ++ else ++ subtype = opcode->inst_offset_type; ++ ++ output = frag_var (rs_machine_dependent, ++ isize * 2, /* maxm of 2 words. */ ++ isize * 2, /* minm of 2 words. */ ++ subtype, /* PC-relative or not. */ ++ exp.X_add_symbol, ++ exp.X_add_number, ++ (char *) opc); ++ immedl = 0L; ++ } ++ else ++ { ++ output = frag_more (isize); ++ immedl = exp.X_add_number; ++ ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ ++ inst |= (reg1 << RD_LOW) & RD_MASK; ++ inst |= (reg2 << RA_LOW) & RA_MASK; ++ inst |= (immedl << IMM_LOW) & IMM_MASK; ++ break; ++ ++ case INST_TYPE_R1_IMML: ++ if (strcmp (op_end, "")) ++ op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ ++ else ++ { ++ as_fatal (_("Error in statement syntax")); ++ reg1 = 0; ++ } ++ if (strcmp (op_end, "")) ++ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); ++ else ++ as_fatal (_("Error in statement syntax")); ++ ++ /* Check for spl registers. */ ++ if (check_spl_reg (®1)) ++ as_fatal (_("Cannot use special register with this instruction")); ++ ++ if (exp.X_op != O_constant) ++ { ++ //char *opc = NULL; ++ char *opc = str_microblaze_64; ++ relax_substateT subtype; ++ ++ if (exp.X_md != 0) ++ subtype = get_imm_otype(exp.X_md); ++ else ++ subtype = opcode->inst_offset_type; ++ ++ output = frag_var (rs_machine_dependent, ++ isize * 2, /* maxm of 2 words. */ ++ isize * 2, /* minm of 2 words. */ ++ subtype, /* PC-relative or not. */ ++ exp.X_add_symbol, ++ exp.X_add_number, ++ (char *) opc); ++ immedl = 0L; ++ } ++ else ++ { ++ output = frag_more (isize); ++ immedl = exp.X_add_number; ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ ++ inst |= (reg1 << RA_LOW) & RA_MASK; ++ inst |= (immedl << IMM_LOW) & IMM_MASK; ++ break; ++ ++ case INST_TYPE_IMML: ++ as_fatal (_("An IMML instruction should not be present in the .s file")); ++ break; + + default: + switch (F (fixp->fx_size, fixp->fx_pcrel)) +@@ -2560,6 +2942,18 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) + return rel; + } + ++/* Called by TARGET_FORMAT. */ ++const char * ++microblaze_target_format (void) ++{ ++ ++ if (microblaze_arch_size == 64) ++ return "elf64-microblazeel"; ++ else ++ return target_big_endian ? "elf32-microblaze" : "elf32-microblazeel"; ++} ++ ++ + int + md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) + { +@@ -2573,6 +2967,10 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) + case OPTION_LITTLE: + target_big_endian = 0; + break; ++ case OPTION_M64: ++ //if (arg != NULL && strcmp (arg, "64") == 0) ++ microblaze_arch_size = 64; ++ break; + default: + return 0; + } +@@ -2588,6 +2986,7 @@ md_show_usage (FILE * stream ATTRIBUTE_UNUSED) + fprintf (stream, _(" MicroBlaze specific assembler options:\n")); + fprintf (stream, " -%-23s%s\n", "mbig-endian", N_("assemble for a big endian cpu")); + fprintf (stream, " -%-23s%s\n", "mlittle-endian", N_("assemble for a little endian cpu")); ++ fprintf (stream, " -%-23s%s\n", "m64", N_("generate 64-bit elf")); + } + + +@@ -2625,7 +3024,10 @@ cons_fix_new_microblaze (fragS * frag, + r = BFD_RELOC_32; + break; + case 8: +- r = BFD_RELOC_64; ++ if (microblaze_arch_size == 64) ++ r = BFD_RELOC_32; ++ else ++ r = BFD_RELOC_64; + break; + default: + as_bad (_("unsupported BFD relocation size %u"), size); +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0023-Added-relocations-for-MB-X.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Added-relocations-for-MB-X.patch new file mode 100644 index 000000000..f92dd0684 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0023-Added-relocations-for-MB-X.patch @@ -0,0 +1,246 @@ +From fb4a4d6855092f5b0b201e40234782822cd63a66 Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Tue, 11 Sep 2018 17:30:17 +0530 +Subject: [PATCH 23/53] Added relocations for MB-X + +Conflicts: + bfd/bfd-in2.h + gas/config/tc-microblaze.c + +Conflicts: + gas/config/tc-microblaze.c + +Signed-off-by: Aayush Misra +--- + bfd/libbfd.h | 2 -- + bfd/reloc.c | 26 ++++++++------- + gas/config/tc-microblaze.c | 68 ++++++++++++-------------------------- + 3 files changed, 36 insertions(+), 60 deletions(-) + +diff --git a/bfd/libbfd.h b/bfd/libbfd.h +index 603ed8260cb..7a3e558d70a 100644 +--- a/bfd/libbfd.h ++++ b/bfd/libbfd.h +@@ -3005,9 +3005,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", + "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", + "BFD_RELOC_MICROBLAZE_32_NONE", + "BFD_RELOC_MICROBLAZE_64_NONE", +- "BFD_RELOC_MICROBLAZE_64", + "BFD_RELOC_MICROBLAZE_64_GOTPC", +- "BFD_RELOC_MICROBLAZE_64_GPC", + "BFD_RELOC_MICROBLAZE_64_GOT", + "BFD_RELOC_MICROBLAZE_64_PLT", + "BFD_RELOC_MICROBLAZE_64_GOTOFF", +diff --git a/bfd/reloc.c b/bfd/reloc.c +index 6eb93e993f0..b6c9c22a0be 100644 +--- a/bfd/reloc.c ++++ b/bfd/reloc.c +@@ -6634,6 +6634,20 @@ ENUM + ENUMDOC + Address of a GOT entry. + ++ This is a 64 bit reloc that stores 64-bit thread pointer relative offset ++ to two words (uses imml instruction). ++ENUM ++BFD_RELOC_MICROBLAZE_64, ++ENUMDOC ++ This is a 64 bit reloc that stores the 64 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++BFD_RELOC_MICROBLAZE_64_PCREL, ++ENUMDOC ++ This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing + ENUM + BFD_RELOC_MICROBLAZE_32_LO + ENUMDOC +@@ -6671,12 +6685,6 @@ ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative value in + two words (with an imm instruction). No relocation is done here - + only used for relaxing. +-ENUM +- BFD_RELOC_MICROBLAZE_64 +-ENUMDOC +- This is a 64 bit reloc that stores the 32 bit pc relative +- value in two words (with an imm instruction). No relocation is +- done here - only used for relaxing + ENUM + BFD_RELOC_MICROBLAZE_64_PCREL, + ENUMDOC +@@ -6689,12 +6697,6 @@ ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imml instruction). No relocation is + done here - only used for relaxing +-ENUM +- BFD_RELOC_MICROBLAZE_64_GPC +-ENUMDOC +- This is a 64 bit reloc that stores the 32 bit pc relative +- value in two words (with an imm instruction). The relocation is +- PC-relative GOT offset + ENUM + BFD_RELOC_MICROBLAZE_64_GOT + ENUMDOC +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 6640266cc47..29fb6360169 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -2096,23 +2096,29 @@ md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, + fragP->fr_fix += INST_WORD_SIZE * 2; + fragP->fr_var = 0; + break; ++ case DEFINED_64_PC_OFFSET: ++ fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol, ++ fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_PCREL); ++ fragP->fr_fix += INST_WORD_SIZE * 2; ++ fragP->fr_var = 0; ++ break; + case DEFINED_64_OFFSET: + if (fragP->fr_symbol == GOT_symbol) + fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol, +- fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64_GPC); ++ fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_64_GPC); + else + fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE, fragP->fr_symbol, +- fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64); ++ fragP->fr_offset, false, BFD_RELOC_MICROBLAZE_64); + fragP->fr_fix += INST_WORD_SIZE * 2; + fragP->fr_var = 0; + break; + case DEFINED_ABS_SEGMENT: + if (fragP->fr_symbol == GOT_symbol) + fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol, +- fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64_GOTPC); ++ fragP->fr_offset, true, BFD_RELOC_MICROBLAZE_64_GOTPC); + else + fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol, +- fragP->fr_offset, true, BFD_RELOC_64); ++ fragP->fr_offset, false, BFD_RELOC_64); + fragP->fr_fix += INST_WORD_SIZE * 2; + fragP->fr_var = 0; + break; +@@ -2334,10 +2340,12 @@ md_apply_fix (fixS * fixP, + case BFD_RELOC_64: + case BFD_RELOC_MICROBLAZE_64_TEXTREL: + case BFD_RELOC_MICROBLAZE_64: ++ case BFD_RELOC_MICROBLAZE_64_PCREL: + /* Add an imm instruction. First save the current instruction. */ + for (i = 0; i < INST_WORD_SIZE; i++) + buf[i + INST_WORD_SIZE] = buf[i]; +- if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) ++ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64 ++ || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) + { + /* Generate the imm instruction. */ + opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); +@@ -2350,6 +2358,10 @@ md_apply_fix (fixS * fixP, + inst1 = opcode1->bit_sequence; + if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) + inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; ++ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) ++ fixP->fx_r_type = BFD_RELOC_64; ++ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) ++ fixP->fx_r_type = BFD_RELOC_64_PCREL; + } + else + { +@@ -2435,8 +2447,6 @@ md_apply_fix (fixS * fixP, + moves code around due to relaxing. */ + if (fixP->fx_r_type == BFD_RELOC_64_PCREL) + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; +- else if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) +- fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; + else if (fixP->fx_r_type == BFD_RELOC_32) + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; + else +@@ -2486,9 +2496,9 @@ md_estimate_size_before_relax (fragS * fragP, + if(streq (fragP->fr_opcode, str_microblaze_64)) + { + /* Used as an absolute value. */ +- fragP->fr_subtype = DEFINED_64_OFFSET; ++ fragP->fr_subtype = DEFINED_64_PC_OFFSET; + /* Variable part does not change. */ +- fragP->fr_var = INST_WORD_SIZE; ++ fragP->fr_var = INST_WORD_SIZE*2; + } + else + { +@@ -2504,15 +2514,6 @@ md_estimate_size_before_relax (fragS * fragP, + fragP->fr_var = INST_WORD_SIZE; + } + } +-#if 0 +- else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type && +- !S_IS_WEAK (fragP->fr_symbol)) +- { +- fragP->fr_subtype = DEFINED_PC_OFFSET; +- /* Don't know now whether we need an imm instruction. */ +- fragP->fr_var = INST_WORD_SIZE; +- } +-#endif + else if (S_IS_DEFINED (fragP->fr_symbol) + && (((S_GET_SEGMENT (fragP->fr_symbol))->flags & SEC_CODE) == 0)) + { +@@ -2610,33 +2611,6 @@ md_estimate_size_before_relax (fragS * fragP, + abort (); + } + } +-#if 0 //revisit +- else if (streq (name, "lli") || streq (name, "sli")) +- { +- temp = immed & 0xFFFFFFFFFFFF8000; +- if ((temp != 0) && (temp != 0xFFFFFFFFFFFF8000)) +- { +- /* Needs an immediate inst. */ +- opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); +- if (opcode1 == NULL) +- { +- as_bad (_("unknown opcode \"%s\""), "imml"); +- return; +- } +- +- inst1 = opcode1->bit_sequence; +- inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; +- output[0] = INST_BYTE0 (inst1); +- output[1] = INST_BYTE1 (inst1); +- output[2] = INST_BYTE2 (inst1); +- output[3] = INST_BYTE3 (inst1); +- output = frag_more (isize); +- } +- inst |= (reg1 << RD_LOW) & RD_MASK; +- inst |= (reg2 << RA_LOW) & RA_MASK; +- inst |= (immed << IMM_LOW) & IMM_MASK; +- } +-#endif + else + { + /* We know the abs value: Should never happen. */ +@@ -2657,6 +2631,7 @@ md_estimate_size_before_relax (fragS * fragP, + case TLSTPREL_OFFSET: + case TLSDTPREL_OFFSET: + case DEFINED_64_OFFSET: ++ case DEFINED_64_PC_OFFSET: + fragP->fr_var = INST_WORD_SIZE*2; + break; + case DEFINED_RO_SEGMENT: +@@ -2710,7 +2685,7 @@ md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) + else + { + /* The case where we are going to resolve things... */ +- if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64) ++ if (fixp->fx_r_type == BFD_RELOC_64_PCREL ||fixp->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) + return fixp->fx_where + fixp->fx_frag->fr_address + INST_WORD_SIZE; + else + return fixp->fx_where + fixp->fx_frag->fr_address; +@@ -2745,6 +2720,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) + case BFD_RELOC_MICROBLAZE_64_GOTPC: + case BFD_RELOC_MICROBLAZE_64_GPC: + case BFD_RELOC_MICROBLAZE_64: ++ case BFD_RELOC_MICROBLAZE_64_PCREL: + case BFD_RELOC_MICROBLAZE_64_GOT: + case BFD_RELOC_MICROBLAZE_64_PLT: + case BFD_RELOC_MICROBLAZE_64_GOTOFF: +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0024-Fixed-MB-x-relocation-issues-Added-imml-for-required.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0024-Fixed-MB-x-relocation-issues-Added-imml-for-required.patch new file mode 100644 index 000000000..18698b021 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0024-Fixed-MB-x-relocation-issues-Added-imml-for-required.patch @@ -0,0 +1,52 @@ +From 88f7a313f8e21021dacfc8da2c490a433f596fd8 Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Fri, 28 Sep 2018 12:04:55 +0530 +Subject: [PATCH 24/53] -Fixed MB-x relocation issues -Added imml for required + MB-x instructions + +Conflicts: + bfd/elf64-microblaze.c + gas/config/tc-microblaze.c + +Conflicts: + gas/config/tc-microblaze.c + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 29fb6360169..e43ea82a2cc 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -363,7 +363,7 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED) + Integer arg to pass to the function. */ + /* If the pseudo-op is not found in this table, it searches in the obj-elf.c, + and then in the read.c table. */ +-pseudo_typeS md_pseudo_table[] = ++const pseudo_typeS md_pseudo_table[] = + { + {"lcomm", microblaze_s_lcomm, 1}, + {"data8", cons, 1}, /* Same as byte. */ +@@ -2357,7 +2357,7 @@ md_apply_fix (fixS * fixP, + + inst1 = opcode1->bit_sequence; + if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) +- inst1 |= ((val & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; ++ inst1 |= ((val & 0xFFFFFF0000L) >> 16) & IMML_MASK; + if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) + fixP->fx_r_type = BFD_RELOC_64; + if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) +@@ -2946,6 +2946,8 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) + case OPTION_M64: + //if (arg != NULL && strcmp (arg, "64") == 0) + microblaze_arch_size = 64; ++ // UPSTREAM/REVISIT - md_pseudo_table is const ++ // md_pseudo_table[7].poc_val = 8; + break; + default: + return 0; +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0025-Fixed-address-computation-issues-with-64bit-address-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Fixed-address-computation-issues-with-64bit-address-.patch new file mode 100644 index 000000000..d480388cf --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0025-Fixed-address-computation-issues-with-64bit-address-.patch @@ -0,0 +1,160 @@ +From 585f95d1510385ed3f67e76e2ad8f9a27b3ee32a Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Tue, 9 Oct 2018 10:14:22 +0530 +Subject: [PATCH 25/53] - Fixed address computation issues with 64bit address - + Fixed imml dissassamble issue + +Conflicts: + gas/config/tc-microblaze.c + opcodes/microblaze-dis.c + +Conflicts: + bfd/elf64-microblaze.c + +Conflicts: + bfd/elf64-microblaze.c + +Signed-off-by: Aayush Misra +--- + bfd/elf64-microblaze.c | 2 +- + gas/config/tc-microblaze.c | 74 +++++++++++++++++++++++++++++++++----- + 2 files changed, 67 insertions(+), 9 deletions(-) + +diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c +index ca92df647c9..9f542f55ebd 100755 +--- a/bfd/elf64-microblaze.c ++++ b/bfd/elf64-microblaze.c +@@ -2131,7 +2131,7 @@ microblaze_elf_relax_section (bfd *abfd, + efix = calc_fixup (target_address, 0, sec); + + /* Validate the in-band val. */ +- val = bfd_get_32 (abfd, contents + irel->r_offset); ++ val = bfd_get_64 (abfd, contents + irel->r_offset); + if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { + fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); + } +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index e43ea82a2cc..544732649a5 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -372,7 +372,6 @@ const pseudo_typeS md_pseudo_table[] = + {"ent", s_func, 0}, /* Treat ent as function entry point. */ + {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ + {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section. */ +- {"gpdword", s_rva, 8}, /* gpword label => store resolved label address in data section. */ + {"weakext", microblaze_s_weakext, 0}, + {"rodata", microblaze_s_rdata, 0}, + {"sdata2", microblaze_s_rdata, 1}, +@@ -2317,18 +2316,74 @@ md_apply_fix (fixS * fixP, + case BFD_RELOC_RVA: + case BFD_RELOC_32_PCREL: + case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: ++ /* Don't do anything if the symbol is not defined. */ ++ if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) ++ { ++ if ((fixP->fx_r_type == BFD_RELOC_RVA) && (microblaze_arch_size == 64)) ++ { ++ if (target_big_endian) ++ { ++ buf[0] |= ((val >> 56) & 0xff); ++ buf[1] |= ((val >> 48) & 0xff); ++ buf[2] |= ((val >> 40) & 0xff); ++ buf[3] |= ((val >> 32) & 0xff); ++ buf[4] |= ((val >> 24) & 0xff); ++ buf[5] |= ((val >> 16) & 0xff); ++ buf[6] |= ((val >> 8) & 0xff); ++ buf[7] |= (val & 0xff); ++ } ++ else ++ { ++ buf[7] |= ((val >> 56) & 0xff); ++ buf[6] |= ((val >> 48) & 0xff); ++ buf[5] |= ((val >> 40) & 0xff); ++ buf[4] |= ((val >> 32) & 0xff); ++ buf[3] |= ((val >> 24) & 0xff); ++ buf[2] |= ((val >> 16) & 0xff); ++ buf[1] |= ((val >> 8) & 0xff); ++ buf[0] |= (val & 0xff); ++ } ++ } ++ else { ++ if (target_big_endian) ++ { ++ buf[0] |= ((val >> 24) & 0xff); ++ buf[1] |= ((val >> 16) & 0xff); ++ buf[2] |= ((val >> 8) & 0xff); ++ buf[3] |= (val & 0xff); ++ } ++ else ++ { ++ buf[3] |= ((val >> 24) & 0xff); ++ buf[2] |= ((val >> 16) & 0xff); ++ buf[1] |= ((val >> 8) & 0xff); ++ buf[0] |= (val & 0xff); ++ } ++ } ++ } ++ break; ++ ++ case BFD_RELOC_MICROBLAZE_EA64: + /* Don't do anything if the symbol is not defined. */ + if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) + { + if (target_big_endian) + { +- buf[0] |= ((val >> 24) & 0xff); +- buf[1] |= ((val >> 16) & 0xff); +- buf[2] |= ((val >> 8) & 0xff); +- buf[3] |= (val & 0xff); ++ buf[0] |= ((val >> 56) & 0xff); ++ buf[1] |= ((val >> 48) & 0xff); ++ buf[2] |= ((val >> 40) & 0xff); ++ buf[3] |= ((val >> 32) & 0xff); ++ buf[4] |= ((val >> 24) & 0xff); ++ buf[5] |= ((val >> 16) & 0xff); ++ buf[6] |= ((val >> 8) & 0xff); ++ buf[7] |= (val & 0xff); + } + else + { ++ buf[7] |= ((val >> 56) & 0xff); ++ buf[6] |= ((val >> 48) & 0xff); ++ buf[5] |= ((val >> 40) & 0xff); ++ buf[4] |= ((val >> 32) & 0xff); + buf[3] |= ((val >> 24) & 0xff); + buf[2] |= ((val >> 16) & 0xff); + buf[1] |= ((val >> 8) & 0xff); +@@ -2449,6 +2504,8 @@ md_apply_fix (fixS * fixP, + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_64_NONE; + else if (fixP->fx_r_type == BFD_RELOC_32) + fixP->fx_r_type = BFD_RELOC_MICROBLAZE_32_NONE; ++ else if(fixP->fx_r_type == BFD_RELOC_MICROBLAZE_EA64) ++ fixP->fx_r_type = BFD_RELOC_MICROBLAZE_EA64; + else + fixP->fx_r_type = BFD_RELOC_NONE; + fixP->fx_addsy = section_symbol (absolute_section); +@@ -2719,6 +2776,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) + case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: + case BFD_RELOC_MICROBLAZE_64_GOTPC: + case BFD_RELOC_MICROBLAZE_64_GPC: ++ case BFD_RELOC_MICROBLAZE_EA64: + case BFD_RELOC_MICROBLAZE_64: + case BFD_RELOC_MICROBLAZE_64_PCREL: + case BFD_RELOC_MICROBLAZE_64_GOT: +@@ -3002,10 +3060,10 @@ cons_fix_new_microblaze (fragS * frag, + r = BFD_RELOC_32; + break; + case 8: +- if (microblaze_arch_size == 64) ++ /*if (microblaze_arch_size == 64) + r = BFD_RELOC_32; +- else +- r = BFD_RELOC_64; ++ else*/ ++ r = BFD_RELOC_MICROBLAZE_EA64; + break; + default: + as_bad (_("unsupported BFD relocation size %u"), size); +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch new file mode 100644 index 000000000..03d8e0b8d --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0026-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch @@ -0,0 +1,110 @@ +From d3fd5a77fa218f8f6c296337758d45cab61483fe Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Tue, 2 Nov 2021 17:28:24 +0530 +Subject: [PATCH 26/53] [Patch,MicroBlaze : Adding new relocation to support + 64bit rodata. + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 49 ++++++++++++++++++++++++++++++++++---- + 1 file changed, 45 insertions(+), 4 deletions(-) + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 544732649a5..c9757796ae8 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -1090,6 +1090,13 @@ md_assemble (char * str) + as_fatal (_("smi pseudo instruction should not use a label in imm field")); + if(streq (name, "lli") || streq (name, "sli")) + opc = str_microblaze_64; ++ else if ((microblaze_arch_size == 64) && ((streq (name, "lbui") ++ || streq (name, "lhui") || streq (name, "lwi") || streq (name, "sbi") ++ || streq (name, "shi") || streq (name, "swi")))) ++ { ++ opc = str_microblaze_64; ++ subtype = opcode->inst_offset_type; ++ } + else if (reg2 == REG_ROSDP) + opc = str_microblaze_ro_anchor; + else if (reg2 == REG_RWSDP) +@@ -1157,7 +1164,10 @@ md_assemble (char * str) + inst |= (immed << IMM_LOW) & IMM_MASK; + } + } +- else if (streq (name, "lli") || streq (name, "sli")) ++ else if (streq (name, "lli") || streq (name, "sli") || ((microblaze_arch_size == 64) ++ && ((streq (name, "lbui")) || streq (name, "lhui") ++ || streq (name, "lwi") || streq (name, "sbi") ++ || streq (name, "shi") || streq (name, "swi")))) + { + temp = immed & 0xFFFFFF8000; + if (temp != 0 && temp != 0xFFFFFF8000) +@@ -1773,6 +1783,11 @@ md_assemble (char * str) + + if (exp.X_md != 0) + subtype = get_imm_otype(exp.X_md); ++ else if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai")) ++ { ++ opc = str_microblaze_64; ++ subtype = opcode->inst_offset_type; ++ } + else + subtype = opcode->inst_offset_type; + +@@ -1790,6 +1805,31 @@ md_assemble (char * str) + output = frag_more (isize); + immed = exp.X_add_number; + } ++ if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai")) ++ { ++ temp = immed & 0xFFFFFF8000; ++ if (temp != 0 && temp != 0xFFFFFF8000) ++ { ++ /* Needs an immediate inst. */ ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ inst |= (reg1 << RD_LOW) & RD_MASK; ++ inst |= (immed << IMM_LOW) & IMM_MASK; ++ } ++ else ++ { + + temp = immed & 0xFFFF8000; + if ((temp != 0) && (temp != 0xFFFF8000)) +@@ -1815,6 +1855,7 @@ md_assemble (char * str) + + inst |= (reg1 << RD_LOW) & RD_MASK; + inst |= (immed << IMM_LOW) & IMM_MASK; ++ } + break; + + case INST_TYPE_R2: +@@ -3060,10 +3101,10 @@ cons_fix_new_microblaze (fragS * frag, + r = BFD_RELOC_32; + break; + case 8: +- /*if (microblaze_arch_size == 64) +- r = BFD_RELOC_32; +- else*/ ++ if (microblaze_arch_size == 64) + r = BFD_RELOC_MICROBLAZE_EA64; ++ else ++ r = BFD_RELOC_64; + break; + default: + as_bad (_("unsupported BFD relocation size %u"), size); +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0027-Revert-ld-Remove-unused-expression-state-defsym-symb.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Revert-ld-Remove-unused-expression-state-defsym-symb.patch new file mode 100644 index 000000000..5a8992dfc --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0027-Revert-ld-Remove-unused-expression-state-defsym-symb.patch @@ -0,0 +1,84 @@ +From e89c2729322ce147e8a5a5e7842944593b4dd474 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Wed, 27 Feb 2019 15:12:32 +0530 +Subject: [PATCH 27/53] Revert "ld: Remove unused expression state" --defsym + symbol=expression Create a global symbol in the output file, containing the + absolute address given by expression. + +This reverts commit 65f14869fd3fbee8ed4c4ca49de8aaa86dbc66cb. + +Conflicts: + ld/ChangeLog + +Conflicts: + ld/ldexp.c + ld/ldexp.h + +Signed-off-by: Aayush Misra +--- + ld/ldexp.c | 8 +++++--- + ld/ldexp.h | 1 + + 2 files changed, 6 insertions(+), 3 deletions(-) + +diff --git a/ld/ldexp.c b/ld/ldexp.c +index 3c8ab2d3589..525f3e4262c 100644 +--- a/ld/ldexp.c ++++ b/ld/ldexp.c +@@ -1402,6 +1402,7 @@ static etree_type * + exp_assop (const char *dst, + etree_type *src, + enum node_tree_enum class, ++ bool defsym, + bool hidden) + { + etree_type *n; +@@ -1413,6 +1414,7 @@ exp_assop (const char *dst, + n->assign.type.node_class = class; + n->assign.src = src; + n->assign.dst = dst; ++ n->assign.defsym = defsym; + n->assign.hidden = hidden; + return n; + } +@@ -1422,7 +1424,7 @@ exp_assop (const char *dst, + etree_type * + exp_assign (const char *dst, etree_type *src, bool hidden) + { +- return exp_assop (dst, src, etree_assign, hidden); ++ return exp_assop (dst, src, etree_assign, false, hidden); + } + + /* Handle --defsym command-line option. */ +@@ -1430,7 +1432,7 @@ exp_assign (const char *dst, etree_type *src, bool hidden) + etree_type * + exp_defsym (const char *dst, etree_type *src) + { +- return exp_assop (dst, src, etree_assign, false); ++ return exp_assop (dst, src, etree_assign, true, false); + } + + /* Handle PROVIDE. */ +@@ -1438,7 +1440,7 @@ exp_defsym (const char *dst, etree_type *src) + etree_type * + exp_provide (const char *dst, etree_type *src, bool hidden) + { +- return exp_assop (dst, src, etree_provide, hidden); ++ return exp_assop (dst, src, etree_provide, false, hidden); + } + + /* Handle ASSERT. */ +diff --git a/ld/ldexp.h b/ld/ldexp.h +index c779729e900..6d583e1b15a 100644 +--- a/ld/ldexp.h ++++ b/ld/ldexp.h +@@ -66,6 +66,7 @@ typedef union etree_union { + node_type type; + const char *dst; + union etree_union *src; ++ bool defsym; + bool hidden; + } assign; + struct { +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0028-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0028-fixing-the-long-long-long-mingw-toolchain-issue.patch new file mode 100644 index 000000000..675ce3eed --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0028-fixing-the-long-long-long-mingw-toolchain-issue.patch @@ -0,0 +1,58 @@ +From 21eacbba925e2aaceaf3d3400030ae61a1aa4fef Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Thu, 29 Nov 2018 17:59:25 +0530 +Subject: [PATCH 28/53] fixing the long & long long mingw toolchain issue + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 10 +++++----- + opcodes/microblaze-opc.h | 4 ++-- + 2 files changed, 7 insertions(+), 7 deletions(-) + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index c9757796ae8..a8194d175e1 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -754,7 +754,7 @@ parse_imm (char * s, expressionS * e, offsetT min, offsetT max) + } + + static char * +-parse_imml (char * s, expressionS * e, long min, long max) ++parse_imml (char * s, expressionS * e, long long min, long long max) + { + char *new_pointer; + char *atp; +@@ -805,11 +805,11 @@ parse_imml (char * s, expressionS * e, long min, long max) + ; /* An error message has already been emitted. */ + else if ((e->X_op != O_constant && e->X_op != O_symbol) ) + as_fatal (_("operand must be a constant or a label")); +- else if ((e->X_op == O_constant) && ((long) e->X_add_number < min +- || (long) e->X_add_number > max)) ++ else if ((e->X_op == O_constant) && ((long long) e->X_add_number < min ++ || (long long) e->X_add_number > max)) + { +- as_fatal (_("operand must be absolute in range %ld..%ld, not %ld"), +- min, max, (long) e->X_add_number); ++ as_fatal (_("operand must be absolute in range %lld..%lld, not %lld"), ++ min, max, (long long) e->X_add_number); + } + + if (atp) +diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h +index d9d05721dae..f85f5a600cc 100644 +--- a/opcodes/microblaze-opc.h ++++ b/opcodes/microblaze-opc.h +@@ -592,8 +592,8 @@ char pvr_register_prefix[] = "rpvr"; + #define MIN_IMM6_WIDTH ((int) 0x00000001) + #define MAX_IMM6_WIDTH ((int) 0x00000040) + +-#define MIN_IMML ((long) 0xffffff8000000000L) +-#define MAX_IMML ((long) 0x0000007fffffffffL) ++#define MIN_IMML ((long long) 0xffffff8000000000L) ++#define MAX_IMML ((long long) 0x0000007fffffffffL) + + #endif /* MICROBLAZE_OPC */ + +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0029-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0029-Added-support-to-new-arithmetic-single-register-inst.patch new file mode 100644 index 000000000..6199a4e53 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0029-Added-support-to-new-arithmetic-single-register-inst.patch @@ -0,0 +1,371 @@ +From c0cff55375899b12045eef8f5755e68a598ee4ff Mon Sep 17 00:00:00 2001 +From: Nagaraju +Date: Fri, 23 Aug 2019 16:18:43 +0530 +Subject: [PATCH 29/53] Added support to new arithmetic single register + instructions + +Conflicts: + opcodes/microblaze-dis.c + +Conflicts: + gas/config/tc-microblaze.c + opcodes/microblaze-dis.c + +Conflicts: + gas/config/tc-microblaze.c +signed-off-by:Nagaraju + Mahesh + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 147 ++++++++++++++++++++++++++++++++++++- + opcodes/microblaze-dis.c | 11 +++ + opcodes/microblaze-opc.h | 43 ++++++++++- + opcodes/microblaze-opcm.h | 5 +- + 4 files changed, 200 insertions(+), 6 deletions(-) + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index a8194d175e1..3c9aec4c1f9 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -394,12 +394,33 @@ void + md_begin (void) + { + const struct op_code_struct * opcode; ++ const char *prev_name = ""; + + opcode_hash_control = str_htab_create (); + + /* Insert unique names into hash table. */ +- for (opcode = microblaze_opcodes; opcode->name; opcode ++) +- str_hash_insert (opcode_hash_control, opcode->name, opcode, 0); ++ for (opcode = (struct microblaze_opcodes *)microblaze_opcodes; opcode->name; opcode ++) ++ { ++ if (strcmp (prev_name, opcode->name)) ++ { ++ prev_name = (char *) opcode->name; ++ str_hash_insert (opcode_hash_control, opcode->name, opcode, 0); ++ } ++ } ++} ++ ++static int ++is_reg (char * s) ++{ ++ int is_reg = 0; ++ /* Strip leading whitespace. */ ++ while (ISSPACE (* s)) ++ ++ s; ++ if (TOLOWER (s[0]) == 'r') ++ { ++ is_reg =1; ++ } ++ return is_reg; + } + + /* Try to parse a reg name. */ +@@ -957,6 +978,7 @@ md_assemble (char * str) + { + char * op_start; + char * op_end; ++ char * temp_op_end; + struct op_code_struct * opcode, *opcode1; + char * output = NULL; + int nlen = 0; +@@ -967,9 +989,10 @@ md_assemble (char * str) + unsigned reg3; + unsigned isize; + unsigned long immed = 0, immed2 = 0, temp; +- expressionS exp; ++ expressionS exp,exp1; + char name[20]; + long immedl; ++ int reg=0; + + /* Drop leading whitespace. */ + while (ISSPACE (* str)) +@@ -1000,7 +1023,78 @@ md_assemble (char * str) + as_bad (_("unknown opcode \"%s\""), name); + return; + } +- ++ ++ if ((microblaze_arch_size == 64) && (streq (name, "addli") || streq (name, "addlic") || ++ streq (name, "addlik") || streq (name, "addlikc") || streq (name, "rsubli") ++ || streq (name, "rsublic") || streq (name, "rsublik") || streq (name, "rsublikc") ++ || streq (name, "andli") || streq (name, "andnli") || streq (name, "orli") ++ || streq (name, "xorli"))) ++ { ++ temp_op_end = op_end; ++ if (strcmp (temp_op_end, "")) ++ temp_op_end = parse_reg (temp_op_end + 1, ®1); /* Get rd. */ ++ if (strcmp (temp_op_end, "")) ++ reg = is_reg (temp_op_end + 1); ++ if (reg) ++ { ++ ++ opcode->inst_type=INST_TYPE_RD_R1_IMML; ++ opcode->inst_offset_type = OPCODE_MASK_H; ++ if (streq (name, "addli")) ++ opcode->bit_sequence = ADDLI_MASK; ++ else if (streq (name, "addlic")) ++ opcode->bit_sequence = ADDLIC_MASK; ++ else if (streq (name, "addlik")) ++ opcode->bit_sequence = ADDLIK_MASK; ++ else if (streq (name, "addlikc")) ++ opcode->bit_sequence = ADDLIKC_MASK; ++ else if (streq (name, "rsubli")) ++ opcode->bit_sequence = RSUBLI_MASK; ++ else if (streq (name, "rsublic")) ++ opcode->bit_sequence = RSUBLIC_MASK; ++ else if (streq (name, "rsublik")) ++ opcode->bit_sequence = RSUBLIK_MASK; ++ else if (streq (name, "rsublikc")) ++ opcode->bit_sequence = RSUBLIKC_MASK; ++ else if (streq (name, "andli")) ++ opcode->bit_sequence = ANDLI_MASK; ++ else if (streq (name, "andnli")) ++ opcode->bit_sequence = ANDLNI_MASK; ++ else if (streq (name, "orli")) ++ opcode->bit_sequence = ORLI_MASK; ++ else if (streq (name, "xorli")) ++ opcode->bit_sequence = XORLI_MASK; ++ } ++ else ++ { ++ opcode->inst_type=INST_TYPE_RD_IMML; ++ opcode->inst_offset_type = OPCODE_MASK_LIMM; ++ if (streq (name, "addli")) ++ opcode->bit_sequence = ADDLI_ONE_REG_MASK; ++ else if (streq (name, "addlic")) ++ opcode->bit_sequence = ADDLIC_ONE_REG_MASK; ++ else if (streq (name, "addlik")) ++ opcode->bit_sequence = ADDLIK_ONE_REG_MASK; ++ else if (streq (name, "addlikc")) ++ opcode->bit_sequence = ADDLIKC_ONE_REG_MASK; ++ else if (streq (name, "rsubli")) ++ opcode->bit_sequence = RSUBLI_ONE_REG_MASK; ++ else if (streq (name, "rsublic")) ++ opcode->bit_sequence = RSUBLIC_ONE_REG_MASK; ++ else if (streq (name, "rsublik")) ++ opcode->bit_sequence = RSUBLIK_ONE_REG_MASK; ++ else if (streq (name, "rsublikc")) ++ opcode->bit_sequence = RSUBLIKC_ONE_REG_MASK; ++ else if (streq (name, "andli")) ++ opcode->bit_sequence = ANDLI_ONE_REG_MASK; ++ else if (streq (name, "andnli")) ++ opcode->bit_sequence = ANDLNI_ONE_REG_MASK; ++ else if (streq (name, "orli")) ++ opcode->bit_sequence = ORLI_ONE_REG_MASK; ++ else if (streq (name, "xorli")) ++ opcode->bit_sequence = XORLI_ONE_REG_MASK; ++ } ++ } + inst = opcode->bit_sequence; + isize = 4; + +@@ -1457,6 +1551,51 @@ md_assemble (char * str) + inst |= (immed << IMM_LOW) & IMM15_MASK; + break; + ++ case INST_TYPE_RD_IMML: ++ if (strcmp (op_end, "")) ++ op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ ++ else ++ { ++ as_fatal (_("Error in statement syntax")); ++ reg1 = 0; ++ } ++ ++ if (strcmp (op_end, "")) ++ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); ++ else ++ as_fatal (_("Error in statement syntax")); ++ ++ /* Check for spl registers. */ ++ if (check_spl_reg (®1)) ++ as_fatal (_("Cannot use special register with this instruction")); ++ if (exp.X_op != O_constant) ++ { ++ char *opc = NULL; ++ relax_substateT subtype; ++ ++ if (exp.X_md != 0) ++ subtype = get_imm_otype(exp.X_md); ++ else ++ subtype = opcode->inst_offset_type; ++ ++ output = frag_var (rs_machine_dependent, ++ isize * 2, ++ isize * 2, ++ subtype, ++ exp.X_add_symbol, ++ exp.X_add_number, ++ (char *) opc); ++ immedl = 0L; ++ } ++ else ++ { ++ output = frag_more (isize); ++ immed = exp.X_add_number; ++ } ++ inst |= (reg1 << RD_LOW) & RD_MASK; ++ inst |= (immed << IMM_LOW) & IMM16_MASK; ++ break; ++ + case INST_TYPE_R1_RFSL: + if (strcmp (op_end, "")) + op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index 45262aef909..bdc6db79726 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c +@@ -143,6 +143,14 @@ get_field_imm15 (struct string_buf *buf, long instr) + return p; + } + ++get_field_imm16 (struct string_buf *buf, long instr) ++{ ++ char *p = strbuf (buf); ++ ++ sprintf (p, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW)); ++ return p; ++} ++ + static char * + get_field_special (struct string_buf *buf, long instr, + const struct op_code_struct *op) +@@ -473,6 +481,9 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + /* For mbar 16 or sleep insn. */ + case INST_TYPE_NONE: + break; ++ case INST_TYPE_RD_IMML: ++ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst)); ++ break; + /* For bit field insns. */ + case INST_TYPE_RD_R1_IMMW_IMMS: + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), +diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h +index f85f5a600cc..6228114698b 100644 +--- a/opcodes/microblaze-opc.h ++++ b/opcodes/microblaze-opc.h +@@ -77,6 +77,7 @@ + #define INST_TYPE_RD_R1_IMMW_IMMS 21 + + #define INST_TYPE_NONE 25 ++#define INST_TYPE_RD_IMML 26 + + + +@@ -92,6 +93,7 @@ + #define IMMVAL_MASK_MFS 0x0000 + + #define OPCODE_MASK_H 0xFC000000 /* High 6 bits only. */ ++#define OPCODE_MASK_LIMM 0xFC1F0000 /* High 6 bits and 12-16 bits */ + #define OPCODE_MASK_H1 0xFFE00000 /* High 11 bits. */ + #define OPCODE_MASK_H2 0xFC1F0000 /* High 6 and bits 20-16. */ + #define OPCODE_MASK_H12 0xFFFF0000 /* High 16. */ +@@ -114,6 +116,33 @@ + #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26. */ + #define OPCODE_MASK_H8 0xFF000000 /* High 8 bits only. */ + ++/*Defines to identify 64-bit single reg instructions */ ++#define ADDLI_ONE_REG_MASK 0x68000000 ++#define ADDLIC_ONE_REG_MASK 0x68020000 ++#define ADDLIK_ONE_REG_MASK 0x68040000 ++#define ADDLIKC_ONE_REG_MASK 0x68060000 ++#define RSUBLI_ONE_REG_MASK 0x68010000 ++#define RSUBLIC_ONE_REG_MASK 0x68030000 ++#define RSUBLIK_ONE_REG_MASK 0x68050000 ++#define RSUBLIKC_ONE_REG_MASK 0x68070000 ++#define ORLI_ONE_REG_MASK 0x68100000 ++#define ANDLI_ONE_REG_MASK 0x68110000 ++#define XORLI_ONE_REG_MASK 0x68120000 ++#define ANDLNI_ONE_REG_MASK 0x68130000 ++#define ADDLI_MASK 0x20000000 ++#define ADDLIC_MASK 0x28000000 ++#define ADDLIK_MASK 0x30000000 ++#define ADDLIKC_MASK 0x38000000 ++#define RSUBLI_MASK 0x24000000 ++#define RSUBLIC_MASK 0x2C000000 ++#define RSUBLIK_MASK 0x34000000 ++#define RSUBLIKC_MASK 0x3C000000 ++#define ANDLI_MASK 0xA4000000 ++#define ANDLNI_MASK 0xAC000000 ++#define ORLI_MASK 0xA0000000 ++#define XORLI_MASK 0xA8000000 ++ ++ + /* New Mask for msrset, msrclr insns. */ + #define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */ + /* Mask for mbar insn. */ +@@ -122,7 +151,7 @@ + #define DELAY_SLOT 1 + #define NO_DELAY_SLOT 0 + +-#define MAX_OPCODES 412 ++#define MAX_OPCODES 424 + + const struct op_code_struct + { +@@ -451,13 +480,21 @@ const struct op_code_struct + {"cmpl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst }, + {"cmplu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst }, + {"addli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x20000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68000000, OPCODE_MASK_LIMM, addli, arithmetic_inst }, + {"rsubli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x24000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsubli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68010000, OPCODE_MASK_LIMM, rsubli, arithmetic_inst }, + {"addlic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x28000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addlic", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68020000, OPCODE_MASK_LIMM, addlic, arithmetic_inst }, + {"rsublic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x2C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsublic", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68030000, OPCODE_MASK_LIMM, rsublic, arithmetic_inst }, + {"addlik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addlik", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68040000, OPCODE_MASK_LIMM, addlik, arithmetic_inst }, + {"rsublik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x34000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsublik", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68050000, OPCODE_MASK_LIMM, rsublik, arithmetic_inst }, + {"addlikc", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x38000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addlikc", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68060000, OPCODE_MASK_LIMM, addlikc, arithmetic_inst }, + {"rsublikc",INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsublikc", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68070000, OPCODE_MASK_LIMM, rsublikc, arithmetic_inst }, + {"mull", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000100, OPCODE_MASK_H4, mull, mult_inst }, + {"bslll", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000500, OPCODE_MASK_H3, bslll, barrel_shift_inst }, + {"bslra", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000300, OPCODE_MASK_H3, bslra, barrel_shift_inst }, +@@ -508,9 +545,13 @@ const struct op_code_struct + {"beaged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00000, OPCODE_MASK_H14, beaged, branch_inst }, + {"bealged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00100, OPCODE_MASK_H14, bealged, branch_inst }, + {"orli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA0000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"orli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68100000, OPCODE_MASK_LIMM, orli, arithmetic_inst }, + {"andli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA4000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"andli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68110000, OPCODE_MASK_LIMM, andli, arithmetic_inst }, + {"xorli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA8000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"xorli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68120000, OPCODE_MASK_LIMM, xorli, arithmetic_inst }, + {"andnli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xAC000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"andnli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68130000, OPCODE_MASK_LIMM, andnli, arithmetic_inst }, + {"imml", INST_TYPE_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB2000000, OPCODE_MASK_H8, imml, immediate_inst }, + {"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst }, + {"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst }, +diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h +index 08ed44352ee..a57cabf905f 100644 +--- a/opcodes/microblaze-opcm.h ++++ b/opcodes/microblaze-opcm.h +@@ -62,7 +62,9 @@ enum microblaze_instr + eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd, + + /* 64-bit instructions */ +- addl, rsubl, addlc, rsublc, addlk, rsublk, addlkc, rsublkc, cmpl, cmplu, mull, ++ addl, addli, addlic, addlik, addlikc, rsubl, rsubli, rsublic, rsublik, rsublikc, ++ addlc, rsublc, addlk, rsublk, addlkc, rsublkc, cmpl, cmplu, mull, ++ andli, andnli, orli, xorli, + bslll, bslra, bslrl, bsllli, bslrai, bslrli, bslefi, bslifi, orl, andl, xorl, + andnl, pcmplbf, pcmpleq, pcmplne, srla, srlc, srll, sextl8, sextl16, sextl32, + brea, bread, breald, beaeq, bealeq, beaeqd, bealeqd, beane, bealne, beaned, +@@ -167,5 +169,6 @@ enum microblaze_instr_type + + /* Imm mask for msrset, msrclr instructions. */ + #define IMM15_MASK 0x00007FFF ++#define IMM16_MASK 0x0000FFFF + + #endif /* MICROBLAZE-OPCM */ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0030-double-imml-generation-for-64-bit-values.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0030-double-imml-generation-for-64-bit-values.patch new file mode 100644 index 000000000..eb62eaeb9 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0030-double-imml-generation-for-64-bit-values.patch @@ -0,0 +1,545 @@ +From e4d7207d18e47a9ce5fbf57fc4faa370bf150284 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 26 Aug 2019 15:29:42 +0530 +Subject: [PATCH 30/53] double imml generation for 64 bit values. + +Conflicts: + gas/config/tc-microblaze.c + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 321 ++++++++++++++++++++++++++++++------- + opcodes/microblaze-opc.h | 4 +- + 2 files changed, 262 insertions(+), 63 deletions(-) + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 3c9aec4c1f9..4da765223be 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -979,7 +979,7 @@ md_assemble (char * str) + char * op_start; + char * op_end; + char * temp_op_end; +- struct op_code_struct * opcode, *opcode1; ++ struct op_code_struct * opcode, *opcode1, *opcode2; + char * output = NULL; + int nlen = 0; + int i; +@@ -1163,7 +1163,12 @@ md_assemble (char * str) + reg2 = 0; + } + if (strcmp (op_end, "")) ++ { ++ if(microblaze_arch_size == 64) ++ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); ++ else + op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM); ++ } + else + as_fatal (_("Error in statement syntax")); + +@@ -1263,26 +1268,51 @@ md_assemble (char * str) + || streq (name, "lwi") || streq (name, "sbi") + || streq (name, "shi") || streq (name, "swi")))) + { +- temp = immed & 0xFFFFFF8000; +- if (temp != 0 && temp != 0xFFFFFF8000) ++ temp = ((long long)immed) & 0xFFFFFFFFFFFF8000; ++ if (temp != 0 && temp != 0xFFFFFFFFFFFF8000) + { + /* Needs an immediate inst. */ +- opcode1 +- = (struct op_code_struct *) str_hash_find (opcode_hash_control, +- "imml"); +- if (opcode1 == NULL) ++ if (((long long)immed) > (long long)-549755813888 && ((long long)immed) < (long long)549755813887) ++ { ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL) + { + as_bad (_("unknown opcode \"%s\""), "imml"); + return; + } + inst1 = opcode1->bit_sequence; +- inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; ++ inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; + output[0] = INST_BYTE0 (inst1); + output[1] = INST_BYTE1 (inst1); + output[2] = INST_BYTE2 (inst1); + output[3] = INST_BYTE3 (inst1); + output = frag_more (isize); + } ++ else ++ { ++ opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL || opcode2 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode2->bit_sequence; ++ inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ } + inst |= (reg1 << RD_LOW) & RD_MASK; + inst |= (reg2 << RA_LOW) & RA_MASK; + inst |= (immed << IMM_LOW) & IMM_MASK; +@@ -1299,8 +1329,7 @@ md_assemble (char * str) + as_bad (_("unknown opcode \"%s\""), "imm"); + return; + } +- +- inst1 = opcode1->bit_sequence; ++ inst1 = opcode1->bit_sequence; + inst1 |= ((immed & 0xFFFF0000) >> 16) & IMM_MASK; + output[0] = INST_BYTE0 (inst1); + output[1] = INST_BYTE1 (inst1); +@@ -1541,7 +1570,7 @@ md_assemble (char * str) + as_fatal (_("Cannot use special register with this instruction")); + + if (exp.X_op != O_constant) +- as_fatal (_("Symbol used as immediate value for msrset/msrclr instructions")); ++ as_fatal (_("Symbol used as immediate value for arithmetic long instructions")); + else + { + output = frag_more (isize); +@@ -1875,6 +1904,7 @@ md_assemble (char * str) + temp = immed & 0xFFFF8000; + if ((temp != 0) && (temp != 0xFFFF8000)) + { ++ + /* Needs an immediate inst. */ + opcode1 + = (struct op_code_struct *) str_hash_find (opcode_hash_control, +@@ -1907,7 +1937,12 @@ md_assemble (char * str) + reg1 = 0; + } + if (strcmp (op_end, "")) ++ { ++ if(microblaze_arch_size == 64) ++ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); ++ else + op_end = parse_imm (op_end + 1, & exp, MIN_IMM, MAX_IMM); ++ } + else + as_fatal (_("Error in statement syntax")); + +@@ -1946,30 +1981,55 @@ md_assemble (char * str) + } + if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai")) + { +- temp = immed & 0xFFFFFF8000; +- if (temp != 0 && temp != 0xFFFFFF8000) ++ temp = ((long long)immed) & 0xFFFFFFFFFFFF8000; ++ if (temp != 0 && temp != 0xFFFFFFFFFFFF8000) + { + /* Needs an immediate inst. */ +- opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (((long long)immed) > (long long)-549755813888 && ((long long)immed) < (long long)549755813887) ++ { ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); + if (opcode1 == NULL) + { + as_bad (_("unknown opcode \"%s\""), "imml"); + return; + } + inst1 = opcode1->bit_sequence; +- inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; ++ inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; + output[0] = INST_BYTE0 (inst1); + output[1] = INST_BYTE1 (inst1); + output[2] = INST_BYTE2 (inst1); + output[3] = INST_BYTE3 (inst1); + output = frag_more (isize); + } ++ else { ++ opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL || opcode2 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode2->bit_sequence; ++ inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ } + inst |= (reg1 << RD_LOW) & RD_MASK; + inst |= (immed << IMM_LOW) & IMM_MASK; + } + else + { +- + temp = immed & 0xFFFF8000; + if ((temp != 0) && (temp != 0xFFFF8000)) + { +@@ -2057,24 +2117,50 @@ md_assemble (char * str) + streq (name, "breaid") || + streq (name, "brai") || streq (name, "braid"))) + { +- temp = immed & 0xFFFFFF8000; ++ temp = immed & 0xFFFFFFFFFFFF8000; + if (temp != 0) + { + /* Needs an immediate inst. */ +- opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (((long long)immed) > (long long)-549755813888 && ((long long)immed) < (long long)549755813887) ++ { ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); + if (opcode1 == NULL) + { + as_bad (_("unknown opcode \"%s\""), "imml"); + return; + } + inst1 = opcode1->bit_sequence; +- inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; ++ inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; + output[0] = INST_BYTE0 (inst1); + output[1] = INST_BYTE1 (inst1); + output[2] = INST_BYTE2 (inst1); + output[3] = INST_BYTE3 (inst1); + output = frag_more (isize); + } ++ else { ++ opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL || opcode2 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode2->bit_sequence; ++ inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ } + inst |= (immed << IMM_LOW) & IMM_MASK; + } + else +@@ -2394,8 +2480,8 @@ md_apply_fix (fixS * fixP, + /* Note: use offsetT because it is signed, valueT is unsigned. */ + offsetT val = (offsetT) * valp; + int i; +- struct op_code_struct * opcode1; +- unsigned long inst1; ++ struct op_code_struct * opcode1, * opcode2; ++ unsigned long inst1,inst2; + + symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _(""); + +@@ -2576,30 +2662,75 @@ md_apply_fix (fixS * fixP, + case BFD_RELOC_MICROBLAZE_64_TEXTREL: + case BFD_RELOC_MICROBLAZE_64: + case BFD_RELOC_MICROBLAZE_64_PCREL: +- /* Add an imm instruction. First save the current instruction. */ +- for (i = 0; i < INST_WORD_SIZE; i++) +- buf[i + INST_WORD_SIZE] = buf[i]; + if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64 + || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) + { + /* Generate the imm instruction. */ +- opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887) ++ { ++ /* Add an imm instruction. First save the current instruction. */ ++ for (i = 0; i < INST_WORD_SIZE; i++) ++ buf[i + INST_WORD_SIZE] = buf[i]; ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); + if (opcode1 == NULL) +- { +- as_bad (_("unknown opcode \"%s\""), "imml"); +- return; +- } ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } + + inst1 = opcode1->bit_sequence; + if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) +- inst1 |= ((val & 0xFFFFFF0000L) >> 16) & IMML_MASK; ++ inst1 |= ((val & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) ++ fixP->fx_r_type = BFD_RELOC_64; ++ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) ++ fixP->fx_r_type = BFD_RELOC_64_PCREL; ++ buf[0] = INST_BYTE0 (inst1); ++ buf[1] = INST_BYTE1 (inst1); ++ buf[2] = INST_BYTE2 (inst1); ++ buf[3] = INST_BYTE3 (inst1); ++ } ++ else { ++ /* Add an imm instruction. First save the current instruction. */ ++ for (i = 0; i < INST_WORD_SIZE; i++) ++ buf[i + INST_WORD_SIZE + 4] = buf[i]; ++ ++ opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL || opcode2 ==NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode2->bit_sequence; ++ if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) ++ inst1 |= ((val & 0x000000FFFFFF0000L) >> 40) & IMML_MASK; ++ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) ++ fixP->fx_r_type = BFD_RELOC_64; ++ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) ++ fixP->fx_r_type = BFD_RELOC_64_PCREL; ++ inst2 = opcode1->bit_sequence; ++ if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) ++ inst1 |= ((val & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; + if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64) +- fixP->fx_r_type = BFD_RELOC_64; ++ fixP->fx_r_type = BFD_RELOC_64; + if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) +- fixP->fx_r_type = BFD_RELOC_64_PCREL; ++ fixP->fx_r_type = BFD_RELOC_64_PCREL; ++ buf[0] = INST_BYTE0 (inst1); ++ buf[1] = INST_BYTE1 (inst1); ++ buf[2] = INST_BYTE2 (inst1); ++ buf[3] = INST_BYTE3 (inst1); ++ buf[4] = INST_BYTE0 (inst2); ++ buf[5] = INST_BYTE1 (inst2); ++ buf[6] = INST_BYTE2 (inst2); ++ buf[7] = INST_BYTE3 (inst2); ++ } + } + else + { ++ /* Add an imm instruction. First save the current instruction. */ ++ for (i = 0; i < INST_WORD_SIZE; i++) ++ buf[i + INST_WORD_SIZE] = buf[i]; + /* Generate the imm instruction. */ + opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm"); + if (opcode1 == NULL) +@@ -2611,12 +2742,11 @@ md_apply_fix (fixS * fixP, + inst1 = opcode1->bit_sequence; + if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) + inst1 |= ((val & 0xFFFF0000) >> 16) & IMM_MASK; +- } + buf[0] = INST_BYTE0 (inst1); + buf[1] = INST_BYTE1 (inst1); + buf[2] = INST_BYTE2 (inst1); + buf[3] = INST_BYTE3 (inst1); +- ++ } + /* Add the value only if the symbol is defined. */ + if (fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) + { +@@ -2649,21 +2779,41 @@ md_apply_fix (fixS * fixP, + for (i = 0; i < INST_WORD_SIZE; i++) + buf[i + INST_WORD_SIZE] = buf[i]; + /* Generate the imm instruction. */ +- if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC) +- opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC) { ++ if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887) ++ { ++ for (i = 0; i < INST_WORD_SIZE; i++) ++ buf[i + INST_WORD_SIZE] = buf[i]; ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ } ++ else { ++ for (i = 0; i < INST_WORD_SIZE; i++) ++ buf[i + INST_WORD_SIZE + 4] = buf[i]; ++ opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ inst2 = opcode2->bit_sequence; ++ ++ /* We can fixup call to a defined non-global address ++ * within the same section only. */ ++ buf[4] = INST_BYTE0 (inst2); ++ buf[5] = INST_BYTE1 (inst2); ++ buf[6] = INST_BYTE2 (inst2); ++ buf[7] = INST_BYTE3 (inst2); ++ } ++ } + else + opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imm"); + if (opcode1 == NULL) + { ++ for (i = 0; i < INST_WORD_SIZE; i++) ++ buf[i + INST_WORD_SIZE] = buf[i]; + if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_GPC) + as_bad (_("unknown opcode \"%s\""), "imml"); + else + as_bad (_("unknown opcode \"%s\""), "imm"); + return; + } +- + inst1 = opcode1->bit_sequence; +- + /* We can fixup call to a defined non-global address + within the same section only. */ + buf[0] = INST_BYTE0 (inst1); +@@ -3025,21 +3175,45 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) + { + output = frag_more (isize); + immedl = exp.X_add_number; +- +- opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); +- if (opcode1 == NULL) +- { +- as_bad (_("unknown opcode \"%s\""), "imml"); +- return; +- } +- +- inst1 = opcode1->bit_sequence; +- inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; +- output[0] = INST_BYTE0 (inst1); +- output[1] = INST_BYTE1 (inst1); +- output[2] = INST_BYTE2 (inst1); +- output[3] = INST_BYTE3 (inst1); +- output = frag_more (isize); ++ if (((long long)immedl) > (long long)-549755813888 && ((long long)immedl) < (long long)549755813887) ++ { ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ else { ++ opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode2 == NULL || opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode2->bit_sequence; ++ inst1 |= ((immedl & 0xFFFFFF0000000000L) >> 40) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } + } + + inst |= (reg1 << RD_LOW) & RD_MASK; +@@ -3088,20 +3262,45 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) + { + output = frag_more (isize); + immedl = exp.X_add_number; +- opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); +- if (opcode1 == NULL) +- { +- as_bad (_("unknown opcode \"%s\""), "imml"); +- return; +- } +- ++ if (((long long)immedl) > (long long)-549755813888 && ((long long)immedl) < (long long)549755813887) ++ { ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } + inst1 = opcode1->bit_sequence; +- inst1 |= ((immedl & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK; ++ inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; + output[0] = INST_BYTE0 (inst1); + output[1] = INST_BYTE1 (inst1); + output[2] = INST_BYTE2 (inst1); + output[3] = INST_BYTE3 (inst1); + output = frag_more (isize); ++ } ++ else { ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode2 == NULL || opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode2->bit_sequence; ++ inst1 |= ((immedl & 0xFFFFFF0000000000L) >> 40) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } + } + + inst |= (reg1 << RA_LOW) & RA_MASK; +diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h +index 6228114698b..f46fc76a94a 100644 +--- a/opcodes/microblaze-opc.h ++++ b/opcodes/microblaze-opc.h +@@ -633,8 +633,8 @@ char pvr_register_prefix[] = "rpvr"; + #define MIN_IMM6_WIDTH ((int) 0x00000001) + #define MAX_IMM6_WIDTH ((int) 0x00000040) + +-#define MIN_IMML ((long long) 0xffffff8000000000L) +-#define MAX_IMML ((long long) 0x0000007fffffffffL) ++#define MIN_IMML ((long long) -9223372036854775808) ++#define MAX_IMML ((long long) 9223372036854775807) + + #endif /* MICROBLAZE_OPC */ + +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0031-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0031-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch new file mode 100644 index 000000000..5bc507ce8 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0031-Fixed-bug-in-generation-of-IMML-instruction-for-the.patch @@ -0,0 +1,88 @@ +From 3cd07844b77691afeb675806cc4c73fe08d2c30e Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Wed, 3 Nov 2021 12:13:32 +0530 +Subject: [PATCH 31/53] Fixed bug in generation of IMML instruction for the + +new MB-64 instructions with single register. + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 50 +++++++++++++++++++++++++++++++++++--- + 1 file changed, 47 insertions(+), 3 deletions(-) + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 4da765223be..651d855c800 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -1614,12 +1614,56 @@ md_assemble (char * str) + exp.X_add_symbol, + exp.X_add_number, + (char *) opc); +- immedl = 0L; ++ immed = 0L; + } + else + { + output = frag_more (isize); + immed = exp.X_add_number; ++ temp = ((long long)immed) & 0xFFFFFFFFFFFF8000; ++ if (temp != 0 && temp != 0xFFFFFFFFFFFF8000 && temp != 0x8000) ++ { ++ /* Needs an immediate inst. */ ++ if (((long long)immed) > (long long)-549755813888 && ((long long)immed) < (long long)549755813887) ++ { ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ else { ++ opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL || opcode2 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode2->bit_sequence; ++ inst1 |= ((immed & 0xFFFFFF0000000000L) >> 40) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immed & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ } + } + inst |= (reg1 << RD_LOW) & RD_MASK; + inst |= (immed << IMM_LOW) & IMM16_MASK; +@@ -2117,8 +2161,8 @@ md_assemble (char * str) + streq (name, "breaid") || + streq (name, "brai") || streq (name, "braid"))) + { +- temp = immed & 0xFFFFFFFFFFFF8000; +- if (temp != 0) ++ temp = ((long long)immed) & 0xFFFFFFFFFFFF8000; ++ if (temp != 0 && temp != 0xFFFFFFFFFFFF8000 && temp != 0x8000) + { + /* Needs an immediate inst. */ + if (((long long)immed) > (long long)-549755813888 && ((long long)immed) < (long long)549755813887) +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0032-This-patch-will-remove-imml-0-and-imml-1-instruction.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0032-This-patch-will-remove-imml-0-and-imml-1-instruction.patch new file mode 100644 index 000000000..686c8827c --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0032-This-patch-will-remove-imml-0-and-imml-1-instruction.patch @@ -0,0 +1,38 @@ +From 6e672cb099ae9670a9be1d26e36fa33df5757191 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Thu, 16 Apr 2020 18:08:58 +0530 +Subject: [PATCH 32/53] This patch will remove imml 0 and imml -1 instructions + when the offset is less than 16 bit for Type A branch EA instructions. + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 651d855c800..ce0d3e26204 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -2129,9 +2129,7 @@ md_assemble (char * str) + if (exp.X_op != O_constant) + { + char *opc; +- if (microblaze_arch_size == 64 && (streq (name, "breai") || +- streq (name, "breaid") || +- streq (name, "brai") || streq (name, "braid"))) ++ if (microblaze_arch_size == 64 && (streq (name, "brai") || streq (name, "braid"))) + opc = str_microblaze_64; + else + opc = NULL; +@@ -2707,7 +2705,7 @@ md_apply_fix (fixS * fixP, + case BFD_RELOC_MICROBLAZE_64: + case BFD_RELOC_MICROBLAZE_64_PCREL: + if (fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64 +- || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL) ++ || fixP->fx_r_type == BFD_RELOC_MICROBLAZE_64_PCREL || (fixP->fx_r_type == BFD_RELOC_64_PCREL && microblaze_arch_size == 64)) + { + /* Generate the imm instruction. */ + if (((long long)val) > (long long)-549755813888 && ((long long)val) < (long long)549755813887) +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0033-Changing-the-long-to-long-long-as-in-Windows-long-is.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Changing-the-long-to-long-long-as-in-Windows-long-is.patch new file mode 100644 index 000000000..1dbeaf0e0 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0033-Changing-the-long-to-long-long-as-in-Windows-long-is.patch @@ -0,0 +1,32 @@ +From 0c29905801152c8b8230bcca00b49b945054586b Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Tue, 20 Apr 2021 21:22:06 +0530 +Subject: [PATCH 33/53] Changing the long to long long as in Windows long is + 32-bit but we need the variable to be 64-bit + +Signed-off-by :Nagaraju Mekala + +Conflicts: + gas/config/tc-microblaze.c + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index ce0d3e26204..dc87429a4e8 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -988,7 +988,7 @@ md_assemble (char * str) + unsigned reg2; + unsigned reg3; + unsigned isize; +- unsigned long immed = 0, immed2 = 0, temp; ++ unsigned long long immed = 0, immed2 = 0, temp; + expressionS exp,exp1; + char name[20]; + long immedl; +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0034-gas-revert-moving-of-md_pseudo_table-from-const.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0034-gas-revert-moving-of-md_pseudo_table-from-const.patch new file mode 100644 index 000000000..943d31582 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0034-gas-revert-moving-of-md_pseudo_table-from-const.patch @@ -0,0 +1,62 @@ +From ec4fac4177c4364f52d1bc6ba53ffd971323cc22 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 8 Nov 2021 21:57:13 +0530 +Subject: [PATCH 34/53] gas: revert moving of md_pseudo_table from const + +The base system expect md_pseudo_table to be constant, Changing the +definition will break other architectures when compiled with a +unified source code. + +Patch reverts the change away from const, and implements a newer +dynamic handler that passes the correct argument value based on word +size. + +Signed-off-by: Mark Hatle +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 15 ++++++++++++--- + 1 file changed, 12 insertions(+), 3 deletions(-) + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index dc87429a4e8..faa458af3a0 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -356,6 +356,17 @@ microblaze_s_weakext (int ignore ATTRIBUTE_UNUSED) + demand_empty_rest_of_line (); + } + ++/* Handle the .gpword pseudo-op, Pass to s_rva */ ++ ++static void ++microblaze_s_gpword (int ignore ATTRIBUTE_UNUSED) ++{ ++ int size = 4; ++ if (microblaze_arch_size == 64) ++ size = 8; ++ s_rva(size); ++} ++ + /* This table describes all the machine specific pseudo-ops the assembler + has to support. The fields are: + Pseudo-op name without dot +@@ -371,7 +382,7 @@ const pseudo_typeS md_pseudo_table[] = + {"data32", cons, 4}, /* Same as word. */ + {"ent", s_func, 0}, /* Treat ent as function entry point. */ + {"end", microblaze_s_func, 1}, /* Treat end as function end point. */ +- {"gpword", s_rva, 4}, /* gpword label => store resolved label address in data section. */ ++ {"gpword", microblaze_s_gpword, 0}, /* gpword label => store resolved label address in data section. */ + {"weakext", microblaze_s_weakext, 0}, + {"rodata", microblaze_s_rdata, 0}, + {"sdata2", microblaze_s_rdata, 1}, +@@ -3425,8 +3436,6 @@ md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED) + case OPTION_M64: + //if (arg != NULL && strcmp (arg, "64") == 0) + microblaze_arch_size = 64; +- // UPSTREAM/REVISIT - md_pseudo_table is const +- // md_pseudo_table[7].poc_val = 8; + break; + default: + return 0; +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0035-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0035-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch new file mode 100644 index 000000000..c3ff9baf0 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0035-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch @@ -0,0 +1,44 @@ +From 2148cf1617fe1168ea747346d407e2ece94e163a Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 8 Nov 2021 22:01:23 +0530 +Subject: [PATCH 35/53] ld/emulparams/elf64microblaze: Fix emulation generation + +Compilation fails when building ld-new with: + +ldemul.o:(.data.rel+0x820): undefined reference to `ld_elf64microblazeel_emulation' +ldemul.o:(.data.rel+0x828): undefined reference to `ld_elf64microblaze_emulation' + +The error appears to be that the elf64 files were referencing the elf32 emulation. + +Signed-off-by: Mark Hatle +Signed-off-by: Aayush Misra +--- + ld/emulparams/elf64microblaze.sh | 2 +- + ld/emulparams/elf64microblazeel.sh | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh +index 9c7b0eb7080..7b4c7c411bd 100644 +--- a/ld/emulparams/elf64microblaze.sh ++++ b/ld/emulparams/elf64microblaze.sh +@@ -19,5 +19,5 @@ NOP=0x80000000 + #$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} + #OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' + +-TEMPLATE_NAME=elf32 ++TEMPLATE_NAME=elf + #GENERATE_SHLIB_SCRIPT=yes +diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh +index 9c7b0eb7080..7b4c7c411bd 100644 +--- a/ld/emulparams/elf64microblazeel.sh ++++ b/ld/emulparams/elf64microblazeel.sh +@@ -19,5 +19,5 @@ NOP=0x80000000 + #$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} + #OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' + +-TEMPLATE_NAME=elf32 ++TEMPLATE_NAME=elf + #GENERATE_SHLIB_SCRIPT=yes +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0036-Invalid-data-offsets-pointer-after-relaxation.-Propo.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0036-Invalid-data-offsets-pointer-after-relaxation.-Propo.patch new file mode 100644 index 000000000..fd03fc4cd --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0036-Invalid-data-offsets-pointer-after-relaxation.-Propo.patch @@ -0,0 +1,79 @@ +From 9d691c146a484002e678babb0d40a9387272cb97 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 24 Jan 2022 16:04:07 +0530 +Subject: [PATCH 36/53] Invalid data offsets (pointer) after relaxation. + Proposed patch from community member (dednev@rambler.ru) against 2021.1 + [CR-1115232] + +Signed-off-by: Aayush Misra +--- + bfd/elf32-microblaze.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c +index 7e7c4bf471d..0ba7e36aa5f 100644 +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -2176,6 +2176,9 @@ microblaze_elf_relax_section (bfd *abfd, + { + unsigned int val; + ++ if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* hax: We only do the following fixup for debug location lists. */ +@@ -2215,6 +2218,9 @@ microblaze_elf_relax_section (bfd *abfd, + } + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)// || ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64) + { ++ if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* Look at the reloc only if the value has been resolved. */ +@@ -2247,6 +2253,9 @@ microblaze_elf_relax_section (bfd *abfd, + } + else if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_SYM_OP_SYM) + { ++ if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* Look at the reloc only if the value has been resolved. */ +@@ -2284,6 +2293,9 @@ microblaze_elf_relax_section (bfd *abfd, + || (ELF32_R_TYPE (irelscan->r_info) + == (int) R_MICROBLAZE_TEXTREL_32_LO)) + { ++ if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* Look at the reloc only if the value has been resolved. */ +@@ -2330,6 +2342,9 @@ microblaze_elf_relax_section (bfd *abfd, + || (ELF32_R_TYPE (irelscan->r_info) + == (int) R_MICROBLAZE_TEXTREL_64)) + { ++ if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* Look at the reloc only if the value has been resolved. */ +@@ -2364,6 +2379,9 @@ microblaze_elf_relax_section (bfd *abfd, + } + else if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_PCREL) + { ++ if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* Look at the reloc only if the value has been resolved. */ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0037-Double-free-with-ld-no-keep-memory.-Proposed-patches.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0037-Double-free-with-ld-no-keep-memory.-Proposed-patches.patch new file mode 100644 index 000000000..2e6329397 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0037-Double-free-with-ld-no-keep-memory.-Proposed-patches.patch @@ -0,0 +1,107 @@ +From 36e578efe3e94a6c13b21c364d818d0a8fd675ca Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 24 Jan 2022 16:59:19 +0530 +Subject: [PATCH 37/53] Double free with ld --no-keep-memory. Proposed patches + from the community member (dednev@rambler.ru) for 2021.1. [CR-1115233] + +Conflicts: + bfd/elf32-microblaze.c + bfd/elf64-microblaze.c + +Signed-off-by: Aayush Misra +--- + bfd/elf32-microblaze.c | 40 ++++++++++++++++++++++------------------ + 1 file changed, 22 insertions(+), 18 deletions(-) + +diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c +index 0ba7e36aa5f..1ff552a151b 100644 +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -1882,10 +1882,8 @@ microblaze_elf_relax_section (bfd *abfd, + { + Elf_Internal_Shdr *symtab_hdr; + Elf_Internal_Rela *internal_relocs; +- Elf_Internal_Rela *free_relocs = NULL; + Elf_Internal_Rela *irel, *irelend; + bfd_byte *contents = NULL; +- bfd_byte *free_contents = NULL; + int rel_count; + unsigned int shndx; + size_t i, sym_index; +@@ -1929,8 +1927,6 @@ microblaze_elf_relax_section (bfd *abfd, + internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory); + if (internal_relocs == NULL) + goto error_return; +- if (! link_info->keep_memory) +- free_relocs = internal_relocs; + + sdata->relax_count = 0; + sdata->relax = (struct relax_table *) bfd_malloc ((sec->reloc_count + 1) +@@ -1958,7 +1954,6 @@ microblaze_elf_relax_section (bfd *abfd, + contents = (bfd_byte *) bfd_malloc (sec->size); + if (contents == NULL) + goto error_return; +- free_contents = contents; + + if (!bfd_get_section_contents (abfd, sec, contents, + (file_ptr) 0, sec->size)) +@@ -2475,25 +2470,26 @@ microblaze_elf_relax_section (bfd *abfd, + } + + elf_section_data (sec)->relocs = internal_relocs; +- free_relocs = NULL; + + elf_section_data (sec)->this_hdr.contents = contents; +- free_contents = NULL; + + symtab_hdr->contents = (bfd_byte *) isymbuf; + } + +- free (free_relocs); +- free_relocs = NULL; ++ if (internal_relocs != NULL ++ && elf_section_data (sec)->relocs != internal_relocs) ++ free (internal_relocs); + +- if (free_contents != NULL) +- { +- if (!link_info->keep_memory) +- free (free_contents); ++ if (contents != NULL ++ && elf_section_data (sec)->this_hdr.contents != contents) ++ { ++ if (! link_info->keep_memory) ++ free (contents); + else +- /* Cache the section contents for elf_link_input_bfd. */ +- elf_section_data (sec)->this_hdr.contents = contents; +- free_contents = NULL; ++ { ++ /* Cache the section contents for elf_link_input_bfd. */ ++ elf_section_data (sec)->this_hdr.contents = contents; ++ } + } + + if (sdata->relax_count == 0) +@@ -2507,8 +2503,16 @@ microblaze_elf_relax_section (bfd *abfd, + return true; + + error_return: +- free (free_relocs); +- free (free_contents); ++ ++ if (isymbuf != NULL ++ && symtab_hdr->contents != (unsigned char *) isymbuf) ++ free (isymbuf); ++ if (internal_relocs != NULL ++ && elf_section_data (sec)->relocs != internal_relocs) ++ free (internal_relocs); ++ if (contents != NULL ++ && elf_section_data (sec)->this_hdr.contents != contents) ++ free (contents); + free (sdata->relax); + sdata->relax = NULL; + sdata->relax_count = 0; +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0038-MB-binutils-Upstream-port-issues.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0038-MB-binutils-Upstream-port-issues.patch new file mode 100644 index 000000000..cfa1a49ed --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0038-MB-binutils-Upstream-port-issues.patch @@ -0,0 +1,99 @@ +From b960fb122b35cb327b9db8fd1bb835899b24d106 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Sun, 28 Nov 2021 17:17:15 +0530 +Subject: [PATCH 38/53] MB binutils Upstream port issues. + +It's resolving the seg faults with ADDLIK +Conflicts: + bfd/elf64-microblaze.c + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 2 +- + opcodes/microblaze-dis.c | 12 ++++++------ + opcodes/microblaze-opc.h | 2 +- + 3 files changed, 8 insertions(+), 8 deletions(-) + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index faa458af3a0..686b1a00177 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -404,7 +404,7 @@ const pseudo_typeS md_pseudo_table[] = + void + md_begin (void) + { +- const struct op_code_struct * opcode; ++ struct op_code_struct * opcode; + const char *prev_name = ""; + + opcode_hash_control = str_htab_create (); +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index bdc6db79726..d61d6bcfeba 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c +@@ -153,7 +153,7 @@ get_field_imm16 (struct string_buf *buf, long instr) + + static char * + get_field_special (struct string_buf *buf, long instr, +- const struct op_code_struct *op) ++ struct op_code_struct *op) + { + char *p = strbuf (buf); + char *spr; +@@ -226,11 +226,11 @@ get_field_special (struct string_buf *buf, long instr, + static unsigned long + read_insn_microblaze (bfd_vma memaddr, + struct disassemble_info *info, +- const struct op_code_struct **opr) ++ struct op_code_struct **opr) + { + unsigned char ibytes[4]; + int status; +- const struct op_code_struct *op; ++ struct op_code_struct *op; + unsigned long inst; + + status = info->read_memory_func (memaddr, ibytes, 4, info); +@@ -266,7 +266,7 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + fprintf_ftype print_func = info->fprintf_func; + void *stream = info->stream; + unsigned long inst, prev_inst; +- const struct op_code_struct *op, *pop; ++ struct op_code_struct *op, *pop; + int immval = 0; + bool immfound = false; + static bfd_vma prev_insn_addr = -1; /* Init the prev insn addr. */ +@@ -518,7 +518,7 @@ get_insn_microblaze (long inst, + enum microblaze_instr_type *insn_type, + short *delay_slots) + { +- const struct op_code_struct *op; ++ struct op_code_struct *op; + *isunsignedimm = false; + + /* Just a linear search of the table. */ +@@ -560,7 +560,7 @@ microblaze_get_target_address (long inst, bool immfound, int immval, + bool *targetvalid, + bool *unconditionalbranch) + { +- const struct op_code_struct *op; ++ struct op_code_struct *op; + long targetaddr = 0; + + *unconditionalbranch = false; +diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h +index f46fc76a94a..9f6d5456701 100644 +--- a/opcodes/microblaze-opc.h ++++ b/opcodes/microblaze-opc.h +@@ -153,7 +153,7 @@ + + #define MAX_OPCODES 424 + +-const struct op_code_struct ++struct op_code_struct + { + const char * name; + short inst_type; /* Registers and immediate values involved. */ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0039-Initial-port-of-core-reading-support-Added-support-f.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0039-Initial-port-of-core-reading-support-Added-support-f.patch new file mode 100644 index 000000000..06fefe2f9 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0039-Initial-port-of-core-reading-support-Added-support-f.patch @@ -0,0 +1,89 @@ +From ac87f4a6b9e35083a0403f188b61a317b53cfdbc Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 10 Oct 2022 16:37:53 +0530 +Subject: [PATCH 39/53] Initial port of core reading support Added support for + reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO + information for rebuilding ".reg" sections of core dumps at run time. + +Signed-off-by: David Holsgrove +Signed-off-by: Nathan Rossi +Signed-off-by: Mahesh Bodapati +Signed-off-by: Aayush Misra +--- + gdb/microblaze-linux-tdep.c | 11 +++++++++++ + gdb/microblaze-tdep.c | 37 +++++++++++++++++++++++++++++++++++++ + 2 files changed, 48 insertions(+) + +diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c +index f34b0fa9fd4..babc9020f0f 100644 +--- a/gdb/microblaze-linux-tdep.c ++++ b/gdb/microblaze-linux-tdep.c +@@ -193,6 +193,17 @@ microblaze_linux_init_abi (struct gdbarch_info info, + set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); + set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); + ++ /* BFD target for core files. */ ++ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); ++ else ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); ++ ++ ++ /* Shared library handling. */ ++ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); ++ set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); ++ + /* Enable TLS support. */ + set_gdbarch_fetch_tls_load_module_address (gdbarch, + svr4_fetch_objfile_link_map); +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index f9cb3dfda33..fdea9721b17 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -957,6 +957,43 @@ make_regs (struct gdbarch *arch) + } + #endif + ++void ++microblaze_supply_gregset (const struct regset *regset, ++ struct regcache *regcache, ++ int regnum, const void *gregs) ++{ ++ const unsigned int *regs = (const unsigned int *)gregs; ++ if (regnum >= 0) ++ regcache->raw_supply (regnum, regs + regnum); ++ ++ if (regnum == -1) { ++ int i; ++ ++ for (i = 0; i < 50; i++) { ++ regcache->raw_supply (i, regs + i); ++ } ++ } ++} ++ ++ ++/* Return the appropriate register set for the core section identified ++ by SECT_NAME and SECT_SIZE. */ ++ ++static void ++microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, ++ iterate_over_regset_sections_cb *cb, ++ void *cb_data, ++ const struct regcache *regcache) ++{ ++ struct microblaze_gdbarch_tdep *tdep =(microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); ++ ++ cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data); ++ ++ cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data); ++} ++ ++ ++ + static struct gdbarch * + microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + { +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0040-Fix-build-issues-after-Xilinx-2023.2-binutils-merge.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0040-Fix-build-issues-after-Xilinx-2023.2-binutils-merge.patch new file mode 100644 index 000000000..85ae3f02d --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0040-Fix-build-issues-after-Xilinx-2023.2-binutils-merge.patch @@ -0,0 +1,185 @@ +From fc4d292d4154cad199cbe1635790867c98a84fc6 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 14 Mar 2024 10:41:33 +0530 +Subject: [PATCH 40/53] Fix build issues after Xilinx 2023.2 binutils merge + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + bfd/bfd-in2.h | 10 ------ + gdb/microblaze-tdep.c | 71 ++++++++++++++-------------------------- + opcodes/microblaze-dis.c | 10 ------ + 3 files changed, 25 insertions(+), 66 deletions(-) + +diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h +index 8b2815d7303..cfab5c99b76 100644 +--- a/bfd/bfd-in2.h ++++ b/bfd/bfd-in2.h +@@ -6456,11 +6456,6 @@ done here - only used for relaxing */ + * +done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_64_PCREL, + +-/* This is a 64 bit reloc that stores the 32 bit relative +- * +value in two words (with an imml instruction). No relocation is +- * +done here - only used for relaxing */ +- BFD_RELOC_MICROBLAZE_64, +- + /* This is a 64 bit reloc that stores the 32 bit relative + * +value in two words (with an imml instruction). No relocation is + * +done here - only used for relaxing */ +@@ -6486,11 +6481,6 @@ value in two words (with an imml instruction). The relocation is + PC-relative GOT offset */ + BFD_RELOC_MICROBLAZE_64_GPC, + +-/* This is a 64 bit reloc that stores the 32 bit pc relative +-value in two words (with an imml instruction). The relocation is +-PC-relative GOT offset */ +- BFD_RELOC_MICROBLAZE_64_GPC, +- + /* This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). The relocation is + GOT offset */ +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index fdea9721b17..d83e508b82b 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -70,6 +70,7 @@ static const char *microblaze_abi_string; + static const char *const microblaze_abi_strings[] = { + "auto", + "m64", ++ NULL + }; + + enum microblaze_abi +@@ -105,7 +106,7 @@ global_microblaze_abi (void) + if (microblaze_abi_strings[i] == microblaze_abi_string) + return (enum microblaze_abi) i; + +-// internal_error (__FILE__, __LINE__, _("unknown ABI string")); ++ internal_error (__FILE__, __LINE__, _("unknown ABI string")); + } + + static void +@@ -894,16 +895,31 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) + } + + static void +-microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) ++microblaze_register_g_packet_guesses (struct gdbarch *gdbarch, enum microblaze_abi abi) + { + +- register_remote_g_packet_guess (gdbarch, +- 4 * MICROBLAZE_NUM_CORE_REGS, +- tdesc_microblaze64); ++ if (abi == MICROBLAZE_ABI_M64) ++ { ++ ++ register_remote_g_packet_guess (gdbarch, ++ 8 * MICROBLAZE_NUM_CORE_REGS, ++ tdesc_microblaze64); ++ ++ register_remote_g_packet_guess (gdbarch, ++ 8 * MICROBLAZE_NUM_REGS, ++ tdesc_microblaze64_with_stack_protect); ++ } ++ else ++ { ++ ++ register_remote_g_packet_guess (gdbarch, ++ 4 * MICROBLAZE_NUM_CORE_REGS, ++ tdesc_microblaze); + +- register_remote_g_packet_guess (gdbarch, +- 4 * MICROBLAZE_NUM_REGS, +- tdesc_microblaze64_with_stack_protect); ++ register_remote_g_packet_guess (gdbarch, ++ 4 * MICROBLAZE_NUM_REGS, ++ tdesc_microblaze_with_stack_protect); ++ } + } + + void +@@ -957,43 +973,6 @@ make_regs (struct gdbarch *arch) + } + #endif + +-void +-microblaze_supply_gregset (const struct regset *regset, +- struct regcache *regcache, +- int regnum, const void *gregs) +-{ +- const unsigned int *regs = (const unsigned int *)gregs; +- if (regnum >= 0) +- regcache->raw_supply (regnum, regs + regnum); +- +- if (regnum == -1) { +- int i; +- +- for (i = 0; i < 50; i++) { +- regcache->raw_supply (i, regs + i); +- } +- } +-} +- +- +-/* Return the appropriate register set for the core section identified +- by SECT_NAME and SECT_SIZE. */ +- +-static void +-microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, +- iterate_over_regset_sections_cb *cb, +- void *cb_data, +- const struct regcache *regcache) +-{ +- struct microblaze_gdbarch_tdep *tdep =(microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); +- +- cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data); +- +- cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data); +-} +- +- +- + static struct gdbarch * + microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + { +@@ -1134,7 +1113,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + + set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc); + +- //microblaze_register_g_packet_guesses (gdbarch); ++ // microblaze_register_g_packet_guesses (gdbarch, microblaze_abi); + + frame_base_set_default (gdbarch, µblaze_frame_base); + +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index d61d6bcfeba..692c977ac00 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c +@@ -466,10 +466,6 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + print_func (stream, "\t%s, %s", get_field_r1 (&buf, inst), + get_field_r2 (&buf, inst)); + break; +- case INST_TYPE_IMML: +- print_func (stream, "\t%s", get_field_imml (&buf, inst)); +- /* TODO: Also print symbol */ +- break; + case INST_TYPE_RD_IMM15: + print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), + get_field_imm15 (&buf, inst)); +@@ -484,12 +480,6 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + case INST_TYPE_RD_IMML: + print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst)); + break; +- /* For bit field insns. */ +- case INST_TYPE_RD_R1_IMMW_IMMS: +- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), +- get_field_immw (&buf, inst), get_field_imms (&buf, inst)); +- break; +- /* For bit field insns. */ + case INST_TYPE_RD_R1_IMMW_IMMS: + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst)); + break; +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0041-disable-truncated-register-warning-gdb-remote.c.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0041-disable-truncated-register-warning-gdb-remote.c.patch new file mode 100644 index 000000000..5a7e4dc31 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0041-disable-truncated-register-warning-gdb-remote.c.patch @@ -0,0 +1,26 @@ +From 0dc1b1aebeba31dff808a20fcc6444c9acfb99a3 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 14 Mar 2024 15:44:56 +0530 +Subject: [PATCH 41/53] disable truncated register warning (gdb/remote.c) + +Signed-off-by: Aayush Misra +--- + gdb/remote.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/gdb/remote.c b/gdb/remote.c +index 72f14e28f54..cb99e5bc7b1 100644 +--- a/gdb/remote.c ++++ b/gdb/remote.c +@@ -8857,7 +8857,7 @@ remote_target::process_g_packet (struct regcache *regcache) + if (rsa->regs[i].pnum == -1) + continue; + +- if (offset >= sizeof_g_packet) ++ if (offset >= sizeof_g_packet || (offset + reg_size > sizeof_g_packet)) + rsa->regs[i].in_g_packet = 0; + else if (offset + reg_size > sizeof_g_packet) + error (_("Truncated register %d in remote 'g' packet"), i); +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0042-Fix-unresolved-conflicts-from-binutils_2_42_merge.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0042-Fix-unresolved-conflicts-from-binutils_2_42_merge.patch new file mode 100644 index 000000000..88aefa2ff --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0042-Fix-unresolved-conflicts-from-binutils_2_42_merge.patch @@ -0,0 +1,42 @@ +From 81f86c3d6f787a9694e1c95625736f7c921b74df Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 28 Mar 2024 10:20:48 +0530 +Subject: [PATCH 42/53] Fix unresolved conflicts from binutils_2_42_merge + +opcodes/microblaze-dis.c + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + opcodes/microblaze-dis.c | 15 ++++++++++----- + 1 file changed, 10 insertions(+), 5 deletions(-) + +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index 692c977ac00..912fa31be79 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c +@@ -478,11 +478,16 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + case INST_TYPE_NONE: + break; + case INST_TYPE_RD_IMML: +- print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst)); +- break; +- case INST_TYPE_RD_R1_IMMW_IMMS: +- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst)); +- break; ++ print_func (stream, "\t%s, %s", ++ get_field_rd (&buf, inst), get_field_imm16 (&buf, inst)); ++ break; ++ case INST_TYPE_RD_R1_IMMW_IMMS: ++ print_func (stream, "\t%s, %s, %s, %s", ++ get_field_rd (&buf, inst), ++ get_field_r1(&buf, inst), ++ get_field_immw (&buf, inst), ++ get_field_imms (&buf, inst)); ++ break; + /* For tuqula instruction */ + case INST_TYPE_RD: + print_func (stream, "\t%s", get_field_rd (&buf, inst)); +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0043-microblaze_gdbarch_init-set-microblaze_abi-based-on-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0043-microblaze_gdbarch_init-set-microblaze_abi-based-on-.patch new file mode 100644 index 000000000..c5fa72d8b --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0043-microblaze_gdbarch_init-set-microblaze_abi-based-on-.patch @@ -0,0 +1,177 @@ +From a949ac58b5a3e6cbef03fc431f64052827fc9640 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 28 Mar 2024 10:59:40 +0530 +Subject: [PATCH 43/53] microblaze_gdbarch_init: set microblaze_abi based on + wanted_abi and found_abi + +Earlier found_abi was declared but not set, instead gdbarch_info info +was checked every time. Also, microblaze_abi remained undefined for 32-bit +machines. As a result, gdb would show 64-bit registers when connecting +to 32-bit targets with all register values garbled (r5 ended up in r2). +This defect is fixed. found_abi is set from gdbarch_info, microblaze_abi +is set based on wanted_abi and found_abi. Now upon connecting to a 32-bit +remote target (mb-qemu) registers have the correct 32-bit size. + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/microblaze-tdep.c | 73 +++++++++++++++++++------------------------ + 1 file changed, 33 insertions(+), 40 deletions(-) + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index d83e508b82b..6dcdeee76b3 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -116,7 +116,7 @@ show_microblaze_abi (struct ui_file *file, + const char *ignored_value) + { + enum microblaze_abi global_abi = global_microblaze_abi (); +- enum microblaze_abi actual_abi = microblaze_abi (target_gdbarch ()); ++ enum microblaze_abi actual_abi = microblaze_abi (current_inferior ()->arch ()); + const char *actual_abi_str = microblaze_abi_strings[actual_abi]; + + #if 1 +@@ -203,6 +203,13 @@ microblaze_register_name (struct gdbarch *gdbarch, int regnum) + static struct type * + microblaze_register_type (struct gdbarch *gdbarch, int regnum) + { ++ ++ int mb_reg_size = microblaze_abi_regsize(gdbarch); ++ ++ if (gdbarch_debug) ++ gdb_printf (gdb_stdlog, "microblaze_register_type: reg_size = %d\n", ++ mb_reg_size); ++ + if (regnum == MICROBLAZE_SP_REGNUM) + return builtin_type (gdbarch)->builtin_data_ptr; + +@@ -980,34 +987,38 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + enum microblaze_abi microblaze_abi, found_abi, wanted_abi; + const struct target_desc *tdesc = info.target_desc; + ++ /* If there is already a candidate, use it. */ ++ arches = gdbarch_list_lookup_by_info (arches, &info); ++ if ((arches != NULL) && (microblaze_abi != MICROBLAZE_ABI_M64)) ++ return arches->gdbarch; ++ + /* What has the user specified from the command line? */ + wanted_abi = global_microblaze_abi (); + if (gdbarch_debug) + gdb_printf (gdb_stdlog, "microblaze_gdbarch_init: wanted_abi = %d\n", + wanted_abi); ++ ++ found_abi = MICROBLAZE_ABI_AUTO; ++ ++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ found_abi = MICROBLAZE_ABI_M64; ++ + if (wanted_abi != MICROBLAZE_ABI_AUTO) + microblaze_abi = wanted_abi; +- +- /* If there is already a candidate, use it. */ +- arches = gdbarch_list_lookup_by_info (arches, &info); +- if ((arches != NULL) && (microblaze_abi != MICROBLAZE_ABI_M64)) +- return arches->gdbarch; ++ else ++ microblaze_abi = found_abi; + + if (microblaze_abi == MICROBLAZE_ABI_M64) + { +- tdesc = tdesc_microblaze64; +- reg_size = 8; ++ tdesc = tdesc_microblaze64; ++ reg_size = 8; + } +- if (tdesc == NULL) ++ else + { +- if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) +- { +- tdesc = tdesc_microblaze64; +- reg_size = 8; +- } +- else +- tdesc = tdesc_microblaze; ++ tdesc = tdesc_microblaze; ++ reg_size = 4; + } ++ + /* Check any target description for validity. */ + if (tdesc_has_registers (tdesc)) + { +@@ -1015,7 +1026,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + int valid_p; + int i; + +- if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) ++ if (microblaze_abi == MICROBLAZE_ABI_M64) + feature = tdesc_find_feature (tdesc, + "org.gnu.gdb.microblaze64.core"); + else +@@ -1029,7 +1040,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + for (i = 0; i < MICROBLAZE_NUM_REGS; i++) + valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), i, + microblaze_register_names[i]); +- if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) ++ if (microblaze_abi == MICROBLAZE_ABI_M64) + feature = tdesc_find_feature (tdesc, + "org.gnu.gdb.microblaze64.stack-protect"); + else +@@ -1075,15 +1086,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + + /* Register set. + make_regs (gdbarch); */ +- switch (info.bfd_arch_info->mach) +- { +- case bfd_mach_microblaze64: +- set_gdbarch_ptr_bit (gdbarch, 64); +- break; +- } +- if(microblaze_abi == MICROBLAZE_ABI_M64) ++ if (microblaze_abi == MICROBLAZE_ABI_M64) + set_gdbarch_ptr_bit (gdbarch, 64); +- ++ else ++ set_gdbarch_ptr_bit (gdbarch, 32); ++ + /* Map Dwarf2 registers to GDB registers. */ + set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); + +@@ -1105,8 +1112,6 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + microblaze_breakpoint::bp_from_kind); + // set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); + +-// set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); +- + set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); + + set_gdbarch_frame_args_skip (gdbarch, 8); +@@ -1145,9 +1150,6 @@ _initialize_microblaze_tdep () + + gdbarch_register (bfd_arch_microblaze, microblaze_gdbarch_init); + +-// static struct cmd_list_element *setmicroblazecmdlist = NULL; +-// static struct cmd_list_element *showmicroblazecmdlist = NULL; +- + /* Add root prefix command for all "set microblaze"/"show microblaze" commands. */ + + add_setshow_prefix_cmd ("microblaze", no_class, +@@ -1155,15 +1157,6 @@ _initialize_microblaze_tdep () + _("Various microblaze specific commands."), + &setmicroblazecmdlist,&showmicroblazecmdlist, + &setlist,&showlist); +-#if 0 +- add_prefix_cmd ("microblaze", no_class, set_microblaze_command, +- _("Various microblaze specific commands."), +- &setmicroblazecmdlist, "set microblaze ", 0, &setlist); +- +- add_prefix_cmd ("microblaze", no_class, show_microblaze_command, +- _("Various microblaze specific commands."), +- &showmicroblazecmdlist, "show microblaze ", 0, &showlist); +-#endif + + /* Allow the user to override the ABI. */ + add_setshow_enum_cmd ("abi", class_obscure, microblaze_abi_strings, +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0044-Start-bfd_mach_microblaze-values-from-0-0-1-instead-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0044-Start-bfd_mach_microblaze-values-from-0-0-1-instead-.patch new file mode 100644 index 000000000..a22fdb269 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0044-Start-bfd_mach_microblaze-values-from-0-0-1-instead-.patch @@ -0,0 +1,32 @@ +From 70d94c8a627a91b7a59d99abf5c137f650a687d3 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 28 Mar 2024 11:36:32 +0530 +Subject: [PATCH 44/53] Start bfd_mach_microblaze values from 0 (0,1) instead + of (1,2) + +Before 64-bit support there was only bfd_mach_microblaze (implicitly set to 0), +setting microblaze_mach_microblaze64 to 1 + +Signed-off-by: Aayush Misra +--- + bfd/archures.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/bfd/archures.c b/bfd/archures.c +index b9db26627ea..604e65b7256 100644 +--- a/bfd/archures.c ++++ b/bfd/archures.c +@@ -515,8 +515,8 @@ DESCRIPTION + . bfd_arch_lm32, {* Lattice Mico32. *} + .#define bfd_mach_lm32 1 + . bfd_arch_microblaze,{* Xilinx MicroBlaze. *} +-.#define bfd_mach_microblaze 1 +-.#define bfd_mach_microblaze64 2 ++.#define bfd_mach_microblaze 0 ++.#define bfd_mach_microblaze64 1 + . bfd_arch_kvx, {* Kalray VLIW core of the MPPA processor family *} + .#define bfd_mach_kv3_unknown 0 + .#define bfd_mach_kv3_1 1 +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0045-Fix-build-issues-bfd-reloc.c-add-missing-relocs-used.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0045-Fix-build-issues-bfd-reloc.c-add-missing-relocs-used.patch new file mode 100644 index 000000000..a9f96637f --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0045-Fix-build-issues-bfd-reloc.c-add-missing-relocs-used.patch @@ -0,0 +1,61 @@ +From 8fd6902a818f28422bd98b18ff3f0fe9b872e5cf Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 28 Mar 2024 15:37:11 +0530 +Subject: [PATCH 45/53] Fix build issues - bfd/reloc.c add missing relocs used + elsewhere + + BFD_RELOC_MICROBLAZE_EA64 + BFD_RELOC_MICROBLAZE_64_GPC + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + bfd/reloc.c | 16 +++++++++++----- + 1 file changed, 11 insertions(+), 5 deletions(-) + +diff --git a/bfd/reloc.c b/bfd/reloc.c +index b6c9c22a0be..86ca1283582 100644 +--- a/bfd/reloc.c ++++ b/bfd/reloc.c +@@ -6637,13 +6637,19 @@ ENUMDOC + This is a 64 bit reloc that stores 64-bit thread pointer relative offset + to two words (uses imml instruction). + ENUM +-BFD_RELOC_MICROBLAZE_64, ++BFD_RELOC_MICROBLAZE_64 + ENUMDOC + This is a 64 bit reloc that stores the 64 bit pc relative + value in two words (with an imml instruction). No relocation is + done here - only used for relaxing + ENUM +-BFD_RELOC_MICROBLAZE_64_PCREL, ++BFD_RELOC_MICROBLAZE_EA64 ++ENUMDOC ++ This is a 64 bit reloc that stores the 64 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++BFD_RELOC_MICROBLAZE_64_PCREL + ENUMDOC + This is a 32 bit reloc that stores the 32 bit pc relative + value in two words (with an imml instruction). No relocation is +@@ -6686,13 +6692,13 @@ ENUMDOC + two words (with an imm instruction). No relocation is done here - + only used for relaxing. + ENUM +-BFD_RELOC_MICROBLAZE_64_PCREL, ++BFD_RELOC_MICROBLAZE_64_GOTPC + ENUMDOC +- This is a 32 bit reloc that stores the 32 bit pc relative ++ This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imml instruction). No relocation is + done here - only used for relaxing + ENUM +- BFD_RELOC_MICROBLAZE_64_GOTPC ++ BFD_RELOC_MICROBLAZE_64_GPC + ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imml instruction). No relocation is +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0046-Regenerate-bfd-bfd-in2.h-bfd-libbfd.h.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0046-Regenerate-bfd-bfd-in2.h-bfd-libbfd.h.patch new file mode 100644 index 000000000..3e6be5412 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0046-Regenerate-bfd-bfd-in2.h-bfd-libbfd.h.patch @@ -0,0 +1,116 @@ +From 84bb72aa81dddd5f21ac49ddf7b38bce74942cdf Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 28 Mar 2024 15:47:56 +0530 +Subject: [PATCH 46/53] Regenerate - bfd/bfd-in2.h bfd/libbfd.h + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + bfd/bfd-in2.h | 70 +++++++++++++++++++++++++-------------------------- + 1 file changed, 35 insertions(+), 35 deletions(-) + +diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h +index cfab5c99b76..96949605e50 100644 +--- a/bfd/bfd-in2.h ++++ b/bfd/bfd-in2.h +@@ -1771,8 +1771,8 @@ enum bfd_architecture + bfd_arch_lm32, /* Lattice Mico32. */ + #define bfd_mach_lm32 1 + bfd_arch_microblaze,/* Xilinx MicroBlaze. */ +-#define bfd_mach_microblaze 1 +-#define bfd_mach_microblaze64 2 ++#define bfd_mach_microblaze 0 ++#define bfd_mach_microblaze64 1 + bfd_arch_kvx, /* Kalray VLIW core of the MPPA processor family */ + #define bfd_mach_kv3_unknown 0 + #define bfd_mach_kv3_1 1 +@@ -6426,8 +6426,23 @@ enum bfd_reloc_code_real + /* Address of a GOT entry. */ + BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT, + +- /* This is a 32 bit reloc for the microblaze that stores the low 16 +- bits of a value. */ ++ /* This is a 64 bit reloc that stores the 64 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64, ++ ++ /* This is a 64 bit reloc that stores the 64 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_EA64, ++ ++ /* This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64_PCREL, ++ ++ /* This is a 32 bit reloc for the microblaze that stores the ++ low 16 bits of a value */ + BFD_RELOC_MICROBLAZE_32_LO, + + /* This is a 32 bit pc-relative reloc for the microblaze that stores +@@ -6446,44 +6461,29 @@ enum bfd_reloc_code_real + the form "Symbol Op Symbol". */ + BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, + +-/* This is a 32 bit reloc that stores the 32 bit pc relative +-value in two words (with an imm instruction). No relocation is +-done here - only used for relaxing */ ++ /* This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imm instruction). No relocation is ++ done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_32_NONE, + +-/* This is a 64 bit reloc that stores the 32 bit pc relative +- * +value in two words (with an imml instruction). No relocation is +- * +done here - only used for relaxing */ +- BFD_RELOC_MICROBLAZE_64_PCREL, +- +-/* This is a 64 bit reloc that stores the 32 bit relative +- * +value in two words (with an imml instruction). No relocation is +- * +done here - only used for relaxing */ +- BFD_RELOC_MICROBLAZE_EA64, +- +-/* This is a 64 bit reloc that stores the 32 bit pc relative +- * +value in two words (with an imm instruction). No relocation is +- * +done here - only used for relaxing */ +- BFD_RELOC_MICROBLAZE_64_NONE, +- +- /* This is a 64 bit reloc that stores the 32 bit pc relative value in +- two words (with an imm instruction). No relocation is done here +- only used for relaxing */ +- BFD_RELOC_MICROBLAZE_64, ++ /* This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64_NONE, + +-/* This is a 64 bit reloc that stores the 32 bit pc relative +-value in two words (with an imm instruction). The relocation is +-PC-relative GOT offset */ ++ /* This is a 64 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imm instruction). The relocation is ++ PC-relative GOT offset */ + BFD_RELOC_MICROBLAZE_64_GOTPC, + +-/* This is a 64 bit reloc that stores the 32 bit pc relative +-value in two words (with an imml instruction). The relocation is +-PC-relative GOT offset */ ++ /* This is a 64 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_64_GPC, + +-/* This is a 64 bit reloc that stores the 32 bit pc relative +-value in two words (with an imm instruction). The relocation is +-GOT offset */ ++ /* This is a 64 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imm instruction). The relocation is ++ GOT offset */ + BFD_RELOC_MICROBLAZE_64_GOT, + + /* This is a 64 bit reloc that stores the 32 bit pc relative value in +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0047-gdb-remote.c-revert-earlier-change-to-process_g_pack.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0047-gdb-remote.c-revert-earlier-change-to-process_g_pack.patch new file mode 100644 index 000000000..bf82b0efb --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0047-gdb-remote.c-revert-earlier-change-to-process_g_pack.patch @@ -0,0 +1,32 @@ +From 8deda21efd527564a262dc07a519f8bd03095b3c Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 28 Mar 2024 16:32:22 +0530 +Subject: [PATCH 47/53] gdb/remote.c - revert earlier change to + process_g_packet + +When connecting to remote target, gdb (microblaze-xilinx-elf) was +generating Truncated register 29 error when parsing the g packet, +workaround added being reverted. + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/remote.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/gdb/remote.c b/gdb/remote.c +index cb99e5bc7b1..72f14e28f54 100644 +--- a/gdb/remote.c ++++ b/gdb/remote.c +@@ -8857,7 +8857,7 @@ remote_target::process_g_packet (struct regcache *regcache) + if (rsa->regs[i].pnum == -1) + continue; + +- if (offset >= sizeof_g_packet || (offset + reg_size > sizeof_g_packet)) ++ if (offset >= sizeof_g_packet) + rsa->regs[i].in_g_packet = 0; + else if (offset + reg_size > sizeof_g_packet) + error (_("Truncated register %d in remote 'g' packet"), i); +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0048-Fix-build-issues-after-Xilinx-2023.2-binutils-patch-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0048-Fix-build-issues-after-Xilinx-2023.2-binutils-patch-.patch new file mode 100644 index 000000000..6c40a7e46 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0048-Fix-build-issues-after-Xilinx-2023.2-binutils-patch-.patch @@ -0,0 +1,465 @@ +From e372266dde792b03fb1754769a9615c818336171 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Mon, 1 Apr 2024 16:21:28 +0530 +Subject: [PATCH 48/53] Fix build issues after Xilinx 2023.2 binutils patch + merge + +binutils/readelf.c - duplicate case statement +gas/config/tc-microblaze.c - Missing , between array elements +gas/config/tc-microblaze.c - A whole hunk ended up in wrong function/switch + +Signed-off-by: Aayush Misra +--- + bfd/libbfd.h | 6 +- + binutils/readelf.c | 5 - + gas/config/tc-microblaze.c | 375 +++++++++++++++++++------------------ + 3 files changed, 192 insertions(+), 194 deletions(-) + +diff --git a/bfd/libbfd.h b/bfd/libbfd.h +index 7a3e558d70a..5f78d16db18 100644 +--- a/bfd/libbfd.h ++++ b/bfd/libbfd.h +@@ -2998,6 +2998,9 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", + "BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21", + "BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12", + "BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT", ++ "BFD_RELOC_MICROBLAZE_64", ++ "BFD_RELOC_MICROBLAZE_EA64", ++ "BFD_RELOC_MICROBLAZE_64_PCREL", + "BFD_RELOC_MICROBLAZE_32_LO", + "BFD_RELOC_MICROBLAZE_32_LO_PCREL", + "BFD_RELOC_MICROBLAZE_32_ROSDA", +@@ -3006,13 +3009,12 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", + "BFD_RELOC_MICROBLAZE_32_NONE", + "BFD_RELOC_MICROBLAZE_64_NONE", + "BFD_RELOC_MICROBLAZE_64_GOTPC", ++ "BFD_RELOC_MICROBLAZE_64_GPC", + "BFD_RELOC_MICROBLAZE_64_GOT", + "BFD_RELOC_MICROBLAZE_64_PLT", + "BFD_RELOC_MICROBLAZE_64_GOTOFF", + "BFD_RELOC_MICROBLAZE_32_GOTOFF", + "BFD_RELOC_MICROBLAZE_COPY", +- "BFD_RELOC_MICROBLAZE_64", +- "BFD_RELOC_MICROBLAZE_64_PCREL", + "BFD_RELOC_MICROBLAZE_64_TLS", + "BFD_RELOC_MICROBLAZE_64_TLSGD", + "BFD_RELOC_MICROBLAZE_64_TLSLD", +diff --git a/binutils/readelf.c b/binutils/readelf.c +index 3ca9f3697d1..5e4ad6ea6ad 100644 +--- a/binutils/readelf.c ++++ b/binutils/readelf.c +@@ -15288,11 +15288,6 @@ is_8bit_abs_reloc (Filedata * filedata, unsigned int reloc_type) + || reloc_type == 9 /* R_MICROBLAZE_64_NONE. */); + default: + return false; +- /* REVISIT microblaze-binutils-merge */ +- case EM_MICROBLAZE: +- return reloc_type == 33 /* R_MICROBLAZE_32_NONE. */ +- || reloc_type == 0 /* R_MICROBLAZE_NONE. */ +- || reloc_type == 9; /* R_MICROBLAZE_64_NONE. */ + } + } + +diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c +index 686b1a00177..d3d1e334bb5 100644 +--- a/gas/config/tc-microblaze.c ++++ b/gas/config/tc-microblaze.c +@@ -118,7 +118,7 @@ const relax_typeS md_relax_table[] = + { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 15: TLSGOTTPREL_OFFSET. */ + { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 16: TLSTPREL_OFFSET. */ + { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 17: TEXT_OFFSET. */ +- { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 } /* 18: TEXT_PC_OFFSET. */ ++ { 0x7fffffff, 0x80000000, INST_WORD_SIZE*2, 0 }, /* 18: TEXT_PC_OFFSET. */ + { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE, 0 }, /* 19: DEFINED_64_OFFSET. */ + { 0x7fffffffffffffff, 0x8000000000000000, INST_WORD_SIZE*2, 0 } /* 20: DEFINED_64_PC_OFFSET. */ + }; +@@ -2263,6 +2263,193 @@ md_assemble (char * str) + inst |= (immed << IMM_MBAR); + break; + ++ /* For 64-bit instructions */ ++ case INST_TYPE_RD_R1_IMML: ++ if (strcmp (op_end, "")) ++ op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ ++ else ++ { ++ as_fatal (_("Error in statement syntax")); ++ reg1 = 0; ++ } ++ if (strcmp (op_end, "")) ++ op_end = parse_reg (op_end + 1, ®2); /* Get r1. */ ++ else ++ { ++ as_fatal (_("Error in statement syntax")); ++ reg2 = 0; ++ } ++ if (strcmp (op_end, "")) ++ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); ++ else ++ as_fatal (_("Error in statement syntax")); ++ ++ /* Check for spl registers. */ ++ if (check_spl_reg (& reg1)) ++ as_fatal (_("Cannot use special register with this instruction")); ++ if (check_spl_reg (& reg2)) ++ as_fatal (_("Cannot use special register with this instruction")); ++ ++ if (exp.X_op != O_constant) ++ { ++ char *opc = NULL; ++ //char *opc = str_microblaze_64; ++ relax_substateT subtype; ++ ++ if (exp.X_md != 0) ++ subtype = get_imm_otype(exp.X_md); ++ else ++ subtype = opcode->inst_offset_type; ++ ++ output = frag_var (rs_machine_dependent, ++ isize * 2, /* maxm of 2 words. */ ++ isize * 2, /* minm of 2 words. */ ++ subtype, /* PC-relative or not. */ ++ exp.X_add_symbol, ++ exp.X_add_number, ++ (char *) opc); ++ immedl = 0L; ++ } ++ else ++ { ++ output = frag_more (isize); ++ immedl = exp.X_add_number; ++ if (((long long)immedl) > (long long)-549755813888 && ((long long)immedl) < (long long)549755813887) ++ { ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ else { ++ opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode2 == NULL || opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode2->bit_sequence; ++ inst1 |= ((immedl & 0xFFFFFF0000000000L) >> 40) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ } ++ ++ inst |= (reg1 << RD_LOW) & RD_MASK; ++ inst |= (reg2 << RA_LOW) & RA_MASK; ++ inst |= (immedl << IMM_LOW) & IMM_MASK; ++ break; ++ ++ case INST_TYPE_R1_IMML: ++ if (strcmp (op_end, "")) ++ op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ ++ else ++ { ++ as_fatal (_("Error in statement syntax")); ++ reg1 = 0; ++ } ++ if (strcmp (op_end, "")) ++ op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); ++ else ++ as_fatal (_("Error in statement syntax")); ++ ++ /* Check for spl registers. */ ++ if (check_spl_reg (®1)) ++ as_fatal (_("Cannot use special register with this instruction")); ++ ++ if (exp.X_op != O_constant) ++ { ++ //char *opc = NULL; ++ char *opc = str_microblaze_64; ++ relax_substateT subtype; ++ ++ if (exp.X_md != 0) ++ subtype = get_imm_otype(exp.X_md); ++ else ++ subtype = opcode->inst_offset_type; ++ ++ output = frag_var (rs_machine_dependent, ++ isize * 2, /* maxm of 2 words. */ ++ isize * 2, /* minm of 2 words. */ ++ subtype, /* PC-relative or not. */ ++ exp.X_add_symbol, ++ exp.X_add_number, ++ (char *) opc); ++ immedl = 0L; ++ } ++ else ++ { ++ output = frag_more (isize); ++ immedl = exp.X_add_number; ++ if (((long long)immedl) > (long long)-549755813888 && ((long long)immedl) < (long long)549755813887) ++ { ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ else { ++ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); ++ if (opcode2 == NULL || opcode1 == NULL) ++ { ++ as_bad (_("unknown opcode \"%s\""), "imml"); ++ return; ++ } ++ inst1 = opcode2->bit_sequence; ++ inst1 |= ((immedl & 0xFFFFFF0000000000L) >> 40) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ inst1 = opcode1->bit_sequence; ++ inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; ++ output[0] = INST_BYTE0 (inst1); ++ output[1] = INST_BYTE1 (inst1); ++ output[2] = INST_BYTE2 (inst1); ++ output[3] = INST_BYTE3 (inst1); ++ output = frag_more (isize); ++ } ++ } ++ ++ inst |= (reg1 << RA_LOW) & RA_MASK; ++ inst |= (immedl << IMM_LOW) & IMM_MASK; ++ break; ++ ++ case INST_TYPE_IMML: ++ as_fatal (_("An IMML instruction should not be present in the .s file")); ++ break; ++ + default: + as_fatal (_("unimplemented opcode \"%s\""), name); + } +@@ -3177,192 +3364,6 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) + case BFD_RELOC_MICROBLAZE_64_TEXTREL: + code = fixp->fx_r_type; + break; +- /* For 64-bit instructions */ +- case INST_TYPE_RD_R1_IMML: +- if (strcmp (op_end, "")) +- op_end = parse_reg (op_end + 1, ®1); /* Get rd. */ +- else +- { +- as_fatal (_("Error in statement syntax")); +- reg1 = 0; +- } +- if (strcmp (op_end, "")) +- op_end = parse_reg (op_end + 1, ®2); /* Get r1. */ +- else +- { +- as_fatal (_("Error in statement syntax")); +- reg2 = 0; +- } +- if (strcmp (op_end, "")) +- op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); +- else +- as_fatal (_("Error in statement syntax")); +- +- /* Check for spl registers. */ +- if (check_spl_reg (& reg1)) +- as_fatal (_("Cannot use special register with this instruction")); +- if (check_spl_reg (& reg2)) +- as_fatal (_("Cannot use special register with this instruction")); +- +- if (exp.X_op != O_constant) +- { +- char *opc = NULL; +- //char *opc = str_microblaze_64; +- relax_substateT subtype; +- +- if (exp.X_md != 0) +- subtype = get_imm_otype(exp.X_md); +- else +- subtype = opcode->inst_offset_type; +- +- output = frag_var (rs_machine_dependent, +- isize * 2, /* maxm of 2 words. */ +- isize * 2, /* minm of 2 words. */ +- subtype, /* PC-relative or not. */ +- exp.X_add_symbol, +- exp.X_add_number, +- (char *) opc); +- immedl = 0L; +- } +- else +- { +- output = frag_more (isize); +- immedl = exp.X_add_number; +- if (((long long)immedl) > (long long)-549755813888 && ((long long)immedl) < (long long)549755813887) +- { +- opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); +- if (opcode1 == NULL) +- { +- as_bad (_("unknown opcode \"%s\""), "imml"); +- return; +- } +- inst1 = opcode1->bit_sequence; +- inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; +- output[0] = INST_BYTE0 (inst1); +- output[1] = INST_BYTE1 (inst1); +- output[2] = INST_BYTE2 (inst1); +- output[3] = INST_BYTE3 (inst1); +- output = frag_more (isize); +- } +- else { +- opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); +- opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); +- if (opcode2 == NULL || opcode1 == NULL) +- { +- as_bad (_("unknown opcode \"%s\""), "imml"); +- return; +- } +- inst1 = opcode2->bit_sequence; +- inst1 |= ((immedl & 0xFFFFFF0000000000L) >> 40) & IMML_MASK; +- output[0] = INST_BYTE0 (inst1); +- output[1] = INST_BYTE1 (inst1); +- output[2] = INST_BYTE2 (inst1); +- output[3] = INST_BYTE3 (inst1); +- output = frag_more (isize); +- inst1 = opcode1->bit_sequence; +- inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; +- output[0] = INST_BYTE0 (inst1); +- output[1] = INST_BYTE1 (inst1); +- output[2] = INST_BYTE2 (inst1); +- output[3] = INST_BYTE3 (inst1); +- output = frag_more (isize); +- } +- } +- +- inst |= (reg1 << RD_LOW) & RD_MASK; +- inst |= (reg2 << RA_LOW) & RA_MASK; +- inst |= (immedl << IMM_LOW) & IMM_MASK; +- break; +- +- case INST_TYPE_R1_IMML: +- if (strcmp (op_end, "")) +- op_end = parse_reg (op_end + 1, ®1); /* Get r1. */ +- else +- { +- as_fatal (_("Error in statement syntax")); +- reg1 = 0; +- } +- if (strcmp (op_end, "")) +- op_end = parse_imml (op_end + 1, & exp, MIN_IMML, MAX_IMML); +- else +- as_fatal (_("Error in statement syntax")); +- +- /* Check for spl registers. */ +- if (check_spl_reg (®1)) +- as_fatal (_("Cannot use special register with this instruction")); +- +- if (exp.X_op != O_constant) +- { +- //char *opc = NULL; +- char *opc = str_microblaze_64; +- relax_substateT subtype; +- +- if (exp.X_md != 0) +- subtype = get_imm_otype(exp.X_md); +- else +- subtype = opcode->inst_offset_type; +- +- output = frag_var (rs_machine_dependent, +- isize * 2, /* maxm of 2 words. */ +- isize * 2, /* minm of 2 words. */ +- subtype, /* PC-relative or not. */ +- exp.X_add_symbol, +- exp.X_add_number, +- (char *) opc); +- immedl = 0L; +- } +- else +- { +- output = frag_more (isize); +- immedl = exp.X_add_number; +- if (((long long)immedl) > (long long)-549755813888 && ((long long)immedl) < (long long)549755813887) +- { +- opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); +- if (opcode1 == NULL) +- { +- as_bad (_("unknown opcode \"%s\""), "imml"); +- return; +- } +- inst1 = opcode1->bit_sequence; +- inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; +- output[0] = INST_BYTE0 (inst1); +- output[1] = INST_BYTE1 (inst1); +- output[2] = INST_BYTE2 (inst1); +- output[3] = INST_BYTE3 (inst1); +- output = frag_more (isize); +- } +- else { +- opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); +- opcode2 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml"); +- if (opcode2 == NULL || opcode1 == NULL) +- { +- as_bad (_("unknown opcode \"%s\""), "imml"); +- return; +- } +- inst1 = opcode2->bit_sequence; +- inst1 |= ((immedl & 0xFFFFFF0000000000L) >> 40) & IMML_MASK; +- output[0] = INST_BYTE0 (inst1); +- output[1] = INST_BYTE1 (inst1); +- output[2] = INST_BYTE2 (inst1); +- output[3] = INST_BYTE3 (inst1); +- output = frag_more (isize); +- inst1 = opcode1->bit_sequence; +- inst1 |= ((immedl & 0x000000FFFFFF0000L) >> 16) & IMML_MASK; +- output[0] = INST_BYTE0 (inst1); +- output[1] = INST_BYTE1 (inst1); +- output[2] = INST_BYTE2 (inst1); +- output[3] = INST_BYTE3 (inst1); +- output = frag_more (isize); +- } +- } +- +- inst |= (reg1 << RA_LOW) & RA_MASK; +- inst |= (immedl << IMM_LOW) & IMM_MASK; +- break; +- +- case INST_TYPE_IMML: +- as_fatal (_("An IMML instruction should not be present in the .s file")); +- break; + + default: + switch (F (fixp->fx_size, fixp->fx_pcrel)) +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0049-When-unwinding-pc-value-adjust-return-pc-value.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0049-When-unwinding-pc-value-adjust-return-pc-value.patch new file mode 100644 index 000000000..f78695324 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0049-When-unwinding-pc-value-adjust-return-pc-value.patch @@ -0,0 +1,92 @@ +From 21527b2edc1359417cc7978558167ef9c8c92afd Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Wed, 1 May 2024 11:12:32 +0530 +Subject: [PATCH 49/53] When unwinding pc value, adjust return pc value + +A call (branch and link) instruction can include a delay slot, the +value of pc stored in the link register for Microblaze architecture +is the pc value corresponding to last executed instruction (call) +in the caller. The return instruction (branch reg) includes an +offset of 8 so that when function returns execution continues from +the address at : link register + 8, as the instruction in delay slot +(link register + 4) is already executed at the time of call. + +Handle this by adjusting pc value during unwind-pc. + +Basically restoring code to do this that seems to have been removed +as part of a gdb patch (gdb patch #8, Xilinx Yocto 2023.2) + +That patch caused hundreds of regressions in gdb testuite, including +gdb.base/advance.exp, which is now fixed. + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/microblaze-tdep.c | 24 ++++++++++++++++++------ + 1 file changed, 18 insertions(+), 6 deletions(-) + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 6dcdeee76b3..2507cfe540f 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -523,6 +523,12 @@ microblaze_unwind_pc (struct gdbarch *gdbarch, frame_info_ptr next_frame) + { + CORE_ADDR pc; + pc=frame_unwind_register_unsigned (next_frame, MICROBLAZE_PC_REGNUM); ++ /* For sentinel frame, return address is actual PC. For other frames, ++ return address is pc+8. This is a workaround because gcc does not ++ generate correct return address in CIE. */ ++ if (frame_relative_level (next_frame) >= 0) ++ pc = pc + 8; ++ microblaze_debug ("unwind pc = 0x%x\n", (int) pc); + return pc; + } + +@@ -615,6 +621,7 @@ microblaze_frame_prev_register (frame_info_ptr this_frame, + struct microblaze_frame_cache *cache = + microblaze_frame_cache (this_frame, this_cache); + ++#if 1 + if ((regnum == MICROBLAZE_SP_REGNUM && + cache->register_offsets[MICROBLAZE_SP_REGNUM]) + || (regnum == MICROBLAZE_FP_REGNUM && +@@ -625,15 +632,22 @@ if ((regnum == MICROBLAZE_SP_REGNUM && + + if (regnum == MICROBLAZE_PC_REGNUM) + { +- regnum = 15; ++ regnum = MICROBLAZE_PREV_PC_REGNUM; ++ ++ microblaze_debug ("prev pc is r15 @ frame offset 0x%x\n", ++ (int) cache->register_offsets[regnum] ); ++ + return frame_unwind_got_memory (this_frame, regnum, + cache->register_offsets[MICROBLAZE_PREV_PC_REGNUM]); +- + } ++ + if (regnum == MICROBLAZE_SP_REGNUM) + regnum = 1; +-#if 0 + ++ return trad_frame_get_prev_register (this_frame, cache->saved_regs, ++ regnum); ++ ++#else + if (cache->frameless_p) + { + if (regnum == MICROBLAZE_PC_REGNUM) +@@ -646,9 +660,7 @@ if (regnum == MICROBLAZE_SP_REGNUM) + else + return trad_frame_get_prev_register (this_frame, cache->saved_regs, + regnum); +-#endif +- return trad_frame_get_prev_register (this_frame, cache->saved_regs, +- regnum); ++#endif + } + + static const struct frame_unwind microblaze_frame_unwind = +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0050-info-reg-pc-does-not-print-symbolic-value.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0050-info-reg-pc-does-not-print-symbolic-value.patch new file mode 100644 index 000000000..c9bca41df --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0050-info-reg-pc-does-not-print-symbolic-value.patch @@ -0,0 +1,116 @@ +From 54a6eedd59d70a80be5dc8b4a5abe642113ea291 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 9 May 2024 11:30:22 +0530 +Subject: [PATCH 50/53] info reg pc does not print symbolic value + +Problem - Test gdb.base/pc-fp.exp fails +Fix - Change feature/microblaze-core.xml add type=code_ptr for pc + +Files changed + features/microblaze-core.xml + features/microblaze.c (generated) + features/microblaze-with-stack-protect.c (generated) + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/features/microblaze-core.xml | 4 ++-- + gdb/features/microblaze-with-stack-protect.c | 10 ++++++---- + gdb/features/microblaze.c | 8 ++++---- + 3 files changed, 12 insertions(+), 10 deletions(-) + +diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml +index 4d77d9d898f..f49d048fc73 100644 +--- a/gdb/features/microblaze-core.xml ++++ b/gdb/features/microblaze-core.xml +@@ -8,7 +8,7 @@ + + + +- ++ + + + +@@ -39,7 +39,7 @@ + + + +- ++ + + + +diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c +index 8ab9565a047..95e3eed1a4e 100644 +--- a/gdb/features/microblaze-with-stack-protect.c ++++ b/gdb/features/microblaze-with-stack-protect.c +@@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) + + feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); +@@ -45,7 +45,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); +@@ -70,10 +70,12 @@ initialize_tdesc_microblaze_with_stack_protect (void) + tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); +- +- feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.stack-protect"); + tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int"); + ++ feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.stack-protect"); ++ tdesc_create_reg (feature, "slr", 59, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "shr", 60, 1, NULL, 32, "int"); ++ + tdesc_microblaze_with_stack_protect = result.release (); + } +diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c +index ed12e5bcfd2..ff4865b2acc 100644 +--- a/gdb/features/microblaze.c ++++ b/gdb/features/microblaze.c +@@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void) + + feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); +@@ -45,7 +45,7 @@ initialize_tdesc_microblaze (void) + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); +@@ -70,8 +70,8 @@ initialize_tdesc_microblaze (void) + tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); +- tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int"); + + tdesc_microblaze = result.release (); + } +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0051-Wrong-target-description-accepted-by-microblaze-arch.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0051-Wrong-target-description-accepted-by-microblaze-arch.patch new file mode 100644 index 000000000..659930214 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0051-Wrong-target-description-accepted-by-microblaze-arch.patch @@ -0,0 +1,51 @@ +From 80f3d1ca2ece1ef143f00365b938e0d0b575d239 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 9 May 2024 11:34:04 +0530 +Subject: [PATCH 51/53] Wrong target description accepted by microblaze + architecture + +Fix - Modify microblaze_gdbarch_init, set tdesc only when it is NULL + +Files changed - gdb/microblaze-tdep.c + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/microblaze-tdep.c | 21 ++++++++++++--------- + 1 file changed, 12 insertions(+), 9 deletions(-) + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 2507cfe540f..cc80e4f0e6b 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -1020,15 +1020,18 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + else + microblaze_abi = found_abi; + +- if (microblaze_abi == MICROBLAZE_ABI_M64) +- { +- tdesc = tdesc_microblaze64; +- reg_size = 8; +- } +- else +- { +- tdesc = tdesc_microblaze; +- reg_size = 4; ++ if (tdesc == NULL) ++ { ++ if (microblaze_abi == MICROBLAZE_ABI_M64) ++ { ++ tdesc = tdesc_microblaze64; ++ reg_size = 8; ++ } ++ else ++ { ++ tdesc = tdesc_microblaze; ++ reg_size = 4; ++ } + } + + /* Check any target description for validity. */ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0052-Merge-gdb-microblaze-linux-tdep.c-to-gdb-14-and-fix-.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0052-Merge-gdb-microblaze-linux-tdep.c-to-gdb-14-and-fix-.patch new file mode 100644 index 000000000..f358e45e5 --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0052-Merge-gdb-microblaze-linux-tdep.c-to-gdb-14-and-fix-.patch @@ -0,0 +1,42 @@ +From 2e4370f257fae84d18d1f6ef3a756795d77d5707 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 23 May 2024 16:02:59 +0530 +Subject: [PATCH 52/53] Merge gdb/microblaze-linux-tdep.c to gdb-14 and fix + compilation issues. + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/microblaze-linux-tdep.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c +index babc9020f0f..00112b8f540 100644 +--- a/gdb/microblaze-linux-tdep.c ++++ b/gdb/microblaze-linux-tdep.c +@@ -48,10 +48,12 @@ microblaze_debug (const char *fmt, ...) + if (microblaze_debug_flag) + { + va_list args; ++ string_file file (gdb_stdout->can_emit_style_escape ()); + + va_start (args, fmt); + printf_unfiltered ("MICROBLAZE LINUX: "); +- vprintf_unfiltered (fmt, args); ++ file.vprintf (fmt, args); ++ gdb_stdout->puts_unfiltered (file.string ().c_str ()); + va_end (args); + } + } +@@ -145,7 +147,7 @@ static void + microblaze_linux_init_abi (struct gdbarch_info info, + struct gdbarch *gdbarch) + { +- struct microblaze_gdbarch_tdep *tdep =(microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); ++ struct microblaze_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + tdep->sizeof_gregset = 200; + +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0053-Roll-back-an-improvement-which-inlines-target_gdbarc.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0053-Roll-back-an-improvement-which-inlines-target_gdbarc.patch new file mode 100644 index 000000000..f7d32927e --- /dev/null +++ b/meta-microblaze/recipes-devtools/binutils/binutils/0053-Roll-back-an-improvement-which-inlines-target_gdbarc.patch @@ -0,0 +1,29 @@ +From 13146f53b89c03b086e883e1f4bd9e14c32e6943 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Fri, 19 Jul 2024 12:39:24 +0530 +Subject: [PATCH 53/53] Roll back an improvement which inlines target_gdbarch + () inherited from binutils 2.42 merge that causes compilation issues on gdb + 14.2 + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/microblaze-tdep.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index cc80e4f0e6b..86dedafdbd6 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -116,7 +116,7 @@ show_microblaze_abi (struct ui_file *file, + const char *ignored_value) + { + enum microblaze_abi global_abi = global_microblaze_abi (); +- enum microblaze_abi actual_abi = microblaze_abi (current_inferior ()->arch ()); ++ enum microblaze_abi actual_abi = microblaze_abi ( target_gdbarch () ); + const char *actual_abi_str = microblaze_abi_strings[actual_abi]; + + #if 1 +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12.2.inc b/meta-microblaze/recipes-devtools/gcc/gcc-12.2.inc deleted file mode 100644 index 828674891..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12.2.inc +++ /dev/null @@ -1,114 +0,0 @@ -require gcc-common.inc - -# Third digit in PV should be incremented after a minor release - -PV = "12.2.0" - -# BINV should be incremented to a revision after a minor gcc release - -BINV = "12.2.0" - -FILESEXTRAPATHS =. "${FILE_DIRNAME}/gcc:${FILE_DIRNAME}/gcc/backport:" - -DEPENDS =+ "mpfr gmp libmpc zlib flex-native" -NATIVEDEPS = "mpfr-native gmp-native libmpc-native zlib-native flex-native zstd-native" - -LICENSE = "GPL-3.0-with-GCC-exception & GPL-3.0-only" - -LIC_FILES_CHKSUM = "\ - file://COPYING;md5=59530bdf33659b29e73d4adb9f9f6552 \ - file://COPYING3;md5=d32239bcb673463ab874e80d47fae504 \ - file://COPYING3.LIB;md5=6a6a8e020838b23406c81b19c1d46df6 \ - file://COPYING.LIB;md5=2d5025d4aa3495befef8f17206a5b0a1 \ - file://COPYING.RUNTIME;md5=fe60d87048567d4fe8c8a0ed2448bcc8 \ -" -# from git -#RELEASE ?= "7092b7aea122a91824d048aeb23834cf1d19b1a1" -#BASEURI ?= "https://repo.or.cz/official-gcc.git/snapshot/${RELEASE}.tar.gz;downloadfilename=gcc-${PV}-${RELEASE}.tar.gz" -#SOURCEDIR ?= "official-gcc-${@'${RELEASE}'[0:7]}" - -# from snapshot -#RELEASE ?= "12.1.0-RC-20220429" -#SOURCEDIR ?= "gcc-${RELEASE}" -#BASEURI ?= "https://gcc.gnu.org/pub/gcc/snapshots/${RELEASE}/gcc-${RELEASE}.tar.xz" - -# official release -RELEASE ?= "${PV}" -BASEURI ?= "${GNU_MIRROR}/gcc/gcc-${PV}/gcc-${PV}.tar.xz" -SOURCEDIR ?= "gcc-${PV}" - -SRC_URI = "${BASEURI} \ - file://0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch \ - file://0002-gcc-poison-system-directories.patch \ - file://0003-64-bit-multilib-hack.patch \ - file://0004-Pass-CXXFLAGS_FOR_BUILD-in-a-couple-of-places-to-avo.patch \ - file://0005-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch \ - file://0006-cpp-honor-sysroot.patch \ - file://0007-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch \ - file://0008-libtool.patch \ - file://0009-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch \ - file://0010-Use-the-multilib-config-files-from-B-instead-of-usin.patch \ - file://0011-Avoid-using-libdir-from-.la-which-usually-points-to-.patch \ - file://0013-Ensure-target-gcc-headers-can-be-included.patch \ - file://0014-Don-t-search-host-directory-during-relink-if-inst_pr.patch \ - file://0015-libcc1-fix-libcc1-s-install-path-and-rpath.patch \ - file://0016-handle-sysroot-support-for-nativesdk-gcc.patch \ - file://0017-Search-target-sysroot-gcc-version-specific-dirs-with.patch \ - file://0018-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch \ - file://0019-Re-introduce-spe-commandline-options.patch \ - file://0020-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch \ - file://0021-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch \ - file://0023-libatomic-Do-not-enforce-march-on-aarch64.patch \ - file://0024-Fix-install-path-of-linux64.h.patch \ - file://0026-rust-recursion-limit.patch \ - file://prefix-map-realpath.patch \ - file://hardcoded-paths.patch \ -" -SRC_URI[sha256sum] = "e549cf9cf3594a00e27b6589d4322d70e0720cdd213f39beb4181e06926230ff" - -S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/${SOURCEDIR}" -B = "${WORKDIR}/gcc-${PV}/build.${HOST_SYS}.${TARGET_SYS}" - -# Language Overrides -FORTRAN = "" -JAVA = "" - -SSP ?= "--disable-libssp" -SSP:mingw32 = "--enable-libssp" - -EXTRA_OECONF_BASE = "\ - ${SSP} \ - --enable-libitm \ - --enable-lto \ - --disable-bootstrap \ - --with-system-zlib \ - ${@'--with-linker-hash-style=${LINKER_HASH_STYLE}' if '${LINKER_HASH_STYLE}' else ''} \ - --enable-linker-build-id \ - --with-ppl=no \ - --with-cloog=no \ - --enable-checking=release \ - --enable-cheaders=c_global \ - --without-isl \ -" - -EXTRA_OECONF_INITIAL = "\ - --disable-libgomp \ - --disable-libitm \ - --disable-libquadmath \ - --with-system-zlib \ - --disable-lto \ - --disable-plugin \ - --enable-linker-build-id \ - --enable-decimal-float=no \ - --without-isl \ - --disable-libssp \ -" - -EXTRA_OECONF_PATHS = "\ - --with-gxx-include-dir=/not/exist{target_includedir}/c++/${BINV} \ - --with-sysroot=/not/exist \ - --with-build-sysroot=${STAGING_DIR_TARGET} \ -" - -# Is a binutils 2.26 issue, not gcc -CVE_STATUS[CVE-2021-37322] = "cpe-incorrect: Is a binutils 2.26 issue, not gcc" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0001-LOCAL-Testsuite-builtins-tests-require-fpic-Signed-o.patch similarity index 83% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0001-LOCAL-Testsuite-builtins-tests-require-fpic-Signed-o.patch index f89857522..8b9c61772 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0001-LOCAL-Testsuite-builtins-tests-require-fpic-Signed-o.patch @@ -1,9 +1,7 @@ -From 376b0ee790231a99fe50b50e20070c104bbba0d8 Mon Sep 17 00:00:00 2001 +From 8beb2e85436c77db197ce22626c7b7037d41d595 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Wed, 11 Jan 2017 13:13:57 +0530 -Subject: [PATCH 01/53] LOCAL]: Testsuite - builtins tests require fpic -Upstream-Status: Pending - +Subject: [PATCH 01/54] LOCAL]: Testsuite - builtins tests require fpic Signed-off-by: David Holsgrove Conflicts: @@ -14,7 +12,7 @@ Conflicts: 1 file changed, 8 insertions(+) diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp -index fb47f51f90c..d9ecf045554 100644 +index fa762d33232..ce8545fc460 100644 --- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp +++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp @@ -48,6 +48,14 @@ if { [istarget *-*-eabi*] @@ -33,5 +31,5 @@ index fb47f51f90c..d9ecf045554 100644 if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} { c-torture-execute [list $src \ -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0002-Quick-fail-g-.dg-opt-memcpy1.C-This-particular-testc.patch similarity index 66% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0002-Quick-fail-g-.dg-opt-memcpy1.C-This-particular-testc.patch index 5302b942d..94970e7b1 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0002-Quick-fail-g-.dg-opt-memcpy1.C-This-particular-testc.patch @@ -1,12 +1,10 @@ -From b1aea8e71692065497ee3e9be5a9f1fccecf5685 Mon Sep 17 00:00:00 2001 +From 4a2d958fe0d54c78b7a131b9cde1c74165533aaf Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Wed, 11 Jan 2017 14:31:10 +0530 -Subject: [PATCH 02/53] [LOCAL]: Quick fail g++.dg/opt/memcpy1.C This - particular testcase fails with a timeout. Instead, fail it at compile-time - for microblaze. This speeds up the testsuite without removing it from the - FAIL reports. - -Upstream-Status: Pending +Subject: [PATCH 02/54] Quick fail g++.dg/opt/memcpy1.C This particular + testcase fails with a timeout. Instead, fail it at compile-time for + microblaze. This speeds up the testsuite without removing it from the FAIL + reports. Signed-off-by: Edgar E. Iglesias --- @@ -29,5 +27,5 @@ index 3862756083d..db9f990f781 100644 typedef uint8_t uint8; __extension__ typedef __SIZE_TYPE__ size_t; -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0003-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0003-For-dejagnu-static-testing-on-qemu-suppress-warnings.patch similarity index 73% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0003-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0003-For-dejagnu-static-testing-on-qemu-suppress-warnings.patch index 89fe0ff60..5b4466d84 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0003-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0003-For-dejagnu-static-testing-on-qemu-suppress-warnings.patch @@ -1,20 +1,18 @@ -From af78edb2cb91c55f54ac2d720cee9871da13b845 Mon Sep 17 00:00:00 2001 +From 0b4ec0cbfc13f5a40a20663da9c074ac81c5ec3f Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Wed, 11 Jan 2017 15:46:28 +0530 -Subject: [PATCH 03/53] [LOCAL]: For dejagnu static testing on qemu, suppress - warnings about multiple definitions from the test function and libc in line - with method used by powerpc. Dynamic linking and using a qemu binary which +Subject: [PATCH 03/54] For dejagnu static testing on qemu, suppress warnings + about multiple definitions from the test function and libc in line with + method used by powerpc. Dynamic linking and using a qemu binary which understands sysroot resolves all test failures with builtins -Upstream-Status: Pending - Signed-off-by: David Holsgrove --- gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp | 4 ---- 1 file changed, 4 deletions(-) diff --git a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp -index d9ecf045554..d6c2b04f286 100644 +index ce8545fc460..72fd697d855 100644 --- a/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp +++ b/gcc/testsuite/gcc.c-torture/execute/builtins/builtins.exp @@ -48,14 +48,10 @@ if { [istarget *-*-eabi*] @@ -33,5 +31,5 @@ index d9ecf045554..d6c2b04f286 100644 if {![string match *-lib.c $src] && [runtest_file_p $runtests $src]} { c-torture-execute [list $src \ -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0004-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0004-Add-MicroBlaze-to-target-supports-for-atomic-buil.-..patch similarity index 74% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0004-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0004-Add-MicroBlaze-to-target-supports-for-atomic-buil.-..patch index 39c9c17ea..87adeaf44 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0004-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0004-Add-MicroBlaze-to-target-supports-for-atomic-buil.-..patch @@ -1,8 +1,8 @@ -From 34b7dd28e3fe40f55ec7f6df3f000dd797d6c1cc Mon Sep 17 00:00:00 2001 +From dcb106f7cb2fb68f3117677b12df2b01f3929f7b Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Wed, 11 Jan 2017 15:50:35 +0530 -Subject: [PATCH 04/53] [Patch, testsuite]: Add MicroBlaze to target-supports - for atomic buil. .tin tests +Subject: [PATCH 04/54] Add MicroBlaze to target-supports for atomic buil. .tin + tests MicroBlaze added to supported targets for atomic builtin tests. @@ -13,18 +13,16 @@ Changelog/testsuite * gcc/testsuite/lib/target-supports.exp: Add microblaze to check_effective_target_sync_int_long. -Upstream-Status: Pending - Signed-off-by: David Holsgrove --- gcc/testsuite/lib/target-supports.exp | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp -index 244fe2306f4..c19f251f0d2 100644 +index 40f71e9ed8b..32e29706fcd 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp -@@ -8639,6 +8639,7 @@ proc check_effective_target_sync_int_long { } { +@@ -8947,6 +8947,7 @@ proc check_effective_target_sync_int_long { } { && [check_effective_target_arm_acq_rel]) || [istarget bfin*-*linux*] || [istarget hppa*-*linux*] @@ -33,5 +31,5 @@ index 244fe2306f4..c19f251f0d2 100644 || [istarget powerpc*-*-*] || [istarget cris-*-*] -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0005-Patch-testsuite-Update-MicroBlaze-strings-test.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0005-Update-MicroBlaze-strings-test-for-new-scan-assembly.patch similarity index 84% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0005-Patch-testsuite-Update-MicroBlaze-strings-test.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0005-Update-MicroBlaze-strings-test-for-new-scan-assembly.patch index d127a03e1..9a8d0a862 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0005-Patch-testsuite-Update-MicroBlaze-strings-test.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0005-Update-MicroBlaze-strings-test-for-new-scan-assembly.patch @@ -1,8 +1,8 @@ -From 2d0b5d68aff95a95dfb4ed0b207849658502bd53 Mon Sep 17 00:00:00 2001 +From 68bc05ae258334f591c336dbed6dc907969e90fc Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Wed, 11 Jan 2017 16:20:01 +0530 -Subject: [PATCH 05/53] [Patch, testsuite]: Update MicroBlaze strings test for - new scan-assembly output resulting in use of $LC label +Subject: [PATCH 05/54] Update MicroBlaze strings test for new scan-assembly + output resulting in use of $LC label ChangeLog/testsuite @@ -11,8 +11,6 @@ ChangeLog/testsuite * gcc/testsuite/gcc.target/microblaze/others/strings1.c: Update to include $LC label. -Upstream-Status: Pending - Signed-off-by: David Holsgrove --- gcc/testsuite/gcc.target/microblaze/others/strings1.c | 4 ++++ @@ -34,5 +32,5 @@ index efaf3c660ea..347872360d3 100644 extern void somefunc (char *); -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0006-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0006-Allow-MicroBlaze-.weakext-pattern-in-regex-match-Ext.patch similarity index 89% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0006-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0006-Allow-MicroBlaze-.weakext-pattern-in-regex-match-Ext.patch index 3c4124714..c32a8bab4 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0006-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0006-Allow-MicroBlaze-.weakext-pattern-in-regex-match-Ext.patch @@ -1,9 +1,9 @@ -From 20b6479f240bfebb46daad06839286a7abcff56c Mon Sep 17 00:00:00 2001 +From 7b07ae9c8086973b7baa031b09889146057de8ab Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Thu, 12 Jan 2017 16:14:15 +0530 -Subject: [PATCH 06/53] [Patch, testsuite]: Allow MicroBlaze .weakext pattern - in regex match Extend regex pattern to include optional ext at the end of - .weak to match the MicroBlaze weak label .weakext +Subject: [PATCH 06/54] Allow MicroBlaze .weakext pattern in regex match Extend + regex pattern to include optional ext at the end of .weak to match the + MicroBlaze weak label .weakext ChangeLog/testsuite @@ -13,8 +13,6 @@ ChangeLog/testsuite pattern to take optional ext after .weak. * gcc/testsuite/g++.dg/abi/thunk4.C: Likewise. -Upstream-Status: Pending - Signed-off-by: David Holsgrove Conflicts: @@ -65,5 +63,5 @@ index 6e8f124bc5e..d1d34fe1e4a 100644 struct Base -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0007-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0007-Add-MicroBlaze-to-check_profiling_available-Testsuit.patch similarity index 60% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0007-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0007-Add-MicroBlaze-to-check_profiling_available-Testsuit.patch index 89d3b75aa..5de0bfd86 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0007-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0007-Add-MicroBlaze-to-check_profiling_available-Testsuit.patch @@ -1,12 +1,9 @@ -From 0efefd8ac71dd084c745402afdf07319de9774c6 Mon Sep 17 00:00:00 2001 +From 6de628ecccf3739891052a2fbaf97048384c6190 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Thu, 12 Jan 2017 16:34:27 +0530 -Subject: [PATCH 07/53] [Patch, testsuite]: Add MicroBlaze to - check_profiling_available Testsuite, add microblaze*-*-* target in - check_profiling_available inline with other archs setting - profiling_available_saved to 0 - -Upstream-Status: Pending +Subject: [PATCH 07/54] Add MicroBlaze to check_profiling_available Testsuite, + add microblaze*-*-* target in check_profiling_available inline with other + archs setting profiling_available_saved to 0 Signed-off-by: David Holsgrove --- @@ -14,10 +11,10 @@ Signed-off-by: David Holsgrove 1 file changed, 1 insertion(+) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp -index c19f251f0d2..c136c93e673 100644 +index 32e29706fcd..47233563339 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp -@@ -729,6 +729,7 @@ proc check_profiling_available { test_what } { +@@ -804,6 +804,7 @@ proc check_profiling_available { test_what } { || [istarget m68k-*-elf] || [istarget m68k-*-uclinux*] || [istarget mips*-*-elf*] @@ -26,5 +23,5 @@ index c19f251f0d2..c136c93e673 100644 || [istarget mn10300-*-elf*] || [istarget moxie-*-elf*] -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0008-Patch-microblaze-Fix-atomic-side-effects.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0008-Fix-atomic-side-effects.-In-atomic_compare_and_swaps.patch similarity index 83% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0008-Patch-microblaze-Fix-atomic-side-effects.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0008-Fix-atomic-side-effects.-In-atomic_compare_and_swaps.patch index 21747726c..e554e660e 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0008-Patch-microblaze-Fix-atomic-side-effects.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0008-Fix-atomic-side-effects.-In-atomic_compare_and_swaps.patch @@ -1,13 +1,10 @@ -From 42ab0f7a2e6834feed456d00b3e2ec0ae2532a41 Mon Sep 17 00:00:00 2001 +From cd3db73d253df229054863e5f920e59e60b84c45 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Thu, 12 Jan 2017 16:41:43 +0530 -Subject: [PATCH 08/53] [Patch, microblaze]: Fix atomic side effects. In - atomic_compare_and_swapsi, add side effects to prevent incorrect assumptions - during optimization. Previously, the outputs were considered unused; this - generated assembly code with undefined side effects after invocation of the - atomic. - -Upstream-Status: Pending +Subject: [PATCH 08/54] Fix atomic side effects. In atomic_compare_and_swapsi, + add side effects to prevent incorrect assumptions during optimization. + Previously, the outputs were considered unused; this generated assembly code + with undefined side effects after invocation of the atomic. Signed-off-by: Kirk Meyer Signed-off-by: David Holsgrove @@ -20,7 +17,7 @@ Conflicts: 2 files changed, 16 insertions(+), 8 deletions(-) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 0765ff930c6..ea7f74f1dff 100644 +index 671667b537c..dfd7395432b 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -43,6 +43,9 @@ @@ -34,7 +31,7 @@ index 0765ff930c6..ea7f74f1dff 100644 (define_c_enum "unspec" [ diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md -index ae8955ce691..77c3ce8ff27 100644 +index c84bac94101..587f852b3a0 100644 --- a/gcc/config/microblaze/sync.md +++ b/gcc/config/microblaze/sync.md @@ -18,14 +18,19 @@ @@ -66,5 +63,5 @@ index ae8955ce691..77c3ce8ff27 100644 "" { -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0009-Patch-microblaze-Fix-atomic-boolean-return-value.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0009-Fix-atomic-boolean-return-value.-In-atomic_compare_a.patch similarity index 77% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0009-Patch-microblaze-Fix-atomic-boolean-return-value.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0009-Fix-atomic-boolean-return-value.-In-atomic_compare_a.patch index 97f35569a..617b10f35 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0009-Patch-microblaze-Fix-atomic-boolean-return-value.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0009-Fix-atomic-boolean-return-value.-In-atomic_compare_a.patch @@ -1,11 +1,9 @@ -From a1b8136a157c549f0f65c14d628e694310ca0d23 Mon Sep 17 00:00:00 2001 +From 7eca0d5cf7bc603c5a359b70521861c11faf6038 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Thu, 12 Jan 2017 16:45:45 +0530 -Subject: [PATCH 09/53] [Patch, microblaze]: Fix atomic boolean return value. - In atomic_compare_and_swapsi, fix boolean return value. Previously, it - contained zero if successful and non-zero if unsuccessful. - -Upstream-Status: Pending +Subject: [PATCH 09/54] Fix atomic boolean return value. In + atomic_compare_and_swapsi, fix boolean return value. Previously, it contained + zero if successful and non-zero if unsuccessful. Signed-off-by: Kirk Meyer Signed-off-by: David Holsgrove @@ -14,7 +12,7 @@ Signed-off-by: David Holsgrove 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md -index 77c3ce8ff27..573ce4765a0 100644 +index 587f852b3a0..230699bf280 100644 --- a/gcc/config/microblaze/sync.md +++ b/gcc/config/microblaze/sync.md @@ -34,15 +34,16 @@ @@ -38,5 +36,5 @@ index 77c3ce8ff27..573ce4765a0 100644 } ) -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0010-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0010-Fix-the-Microblaze-crash-with-msmall-divides-flag-Co.patch similarity index 57% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0010-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0010-Fix-the-Microblaze-crash-with-msmall-divides-flag-Co.patch index 62bb02a90..42b9d575d 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0010-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0010-Fix-the-Microblaze-crash-with-msmall-divides-flag-Co.patch @@ -1,15 +1,12 @@ -From 1ab5b8af098d100a1d7af05cca680b3c7181549d Mon Sep 17 00:00:00 2001 +From 72cdba90d70131c092918c5d5c18eb800f0f9dfb Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Thu, 12 Jan 2017 16:50:17 +0530 -Subject: [PATCH 10/53] [Patch, microblaze]: Fix the Microblaze crash with - msmall-divides flag Compiler is crashing when we use msmall-divides and - mxl-barrel-shift flag. This is because when use above flags - microblaze_expand_divide function will be called for division operation. In - microblaze_expand_divide function we are using sub_reg but MicroBlaze doesn't - have subreg register due to this compiler was crashing. Changed the logic to - avoid sub_reg call - -Upstream-Status: Pending +Subject: [PATCH 10/54] Fix the Microblaze crash with msmall-divides flag + Compiler is crashing when we use msmall-divides and mxl-barrel-shift flag. + This is because when use above flags microblaze_expand_divide function will + be called for division operation. In microblaze_expand_divide function we are + using sub_reg but MicroBlaze doesn't have subreg register due to this + compiler was crashing. Changed the logic to avoid sub_reg call Signed-off-by:Nagaraju Mekala @@ -20,10 +17,10 @@ Conflicts: 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index f32effecfb6..6922dd94af7 100644 +index 6df2c712cab..11e34b3fdae 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -3710,8 +3710,7 @@ microblaze_expand_divide (rtx operands[]) +@@ -3719,8 +3719,7 @@ microblaze_expand_divide (rtx operands[]) mem_rtx = gen_rtx_MEM (QImode, gen_rtx_PLUS (Pmode, regt1, div_table_rtx)); @@ -34,5 +31,5 @@ index f32effecfb6..6922dd94af7 100644 JUMP_LABEL (jump) = div_end_label; LABEL_NUSES (div_end_label) = 1; -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0011-Patch-microblaze-Added-ashrsi3_with_size_opt.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0011-Added-ashrsi3_with_size_opt-Added-ashrsi3_with_size_.patch similarity index 76% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0011-Patch-microblaze-Added-ashrsi3_with_size_opt.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0011-Added-ashrsi3_with_size_opt-Added-ashrsi3_with_size_.patch index 09ebfca6f..8988e23be 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0011-Patch-microblaze-Added-ashrsi3_with_size_opt.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0011-Added-ashrsi3_with_size_opt-Added-ashrsi3_with_size_.patch @@ -1,12 +1,10 @@ -From 7dd4ae2ad891094aa85a907b168cbdce744789e9 Mon Sep 17 00:00:00 2001 +From 41d8b3677d64bf9408925667c103a04b176050d5 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Thu, 12 Jan 2017 16:52:56 +0530 -Subject: [PATCH 11/53] [Patch, microblaze]: Added ashrsi3_with_size_opt Added - ashrsi3_with_size_opt pattern to optimize the sra instructions when the -Os - optimization is used. lshrsi3_with_size_opt is being removed as it has - conflicts with unsigned int variables - -Upstream-Status: Pending +Subject: [PATCH 11/54] Added ashrsi3_with_size_opt Added ashrsi3_with_size_opt + pattern to optimize the sra instructions when the -Os optimization is used. + lshrsi3_with_size_opt is being removed as it has conflicts with unsigned int + variables Signed-off-by:Nagaraju Mekala --- @@ -14,7 +12,7 @@ Signed-off-by:Nagaraju Mekala 1 file changed, 21 insertions(+) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index ea7f74f1dff..9fbb3113f3c 100644 +index dfd7395432b..4f20b8efe33 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -1508,6 +1508,27 @@ @@ -46,5 +44,5 @@ index ea7f74f1dff..9fbb3113f3c 100644 [(set (match_operand:SI 0 "register_operand" "=&d") (ashiftrt:SI (match_operand:SI 1 "register_operand" "d") -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0012-Patch-microblaze-Use-bralid-for-profiler-calls.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0012-Use-bralid-for-profiler-calls-Signed-off-by-Edgar-E..patch similarity index 70% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0012-Patch-microblaze-Use-bralid-for-profiler-calls.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0012-Use-bralid-for-profiler-calls-Signed-off-by-Edgar-E..patch index c26d46d45..46a8699a2 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0012-Patch-microblaze-Use-bralid-for-profiler-calls.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0012-Use-bralid-for-profiler-calls-Signed-off-by-Edgar-E..patch @@ -1,17 +1,15 @@ -From 12d7e086376916ef61e2c48639671fd0f7c8fbbf Mon Sep 17 00:00:00 2001 +From 9dc1f7291c4c7abfe254ca4e86a6ba0975a74960 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 17 Jan 2017 10:57:19 +0530 -Subject: [PATCH 12/53] [Patch, microblaze]: Use bralid for profiler calls -Upstream-Status: Pending - - Signed-off-by: Edgar E. Iglesias +Subject: [PATCH 12/54] Use bralid for profiler calls Signed-off-by: Edgar E. + Iglesias --- gcc/config/microblaze/microblaze.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index d28bc766de8..cd544f2030e 100644 +index 0398902362b..49e7fbedd5a 100644 --- a/gcc/config/microblaze/microblaze.h +++ b/gcc/config/microblaze/microblaze.h @@ -486,7 +486,7 @@ typedef struct microblaze_args @@ -24,5 +22,5 @@ index d28bc766de8..cd544f2030e 100644 } -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0013-Patch-microblaze-Removed-moddi3-routinue.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0013-Removed-moddi3-routinue-Using-the-default-moddi3-fun.patch similarity index 93% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0013-Patch-microblaze-Removed-moddi3-routinue.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0013-Removed-moddi3-routinue-Using-the-default-moddi3-fun.patch index 8739e6ea9..26c24a49c 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0013-Patch-microblaze-Removed-moddi3-routinue.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0013-Removed-moddi3-routinue-Using-the-default-moddi3-fun.patch @@ -1,10 +1,8 @@ -From cd8c9f3c43b266628d1585b74fc78f3e34a33c44 Mon Sep 17 00:00:00 2001 +From a2dbb662c573d2bf1a6a9192eb0d7f453ad20c59 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Thu, 12 Jan 2017 17:36:16 +0530 -Subject: [PATCH 13/53] [Patch, microblaze]: Removed moddi3 routinue Using the - default moddi3 function as the existing implementation has many bugs - -Upstream-Status: Pending +Subject: [PATCH 13/54] Removed moddi3 routinue Using the default moddi3 + function as the existing implementation has many bugs Signed-off-by:Nagaraju @@ -18,13 +16,13 @@ Conflicts: diff --git a/libgcc/config/microblaze/moddi3.S b/libgcc/config/microblaze/moddi3.S deleted file mode 100644 -index 9b77865df38..00000000000 +index b3e4bf6182e..00000000000 --- a/libgcc/config/microblaze/moddi3.S +++ /dev/null @@ -1,121 +0,0 @@ -################################### -# --# Copyright (C) 2009-2022 Free Software Foundation, Inc. +-# Copyright (C) 2009-2023 Free Software Foundation, Inc. -# -# Contributed by Michael Eager . -# @@ -158,5 +156,5 @@ index 96959f0292b..8d954a49575 100644 $(srcdir)/config/microblaze/muldi3_hard.S \ $(srcdir)/config/microblaze/mulsi3.S \ -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0014-Patch-microblaze-Add-INIT_PRIORITY-support-Added.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0014-Add-INIT_PRIORITY-support-Added-TARGET_ASM_CONSTRUCT.patch similarity index 85% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0014-Patch-microblaze-Add-INIT_PRIORITY-support-Added.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0014-Add-INIT_PRIORITY-support-Added-TARGET_ASM_CONSTRUCT.patch index 472c543c5..9e4348ad5 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0014-Patch-microblaze-Add-INIT_PRIORITY-support-Added.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0014-Add-INIT_PRIORITY-support-Added-TARGET_ASM_CONSTRUCT.patch @@ -1,8 +1,8 @@ -From 30aa7cef2dd076637155384fba539838ddaf0163 Mon Sep 17 00:00:00 2001 +From 40dd974a6cd608567f1746a934c9743b80ca1e3f Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 12 Sep 2022 20:20:00 +0530 -Subject: [PATCH 14/53] [Patch, microblaze]: Add INIT_PRIORITY support Added - TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros. +Subject: [PATCH 14/54] Add INIT_PRIORITY support Added TARGET_ASM_CONSTRUCTOR + and TARGET_ASM_DESTRUCTOR macros. These macros allows users to control the order of initialization of objects defined at namespace scope with the init_priority @@ -10,19 +10,15 @@ attribute by specifying a relative priority, a constant integral expression currently bounded between 101 and 65535 inclusive. Lower numbers indicate a higher priority. -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.cc | 53 +++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index 6922dd94af7..4b0621db168 100644 +index 11e34b3fdae..3fb402b87d4 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -2635,6 +2635,53 @@ print_operand_address (FILE * file, rtx addr) +@@ -2640,6 +2640,53 @@ print_operand_address (FILE * file, rtx addr) } } @@ -76,7 +72,7 @@ index 6922dd94af7..4b0621db168 100644 /* Emit either a label, .comm, or .lcomm directive, and mark that the symbol is used, so that we don't emit an .extern for it in microblaze_asm_file_end. */ -@@ -3976,6 +4023,12 @@ microblaze_starting_frame_offset (void) +@@ -3985,6 +4032,12 @@ microblaze_starting_frame_offset (void) #undef TARGET_ATTRIBUTE_TABLE #define TARGET_ATTRIBUTE_TABLE microblaze_attribute_table @@ -90,5 +86,5 @@ index 6922dd94af7..4b0621db168 100644 #define TARGET_IN_SMALL_DATA_P microblaze_elf_in_small_data_p -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0015-Patch-microblaze-Add-optimized-lshrsi3.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0015-Add-optimized-lshrsi3-When-barrel-shifter-is-not-pre.patch similarity index 87% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0015-Patch-microblaze-Add-optimized-lshrsi3.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0015-Add-optimized-lshrsi3-When-barrel-shifter-is-not-pre.patch index 7ce5ebc03..fac95b7ba 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0015-Patch-microblaze-Add-optimized-lshrsi3.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0015-Add-optimized-lshrsi3-When-barrel-shifter-is-not-pre.patch @@ -1,9 +1,9 @@ -From b9bb669d9404bd04676f09c793310e1b7f228674 Mon Sep 17 00:00:00 2001 +From d0f1a493d130e06816df4d11f31421a8691761e0 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 17 Jan 2017 15:23:57 +0530 -Subject: [PATCH 15/53] [Patch, microblaze]: Add optimized lshrsi3 When barrel - shifter is not present, the immediate value is greater than #5 and - optimization is -OS, the compiler will generate shift operation using loop. +Subject: [PATCH 15/54] Add optimized lshrsi3 When barrel shifter is not + present, the immediate value is greater than #5 and optimization is -OS, the + compiler will generate shift operation using loop. Changelog @@ -17,8 +17,6 @@ ChangeLog/testsuite * gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c: New test. -Upstream-Status: Pending - Signed-off-by:Nagaraju Signed-off-by: David Holsgrove --- @@ -28,7 +26,7 @@ Signed-off-by: David Holsgrove create mode 100644 gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 9fbb3113f3c..52308cce0cb 100644 +index 4f20b8efe33..5d65ad84449 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -1618,6 +1618,27 @@ @@ -79,5 +77,5 @@ index 00000000000..32a3be7c76a +/* { dg-final { scan-assembler "bneid\tr18,.-4" } } */ +/* { dg-final { scan-assembler "\srl\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])" } } */ -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0016-Patch-microblaze-Add-cbranchsi4_reg.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0016-Add-cbranchsi4_reg-This-patch-optimizes-the-generati.patch similarity index 93% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0016-Patch-microblaze-Add-cbranchsi4_reg.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0016-Add-cbranchsi4_reg-This-patch-optimizes-the-generati.patch index dc645c30c..298765dcd 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0016-Patch-microblaze-Add-cbranchsi4_reg.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0016-Add-cbranchsi4_reg-This-patch-optimizes-the-generati.patch @@ -1,12 +1,9 @@ -From 08d7bb4062024f3e34fbb17d695f8fa2c9e1b305 Mon Sep 17 00:00:00 2001 +From e94d406c9fa0d7b99532bd8cf4b2a4580cdb02b7 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 17 Jan 2017 17:04:37 +0530 -Subject: [PATCH 16/53] [Patch, microblaze]: Add cbranchsi4_reg This patch - optimizes the generation of pcmpne/pcmpeq instruction if the compare - instruction has no immediate values.For the immediate values the xor - instruction is generated - -Upstream-Status: Pending +Subject: [PATCH 16/54] Add cbranchsi4_reg This patch optimizes the generation + of pcmpne/pcmpeq instruction if the compare instruction has no immediate + values.For the immediate values the xor instruction is generated Signed-off-by: Nagaraju Mekala Signed-off-by: Ajit Agarwal @@ -32,7 +29,7 @@ Conflicts: 7 files changed, 18 insertions(+), 18 deletions(-) diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h -index d67355697b5..848cd509003 100644 +index 31a6515176b..41557af0f3c 100644 --- a/gcc/config/microblaze/microblaze-protos.h +++ b/gcc/config/microblaze/microblaze-protos.h @@ -33,7 +33,7 @@ extern int microblaze_expand_shift (rtx *); @@ -145,5 +142,5 @@ index 1d6ba807b12..532c035adfd 100644 } -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0017-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0017-Inline-Expansion-of-fsqrt-builtin.-The-changes-are-m.patch similarity index 54% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0017-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0017-Inline-Expansion-of-fsqrt-builtin.-The-changes-are-m.patch index b0d335162..91ca87fc3 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0017-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0017-Inline-Expansion-of-fsqrt-builtin.-The-changes-are-m.patch @@ -1,19 +1,19 @@ -From 1593e5a9839b7cade95e9f55ba3cff66d64d0e84 Mon Sep 17 00:00:00 2001 +From 0760cd661f6c09cda8327288f79314319a0b9b14 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 17 Jan 2017 17:11:04 +0530 -Subject: [PATCH 17/53] [Patch,microblaze]: Inline Expansion of fsqrt builtin. - The changes are made in the patch for the inline expansion of the fsqrt - builtin with fqrt instruction. The sqrt math function takes double as - argument and return double as argument. The pattern is selected while - expanding the unary op through expand_unop which passes DFmode and the DFmode - pattern was not there returning zero. Thus the sqrt math function is not - inlined and expanded. The pattern with DFmode argument is added. Also the - source and destination argument is not same the DF through two different - consecutive registers with lower 32 bit is the argument passed to sqrt and - the higher 32 bit is zero. If the source and destinations are different the - DFmode 64 bits registers is not set properly giving the problem in runtime. - Such changes are taken care in the implementation of the pattern for DFmode - for inline expansion of the sqrt. +Subject: [PATCH 17/54] Inline Expansion of fsqrt builtin. The changes are made + in the patch for the inline expansion of the fsqrt builtin with fqrt + instruction. The sqrt math function takes double as argument and return + double as argument. The pattern is selected while expanding the unary op + through expand_unop which passes DFmode and the DFmode pattern was not there + returning zero. Thus the sqrt math function is not inlined and expanded. The + pattern with DFmode argument is added. Also the source and destination + argument is not same the DF through two different consecutive registers with + lower 32 bit is the argument passed to sqrt and the higher 32 bit is zero. If + the source and destinations are different the DFmode 64 bits registers is not + set properly giving the problem in runtime. Such changes are taken care in + the implementation of the pattern for DFmode for inline expansion of the + sqrt. ChangeLog: 2015-06-16 Ajit Agarwal @@ -22,8 +22,6 @@ ChangeLog: * config/microblaze/microblaze.md (sqrtdf2): New pattern. -Upstream-Status: Pending - Signed-off-by:Ajit Agarwal ajitkum@xilinx.com Nagaraju Mekala nmekala@xilinx.com --- @@ -31,7 +29,7 @@ Signed-off-by:Ajit Agarwal ajitkum@xilinx.com 1 file changed, 14 insertions(+) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 52308cce0cb..0e5ef4d7649 100644 +index 5d65ad84449..0597ed8d75a 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -451,6 +451,20 @@ @@ -56,5 +54,5 @@ index 52308cce0cb..0e5ef4d7649 100644 [(set (match_operand:SI 0 "register_operand" "=d") (fix:SI (match_operand:SF 1 "register_operand" "d")))] -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0018-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0018-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch similarity index 85% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0018-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0018-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch index 94235be65..f388e9b5c 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0018-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0018-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch @@ -1,9 +1,9 @@ -From 9002b7d4c295bef95a3fc28c05f86dde5087dde1 Mon Sep 17 00:00:00 2001 +From 0a7299e82a8f463e9e7cd6297c5bdc0aac3a0ec4 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 17 Jan 2017 18:07:24 +0530 -Subject: [PATCH 18/53] [PATCH] microblaze.md: Improve 'adddi3' and 'subdi3' - insn definitions Change adddi3 to handle DI immediates as the second operand, - this requires modification to the output template however reduces the need to +Subject: [PATCH 18/54] microblaze.md: Improve 'adddi3' and 'subdi3' insn + definitions Change adddi3 to handle DI immediates as the second operand, this + requires modification to the output template however reduces the need to specify seperate templates for 16-bit positive/negative immediate operands. The use of 32-bit immediates for the addi and addic instructions is handled by the assembler, which will emit the imm instructions when required. This @@ -17,15 +17,13 @@ implement purely with instructions as microblaze does not provide an instruction to perform a forward arithmetic subtraction (it only provides reverse 'rD = IMM - rA'). -Upstream-Status: Pending - Signed-off-by: Nathan Rossi --- gcc/config/microblaze/microblaze.md | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 0e5ef4d7649..effb9774c32 100644 +index 0597ed8d75a..498926a4a75 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -502,17 +502,16 @@ @@ -61,5 +59,5 @@ index 0e5ef4d7649..effb9774c32 100644 "rsub\t%L0,%L2,%L1\;rsubc\t%M0,%M2,%M1" [(set_attr "type" "darith") -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0019-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0019-Update-ashlsi3-movsf-patterns-This-patch-removes-the.patch similarity index 79% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0019-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0019-Update-ashlsi3-movsf-patterns-This-patch-removes-the.patch index e955938e5..0f388f700 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0019-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0019-Update-ashlsi3-movsf-patterns-This-patch-removes-the.patch @@ -1,10 +1,10 @@ -From ef94a8b2110f5a3becefb00c1f7c0c3adac6fcac Mon Sep 17 00:00:00 2001 +From a969ab3f04de077eca6d928dd651e3c6b042367d Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 17 Jan 2017 18:18:41 +0530 -Subject: [PATCH 19/53] [Patch, microblaze]: Update ashlsi3 & movsf patterns - This patch removes the use of HOST_WIDE_INT_PRINT_HEX macro in print_operand - of ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay and movsf_internal - patterns beacuse HOST_WIDE_INT_PRINT_HEX is generating 64-bit value which our +Subject: [PATCH 19/54] Update ashlsi3 & movsf patterns This patch removes the + use of HOST_WIDE_INT_PRINT_HEX macro in print_operand of + ashlsi3_with_mul_nodelay,ashlsi3_with_mul_delay and movsf_internal patterns + beacuse HOST_WIDE_INT_PRINT_HEX is generating 64-bit value which our instruction doesn't support so using gen_int_mode function Signed-off-by :Nagaraju Mekala @@ -24,20 +24,16 @@ ChangeLog: Conflicts: gcc/config/microblaze/microblaze.c -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.cc | 2 +- gcc/config/microblaze/microblaze.md | 10 ++++++++-- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index 4b0621db168..c23061c4e4a 100644 +index 3fb402b87d4..ff64e0ca342 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -2469,7 +2469,7 @@ print_operand (FILE * file, rtx op, int letter) +@@ -2474,7 +2474,7 @@ print_operand (FILE * file, rtx op, int letter) unsigned long value_long; REAL_VALUE_TO_TARGET_SINGLE (*CONST_DOUBLE_REAL_VALUE (op), value_long); @@ -47,7 +43,7 @@ index 4b0621db168..c23061c4e4a 100644 else { diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index effb9774c32..a4d7ea29219 100644 +index 498926a4a75..0448101de8a 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -1368,7 +1368,10 @@ @@ -75,5 +71,5 @@ index effb9774c32..a4d7ea29219 100644 [(set_attr "type" "no_delay_arith") (set_attr "mode" "SI") -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0020-Patch-microblaze-8-stage-pipeline-for-microblaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0020-8-stage-pipeline-for-microblaze-This-patch-adds-the-.patch similarity index 91% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0020-Patch-microblaze-8-stage-pipeline-for-microblaze.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0020-8-stage-pipeline-for-microblaze-This-patch-adds-the-.patch index 2d384b78d..002e60be4 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0020-Patch-microblaze-8-stage-pipeline-for-microblaze.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0020-8-stage-pipeline-for-microblaze-This-patch-adds-the-.patch @@ -1,15 +1,11 @@ -From 65574bdca9006fda7654e33a0081eeecfcd9976b Mon Sep 17 00:00:00 2001 +From 21daca8e01515b2e73463adbf9488b63bb0ccf54 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 12 Sep 2022 21:05:51 +0530 -Subject: [PATCH 20/53] [Patch, microblaze]: 8-stage pipeline for microblaze - This patch adds the support for the 8-stage pipeline. The new 8-stage - pipeline reduces the latencies of float & integer division drastically +Subject: [PATCH 20/54] 8-stage pipeline for microblaze This patch adds the + support for the 8-stage pipeline. The new 8-stage pipeline reduces the + latencies of float & integer division drastically Signed-off-by :Nagaraju Mekala -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.cc | 11 ++++ gcc/config/microblaze/microblaze.h | 3 +- @@ -18,10 +14,10 @@ Signed-off-by: Mark Hatle 4 files changed, 94 insertions(+), 3 deletions(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index c23061c4e4a..bd394c411b8 100644 +index ff64e0ca342..a58a5b2a1b0 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -1841,6 +1841,17 @@ microblaze_option_override (void) +@@ -1846,6 +1846,17 @@ microblaze_option_override (void) "%<-mcpu=v8.30.a%>"); TARGET_REORDER = 0; } @@ -40,7 +36,7 @@ index c23061c4e4a..bd394c411b8 100644 if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL) error ("%<-mxl-multiply-high%> requires %<-mno-xl-soft-mul%>"); diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index cd544f2030e..640ae6ea9a3 100644 +index 49e7fbedd5a..e4faa9c681f 100644 --- a/gcc/config/microblaze/microblaze.h +++ b/gcc/config/microblaze/microblaze.h @@ -27,7 +27,8 @@ @@ -54,7 +50,7 @@ index cd544f2030e..640ae6ea9a3 100644 #define MICROBLAZE_MASK_NO_UNSAFE_DELAY 0x00000001 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index a4d7ea29219..9e9dfb1ccb0 100644 +index 0448101de8a..7a01b28d8f0 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -35,6 +35,7 @@ @@ -165,7 +161,7 @@ index a4d7ea29219..9e9dfb1ccb0 100644 (set_attr "length" "4")]) diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt -index 9f47e67cf2a..cc009363f87 100644 +index dbf6390ef4b..37aaaf9ffda 100644 --- a/gcc/config/microblaze/microblaze.opt +++ b/gcc/config/microblaze/microblaze.opt @@ -133,3 +133,7 @@ Data referenced by offset from start of text instead of GOT (with -fPIC/-fPIE). @@ -177,5 +173,5 @@ index 9f47e67cf2a..cc009363f87 100644 +Target Mask(AREA_OPTIMIZED_2) +Use 8 stage pipeline (frequency optimization) -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0021-PATCH-21-53-Patch-microblaze-Correct-the-const-high-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0021-Correct-the-const-high-double-immediate-value-with-t.patch similarity index 73% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0021-PATCH-21-53-Patch-microblaze-Correct-the-const-high-.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0021-Correct-the-const-high-double-immediate-value-with-t.patch index 1b8d924cc..2e8182d16 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0021-PATCH-21-53-Patch-microblaze-Correct-the-const-high-.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0021-Correct-the-const-high-double-immediate-value-with-t.patch @@ -1,18 +1,14 @@ -From 1d56bfb436b008422b4a7d4d4e3180667130c840 Mon Sep 17 00:00:00 2001 +From 1cda2f5772650aa65853e6a3e9d8162498c2f469 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 11:49:11 +0530 -Subject: [PATCH 21/53] [PATCH 21/53] [Patch, microblaze]: Correct the const - high double immediate value with this patch the loading of the DI mode - immediate values will be using REAL_VALUE_FROM_CONST_DOUBLE and - REAL_VALUE_TO_TARGET_DOUBLE functions, as CONST_DOUBLE_HIGH was returning - the sign extension value even of the unsigned long long constants also +Subject: [PATCH 21/54] Correct the const high double immediate value with this + patch the loading of the DI mode immediate values will be using + REAL_VALUE_FROM_CONST_DOUBLE and REAL_VALUE_TO_TARGET_DOUBLE functions, as + CONST_DOUBLE_HIGH was returning the sign extension value even of the unsigned + long long constants also Signed-off-by :Nagaraju Mekala Ajit Agarwal -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.cc | 6 ++++-- gcc/testsuite/gcc.target/microblaze/others/long.c | 9 +++++++++ @@ -20,10 +16,10 @@ Signed-off-by: Mark Hatle create mode 100644 gcc/testsuite/gcc.target/microblaze/others/long.c diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index bd394c411b8..7c648cda1b2 100644 +index a58a5b2a1b0..af5c2371740 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -2453,14 +2453,16 @@ print_operand (FILE * file, rtx op, int letter) +@@ -2458,14 +2458,16 @@ print_operand (FILE * file, rtx op, int letter) else if (letter == 'h' || letter == 'j') { long val[2]; @@ -58,5 +54,5 @@ index 00000000000..b6b55d5ad65 +/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0x00000000" } } */ +/* { dg-final { scan-assembler "addik\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r0,0xf0000000" } } */ -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0022-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0022-Fix-internal-compiler-error-with-msmall-divides-This.patch similarity index 59% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0022-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0022-Fix-internal-compiler-error-with-msmall-divides-This.patch index a59179473..599bd71e2 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0022-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0022-Fix-internal-compiler-error-with-msmall-divides-This.patch @@ -1,27 +1,23 @@ -From cd60ea1bd88ac47856ac66266a0771478ac73bad Mon Sep 17 00:00:00 2001 +From a88796930d8ef1b97056217ffdcc9f86326cdc98 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 11:58:14 +0530 -Subject: [PATCH 22/53] [Fix, microblaze]: Fix internal compiler error with - msmall-divides This patch will fix the internal error - microblaze_expand_divide function which come of rtx PLUS where the - mem_rtx is of type SI and the operand is of type QImode. This patch - modifies the mem_rtx as QImode and Plus as QImode to fix the error. +Subject: [PATCH 22/54] Fix internal compiler error with msmall-divides This + patch will fix the internal error microblaze_expand_divide function which + come of rtx PLUS where the mem_rtx is of type SI and the operand is of type + QImode. This patch modifies the mem_rtx as QImode and Plus as QImode to fix + the error. Signed-off-by :Nagaraju Mekala Ajit Agarwal -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index 7c648cda1b2..907c0afa9b8 100644 +index af5c2371740..4967d6a0133 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -3768,7 +3768,7 @@ microblaze_expand_divide (rtx operands[]) +@@ -3777,7 +3777,7 @@ microblaze_expand_divide (rtx operands[]) emit_insn (gen_ashlsi3_bshift (regt1, operands[1], GEN_INT(4))); emit_insn (gen_addsi3 (regt1, regt1, operands[2])); mem_rtx = gen_rtx_MEM (QImode, @@ -31,5 +27,5 @@ index 7c648cda1b2..907c0afa9b8 100644 insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx)); jump = emit_jump_insn_after (gen_jump (div_end_label), insn); -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0023-patch-microblaze-Fix-the-calculation-of-high-word-in.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0023-Fix-the-calculation-of-high-word-in-a-long-long-64-b.patch similarity index 77% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0023-patch-microblaze-Fix-the-calculation-of-high-word-in.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0023-Fix-the-calculation-of-high-word-in-a-long-long-64-b.patch index ae05e7913..65f283add 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0023-patch-microblaze-Fix-the-calculation-of-high-word-in.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0023-Fix-the-calculation-of-high-word-in-a-long-long-64-b.patch @@ -1,8 +1,7 @@ -From b98cddb206ce84994425ede4b116365977768e37 Mon Sep 17 00:00:00 2001 +From f9871617fe69a105ebc4aa4838c682bfe40e4f2c Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 12:03:08 +0530 -Subject: [PATCH 23/53] [patch,microblaze]: Fix the calculation of high word in - a long long 64-bit +Subject: [PATCH 23/54] Fix the calculation of high word in a long long 64-bit This patch will change the calculation of high word in a long long 64-bit. Earlier to this patch the high word of long long word (0xF0000000ULL) is @@ -14,19 +13,15 @@ Subject: [PATCH 23/53] [patch,microblaze]: Fix the calculation of high word in Signed-off-by :Nagaraju Mekala Ajit Agarwal -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.cc | 3 --- 1 file changed, 3 deletions(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index 907c0afa9b8..f75eaff4b49 100644 +index 4967d6a0133..2d516724acc 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -2469,9 +2469,6 @@ print_operand (FILE * file, rtx op, int letter) +@@ -2474,9 +2474,6 @@ print_operand (FILE * file, rtx op, int letter) { val[0] = (INTVAL (op) & 0xffffffff00000000LL) >> 32; val[1] = INTVAL (op) & 0x00000000ffffffffLL; @@ -37,5 +32,5 @@ index 907c0afa9b8..f75eaff4b49 100644 fprintf (file, "0x%8.8lx", (letter == 'h') ? val[0] : val[1]); } -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0024-Patch-MicroBlaze-this-patch-has-1.Fixed-the-bug-in.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0024-this-patch-has-1.Fixed-the-bug-in-version-calculatio.patch similarity index 90% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0024-Patch-MicroBlaze-this-patch-has-1.Fixed-the-bug-in.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0024-this-patch-has-1.Fixed-the-bug-in-version-calculatio.patch index 444c93971..0356657b2 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0024-Patch-MicroBlaze-this-patch-has-1.Fixed-the-bug-in.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0024-this-patch-has-1.Fixed-the-bug-in-version-calculatio.patch @@ -1,14 +1,10 @@ -From 89269c9b8d2047ebbc13e98c45e94746edc63de6 Mon Sep 17 00:00:00 2001 +From a8991be91d79cf0bd17b7d303a10ec5edd7408c6 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 12:23:54 +0530 -Subject: [PATCH 24/53] [Patch,MicroBlaze] : this patch has 1.Fixed the bug in - version calculation. 2.Add new bitfield instructions. +Subject: [PATCH 24/54] this patch has 1.Fixed the bug in version calculation. + 2.Add new bitfield instructions. Signed-off-by :Mahesh Bodapati -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.cc | 154 ++++++++++++++-------------- gcc/config/microblaze/microblaze.h | 2 + @@ -16,7 +12,7 @@ Signed-off-by: Mark Hatle 3 files changed, 147 insertions(+), 78 deletions(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index f75eaff4b49..3abfc834ff2 100644 +index 2d516724acc..e28ab593c3e 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc @@ -165,6 +165,9 @@ int microblaze_no_unsafe_delay; @@ -93,7 +89,7 @@ index f75eaff4b49..3abfc834ff2 100644 /* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant. */ static bool microblaze_const_double_ok (rtx op, machine_mode mode) -@@ -1339,8 +1399,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED, +@@ -1344,8 +1404,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED, { if (TARGET_BARREL_SHIFT) { @@ -103,7 +99,7 @@ index f75eaff4b49..3abfc834ff2 100644 *total = COSTS_N_INSNS (1); else *total = COSTS_N_INSNS (2); -@@ -1401,8 +1460,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED, +@@ -1406,8 +1465,7 @@ microblaze_rtx_costs (rtx x, machine_mode mode, int outer_code ATTRIBUTE_UNUSED, } else if (!TARGET_SOFT_MUL) { @@ -113,7 +109,7 @@ index f75eaff4b49..3abfc834ff2 100644 *total = COSTS_N_INSNS (1); else *total = COSTS_N_INSNS (3); -@@ -1675,72 +1733,13 @@ function_arg_partial_bytes (cumulative_args_t cum_v, +@@ -1680,72 +1738,13 @@ function_arg_partial_bytes (cumulative_args_t cum_v, return 0; } @@ -187,7 +183,7 @@ index f75eaff4b49..3abfc834ff2 100644 microblaze_section_threshold = (OPTION_SET_P (g_switch_value) ? g_switch_value -@@ -1761,13 +1760,13 @@ microblaze_option_override (void) +@@ -1766,13 +1765,13 @@ microblaze_option_override (void) /* Check the MicroBlaze CPU version for any special action to be done. */ if (microblaze_select_cpu == NULL) microblaze_select_cpu = MICROBLAZE_DEFAULT_CPU; @@ -204,7 +200,7 @@ index f75eaff4b49..3abfc834ff2 100644 if (ver < 0) { /* No hardware exceptions in earlier versions. So no worries. */ -@@ -1778,8 +1777,7 @@ microblaze_option_override (void) +@@ -1783,8 +1782,7 @@ microblaze_option_override (void) microblaze_pipe = MICROBLAZE_PIPE_3; } else if (ver == 0 @@ -214,7 +210,7 @@ index f75eaff4b49..3abfc834ff2 100644 { #if 0 microblaze_select_flags |= (MICROBLAZE_MASK_NO_UNSAFE_DELAY); -@@ -1796,11 +1794,9 @@ microblaze_option_override (void) +@@ -1801,11 +1799,9 @@ microblaze_option_override (void) #endif microblaze_no_unsafe_delay = 0; microblaze_pipe = MICROBLAZE_PIPE_5; @@ -229,7 +225,7 @@ index f75eaff4b49..3abfc834ff2 100644 { /* Pattern compares are to be turned on by default only when compiling for MB v5.00.'z'. */ -@@ -1808,7 +1804,7 @@ microblaze_option_override (void) +@@ -1813,7 +1809,7 @@ microblaze_option_override (void) } } @@ -238,7 +234,7 @@ index f75eaff4b49..3abfc834ff2 100644 if (ver < 0) { if (TARGET_MULTIPLY_HIGH) -@@ -1817,7 +1813,7 @@ microblaze_option_override (void) +@@ -1822,7 +1818,7 @@ microblaze_option_override (void) "%<-mcpu=v6.00.a%> or greater"); } @@ -247,7 +243,7 @@ index f75eaff4b49..3abfc834ff2 100644 microblaze_has_clz = 1; if (ver < 0) { -@@ -1826,7 +1822,7 @@ microblaze_option_override (void) +@@ -1831,7 +1827,7 @@ microblaze_option_override (void) } /* TARGET_REORDER defaults to 2 if -mxl-reorder not specified. */ @@ -256,7 +252,7 @@ index f75eaff4b49..3abfc834ff2 100644 if (ver < 0) { if (TARGET_REORDER == 1) -@@ -1841,7 +1837,7 @@ microblaze_option_override (void) +@@ -1846,7 +1842,7 @@ microblaze_option_override (void) "%<-mcpu=v8.30.a%>"); TARGET_REORDER = 0; } @@ -265,7 +261,7 @@ index f75eaff4b49..3abfc834ff2 100644 if (ver < 0) { if (TARGET_AREA_OPTIMIZED_2) -@@ -1851,6 +1847,8 @@ microblaze_option_override (void) +@@ -1856,6 +1852,8 @@ microblaze_option_override (void) { if (TARGET_AREA_OPTIMIZED_2) microblaze_pipe = MICROBLAZE_PIPE_8; @@ -275,10 +271,10 @@ index f75eaff4b49..3abfc834ff2 100644 if (TARGET_MULTIPLY_HIGH && TARGET_SOFT_MUL) diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 640ae6ea9a3..67015058198 100644 +index e4faa9c681f..94d96bf6b5d 100644 --- a/gcc/config/microblaze/microblaze.h +++ b/gcc/config/microblaze/microblaze.h -@@ -44,6 +44,7 @@ extern int microblaze_dbx_regno[]; +@@ -44,6 +44,7 @@ extern int microblaze_debugger_regno[]; extern int microblaze_no_unsafe_delay; extern int microblaze_has_clz; @@ -295,7 +291,7 @@ index 640ae6ea9a3..67015058198 100644 #define TARGET_SUPPORTS_PIC 1 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 9e9dfb1ccb0..dede4d068d3 100644 +index 7a01b28d8f0..a76287ab4fd 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -2491,4 +2491,73 @@ @@ -373,5 +369,5 @@ index 9e9dfb1ccb0..dede4d068d3 100644 + (include "sync.md") -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0025-Fixing-the-issue-with-the-builtin_alloc.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0025-Fixing-the-issue-with-the-builtin_alloc.-register-r1.patch similarity index 83% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0025-Fixing-the-issue-with-the-builtin_alloc.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0025-Fixing-the-issue-with-the-builtin_alloc.-register-r1.patch index 2800dee73..cd2868185 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0025-Fixing-the-issue-with-the-builtin_alloc.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0025-Fixing-the-issue-with-the-builtin_alloc.-register-r1.patch @@ -1,21 +1,17 @@ -From 101f47dedd82fc09bcefd5db986e6d6b0a1761ad Mon Sep 17 00:00:00 2001 +From 85273a514d0ab3b243b947633ab46705a0d946bc Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Thu, 23 Feb 2017 17:09:04 +0530 -Subject: [PATCH 25/53] Fixing the issue with the builtin_alloc. register r18 +Subject: [PATCH 25/54] Fixing the issue with the builtin_alloc. register r18 was not properly handling the stack pattern which was resolved by using free available register signed-off-by:nagaraju mekala -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.md | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index dede4d068d3..c6d8a87e9d1 100644 +index a76287ab4fd..12270f135cf 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -2075,10 +2075,10 @@ @@ -44,5 +40,5 @@ index dede4d068d3..c6d8a87e9d1 100644 } ) -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0026-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0026-Removed-fsqrt-generation-for-double-values.patch similarity index 78% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0026-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0026-Removed-fsqrt-generation-for-double-values.patch index a1e4fb369..02cc5a1ea 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0026-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0026-Removed-fsqrt-generation-for-double-values.patch @@ -1,19 +1,14 @@ -From b3e51ca34dc4048445b178253051ad4bbdfc5ec4 Mon Sep 17 00:00:00 2001 +From aba85eba7bc5cc19edafe54379fb1f1794dc3844 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 4 Jun 2018 10:10:18 +0530 -Subject: [PATCH 26/53] [Patch,Microblaze] : Removed fsqrt generation for - double values. - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 26/54] Removed fsqrt generation for double values. --- gcc/config/microblaze/microblaze.md | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index c6d8a87e9d1..f23a85c7ac7 100644 +index 12270f135cf..b05f7da30b4 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -526,20 +526,6 @@ @@ -38,5 +33,5 @@ index c6d8a87e9d1..f23a85c7ac7 100644 [(set (match_operand:SI 0 "register_operand" "=d") (fix:SI (match_operand:SF 1 "register_operand" "d")))] -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0027-Patch-MicroBlaze-Intial-commit-of-64-bit-Microblaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0027-Intial-commit-of-64-bit-Microblaze.patch similarity index 96% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0027-Patch-MicroBlaze-Intial-commit-of-64-bit-Microblaze.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0027-Intial-commit-of-64-bit-Microblaze.patch index a9222e548..c998d5eb9 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0027-Patch-MicroBlaze-Intial-commit-of-64-bit-Microblaze.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0027-Intial-commit-of-64-bit-Microblaze.patch @@ -1,14 +1,10 @@ -From cf9ab9693d02212e1a49465e55d759a01acc507a Mon Sep 17 00:00:00 2001 +From dd3eee641d2bf28216bf02f324cf8b81d4a61e43 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 13:56:52 +0530 -Subject: [PATCH 27/53] [Patch,MicroBlaze]: Intial commit of 64-bit Microblaze +Subject: [PATCH 27/54] Intial commit of 64-bit Microblaze Conflicts: gcc/config/microblaze/microblaze.md -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/constraints.md | 6 + gcc/config/microblaze/microblaze-protos.h | 1 + @@ -20,7 +16,7 @@ Signed-off-by: Mark Hatle 7 files changed, 456 insertions(+), 30 deletions(-) diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md -index a8934d305ee..2133650147e 100644 +index aae4be73ae3..26742d34980 100644 --- a/gcc/config/microblaze/constraints.md +++ b/gcc/config/microblaze/constraints.md @@ -52,6 +52,12 @@ @@ -37,7 +33,7 @@ index a8934d305ee..2133650147e 100644 (define_constraint "G" diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h -index 848cd509003..7f575c2adec 100644 +index 41557af0f3c..0e9f783c4a4 100644 --- a/gcc/config/microblaze/microblaze-protos.h +++ b/gcc/config/microblaze/microblaze-protos.h @@ -36,6 +36,7 @@ extern void microblaze_expand_divide (rtx *); @@ -49,10 +45,10 @@ index 848cd509003..7f575c2adec 100644 extern void print_operand (FILE *, rtx, int); extern void print_operand_address (FILE *, rtx); diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index 3abfc834ff2..1ac889041b8 100644 +index e28ab593c3e..7975bc182f2 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -3433,11 +3433,11 @@ microblaze_expand_move (machine_mode mode, rtx operands[]) +@@ -3438,11 +3438,11 @@ microblaze_expand_move (machine_mode mode, rtx operands[]) op0 = operands[0]; op1 = operands[1]; @@ -67,7 +63,7 @@ index 3abfc834ff2..1ac889041b8 100644 emit_move_insn (op0, temp); return true; } -@@ -3502,12 +3502,12 @@ microblaze_expand_move (machine_mode mode, rtx operands[]) +@@ -3511,12 +3511,12 @@ microblaze_expand_move (machine_mode mode, rtx operands[]) && (flag_pic == 2 || microblaze_tls_symbol_p (p0) || !SMALL_INT (p1))))) { @@ -82,7 +78,7 @@ index 3abfc834ff2..1ac889041b8 100644 return true; } } -@@ -3638,7 +3638,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) +@@ -3647,7 +3647,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) rtx cmp_op0 = operands[1]; rtx cmp_op1 = operands[2]; rtx label1 = operands[3]; @@ -91,7 +87,7 @@ index 3abfc834ff2..1ac889041b8 100644 rtx condition; gcc_assert ((GET_CODE (cmp_op0) == REG) || (GET_CODE (cmp_op0) == SUBREG)); -@@ -3647,23 +3647,36 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) +@@ -3656,23 +3656,36 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) if (cmp_op1 == const0_rtx) { comp_reg = cmp_op0; @@ -134,7 +130,7 @@ index 3abfc834ff2..1ac889041b8 100644 } } -@@ -3674,7 +3687,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) +@@ -3683,7 +3696,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) rtx cmp_op0 = operands[1]; rtx cmp_op1 = operands[2]; rtx label1 = operands[3]; @@ -143,7 +139,7 @@ index 3abfc834ff2..1ac889041b8 100644 rtx condition; gcc_assert ((GET_CODE (cmp_op0) == REG) -@@ -3685,30 +3698,63 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) +@@ -3694,30 +3707,63 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) { comp_reg = cmp_op0; condition = gen_rtx_fmt_ee (signed_condition (code), @@ -219,7 +215,7 @@ index 3abfc834ff2..1ac889041b8 100644 } } -@@ -3725,6 +3771,19 @@ microblaze_expand_conditional_branch_sf (rtx operands[]) +@@ -3734,6 +3780,19 @@ microblaze_expand_conditional_branch_sf (rtx operands[]) emit_jump_insn (gen_condjump (condition, operands[3])); } @@ -240,7 +236,7 @@ index 3abfc834ff2..1ac889041b8 100644 static bool diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 67015058198..885abc6e5a1 100644 +index 94d96bf6b5d..f35f7075ce3 100644 --- a/gcc/config/microblaze/microblaze.h +++ b/gcc/config/microblaze/microblaze.h @@ -102,6 +102,7 @@ extern enum pipeline_type microblaze_pipe; @@ -269,7 +265,7 @@ index 67015058198..885abc6e5a1 100644 #define FLOAT_TYPE_SIZE 32 #define DOUBLE_TYPE_SIZE 64 diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index f23a85c7ac7..40711fe224b 100644 +index b05f7da30b4..3f572fe2351 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -497,7 +497,6 @@ @@ -751,7 +747,7 @@ index f23a85c7ac7..40711fe224b 100644 ;; Unconditional branches ;;---------------------------------------------------------------- diff --git a/gcc/config/microblaze/microblaze.opt b/gcc/config/microblaze/microblaze.opt -index cc009363f87..10910dbb83f 100644 +index 37aaaf9ffda..96615a6d2c4 100644 --- a/gcc/config/microblaze/microblaze.opt +++ b/gcc/config/microblaze/microblaze.opt @@ -136,4 +136,9 @@ Target @@ -784,5 +780,5 @@ index 7e2fc5dcef8..4c25cfe15e7 100644 # Extra files microblaze-c.o: $(srcdir)/config/microblaze/microblaze-c.cc \ -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0028-Intial-commit-for-64bit-MB-sources.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0028-Intial-commit-for-64bit-MB-sources.-Need-to-cleanup-.patch similarity index 97% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0028-Intial-commit-for-64bit-MB-sources.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0028-Intial-commit-for-64bit-MB-sources.-Need-to-cleanup-.patch index c36e246a3..58bb6fd8b 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0028-Intial-commit-for-64bit-MB-sources.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0028-Intial-commit-for-64bit-MB-sources.-Need-to-cleanup-.patch @@ -1,12 +1,8 @@ -From da40b160857d0b6a56b6f6c9c81d61dabb5255db Mon Sep 17 00:00:00 2001 +From fcec4be11de1c646bdcd6dcfc3844b7deb42898e Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 14:38:48 +0530 -Subject: [PATCH 28/53] Intial commit for 64bit-MB sources. Need to cleanup - the code later. - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 28/54] Intial commit for 64bit-MB sources. Need to cleanup the + code later. --- gcc/config/microblaze/constraints.md | 2 +- @@ -33,7 +29,7 @@ Signed-off-by: Mark Hatle create mode 100644 libgcc/config/microblaze/umoddi3.S diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md -index 2133650147e..0ced155340d 100644 +index 26742d34980..7bb1e0b4c8d 100644 --- a/gcc/config/microblaze/constraints.md +++ b/gcc/config/microblaze/constraints.md @@ -55,7 +55,7 @@ @@ -46,7 +42,7 @@ index 2133650147e..0ced155340d 100644 ;; Define floating point constraints diff --git a/gcc/config/microblaze/microblaze-c.cc b/gcc/config/microblaze/microblaze-c.cc -index caabe99b993..ef8d2430565 100644 +index 065351ad218..af73de0709c 100644 --- a/gcc/config/microblaze/microblaze-c.cc +++ b/gcc/config/microblaze/microblaze-c.cc @@ -100,4 +100,10 @@ microblaze_cpp_define (cpp_reader *pfile) @@ -61,7 +57,7 @@ index caabe99b993..ef8d2430565 100644 + } } diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index 1ac889041b8..9d3628c6816 100644 +index 7975bc182f2..46bbf8a21e7 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc @@ -384,10 +384,10 @@ simple_memory_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED) @@ -104,7 +100,7 @@ index 1ac889041b8..9d3628c6816 100644 info->type = ADDRESS_GOTOFF; } else if (XINT (x, 1) == UNSPEC_PLT) -@@ -1303,8 +1303,16 @@ microblaze_block_move_loop (rtx dest, rtx src, HOST_WIDE_INT length) +@@ -1308,8 +1308,16 @@ microblaze_block_move_loop (rtx dest, rtx src, HOST_WIDE_INT length) emit_move_insn (dest_reg, plus_constant (Pmode, dest_reg, MAX_MOVE_BYTES)); /* Emit the test & branch. */ @@ -122,7 +118,7 @@ index 1ac889041b8..9d3628c6816 100644 /* Mop up any left-over bytes. */ if (leftover) -@@ -1634,14 +1642,20 @@ microblaze_function_arg_advance (cumulative_args_t cum_v, +@@ -1639,14 +1647,20 @@ microblaze_function_arg_advance (cumulative_args_t cum_v, break; case E_DFmode: @@ -145,7 +141,7 @@ index 1ac889041b8..9d3628c6816 100644 break; case E_QImode: -@@ -2156,7 +2170,7 @@ compute_frame_size (HOST_WIDE_INT size) +@@ -2161,7 +2175,7 @@ compute_frame_size (HOST_WIDE_INT size) if (regno != MB_ABI_SUB_RETURN_ADDR_REGNUM) /* Don't account for link register. It is accounted specially below. */ @@ -154,7 +150,7 @@ index 1ac889041b8..9d3628c6816 100644 mask |= (1L << (regno - GP_REG_FIRST)); } -@@ -2425,7 +2439,7 @@ print_operand (FILE * file, rtx op, int letter) +@@ -2430,7 +2444,7 @@ print_operand (FILE * file, rtx op, int letter) if ((letter == 'M' && !WORDS_BIG_ENDIAN) || (letter == 'L' && WORDS_BIG_ENDIAN) || letter == 'D') @@ -163,7 +159,7 @@ index 1ac889041b8..9d3628c6816 100644 fprintf (file, "%s", reg_names[regnum]); } -@@ -2451,6 +2465,7 @@ print_operand (FILE * file, rtx op, int letter) +@@ -2456,6 +2470,7 @@ print_operand (FILE * file, rtx op, int letter) else if (letter == 'h' || letter == 'j') { long val[2]; @@ -171,7 +167,7 @@ index 1ac889041b8..9d3628c6816 100644 long l[2]; if (code == CONST_DOUBLE) { -@@ -2463,12 +2478,12 @@ print_operand (FILE * file, rtx op, int letter) +@@ -2468,12 +2483,12 @@ print_operand (FILE * file, rtx op, int letter) val[0] = l[WORDS_BIG_ENDIAN != 0]; } } @@ -188,7 +184,7 @@ index 1ac889041b8..9d3628c6816 100644 } else if (code == CONST_DOUBLE) { -@@ -2662,7 +2677,10 @@ microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority) +@@ -2667,7 +2682,10 @@ microblaze_asm_constructor (rtx symbol ATTRIBUTE_UNUSED, int priority) switch_to_section (get_section (section, 0, NULL)); assemble_align (POINTER_SIZE); @@ -200,7 +196,7 @@ index 1ac889041b8..9d3628c6816 100644 output_addr_const (asm_out_file, symbol); fputs ("\n", asm_out_file); } -@@ -2685,7 +2703,10 @@ microblaze_asm_destructor (rtx symbol, int priority) +@@ -2690,7 +2708,10 @@ microblaze_asm_destructor (rtx symbol, int priority) switch_to_section (get_section (section, 0, NULL)); assemble_align (POINTER_SIZE); @@ -212,7 +208,7 @@ index 1ac889041b8..9d3628c6816 100644 output_addr_const (asm_out_file, symbol); fputs ("\n", asm_out_file); } -@@ -2751,7 +2772,7 @@ save_restore_insns (int prologue) +@@ -2756,7 +2777,7 @@ save_restore_insns (int prologue) /* For interrupt_handlers, need to save/restore the MSR. */ if (microblaze_is_interrupt_variant ()) { @@ -221,7 +217,7 @@ index 1ac889041b8..9d3628c6816 100644 gen_rtx_PLUS (Pmode, base_reg_rtx, GEN_INT (current_frame_info. gp_offset - -@@ -2759,8 +2780,8 @@ save_restore_insns (int prologue) +@@ -2764,8 +2785,8 @@ save_restore_insns (int prologue) /* Do not optimize in flow analysis. */ MEM_VOLATILE_P (isr_mem_rtx) = 1; @@ -232,7 +228,7 @@ index 1ac889041b8..9d3628c6816 100644 } if (microblaze_is_interrupt_variant () && !prologue) -@@ -2768,8 +2789,8 @@ save_restore_insns (int prologue) +@@ -2773,8 +2794,8 @@ save_restore_insns (int prologue) emit_move_insn (isr_reg_rtx, isr_mem_rtx); emit_move_insn (isr_msr_rtx, isr_reg_rtx); /* Do not optimize in flow analysis. */ @@ -243,7 +239,7 @@ index 1ac889041b8..9d3628c6816 100644 } for (regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++) -@@ -2780,9 +2801,9 @@ save_restore_insns (int prologue) +@@ -2785,9 +2806,9 @@ save_restore_insns (int prologue) /* Don't handle here. Already handled as the first register. */ continue; @@ -255,7 +251,7 @@ index 1ac889041b8..9d3628c6816 100644 if (microblaze_is_interrupt_variant () || save_volatiles) /* Do not optimize in flow analysis. */ MEM_VOLATILE_P (mem_rtx) = 1; -@@ -2797,7 +2818,7 @@ save_restore_insns (int prologue) +@@ -2802,7 +2823,7 @@ save_restore_insns (int prologue) insn = emit_move_insn (reg_rtx, mem_rtx); } @@ -264,7 +260,7 @@ index 1ac889041b8..9d3628c6816 100644 } } -@@ -2807,8 +2828,8 @@ save_restore_insns (int prologue) +@@ -2812,8 +2833,8 @@ save_restore_insns (int prologue) emit_move_insn (isr_mem_rtx, isr_reg_rtx); /* Do not optimize in flow analysis. */ @@ -275,7 +271,7 @@ index 1ac889041b8..9d3628c6816 100644 } /* Done saving and restoring */ -@@ -2898,7 +2919,10 @@ microblaze_elf_asm_cdtor (rtx symbol, int priority, bool is_ctor) +@@ -2903,7 +2924,10 @@ microblaze_elf_asm_cdtor (rtx symbol, int priority, bool is_ctor) switch_to_section (s); assemble_align (POINTER_SIZE); @@ -287,7 +283,7 @@ index 1ac889041b8..9d3628c6816 100644 output_addr_const (asm_out_file, symbol); fputs ("\n", asm_out_file); } -@@ -3042,10 +3066,10 @@ microblaze_expand_prologue (void) +@@ -3047,10 +3071,10 @@ microblaze_expand_prologue (void) { if (offset != 0) ptr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset)); @@ -301,7 +297,7 @@ index 1ac889041b8..9d3628c6816 100644 } } -@@ -3054,15 +3078,23 @@ microblaze_expand_prologue (void) +@@ -3059,15 +3083,23 @@ microblaze_expand_prologue (void) rtx fsiz_rtx = GEN_INT (fsiz); rtx_insn *insn = NULL; @@ -327,7 +323,7 @@ index 1ac889041b8..9d3628c6816 100644 gen_rtx_PLUS (Pmode, stack_pointer_rtx, const0_rtx)); -@@ -3070,7 +3102,7 @@ microblaze_expand_prologue (void) +@@ -3075,7 +3107,7 @@ microblaze_expand_prologue (void) /* Do not optimize in flow analysis. */ MEM_VOLATILE_P (mem_rtx) = 1; @@ -336,7 +332,7 @@ index 1ac889041b8..9d3628c6816 100644 insn = emit_move_insn (mem_rtx, reg_rtx); RTX_FRAME_RELATED_P (insn) = 1; } -@@ -3180,12 +3212,12 @@ microblaze_expand_epilogue (void) +@@ -3185,12 +3217,12 @@ microblaze_expand_epilogue (void) if (!crtl->is_leaf || interrupt_handler) { mem_rtx = @@ -351,7 +347,7 @@ index 1ac889041b8..9d3628c6816 100644 emit_move_insn (reg_rtx, mem_rtx); } -@@ -3201,15 +3233,25 @@ microblaze_expand_epilogue (void) +@@ -3206,15 +3238,25 @@ microblaze_expand_epilogue (void) /* _restore_ registers for epilogue. */ save_restore_insns (0); emit_insn (gen_blockage ()); @@ -381,7 +377,7 @@ index 1ac889041b8..9d3628c6816 100644 emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM))); } -@@ -3376,9 +3418,14 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, +@@ -3381,9 +3423,14 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, else this_rtx = gen_rtx_REG (Pmode, MB_ABI_FIRST_ARG_REGNUM); @@ -398,7 +394,7 @@ index 1ac889041b8..9d3628c6816 100644 /* Apply the offset from the vtable, if required. */ if (vcall_offset) -@@ -3391,7 +3438,10 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, +@@ -3396,7 +3443,10 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, rtx loc = gen_rtx_PLUS (Pmode, temp1, vcall_offset_rtx); emit_move_insn (temp1, gen_rtx_MEM (Pmode, loc)); @@ -410,7 +406,7 @@ index 1ac889041b8..9d3628c6816 100644 } /* Generate a tail call to the target function. */ -@@ -3622,9 +3672,9 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) +@@ -3631,9 +3681,9 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) emit_block_move (m_tramp, assemble_trampoline_template (), GEN_INT (6*UNITS_PER_WORD), BLOCK_OP_NORMAL); @@ -422,7 +418,7 @@ index 1ac889041b8..9d3628c6816 100644 emit_move_insn (mem, fnaddr); } -@@ -3648,7 +3698,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) +@@ -3657,7 +3707,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) { comp_reg = cmp_op0; condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); @@ -431,7 +427,7 @@ index 1ac889041b8..9d3628c6816 100644 emit_jump_insn (gen_condjump (condition, label1)); else emit_jump_insn (gen_long_condjump (condition, label1)); -@@ -3767,7 +3817,7 @@ microblaze_expand_conditional_branch_sf (rtx operands[]) +@@ -3776,7 +3826,7 @@ microblaze_expand_conditional_branch_sf (rtx operands[]) rtx comp_reg = gen_reg_rtx (SImode); emit_insn (gen_cstoresf4 (comp_reg, operands[0], cmp_op0, cmp_op1)); @@ -440,7 +436,7 @@ index 1ac889041b8..9d3628c6816 100644 emit_jump_insn (gen_condjump (condition, operands[3])); } -@@ -3777,10 +3827,10 @@ microblaze_expand_conditional_branch_df (rtx operands[]) +@@ -3786,10 +3836,10 @@ microblaze_expand_conditional_branch_df (rtx operands[]) rtx condition; rtx cmp_op0 = XEXP (operands[0], 0); rtx cmp_op1 = XEXP (operands[0], 1); @@ -453,7 +449,7 @@ index 1ac889041b8..9d3628c6816 100644 emit_jump_insn (gen_long_condjump (condition, operands[3])); } -@@ -3801,8 +3851,8 @@ microblaze_expand_divide (rtx operands[]) +@@ -3810,8 +3860,8 @@ microblaze_expand_divide (rtx operands[]) { /* Table lookup software divides. Works for all (nr/dr) where (0 <= nr,dr <= 15). */ @@ -464,7 +460,7 @@ index 1ac889041b8..9d3628c6816 100644 rtx regqi = gen_reg_rtx (QImode); rtx_code_label *div_label = gen_label_rtx (); rtx_code_label *div_end_label = gen_label_rtx (); -@@ -3810,17 +3860,31 @@ microblaze_expand_divide (rtx operands[]) +@@ -3819,17 +3869,31 @@ microblaze_expand_divide (rtx operands[]) rtx mem_rtx; rtx ret; rtx_insn *jump, *cjump, *insn; @@ -503,7 +499,7 @@ index 1ac889041b8..9d3628c6816 100644 mem_rtx = gen_rtx_MEM (QImode, gen_rtx_PLUS (QImode, regt1, div_table_rtx)); -@@ -3967,7 +4031,7 @@ insert_wic_for_ilb_runout (rtx_insn *first) +@@ -3976,7 +4040,7 @@ insert_wic_for_ilb_runout (rtx_insn *first) { insn = emit_insn_before (gen_iprefetch @@ -512,7 +508,7 @@ index 1ac889041b8..9d3628c6816 100644 before_4); recog_memoized (insn); INSN_LOCATION (insn) = INSN_LOCATION (before_4); -@@ -3977,7 +4041,27 @@ insert_wic_for_ilb_runout (rtx_insn *first) +@@ -3986,7 +4050,27 @@ insert_wic_for_ilb_runout (rtx_insn *first) } } } @@ -541,7 +537,7 @@ index 1ac889041b8..9d3628c6816 100644 /* Insert instruction prefetch instruction at the fall through path of the function call. */ -@@ -4130,6 +4214,17 @@ microblaze_starting_frame_offset (void) +@@ -4139,6 +4223,17 @@ microblaze_starting_frame_offset (void) #undef TARGET_LRA_P #define TARGET_LRA_P hook_bool_void_false @@ -559,7 +555,7 @@ index 1ac889041b8..9d3628c6816 100644 #undef TARGET_FRAME_POINTER_REQUIRED #define TARGET_FRAME_POINTER_REQUIRED microblaze_frame_pointer_required -@@ -4139,6 +4234,9 @@ microblaze_starting_frame_offset (void) +@@ -4148,6 +4243,9 @@ microblaze_starting_frame_offset (void) #undef TARGET_TRAMPOLINE_INIT #define TARGET_TRAMPOLINE_INIT microblaze_trampoline_init @@ -570,7 +566,7 @@ index 1ac889041b8..9d3628c6816 100644 #define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 885abc6e5a1..5f30b8ac195 100644 +index f35f7075ce3..3aee003de0d 100644 --- a/gcc/config/microblaze/microblaze.h +++ b/gcc/config/microblaze/microblaze.h @@ -173,7 +173,6 @@ extern enum pipeline_type microblaze_pipe; @@ -739,7 +735,7 @@ index 885abc6e5a1..5f30b8ac195 100644 /* Default to -G 8 */ #ifndef MICROBLAZE_DEFAULT_GVALUE diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 40711fe224b..c99150ff0da 100644 +index 3f572fe2351..97da9aad6fd 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -26,6 +26,7 @@ @@ -1799,7 +1795,7 @@ index 4c25cfe15e7..965132b3513 100644 MULTILIB_EXCEPTIONS += mxl-multiply-high/m64 MULTILIB_EXCEPTIONS += *mxl-multiply-high/mlittle-endian/m64 diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S -index cbbe32d5f6a..ec797e1bf17 100644 +index 0f24adb750d..1a89a0a2ffa 100644 --- a/libgcc/config/microblaze/crti.S +++ b/libgcc/config/microblaze/crti.S @@ -40,7 +40,7 @@ @@ -1819,7 +1815,7 @@ index cbbe32d5f6a..ec797e1bf17 100644 + addik r1, r1, -16 sw r15, r0, r1 diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S -index cb8d8ef2bfa..977b43b9436 100644 +index d38d7ab9f98..29a004973ae 100644 --- a/libgcc/config/microblaze/crtn.S +++ b/libgcc/config/microblaze/crtn.S @@ -33,9 +33,9 @@ @@ -2442,5 +2438,5 @@ index 00000000000..7f5cd23f9a1 + .size __umoddi3, . - __umoddi3 +#endif -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0029-Patch-MicroBlaze-re-arrangement-of-the-compare-branc.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0029-re-arrangement-of-the-compare-branches.patch similarity index 92% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0029-Patch-MicroBlaze-re-arrangement-of-the-compare-branc.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0029-re-arrangement-of-the-compare-branches.patch index 0a275c0bb..448e850fe 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0029-Patch-MicroBlaze-re-arrangement-of-the-compare-branc.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0029-re-arrangement-of-the-compare-branches.patch @@ -1,12 +1,7 @@ -From 10d5e7d6cad5e7349b88b7469eb5ae20d87eb908 Mon Sep 17 00:00:00 2001 +From 870bfd716fcddeb72660f3176fb2a68aaa5ecc0e Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 14:45:15 +0530 -Subject: [PATCH 29/53] [Patch,MicroBlaze] : re-arrangement of the compare - branches - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 29/54] re-arrangement of the compare branches --- gcc/config/microblaze/microblaze.cc | 28 ++---- @@ -14,10 +9,10 @@ Signed-off-by: Mark Hatle 2 files changed, 73 insertions(+), 96 deletions(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index 9d3628c6816..4792e3ba370 100644 +index 46bbf8a21e7..de3c95a005e 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -3698,11 +3698,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) +@@ -3707,11 +3707,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) { comp_reg = cmp_op0; condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); @@ -30,7 +25,7 @@ index 9d3628c6816..4792e3ba370 100644 } else if (code == EQ || code == NE) -@@ -3713,10 +3709,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) +@@ -3722,10 +3718,7 @@ microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) else emit_insn (gen_xordi3 (comp_reg, cmp_op0, cmp_op1)); condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); @@ -42,7 +37,7 @@ index 9d3628c6816..4792e3ba370 100644 } else { -@@ -3749,10 +3742,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) +@@ -3758,10 +3751,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) comp_reg = cmp_op0; condition = gen_rtx_fmt_ee (signed_condition (code), mode, comp_reg, const0_rtx); @@ -54,7 +49,7 @@ index 9d3628c6816..4792e3ba370 100644 } else if (code == EQ) { -@@ -3767,10 +3757,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) +@@ -3776,10 +3766,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) cmp_op1)); } condition = gen_rtx_EQ (mode, comp_reg, const0_rtx); @@ -66,7 +61,7 @@ index 9d3628c6816..4792e3ba370 100644 } else if (code == NE) -@@ -3786,10 +3773,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) +@@ -3795,10 +3782,7 @@ microblaze_expand_conditional_branch_reg (machine_mode mode, rtx operands[]) cmp_op1)); } condition = gen_rtx_NE (mode, comp_reg, const0_rtx); @@ -78,7 +73,7 @@ index 9d3628c6816..4792e3ba370 100644 } else { -@@ -3831,7 +3815,7 @@ microblaze_expand_conditional_branch_df (rtx operands[]) +@@ -3840,7 +3824,7 @@ microblaze_expand_conditional_branch_df (rtx operands[]) emit_insn (gen_cstoredf4 (comp_reg, operands[0], cmp_op0, cmp_op1)); condition = gen_rtx_NE (Pmode, comp_reg, const0_rtx); @@ -88,7 +83,7 @@ index 9d3628c6816..4792e3ba370 100644 /* Implement TARGET_FRAME_POINTER_REQUIRED. */ diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index c99150ff0da..566c53ba228 100644 +index 97da9aad6fd..31bf04e4abd 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -2268,7 +2268,27 @@ else @@ -269,5 +264,5 @@ index c99150ff0da..566c53ba228 100644 ;; Unconditional branches ;;---------------------------------------------------------------- -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0030-Patch-Microblaze-previous-commit-broke-the-handling-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0030-previous-commit-broke-the-handling-of-SI-Branch-comp.patch similarity index 72% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0030-Patch-Microblaze-previous-commit-broke-the-handling-.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0030-previous-commit-broke-the-handling-of-SI-Branch-comp.patch index bda4e7da4..92951b08b 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0030-Patch-Microblaze-previous-commit-broke-the-handling-.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0030-previous-commit-broke-the-handling-of-SI-Branch-comp.patch @@ -1,19 +1,15 @@ -From af910dd71faec99838e421dd76fd5231e34bee3e Mon Sep 17 00:00:00 2001 +From e4713a382c1e6729cd3228284def9fa59da70028 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Wed, 8 Aug 2018 17:37:26 +0530 -Subject: [PATCH 30/53] [Patch,Microblaze] : previous commit broke the - handling of SI Branch compare for Microblaze 32-bit.. - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 30/54] previous commit broke the handling of SI Branch compare + for Microblaze 32-bit.. --- gcc/config/microblaze/microblaze.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 566c53ba228..e54888550f6 100644 +index 31bf04e4abd..e37a7704195 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -2224,8 +2224,8 @@ else @@ -28,5 +24,5 @@ index 566c53ba228..e54888550f6 100644 (pc)))] "" -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0031-Patch-Microblaze-Support-of-multilibs-with-m64.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0031-Support-of-multilibs-with-m64.patch similarity index 92% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0031-Patch-Microblaze-Support-of-multilibs-with-m64.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0031-Support-of-multilibs-with-m64.patch index a9a7a03dd..40009bf0f 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0031-Patch-Microblaze-Support-of-multilibs-with-m64.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0031-Support-of-multilibs-with-m64.patch @@ -1,16 +1,12 @@ -From 6921698fc0acf40cb036cf71649762e7a21bf604 Mon Sep 17 00:00:00 2001 +From 0673e986a5c06cba6507e0361ebdb9cf309f6a4c Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 11 Sep 2018 13:43:48 +0530 -Subject: [PATCH 31/53] [Patch, Microblaze] : Support of multilibs with m64 ... +Subject: [PATCH 31/54] Support of multilibs with m64 ... Conflicts: gcc/config/microblaze/microblaze-c.c signed-off-by : Mahesh Bodapati -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze-c.cc | 1 + gcc/config/microblaze/t-microblaze | 15 ++++++--------- @@ -18,7 +14,7 @@ Signed-off-by: Mark Hatle 3 files changed, 10 insertions(+), 17 deletions(-) diff --git a/gcc/config/microblaze/microblaze-c.cc b/gcc/config/microblaze/microblaze-c.cc -index ef8d2430565..4e83a84b112 100644 +index af73de0709c..c7cb139d25a 100644 --- a/gcc/config/microblaze/microblaze-c.cc +++ b/gcc/config/microblaze/microblaze-c.cc @@ -102,6 +102,7 @@ microblaze_cpp_define (cpp_reader *pfile) @@ -77,5 +73,5 @@ index 35021b24b7d..8d954a49575 100644 - $(srcdir)/config/microblaze/divsi3_table.c \ + $(srcdir)/config/microblaze/divsi3_table.c -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0032-Patch-MicroBlaze-Fixed-issues-like.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0032-Fixed-issues-like-1-Interrupt-alignment-issue-2-Sign.patch similarity index 77% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0032-Patch-MicroBlaze-Fixed-issues-like.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0032-Fixed-issues-like-1-Interrupt-alignment-issue-2-Sign.patch index cb62c5a72..df7ef8da9 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0032-Patch-MicroBlaze-Fixed-issues-like.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0032-Fixed-issues-like-1-Interrupt-alignment-issue-2-Sign.patch @@ -1,12 +1,8 @@ -From 7f827e73dff27c764e5f475613e3e06ae546103f Mon Sep 17 00:00:00 2001 +From 63e3adfb493e225c55536e72cfbf8be70977cdc8 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 15:24:25 +0530 -Subject: [PATCH 32/53] [Patch,MicroBlaze]: Fixed issues like: 1 Interrupt - alignment issue 2 Sign extension issue - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 32/54] Fixed issues like: 1 Interrupt alignment issue 2 Sign + extension issue --- gcc/config/microblaze/microblaze.cc | 16 ++++++++++------ @@ -14,10 +10,10 @@ Signed-off-by: Mark Hatle 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index 4792e3ba370..f1da145232a 100644 +index de3c95a005e..6fbecb43e4a 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -2178,9 +2178,14 @@ compute_frame_size (HOST_WIDE_INT size) +@@ -2183,9 +2183,14 @@ compute_frame_size (HOST_WIDE_INT size) total_size += gp_reg_size; @@ -34,7 +30,7 @@ index 4792e3ba370..f1da145232a 100644 /* No space to be allocated for link register in leaf functions with no other stack requirements. */ -@@ -2465,7 +2470,6 @@ print_operand (FILE * file, rtx op, int letter) +@@ -2470,7 +2475,6 @@ print_operand (FILE * file, rtx op, int letter) else if (letter == 'h' || letter == 'j') { long val[2]; @@ -42,7 +38,7 @@ index 4792e3ba370..f1da145232a 100644 long l[2]; if (code == CONST_DOUBLE) { -@@ -2480,10 +2484,10 @@ print_operand (FILE * file, rtx op, int letter) +@@ -2485,10 +2489,10 @@ print_operand (FILE * file, rtx op, int letter) } else if (code == CONST_INT || code == CONST)// || code == SYMBOL_REF ||code == LABEL_REF) { @@ -57,7 +53,7 @@ index 4792e3ba370..f1da145232a 100644 else if (code == CONST_DOUBLE) { diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index e54888550f6..4e5d21a1f4c 100644 +index e37a7704195..72c2a9a38cd 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -1096,7 +1096,7 @@ @@ -70,5 +66,5 @@ index e54888550f6..4e5d21a1f4c 100644 } } -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0033-Patch-MicroBlaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0033-fixed-below-issues-Floating-point-print-issues-in-64.patch similarity index 93% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0033-Patch-MicroBlaze.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0033-fixed-below-issues-Floating-point-print-issues-in-64.patch index 9760695c1..cf1076eab 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0033-Patch-MicroBlaze.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0033-fixed-below-issues-Floating-point-print-issues-in-64.patch @@ -1,16 +1,11 @@ -From 0a86428a345ed359f788a72a0e185053b598e908 Mon Sep 17 00:00:00 2001 +From 58d4d2ca4fdf90d9d21e7813a599b3491f52e34d Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 15:28:58 +0530 -Subject: [PATCH 33/53] [Patch,MicroBlaze]: fixed below issues: - Floating - point print issues in 64bit mode - Dejagnu Jump related issues - - Added dbl instruction +Subject: [PATCH 33/54] fixed below issues: - Floating point print issues in + 64bit mode - Dejagnu Jump related issues - Added dbl instruction Conflicts: gcc/config/microblaze/microblaze.md -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.cc | 12 +++- gcc/config/microblaze/microblaze.h | 7 +++ @@ -20,10 +15,10 @@ Signed-off-by: Mark Hatle 5 files changed, 125 insertions(+), 17 deletions(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index f1da145232a..7a08390a027 100644 +index 6fbecb43e4a..965a041ea8c 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -2474,7 +2474,12 @@ print_operand (FILE * file, rtx op, int letter) +@@ -2479,7 +2479,12 @@ print_operand (FILE * file, rtx op, int letter) if (code == CONST_DOUBLE) { if (GET_MODE (op) == DFmode) @@ -37,7 +32,7 @@ index f1da145232a..7a08390a027 100644 else { REAL_VALUE_TO_TARGET_DOUBLE (*CONST_DOUBLE_REAL_VALUE (op), l); -@@ -3877,7 +3882,10 @@ microblaze_expand_divide (rtx operands[]) +@@ -3886,7 +3891,10 @@ microblaze_expand_divide (rtx operands[]) gen_rtx_PLUS (QImode, regt1, div_table_rtx)); insn = emit_insn (gen_zero_extendqisi2(operands[0],mem_rtx)); @@ -50,7 +45,7 @@ index f1da145232a..7a08390a027 100644 LABEL_NUSES (div_end_label) = 1; emit_barrier (); diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 5f30b8ac195..ac4ea43a706 100644 +index 3aee003de0d..145368db8b8 100644 --- a/gcc/config/microblaze/microblaze.h +++ b/gcc/config/microblaze/microblaze.h @@ -888,10 +888,17 @@ do { \ @@ -72,7 +67,7 @@ index 5f30b8ac195..ac4ea43a706 100644 /* We need to group -lm as well, since some Newlib math functions reference __errno! */ diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 4e5d21a1f4c..5a950b49591 100644 +index 72c2a9a38cd..b3d265d9941 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -527,6 +527,15 @@ @@ -233,7 +228,7 @@ index 4e5d21a1f4c..5a950b49591 100644 "" "mfs\t%0,rpc\n\taddik\t%0,%0,_GLOBAL_OFFSET_TABLE_+8" diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S -index ec797e1bf17..15ebe68c277 100644 +index 1a89a0a2ffa..7cf5664880b 100644 --- a/libgcc/config/microblaze/crti.S +++ b/libgcc/config/microblaze/crti.S @@ -33,11 +33,32 @@ @@ -276,7 +271,7 @@ index ec797e1bf17..15ebe68c277 100644 sw r15, r0, r1 +#endif diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S -index 977b43b9436..9de3d4de13c 100644 +index 29a004973ae..9697b247b6c 100644 --- a/libgcc/config/microblaze/crtn.S +++ b/libgcc/config/microblaze/crtn.S @@ -29,7 +29,19 @@ @@ -305,5 +300,5 @@ index 977b43b9436..9de3d4de13c 100644 addik r1, r1, 16 +#endif -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0034-Added-double-arith-instructions.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0034-Added-double-arith-instructions-Fixed-prologue-stack.patch similarity index 94% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0034-Added-double-arith-instructions.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0034-Added-double-arith-instructions-Fixed-prologue-stack.patch index 3f07dfa12..ab50b5993 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0034-Added-double-arith-instructions.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0034-Added-double-arith-instructions-Fixed-prologue-stack.patch @@ -1,20 +1,16 @@ -From 80c16e39bdf8643184c353e34f146dc8601c2c1e Mon Sep 17 00:00:00 2001 +From 924a756b5c9edc5d626f68323f67ced2800c75ff Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Tue, 9 Oct 2018 10:07:08 +0530 -Subject: [PATCH 34/53] -Added double arith instructions -Fixed prologue stack +Subject: [PATCH 34/54] -Added double arith instructions -Fixed prologue stack pointer decrement issue -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.md | 78 +++++++++++++++++++++++++---- gcc/config/microblaze/t-microblaze | 7 +++ 2 files changed, 76 insertions(+), 9 deletions(-) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 5a950b49591..5506aee7be5 100644 +index b3d265d9941..0f769f320b2 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -527,6 +527,66 @@ @@ -135,5 +131,5 @@ index 47b869b9303..3522afd4831 100644 MULTILIB_EXCEPTIONS += *mlittle-endian/mxl-multiply-high mxl-multiply-high MULTILIB_EXCEPTIONS += *m64/mxl-barrel-shift/mlittle-endian/mxl-multiply-high -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch similarity index 76% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch index 3ff6a2d0a..589ca998a 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch @@ -1,19 +1,15 @@ -From 455216291580ca22767433eec11941c5f2471892 Mon Sep 17 00:00:00 2001 +From 3ebc7f9a11d66843982544cd0f88f35cc4defb83 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Fri, 12 Oct 2018 16:07:36 +0530 -Subject: [PATCH 35/53] Fixed the issue in the delay slot with swap +Subject: [PATCH 35/54] Fixed the issue in the delay slot with swap instructions -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.md | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 5506aee7be5..4a372f8fd3f 100644 +index 0f769f320b2..6ada55ac2bc 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -443,6 +443,9 @@ @@ -37,5 +33,5 @@ index 5506aee7be5..4a372f8fd3f 100644 ;;---------------------------------------------------------------- -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch similarity index 93% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch index 90ddf3eb8..8431cb16e 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch @@ -1,13 +1,9 @@ -From b8c468f1bd467213083b59b54af100ee0c6dea9e Mon Sep 17 00:00:00 2001 +From 9ea2aee3599d2f1fc9d67c7a72cd7c826272a2fa Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Sat, 13 Oct 2018 21:12:43 +0530 -Subject: [PATCH 36/53] Fixed the load store issue with the 32bit arith +Subject: [PATCH 36/54] Fixed the load store issue with the 32bit arith libraries -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- libgcc/config/microblaze/divsi3.S | 25 ++++++++++++++++++++++++- libgcc/config/microblaze/modsi3.S | 26 +++++++++++++++++++++++++- @@ -17,7 +13,7 @@ Signed-off-by: Mark Hatle 5 files changed, 98 insertions(+), 4 deletions(-) diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S -index 14829ec6701..b464deed481 100644 +index a449fedd53e..9f04f59104e 100644 --- a/libgcc/config/microblaze/divsi3.S +++ b/libgcc/config/microblaze/divsi3.S @@ -41,6 +41,17 @@ @@ -74,7 +70,7 @@ index 14829ec6701..b464deed481 100644 .size __divsi3, . - __divsi3 diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S -index b8f2e37809d..e0fbd91e766 100644 +index 282fabfd966..d2f9dc770e4 100644 --- a/libgcc/config/microblaze/modsi3.S +++ b/libgcc/config/microblaze/modsi3.S @@ -41,6 +41,17 @@ @@ -132,7 +128,7 @@ index b8f2e37809d..e0fbd91e766 100644 .size __modsi3, . - __modsi3 diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S -index f48fcf8270c..657668ef826 100644 +index 3da55416964..437e2bc309e 100644 --- a/libgcc/config/microblaze/mulsi3.S +++ b/libgcc/config/microblaze/mulsi3.S @@ -41,6 +41,9 @@ @@ -146,7 +142,7 @@ index f48fcf8270c..657668ef826 100644 .frame r1,0,r15 add r3,r0,r0 diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S -index 2c321f94b09..fc6a4b5a248 100644 +index 7f3fe99eb12..496dd6794bf 100644 --- a/libgcc/config/microblaze/udivsi3.S +++ b/libgcc/config/microblaze/udivsi3.S @@ -41,6 +41,16 @@ @@ -201,7 +197,7 @@ index 2c321f94b09..fc6a4b5a248 100644 .end __udivsi3 .size __udivsi3, . - __udivsi3 diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S -index fbe942dc5f2..b68ba7a5ea6 100644 +index 6c7f2b3c917..fffc784b4cb 100644 --- a/libgcc/config/microblaze/umodsi3.S +++ b/libgcc/config/microblaze/umodsi3.S @@ -41,6 +41,16 @@ @@ -256,5 +252,5 @@ index fbe942dc5f2..b68ba7a5ea6 100644 .end __umodsi3 .size __umodsi3, . - __umodsi3 -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch similarity index 71% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch index 191c7627c..8b0fa208b 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch @@ -1,18 +1,14 @@ -From 2bc476e64f1bacc27874c152340c004c17bfd942 Mon Sep 17 00:00:00 2001 +From d2c971646ce103fa17cc32474cb942268bc59258 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Mon, 15 Oct 2018 12:00:10 +0530 -Subject: [PATCH 37/53] extending the Dwarf support to 64bit Microblaze - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 37/54] extending the Dwarf support to 64bit Microblaze --- gcc/config/microblaze/microblaze.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index ac4ea43a706..56dfc2a3824 100644 +index 145368db8b8..4258dcde0d1 100644 --- a/gcc/config/microblaze/microblaze.h +++ b/gcc/config/microblaze/microblaze.h @@ -207,7 +207,7 @@ extern enum pipeline_type microblaze_pipe; @@ -25,5 +21,5 @@ index ac4ea43a706..56dfc2a3824 100644 /* Target machine storage layout */ -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0038-fixing-the-typo-errors-in-umodsi3-file.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0038-fixing-the-typo-errors-in-umodsi3-file.patch similarity index 68% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0038-fixing-the-typo-errors-in-umodsi3-file.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0038-fixing-the-typo-errors-in-umodsi3-file.patch index 8697be580..d7b788958 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0038-fixing-the-typo-errors-in-umodsi3-file.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0038-fixing-the-typo-errors-in-umodsi3-file.patch @@ -1,18 +1,14 @@ -From 1e0eaa1330f24d4989af6326ce1af4f613ea0d89 Mon Sep 17 00:00:00 2001 +From 0c0b4fb378d9035f0c5f847321b543a5c2ff70e2 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Tue, 16 Oct 2018 07:55:46 +0530 -Subject: [PATCH 38/53] fixing the typo errors in umodsi3 file - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 38/54] fixing the typo errors in umodsi3 file --- libgcc/config/microblaze/umodsi3.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S -index b68ba7a5ea6..03be6df1fc6 100644 +index fffc784b4cb..a706017c634 100644 --- a/libgcc/config/microblaze/umodsi3.S +++ b/libgcc/config/microblaze/umodsi3.S @@ -47,9 +47,9 @@ __umodsi3: @@ -29,5 +25,5 @@ index b68ba7a5ea6..03be6df1fc6 100644 __umodsi3: .frame r1,0,r15 -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0039-fixing-the-32bit-LTO-related-issue9-1014024.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0039-fixing-the-32bit-LTO-related-issue9-1014024.patch similarity index 88% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0039-fixing-the-32bit-LTO-related-issue9-1014024.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0039-fixing-the-32bit-LTO-related-issue9-1014024.patch index 032cab4df..27b6efd13 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0039-fixing-the-32bit-LTO-related-issue9-1014024.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0039-fixing-the-32bit-LTO-related-issue9-1014024.patch @@ -1,18 +1,14 @@ -From 7dbdc5ba78c9237b0a367ca61f448cf3a0277ea6 Mon Sep 17 00:00:00 2001 +From 8dfc5e76a3b0388bb5c88c5c0072256f3062f3c8 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Wed, 17 Oct 2018 16:56:14 +0530 -Subject: [PATCH 39/53] fixing the 32bit LTO related issue9(1014024) - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 39/54] fixing the 32bit LTO related issue9(1014024) --- gcc/config/microblaze/microblaze.h | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 56dfc2a3824..c48b6de0d58 100644 +index 4258dcde0d1..4d6babfe9c4 100644 --- a/gcc/config/microblaze/microblaze.h +++ b/gcc/config/microblaze/microblaze.h @@ -265,12 +265,14 @@ extern enum pipeline_type microblaze_pipe; @@ -68,5 +64,5 @@ index 56dfc2a3824..c48b6de0d58 100644 #define REGNO_OK_FOR_BASE_P(regno) microblaze_regno_ok_for_base_p ((regno), 1) -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch similarity index 66% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch index 1ed53957e..35251ff80 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch @@ -1,19 +1,15 @@ -From a21a41a0c574b807c7e7edaa7051a0f7395d8142 Mon Sep 17 00:00:00 2001 +From 411324e0340a32b4a84094b38e5d74f38cf391bc Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Fri, 19 Oct 2018 14:26:25 +0530 -Subject: [PATCH 40/53] Fixed the missing stack adjustment in prologue of +Subject: [PATCH 40/54] Fixed the missing stack adjustment in prologue of modsi3 function -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- libgcc/config/microblaze/modsi3.S | 1 + 1 file changed, 1 insertion(+) diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S -index e0fbd91e766..3ec17685e51 100644 +index d2f9dc770e4..f8684db721e 100644 --- a/libgcc/config/microblaze/modsi3.S +++ b/libgcc/config/microblaze/modsi3.S @@ -119,6 +119,7 @@ $LaRETURN_HERE: @@ -25,5 +21,5 @@ index e0fbd91e766..3ec17685e51 100644 .end __modsi3 .size __modsi3, . - __modsi3 -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0041-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0041-corrected-SPN-for-dlong-instruction-mapping.patch similarity index 72% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0041-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0041-corrected-SPN-for-dlong-instruction-mapping.patch index e6335e8ed..bb797a4a4 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0041-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0041-corrected-SPN-for-dlong-instruction-mapping.patch @@ -1,19 +1,14 @@ -From 5f799ea01bae0573a44f3fefa825861e99f4e30a Mon Sep 17 00:00:00 2001 +From b03e3a75a37213823c062bb72e4f6f470c516222 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Wed, 24 Oct 2018 18:31:04 +0530 -Subject: [PATCH 41/53] [Patch,Microblaze] : corrected SPN for dlong - instruction mapping. - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 41/54] corrected SPN for dlong instruction mapping. --- gcc/config/microblaze/microblaze.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 4a372f8fd3f..5a964e70d1f 100644 +index 6ada55ac2bc..36b050670b8 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -602,9 +602,9 @@ @@ -29,5 +24,5 @@ index 4a372f8fd3f..5a964e70d1f 100644 "dlong\t%0,%1" [(set_attr "type" "fcvt") -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0042-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0042-fixing-the-long-long-long-mingw-toolchain-issue.patch similarity index 88% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0042-fixing-the-long-long-long-mingw-toolchain-issue.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0042-fixing-the-long-long-long-mingw-toolchain-issue.patch index f4013b9ea..cbafaafce 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0042-fixing-the-long-long-long-mingw-toolchain-issue.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0042-fixing-the-long-long-long-mingw-toolchain-issue.patch @@ -1,11 +1,7 @@ -From 9c37b9690ec2c6290095209c039725f235537379 Mon Sep 17 00:00:00 2001 +From b926d05a0cdd32d9821a48f62eef49c5b1025f73 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Thu, 29 Nov 2018 17:55:08 +0530 -Subject: [PATCH 42/53] fixing the long & long long mingw toolchain issue - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 42/54] fixing the long & long long mingw toolchain issue --- gcc/config/microblaze/constraints.md | 2 +- @@ -13,7 +9,7 @@ Signed-off-by: Mark Hatle 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md -index 0ced155340d..3f9805dfe0a 100644 +index 7bb1e0b4c8d..fa605831bfe 100644 --- a/gcc/config/microblaze/constraints.md +++ b/gcc/config/microblaze/constraints.md @@ -55,7 +55,7 @@ @@ -26,7 +22,7 @@ index 0ced155340d..3f9805dfe0a 100644 ;; Define floating point constraints diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 5a964e70d1f..f509bd5e665 100644 +index 36b050670b8..e123bf3a7d1 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -648,8 +648,8 @@ @@ -59,5 +55,5 @@ index 5a964e70d1f..f509bd5e665 100644 else return "addlik\t%0,r0,%1"; -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch similarity index 86% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch index 7f3c83737..af8c684f5 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch @@ -1,18 +1,14 @@ -From 0ed24f5a2e6e47f5d13896793ab2c6ea89e8c8e6 Mon Sep 17 00:00:00 2001 +From 854371934116e5197d627cebaf274f431205b914 Mon Sep 17 00:00:00 2001 From: Nagaraju Date: Thu, 14 Mar 2019 18:11:04 +0530 -Subject: [PATCH 43/53] Fix the MB-64 bug of handling QI objects - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 43/54] Fix the MB-64 bug of handling QI objects --- gcc/config/microblaze/microblaze.md | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index f509bd5e665..27436c0f660 100644 +index e123bf3a7d1..0f81b0ed58c 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -2345,11 +2345,11 @@ else @@ -47,5 +43,5 @@ index f509bd5e665..27436c0f660 100644 "TARGET_MB_64" { -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0044-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0044-We-will-check-the-possibility-of-peephole2-optimizat.patch similarity index 90% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0044-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0044-We-will-check-the-possibility-of-peephole2-optimizat.patch index 14eb812a5..277e5be2d 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0044-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0044-We-will-check-the-possibility-of-peephole2-optimizat.patch @@ -1,19 +1,15 @@ -From e8286e00f939486dde52e9475bc9cca0aa025a42 Mon Sep 17 00:00:00 2001 +From 5527cec8136440a1edea87b2bb6dafa8e78d07b0 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Fri, 29 Mar 2019 12:08:39 +0530 -Subject: [PATCH 44/53] [Patch,Microblaze] : We will check the possibility of - peephole2 optimization,if we can then we will fix the compiler issue. - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 44/54] We will check the possibility of peephole2 + optimization,if we can then we will fix the compiler issue. --- gcc/config/microblaze/microblaze.md | 63 +++++++++++++++++------------ 1 file changed, 38 insertions(+), 25 deletions(-) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 27436c0f660..4b9acddb1f1 100644 +index 0f81b0ed58c..f661ba1c241 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -882,31 +882,44 @@ @@ -87,5 +83,5 @@ index 27436c0f660..4b9acddb1f1 100644 ;;---------------------------------------------------------------- ;; Negation and one's complement -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0045-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0045-fixed-typos-in-mul-div-and-mod-assembly-files.patch similarity index 96% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0045-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0045-fixed-typos-in-mul-div-and-mod-assembly-files.patch index 54135b0f4..4760926fb 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0045-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0045-fixed-typos-in-mul-div-and-mod-assembly-files.patch @@ -1,12 +1,7 @@ -From 29c33e35373d7dc52e43162dce38a3ec0e350db3 Mon Sep 17 00:00:00 2001 +From 3c6f051ce41f06eab29932859be52ed864bef52f Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Wed, 17 Apr 2019 12:36:16 +0530 -Subject: [PATCH 45/53] [Patch,MicroBlaze]: fixed typos in mul,div and mod - assembly files. - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 45/54] fixed typos in mul,div and mod assembly files. --- libgcc/config/microblaze/divsi3.S | 47 ++++++++++++++++++++---- @@ -17,7 +12,7 @@ Signed-off-by: Mark Hatle 5 files changed, 212 insertions(+), 20 deletions(-) diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S -index b464deed481..ceeed6be1f4 100644 +index 9f04f59104e..e1dfccbf257 100644 --- a/libgcc/config/microblaze/divsi3.S +++ b/libgcc/config/microblaze/divsi3.S @@ -46,7 +46,7 @@ @@ -111,7 +106,7 @@ index b464deed481..ceeed6be1f4 100644 $LaDiv_By_Zero: $LaResult_Is_Zero: diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S -index 3ec17685e51..637b06c09a3 100644 +index f8684db721e..3bf9b10ec3e 100644 --- a/libgcc/config/microblaze/modsi3.S +++ b/libgcc/config/microblaze/modsi3.S @@ -62,40 +62,72 @@ __modsi3: @@ -200,7 +195,7 @@ index 3ec17685e51..637b06c09a3 100644 nop #else diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S -index 657668ef826..6be75dc95e8 100644 +index 437e2bc309e..bc9ff9cdc89 100644 --- a/libgcc/config/microblaze/mulsi3.S +++ b/libgcc/config/microblaze/mulsi3.S @@ -43,7 +43,37 @@ @@ -250,7 +245,7 @@ index 657668ef826..6be75dc95e8 100644 .end __mulsi3 .size __mulsi3, . - __mulsi3 diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S -index fc6a4b5a248..f8ce88bd8b7 100644 +index 496dd6794bf..486bc8f0819 100644 --- a/libgcc/config/microblaze/udivsi3.S +++ b/libgcc/config/microblaze/udivsi3.S @@ -59,52 +59,96 @@ __udivsi3: @@ -364,7 +359,7 @@ index fc6a4b5a248..f8ce88bd8b7 100644 NOP #else diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S -index 03be6df1fc6..3be3658f7a2 100644 +index a706017c634..1d8e2921745 100644 --- a/libgcc/config/microblaze/umodsi3.S +++ b/libgcc/config/microblaze/umodsi3.S @@ -46,7 +46,7 @@ @@ -466,5 +461,5 @@ index 03be6df1fc6..3be3658f7a2 100644 $LaRETURN_HERE: # Restore values of CSRs and that of r3 and the divisor and the dividend -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0046-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0046-MB-64-removal-of-barrel-shift-instructions-from-defa.patch similarity index 96% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0046-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0046-MB-64-removal-of-barrel-shift-instructions-from-defa.patch index def103215..5f45d03f9 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0046-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0046-MB-64-removal-of-barrel-shift-instructions-from-defa.patch @@ -1,27 +1,22 @@ -From 39589348962a2e0453ad49118b6bc3dd8a7b1bb5 Mon Sep 17 00:00:00 2001 +From 0776495e85a15c1ad84fd90736059902bb3ea152 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 15:59:12 +0530 -Subject: [PATCH 46/53] [Patch, microblaze]: MB-64 removal of barrel-shift - instructions from default By default MB-64 is generatting - barrel-shift instructions. It has been removed from default. - Barrel-shift instructions will be generated only if barrel-shifter is - enabled. Similarly to double instructions as well. +Subject: [PATCH 46/54] MB-64 removal of barrel-shift instructions from default + By default MB-64 is generatting barrel-shift instructions. It has been + removed from default. Barrel-shift instructions will be generated only if + barrel-shifter is enabled. Similarly to double instructions as well. Signed-off-by :Nagaraju Mekala -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.cc | 2 +- gcc/config/microblaze/microblaze.md | 269 ++++++++++++++++++++++++++-- 2 files changed, 252 insertions(+), 19 deletions(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index 7a08390a027..3ee3996a38d 100644 +index 965a041ea8c..f949a8863d3 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -3871,7 +3871,7 @@ microblaze_expand_divide (rtx operands[]) +@@ -3880,7 +3880,7 @@ microblaze_expand_divide (rtx operands[]) emit_insn (gen_rtx_CLOBBER (Pmode, reg18)); if (TARGET_MB_64) { @@ -31,7 +26,7 @@ index 7a08390a027..3ee3996a38d 100644 } else { diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 4b9acddb1f1..3695e9e101d 100644 +index f661ba1c241..9bc9512db8e 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -547,7 +547,7 @@ @@ -477,5 +472,5 @@ index 4b9acddb1f1..3695e9e101d 100644 [(set_attr "type" "arith") (set_attr "mode" "DI") -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0047-Added-new-MB-64-single-register-arithmetic-instructi.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0047-Added-new-MB-64-single-register-arithmetic-instructi.patch similarity index 93% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0047-Added-new-MB-64-single-register-arithmetic-instructi.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0047-Added-new-MB-64-single-register-arithmetic-instructi.patch index 318abe7b0..0272fd3c2 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0047-Added-new-MB-64-single-register-arithmetic-instructi.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0047-Added-new-MB-64-single-register-arithmetic-instructi.patch @@ -1,18 +1,14 @@ -From e32334b0f8a4c9532975001ffab33e86469ea4e1 Mon Sep 17 00:00:00 2001 +From 003f60fa4eedddd15de6e9f633bffec1a887fe45 Mon Sep 17 00:00:00 2001 From: Nagaraju Date: Fri, 23 Aug 2019 16:16:53 +0530 -Subject: [PATCH 47/53] Added new MB-64 single register arithmetic instructions - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 47/54] Added new MB-64 single register arithmetic instructions --- gcc/config/microblaze/microblaze.md | 56 +++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 3695e9e101d..85c1ab45994 100644 +index 9bc9512db8e..9172f1bc209 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -654,6 +654,18 @@ @@ -107,5 +103,5 @@ index 3695e9e101d..85c1ab45994 100644 [(set (match_operand:DI 0 "register_operand" "=d,d") (xor:DI (match_operand:DI 1 "arith_operand" "%d,d") -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0048-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0048-Added-support-for-64-bit-Immediate-values.patch similarity index 83% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0048-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0048-Added-support-for-64-bit-Immediate-values.patch index 09514a7d4..0be495a86 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0048-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0048-Added-support-for-64-bit-Immediate-values.patch @@ -1,12 +1,7 @@ -From f5f262b196de197b7e9ece8cc08c8715f953857f Mon Sep 17 00:00:00 2001 +From 8d20c82d95e22a42551b446c087d9e06958a3580 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 26 Aug 2019 15:55:22 +0530 -Subject: [PATCH 48/53] [Patch,MicroBlaze] : Added support for 64 bit Immediate - values. - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 48/54] Added support for 64 bit Immediate values. --- gcc/config/microblaze/constraints.md | 4 ++-- @@ -14,7 +9,7 @@ Signed-off-by: Mark Hatle 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/gcc/config/microblaze/constraints.md b/gcc/config/microblaze/constraints.md -index 3f9805dfe0a..91653f36f52 100644 +index fa605831bfe..40cd88a870c 100644 --- a/gcc/config/microblaze/constraints.md +++ b/gcc/config/microblaze/constraints.md @@ -53,9 +53,9 @@ @@ -30,7 +25,7 @@ index 3f9805dfe0a..91653f36f52 100644 ;; Define floating point constraints diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 85c1ab45994..0ac6e1480e6 100644 +index 9172f1bc209..f41474feca6 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -1332,8 +1332,7 @@ @@ -44,5 +39,5 @@ index 85c1ab45994..0ac6e1480e6 100644 addlk\t%0,r0,r0\t addlik\t%0,r0,%1\t #N1 %X1 -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0049-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0049-Fix-Compiler-crash-with-freg-struct-return-This-patc.patch similarity index 78% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0049-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0049-Fix-Compiler-crash-with-freg-struct-return-This-patc.patch index 6258e799b..ca8137960 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0049-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0049-Fix-Compiler-crash-with-freg-struct-return-This-patc.patch @@ -1,26 +1,22 @@ -From d45405d05a1f9079f7db86ba60dcd30d358613d4 Mon Sep 17 00:00:00 2001 +From 8107e0be46e5bdbfc353648ce5129afde5275ea9 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 16:06:10 +0530 -Subject: [PATCH 49/53] [Patch, microblaze]: Fix Compiler crash with - -freg-struct-return This patch fixes a bug in MB GCC regarding the - passing struct values in registers. Currently we are only handling SImode - With this patch all other modes are handled properly +Subject: [PATCH 49/54] Fix Compiler crash with -freg-struct-return This patch + fixes a bug in MB GCC regarding the passing struct values in registers. + Currently we are only handling SImode With this patch all other modes are + handled properly Signed-off-by :Nagaraju Mekala -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze.cc | 11 ++++++++++- gcc/config/microblaze/microblaze.h | 19 ------------------- 2 files changed, 10 insertions(+), 20 deletions(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index 3ee3996a38d..4668a81d060 100644 +index f949a8863d3..4748c8c1f0d 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -3909,7 +3909,16 @@ microblaze_function_value (const_tree valtype, +@@ -3918,7 +3918,16 @@ microblaze_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED, bool outgoing ATTRIBUTE_UNUSED) { @@ -39,7 +35,7 @@ index 3ee3996a38d..4668a81d060 100644 /* Implement TARGET_SCHED_ADJUST_COST. */ diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index c48b6de0d58..730ad87b13b 100644 +index 4d6babfe9c4..eea360fda47 100644 --- a/gcc/config/microblaze/microblaze.h +++ b/gcc/config/microblaze/microblaze.h @@ -266,13 +266,6 @@ extern enum pipeline_type microblaze_pipe; @@ -76,5 +72,5 @@ index c48b6de0d58..730ad87b13b 100644 On the MicroBlaze, R2 R3 are the only register thus used. Currently, R2 are only implemented here (C has no complex type) */ -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0050-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0050-Add-TARGET_OPTION_OPTIMIZATION-and-disable-fivopts-b.patch similarity index 85% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0050-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0050-Add-TARGET_OPTION_OPTIMIZATION-and-disable-fivopts-b.patch index 8d99c93d9..3b8fad811 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0050-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0050-Add-TARGET_OPTION_OPTIMIZATION-and-disable-fivopts-b.patch @@ -1,16 +1,14 @@ -From a64afc59e82703f40d04d4d7126038811a195467 Mon Sep 17 00:00:00 2001 +From b7fb925d6277d11e4014aa1731fc58813e30761f Mon Sep 17 00:00:00 2001 From: Nagaraju Date: Wed, 8 May 2019 14:12:03 +0530 -Subject: [PATCH 50/53] [Patch, microblaze]: Add TARGET_OPTION_OPTIMIZATION and - disable fivopts by default +Subject: [PATCH 50/54] Add TARGET_OPTION_OPTIMIZATION and disable fivopts by + default Added TARGET_OPTION_OPTIMIZATIONS and Turn off ivopts by default. * gcc/common/config/microblaze/microblaze-common.c (microblaze_option_optimization_table): Disable fivopts by default. -Upstream-Status: Pending - Signed-off-by: Nagaraju Mekala Mahesh Bodapati Conflicts: @@ -23,7 +21,7 @@ Conflicts: 1 file changed, 13 insertions(+) diff --git a/gcc/common/config/microblaze/microblaze-common.cc b/gcc/common/config/microblaze/microblaze-common.cc -index 21b35f55b92..137332ded25 100644 +index 8750b022447..8a924e8a997 100644 --- a/gcc/common/config/microblaze/microblaze-common.cc +++ b/gcc/common/config/microblaze/microblaze-common.cc @@ -24,7 +24,20 @@ @@ -48,5 +46,5 @@ index 21b35f55b92..137332ded25 100644 + struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0051-Patch-microblaze-Reducing-Stack-space-for-arguments.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0051-Reducing-Stack-space-for-arguments.patch similarity index 93% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0051-Patch-microblaze-Reducing-Stack-space-for-arguments.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0051-Reducing-Stack-space-for-arguments.patch index 64069e3c3..648da43ad 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0051-Patch-microblaze-Reducing-Stack-space-for-arguments.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0051-Reducing-Stack-space-for-arguments.patch @@ -1,7 +1,7 @@ -From 09e10c513f8970f4d2402244b7ac69ecd33b4c04 Mon Sep 17 00:00:00 2001 +From a464c0e6070cac9b40b7fe760e25cbd484a615a7 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 16:35:00 +0530 -Subject: [PATCH 51/53] [Patch, microblaze]: Reducing Stack space for arguments +Subject: [PATCH 51/54] Reducing Stack space for arguments Currently in Microblaze target stack space for arguments in register is being allocated even if there are no arguments in the function. @@ -9,10 +9,6 @@ Subject: [PATCH 51/53] [Patch, microblaze]: Reducing Stack space for arguments Signed-off-by :Nagaraju Mekala :Ajit Agarwal -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - --- gcc/config/microblaze/microblaze-protos.h | 1 + gcc/config/microblaze/microblaze.cc | 130 ++++++++++++++++++++++ @@ -20,7 +16,7 @@ Signed-off-by: Mark Hatle 3 files changed, 133 insertions(+), 2 deletions(-) diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h -index 7f575c2adec..bd594699940 100644 +index 0e9f783c4a4..091d8d9a51b 100644 --- a/gcc/config/microblaze/microblaze-protos.h +++ b/gcc/config/microblaze/microblaze-protos.h @@ -60,6 +60,7 @@ extern int symbol_mentioned_p (rtx); @@ -32,10 +28,10 @@ index 7f575c2adec..bd594699940 100644 /* Declare functions in microblaze-c.cc. */ diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index 4668a81d060..24ac215b6d5 100644 +index 4748c8c1f0d..e6d3f35370c 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -2081,6 +2081,136 @@ microblaze_must_save_register (int regno) +@@ -2086,6 +2086,136 @@ microblaze_must_save_register (int regno) return 0; } @@ -173,7 +169,7 @@ index 4668a81d060..24ac215b6d5 100644 stack pointer. diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h -index 730ad87b13b..dfacd080b6d 100644 +index eea360fda47..f23805b1c03 100644 --- a/gcc/config/microblaze/microblaze.h +++ b/gcc/config/microblaze/microblaze.h @@ -447,9 +447,9 @@ extern struct microblaze_frame_info current_frame_info; @@ -189,5 +185,5 @@ index 730ad87b13b..dfacd080b6d 100644 #define STACK_BOUNDARY (TARGET_MB_64 ? 64 : 32) -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0052-Patch-MicroBlaze.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0052-If-we-use-break_handler-attribute-then-interrupt-vec.patch similarity index 69% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0052-Patch-MicroBlaze.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0052-If-we-use-break_handler-attribute-then-interrupt-vec.patch index 63feff799..d0474dd95 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0052-Patch-MicroBlaze.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0052-If-we-use-break_handler-attribute-then-interrupt-vec.patch @@ -1,26 +1,21 @@ -From fe2781d189493dc82a3714b48bbc12c6bd5cdfd0 Mon Sep 17 00:00:00 2001 +From b792943436857172e7a39e26a00602c7e6620860 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 16:38:43 +0530 -Subject: [PATCH 52/53] [Patch,MicroBlaze] : If we use break_handler - attribute then interrupt vector call happened to break_handler instead of - interrupt_handler. this fix will resolve the issue CR-1081780. This - fix will not change the behavior of compiler unless there is a usage of - break_handler attribute. signed-off-by : Mahesh Bodapati - - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle +Subject: [PATCH 52/54] If we use break_handler attribute then interrupt vector + call happened to break_handler instead of interrupt_handler. this fix will + resolve the issue CR-1081780. This fix will not change the behavior of + compiler unless there is a usage of break_handler attribute. signed-off-by : + Mahesh Bodapati --- gcc/config/microblaze/microblaze.cc | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/gcc/config/microblaze/microblaze.cc b/gcc/config/microblaze/microblaze.cc -index 24ac215b6d5..66d62f6f909 100644 +index e6d3f35370c..58d091fbed2 100644 --- a/gcc/config/microblaze/microblaze.cc +++ b/gcc/config/microblaze/microblaze.cc -@@ -2020,7 +2020,7 @@ microblaze_save_volatiles (tree func) +@@ -2025,7 +2025,7 @@ microblaze_save_volatiles (tree func) int microblaze_is_interrupt_variant (void) { @@ -29,7 +24,7 @@ index 24ac215b6d5..66d62f6f909 100644 } int microblaze_is_break_handler (void) -@@ -2059,7 +2059,7 @@ microblaze_must_save_register (int regno) +@@ -2064,7 +2064,7 @@ microblaze_must_save_register (int regno) { if (df_regs_ever_live_p (regno) || regno == MB_ABI_MSR_SAVE_REG @@ -38,7 +33,7 @@ index 24ac215b6d5..66d62f6f909 100644 && (regno == MB_ABI_ASM_TEMP_REGNUM || regno == MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM))) return 1; -@@ -2275,9 +2275,6 @@ compute_frame_size (HOST_WIDE_INT size) +@@ -2280,9 +2280,6 @@ compute_frame_size (HOST_WIDE_INT size) fast_interrupt = microblaze_fast_interrupt_function_p (current_function_decl); save_volatiles = microblaze_save_volatiles (current_function_decl); @@ -48,7 +43,7 @@ index 24ac215b6d5..66d62f6f909 100644 gp_reg_size = 0; mask = 0; var_size = size; -@@ -3237,7 +3234,7 @@ microblaze_expand_prologue (void) +@@ -3242,7 +3239,7 @@ microblaze_expand_prologue (void) gen_rtx_PLUS (Pmode, stack_pointer_rtx, const0_rtx)); @@ -57,7 +52,7 @@ index 24ac215b6d5..66d62f6f909 100644 /* Do not optimize in flow analysis. */ MEM_VOLATILE_P (mem_rtx) = 1; -@@ -3348,12 +3345,12 @@ microblaze_expand_epilogue (void) +@@ -3353,12 +3350,12 @@ microblaze_expand_epilogue (void) a load-use stall cycle :) This is also important to handle alloca. (See comments for if (frame_pointer_needed) below. */ @@ -73,5 +68,5 @@ index 24ac215b6d5..66d62f6f909 100644 MEM_VOLATILE_P (mem_rtx) = 1; reg_rtx = gen_rtx_REG (Pmode, MB_ABI_SUB_RETURN_ADDR_REGNUM); -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/0053-patch-microblaze64-Add-Zero_extended-instructions.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0053-Add-Zero_extended-instructions.patch similarity index 88% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/0053-patch-microblaze64-Add-Zero_extended-instructions.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/0053-Add-Zero_extended-instructions.patch index 1552a5e99..52017a9d3 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/0053-patch-microblaze64-Add-Zero_extended-instructions.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0053-Add-Zero_extended-instructions.patch @@ -1,7 +1,7 @@ -From 6c2e67237a12cecfd8c0575fd17314d3024943fc Mon Sep 17 00:00:00 2001 +From fbf853f0b9571529dcc72fc53adf4a35abd3e050 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 13 Sep 2022 16:45:41 +0530 -Subject: [PATCH 53/53] [patch, microblaze64]: Add Zero_extended instructions +Subject: [PATCH 53/54] Add Zero_extended instructions Due to latest changes in GCC-10.2 MB64 perforamance has reduced We have added zero_extended instructions to get rid of left shift @@ -9,8 +9,6 @@ Subject: [PATCH 53/53] [patch, microblaze64]: Add Zero_extended instructions [CR/TSR]: TSR-974519 -Upstream-Status: Pending - Signed-off-by: Nagaraju Mekala Mahesh Bodapati --- @@ -18,7 +16,7 @@ Upstream-Status: Pending 1 file changed, 27 insertions(+) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md -index 0ac6e1480e6..7a7c70d607b 100644 +index f41474feca6..aff98604db7 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -1191,6 +1191,33 @@ @@ -56,5 +54,5 @@ index 0ac6e1480e6..7a7c70d607b 100644 ;; Sign extension ;;---------------------------------------------------------------- -- -2.37.1 (Apple Git-137.1) +2.34.1 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-13/0054-Fix-failure-with-gcc.c-torture-execute-ashrdi-1.c-Os.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0054-Fix-failure-with-gcc.c-torture-execute-ashrdi-1.c-Os.patch new file mode 100644 index 000000000..ec8bc0cfe --- /dev/null +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0054-Fix-failure-with-gcc.c-torture-execute-ashrdi-1.c-Os.patch @@ -0,0 +1,42 @@ +From 79d007fea870a3b8d72faa90238cee2cdfaf5c85 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Fri, 28 Jun 2024 12:18:38 +0530 +Subject: [PATCH 54/54] Fix failure with gcc.c-torture/execute/ashrdi-1.c -Os + execution test + +The following tests fail with -Os option because a shift instruction +in a branch delay slot gets replaced with multiple instructions when +the processor has no barrel shifter. This fix addresses the problem +by marking the responsible instruction pattern as type multi preventing +it from being placed in a delay slot. + +> gcc.c-torture/execute/ashrdi-1.c -Os execution test +> gcc.c-torture/execute/pr40057.c -Os execution test +> gcc.c-torture/execute/pr79121.c -Os execution test +> gcc.c-torture/execute/pr82524.c -Os execution test +> c-c++-common/torture/vector-compare-1.c -Os execution test +> gcc.dg/torture/vec-cvt-1.c -Os execution test + +These tests pass with this fix. + +Signed-off-by: Gopi Kumar Bulusu +--- + gcc/config/microblaze/microblaze.md | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md +index aff98604db7..0e3981390c8 100644 +--- a/gcc/config/microblaze/microblaze.md ++++ b/gcc/config/microblaze/microblaze.md +@@ -2286,7 +2286,7 @@ else + output_asm_insn ("bneid\t%3,.-4", operands); + return "sra\t%0,%0"; + } +- [(set_attr "type" "arith") ++ [(set_attr "type" "multi") + (set_attr "mode" "SI") + (set_attr "length" "20")] + ) +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-12/microblaze-mulitlib-hack.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/microblaze-mulitlib-hack.patch similarity index 98% rename from meta-microblaze/recipes-devtools/gcc/gcc-12/microblaze-mulitlib-hack.patch rename to meta-microblaze/recipes-devtools/gcc/gcc-13/microblaze-mulitlib-hack.patch index 56d8c223e..af8ebf3be 100644 --- a/meta-microblaze/recipes-devtools/gcc/gcc-12/microblaze-mulitlib-hack.patch +++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/microblaze-mulitlib-hack.patch @@ -27,7 +27,7 @@ Do same for riscv64 and aarch64 RP 15/8/11 -Upstream-Status: Inappropriate [OE-Specific] +Upstream-Status: Inappropriate[OE-Specific] Signed-off-by: Khem Raj Signed-off-by: Elvis Dowson diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-common.inc b/meta-microblaze/recipes-devtools/gcc/gcc-common.inc deleted file mode 100644 index 5ac82b1b5..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-common.inc +++ /dev/null @@ -1,118 +0,0 @@ -SUMMARY = "GNU cc and gcc C compilers" -HOMEPAGE = "http://www.gnu.org/software/gcc/" -DESCRIPTION = "The GNU Compiler Collection includes front ends for C, C++, Objective-C, Fortran, Ada, Go, and D, as well as libraries for these languages (libstdc++,...). GCC was originally written as the compiler for the GNU operating system." -SECTION = "devel" -LICENSE = "GPL" - -NATIVEDEPS = "" - -CVE_PRODUCT = "gcc" - -inherit autotools gettext texinfo - -BPN = "gcc" -COMPILERDEP = "virtual/${TARGET_PREFIX}gcc:do_gcc_stash_builddir" - -python extract_stashed_builddir () { - src = d.expand("${COMPONENTS_DIR}/${BUILD_ARCH}/gcc-stashed-builddir-${TARGET_SYS}") - dest = d.getVar("B") - oe.path.copyhardlinktree(src, dest) - staging_processfixme([src + "/fixmepath"], dest, d.getVar("RECIPE_SYSROOT"), d.getVar("RECIPE_SYSROOT_NATIVE"), d) -} - -def get_gcc_float_setting(bb, d): - if d.getVar('ARMPKGSFX_EABI') == "hf" and d.getVar('TRANSLATED_TARGET_ARCH') == "arm": - return "--with-float=hard" - if d.getVar('TARGET_FPU') in [ 'soft' ]: - return "--with-float=soft" - if d.getVar('TARGET_FPU') in [ 'ppc-efd' ]: - return "--enable-e500_double" - return "" - -get_gcc_float_setting[vardepvalue] = "${@get_gcc_float_setting(bb, d)}" - -def get_gcc_x86_64_arch_setting(bb, d): - import re - march = re.match(r'^.*-march=([^\s]*)', d.getVar('TUNE_CCARGS')) - if march: - return "--with-arch=%s " % march.group(1) - # The earliest supported x86-64 CPU - return "--with-arch=core2" - -get_gcc_x86_64_arch_setting[vardepvalue] = "${@get_gcc_x86_64_arch_setting(bb, d)}" - -def get_gcc_mips_plt_setting(bb, d): - if d.getVar('TRANSLATED_TARGET_ARCH') in [ 'mips', 'mipsel' ] and bb.utils.contains('DISTRO_FEATURES', 'mplt', True, False, d): - return "--with-mips-plt" - return "" - -def get_gcc_ppc_plt_settings(bb, d): - if d.getVar('TRANSLATED_TARGET_ARCH') in [ 'powerpc', 'powerpc64' ] and not bb.utils.contains('DISTRO_FEATURES', 'bssplt', True, False, d): - return "--enable-secureplt" - return "" - -def get_gcc_multiarch_setting(bb, d): - target_arch = d.getVar('TRANSLATED_TARGET_ARCH') - multiarch_options = { - "i586": "--enable-targets=all", - "i686": "--enable-targets=all", - "powerpc": "--enable-targets=powerpc64", - "powerpc64le": "--enable-targets=powerpcle", - "mips": "--enable-targets=all", - "sparc": "--enable-targets=all", - } - - if bb.utils.contains('DISTRO_FEATURES', 'multiarch', True, False, d): - if target_arch in multiarch_options : - return multiarch_options[target_arch] - return "" - -# this is used by the multilib setup of gcc -def get_tune_parameters(tune, d): - availtunes = d.getVar('AVAILTUNES') - if tune not in availtunes.split(): - bb.error('The tune: %s is not one of the available tunes: %s' % (tune or None, availtunes)) - - localdata = bb.data.createCopy(d) - override = ':tune-' + tune - localdata.setVar('OVERRIDES', localdata.getVar('OVERRIDES', False) + override) - - retdict = {} - retdict['tune'] = tune - retdict['ccargs'] = localdata.getVar('TUNE_CCARGS') - retdict['features'] = localdata.getVar('TUNE_FEATURES') - # BASELIB is used by the multilib code to change library paths - retdict['baselib'] = localdata.getVar('BASE_LIB') or localdata.getVar('BASELIB') - retdict['arch'] = localdata.getVar('TUNE_ARCH') - retdict['abiextension'] = localdata.getVar('ABIEXTENSION') - retdict['target_fpu'] = localdata.getVar('TARGET_FPU') - retdict['pkgarch'] = localdata.getVar('TUNE_PKGARCH') - retdict['package_extra_archs'] = localdata.getVar('PACKAGE_EXTRA_ARCHS') - return retdict - -get_tune_parameters[vardepsexclude] = "AVAILTUNES TUNE_CCARGS OVERRIDES TUNE_FEATURES BASE_LIB BASELIB TUNE_ARCH ABIEXTENSION TARGET_FPU TUNE_PKGARCH PACKAGE_EXTRA_ARCHS" - -DEBIANNAME:${MLPREFIX}libgcc = "libgcc1" - -MIRRORS =+ "\ - ${GNU_MIRROR}/gcc https://gcc.gnu.org/pub/gcc/releases/ \ -" -# -# Set some default values -# -gcclibdir = "${libdir}/gcc" -BINV = "${PV}" -#S = "${WORKDIR}/gcc-${PV}" -S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/gcc-${PV}" - -B ?= "${WORKDIR}/gcc-${PV}/build.${HOST_SYS}.${TARGET_SYS}" - -target_includedir ?= "${includedir}" -target_libdir ?= "${libdir}" -target_base_libdir ?= "${base_libdir}" -target_prefix ?= "${prefix}" - -# We need to ensure that for the shared work directory, the do_patch signatures match -# The real WORKDIR location isn't a dependency for the shared workdir. -src_patches[vardepsexclude] = "WORKDIR" -should_apply[vardepsexclude] += "PN" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-configure-common.inc b/meta-microblaze/recipes-devtools/gcc/gcc-configure-common.inc deleted file mode 100644 index e4cdb73f0..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-configure-common.inc +++ /dev/null @@ -1,123 +0,0 @@ -require gcc-multilib-config.inc -require gcc-shared-source.inc -# -# Build the list of lanaguages to build. -# -# These can be overridden by the version specific .inc file. - -# gcc 3.x expects 'f77', 4.0 expects 'f95', 4.1 and 4.2 expect 'fortran' -FORTRAN ?= ",f77" -LANGUAGES ?= "c,c++${FORTRAN}" - -EXTRA_OECONF_BASE ?= "" -EXTRA_OECONF_PATHS ?= "" - -GCCMULTILIB ?= "--disable-multilib" -GCCTHREADS ?= "posix" - -GCCPIE ??= "" - -SYMVERS_CONF ?= "--enable-symvers=gnu" - -EXTRA_OECONF = "\ - ${@['--enable-clocale=generic', ''][d.getVar('USE_NLS') != 'no']} \ - --with-gnu-ld \ - --enable-shared \ - --enable-languages=${LANGUAGES} \ - --enable-threads=${GCCTHREADS} \ - ${GCCMULTILIB} \ - ${GCCPIE} \ - --enable-c99 \ - --enable-long-long \ - ${SYMVERS_CONF} \ - --enable-libstdcxx-pch \ - --program-prefix=${TARGET_PREFIX} \ - --without-local-prefix \ - --disable-install-libiberty \ - ${EXTRA_OECONF_BASE} \ - ${EXTRA_OECONF_GCC_FLOAT} \ - ${EXTRA_OECONF_PATHS} \ - ${@get_gcc_mips_plt_setting(bb, d)} \ - ${@get_gcc_ppc_plt_settings(bb, d)} \ - ${@get_gcc_multiarch_setting(bb, d)} \ - --enable-standard-branch-protection \ -" - -# glibc version is a minimum controlling whether features are enabled. -# Doesn't need to track glibc exactly -EXTRA_OECONF:append:libc-glibc = " --with-glibc-version=2.28 " - -# Set this here since GCC configure won't auto-detect and enable -# initfini-arry when cross compiling. -EXTRA_OECONF:append = " --enable-initfini-array" - -export gcc_cv_collect2_libs = 'none required' -# We need to set gcc_cv_collect2_libs else there is cross-compilation badness -# in the config.log files (which might not get generated until do_compile -# hence being missed by the insane do_configure check). - -EXTRA_OECONF:append:linux = " --enable-__cxa_atexit" - -EXTRA_OECONF:append:mips64 = " --with-abi=64 --with-arch-64=mips64 --with-tune-64=mips64" -EXTRA_OECONF:append:mips64el = " --with-abi=64 --with-arch-64=mips64 --with-tune-64=mips64" -EXTRA_OECONF:append:mips64n32 = " --with-abi=64 --with-arch-64=mips64 --with-tune-64=mips64" -EXTRA_OECONF:append:mips64eln32 = " --with-abi=64 --with-arch-64=mips64 --with-tune-64=mips64" -EXTRA_OECONF:append:mipsisa32r6el = " --with-abi=32 --with-arch=mips32r6" -EXTRA_OECONF:append:mipsisa32r6 = " --with-abi=32 --with-arch=mips32r6" -EXTRA_OECONF:append:mipsisa64r6el = " --with-abi=64 --with-arch-64=mips64r6" -EXTRA_OECONF:append:mipsisa64r6 = " --with-abi=64 --with-arch-64=mips64r6" - -EXTRA_OECONF_GCC_FLOAT ??= "" -CPPFLAGS = "" - -SYSTEMHEADERS = "${target_includedir}" -SYSTEMLIBS = "${target_base_libdir}/" -SYSTEMLIBS1 = "${target_libdir}/" - -do_configure:prepend () { - # teach gcc to find correct target includedir when checking libc ssp support - mkdir -p ${B}/gcc - echo "NATIVE_SYSTEM_HEADER_DIR = ${SYSTEMHEADERS}" > ${B}/gcc/t-oe - cat ${S}/gcc/defaults.h | grep -v "\#endif.*GCC_DEFAULTS_H" > ${B}/gcc/defaults.h.new - cat >>${B}/gcc/defaults.h.new <<_EOF -#define NATIVE_SYSTEM_HEADER_DIR "${SYSTEMHEADERS}" -#define STANDARD_STARTFILE_PREFIX_1 "${SYSTEMLIBS}" -#define STANDARD_STARTFILE_PREFIX_2 "${SYSTEMLIBS1}" -#define SYSTEMLIBS_DIR "${SYSTEMLIBS}" -#endif /* ! GCC_DEFAULTS_H */ -_EOF - mv ${B}/gcc/defaults.h.new ${B}/gcc/defaults.h -} - -do_configure () { - # Setup these vars for cross building only - # ... because foo_FOR_TARGET apparently gets misinterpreted inside the - # gcc build stuff when the build is producing a cross compiler - i.e. - # when the 'current' target is the 'host' system, and the host is not - # the target (because the build is actually making a cross compiler!) - if [ "${BUILD_SYS}" != "${HOST_SYS}" ]; then - export CC_FOR_TARGET="${CC}" - export GCC_FOR_TARGET="${CC}" - export CXX_FOR_TARGET="${CXX}" - export AS_FOR_TARGET="${HOST_PREFIX}as" - export LD_FOR_TARGET="${HOST_PREFIX}ld" - export NM_FOR_TARGET="${HOST_PREFIX}nm" - export AR_FOR_TARGET="${HOST_PREFIX}ar" - export GFORTRAN_FOR_TARGET="gfortran" - export RANLIB_FOR_TARGET="${HOST_PREFIX}ranlib" - fi - export CC_FOR_BUILD="${BUILD_CC}" - export CXX_FOR_BUILD="${BUILD_CXX}" - export CFLAGS_FOR_BUILD="${BUILD_CFLAGS}" - export CPPFLAGS_FOR_BUILD="${BUILD_CPPFLAGS}" - export CXXFLAGS_FOR_BUILD="${BUILD_CXXFLAGS}" - export LDFLAGS_FOR_BUILD="${BUILD_LDFLAGS}" - export CFLAGS_FOR_TARGET="${TARGET_CFLAGS}" - export CPPFLAGS_FOR_TARGET="${TARGET_CPPFLAGS}" - export CXXFLAGS_FOR_TARGET="${TARGET_CXXFLAGS}" - export LDFLAGS_FOR_TARGET="${TARGET_LDFLAGS}" - - - oe_runconf -} - diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-cross-canadian.inc b/meta-microblaze/recipes-devtools/gcc/gcc-cross-canadian.inc deleted file mode 100644 index ec87b4621..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-cross-canadian.inc +++ /dev/null @@ -1,187 +0,0 @@ -inherit cross-canadian - -SUMMARY = "GNU cc and gcc C compilers (cross-canadian for ${TARGET_ARCH} target)" -PN = "gcc-cross-canadian-${TRANSLATED_TARGET_ARCH}" - -DEPENDS = "virtual/${TARGET_PREFIX}gcc virtual/${HOST_PREFIX}gcc virtual/${HOST_PREFIX}binutils virtual/nativesdk-libc nativesdk-gettext flex-native virtual/libc" - -GCCMULTILIB = "--enable-multilib" - -require gcc-configure-common.inc - -EXTRA_OECONF += "--with-plugin-ld=ld" -EXTRA_OECONF_PATHS = "\ - --with-gxx-include-dir=/not/exist${target_includedir}/c++/${BINV} \ - --with-build-time-tools=${STAGING_DIR_NATIVE}${prefix_native}/${TARGET_SYS}/bin \ - --with-sysroot=/not/exist \ - --with-build-sysroot=${STAGING_DIR_TARGET} \ -" -# We have to point gcc at a sysroot but we don't need to rebuild if this changes -# e.g. we switch between different machines with different tunes. -EXTRA_OECONF_PATHS[vardepsexclude] = "TUNE_PKGARCH" -TARGET_ARCH[vardepsexclude] = "TUNE_ARCH" -get_gcc_float_setting[vardepvalue] = "" - -# -# gcc-cross looks and finds these in ${exec_prefix} but we're not so lucky -# for the sdk. Hardcoding the paths ensures the build doesn't go canadian or worse. -# -export AR_FOR_TARGET = "${TARGET_PREFIX}ar" -export AS_FOR_TARGET = "${TARGET_PREFIX}as" -export DLLTOOL_FOR_TARGET = "${TARGET_PREFIX}dlltool" -export CC_FOR_TARGET = "${TARGET_PREFIX}gcc" -export CXX_FOR_TARGET = "${TARGET_PREFIX}g++" -export GCC_FOR_TARGET = "${TARGET_PREFIX}gcc" -export LD_FOR_TARGET = "${TARGET_PREFIX}ld" -export LIPO_FOR_TARGET = "${TARGET_PREFIX}lipo" -export NM_FOR_TARGET = "${TARGET_PREFIX}nm" -export OBJDUMP_FOR_TARGET = "${TARGET_PREFIX}objdump" -export RANLIB_FOR_TARGET = "${TARGET_PREFIX}ranlib" -export STRIP_FOR_TARGET = "${TARGET_PREFIX}strip" -export WINDRES_FOR_TARGET = "${TARGET_PREFIX}windres" - -# -# We need to override this and make sure the compiler can find staging -# -export ARCH_FLAGS_FOR_TARGET = "--sysroot=${STAGING_DIR_TARGET}" - -do_configure () { - if [ ! -d ${RECIPE_SYSROOT}/${target_includedir} ]; then - mkdir -p ${RECIPE_SYSROOT}/${target_includedir} - fi - export CC_FOR_BUILD="${BUILD_CC}" - export CXX_FOR_BUILD="${BUILD_CXX}" - export CFLAGS_FOR_BUILD="${BUILD_CFLAGS}" - export CPPFLAGS_FOR_BUILD="${BUILD_CPPFLAGS}" - export CXXFLAGS_FOR_BUILD="${BUILD_CXXFLAGS}" - export LDFLAGS_FOR_BUILD="${BUILD_LDFLAGS}" - export CFLAGS_FOR_TARGET="${TARGET_CFLAGS}" - export CPPFLAGS_FOR_TARGET="${TARGET_CPPFLAGS}" - export CXXFLAGS_FOR_TARGET="${TARGET_CXXFLAGS}" - export LDFLAGS_FOR_TARGET="${TARGET_LDFLAGS}" - oe_runconf -} - -do_compile () { - oe_runmake all-host configure-target-libgcc - (cd ${B}/${TARGET_SYS}/libgcc; oe_runmake enable-execute-stack.c unwind.h md-unwind-support.h sfp-machine.h gthr-default.h) -} - -PACKAGES = "${PN}-dbg ${PN} ${PN}-doc" - -FILES:${PN} = "\ - ${exec_prefix}/bin/* \ - ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/* \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/*.o \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/specs \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/lib* \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/include \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/include-fixed \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/plugin/include/ \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/plugin/gtype.* \ - ${libdir}/bfd-plugins/*.so \ - ${includedir}/c++/${BINV} \ - ${prefix}/${TARGET_SYS}/bin/* \ - ${prefix}/${TARGET_SYS}/lib/* \ - ${prefix}/${TARGET_SYS}${target_includedir}/* \ -" -INSANE_SKIP:${PN} += "dev-so" - -FILES:${PN}-doc = "\ - ${infodir} \ - ${mandir} \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/include/README \ -" - -EXEEXT = "" - -# Compute how to get from libexecdir to bindir in python (easier than shell) -BINRELPATH = "${@os.path.relpath(d.expand("${bindir}"), d.expand("${libexecdir}/gcc/${TARGET_SYS}/${BINV}"))}" -# linker plugin path -LIBRELPATH = "${@os.path.relpath(d.expand("${libexecdir}/gcc/${TARGET_SYS}/${BINV}"), d.expand("${libdir}/bfd-plugins"))}" - -do_install () { - ( cd ${B}/${TARGET_SYS}/libgcc; oe_runmake 'DESTDIR=${D}' install-unwind_h-forbuild install-unwind_h ) - oe_runmake 'DESTDIR=${D}' install-host - - # Cleanup some of the ${libdir}{,exec}/gcc stuff ... - rm -r ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/install-tools - rm -r ${D}${libexecdir}/gcc/${TARGET_SYS}/${BINV}/install-tools - rm -rf ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/finclude - - # We care about g++ not c++ - rm -f ${D}${bindir}/*c++ - - # We don't care about the gcc- copies - rm -f ${D}${bindir}/*gcc-${BINV}* - - # Cleanup empty directories which are not shipped - # we use rmdir instead of 'rm -f' to ensure the non empty directories are not deleted - # ${D}${libdir}/../lib only seems to appear with SDKMACHINE=i686 - local empty_dirs="${D}${libdir}/../lib ${D}${prefix}/${TARGET_SYS}/lib ${D}${prefix}/${TARGET_SYS} ${D}${includedir}" - for i in $empty_dirs; do - [ -d $i ] && rmdir --ignore-fail-on-non-empty $i - done - - # Insert symlinks into libexec so when tools without a prefix are searched for, the correct ones are - # found. - dest=${D}${libexecdir}/gcc/${TARGET_SYS}/${BINV}/ - install -d $dest - suffix=${EXEEXT} - for t in ar as ld ld.bfd ld.gold nm objcopy objdump ranlib strip g77 gcc cpp gfortran; do - if [ "$t" = "g77" -o "$t" = "gfortran" ] && [ ! -e ${D}${bindir}/${TARGET_PREFIX}$t$suffix ]; then - continue - fi - - ln -sf ${BINRELPATH}/${TARGET_PREFIX}$t$suffix $dest$t$suffix - done - - # libquadmath headers need to be available in the gcc libexec dir - install -d ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include/ - cp ${S}/libquadmath/quadmath.h ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include/ - cp ${S}/libquadmath/quadmath_weak.h ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include/ - - # install LTO linker plugins where binutils tools can find it - install -d ${D}${libdir}/bfd-plugins - ln -sf ${LIBRELPATH}/liblto_plugin.so ${D}${libdir}/bfd-plugins/liblto_plugin.so - - chown -R root:root ${D} - - cross_canadian_bindirlinks - - for i in linux ${CANADIANEXTRAOS} - do - for v in ${CANADIANEXTRAVENDOR} - do - d=${D}${bindir}/../${TARGET_ARCH}$v-$i - install -d $d - for j in ${TARGET_PREFIX}gcc${EXEEXT} ${TARGET_PREFIX}g++${EXEEXT} - do - p=${TARGET_ARCH}$v-$i-`echo $j | sed -e s,${TARGET_PREFIX},,` - case $i in - *musl*) - rm -rf $d/$p - echo "#!/usr/bin/env sh" > $d/$p - echo "exec \`dirname \$0\`/../${TARGET_SYS}/$j -mmusl \$@" >> $d/$p - chmod 0755 $d/$p - ;; - *) - ;; - esac - done - done - done -} - -ELFUTILS = "nativesdk-elfutils" -DEPENDS += "nativesdk-gmp nativesdk-mpfr nativesdk-libmpc ${ELFUTILS} nativesdk-zlib nativesdk-zstd" -RDEPENDS:${PN} += "nativesdk-mpfr nativesdk-libmpc ${ELFUTILS}" - -SYSTEMHEADERS = "${target_includedir}/" -SYSTEMLIBS = "${target_base_libdir}/" -SYSTEMLIBS1 = "${target_libdir}/" - -EXTRA_OECONF += "--enable-poison-system-directories" - -# gcc 4.7 needs -isystem -export ARCH_FLAGS_FOR_TARGET = "--sysroot=${STAGING_DIR_TARGET} -isystem=${target_includedir}" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-cross-canadian_12.2.bb b/meta-microblaze/recipes-devtools/gcc/gcc-cross-canadian_12.2.bb deleted file mode 100644 index bf53c5cd7..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-cross-canadian_12.2.bb +++ /dev/null @@ -1,5 +0,0 @@ -require recipes-devtools/gcc/gcc-${PV}.inc -require gcc-cross-canadian.inc - - - diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-cross-canadian_14.%.bbappend b/meta-microblaze/recipes-devtools/gcc/gcc-cross-canadian_14.%.bbappend deleted file mode 100644 index d1df20617..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-cross-canadian_14.%.bbappend +++ /dev/null @@ -1 +0,0 @@ -require microblaze-block.inc diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-cross.inc b/meta-microblaze/recipes-devtools/gcc/gcc-cross.inc deleted file mode 100644 index a540fb243..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-cross.inc +++ /dev/null @@ -1,163 +0,0 @@ -inherit cross - -INHIBIT_DEFAULT_DEPS = "1" -EXTRADEPENDS = "" -DEPENDS = "virtual/${TARGET_PREFIX}binutils ${EXTRADEPENDS} ${NATIVEDEPS}" -PROVIDES = "virtual/${TARGET_PREFIX}gcc virtual/${TARGET_PREFIX}g++" -python () { - if d.getVar("TARGET_OS").startswith("linux"): - d.setVar("EXTRADEPENDS", "linux-libc-headers") -} - -PN = "gcc-cross-${TARGET_ARCH}" - -# Ignore how TARGET_ARCH is computed. -TARGET_ARCH[vardepvalue] = "${TARGET_ARCH}" - -require gcc-configure-common.inc - -# While we want the 'gnu' hash style, we explicitly set it to sysv here to -# ensure that any recipe which doesn't obey our LDFLAGS (which also set it to -# gnu) will hit a QA failure. -LINKER_HASH_STYLE ?= "sysv" - -EXTRA_OECONF += "--enable-poison-system-directories=error" -EXTRA_OECONF:append:sh4 = " \ - --with-multilib-list= \ - --enable-incomplete-targets \ -" - -EXTRA_OECONF += "\ - --with-system-zlib \ -" - -EXTRA_OECONF:append:libc-baremetal = " --without-headers" -EXTRA_OECONF:remove:libc-baremetal = "--enable-threads=posix" -EXTRA_OECONF:remove:libc-newlib = "--enable-threads=posix" - -EXTRA_OECONF_PATHS = "\ - --with-gxx-include-dir=/not/exist${target_includedir}/c++/${BINV} \ - --with-sysroot=/not/exist \ - --with-build-sysroot=${STAGING_DIR_TARGET} \ -" - -ARCH_FLAGS_FOR_TARGET += "-isystem${STAGING_DIR_TARGET}${target_includedir}" - - -do_configure:prepend () { - install -d ${RECIPE_SYSROOT}${target_includedir} - touch ${RECIPE_SYSROOT}${target_includedir}/limits.h -} - -do_compile () { - export CC="${BUILD_CC}" - export AR_FOR_TARGET="${TARGET_SYS}-ar" - export RANLIB_FOR_TARGET="${TARGET_SYS}-ranlib" - export LD_FOR_TARGET="${TARGET_SYS}-ld" - export NM_FOR_TARGET="${TARGET_SYS}-nm" - export CC_FOR_TARGET="${CCACHE} ${TARGET_SYS}-gcc" - export CFLAGS_FOR_TARGET="${TARGET_CFLAGS}" - export CPPFLAGS_FOR_TARGET="${TARGET_CPPFLAGS}" - export CXXFLAGS_FOR_TARGET="${TARGET_CXXFLAGS}" - export LDFLAGS_FOR_TARGET="${TARGET_LDFLAGS}" - - # Prevent native/host sysroot path from being used in configargs.h header, - # as it will be rewritten when used by other sysroots preventing support - # for gcc plugins - oe_runmake configure-gcc - sed -i 's@${STAGING_DIR_TARGET}@/host@g' ${B}/gcc/configargs.h - sed -i 's@${STAGING_DIR_HOST}@/host@g' ${B}/gcc/configargs.h - - # Prevent sysroot/workdir paths from being used in checksum-options. - # checksum-options is used to generate a checksum which is embedded into - # the output binary. - oe_runmake TARGET-gcc=checksum-options all-gcc - sed -i 's@${DEBUG_PREFIX_MAP}@@g' ${B}/gcc/checksum-options - sed -i 's@${STAGING_DIR_HOST}@/host@g' ${B}/gcc/checksum-options - - oe_runmake all-host configure-target-libgcc - (cd ${B}/${TARGET_SYS}/libgcc; oe_runmake enable-execute-stack.c unwind.h md-unwind-support.h sfp-machine.h gthr-default.h) -} - -INHIBIT_PACKAGE_STRIP = "1" - -# Compute how to get from libexecdir to bindir in python (easier than shell) -BINRELPATH = "${@os.path.relpath(d.expand("${STAGING_DIR_NATIVE}${prefix_native}/bin/${TARGET_SYS}"), d.expand("${libexecdir}/gcc/${TARGET_SYS}/${BINV}"))}" -# linker plugin path -LIBRELPATH = "${@os.path.relpath(d.expand("${libexecdir}/gcc/${TARGET_SYS}/${BINV}"), d.expand("${STAGING_LIBDIR_NATIVE}/${TARGET_SYS}/bfd-plugins"))}" - -do_install () { - ( cd ${B}/${TARGET_SYS}/libgcc; oe_runmake 'DESTDIR=${D}' install-unwind_h-forbuild install-unwind_h ) - oe_runmake 'DESTDIR=${D}' install-host - - install -d ${D}${target_base_libdir} - install -d ${D}${target_libdir} - - # Link gfortran to g77 to satisfy not-so-smart configure or hard coded g77 - # gfortran is fully backwards compatible. This is a safe and practical solution. - if [ -n "${@d.getVar('FORTRAN')}" ]; then - ln -sf ${STAGING_DIR_NATIVE}${prefix_native}/bin/${TARGET_PREFIX}gfortran ${STAGING_DIR_NATIVE}${prefix_native}/bin/${TARGET_PREFIX}g77 || true - fortsymlinks="g77 gfortran" - fi - - # Insert symlinks into libexec so when tools without a prefix are searched for, the correct ones are - # found. These need to be relative paths so they work in different locations. - dest=${D}${libexecdir}/gcc/${TARGET_SYS}/${BINV}/ - install -d $dest - for t in ar as ld ld.bfd ld.gold nm objcopy objdump ranlib strip gcc cpp $fortsymlinks; do - ln -sf ${BINRELPATH}/${TARGET_PREFIX}$t $dest$t - ln -sf ${BINRELPATH}/${TARGET_PREFIX}$t ${dest}${TARGET_PREFIX}$t - done - - # Remove things we don't need but keep share/java - for d in info man share/doc share/locale share/man share/info; do - rm -rf ${D}${STAGING_DIR_NATIVE}${prefix_native}/$d - done - - # libquadmath headers need to be available in the gcc libexec dir - install -d ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include/ - cp ${S}/libquadmath/quadmath.h ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include/ - cp ${S}/libquadmath/quadmath_weak.h ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include/ - - find ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include-fixed -type f -not -name "README" -not -name limits.h -not -name syslimits.h | xargs rm -f - - # install LTO linker plugins where binutils tools can find it - install -d ${D}${libdir}/bfd-plugins - ln -sf ${LIBRELPATH}/liblto_plugin.so ${D}${libdir}/bfd-plugins/liblto_plugin.so -} - -do_package[noexec] = "1" -do_packagedata[noexec] = "1" -do_package_write_ipk[noexec] = "1" -do_package_write_rpm[noexec] = "1" -do_package_write_deb[noexec] = "1" - -inherit chrpath - -python gcc_stash_builddir_fixrpaths() { - # rewrite rpaths, breaking hardlinks as required - process_dir("/", d.getVar("BUILDDIRSTASH"), d, break_hardlinks = True) -} - -BUILDDIRSTASH = "${WORKDIR}/stashed-builddir/build" -do_gcc_stash_builddir[dirs] = "${B}" -do_gcc_stash_builddir[cleandirs] = "${BUILDDIRSTASH}" -do_gcc_stash_builddir[postfuncs] += "gcc_stash_builddir_fixrpaths" -do_gcc_stash_builddir () { - dest=${BUILDDIRSTASH} - hardlinkdir . $dest - # Makefile does move-if-change which can end up with 'timestamp' as file contents so break links to those files - rm $dest/gcc/include/*.h - cp gcc/include/*.h $dest/gcc/include/ - sysroot-relativelinks.py $dest -} -addtask do_gcc_stash_builddir after do_compile before do_install -SSTATETASKS += "do_gcc_stash_builddir" -do_gcc_stash_builddir[sstate-inputdirs] = "${BUILDDIRSTASH}" -do_gcc_stash_builddir[sstate-outputdirs] = "${COMPONENTS_DIR}/${BUILD_ARCH}/gcc-stashed-builddir-${TARGET_SYS}" -do_gcc_stash_builddir[sstate-fixmedir] = "${COMPONENTS_DIR}/${BUILD_ARCH}/gcc-stashed-builddir-${TARGET_SYS}" - -python do_gcc_stash_builddir_setscene () { - sstate_setscene(d) -} -addtask do_gcc_stash_builddir_setscene diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-cross_12.2.bb b/meta-microblaze/recipes-devtools/gcc/gcc-cross_12.2.bb deleted file mode 100644 index b43cca0c5..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-cross_12.2.bb +++ /dev/null @@ -1,3 +0,0 @@ -require recipes-devtools/gcc/gcc-${PV}.inc -require gcc-cross.inc - diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-cross_14.%.bbappend b/meta-microblaze/recipes-devtools/gcc/gcc-cross_14.%.bbappend deleted file mode 100644 index d1df20617..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-cross_14.%.bbappend +++ /dev/null @@ -1 +0,0 @@ -require microblaze-block.inc diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-crosssdk.inc b/meta-microblaze/recipes-devtools/gcc/gcc-crosssdk.inc deleted file mode 100644 index bd65b1fed..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-crosssdk.inc +++ /dev/null @@ -1,12 +0,0 @@ -inherit crosssdk - -PN = "gcc-crosssdk-${SDK_SYS}" - -SYSTEMHEADERS = "${SDKPATHNATIVE}${prefix_nativesdk}/include" -SYSTEMLIBS = "${SDKPATHNATIVE}${base_libdir_nativesdk}/" -SYSTEMLIBS1 = "${SDKPATHNATIVE}${libdir_nativesdk}/" - -GCCMULTILIB = "--disable-multilib" - -DEPENDS = "virtual/${TARGET_PREFIX}binutils gettext-native ${NATIVEDEPS}" -PROVIDES = "virtual/${TARGET_PREFIX}gcc virtual/${TARGET_PREFIX}g++" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-crosssdk_12.2.bb b/meta-microblaze/recipes-devtools/gcc/gcc-crosssdk_12.2.bb deleted file mode 100644 index 40a6c4fef..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-crosssdk_12.2.bb +++ /dev/null @@ -1,2 +0,0 @@ -require recipes-devtools/gcc/gcc-cross_${PV}.bb -require gcc-crosssdk.inc diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-crosssdk_14.%.bbappend b/meta-microblaze/recipes-devtools/gcc/gcc-crosssdk_14.%.bbappend deleted file mode 100644 index d1df20617..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-crosssdk_14.%.bbappend +++ /dev/null @@ -1 +0,0 @@ -require microblaze-block.inc diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-multilib-config.inc b/meta-microblaze/recipes-devtools/gcc/gcc-multilib-config.inc deleted file mode 100644 index 2dbbc23c9..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-multilib-config.inc +++ /dev/null @@ -1,249 +0,0 @@ -# following code modifies these definitions in the gcc config -# MULTILIB_OPTIONS -# MULTILIB_DIRNAMES -# MULTILIB_OSDIRNAMES -# GLIBC_DYNAMIC_LINKER32 -# GLIBC_DYNAMIC_LINKER64 -# GLIBC_DYNAMIC_LINKERX32 -# GLIBC_DYNAMIC_LINKERN32 -# For more information on use of these variables look at these files in the gcc source code -# gcc/config/i386/t-linux64 -# gcc/config/mips/t-linux64 -# gcc/config/rs6000/t-linux64 -# gcc/config/i386/linux64.h -# gcc/config/mips/linux64.h -# gcc/config/rs6000/linux64.h - -MULTILIB_OPTION_WHITELIST ??= "-m32 -m64 -mx32 -mabi=n32 -mabi=32 -mabi=64" - -python gcc_multilib_setup() { - import re - import shutil - import glob - - srcdir = d.getVar('S') - builddir = d.getVar('B') - src_conf_dir = '%s/gcc/config' % srcdir - build_conf_dir = '%s/gcc/config' % builddir - - bb.utils.remove(build_conf_dir, True) - ml_globs = ('%s/*/t-linux64' % src_conf_dir, - '%s/*/linux64.h' % src_conf_dir, - '%s/aarch64/t-aarch64' % src_conf_dir, - '%s/aarch64/aarch64.h' % src_conf_dir, - '%s/aarch64/aarch64-linux.h' % src_conf_dir, - '%s/aarch64/aarch64-cores.def' % src_conf_dir, - '%s/arm/linux-eabi.h' % src_conf_dir, - '%s/*/linux.h' % src_conf_dir, - '%s/linux.h' % src_conf_dir) - - # copy the target multilib config files to ${B} - for ml_glob in ml_globs: - for fn in glob.glob(ml_glob): - rel_path = os.path.relpath(fn, src_conf_dir) - parent_dir = os.path.dirname(rel_path) - bb.utils.mkdirhier('%s/%s' % (build_conf_dir, parent_dir)) - bb.utils.copyfile(fn, '%s/%s' % (build_conf_dir, rel_path)) - - pn = d.getVar('PN') - multilibs = (d.getVar('MULTILIB_VARIANTS') or '').split() - if not multilibs and pn != "nativesdk-gcc": - return - - mlprefix = d.getVar('MLPREFIX') - - if ('%sgcc' % mlprefix) != pn and (not pn.startswith('gcc-cross-canadian')) and pn != "nativesdk-gcc": - return - - - def write_config(root, files, options, dirnames, osdirnames): - for ml_conf_file in files: - with open(root + '/' + ml_conf_file, 'r') as f: - filelines = f.readlines() - # recreate multilib configuration variables - substs = [ - (r'^(\s*(MULTILIB_OPTIONS\s*=).*)$', r'\2 %s' % '/'.join(options)), - (r'^(\s*MULTILIB_OPTIONS\s*\+=.*)$', ''), - (r'^(\s*(MULTILIB_DIRNAMES\s*=).*)$', r'\2 %s' % ' '.join(dirnames)), - (r'^(\s*MULTILIB_DIRNAMES\s*\+=.*)$', ''), - (r'^(\s*(MULTILIB_OSDIRNAMES\s*=).*)$', r'\2 %s' % ' '.join(osdirnames)), - (r'^(\s*MULTILIB_OSDIRNAMES\s*\+=.*)$', ''), - ] - - for (i, line) in enumerate(filelines): - for subst in substs: - line = re.sub(subst[0], subst[1], line) - filelines[i] = line - - with open(root + '/' + ml_conf_file, 'w') as f: - f.write(''.join(filelines)) - - def write_headers(root, files, libdir32, libdir64, libdirx32, libdirn32): - def wrap_libdir(libdir): - if libdir.find('SYSTEMLIBS_DIR') != -1: - return '"%r"' - else: - return '"/%s/"' % libdir - - for ml_conf_file in files: - fn = root + '/' + ml_conf_file - if not os.path.exists(fn): - continue - with open(fn, 'r') as f: - filelines = f.readlines() - - # replace lines like - # #define GLIBC_DYNAMIC_LINKER32 SYSTEMLIBS_DIR "ld-linux.so.2" - # by - # #define GLIBC_DYNAMIC_LINKER32 "/lib/" "ld-linux.so.2" - # this is needed to put the correct dynamic loader path in the generated binaries - substs = [ - (r'^(#define\s*GLIBC_DYNAMIC_LINKER32\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdir32) + r'\3'), - (r'^(#define\s*GLIBC_DYNAMIC_LINKER64\s*)(\S+)(\s*\"\S+\")$', - r'\1' + wrap_libdir(libdir64) + r'\3'), - (r'^(#define\s*GLIBC_DYNAMIC_LINKER64\s*\"\S+\"\s*)(\S+)(\s*\"\S+\"\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdir64) + r'\3' + wrap_libdir(libdir64) + r'\5'), - (r'^(#define\s*GLIBC_DYNAMIC_LINKER\b\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdir32) + r'\3'), - (r'^(#define\s*GLIBC_DYNAMIC_LINKERX32\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdirx32) + r'\3'), - (r'^(#define\s*GLIBC_DYNAMIC_LINKERN32\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdirn32) + r'\3'), - (r'^(#define\s*UCLIBC_DYNAMIC_LINKER32\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdir32) + r'\3'), - (r'^(#define\s*UCLIBC_DYNAMIC_LINKER64\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdir64) + r'\3'), - (r'^(#define\s*UCLIBC_DYNAMIC_LINKERN32\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdirn32) + r'\3'), - (r'^(#define\s*UCLIBC_DYNAMIC_LINKERX32\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdirx32) + r'\3'), - (r'^(#define\s*UCLIBC_DYNAMIC_LINKER\b\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdir32) + r'\3'), - (r'^(#define\s*MUSL_DYNAMIC_LINKER32\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdir32) + r'\3'), - (r'^(#define\s*MUSL_DYNAMIC_LINKER64\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdir64) + r'\3'), - (r'^(#define\s*MUSL_DYNAMIC_LINKERX32\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdirx32) + r'\3'), - (r'^(#define\s*MUSL_DYNAMIC_LINKER\b\s*)(\S+)(\s*\".*\")$', - r'\1' + wrap_libdir(libdir32) + r'\3'), - ] - - for (i, line) in enumerate(filelines): - for subst in substs: - line = re.sub(subst[0], subst[1], line) - filelines[i] = line - - with open(root + '/' + ml_conf_file, 'w') as f: - f.write(''.join(filelines)) - - - gcc_target_config_files = { - 'x86_64' : ['gcc/config/i386/t-linux64'], - 'i586' : ['gcc/config/i386/t-linux64'], - 'i686' : ['gcc/config/i386/t-linux64'], - 'mips' : ['gcc/config/mips/t-linux64'], - 'mips64' : ['gcc/config/mips/t-linux64'], - 'powerpc' : ['gcc/config/rs6000/t-linux64'], - 'powerpc64' : ['gcc/config/rs6000/t-linux64'], - 'aarch64' : ['gcc/config/aarch64/t-aarch64'], - 'arm' : ['gcc/config/aarch64/t-aarch64'], - } - - gcc_header_config_files = { - 'x86_64' : ['gcc/config/linux.h', 'gcc/config/i386/linux.h', 'gcc/config/i386/linux64.h'], - 'i586' : ['gcc/config/linux.h', 'gcc/config/i386/linux.h', 'gcc/config/i386/linux64.h'], - 'i686' : ['gcc/config/linux.h', 'gcc/config/i386/linux.h', 'gcc/config/i386/linux64.h'], - 'mips' : ['gcc/config/linux.h', 'gcc/config/mips/linux.h', 'gcc/config/mips/linux64.h'], - 'mips64' : ['gcc/config/linux.h', 'gcc/config/mips/linux.h', 'gcc/config/mips/linux64.h'], - 'powerpc' : ['gcc/config/linux.h', 'gcc/config/rs6000/linux64.h'], - 'powerpc64' : ['gcc/config/linux.h', 'gcc/config/rs6000/linux64.h'], - 'aarch64' : ['gcc/config/linux.h', 'gcc/config/aarch64/aarch64-linux.h', 'gcc/config/arm/linux-eabi.h'], - 'arm' : ['gcc/config/linux.h', 'gcc/config/aarch64/aarch64-linux.h', 'gcc/config/arm/linux-eabi.h'], - } - - libdir32 = 'SYSTEMLIBS_DIR' - libdir64 = 'SYSTEMLIBS_DIR' - libdirx32 = 'SYSTEMLIBS_DIR' - libdirn32 = 'SYSTEMLIBS_DIR' - - - target_arch = (d.getVar('TARGET_ARCH_MULTILIB_ORIGINAL') if mlprefix - else d.getVar('TARGET_ARCH')) - if pn == "nativesdk-gcc": - header_config_files = gcc_header_config_files[d.getVar("SDK_ARCH")] - write_headers(builddir, header_config_files, libdir32, libdir64, libdirx32, libdirn32) - return - - if target_arch not in gcc_target_config_files: - bb.warn('gcc multilib setup is not supported for TARGET_ARCH=' + target_arch) - return - - target_config_files = gcc_target_config_files[target_arch] - header_config_files = gcc_header_config_files[target_arch] - - ml_list = ['DEFAULTTUNE_MULTILIB_ORIGINAL' if mlprefix else 'DEFAULTTUNE'] - mltunes = [('DEFAULTTUNE:virtclass-multilib-%s' % ml) for ml in multilibs] - if mlprefix: - mlindex = 0 - for ml in multilibs: - if mlprefix == ml + '-': - break - mlindex += 1 - - ml_list.extend(mltunes[:mlindex] + ['DEFAULTTUNE'] + mltunes[(mlindex + 1):]) - else: - ml_list.extend(mltunes) - - options = [] - dirnames = [] - osdirnames = [] - optsets = [] - - for ml in ml_list: - tune = d.getVar(ml) - if not tune: - bb.warn("%s doesn't have a corresponding tune. Skipping..." % ml) - continue - tune_parameters = get_tune_parameters(tune, d) - - tune_baselib = tune_parameters['baselib'] - if not tune_baselib: - bb.warn("Tune %s doesn't have a baselib set. Skipping..." % tune) - continue - - if tune_baselib == 'lib64': - libdir64 = tune_baselib - elif tune_baselib == 'libx32': - libdirx32 = tune_baselib - elif tune_baselib == 'lib32': - libdirn32 = tune_baselib - elif tune_baselib == 'lib': - libdir32 = tune_baselib - else: - bb.error('Unknown libdir (%s) of the tune : %s' % (tune_baselib, tune)) - - # take out '-' mcpu='s and march='s from parameters - opts = [] - whitelist = (d.getVar("MULTILIB_OPTION_WHITELIST") or "").split() - for i in d.expand(tune_parameters['ccargs']).split(): - if i in whitelist: - # Need to strip '-' from option - opts.append(i[1:]) - options.append(" ".join(opts)) - - if tune_baselib == 'lib': - dirnames.append('32') # /lib => 32bit lib - else: - dirnames.append(tune_baselib.replace('lib', '')) - osdirnames.append('../' + tune_baselib) - - write_config(builddir, target_config_files, options, dirnames, osdirnames) - write_headers(builddir, header_config_files, libdir32, libdir64, libdirx32, libdirn32) -} - -gcc_multilib_setup[cleandirs] = "${B}/gcc/config" -gcc_multilib_setup[vardepsexclude] = "SDK_ARCH" - -EXTRACONFFUNCS += "gcc_multilib_setup" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-runtime.inc b/meta-microblaze/recipes-devtools/gcc/gcc-runtime.inc deleted file mode 100644 index 8bb586311..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-runtime.inc +++ /dev/null @@ -1,310 +0,0 @@ -require gcc-configure-common.inc - -SUMMARY = "Runtime libraries from GCC" - -# Over-ride the LICENSE set by gcc-${PV}.inc to remove "& GPLv3" -# All gcc-runtime packages are now covered by the runtime exception. -LICENSE = "GPL-3.0-with-GCC-exception" - -CXXFLAGS:remove = "-fvisibility-inlines-hidden" - -EXTRA_OECONF_PATHS = "\ - --with-gxx-include-dir=${includedir}/c++/${BINV} \ - --with-sysroot=/not/exist \ - --with-build-sysroot=${STAGING_DIR_TARGET} \ -" - -EXTRA_OECONF:append:linuxstdbase = " --enable-clocale=gnu" -EXTRA_OECONF:append = " --cache-file=${B}/config.cache" -EXTRA_OECONF:append:libc-newlib = " --with-newlib --with-target-subdir" -EXTRA_OECONF:append:libc-baremetal = " --with-target-subdir" - -# Disable ifuncs for libatomic on arm conflicts -march/-mcpu -EXTRA_OECONF:append:arm = " libat_cv_have_ifunc=no " -EXTRA_OECONF:append:armeb = " libat_cv_have_ifunc=no " - -DISABLE_STATIC:class-nativesdk ?= "" - -# Newlib does not support symbol versioning on libsdtcc++ -SYMVERS_CONF:libc-newlib = "" - -# Building with thumb enabled on armv6t fails -ARM_INSTRUCTION_SET:armv6 = "arm" - -RUNTIMELIBITM = "libitm" -RUNTIMELIBITM:arc = "" -RUNTIMELIBITM:mipsarch = "" -RUNTIMELIBITM:nios2 = "" -RUNTIMELIBITM:microblaze = "" -RUNTIMELIBITM:riscv32 = "" -RUNTIMELIBITM:riscv64 = "" -RUNTIMELIBITM:loongarch64 = "" -RUNTIMELIBSSP ?= "" -RUNTIMELIBSSP:mingw32 ?= "libssp" - -RUNTIMETARGET = "${RUNTIMELIBSSP} libstdc++-v3 libgomp libatomic ${RUNTIMELIBITM} \ - ${@bb.utils.contains_any('FORTRAN', [',fortran',',f77'], 'libquadmath', '', d)} \ -" -# Only build libstdc++ for newlib -RUNTIMETARGET:libc-newlib = "libstdc++-v3" - -# libiberty -# libgfortran needs separate recipe due to libquadmath dependency - -do_configure () { - export CXX="${CXX} -nostdinc++ -L${WORKDIR}/dummylib" - # libstdc++ isn't built yet so CXX would error not able to find it which breaks stdc++'s configure - # tests. Create a dummy empty lib for the purposes of configure. - mkdir -p ${WORKDIR}/dummylib - ${CC} -x c /dev/null -c -o ${WORKDIR}/dummylib/dummylib.o - ${AR} rcs ${WORKDIR}/dummylib/libstdc++.a ${WORKDIR}/dummylib/dummylib.o - for d in libgcc ${RUNTIMETARGET}; do - echo "Configuring $d" - rm -rf ${B}/${TARGET_SYS}/$d/ - mkdir -p ${B}/${TARGET_SYS}/$d/ - cd ${B}/${TARGET_SYS}/$d/ - chmod a+x ${S}/$d/configure - ${S}/$d/configure ${CONFIGUREOPTS} ${EXTRA_OECONF} - if [ "$d" = "libgcc" ]; then - (cd ${B}/${TARGET_SYS}/libgcc; oe_runmake enable-execute-stack.c unwind.h md-unwind-support.h sfp-machine.h gthr-default.h) - fi - done -} -EXTRACONFFUNCS += "extract_stashed_builddir" -do_configure[depends] += "${COMPILERDEP}" - -do_compile () { - for d in libgcc ${RUNTIMETARGET}; do - cd ${B}/${TARGET_SYS}/$d/ - oe_runmake MULTIBUILDTOP=${B}/${TARGET_SYS}/$d/ - done -} - -do_install () { - for d in ${RUNTIMETARGET}; do - cd ${B}/${TARGET_SYS}/$d/ - oe_runmake 'DESTDIR=${D}' MULTIBUILDTOP=${B}/${TARGET_SYS}/$d/ install - done - if [ -d ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include ]; then - install -d ${D}${libdir}/${TARGET_SYS}/${BINV}/include - mv ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include/* ${D}${libdir}/${TARGET_SYS}/${BINV}/include - rmdir --ignore-fail-on-non-empty -p ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include - fi - rm -rf ${D}${infodir}/libgomp.info ${D}${infodir}/dir - rm -rf ${D}${infodir}/libitm.info ${D}${infodir}/dir - rm -rf ${D}${infodir}/libquadmath.info ${D}${infodir}/dir - if [ -d ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/finclude ]; then - rmdir --ignore-fail-on-non-empty -p ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/finclude - fi - if [ -d ${D}${infodir} ]; then - rmdir --ignore-fail-on-non-empty -p ${D}${infodir} - fi -} - -do_install:append:class-target () { - if [ "${TARGET_OS}" = "linux-gnuspe" ]; then - ln -s ${TARGET_SYS} ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR}-linux - fi - - if [ "${TARGET_OS}" = "linux-gnun32" ]; then - if [ "${TARGET_VENDOR_MULTILIB_ORIGINAL}" != "" -a "${TARGET_VENDOR}" != "${TARGET_VENDOR_MULTILIB_ORIGINAL}" ]; then - mkdir ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR_MULTILIB_ORIGINAL}-linux - ln -s ../${TARGET_SYS} ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR_MULTILIB_ORIGINAL}-linux/32 - elif [ "${MULTILIB_VARIANTS}" != "" ]; then - mkdir ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR}-linux - ln -s ../${TARGET_SYS} ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR}-linux/32 - else - ln -s ${TARGET_SYS} ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR}-linux - fi - elif [ "${TARGET_OS}" = "linux-gnux32" ]; then - if [ "${TARGET_VENDOR_MULTILIB_ORIGINAL}" != "" -a "${TARGET_VENDOR}" != "${TARGET_VENDOR_MULTILIB_ORIGINAL}" ]; then - mkdir ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR_MULTILIB_ORIGINAL}-linux - ln -s ../${TARGET_SYS} ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR_MULTILIB_ORIGINAL}-linux/x32 - elif [ "${MULTILIB_VARIANTS}" != "" ]; then - mkdir ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR}-linux - ln -s ../${TARGET_SYS} ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR}-linux/32 - else - ln -s ${TARGET_SYS} ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR}-linux - fi - elif [ "${TARGET_VENDOR_MULTILIB_ORIGINAL}" != "" -a "${TARGET_VENDOR}" != "${TARGET_VENDOR_MULTILIB_ORIGINAL}" ]; then - mkdir ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR_MULTILIB_ORIGINAL}-${TARGET_OS} - ln -s ../${TARGET_SYS}/bits ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR_MULTILIB_ORIGINAL}-${TARGET_OS}/bits - ln -s ../${TARGET_SYS}/ext ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR_MULTILIB_ORIGINAL}-${TARGET_OS}/ext - fi - - if [ "${TARGET_ARCH}" == "x86_64" -a "${MULTILIB_VARIANTS}" != "" ];then - ln -sf ../${X86ARCH32}${TARGET_VENDOR}-${TARGET_OS} ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR}-${TARGET_OS}/32 - fi - - if [ "${TCLIBC}" != "glibc" ]; then - case "${TARGET_OS}" in - "linux-musl" | "linux-*spe") extra_target_os="linux";; - "linux-musleabi") extra_target_os="linux-gnueabi";; - *) extra_target_os="linux";; - esac - ln -s ${TARGET_SYS} ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR}-$extra_target_os - fi - chown -R root:root ${D} -} - -INHIBIT_DEFAULT_DEPS = "1" -DEPENDS = "virtual/${TARGET_PREFIX}gcc virtual/${TARGET_PREFIX}g++ libgcc virtual/${MLPREFIX}libc" -PROVIDES = "virtual/${TARGET_PREFIX}compilerlibs" - -#BBCLASSEXTEND = "nativesdk" - -PACKAGES = "\ - ${PN}-dbg \ - libstdc++ \ - libstdc++-precompile-dev \ - libstdc++-dev \ - libstdc++-staticdev \ - libg2c \ - libg2c-dev \ - libssp \ - libssp-dev \ - libssp-staticdev \ - libquadmath \ - libquadmath-dev \ - libquadmath-staticdev \ - libgomp \ - libgomp-dev \ - libgomp-staticdev \ - libatomic \ - libatomic-dev \ - libatomic-staticdev \ - libitm \ - libitm-dev \ - libitm-staticdev \ -" -# The base package doesn't exist, so we clear the recommends. -RRECOMMENDS:${PN}-dbg = "" - -# include python debugging scripts -FILES:${PN}-dbg += "\ - ${libdir}/libstdc++.*-gdb.py \ - ${datadir}/gcc-${BINV}/python/libstdcxx \ -" - -FILES:libg2c = "${target_libdir}/libg2c.so.*" -SUMMARY:libg2c = "Companion runtime library for g77" -FILES:libg2c-dev = "\ - ${libdir}/libg2c.so \ - ${libdir}/libg2c.a \ - ${libdir}/libfrtbegin.a \ -" -SUMMARY:libg2c-dev = "Companion runtime library for g77 - development files" - -FILES:libstdc++ = "${libdir}/libstdc++.so.*" -SUMMARY:libstdc++ = "GNU standard C++ library" -FILES:libstdc++-dev = "\ - ${includedir}/c++/ \ - ${libdir}/libstdc++.so \ - ${libdir}/libstdc++*.la \ - ${libdir}/libsupc++.la \ -" -SUMMARY:libstdc++-dev = "GNU standard C++ library - development files" -FILES:libstdc++-staticdev = "\ - ${libdir}/libstdc++*.a \ - ${libdir}/libsupc++.a \ -" -SUMMARY:libstdc++-staticdev = "GNU standard C++ library - static development files" - -FILES:libstdc++-precompile-dev = "${includedir}/c++/${TARGET_SYS}/bits/*.gch" -SUMMARY:libstdc++-precompile-dev = "GNU standard C++ library - precompiled header files" - -FILES:libssp = "${libdir}/libssp.so.*" -SUMMARY:libssp = "GNU stack smashing protection library" -FILES:libssp-dev = "\ - ${libdir}/libssp*.so \ - ${libdir}/libssp*_nonshared.a \ - ${libdir}/libssp*.la \ - ${libdir}/${TARGET_SYS}/${BINV}/include/ssp \ -" -SUMMARY:libssp-dev = "GNU stack smashing protection library - development files" -FILES:libssp-staticdev = "${libdir}/libssp*.a" -SUMMARY:libssp-staticdev = "GNU stack smashing protection library - static development files" - -FILES:libquadmath = "${libdir}/libquadmath*.so.*" -SUMMARY:libquadmath = "GNU quad-precision math library" -FILES:libquadmath-dev = "\ - ${libdir}/${TARGET_SYS}/${BINV}/include/quadmath* \ - ${libdir}/libquadmath*.so \ - ${libdir}/libquadmath.la \ -" -SUMMARY:libquadmath-dev = "GNU quad-precision math library - development files" -FILES:libquadmath-staticdev = "${libdir}/libquadmath.a" -SUMMARY:libquadmath-staticdev = "GNU quad-precision math library - static development files" - -FILES:libgomp = "${libdir}/libgomp*${SOLIBS}" -SUMMARY:libgomp = "GNU OpenMP parallel programming library" -FILES:libgomp-dev = "\ - ${libdir}/libgomp*${SOLIBSDEV} \ - ${libdir}/libgomp*.la \ - ${libdir}/libgomp.spec \ - ${libdir}/${TARGET_SYS}/${BINV}/include/acc_prof.h \ - ${libdir}/${TARGET_SYS}/${BINV}/include/omp.h \ - ${libdir}/${TARGET_SYS}/${BINV}/include/openacc.h \ -" -SUMMARY:libgomp-dev = "GNU OpenMP parallel programming library - development files" -FILES:libgomp-staticdev = "${libdir}/libgomp*.a" -SUMMARY:libgomp-staticdev = "GNU OpenMP parallel programming library - static development files" - -FILES:libatomic = "${libdir}/libatomic.so.*" -SUMMARY:libatomic = "GNU C++11 atomics support library" -FILES:libatomic-dev = "\ - ${libdir}/libatomic.so \ - ${libdir}/libatomic.la \ -" -SUMMARY:libatomic-dev = "GNU C++11 atomics support library - development files" -FILES:libatomic-staticdev = "${libdir}/libatomic.a" -SUMMARY:libatomic-staticdev = "GNU C++11 atomics support library - static development files" - -FILES:libitm = "${libdir}/libitm.so.*" -SUMMARY:libitm = "GNU transactional memory support library" -FILES:libitm-dev = "\ - ${libdir}/libitm.so \ - ${libdir}/libitm.la \ - ${libdir}/libitm.spec \ -" -SUMMARY:libitm-dev = "GNU transactional memory support library - development files" -FILES:libitm-staticdev = "${libdir}/libitm.a" -SUMMARY:libitm-staticdev = "GNU transactional memory support library - static development files" - -require gcc-testsuite.inc - -EXTRA_OEMAKE:prepend:task-check = "${PARALLEL_MAKE} " - -MAKE_CHECK_TARGETS ??= "check-gcc ${@" ".join("check-target-" + i for i in d.getVar("RUNTIMETARGET").split())}" -# prettyprinters and xmethods require gdb tooling -MAKE_CHECK_IGNORE ??= "prettyprinters.exp xmethods.exp" -MAKE_CHECK_RUNTESTFLAGS ??= "${MAKE_CHECK_BOARDARGS} --ignore '${MAKE_CHECK_IGNORE}'" - -# specific host and target dependencies required for test suite running -do_check[depends] += "dejagnu-native:do_populate_sysroot expect-native:do_populate_sysroot" -do_check[depends] += "virtual/libc:do_populate_sysroot" -# only depend on qemu if targeting linux user execution -do_check[depends] += "${@'qemu-native:do_populate_sysroot' if "user" in d.getVar('TOOLCHAIN_TEST_TARGET') else ''}" -# extend the recipe sysroot to include the built libraries (for qemu usermode) -do_check[prefuncs] += "extend_recipe_sysroot" -do_check[prefuncs] += "check_prepare" -do_check[dirs] = "${WORKDIR}/dejagnu ${B}" -do_check[nostamp] = "1" -do_check() { - export DEJAGNU="${WORKDIR}/dejagnu/site.exp" - - # HACK: this works around the configure setting CXX with -nostd* args - sed -i 's#-nostdinc++ -L${WORKDIR}/dummylib##g' $(find ${B} -name testsuite_flags | head -1) - - if [ "${TOOLCHAIN_TEST_TARGET}" = "user" ]; then - # qemu user has issues allocating large amounts of memory - export G_SLICE=always-malloc - # no test should need more that 10G of memory, this prevents tests like pthread7-rope from leaking memory - ulimit -m 4194304 - ulimit -v 10485760 - fi - - oe_runmake -i ${MAKE_CHECK_TARGETS} RUNTESTFLAGS="${MAKE_CHECK_RUNTESTFLAGS}" -} -addtask check after do_compile do_populate_sysroot - diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-runtime_12.2.bb b/meta-microblaze/recipes-devtools/gcc/gcc-runtime_12.2.bb deleted file mode 100644 index dd430b57e..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-runtime_12.2.bb +++ /dev/null @@ -1,2 +0,0 @@ -require recipes-devtools/gcc/gcc-${PV}.inc -require gcc-runtime.inc diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-runtime_14.%.bbappend b/meta-microblaze/recipes-devtools/gcc/gcc-runtime_14.%.bbappend deleted file mode 100644 index d1df20617..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-runtime_14.%.bbappend +++ /dev/null @@ -1 +0,0 @@ -require microblaze-block.inc diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-sanitizers.inc b/meta-microblaze/recipes-devtools/gcc/gcc-sanitizers.inc deleted file mode 100644 index f6aa9c997..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-sanitizers.inc +++ /dev/null @@ -1,120 +0,0 @@ -require gcc-configure-common.inc - -LICENSE = "NCSA | MIT" - -LIC_FILES_CHKSUM = "\ - file://libsanitizer/LICENSE.TXT;md5=0249c37748936faf5b1efd5789587909 \ -" - -EXTRA_OECONF_PATHS = "\ - --with-sysroot=/not/exist \ - --with-build-sysroot=${STAGING_DIR_TARGET} \ -" - -do_configure () { - rm -rf ${B}/${TARGET_SYS}/libsanitizer/ - mkdir -p ${B}/${TARGET_SYS}/libsanitizer/ - cd ${B}/${TARGET_SYS}/libsanitizer/ - chmod a+x ${S}/libsanitizer/configure - relpath=${@os.path.relpath("${S}/libsanitizer", "${B}/${TARGET_SYS}/libsanitizer")} - $relpath/configure ${CONFIGUREOPTS} ${EXTRA_OECONF} - # Easiest way to stop bad RPATHs getting into the library since we have a - # broken libtool here - sed -i -e 's/hardcode_into_libs=yes/hardcode_into_libs=no/' ${B}/${TARGET_SYS}/libsanitizer/libtool - # Link to the sysroot's libstdc++ instead of one gcc thinks it just built - sed -i -e '/LIBSTDCXX_RAW_CXX_\(CXXFLAGS\|LDFLAGS\)\s*=/d' ${B}/${TARGET_SYS}/libsanitizer/*/Makefile -} -EXTRACONFFUNCS += "extract_stashed_builddir" -do_configure[depends] += "${COMPILERDEP}" - -do_compile () { - cd ${B}/${TARGET_SYS}/libsanitizer/ - oe_runmake MULTIBUILDTOP=${B}/${TARGET_SYS}/libsanitizer/ -} - -do_install () { - cd ${B}/${TARGET_SYS}/libsanitizer/ - oe_runmake 'DESTDIR=${D}' MULTIBUILDTOP=${B}/${TARGET_SYS}/libsanitizer/ install - if [ -d ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include ]; then - install -d ${D}${libdir}/${TARGET_SYS}/${BINV}/include - mv ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include/* ${D}${libdir}/${TARGET_SYS}/${BINV}/include - rmdir --ignore-fail-on-non-empty -p ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include - fi - if [ -d ${D}${infodir} ]; then - rmdir --ignore-fail-on-non-empty -p ${D}${infodir} - fi - chown -R root:root ${D} -} - -INHIBIT_DEFAULT_DEPS = "1" -ALLOW_EMPTY:${PN} = "1" -DEPENDS = "virtual/crypt gcc-runtime virtual/${TARGET_PREFIX}gcc" - -# used to fix ../../../../../../../../../work-shared/gcc-8.3.0-r0/gcc-8.3.0/libsanitizer/libbacktrace/../../libbacktrace/elf.c:772:21: error: 'st.st_mode' may be used uninitialized in this function [-Werror=maybe-uninitialized] -DEBUG_OPTIMIZATION:append = " -Wno-error" - -#BBCLASSEXTEND = "nativesdk" - -PACKAGES = "${PN} ${PN}-dbg" -PACKAGES += "libasan libubsan liblsan libtsan" -PACKAGES += "libasan-dev libubsan-dev liblsan-dev libtsan-dev" -PACKAGES += "libasan-staticdev libubsan-staticdev liblsan-staticdev libtsan-staticdev" - -RDEPENDS:libasan += "libstdc++" -RDEPENDS:libubsan += "libstdc++" -RDEPENDS:liblsan += "libstdc++" -RDEPENDS:libtsan += "libstdc++" -RDEPENDS:libasan-dev += "${PN}" -RDEPENDS:libubsan-dev += "${PN}" -RDEPENDS:liblsan-dev += "${PN}" -RDEPENDS:libtsan-dev += "${PN}" -RRECOMMENDS:${PN} += "libasan libubsan" -RRECOMMENDS:${PN}:append:x86 = " liblsan" -RRECOMMENDS:${PN}:append:x86-64 = " liblsan libtsan" -RRECOMMENDS:${PN}:append:powerpc64 = " liblsan libtsan" -RRECOMMENDS:${PN}:append:aarch64 = " liblsan libtsan" - -do_package_write_ipk[depends] += "virtual/${MLPREFIX}${TARGET_PREFIX}compilerlibs:do_packagedata" -do_package_write_deb[depends] += "virtual/${MLPREFIX}${TARGET_PREFIX}compilerlibs:do_packagedata" -do_package_write_rpm[depends] += "virtual/${MLPREFIX}${TARGET_PREFIX}compilerlibs:do_packagedata" - -# Only x86, powerpc, sparc, s390, arm, and aarch64 are supported -COMPATIBLE_HOST = '(x86_64|i.86|powerpc|sparc|s390|arm|aarch64).*-linux' -# musl is currently broken entirely -COMPATIBLE_HOST:libc-musl = 'null' - -FILES:libasan += "${libdir}/libasan.so.* ${libdir}/libhwasan.so.*" -FILES:libasan-dev += "\ - ${libdir}/libasan_preinit.o \ - ${libdir}/libasan.so \ - ${libdir}/libhwasan.so \ - ${libdir}/libasan.la \ -" -FILES:libasan-staticdev += "${libdir}/libasan.a \ - ${libdir}/libhwasan.a \ -" - -FILES:libubsan += "${libdir}/libubsan.so.*" -FILES:libubsan-dev += "\ - ${libdir}/libubsan.so \ - ${libdir}/libubsan.la \ -" -FILES:libubsan-staticdev += "${libdir}/libubsan.a" - -FILES:liblsan += "${libdir}/liblsan.so.*" -FILES:liblsan-dev += "\ - ${libdir}/liblsan.so \ - ${libdir}/liblsan.la \ - ${libdir}/liblsan_preinit.o \ -" -FILES:liblsan-staticdev += "${libdir}/liblsan.a" - -FILES:libtsan += "${libdir}/libtsan.so.*" -FILES:libtsan-dev += "\ - ${libdir}/libtsan.so \ - ${libdir}/libtsan.la \ - ${libdir}/libtsan_*.o \ -" -FILES:libtsan-staticdev += "${libdir}/libtsan.a" - -FILES:${PN} = "${libdir}/*.spec ${libdir}/${TARGET_SYS}/${BINV}/include/sanitizer/*.h" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-sanitizers_12.2.bb b/meta-microblaze/recipes-devtools/gcc/gcc-sanitizers_12.2.bb deleted file mode 100644 index 8bda2ccad..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-sanitizers_12.2.bb +++ /dev/null @@ -1,7 +0,0 @@ -require recipes-devtools/gcc/gcc-${PV}.inc -require gcc-sanitizers.inc - -# Building with thumb enabled on armv4t armv5t fails with -# sanitizer_linux.s:5749: Error: lo register required -- `ldr ip,[sp],#8' -ARM_INSTRUCTION_SET:armv4 = "arm" -ARM_INSTRUCTION_SET:armv5 = "arm" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-sanitizers_14.%.bbappend b/meta-microblaze/recipes-devtools/gcc/gcc-sanitizers_14.%.bbappend deleted file mode 100644 index d1df20617..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-sanitizers_14.%.bbappend +++ /dev/null @@ -1 +0,0 @@ -require microblaze-block.inc diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-shared-source.inc b/meta-microblaze/recipes-devtools/gcc/gcc-shared-source.inc deleted file mode 100644 index 03f520b09..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-shared-source.inc +++ /dev/null @@ -1,21 +0,0 @@ -do_fetch() { - : -} -do_fetch[noexec] = "1" -deltask do_unpack -deltask do_patch - -SRC_URI = "" - -do_configure[depends] += "gcc-source-${PV}:do_preconfigure" -do_populate_lic[depends] += "gcc-source-${PV}:do_unpack" -do_deploy_source_date_epoch[depends] += "gcc-source-${PV}:do_deploy_source_date_epoch" - -# Copy the SDE from the shared workdir to the recipe workdir -do_deploy_source_date_epoch () { - sde_file=${SDE_FILE} - sde_file=${sde_file#${WORKDIR}/} - mkdir -p ${SDE_DEPLOYDIR} $(dirname ${SDE_FILE}) - cp -p $(dirname ${S})/$sde_file ${SDE_DEPLOYDIR} - cp -p $(dirname ${S})/$sde_file ${SDE_FILE} -} diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-source.inc b/meta-microblaze/recipes-devtools/gcc/gcc-source.inc deleted file mode 100644 index 265bcf4be..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-source.inc +++ /dev/null @@ -1,45 +0,0 @@ -deltask do_configure -deltask do_compile -deltask do_install -deltask do_populate_sysroot -deltask do_populate_lic -RM_WORK_EXCLUDE += "${PN}" - -inherit nopackages - -PN = "gcc-source-${PV}" -WORKDIR = "${TMPDIR}/work-shared/gcc-${PV}-${PR}" -SSTATE_SWSPEC = "sstate:gcc::${PV}:${PR}::${SSTATE_VERSION}:" - -STAMP = "${STAMPS_DIR}/work-shared/gcc-${PV}-${PR}" -STAMPCLEAN = "${STAMPS_DIR}/work-shared/gcc-${PV}-*" - -INHIBIT_DEFAULT_DEPS = "1" -DEPENDS = "" -PACKAGES = "" -TARGET_ARCH = "allarch" -TARGET_AS_ARCH = "none" -TARGET_CC_ARCH = "none" -TARGET_LD_ARCH = "none" -TARGET_OS = "linux" -baselib = "lib" -PACKAGE_ARCH = "all" - -B = "${WORKDIR}/build" - -# This needs to be Python to avoid lots of shell variables becoming dependencies. -python do_preconfigure () { - import subprocess - cmd = d.expand('cd ${S} && PATH=${PATH} gnu-configize') - subprocess.check_output(cmd, stderr=subprocess.STDOUT, shell=True) - cmd = d.expand("sed -i 's/BUILD_INFO=info/BUILD_INFO=/' ${S}/gcc/configure") - subprocess.check_output(cmd, stderr=subprocess.STDOUT, shell=True) - - # Easiest way to stop bad RPATHs getting into the library since we have a - # broken libtool here (breaks cross-canadian and target at least) - cmd = d.expand("sed -i -e 's/hardcode_into_libs=yes/hardcode_into_libs=no/' ${S}/libcc1/configure") - subprocess.check_output(cmd, stderr=subprocess.STDOUT, shell=True) -} -addtask do_preconfigure after do_patch -do_preconfigure[depends] += "gnu-config-native:do_populate_sysroot autoconf-native:do_populate_sysroot" - diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-source_12.%.bbappend b/meta-microblaze/recipes-devtools/gcc/gcc-source_12.%.bbappend deleted file mode 100644 index 42bcd174e..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-source_12.%.bbappend +++ /dev/null @@ -1,59 +0,0 @@ -# Add MicroBlaze Patches (only when using MicroBlaze) -FILESEXTRAPATHS:append := ":${THISDIR}/gcc-12" - -SRC_URI += " \ - file://0001-LOCAL-Testsuite-builtins-tests-require-fpic.patch \ - file://0002-LOCAL-Quick-fail-g-.dg-opt-memcpy1.C.patch \ - file://0003-LOCAL-For-dejagnu-static-testing-on-qemu-suppress-wa.patch \ - file://0004-Patch-testsuite-Add-MicroBlaze-to-target-supports-fo.patch \ - file://0005-Patch-testsuite-Update-MicroBlaze-strings-test.patch \ - file://0006-Patch-testsuite-Allow-MicroBlaze-.weakext-pattern-in.patch \ - file://0007-Patch-testsuite-Add-MicroBlaze-to-check_profiling_av.patch \ - file://0008-Patch-microblaze-Fix-atomic-side-effects.patch \ - file://0009-Patch-microblaze-Fix-atomic-boolean-return-value.patch \ - file://0010-Patch-microblaze-Fix-the-Microblaze-crash-with-msmal.patch \ - file://0011-Patch-microblaze-Added-ashrsi3_with_size_opt.patch \ - file://0012-Patch-microblaze-Use-bralid-for-profiler-calls.patch \ - file://0013-Patch-microblaze-Removed-moddi3-routinue.patch \ - file://0014-Patch-microblaze-Add-INIT_PRIORITY-support-Added.patch \ - file://0015-Patch-microblaze-Add-optimized-lshrsi3.patch \ - file://0016-Patch-microblaze-Add-cbranchsi4_reg.patch \ - file://0017-Patch-microblaze-Inline-Expansion-of-fsqrt-builtin.patch \ - file://0018-PATCH-microblaze.md-Improve-adddi3-and-subdi3-insn-d.patch \ - file://0019-Patch-microblaze-Update-ashlsi3-movsf-patterns.patch \ - file://0020-Patch-microblaze-8-stage-pipeline-for-microblaze.patch \ - file://0021-PATCH-21-53-Patch-microblaze-Correct-the-const-high-.patch \ - file://0022-Fix-microblaze-Fix-internal-compiler-error-with-msma.patch \ - file://0023-patch-microblaze-Fix-the-calculation-of-high-word-in.patch \ - file://0024-Patch-MicroBlaze-this-patch-has-1.Fixed-the-bug-in.patch \ - file://0025-Fixing-the-issue-with-the-builtin_alloc.patch \ - file://0026-Patch-Microblaze-Removed-fsqrt-generation-for-double.patch \ - file://0027-Patch-MicroBlaze-Intial-commit-of-64-bit-Microblaze.patch \ - file://0028-Intial-commit-for-64bit-MB-sources.patch \ - file://0029-Patch-MicroBlaze-re-arrangement-of-the-compare-branc.patch \ - file://0030-Patch-Microblaze-previous-commit-broke-the-handling-.patch \ - file://0031-Patch-Microblaze-Support-of-multilibs-with-m64.patch \ - file://0032-Patch-MicroBlaze-Fixed-issues-like.patch \ - file://0033-Patch-MicroBlaze.patch \ - file://0034-Added-double-arith-instructions.patch \ - file://0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch \ - file://0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch \ - file://0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch \ - file://0038-fixing-the-typo-errors-in-umodsi3-file.patch \ - file://0039-fixing-the-32bit-LTO-related-issue9-1014024.patch \ - file://0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch \ - file://0041-Patch-Microblaze-corrected-SPN-for-dlong-instruction.patch \ - file://0042-fixing-the-long-long-long-mingw-toolchain-issue.patch \ - file://0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch \ - file://0044-Patch-Microblaze-We-will-check-the-possibility-of-pe.patch \ - file://0045-Patch-MicroBlaze-fixed-typos-in-mul-div-and-mod-asse.patch \ - file://0046-Patch-microblaze-MB-64-removal-of-barrel-shift-instr.patch \ - file://0047-Added-new-MB-64-single-register-arithmetic-instructi.patch \ - file://0048-Patch-MicroBlaze-Added-support-for-64-bit-Immediate-.patch \ - file://0049-Patch-microblaze-Fix-Compiler-crash-with-freg-struct.patch \ - file://0050-Patch-microblaze-Add-TARGET_OPTION_OPTIMIZATION-and-.patch \ - file://0051-Patch-microblaze-Reducing-Stack-space-for-arguments.patch \ - file://0052-Patch-MicroBlaze.patch \ - file://0053-patch-microblaze64-Add-Zero_extended-instructions.patch \ - file://microblaze-mulitlib-hack.patch \ -" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-source_12.2.bb b/meta-microblaze/recipes-devtools/gcc/gcc-source_12.2.bb deleted file mode 100644 index b890fa33e..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-source_12.2.bb +++ /dev/null @@ -1,4 +0,0 @@ -require recipes-devtools/gcc/gcc-${PV}.inc -require recipes-devtools/gcc/gcc-source.inc - -EXCLUDE_FROM_WORLD = "1" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-source_13.%.bbappend b/meta-microblaze/recipes-devtools/gcc/gcc-source_13.%.bbappend new file mode 100644 index 000000000..51b08f360 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gcc/gcc-source_13.%.bbappend @@ -0,0 +1,63 @@ +# Add MicroBlaze Patches (only when using MicroBlaze) +FILESEXTRAPATHS:append := ":${THISDIR}/gcc-13" + +# Our changes are all local, no real patch-status +ERROR_QA:remove = "patch-status" + +SRC_URI += " \ + file://0001-LOCAL-Testsuite-builtins-tests-require-fpic-Signed-o.patch \ + file://0002-Quick-fail-g-.dg-opt-memcpy1.C-This-particular-testc.patch \ + file://0003-For-dejagnu-static-testing-on-qemu-suppress-warnings.patch \ + file://0004-Add-MicroBlaze-to-target-supports-for-atomic-buil.-..patch \ + file://0005-Update-MicroBlaze-strings-test-for-new-scan-assembly.patch \ + file://0006-Allow-MicroBlaze-.weakext-pattern-in-regex-match-Ext.patch \ + file://0007-Add-MicroBlaze-to-check_profiling_available-Testsuit.patch \ + file://0008-Fix-atomic-side-effects.-In-atomic_compare_and_swaps.patch \ + file://0009-Fix-atomic-boolean-return-value.-In-atomic_compare_a.patch \ + file://0010-Fix-the-Microblaze-crash-with-msmall-divides-flag-Co.patch \ + file://0011-Added-ashrsi3_with_size_opt-Added-ashrsi3_with_size_.patch \ + file://0012-Use-bralid-for-profiler-calls-Signed-off-by-Edgar-E..patch \ + file://0013-Removed-moddi3-routinue-Using-the-default-moddi3-fun.patch \ + file://0014-Add-INIT_PRIORITY-support-Added-TARGET_ASM_CONSTRUCT.patch \ + file://0015-Add-optimized-lshrsi3-When-barrel-shifter-is-not-pre.patch \ + file://0016-Add-cbranchsi4_reg-This-patch-optimizes-the-generati.patch \ + file://0017-Inline-Expansion-of-fsqrt-builtin.-The-changes-are-m.patch \ + file://0018-microblaze.md-Improve-adddi3-and-subdi3-insn-definit.patch \ + file://0019-Update-ashlsi3-movsf-patterns-This-patch-removes-the.patch \ + file://0020-8-stage-pipeline-for-microblaze-This-patch-adds-the-.patch \ + file://0021-Correct-the-const-high-double-immediate-value-with-t.patch \ + file://0022-Fix-internal-compiler-error-with-msmall-divides-This.patch \ + file://0023-Fix-the-calculation-of-high-word-in-a-long-long-64-b.patch \ + file://0024-this-patch-has-1.Fixed-the-bug-in-version-calculatio.patch \ + file://0025-Fixing-the-issue-with-the-builtin_alloc.-register-r1.patch \ + file://0026-Removed-fsqrt-generation-for-double-values.patch \ + file://0027-Intial-commit-of-64-bit-Microblaze.patch \ + file://0028-Intial-commit-for-64bit-MB-sources.-Need-to-cleanup-.patch \ + file://0029-re-arrangement-of-the-compare-branches.patch \ + file://0030-previous-commit-broke-the-handling-of-SI-Branch-comp.patch \ + file://0031-Support-of-multilibs-with-m64.patch \ + file://0032-Fixed-issues-like-1-Interrupt-alignment-issue-2-Sign.patch \ + file://0033-fixed-below-issues-Floating-point-print-issues-in-64.patch \ + file://0034-Added-double-arith-instructions-Fixed-prologue-stack.patch \ + file://0035-Fixed-the-issue-in-the-delay-slot-with-swap-instruct.patch \ + file://0036-Fixed-the-load-store-issue-with-the-32bit-arith-libr.patch \ + file://0037-extending-the-Dwarf-support-to-64bit-Microblaze.patch \ + file://0038-fixing-the-typo-errors-in-umodsi3-file.patch \ + file://0039-fixing-the-32bit-LTO-related-issue9-1014024.patch \ + file://0040-Fixed-the-missing-stack-adjustment-in-prologue-of-mo.patch \ + file://0041-corrected-SPN-for-dlong-instruction-mapping.patch \ + file://0042-fixing-the-long-long-long-mingw-toolchain-issue.patch \ + file://0043-Fix-the-MB-64-bug-of-handling-QI-objects.patch \ + file://0044-We-will-check-the-possibility-of-peephole2-optimizat.patch \ + file://0045-fixed-typos-in-mul-div-and-mod-assembly-files.patch \ + file://0046-MB-64-removal-of-barrel-shift-instructions-from-defa.patch \ + file://0047-Added-new-MB-64-single-register-arithmetic-instructi.patch \ + file://0048-Added-support-for-64-bit-Immediate-values.patch \ + file://0049-Fix-Compiler-crash-with-freg-struct-return-This-patc.patch \ + file://0050-Add-TARGET_OPTION_OPTIMIZATION-and-disable-fivopts-b.patch \ + file://0051-Reducing-Stack-space-for-arguments.patch \ + file://0052-If-we-use-break_handler-attribute-then-interrupt-vec.patch \ + file://0053-Add-Zero_extended-instructions.patch \ + file://0054-Fix-failure-with-gcc.c-torture-execute-ashrdi-1.c-Os.patch \ + file://microblaze-mulitlib-hack.patch \ +" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-target.inc b/meta-microblaze/recipes-devtools/gcc/gcc-target.inc deleted file mode 100644 index 7dac3ef42..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-target.inc +++ /dev/null @@ -1,259 +0,0 @@ -GCCMULTILIB = "--enable-multilib" -require gcc-configure-common.inc - -EXTRA_OECONF_PATHS = "\ - --with-build-sysroot=${STAGING_DIR_TARGET} \ -" - -EXTRA_OECONF:append:linuxstdbase = " --enable-clocale=gnu" - -# Configure gcc running on the target to default to an architecture which will -# be compatible with that of gcc-runtime (which is cross compiled to be target -# specific). For example, for ARM, ARMv6+ adds atomic instructions that may -# affect the ABI in the gcc-runtime libs. Since we can't rely on gcc on the -# target to always be passed -march etc, its built-in default needs to be safe. - -ARMFPARCHEXT ?= "" - -EXTRA_OECONF:append:armv6:class-target = " --with-arch=armv6${ARMFPARCHEXT}" -EXTRA_OECONF:append:armv7a:class-target = " --with-arch=armv7-a${ARMFPARCHEXT}" -EXTRA_OECONF:append:armv7ve:class-target = " --with-arch=armv7ve${ARMFPARCHEXT}" -EXTRA_OECONF:append:arc:class-target = " --with-cpu=${TUNE_PKGARCH}" -EXTRA_OECONF:append:x86-64:class-target = " ${@get_gcc_x86_64_arch_setting(bb, d)}" - -# libcc1 requres gcc_cv_objdump when cross build, but gcc_cv_objdump is -# set in subdir gcc, so subdir libcc1 can't use it, export it here to -# fix the problem. -export gcc_cv_objdump = "${TARGET_PREFIX}objdump" - -EXTRA_OECONF_GCC_FLOAT = "${@get_gcc_float_setting(bb, d)}" - -PACKAGES = "\ - ${PN} ${PN}-plugins ${PN}-symlinks \ - g++ g++-symlinks \ - cpp cpp-symlinks \ - g77 g77-symlinks \ - gfortran gfortran-symlinks \ - gcov gcov-symlinks \ - ${PN}-doc \ - ${PN}-dev \ - ${PN}-dbg \ -" - -FILES:${PN} = "\ - ${bindir}/${TARGET_PREFIX}gcc* \ - ${bindir}/${TARGET_PREFIX}lto* \ - ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/collect2* \ - ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/g++-mapper-server \ - ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/lto* \ - ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/lib*${SOLIBS} \ - ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/liblto*${SOLIBSDEV} \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/*.o \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/specs \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/lib*${SOLIBS} \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/include \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/include-fixed \ - ${libdir}/bfd-plugins/*.so \ -" -INSANE_SKIP:${PN} += "dev-so" -RRECOMMENDS:${PN} += "\ - libssp \ - libssp-dev \ -" -RDEPENDS:${PN} += "cpp" - -FILES:${PN}-dev = "\ - ${gcclibdir}/${TARGET_SYS}/${BINV}/lib*${SOLIBSDEV} \ - ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/lib*${SOLIBSDEV} \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/plugin/include/ \ - ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/plugin/gengtype \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/plugin/gtype.state \ -" -FILES:${PN}-symlinks = "\ - ${bindir}/cc \ - ${bindir}/gcc \ - ${bindir}/gccbug \ -" - -FILES:${PN}-plugins = "\ - ${gcclibdir}/${TARGET_SYS}/${BINV}/plugin \ -" -ALLOW_EMPTY:${PN}-plugins = "1" - -FILES:g77 = "\ - ${bindir}/${TARGET_PREFIX}g77 \ - ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/f771 \ -" -FILES:g77-symlinks = "\ - ${bindir}/g77 \ - ${bindir}/f77 \ -" -RRECOMMENDS:g77 = "\ - libg2c \ - libg2c-dev \ -" - -FILES:gfortran = "\ - ${bindir}/${TARGET_PREFIX}gfortran \ - ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/f951 \ -" -RRECOMMENDS:gfortran = "\ - libquadmath \ - libquadmath-dev \ -" -FILES:gfortran-symlinks = "\ - ${bindir}/gfortran \ - ${bindir}/f95" - -FILES:cpp = "\ - ${bindir}/${TARGET_PREFIX}cpp* \ - ${base_libdir}/cpp \ - ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/cc1" -FILES:cpp-symlinks = "${bindir}/cpp" - -FILES:gcov = "${bindir}/${TARGET_PREFIX}gcov* \ - ${bindir}/${TARGET_PREFIX}gcov-tool* \ -" -FILES:gcov-symlinks = "${bindir}/gcov \ - ${bindir}/gcov-tool \ -" - -FILES:g++ = "\ - ${bindir}/${TARGET_PREFIX}g++* \ - ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/cc1plus \ -" -FILES:g++-symlinks = "\ - ${bindir}/c++ \ - ${bindir}/g++ \ -" -RRECOMMENDS:g++ = "\ - libstdc++ \ - libstdc++-dev \ - libatomic \ - libatomic-dev \ -" - -FILES:${PN}-doc = "\ - ${infodir} \ - ${mandir} \ - ${gcclibdir}/${TARGET_SYS}/${BINV}/include/README \ -" - -do_compile () { - # Prevent full target sysroot path from being used in configargs.h header, - # as it will be rewritten when used by other sysroots preventing support - # for gcc plugins. Additionally the path is embeddeded into the output - # binary, this prevents building a reproducible binary. - oe_runmake configure-gcc - sed -i 's@${STAGING_DIR_TARGET}@/@g' ${B}/gcc/configargs.h - sed -i 's@${STAGING_DIR_HOST}@/@g' ${B}/gcc/configargs.h - - # Prevent sysroot/workdir paths from being used in checksum-options. - # checksum-options is used to generate a checksum which is embedded into - # the output binary. - oe_runmake TARGET-gcc=checksum-options all-gcc - sed -i 's@${DEBUG_PREFIX_MAP}@@g' ${B}/gcc/checksum-options - sed -i 's@${STAGING_DIR_TARGET}@/@g' ${B}/gcc/checksum-options - - oe_runmake all-host -} - -do_install () { - oe_runmake 'DESTDIR=${D}' install-host - - # Add unwind.h, it comes from libgcc which we don't want to build again - install ${STAGING_LIBDIR_NATIVE}/${TARGET_SYS}/gcc/${TARGET_SYS}/${BINV}/include/unwind.h ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include/ - - # Info dir listing isn't interesting at this point so remove it if it exists. - if [ -e "${D}${infodir}/dir" ]; then - rm -f ${D}${infodir}/dir - fi - - # Cleanup some of the ${libdir}{,exec}/gcc stuff ... - rm -r ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/install-tools - rm -r ${D}${libexecdir}/gcc/${TARGET_SYS}/${BINV}/install-tools - rm -rf ${D}${libexecdir}/gcc/${TARGET_SYS}/${BINV}/*.la - rmdir ${D}${includedir} - rm -rf ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/finclude - - # Hack around specs file assumptions - test -f ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/specs && sed -i -e '/^*cross_compile:$/ { n; s/1/0/; }' ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/specs - - # Cleanup manpages.. - rm -rf ${D}${mandir}/man7 - - # Don't package details about the build host - rm -f ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/plugin/include/auto-build.h - rm -f ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/plugin/include/bconfig.h - - cd ${D}${bindir} - - # We care about g++ not c++ - rm -f *c++* - - # We don't care about the gcc- ones for this - rm -f *gcc-?*.?* - - # Not sure why we end up with these but we don't want them... - rm -f ${TARGET_PREFIX}${TARGET_PREFIX}* - - # Symlinks so we can use these trivially on the target - if [ -e ${TARGET_PREFIX}g77 ]; then - ln -sf ${TARGET_PREFIX}g77 g77 || true - ln -sf g77 f77 || true - fi - if [ -e ${TARGET_PREFIX}gfortran ]; then - ln -sf ${TARGET_PREFIX}gfortran gfortran || true - ln -sf gfortran f95 || true - fi - ln -sf ${TARGET_PREFIX}g++ g++ - ln -sf ${TARGET_PREFIX}gcc gcc - ln -sf ${TARGET_PREFIX}cpp cpp - ln -sf ${TARGET_PREFIX}gcov gcov - ln -sf ${TARGET_PREFIX}gcov-tool gcov-tool - install -d ${D}${base_libdir} - ln -sf ${bindir}/${TARGET_PREFIX}cpp ${D}${base_libdir}/cpp - ln -sf g++ c++ - ln -sf gcc cc - install -d ${D}${libdir}/bfd-plugins - ln -sf ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/liblto_plugin.so ${D}${libdir}/bfd-plugins/liblto_plugin.so - chown -R root:root ${D} -} - -do_install:append () { - # - # Thefixinc.sh script, run on the gcc's compile phase, looks into sysroot header - # files and places the modified files into - # {D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include-fixed folder. This makes the - # build not deterministic. The following code prunes all those headers - # except those under include-fixed/linux, *limits.h and README, yielding - # the same include-fixed folders no matter what sysroot - - include_fixed="${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include-fixed" - for f in $(find ${include_fixed} -type f); do - case $f in - */include-fixed/linux/*) - continue - ;; - */include-fixed/*limits.h) - continue - ;; - */include-fixed/README) - continue - ;; - *) - # remove file and directory if empty - bbdebug 2 "Pruning $f" - rm $f - find $(dirname $f) -maxdepth 0 -empty -exec rmdir {} \; - ;; - esac - done -} - -# Installing /usr/lib/gcc/* means we'd have two copies, one from gcc-cross -# and one from here. These can confuse gcc cross where includes use #include_next -# and builds track file dependencies (e.g. perl and its makedepends code). -# For determinism we don't install this ever and rely on the copy from gcc-cross. -# [YOCTO #7287] -SYSROOT_DIRS_IGNORE += "${libdir}/gcc" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-testsuite.inc b/meta-microblaze/recipes-devtools/gcc/gcc-testsuite.inc deleted file mode 100644 index f68fec58e..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-testsuite.inc +++ /dev/null @@ -1,107 +0,0 @@ -inherit qemu - -TOOLCHAIN_TEST_TARGET ??= "user" -TOOLCHAIN_TEST_HOST ??= "localhost" -TOOLCHAIN_TEST_HOST_USER ??= "root" -TOOLCHAIN_TEST_HOST_PORT ??= "2222" - -MAKE_CHECK_BOARDFLAGS ??= "" -MAKE_CHECK_BOARDARGS ??= "--target_board=${TOOLCHAIN_TEST_TARGET}${MAKE_CHECK_BOARDFLAGS}" - -python () { - # Provide the targets compiler args via targets options. This allows dejagnu to - # correctly mark incompatible tests as UNSUPPORTED (e.g. needs soft-float - # but running on hard-float target). - # - # These options are called "multilib_flags" within the gcc test suite. Most - # architectures handle these options in a sensible way such that tests that - # are incompatible with the provided multilib are marked as UNSUPPORTED. - # - # Note: multilib flags are added to the compile command after the args - # provided by any test (through dg-options), CFLAGS_FOR_TARGET is always - # added to the compile command before any other args but is not interpted - # as options like multilib flags. - # - # i686, x86-64 and aarch64 are special, since most toolchains built for - # these targets don't do multilib the tests do not get correctly marked as - # UNSUPPORTED. More importantly the test suite itself does not handle - # overriding the multilib flags where it could (like other archs do). As - # such do not pass the target compiler args for these targets. - args = d.getVar("TUNE_CCARGS").split() - if d.getVar("TUNE_ARCH") in ["i686", "x86_64", "aarch64"]: - args = [] - d.setVar("MAKE_CHECK_BOARDFLAGS", ("/" + "/".join(args)) if len(args) != 0 else "") -} - -python check_prepare() { - def generate_qemu_linux_user_config(d): - content = [] - content.append('load_generic_config "sim"') - content.append('load_base_board_description "basic-sim"') - content.append('process_multilib_options ""') - - # qemu args - qemu_binary = qemu_target_binary(d) - if not qemu_binary: - bb.fatal("Missing target qemu linux-user binary") - - args = [] - # QEMU_OPTIONS is not always valid due to -cross recipe - args += ["-r", d.getVar("OLDEST_KERNEL")] - # enable all valid instructions, since the test suite itself does not - # limit itself to the target cpu options. - # - valid for x86*, powerpc, arm, arm64 - if qemu_binary.lstrip("qemu-") in ["x86_64", "i386", "ppc", "arm", "aarch64"]: - args += ["-cpu", "max"] - - sysroot = d.getVar("RECIPE_SYSROOT") - args += ["-L", sysroot] - # lib paths are static here instead of using $libdir since this is used by a -cross recipe - libpaths = [sysroot + "/usr/lib", sysroot + "/lib"] - args += ["-E", "LD_LIBRARY_PATH={0}".format(":".join(libpaths))] - - content.append('set_board_info is_simulator 1') - content.append('set_board_info sim "{0}"'.format(qemu_binary)) - content.append('set_board_info sim,options "{0}"'.format(" ".join(args))) - - # target build/test config - content.append('set_board_info target_install {%s}' % d.getVar("TARGET_SYS")) - content.append('set_board_info ldscript ""') - #content.append('set_board_info needs_status_wrapper 1') # qemu-linux-user return codes work, and abort works fine - content.append('set_board_info gcc,stack_size 16834') - content.append('set_board_info gdb,nosignals 1') - content.append('set_board_info gcc,timeout 60') - - return "\n".join(content) - - def generate_remote_ssh_linux_config(d): - content = [] - content.append('load_generic_config "unix"') - content.append('process_multilib_options ""') - content.append("set_board_info hostname {0}".format(d.getVar("TOOLCHAIN_TEST_HOST"))) - content.append("set_board_info username {0}".format(d.getVar("TOOLCHAIN_TEST_HOST_USER"))) - - port = d.getVar("TOOLCHAIN_TEST_HOST_PORT") - content.append("set_board_info rsh_prog \"/usr/bin/ssh -p {0} -o UserKnownHostsFile=/dev/null -o StrictHostKeyChecking=no\"".format(port)) - content.append("set_board_info rcp_prog \"/usr/bin/scp -P {0} -o UserKnownHostsFile=/dev/null -o StrictHostKeyChecking=no\"".format(port)) - - return "\n".join(content) - - dejagnudir = d.expand("${WORKDIR}/dejagnu") - if not os.path.isdir(dejagnudir): - os.makedirs(dejagnudir) - - # write out target qemu board config - with open(os.path.join(dejagnudir, "user.exp"), "w") as f: - f.write(generate_qemu_linux_user_config(d)) - - # write out target ssh board config - with open(os.path.join(dejagnudir, "ssh.exp"), "w") as f: - f.write(generate_remote_ssh_linux_config(d)) - - # generate site.exp to provide boards - with open(os.path.join(dejagnudir, "site.exp"), "w") as f: - f.write("lappend boards_dir {0}\n".format(dejagnudir)) - f.write("set CFLAGS_FOR_TARGET \"{0}\"\n".format(d.getVar("TOOLCHAIN_OPTIONS"))) -} - diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch deleted file mode 100644 index 66e582ca9..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 31f94ef5b43a984a98f0eebd2dcf1b53aa1d7bce Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Fri, 29 Mar 2013 08:37:11 +0400 -Subject: [PATCH] gcc-4.3.1: ARCH_FLAGS_FOR_TARGET - -Signed-off-by: Khem Raj - -Upstream-Status: Inappropriate [embedded specific] ---- - configure | 2 +- - configure.ac | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/configure b/configure -index 5dcaab14ae9..f76310a36bb 100755 ---- a/configure -+++ b/configure -@@ -10165,7 +10165,7 @@ fi - # for target_alias and gcc doesn't manage it consistently. - target_configargs="--cache-file=./config.cache ${target_configargs}" - --FLAGS_FOR_TARGET= -+FLAGS_FOR_TARGET="$ARCH_FLAGS_FOR_TARGET" - case " $target_configdirs " in - *" newlib "*) - case " $target_configargs " in -diff --git a/configure.ac b/configure.ac -index 85977482aee..8b9097c7a45 100644 ---- a/configure.ac -+++ b/configure.ac -@@ -3346,7 +3346,7 @@ fi - # for target_alias and gcc doesn't manage it consistently. - target_configargs="--cache-file=./config.cache ${target_configargs}" - --FLAGS_FOR_TARGET= -+FLAGS_FOR_TARGET="$ARCH_FLAGS_FOR_TARGET" - case " $target_configdirs " in - *" newlib "*) - case " $target_configargs " in diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0002-gcc-poison-system-directories.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0002-gcc-poison-system-directories.patch deleted file mode 100644 index 5aa635b3d..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0002-gcc-poison-system-directories.patch +++ /dev/null @@ -1,239 +0,0 @@ -From 99f1e61b2957226254a116fde7fd73bf07034012 Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Mon, 8 Mar 2021 16:04:20 -0800 -Subject: [PATCH] gcc: poison-system-directories - -Add /sw/include and /opt/include based on the original -zecke-no-host-includes.patch patch. The original patch checked for -/usr/include, /sw/include and /opt/include and then triggered a failure and -aborted. - -Instead, we add the two missing items to the current scan. If the user -wants this to be a failure, they can add "-Werror=poison-system-directories". - -Upstream-Status: Pending -Signed-off-by: Mark Hatle -Signed-off-by: Khem Raj ---- - gcc/common.opt | 4 ++++ - gcc/config.in | 10 ++++++++++ - gcc/configure | 19 +++++++++++++++++++ - gcc/configure.ac | 16 ++++++++++++++++ - gcc/doc/invoke.texi | 9 +++++++++ - gcc/gcc.cc | 15 ++++++++++++--- - gcc/incpath.cc | 21 +++++++++++++++++++++ - 7 files changed, 91 insertions(+), 3 deletions(-) - -diff --git a/gcc/common.opt b/gcc/common.opt -index 8a0dafc52..0357868e2 100644 ---- a/gcc/common.opt -+++ b/gcc/common.opt -@@ -710,6 +710,10 @@ Wreturn-local-addr - Common Var(warn_return_local_addr) Init(1) Warning - Warn about returning a pointer/reference to a local or temporary variable. - -+Wpoison-system-directories -+Common Var(flag_poison_system_directories) Init(1) Warning -+Warn for -I and -L options using system directories if cross compiling -+ - Wshadow - Common Var(warn_shadow) Warning - Warn when one variable shadows another. Same as -Wshadow=global. -diff --git a/gcc/config.in b/gcc/config.in -index 64c27c9cf..a693cb8a8 100644 ---- a/gcc/config.in -+++ b/gcc/config.in -@@ -230,6 +230,16 @@ - #endif - - -+/* Define to warn for use of native system header directories */ -+#ifndef USED_FOR_TARGET -+#undef ENABLE_POISON_SYSTEM_DIRECTORIES -+#endif -+/* Define to warn for use of native system header directories */ -+#ifndef USED_FOR_TARGET -+#undef POISON_BY_DEFAULT -+#endif -+ -+ - /* Define if you want all operations on RTL (the basic data structure of the - optimizer and back end) to be checked for dynamic type safety at runtime. - This is quite expensive. */ -diff --git a/gcc/configure b/gcc/configure -index 2b83acfb0..8bb97578c 100755 ---- a/gcc/configure -+++ b/gcc/configure -@@ -1023,6 +1023,7 @@ enable_maintainer_mode - enable_link_mutex - enable_link_serialization - enable_version_specific_runtime_libs -+enable_poison_system_directories - enable_plugin - enable_host_shared - enable_libquadmath_support -@@ -1785,6 +1786,8 @@ Optional Features: - --enable-version-specific-runtime-libs - specify that runtime libraries should be installed - in a compiler-specific directory -+ --enable-poison-system-directories -+ warn for use of native system header directories - --enable-plugin enable plugin support - --enable-host-shared build host code as shared libraries - --disable-libquadmath-support -@@ -31996,6 +31999,22 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : - fi - - -+# Check whether --enable-poison-system-directories was given. -+if test "${enable_poison_system_directories+set}" = set; then : -+ enableval=$enable_poison_system_directories; -+else -+ enable_poison_system_directories=no -+fi -+ -+if test "x${enable_poison_system_directories}" != "xno"; then -+ -+$as_echo "#define ENABLE_POISON_SYSTEM_DIRECTORIES 1" >>confdefs.h -+if test "$enable_poison_system_directories" = "error"; then -+$as_echo "#define POISON_BY_DEFAULT 1" >>confdefs.h -+fi -+ -+fi -+ - # Substitute configuration variables - - -diff --git a/gcc/configure.ac b/gcc/configure.ac -index daf2a708c..6155b83a7 100644 ---- a/gcc/configure.ac -+++ b/gcc/configure.ac -@@ -7435,6 +7435,22 @@ AC_ARG_ENABLE(version-specific-runtime-libs, - [specify that runtime libraries should be - installed in a compiler-specific directory])]) - -+AC_ARG_ENABLE([poison-system-directories], -+ AS_HELP_STRING([--enable-poison-system-directories], -+ [warn for use of native system header directories (no/yes/error)]),, -+ [enable_poison_system_directories=no]) -+AC_MSG_NOTICE([poisoned directories $enable_poison_system_directories]) -+if test "x${enable_poison_system_directories}" != "xno"; then -+ AC_MSG_NOTICE([poisoned directories enabled]) -+ AC_DEFINE([ENABLE_POISON_SYSTEM_DIRECTORIES], -+ [1], -+ [Define to warn for use of native system header directories]) -+ if test $enable_poison_system_directories = "error"; then -+ AC_MSG_NOTICE([poisoned directories are fatal]) -+ AC_DEFINE([POISON_BY_DEFAULT], [1], [Define to make poison warnings errors]) -+ fi -+fi -+ - # Substitute configuration variables - AC_SUBST(subdirs) - AC_SUBST(srcdir) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index ff6c338be..a8ebfa59a 100644 ---- a/gcc/doc/invoke.texi -+++ b/gcc/doc/invoke.texi -@@ -379,6 +379,7 @@ Objective-C and Objective-C++ Dialects}. - -Wpacked -Wno-packed-bitfield-compat -Wpacked-not-aligned -Wpadded @gol - -Wparentheses -Wno-pedantic-ms-format @gol - -Wpointer-arith -Wno-pointer-compare -Wno-pointer-to-int-cast @gol -+-Wno-poison-system-directories @gol - -Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls @gol - -Wrestrict -Wno-return-local-addr -Wreturn-type @gol - -Wno-scalar-storage-order -Wsequence-point @gol -@@ -8029,6 +8030,14 @@ made up of data only and thus requires no special treatment. But, for - most targets, it is made up of code and thus requires the stack to be - made executable in order for the program to work properly. - -+@item -Wno-poison-system-directories -+@opindex Wno-poison-system-directories -+Do not warn for @option{-I} or @option{-L} options using system -+directories such as @file{/usr/include} when cross compiling. This -+option is intended for use in chroot environments when such -+directories contain the correct headers and libraries for the target -+system rather than the host. -+ - @item -Wfloat-equal - @opindex Wfloat-equal - @opindex Wno-float-equal -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index beefde7f6..4e6557b3c 100644 ---- a/gcc/gcc.cc -+++ b/gcc/gcc.cc -@@ -1162,6 +1162,8 @@ proper position among the other output files. */ - "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \ - "%X %{o*} %{e*} %{N} %{n} %{r}\ - %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \ -+ %{Wno-poison-system-directories:--no-poison-system-directories} \ -+ %{Werror=poison-system-directories:--error-poison-system-directories} \ - %{static|no-pie|static-pie:} %@{L*} %(mfwrap) %(link_libgcc) " \ - VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \ - %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\ -@@ -1257,8 +1259,11 @@ static const char *cpp_unique_options = - static const char *cpp_options = - "%(cpp_unique_options) %1 %{m*} %{std*&ansi&trigraphs} %{W*&pedantic*} %{w}\ - %{f*} %{g*:%{%:debug-level-gt(0):%{g*}\ -- %{!fno-working-directory:-fworking-directory}}} %{O*}\ -- %{undef} %{save-temps*:-fpch-preprocess}"; -+ %{!fno-working-directory:-fworking-directory}}} %{O*}" -+#ifdef POISON_BY_DEFAULT -+ " %{!Wno-error=poison-system-directories:-Werror=poison-system-directories}" -+#endif -+ " %{undef} %{save-temps*:-fpch-preprocess}"; - - /* Pass -d* flags, possibly modifying -dumpdir, -dumpbase et al. - -@@ -1287,7 +1292,11 @@ static const char *cc1_options = - %{coverage:-fprofile-arcs -ftest-coverage}\ - %{fprofile-arcs|fprofile-generate*|coverage:\ - %{!fprofile-update=single:\ -- %{pthread:-fprofile-update=prefer-atomic}}}"; -+ %{pthread:-fprofile-update=prefer-atomic}}}" -+#ifdef POISON_BY_DEFAULT -+ " %{!Wno-error=poison-system-directories:-Werror=poison-system-directories}" -+#endif -+ ; - - static const char *asm_options = - "%{-target-help:%:print-asm-header()} " -diff --git a/gcc/incpath.cc b/gcc/incpath.cc -index 622204a38..5ac03c086 100644 ---- a/gcc/incpath.cc -+++ b/gcc/incpath.cc -@@ -26,6 +26,7 @@ - #include "intl.h" - #include "incpath.h" - #include "cppdefault.h" -+#include "diagnostic-core.h" - - /* Microsoft Windows does not natively support inodes. - VMS has non-numeric inodes. */ -@@ -399,6 +400,26 @@ merge_include_chains (const char *sysroot, cpp_reader *pfile, int verbose) - } - fprintf (stderr, _("End of search list.\n")); - } -+ -+#ifdef ENABLE_POISON_SYSTEM_DIRECTORIES -+ if (flag_poison_system_directories) -+ { -+ struct cpp_dir *p; -+ -+ for (p = heads[INC_QUOTE]; p; p = p->next) -+ { -+ if ((!strncmp (p->name, "/usr/include", 12)) -+ || (!strncmp (p->name, "/usr/local/include", 18)) -+ || (!strncmp (p->name, "/usr/X11R6/include", 18)) -+ || (!strncmp (p->name, "/sw/include", 11)) -+ || (!strncmp (p->name, "/opt/include", 12))) -+ warning (OPT_Wpoison_system_directories, -+ "include location \"%s\" is unsafe for " -+ "cross-compilation", -+ p->name); -+ } -+ } -+#endif - } - - /* Use given -I paths for #include "..." but not #include <...>, and diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0003-64-bit-multilib-hack.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0003-64-bit-multilib-hack.patch deleted file mode 100644 index e83f05b8a..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0003-64-bit-multilib-hack.patch +++ /dev/null @@ -1,134 +0,0 @@ -From 34b861e7a4cfd7b1f0d2c0f8cf9bb0b0b81eb61a Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Fri, 29 Mar 2013 09:10:06 +0400 -Subject: [PATCH] 64-bit multilib hack. - -GCC has internal multilib handling code but it assumes a very specific rigid directory -layout. The build system implementation of multilib layout is very generic and allows -complete customisation of the library directories. - -This patch is a partial solution to allow any custom directories to be passed into gcc -and handled correctly. It forces gcc to use the base_libdir (which is the current -directory, "."). We need to do this for each multilib that is configured as we don't -know which compiler options may be being passed into the compiler. Since we have a compiler -per mulitlib at this point that isn't an issue. - -The one problem is the target compiler is only going to work for the default multlilib at -this point. Ideally we'd figure out which multilibs were being enabled with which paths -and be able to patch these entries with a complete set of correct paths but this we -don't have such code at this point. This is something the target gcc recipe should do -and override these platform defaults in its build config. - -Do same for riscv64, aarch64 & arc - -RP 15/8/11 - -Upstream-Status: Inappropriate [OE-Specific] - -Signed-off-by: Khem Raj -Signed-off-by: Elvis Dowson -Signed-off-by: Mark Hatle -Signed-off-by: Khem Raj ---- - gcc/config/aarch64/t-aarch64-linux | 8 ++++---- - gcc/config/arc/t-multilib-linux | 4 ++-- - gcc/config/i386/t-linux64 | 6 ++---- - gcc/config/mips/t-linux64 | 10 +++------- - gcc/config/riscv/t-linux | 6 ++++-- - gcc/config/rs6000/t-linux64 | 5 ++--- - 6 files changed, 17 insertions(+), 22 deletions(-) - -diff --git a/gcc/config/aarch64/t-aarch64-linux b/gcc/config/aarch64/t-aarch64-linux -index d0cd546002a..f4056d68372 100644 ---- a/gcc/config/aarch64/t-aarch64-linux -+++ b/gcc/config/aarch64/t-aarch64-linux -@@ -21,8 +21,8 @@ - LIB1ASMSRC = aarch64/lib1funcs.asm - LIB1ASMFUNCS = _aarch64_sync_cache_range - --AARCH_BE = $(if $(findstring TARGET_BIG_ENDIAN_DEFAULT=1, $(tm_defines)),_be) --MULTILIB_OSDIRNAMES = mabi.lp64=../lib64$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu) --MULTIARCH_DIRNAME = $(call if_multiarch,aarch64$(AARCH_BE)-linux-gnu) -+#AARCH_BE = $(if $(findstring TARGET_BIG_ENDIAN_DEFAULT=1, $(tm_defines)),_be) -+#MULTILIB_OSDIRNAMES = mabi.lp64=../lib64$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu) -+#MULTIARCH_DIRNAME = $(call if_multiarch,aarch64$(AARCH_BE)-linux-gnu) - --MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu_ilp32) -+#MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu_ilp32) -diff --git a/gcc/config/arc/t-multilib-linux b/gcc/config/arc/t-multilib-linux -index ecb9ae6859f..12a164028d4 100644 ---- a/gcc/config/arc/t-multilib-linux -+++ b/gcc/config/arc/t-multilib-linux -@@ -16,9 +16,9 @@ - # along with GCC; see the file COPYING3. If not see - # . - --MULTILIB_OPTIONS = mcpu=hs/mcpu=archs/mcpu=hs38/mcpu=hs38_linux/mcpu=arc700/mcpu=nps400 -+#MULTILIB_OPTIONS = mcpu=hs/mcpu=archs/mcpu=hs38/mcpu=hs38_linux/mcpu=arc700/mcpu=nps400 - --MULTILIB_DIRNAMES = hs archs hs38 hs38_linux arc700 nps400 -+#MULTILIB_DIRNAMES = hs archs hs38 hs38_linux arc700 nps400 - - # Aliases: - MULTILIB_MATCHES += mcpu?arc700=mA7 -diff --git a/gcc/config/i386/t-linux64 b/gcc/config/i386/t-linux64 -index 5526ad0e6cc..fa51c88912b 100644 ---- a/gcc/config/i386/t-linux64 -+++ b/gcc/config/i386/t-linux64 -@@ -32,7 +32,5 @@ - # - comma=, - MULTILIB_OPTIONS = $(subst $(comma),/,$(TM_MULTILIB_CONFIG)) --MULTILIB_DIRNAMES = $(patsubst m%, %, $(subst /, ,$(MULTILIB_OPTIONS))) --MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu) --MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu) --MULTILIB_OSDIRNAMES+= mx32=../libx32$(call if_multiarch,:x86_64-linux-gnux32) -+MULTILIB_DIRNAMES = . . -+MULTILIB_OSDIRNAMES = ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) -diff --git a/gcc/config/mips/t-linux64 b/gcc/config/mips/t-linux64 -index 2fdd8e00407..04f2099250f 100644 ---- a/gcc/config/mips/t-linux64 -+++ b/gcc/config/mips/t-linux64 -@@ -17,10 +17,6 @@ - # . - - MULTILIB_OPTIONS = mabi=n32/mabi=32/mabi=64 --MULTILIB_DIRNAMES = n32 32 64 --MIPS_EL = $(if $(filter %el, $(firstword $(subst -, ,$(target)))),el) --MIPS_SOFT = $(if $(strip $(filter MASK_SOFT_FLOAT_ABI, $(target_cpu_default)) $(filter soft, $(with_float))),soft) --MULTILIB_OSDIRNAMES = \ -- ../lib32$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ -- ../lib$(call if_multiarch,:mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ -- ../lib64$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) -+MULTILIB_DIRNAMES = . . . -+MULTILIB_OSDIRNAMES = ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) -+ -diff --git a/gcc/config/riscv/t-linux b/gcc/config/riscv/t-linux -index 216d2776a18..e4d817621fc 100644 ---- a/gcc/config/riscv/t-linux -+++ b/gcc/config/riscv/t-linux -@@ -1,3 +1,5 @@ - # Only XLEN and ABI affect Linux multilib dir names, e.g. /lib32/ilp32d/ --MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib64,$(MULTILIB_DIRNAMES))) --MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES)) -+#MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib64,$(MULTILIB_DIRNAMES))) -+MULTILIB_DIRNAMES := . . -+#MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES)) -+MULTILIB_OSDIRNAMES := ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) -diff --git a/gcc/config/rs6000/t-linux64 b/gcc/config/rs6000/t-linux64 -index 47e0efd5764..05f5a3f188e 100644 ---- a/gcc/config/rs6000/t-linux64 -+++ b/gcc/config/rs6000/t-linux64 -@@ -26,10 +26,9 @@ - # MULTILIB_OSDIRNAMES according to what is found on the target. - - MULTILIB_OPTIONS := m64/m32 --MULTILIB_DIRNAMES := 64 32 -+MULTILIB_DIRNAMES := . . - MULTILIB_EXTRA_OPTS := --MULTILIB_OSDIRNAMES := m64=../lib64$(call if_multiarch,:powerpc64-linux-gnu) --MULTILIB_OSDIRNAMES += m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) -+MULTILIB_OSDIRNAMES := ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) - - rs6000-linux.o: $(srcdir)/config/rs6000/rs6000-linux.cc - $(COMPILE) $< diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0004-Pass-CXXFLAGS_FOR_BUILD-in-a-couple-of-places-to-avo.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0004-Pass-CXXFLAGS_FOR_BUILD-in-a-couple-of-places-to-avo.patch deleted file mode 100644 index e8f216347..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0004-Pass-CXXFLAGS_FOR_BUILD-in-a-couple-of-places-to-avo.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 7f40f8321fb999e9b34d948724517d3fb0d26820 Mon Sep 17 00:00:00 2001 -From: Richard Purdie -Date: Thu, 28 Oct 2021 11:33:40 +0100 -Subject: [PATCH] Pass CXXFLAGS_FOR_BUILD in a couple of places to avoid these - errors. - -If CXXFLAGS contains something unsupported by the build CXX, we see build failures (e.g. using -fmacro-prefix-map for the target). - -2021-10-28 Richard Purdie - -ChangeLog: - - * Makefile.in: Regenerate. - * Makefile.tpl: Add missing CXXFLAGS_FOR_BUILD overrides - -Upstream-Status: Pending [should be submittable] - -Signed-off-by: Richard Purdie -Signed-off-by: Khem Raj ---- - Makefile.in | 2 ++ - Makefile.tpl | 2 ++ - 2 files changed, 4 insertions(+) - -diff --git a/Makefile.in b/Makefile.in -index 593495e1650..1d9c83cc566 100644 ---- a/Makefile.in -+++ b/Makefile.in -@@ -176,6 +176,7 @@ BUILD_EXPORTS = \ - # built for the build system to override those in BASE_FLAGS_TO_PASS. - EXTRA_BUILD_FLAGS = \ - CFLAGS="$(CFLAGS_FOR_BUILD)" \ -+ CXXFLAGS="$(CXXFLAGS_FOR_BUILD)" \ - LDFLAGS="$(LDFLAGS_FOR_BUILD)" - - # This is the list of directories to built for the host system. -@@ -207,6 +208,7 @@ HOST_EXPORTS = \ - CPP_FOR_BUILD="$(CPP_FOR_BUILD)"; export CPP_FOR_BUILD; \ - CPPFLAGS_FOR_BUILD="$(CPPFLAGS_FOR_BUILD)"; export CPPFLAGS_FOR_BUILD; \ - CXX_FOR_BUILD="$(CXX_FOR_BUILD)"; export CXX_FOR_BUILD; \ -+ CXXFLAGS_FOR_BUILD="$(CXXFLAGS_FOR_BUILD)"; export CXXFLAGS_FOR_BUILD; \ - DLLTOOL="$(DLLTOOL)"; export DLLTOOL; \ - DSYMUTIL="$(DSYMUTIL)"; export DSYMUTIL; \ - LD="$(LD)"; export LD; \ -diff --git a/Makefile.tpl b/Makefile.tpl -index ef58fac2b9a..bab04f335c2 100644 ---- a/Makefile.tpl -+++ b/Makefile.tpl -@@ -179,6 +179,7 @@ BUILD_EXPORTS = \ - # built for the build system to override those in BASE_FLAGS_TO_PASS. - EXTRA_BUILD_FLAGS = \ - CFLAGS="$(CFLAGS_FOR_BUILD)" \ -+ CXXFLAGS="$(CXXFLAGS_FOR_BUILD)" \ - LDFLAGS="$(LDFLAGS_FOR_BUILD)" - - # This is the list of directories to built for the host system. -@@ -210,6 +211,7 @@ HOST_EXPORTS = \ - CPP_FOR_BUILD="$(CPP_FOR_BUILD)"; export CPP_FOR_BUILD; \ - CPPFLAGS_FOR_BUILD="$(CPPFLAGS_FOR_BUILD)"; export CPPFLAGS_FOR_BUILD; \ - CXX_FOR_BUILD="$(CXX_FOR_BUILD)"; export CXX_FOR_BUILD; \ -+ CXXFLAGS_FOR_BUILD="$(CXXFLAGS_FOR_BUILD)"; export CXXFLAGS_FOR_BUILD; \ - DLLTOOL="$(DLLTOOL)"; export DLLTOOL; \ - DSYMUTIL="$(DSYMUTIL)"; export DSYMUTIL; \ - LD="$(LD)"; export LD; \ diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0005-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0005-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch deleted file mode 100644 index e34eb2cf3..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0005-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch +++ /dev/null @@ -1,92 +0,0 @@ -From 5455fc1de74897a27c1199dc5611ec02243e24af Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Fri, 29 Mar 2013 09:17:25 +0400 -Subject: [PATCH] Use the defaults.h in ${B} instead of ${S}, and t-oe in ${B} - -Use the defaults.h in ${B} instead of ${S}, and t-oe in ${B}, so that -the source can be shared between gcc-cross-initial, -gcc-cross-intermediate, gcc-cross, gcc-runtime, and also the sdk build. - -Signed-off-by: Khem Raj - -Upstream-Status: Pending - -While compiling gcc-crosssdk-initial-x86_64 on some host, there is -occasionally failure that test the existance of default.h doesn't -work, the reason is tm_include_list='** defaults.h' rather than -tm_include_list='** ./defaults.h' - -So we add the test condition for this situation. -Signed-off-by: Hongxu Jia ---- - gcc/Makefile.in | 2 +- - gcc/configure | 4 ++-- - gcc/configure.ac | 4 ++-- - gcc/mkconfig.sh | 4 ++-- - 4 files changed, 7 insertions(+), 7 deletions(-) - -diff --git a/gcc/Makefile.in b/gcc/Makefile.in -index 31ff95500c9..a8277254696 100644 ---- a/gcc/Makefile.in -+++ b/gcc/Makefile.in -@@ -553,7 +553,7 @@ TARGET_SYSTEM_ROOT = @TARGET_SYSTEM_ROOT@ - TARGET_SYSTEM_ROOT_DEFINE = @TARGET_SYSTEM_ROOT_DEFINE@ - - xmake_file=@xmake_file@ --tmake_file=@tmake_file@ -+tmake_file=@tmake_file@ ./t-oe - TM_ENDIAN_CONFIG=@TM_ENDIAN_CONFIG@ - TM_MULTILIB_CONFIG=@TM_MULTILIB_CONFIG@ - TM_MULTILIB_EXCEPTIONS_CONFIG=@TM_MULTILIB_EXCEPTIONS_CONFIG@ -diff --git a/gcc/configure b/gcc/configure -index dc2d59701ad..3fc0e2f5813 100755 ---- a/gcc/configure -+++ b/gcc/configure -@@ -13381,8 +13381,8 @@ for f in $tm_file; do - tm_include_list="${tm_include_list} $f" - ;; - defaults.h ) -- tm_file_list="${tm_file_list} \$(srcdir)/$f" -- tm_include_list="${tm_include_list} $f" -+ tm_file_list="${tm_file_list} ./$f" -+ tm_include_list="${tm_include_list} ./$f" - ;; - * ) - tm_file_list="${tm_file_list} \$(srcdir)/config/$f" -diff --git a/gcc/configure.ac b/gcc/configure.ac -index 36ce78924de..46de496b256 100644 ---- a/gcc/configure.ac -+++ b/gcc/configure.ac -@@ -2332,8 +2332,8 @@ for f in $tm_file; do - tm_include_list="${tm_include_list} $f" - ;; - defaults.h ) -- tm_file_list="${tm_file_list} \$(srcdir)/$f" -- tm_include_list="${tm_include_list} $f" -+ tm_file_list="${tm_file_list} ./$f" -+ tm_include_list="${tm_include_list} ./$f" - ;; - * ) - tm_file_list="${tm_file_list} \$(srcdir)/config/$f" -diff --git a/gcc/mkconfig.sh b/gcc/mkconfig.sh -index 91cc43f69ff..8de33713cd8 100644 ---- a/gcc/mkconfig.sh -+++ b/gcc/mkconfig.sh -@@ -77,7 +77,7 @@ if [ -n "$HEADERS" ]; then - if [ $# -ge 1 ]; then - echo '#ifdef IN_GCC' >> ${output}T - for file in "$@"; do -- if test x"$file" = x"defaults.h"; then -+ if test x"$file" = x"./defaults.h" -o x"$file" = x"defaults.h"; then - postpone_defaults_h="yes" - else - echo "# include \"$file\"" >> ${output}T -@@ -106,7 +106,7 @@ esac - - # If we postponed including defaults.h, add the #include now. - if test x"$postpone_defaults_h" = x"yes"; then -- echo "# include \"defaults.h\"" >> ${output}T -+ echo "# include \"./defaults.h\"" >> ${output}T - fi - - # Add multiple inclusion protection guard, part two. diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0006-cpp-honor-sysroot.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0006-cpp-honor-sysroot.patch deleted file mode 100644 index b08aecc73..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0006-cpp-honor-sysroot.patch +++ /dev/null @@ -1,53 +0,0 @@ -From abc3b82ab24169277f2090e9df1ceac3573142be Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Fri, 29 Mar 2013 09:22:00 +0400 -Subject: [PATCH] cpp: honor sysroot. - -Currently, if the gcc toolchain is relocated and installed from sstate, then you try and compile -preprocessed source (.i or .ii files), the compiler will try and access the builtin sysroot location -rather than the --sysroot option specified on the commandline. If access to that directory is -permission denied (unreadable), gcc will error. - -This happens when ccache is in use due to the fact it uses preprocessed source files. - -The fix below adds %I to the cpp-output spec macro so the default substitutions for -iprefix, --isystem, -isysroot happen and the correct sysroot is used. - -[YOCTO #2074] - -RP 2012/04/13 - -Signed-off-by: Khem Raj - -Upstream-Status: Pending ---- - gcc/cp/lang-specs.h | 2 +- - gcc/gcc.cc | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/gcc/cp/lang-specs.h b/gcc/cp/lang-specs.h -index f35c9fab76b..19ddc98ce7f 100644 ---- a/gcc/cp/lang-specs.h -+++ b/gcc/cp/lang-specs.h -@@ -116,7 +116,7 @@ along with GCC; see the file COPYING3. If not see - {".ii", "@c++-cpp-output", 0, 0, 0}, - {"@c++-cpp-output", - "%{!E:%{!M:%{!MM:" -- " cc1plus -fpreprocessed %i %(cc1_options) %2" -+ " cc1plus -fpreprocessed %i %I %(cc1_options) %2" - " %{!fsyntax-only:" - " %{fmodule-only:%{!S:-o %g.s%V}}" - " %{!fmodule-only:%{!fmodule-header*:%(invoke_as)}}}" -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index ce161d3c853..aa4cf92fb78 100644 ---- a/gcc/gcc.cc -+++ b/gcc/gcc.cc -@@ -1476,7 +1476,7 @@ static const struct compiler default_compilers[] = - %W{o*:--output-pch=%*}}%V}}}}}}}", 0, 0, 0}, - {".i", "@cpp-output", 0, 0, 0}, - {"@cpp-output", -- "%{!M:%{!MM:%{!E:cc1 -fpreprocessed %i %(cc1_options) %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0}, -+ "%{!M:%{!MM:%{!E:cc1 -fpreprocessed %i %I %(cc1_options) %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0}, - {".s", "@assembler", 0, 0, 0}, - {"@assembler", - "%{!M:%{!MM:%{!E:%{!S:as %(asm_debug) %(asm_options) %i %A }}}}", 0, 0, 0}, diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0007-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0007-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch deleted file mode 100644 index b59eed57e..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0007-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch +++ /dev/null @@ -1,403 +0,0 @@ -From 4de00af67b57b5440bdf61ab364ad959ad0aeee7 Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Fri, 29 Mar 2013 09:24:50 +0400 -Subject: [PATCH] Define GLIBC_DYNAMIC_LINKER and UCLIBC_DYNAMIC_LINKER - relative to SYSTEMLIBS_DIR - -This patch defines GLIBC_DYNAMIC_LINKER and UCLIBC_DYNAMIC_LINKER -relative to SYSTEMLIBS_DIR which can be set in generated headers -This breaks the assumption of hardcoded multilib in gcc -Change is only for the supported architectures in OE including -SH, sparc, alpha for possible future support (if any) - -Removes the do_headerfix task in metadata - -Signed-off-by: Khem Raj - -Upstream-Status: Inappropriate [OE configuration] -Signed-off-by: Khem Raj ---- - gcc/config/aarch64/aarch64-linux.h | 4 ++-- - gcc/config/alpha/linux-elf.h | 4 ++-- - gcc/config/arm/linux-eabi.h | 6 +++--- - gcc/config/arm/linux-elf.h | 2 +- - gcc/config/i386/linux.h | 4 ++-- - gcc/config/i386/linux64.h | 12 ++++++------ - gcc/config/linux.h | 8 ++++---- - gcc/config/loongarch/gnu-user.h | 4 ++-- - gcc/config/microblaze/linux.h | 4 ++-- - gcc/config/mips/linux.h | 18 +++++++++--------- - gcc/config/nios2/linux.h | 4 ++-- - gcc/config/riscv/linux.h | 4 ++-- - gcc/config/rs6000/linux64.h | 15 +++++---------- - gcc/config/rs6000/sysv4.h | 4 ++-- - gcc/config/s390/linux.h | 8 ++++---- - gcc/config/sh/linux.h | 4 ++-- - gcc/config/sparc/linux.h | 2 +- - gcc/config/sparc/linux64.h | 4 ++-- - 18 files changed, 53 insertions(+), 58 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h -index 5e4553d79f5..877e8841eb2 100644 ---- a/gcc/config/aarch64/aarch64-linux.h -+++ b/gcc/config/aarch64/aarch64-linux.h -@@ -21,10 +21,10 @@ - #ifndef GCC_AARCH64_LINUX_H - #define GCC_AARCH64_LINUX_H - --#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1" -+#define GLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1" - - #undef MUSL_DYNAMIC_LINKER --#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1" -+#define MUSL_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-musl-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1" - - #undef ASAN_CC1_SPEC - #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}" -diff --git a/gcc/config/alpha/linux-elf.h b/gcc/config/alpha/linux-elf.h -index 17f16a55910..0a7be38fa63 100644 ---- a/gcc/config/alpha/linux-elf.h -+++ b/gcc/config/alpha/linux-elf.h -@@ -23,8 +23,8 @@ along with GCC; see the file COPYING3. If not see - #define EXTRA_SPECS \ - { "elf_dynamic_linker", ELF_DYNAMIC_LINKER }, - --#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" --#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0" -+#define GLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-linux.so.2" -+#define UCLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-uClibc.so.0" - #if DEFAULT_LIBC == LIBC_UCLIBC - #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}" - #elif DEFAULT_LIBC == LIBC_GLIBC -diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h -index 50cc0bc6d08..17c18b27145 100644 ---- a/gcc/config/arm/linux-eabi.h -+++ b/gcc/config/arm/linux-eabi.h -@@ -65,8 +65,8 @@ - GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI. */ - - #undef GLIBC_DYNAMIC_LINKER --#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3" --#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3" -+#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT SYSTEMLIBS_DIR "ld-linux.so.3" -+#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT SYSTEMLIBS_DIR "ld-linux-armhf.so.3" - #define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT - - #define GLIBC_DYNAMIC_LINKER \ -@@ -89,7 +89,7 @@ - #define MUSL_DYNAMIC_LINKER_E "%{mbig-endian:eb}" - #endif - #define MUSL_DYNAMIC_LINKER \ -- "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1" -+ SYSTEMLIBS_DIR "ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1" - - /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to - use the GNU/Linux version, not the generic BPABI version. */ -diff --git a/gcc/config/arm/linux-elf.h b/gcc/config/arm/linux-elf.h -index df3da67c4f0..37456e9d5a4 100644 ---- a/gcc/config/arm/linux-elf.h -+++ b/gcc/config/arm/linux-elf.h -@@ -60,7 +60,7 @@ - - #define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc" - --#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" -+#define GLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-linux.so.2" - - #define LINUX_TARGET_LINK_SPEC "%{h*} \ - %{static:-Bstatic} \ -diff --git a/gcc/config/i386/linux.h b/gcc/config/i386/linux.h -index 5d99ee56d5b..a76022c9ccc 100644 ---- a/gcc/config/i386/linux.h -+++ b/gcc/config/i386/linux.h -@@ -20,7 +20,7 @@ along with GCC; see the file COPYING3. If not see - . */ - - #define GNU_USER_LINK_EMULATION "elf_i386" --#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" -+#define GLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-linux.so.2" - - #undef MUSL_DYNAMIC_LINKER --#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-i386.so.1" -+#define MUSL_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-musl-i386.so.1" -diff --git a/gcc/config/i386/linux64.h b/gcc/config/i386/linux64.h -index 8681e36f10d..ddce49b6b60 100644 ---- a/gcc/config/i386/linux64.h -+++ b/gcc/config/i386/linux64.h -@@ -27,13 +27,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see - #define GNU_USER_LINK_EMULATION64 "elf_x86_64" - #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64" - --#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2" --#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2" --#define GLIBC_DYNAMIC_LINKERX32 "/libx32/ld-linux-x32.so.2" -+#define GLIBC_DYNAMIC_LINKER32 SYSTEMLIBS_DIR "ld-linux.so.2" -+#define GLIBC_DYNAMIC_LINKER64 SYSTEMLIBS_DIR "ld-linux-x86-64.so.2" -+#define GLIBC_DYNAMIC_LINKERX32 SYSTEMLIBS_DIR "ld-linux-x32.so.2" - - #undef MUSL_DYNAMIC_LINKER32 --#define MUSL_DYNAMIC_LINKER32 "/lib/ld-musl-i386.so.1" -+#define MUSL_DYNAMIC_LINKER32 SYSTEMLIBS_DIR "ld-musl-i386.so.1" - #undef MUSL_DYNAMIC_LINKER64 --#define MUSL_DYNAMIC_LINKER64 "/lib/ld-musl-x86_64.so.1" -+#define MUSL_DYNAMIC_LINKER64 SYSTEMLIBS_DIR "ld-musl-x86_64.so.1" - #undef MUSL_DYNAMIC_LINKERX32 --#define MUSL_DYNAMIC_LINKERX32 "/lib/ld-musl-x32.so.1" -+#define MUSL_DYNAMIC_LINKERX32 SYSTEMLIBS_DIR "ld-musl-x32.so.1" -diff --git a/gcc/config/linux.h b/gcc/config/linux.h -index 74f70793d90..4ce173384ef 100644 ---- a/gcc/config/linux.h -+++ b/gcc/config/linux.h -@@ -99,10 +99,10 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see - GLIBC_DYNAMIC_LINKER must be defined for each target using them, or - GLIBC_DYNAMIC_LINKER32 and GLIBC_DYNAMIC_LINKER64 for targets - supporting both 32-bit and 64-bit compilation. */ --#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0" --#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0" --#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0" --#define UCLIBC_DYNAMIC_LINKERX32 "/lib/ldx32-uClibc.so.0" -+#define UCLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-uClibc.so.0" -+#define UCLIBC_DYNAMIC_LINKER32 SYSTEMLIBS_DIR "ld-uClibc.so.0" -+#define UCLIBC_DYNAMIC_LINKER64 SYSTEMLIBS_DIR "ld64-uClibc.so.0" -+#define UCLIBC_DYNAMIC_LINKERX32 SYSTEMLIBS_DIR "ldx32-uClibc.so.0" - #define BIONIC_DYNAMIC_LINKER "/system/bin/linker" - #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker" - #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64" -diff --git a/gcc/config/loongarch/gnu-user.h b/gcc/config/loongarch/gnu-user.h -index 664dc9206ad..082bd7cfc6f 100644 ---- a/gcc/config/loongarch/gnu-user.h -+++ b/gcc/config/loongarch/gnu-user.h -@@ -31,11 +31,11 @@ along with GCC; see the file COPYING3. If not see - - #undef GLIBC_DYNAMIC_LINKER - #define GLIBC_DYNAMIC_LINKER \ -- "/lib" ABI_GRLEN_SPEC "/ld-linux-loongarch-" ABI_SPEC ".so.1" -+ SYSTEMLIBS_DIR "ld-linux-loongarch-" ABI_SPEC ".so.1" - - #undef MUSL_DYNAMIC_LINKER - #define MUSL_DYNAMIC_LINKER \ -- "/lib" ABI_GRLEN_SPEC "/ld-musl-loongarch-" ABI_SPEC ".so.1" -+ SYSTEMLIBS_DIR "ld-musl-loongarch-" ABI_SPEC ".so.1" - - #undef GNU_USER_TARGET_LINK_SPEC - #define GNU_USER_TARGET_LINK_SPEC \ -diff --git a/gcc/config/microblaze/linux.h b/gcc/config/microblaze/linux.h -index 5b1a365eda4..2e63df1ae9c 100644 ---- a/gcc/config/microblaze/linux.h -+++ b/gcc/config/microblaze/linux.h -@@ -28,7 +28,7 @@ - #undef TLS_NEEDS_GOT - #define TLS_NEEDS_GOT 1 - --#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1" -+#define GLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "/ld.so.1" - #define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0" - - #if TARGET_BIG_ENDIAN_DEFAULT == 0 /* LE */ -@@ -38,7 +38,7 @@ - #endif - - #undef MUSL_DYNAMIC_LINKER --#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-microblaze" MUSL_DYNAMIC_LINKER_E ".so.1" -+#define MUSL_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-musl-microblaze" MUSL_DYNAMIC_LINKER_E ".so.1" - - #undef SUBTARGET_EXTRA_SPECS - #define SUBTARGET_EXTRA_SPECS \ -diff --git a/gcc/config/mips/linux.h b/gcc/config/mips/linux.h -index 230b7789bb8..d96d134bfcf 100644 ---- a/gcc/config/mips/linux.h -+++ b/gcc/config/mips/linux.h -@@ -22,29 +22,29 @@ along with GCC; see the file COPYING3. If not see - #define GNU_USER_LINK_EMULATIONN32 "elf32%{EB:b}%{EL:l}tsmipn32" - - #define GLIBC_DYNAMIC_LINKER32 \ -- "%{mnan=2008:/lib/ld-linux-mipsn8.so.1;:/lib/ld.so.1}" -+ "%{mnan=2008:" SYSTEMLIBS_DIR "ld-linux-mipsn8.so.1;:" SYSTEMLIBS_DIR "ld.so.1}" - #define GLIBC_DYNAMIC_LINKER64 \ -- "%{mnan=2008:/lib64/ld-linux-mipsn8.so.1;:/lib64/ld.so.1}" -+ "%{mnan=2008:" SYSTEMLIBS_DIR "ld-linux-mipsn8.so.1;:" SYSTEMLIBS_DIR "ld.so.1}" - #define GLIBC_DYNAMIC_LINKERN32 \ -- "%{mnan=2008:/lib32/ld-linux-mipsn8.so.1;:/lib32/ld.so.1}" -+ "%{mnan=2008:" SYSTEMLIBS_DIR "ld-linux-mipsn8.so.1;:" SYSTEMLIBS_DIR "ld.so.1}" - - #undef UCLIBC_DYNAMIC_LINKER32 - #define UCLIBC_DYNAMIC_LINKER32 \ -- "%{mnan=2008:/lib/ld-uClibc-mipsn8.so.0;:/lib/ld-uClibc.so.0}" -+ "%{mnan=2008:" SYSTEMLIBS_DIR "ld-uClibc-mipsn8.so.0;:" SYSTEMLIBS_DIR "ld-uClibc.so.0}" - #undef UCLIBC_DYNAMIC_LINKER64 - #define UCLIBC_DYNAMIC_LINKER64 \ -- "%{mnan=2008:/lib/ld64-uClibc-mipsn8.so.0;:/lib/ld64-uClibc.so.0}" -+ "%{mnan=2008:" SYSTEMLIBS_DIR "ld64-uClibc-mipsn8.so.0;:" SYSTEMLIBS_DIR "ld64-uClibc.so.0}" - #define UCLIBC_DYNAMIC_LINKERN32 \ -- "%{mnan=2008:/lib32/ld-uClibc-mipsn8.so.0;:/lib32/ld-uClibc.so.0}" -+ "%{mnan=2008:" SYSTEMLIBS_DIR "ld-uClibc-mipsn8.so.0;:" SYSTEMLIBS_DIR "ld-uClibc.so.0}" - - #undef MUSL_DYNAMIC_LINKER32 - #define MUSL_DYNAMIC_LINKER32 \ -- "/lib/ld-musl-mips%{mips32r6|mips64r6:r6}%{EL:el}%{msoft-float:-sf}.so.1" -+ SYSTEMLIBS_DIR "ld-musl-mips%{mips32r6|mips64r6:r6}%{EL:el}%{msoft-float:-sf}.so.1" - #undef MUSL_DYNAMIC_LINKER64 - #define MUSL_DYNAMIC_LINKER64 \ -- "/lib/ld-musl-mips64%{mips64r6:r6}%{EL:el}%{msoft-float:-sf}.so.1" -+ SYSTEMLIBS_DIR "ld-musl-mips64%{mips64r6:r6}%{EL:el}%{msoft-float:-sf}.so.1" - #define MUSL_DYNAMIC_LINKERN32 \ -- "/lib/ld-musl-mipsn32%{mips64r6:r6}%{EL:el}%{msoft-float:-sf}.so.1" -+ SYSTEMLIBS_DIR "ld-musl-mipsn32%{mips64r6:r6}%{EL:el}%{msoft-float:-sf}.so.1" - - #define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32" - #define GNU_USER_DYNAMIC_LINKERN32 \ -diff --git a/gcc/config/nios2/linux.h b/gcc/config/nios2/linux.h -index f5dd813acad..7a13e1c9799 100644 ---- a/gcc/config/nios2/linux.h -+++ b/gcc/config/nios2/linux.h -@@ -29,8 +29,8 @@ - #undef CPP_SPEC - #define CPP_SPEC "%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}" - --#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-nios2.so.1" --#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-nios2.so.1" -+#define GLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-linux-nios2.so.1" -+#define MUSL_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-musl-nios2.so.1" - - #undef LINK_SPEC - #define LINK_SPEC LINK_SPEC_ENDIAN \ -diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h -index 38803723ba9..d5ef8a96a19 100644 ---- a/gcc/config/riscv/linux.h -+++ b/gcc/config/riscv/linux.h -@@ -22,7 +22,7 @@ along with GCC; see the file COPYING3. If not see - GNU_USER_TARGET_OS_CPP_BUILTINS(); \ - } while (0) - --#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-riscv" XLEN_SPEC "-" ABI_SPEC ".so.1" -+#define GLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-linux-riscv" XLEN_SPEC "-" ABI_SPEC ".so.1" - - #define MUSL_ABI_SUFFIX \ - "%{mabi=ilp32:-sf}" \ -@@ -33,7 +33,7 @@ along with GCC; see the file COPYING3. If not see - "%{mabi=lp64d:}" - - #undef MUSL_DYNAMIC_LINKER --#define MUSL_DYNAMIC_LINKER "/lib/ld-musl-riscv" XLEN_SPEC MUSL_ABI_SUFFIX ".so.1" -+#define MUSL_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-musl-riscv" XLEN_SPEC MUSL_ABI_SUFFIX ".so.1" - - /* Because RISC-V only has word-sized atomics, it requries libatomic where - others do not. So link libatomic by default, as needed. */ -diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h -index b2a7afabc73..364c1a5b155 100644 ---- a/gcc/config/rs6000/linux64.h -+++ b/gcc/config/rs6000/linux64.h -@@ -339,24 +339,19 @@ extern int dot_symbols; - #undef LINK_OS_DEFAULT_SPEC - #define LINK_OS_DEFAULT_SPEC "%(link_os_linux)" - --#define GLIBC_DYNAMIC_LINKER32 "%(dynamic_linker_prefix)/lib/ld.so.1" -- -+#define GLIBC_DYNAMIC_LINKER32 SYSTEMLIBS_DIR "ld.so.1" - #ifdef LINUX64_DEFAULT_ABI_ELFv2 --#define GLIBC_DYNAMIC_LINKER64 \ --"%{mabi=elfv1:%(dynamic_linker_prefix)/lib64/ld64.so.1;" \ --":%(dynamic_linker_prefix)/lib64/ld64.so.2}" -+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:" SYSTEMLIBS_DIR "ld64.so.1;:" SYSTEMLIBS_DIR "ld64.so.2}" - #else --#define GLIBC_DYNAMIC_LINKER64 \ --"%{mabi=elfv2:%(dynamic_linker_prefix)/lib64/ld64.so.2;" \ --":%(dynamic_linker_prefix)/lib64/ld64.so.1}" -+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:" SYSTEMLIBS_DIR "ld64.so.2;:" SYSTEMLIBS_DIR "ld64.so.1}" - #endif - - #undef MUSL_DYNAMIC_LINKER32 - #define MUSL_DYNAMIC_LINKER32 \ -- "/lib/ld-musl-powerpc" MUSL_DYNAMIC_LINKER_E "%{msoft-float:-sf}.so.1" -+ SYSTEMLIBS_DIR "ld-musl-powerpc" MUSL_DYNAMIC_LINKER_E "%{msoft-float:-sf}.so.1" - #undef MUSL_DYNAMIC_LINKER64 - #define MUSL_DYNAMIC_LINKER64 \ -- "/lib/ld-musl-powerpc64" MUSL_DYNAMIC_LINKER_E "%{msoft-float:-sf}.so.1" -+ SYSTEMLIBS_DIR "ld-musl-powerpc64" MUSL_DYNAMIC_LINKER_E "%{msoft-float:-sf}.so.1" - - #undef DEFAULT_ASM_ENDIAN - #if (TARGET_DEFAULT & MASK_LITTLE_ENDIAN) -diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h -index 7e2519de5d4..a73954d9de5 100644 ---- a/gcc/config/rs6000/sysv4.h -+++ b/gcc/config/rs6000/sysv4.h -@@ -779,10 +779,10 @@ GNU_USER_TARGET_CC1_SPEC - - #define MUSL_DYNAMIC_LINKER_E ENDIAN_SELECT("","le","") - --#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1" -+#define GLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld.so.1" - #undef MUSL_DYNAMIC_LINKER - #define MUSL_DYNAMIC_LINKER \ -- "/lib/ld-musl-powerpc" MUSL_DYNAMIC_LINKER_E "%{msoft-float:-sf}.so.1" -+ SYSTEMLIBS_DIR "ld-musl-powerpc" MUSL_DYNAMIC_LINKER_E "%{msoft-float:-sf}.so.1" - - #ifndef GNU_USER_DYNAMIC_LINKER - #define GNU_USER_DYNAMIC_LINKER GLIBC_DYNAMIC_LINKER -diff --git a/gcc/config/s390/linux.h b/gcc/config/s390/linux.h -index d7b7e7a7b02..0139b4d06ca 100644 ---- a/gcc/config/s390/linux.h -+++ b/gcc/config/s390/linux.h -@@ -72,13 +72,13 @@ along with GCC; see the file COPYING3. If not see - #define MULTILIB_DEFAULTS { "m31" } - #endif - --#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1" --#define GLIBC_DYNAMIC_LINKER64 "/lib/ld64.so.1" -+#define GLIBC_DYNAMIC_LINKER32 SYSTEMLIBS_DIR "ld.so.1" -+#define GLIBC_DYNAMIC_LINKER64 SYSTEMLIBS_DIR "ld64.so.1" - - #undef MUSL_DYNAMIC_LINKER32 --#define MUSL_DYNAMIC_LINKER32 "/lib/ld-musl-s390.so.1" -+#define MUSL_DYNAMIC_LINKER32 SYSTEMLIBS_DIR "ld-musl-s390.so.1" - #undef MUSL_DYNAMIC_LINKER64 --#define MUSL_DYNAMIC_LINKER64 "/lib/ld-musl-s390x.so.1" -+#define MUSL_DYNAMIC_LINKER64 SYSTEMLIBS_DIR "ld-musl-s390x.so.1" - - #undef LINK_SPEC - #define LINK_SPEC \ -diff --git a/gcc/config/sh/linux.h b/gcc/config/sh/linux.h -index d96d077c99e..7d27f9893ee 100644 ---- a/gcc/config/sh/linux.h -+++ b/gcc/config/sh/linux.h -@@ -61,10 +61,10 @@ along with GCC; see the file COPYING3. If not see - - #undef MUSL_DYNAMIC_LINKER - #define MUSL_DYNAMIC_LINKER \ -- "/lib/ld-musl-sh" MUSL_DYNAMIC_LINKER_E MUSL_DYNAMIC_LINKER_FP \ -+ SYSTEMLIBS_DIR "ld-musl-sh" MUSL_DYNAMIC_LINKER_E MUSL_DYNAMIC_LINKER_FP \ - "%{mfdpic:-fdpic}.so.1" - --#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" -+#define GLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-linux.so.2" - - #undef SUBTARGET_LINK_EMUL_SUFFIX - #define SUBTARGET_LINK_EMUL_SUFFIX "%{mfdpic:_fd;:_linux}" -diff --git a/gcc/config/sparc/linux.h b/gcc/config/sparc/linux.h -index 6a809e9092d..60603765ad6 100644 ---- a/gcc/config/sparc/linux.h -+++ b/gcc/config/sparc/linux.h -@@ -78,7 +78,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); - When the -shared link option is used a final link is not being - done. */ - --#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" -+#define GLIBC_DYNAMIC_LINKER SYSTEMLIBS_DIR "ld-linux.so.2" - - #undef LINK_SPEC - #define LINK_SPEC "-m elf32_sparc %{shared:-shared} \ -diff --git a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h -index d08a2ef96fe..e6955da0a5b 100644 ---- a/gcc/config/sparc/linux64.h -+++ b/gcc/config/sparc/linux64.h -@@ -78,8 +78,8 @@ along with GCC; see the file COPYING3. If not see - When the -shared link option is used a final link is not being - done. */ - --#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2" --#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux.so.2" -+#define GLIBC_DYNAMIC_LINKER32 SYSTEMLIBS_DIR "ld-linux.so.2" -+#define GLIBC_DYNAMIC_LINKER64 SYSTEMLIBS_DIR "ld-linux.so.2" - - #ifdef SPARC_BI_ARCH - diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0008-libtool.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0008-libtool.patch deleted file mode 100644 index c9bc38ccf..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0008-libtool.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 5117519c1897a49b09fe7fff213b9c2ea15d37f5 Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Fri, 29 Mar 2013 09:29:11 +0400 -Subject: [PATCH] libtool - -libstdc++ from gcc-runtime gets created with -rpath=/usr/lib/../lib for qemux86-64 -when running on am x86_64 build host. - -This patch stops this speading to libdir in the libstdc++.la file within libtool. -Arguably, it shouldn't be passing this into libtool in the first place but -for now this resolves the nastiest problems this causes. - -func_normal_abspath would resolve an empty path to `pwd` so we need -to filter the zero case. - -RP 2012/8/24 - -Signed-off-by: Khem Raj - -Upstream-Status: Pending ---- - ltmain.sh | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/ltmain.sh b/ltmain.sh -index 70990740b6c..ee938056bef 100644 ---- a/ltmain.sh -+++ b/ltmain.sh -@@ -6359,6 +6359,10 @@ func_mode_link () - func_warning "ignoring multiple \`-rpath's for a libtool library" - - install_libdir="$1" -+ if test -n "$install_libdir"; then -+ func_normal_abspath "$install_libdir" -+ install_libdir=$func_normal_abspath_result -+ fi - - oldlibs= - if test -z "$rpath"; then diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0009-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0009-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch deleted file mode 100644 index dd67b115f..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0009-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 32129f9682d0d27fc67af10f077ad2768935cbe6 Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Fri, 29 Mar 2013 09:30:32 +0400 -Subject: [PATCH] gcc: armv4: pass fix-v4bx to linker to support EABI. - -The LINK_SPEC for linux gets overwritten by linux-eabi.h which -means the value of TARGET_FIX_V4BX_SPEC gets lost and as a result -the option is not passed to linker when chosing march=armv4 -This patch redefines this in linux-eabi.h and reinserts it -for eabi defaulting toolchains. - -We might want to send it upstream. - -Signed-off-by: Khem Raj - -Upstream-Status: Pending ---- - gcc/config/arm/linux-eabi.h | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - -diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h -index 17c18b27145..8eacb099317 100644 ---- a/gcc/config/arm/linux-eabi.h -+++ b/gcc/config/arm/linux-eabi.h -@@ -91,10 +91,14 @@ - #define MUSL_DYNAMIC_LINKER \ - SYSTEMLIBS_DIR "ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1" - -+/* For armv4 we pass --fix-v4bx to linker to support EABI */ -+#undef TARGET_FIX_V4BX_SPEC -+#define TARGET_FIX_V4BX_SPEC "%{mcpu=arm8|mcpu=arm810|mcpu=strongarm*|march=armv4: --fix-v4bx}" -+ - /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to - use the GNU/Linux version, not the generic BPABI version. */ - #undef LINK_SPEC --#define LINK_SPEC EABI_LINK_SPEC \ -+#define LINK_SPEC TARGET_FIX_V4BX_SPEC EABI_LINK_SPEC \ - LINUX_OR_ANDROID_LD (LINUX_TARGET_LINK_SPEC, \ - LINUX_TARGET_LINK_SPEC " " ANDROID_LINK_SPEC) - diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0010-Use-the-multilib-config-files-from-B-instead-of-usin.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0010-Use-the-multilib-config-files-from-B-instead-of-usin.patch deleted file mode 100644 index 45edc62eb..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0010-Use-the-multilib-config-files-from-B-instead-of-usin.patch +++ /dev/null @@ -1,99 +0,0 @@ -From bf85b8bbcb4b77725d4c22c1bb25a29f6ff21038 Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Fri, 29 Mar 2013 09:33:04 +0400 -Subject: [PATCH] Use the multilib config files from ${B} instead of using the - ones from ${S} - -Use the multilib config files from ${B} instead of using the ones from ${S} -so that the source can be shared between gcc-cross-initial, -gcc-cross-intermediate, gcc-cross, gcc-runtime, and also the sdk build. - -Signed-off-by: Khem Raj -Signed-off-by: Constantin Musca - -Upstream-Status: Inappropriate [configuration] ---- - gcc/configure | 22 ++++++++++++++++++---- - gcc/configure.ac | 22 ++++++++++++++++++---- - 2 files changed, 36 insertions(+), 8 deletions(-) - -diff --git a/gcc/configure b/gcc/configure -index 3fc0e2f5813..2f0f0e057a9 100755 ---- a/gcc/configure -+++ b/gcc/configure -@@ -13361,10 +13361,20 @@ done - tmake_file_= - for f in ${tmake_file} - do -- if test -f ${srcdir}/config/$f -- then -- tmake_file_="${tmake_file_} \$(srcdir)/config/$f" -- fi -+ case $f in -+ */t-linux64 ) -+ if test -f ./config/$f -+ then -+ tmake_file_="${tmake_file_} ./config/$f" -+ fi -+ ;; -+ * ) -+ if test -f ${srcdir}/config/$f -+ then -+ tmake_file_="${tmake_file_} \$(srcdir)/config/$f" -+ fi -+ ;; -+ esac - done - tmake_file="${tmake_file_}${omp_device_property_tmake_file}" - -@@ -13375,6 +13385,10 @@ tm_file_list="options.h" - tm_include_list="options.h insn-constants.h" - for f in $tm_file; do - case $f in -+ */linux64.h ) -+ tm_file_list="${tm_file_list} ./config/$f" -+ tm_include_list="${tm_include_list} ./config/$f" -+ ;; - ./* ) - f=`echo $f | sed 's/^..//'` - tm_file_list="${tm_file_list} $f" -diff --git a/gcc/configure.ac b/gcc/configure.ac -index 46de496b256..6155b83a732 100644 ---- a/gcc/configure.ac -+++ b/gcc/configure.ac -@@ -2312,10 +2312,20 @@ done - tmake_file_= - for f in ${tmake_file} - do -- if test -f ${srcdir}/config/$f -- then -- tmake_file_="${tmake_file_} \$(srcdir)/config/$f" -- fi -+ case $f in -+ */t-linux64 ) -+ if test -f ./config/$f -+ then -+ tmake_file_="${tmake_file_} ./config/$f" -+ fi -+ ;; -+ * ) -+ if test -f ${srcdir}/config/$f -+ then -+ tmake_file_="${tmake_file_} \$(srcdir)/config/$f" -+ fi -+ ;; -+ esac - done - tmake_file="${tmake_file_}${omp_device_property_tmake_file}" - -@@ -2326,6 +2336,10 @@ tm_file_list="options.h" - tm_include_list="options.h insn-constants.h" - for f in $tm_file; do - case $f in -+ */linux64.h ) -+ tm_file_list="${tm_file_list} ./config/$f" -+ tm_include_list="${tm_include_list} ./config/$f" -+ ;; - ./* ) - f=`echo $f | sed 's/^..//'` - tm_file_list="${tm_file_list} $f" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0011-Avoid-using-libdir-from-.la-which-usually-points-to-.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0011-Avoid-using-libdir-from-.la-which-usually-points-to-.patch deleted file mode 100644 index 352c6eec2..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0011-Avoid-using-libdir-from-.la-which-usually-points-to-.patch +++ /dev/null @@ -1,28 +0,0 @@ -From e5463727ff028cee5e452da38f5b4c44d52e412e Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Fri, 20 Feb 2015 09:39:38 +0000 -Subject: [PATCH] Avoid using libdir from .la which usually points to a host - path - -Upstream-Status: Inappropriate [embedded specific] - -Signed-off-by: Jonathan Liu -Signed-off-by: Khem Raj ---- - ltmain.sh | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/ltmain.sh b/ltmain.sh -index ee938056bef..9ebc7e3d1e0 100644 ---- a/ltmain.sh -+++ b/ltmain.sh -@@ -5628,6 +5628,9 @@ func_mode_link () - absdir="$abs_ladir" - libdir="$abs_ladir" - else -+ # Instead of using libdir from .la which usually points to a host path, -+ # use the path the .la is contained in. -+ libdir="$abs_ladir" - dir="$libdir" - absdir="$libdir" - fi diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0011-aarch64-Fix-include-paths-when-S-B.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0011-aarch64-Fix-include-paths-when-S-B.patch deleted file mode 100644 index f52e21edc..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0011-aarch64-Fix-include-paths-when-S-B.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 710d1325474e708e6b34eebe09f3f130420af293 Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Tue, 31 Jan 2023 22:03:38 -0800 -Subject: [PATCH] aarch64: Fix include paths when S != B - -aarch64.h gets copied into build directory when built out of tree, in -this case build uses this file but does not find the includes inside it -since they are not found in any of include paths specified in compiler -cmdline. - -Fixes build errors like - -% g++ -c -isystem/mnt/b/yoe/master/build/tmp/work/x86_64-linux/gcc-cross-aarch64/13.0.1-r0/recipe-sysroot-native/usr/include -O2 -pipe -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE -fno-exceptions -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wmissing-format-attribute -Wconditionally-supported -Woverloaded-virtual -pedantic -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings -DHAVE_CONFIG_H -DGENERATOR_FILE -I. -Ibuild -I../../../../../../../work-shared/gcc-13.0.1-r0/gcc-b2ec2504af77b35e748067eeb846821d12a6b6b4/gcc -I../../../../../../../work-shared/gcc-13.0.1-r0/gcc-b2ec2504af77b35e748067eeb846821d12a6b6b4/gcc/build -I../../../../../../../work-shared/gcc-13.0.1-r0/gcc-b2ec2504af77b35e748067eeb846821d12a6b6b4/gcc/../include -I../../../../../../../work-shared/gcc-13.0.1-r0/gcc-b2ec2504af77b35e748067eeb846821d12a6b6b4/gcc/../libcpp/include -o build/gencheck.o ../../../../../../../work-shared/gcc-13.0.1-r0/gcc-b2ec2504af77b35e748067eeb846821d12a6b6b4/gcc/gencheck.cc -In file included from ./tm.h:34, - from ../../../../../../../work-shared/gcc-13.0.1-r0/gcc-b2ec2504af77b35e748067eeb846821d12a6b6b4/gcc/gencheck.cc:23: -./config/aarch64/aarch64.h:164:10: fatal error: aarch64-option-extensions.def: No such file or directory - 164 | #include "aarch64-option-extensions.def" - | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -compilation terminated. - -See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105144 - -Upstream-Status: Pending - -Signed-off-by: Khem Raj ---- - gcc/config/aarch64/aarch64.h | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h -index 155cace6afe..07d68958908 100644 ---- a/gcc/config/aarch64/aarch64.h -+++ b/gcc/config/aarch64/aarch64.h -@@ -161,8 +161,8 @@ - enum class aarch64_feature : unsigned char { - #define AARCH64_OPT_EXTENSION(A, IDENT, C, D, E, F) IDENT, - #define AARCH64_ARCH(A, B, IDENT, D, E) IDENT, --#include "aarch64-option-extensions.def" --#include "aarch64-arches.def" -+#include "config/aarch64/aarch64-option-extensions.def" -+#include "config/aarch64/aarch64-arches.def" - }; - - /* Define unique flags for each of the above. */ -@@ -171,8 +171,8 @@ enum class aarch64_feature : unsigned char { - = aarch64_feature_flags (1) << int (aarch64_feature::IDENT); - #define AARCH64_OPT_EXTENSION(A, IDENT, C, D, E, F) HANDLE (IDENT) - #define AARCH64_ARCH(A, B, IDENT, D, E) HANDLE (IDENT) --#include "aarch64-option-extensions.def" --#include "aarch64-arches.def" -+#include "config/aarch64/aarch64-option-extensions.def" -+#include "config/aarch64/aarch64-arches.def" - #undef HANDLE - - #endif diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0012-Avoid-using-libdir-from-.la-which-usually-points-to-.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0012-Avoid-using-libdir-from-.la-which-usually-points-to-.patch deleted file mode 100644 index b05be59c7..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0012-Avoid-using-libdir-from-.la-which-usually-points-to-.patch +++ /dev/null @@ -1,28 +0,0 @@ -From e8e8a0ab572cfceb9758f99599c0db4c962e49c0 Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Fri, 20 Feb 2015 09:39:38 +0000 -Subject: [PATCH] Avoid using libdir from .la which usually points to a host - path - -Upstream-Status: Inappropriate [embedded specific] - -Signed-off-by: Jonathan Liu -Signed-off-by: Khem Raj ---- - ltmain.sh | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/ltmain.sh b/ltmain.sh -index ee938056bef..9ebc7e3d1e0 100644 ---- a/ltmain.sh -+++ b/ltmain.sh -@@ -5628,6 +5628,9 @@ func_mode_link () - absdir="$abs_ladir" - libdir="$abs_ladir" - else -+ # Instead of using libdir from .la which usually points to a host path, -+ # use the path the .la is contained in. -+ libdir="$abs_ladir" - dir="$libdir" - absdir="$libdir" - fi diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0013-Ensure-target-gcc-headers-can-be-included.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0013-Ensure-target-gcc-headers-can-be-included.patch deleted file mode 100644 index 61e61ecc6..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0013-Ensure-target-gcc-headers-can-be-included.patch +++ /dev/null @@ -1,113 +0,0 @@ -From 612801d426e75ff997cfabda380dbe52c2cbc532 Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Fri, 20 Feb 2015 10:25:11 +0000 -Subject: [PATCH] Ensure target gcc headers can be included - -There are a few headers installed as part of the OpenEmbedded -gcc-runtime target (omp.h, ssp/*.h). Being installed from a recipe -built for the target architecture, these are within the target -sysroot and not cross/nativesdk; thus they weren't able to be -found by gcc with the existing search paths. Add support for -picking up these headers under the sysroot supplied on the gcc -command line in order to resolve this. - -Extend target gcc headers search to musl too - -Upstream-Status: Pending - -Signed-off-by: Paul Eggleton -Signed-off-by: Khem Raj ---- - gcc/Makefile.in | 2 ++ - gcc/config/linux.h | 8 ++++++++ - gcc/config/rs6000/sysv4.h | 8 ++++++++ - gcc/cppdefault.cc | 4 ++++ - 4 files changed, 22 insertions(+) - -diff --git a/gcc/Makefile.in b/gcc/Makefile.in -index a8277254696..07fa63b6640 100644 ---- a/gcc/Makefile.in -+++ b/gcc/Makefile.in -@@ -632,6 +632,7 @@ libexecdir = @libexecdir@ - - # Directory in which the compiler finds libraries etc. - libsubdir = $(libdir)/gcc/$(real_target_noncanonical)/$(version)$(accel_dir_suffix) -+libsubdir_target = $(target_noncanonical)/$(version) - # Directory in which the compiler finds executables - libexecsubdir = $(libexecdir)/gcc/$(real_target_noncanonical)/$(version)$(accel_dir_suffix) - # Directory in which all plugin resources are installed -@@ -3024,6 +3025,7 @@ CFLAGS-intl.o += -DLOCALEDIR=\"$(localedir)\" - - PREPROCESSOR_DEFINES = \ - -DGCC_INCLUDE_DIR=\"$(libsubdir)/include\" \ -+ -DGCC_INCLUDE_SUBDIR_TARGET=\"$(libsubdir_target)/include\" \ - -DFIXED_INCLUDE_DIR=\"$(libsubdir)/include-fixed\" \ - -DGPLUSPLUS_INCLUDE_DIR=\"$(gcc_gxx_include_dir)\" \ - -DGPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT=$(gcc_gxx_include_dir_add_sysroot) \ -diff --git a/gcc/config/linux.h b/gcc/config/linux.h -index 4ce173384ef..8a3cd4f2d34 100644 ---- a/gcc/config/linux.h -+++ b/gcc/config/linux.h -@@ -170,6 +170,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see - #define INCLUDE_DEFAULTS_MUSL_TOOL - #endif - -+#ifdef GCC_INCLUDE_SUBDIR_TARGET -+#define INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET \ -+ { STANDARD_STARTFILE_PREFIX_2 GCC_INCLUDE_SUBDIR_TARGET, "GCC", 0, 0, 1, 0}, -+#else -+#define INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET -+#endif -+ - #ifdef NATIVE_SYSTEM_HEADER_DIR - #define INCLUDE_DEFAULTS_MUSL_NATIVE \ - { NATIVE_SYSTEM_HEADER_DIR, 0, 0, 0, 1, 2 }, \ -@@ -196,6 +203,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see - INCLUDE_DEFAULTS_MUSL_PREFIX \ - INCLUDE_DEFAULTS_MUSL_CROSS \ - INCLUDE_DEFAULTS_MUSL_TOOL \ -+ INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET \ - INCLUDE_DEFAULTS_MUSL_NATIVE \ - { GCC_INCLUDE_DIR, "GCC", 0, 1, 0, 0 }, \ - { 0, 0, 0, 0, 0, 0 } \ -diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h -index a73954d9de5..e5dd6538358 100644 ---- a/gcc/config/rs6000/sysv4.h -+++ b/gcc/config/rs6000/sysv4.h -@@ -994,6 +994,13 @@ ncrtn.o%s" - #define INCLUDE_DEFAULTS_MUSL_TOOL - #endif - -+#ifdef GCC_INCLUDE_SUBDIR_TARGET -+#define INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET \ -+ { STANDARD_STARTFILE_PREFIX_2 GCC_INCLUDE_SUBDIR_TARGET, "GCC", 0, 0, 1, 0}, -+#else -+#define INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET -+#endif -+ - #ifdef NATIVE_SYSTEM_HEADER_DIR - #define INCLUDE_DEFAULTS_MUSL_NATIVE \ - { NATIVE_SYSTEM_HEADER_DIR, 0, 0, 0, 1, 2 }, \ -@@ -1020,6 +1027,7 @@ ncrtn.o%s" - INCLUDE_DEFAULTS_MUSL_PREFIX \ - INCLUDE_DEFAULTS_MUSL_CROSS \ - INCLUDE_DEFAULTS_MUSL_TOOL \ -+ INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET \ - INCLUDE_DEFAULTS_MUSL_NATIVE \ - { GCC_INCLUDE_DIR, "GCC", 0, 1, 0, 0 }, \ - { 0, 0, 0, 0, 0, 0 } \ -diff --git a/gcc/cppdefault.cc b/gcc/cppdefault.cc -index 7888300f277..52cf14e92f8 100644 ---- a/gcc/cppdefault.cc -+++ b/gcc/cppdefault.cc -@@ -64,6 +64,10 @@ const struct default_include cpp_include_defaults[] - /* This is the dir for gcc's private headers. */ - { GCC_INCLUDE_DIR, "GCC", 0, 0, 0, 0 }, - #endif -+#ifdef GCC_INCLUDE_SUBDIR_TARGET -+ /* This is the dir for gcc's private headers under the specified sysroot. */ -+ { STANDARD_STARTFILE_PREFIX_2 GCC_INCLUDE_SUBDIR_TARGET, "GCC", 0, 0, 1, 0 }, -+#endif - #ifdef LOCAL_INCLUDE_DIR - /* /usr/local/include comes before the fixincluded header files. */ - { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 2 }, diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0014-Don-t-search-host-directory-during-relink-if-inst_pr.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0014-Don-t-search-host-directory-during-relink-if-inst_pr.patch deleted file mode 100644 index 94308b2ac..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0014-Don-t-search-host-directory-during-relink-if-inst_pr.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 9ae49e7b88c208ab79ec9c2fc4a2fa8a3f1e85bb Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Tue, 3 Mar 2015 08:21:19 +0000 -Subject: [PATCH] Don't search host directory during "relink" if $inst_prefix - is provided - -http://lists.gnu.org/archive/html/libtool-patches/2011-01/msg00026.html - -Upstream-Status: Submitted - -Signed-off-by: Khem Raj ---- - ltmain.sh | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - -diff --git a/ltmain.sh b/ltmain.sh -index 9ebc7e3d1e0..7ea79fa8be6 100644 ---- a/ltmain.sh -+++ b/ltmain.sh -@@ -6004,12 +6004,13 @@ func_mode_link () - fi - else - # We cannot seem to hardcode it, guess we'll fake it. -+ # Default if $libdir is not relative to the prefix: - add_dir="-L$libdir" -- # Try looking first in the location we're being installed to. -+ - if test -n "$inst_prefix_dir"; then - case $libdir in - [\\/]*) -- add_dir="$add_dir -L$inst_prefix_dir$libdir" -+ add_dir="-L$inst_prefix_dir$libdir" - ;; - esac - fi diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0015-libcc1-fix-libcc1-s-install-path-and-rpath.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0015-libcc1-fix-libcc1-s-install-path-and-rpath.patch deleted file mode 100644 index ce9635ce4..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0015-libcc1-fix-libcc1-s-install-path-and-rpath.patch +++ /dev/null @@ -1,51 +0,0 @@ -From bf918db7117f41d3c04162095641165ca241707d Mon Sep 17 00:00:00 2001 -From: Robert Yang -Date: Sun, 5 Jul 2015 20:25:18 -0700 -Subject: [PATCH] libcc1: fix libcc1's install path and rpath - -* Install libcc1.so and libcc1plugin.so into - $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version), as what we - had done to lto-plugin. -* Fix bad RPATH iussue: - gcc-5.2.0: package gcc-plugins contains bad RPATH /patht/to/tmp/sysroots/qemux86-64/usr/lib64/../lib64 in file - /path/to/gcc/5.2.0-r0/packages-split/gcc-plugins/usr/lib64/gcc/x86_64-poky-linux/5.2.0/plugin/libcc1plugin.so.0.0.0 - [rpaths] - -Upstream-Status: Inappropriate [OE configuration] - -Signed-off-by: Robert Yang ---- - libcc1/Makefile.am | 4 ++-- - libcc1/Makefile.in | 4 ++-- - 2 files changed, 4 insertions(+), 4 deletions(-) - -diff --git a/libcc1/Makefile.am b/libcc1/Makefile.am -index 6e3a34ff7e2..3f3f6391aba 100644 ---- a/libcc1/Makefile.am -+++ b/libcc1/Makefile.am -@@ -40,8 +40,8 @@ libiberty = $(if $(wildcard $(libiberty_noasan)),$(Wc)$(libiberty_noasan), \ - $(Wc)$(libiberty_normal))) - libiberty_dep = $(patsubst $(Wc)%,%,$(libiberty)) - --plugindir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/plugin --cc1libdir = $(libdir)/$(libsuffix) -+cc1libdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) -+plugindir = $(cc1libdir) - - if ENABLE_PLUGIN - plugin_LTLIBRARIES = libcc1plugin.la libcp1plugin.la -diff --git a/libcc1/Makefile.in b/libcc1/Makefile.in -index f8f590d71e9..56462492045 100644 ---- a/libcc1/Makefile.in -+++ b/libcc1/Makefile.in -@@ -396,8 +396,8 @@ libiberty = $(if $(wildcard $(libiberty_noasan)),$(Wc)$(libiberty_noasan), \ - $(Wc)$(libiberty_normal))) - - libiberty_dep = $(patsubst $(Wc)%,%,$(libiberty)) --plugindir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/plugin --cc1libdir = $(libdir)/$(libsuffix) -+cc1libdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) -+plugindir = $(cc1libdir) - @ENABLE_PLUGIN_TRUE@plugin_LTLIBRARIES = libcc1plugin.la libcp1plugin.la - @ENABLE_PLUGIN_TRUE@cc1lib_LTLIBRARIES = libcc1.la - shared_source = callbacks.cc callbacks.hh connection.cc connection.hh \ diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0016-handle-sysroot-support-for-nativesdk-gcc.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0016-handle-sysroot-support-for-nativesdk-gcc.patch deleted file mode 100644 index 3b5471953..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0016-handle-sysroot-support-for-nativesdk-gcc.patch +++ /dev/null @@ -1,510 +0,0 @@ -From 4fbbd40d7db89cdbeaf93df1e1da692b1f80a5bc Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Mon, 7 Dec 2015 23:39:54 +0000 -Subject: [PATCH] handle sysroot support for nativesdk-gcc - -Being able to build a nativesdk gcc is useful, particularly in cases -where the host compiler may be of an incompatible version (or a 32 -bit compiler is needed). - -Sadly, building nativesdk-gcc is not straight forward. We install -nativesdk-gcc into a relocatable location and this means that its -library locations can change. "Normal" sysroot support doesn't help -in this case since the values of paths like "libdir" change, not just -base root directory of the system. - -In order to handle this we do two things: - -a) Add %r into spec file markup which can be used for injected paths - such as SYSTEMLIBS_DIR (see gcc_multilib_setup()). -b) Add other paths which need relocation into a .gccrelocprefix section - which the relocation code will notice and adjust automatically. - -Upstream-Status: Inappropriate -RP 2015/7/28 - -Extend the gccrelocprefix support to musl config too, this ensures -that gcc will get right bits in SDK installations - -Signed-off-by: Khem Raj - -Added PREFIXVAR and EXEC_PREFIXVAR to support runtime relocation. Without -these as part of the gccrelocprefix the system can't do runtime relocation -if the executable is moved. (These paths were missed in the original -implementation.) - -Signed-off-by: Mark Hatle ---- - gcc/c-family/c-opts.cc | 4 +-- - gcc/config/linux.h | 24 +++++++-------- - gcc/config/rs6000/sysv4.h | 24 +++++++-------- - gcc/cppdefault.cc | 63 ++++++++++++++++++++++++--------------- - gcc/cppdefault.h | 13 ++++---- - gcc/gcc.cc | 20 +++++++++---- - gcc/incpath.cc | 12 ++++---- - gcc/prefix.cc | 6 ++-- - 8 files changed, 94 insertions(+), 72 deletions(-) - -diff --git a/gcc/c-family/c-opts.cc b/gcc/c-family/c-opts.cc -index a341a061758..83b0bef4dbb 100644 ---- a/gcc/c-family/c-opts.cc -+++ b/gcc/c-family/c-opts.cc -@@ -1458,8 +1458,8 @@ add_prefixed_path (const char *suffix, incpath_kind chain) - size_t prefix_len, suffix_len; - - suffix_len = strlen (suffix); -- prefix = iprefix ? iprefix : cpp_GCC_INCLUDE_DIR; -- prefix_len = iprefix ? strlen (iprefix) : cpp_GCC_INCLUDE_DIR_len; -+ prefix = iprefix ? iprefix : GCC_INCLUDE_DIRVAR; -+ prefix_len = iprefix ? strlen (iprefix) : strlen(GCC_INCLUDE_DIRVAR) - 7; - - path = (char *) xmalloc (prefix_len + suffix_len + 1); - memcpy (path, prefix, prefix_len); -diff --git a/gcc/config/linux.h b/gcc/config/linux.h -index 8a3cd4f2d34..58143dff731 100644 ---- a/gcc/config/linux.h -+++ b/gcc/config/linux.h -@@ -134,53 +134,53 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see - * Unfortunately, this is mostly duplicated from cppdefault.cc */ - #if DEFAULT_LIBC == LIBC_MUSL - #define INCLUDE_DEFAULTS_MUSL_GPP \ -- { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1, \ -+ { GPLUSPLUS_INCLUDE_DIRVAR, "G++", 1, 1, \ - GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 0 }, \ -- { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1, \ -+ { GPLUSPLUS_TOOL_INCLUDE_DIRVAR, "G++", 1, 1, \ - GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 1 }, \ -- { GPLUSPLUS_BACKWARD_INCLUDE_DIR, "G++", 1, 1, \ -+ { GPLUSPLUS_BACKWARD_INCLUDE_DIRVAR, "G++", 1, 1, \ - GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 0 }, - - #ifdef LOCAL_INCLUDE_DIR - #define INCLUDE_DEFAULTS_MUSL_LOCAL \ -- { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 2 }, \ -- { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 0 }, -+ { LOCAL_INCLUDE_DIRVAR, 0, 0, 1, 1, 2 }, \ -+ { LOCAL_INCLUDE_DIRVAR, 0, 0, 1, 1, 0 }, - #else - #define INCLUDE_DEFAULTS_MUSL_LOCAL - #endif - - #ifdef PREFIX_INCLUDE_DIR - #define INCLUDE_DEFAULTS_MUSL_PREFIX \ -- { PREFIX_INCLUDE_DIR, 0, 0, 1, 0, 0}, -+ { PREFIX_INCLUDE_DIRVAR, 0, 0, 1, 0, 0}, - #else - #define INCLUDE_DEFAULTS_MUSL_PREFIX - #endif - - #ifdef CROSS_INCLUDE_DIR - #define INCLUDE_DEFAULTS_MUSL_CROSS \ -- { CROSS_INCLUDE_DIR, "GCC", 0, 0, 0, 0}, -+ { CROSS_INCLUDE_DIRVAR, "GCC", 0, 0, 0, 0}, - #else - #define INCLUDE_DEFAULTS_MUSL_CROSS - #endif - - #ifdef TOOL_INCLUDE_DIR - #define INCLUDE_DEFAULTS_MUSL_TOOL \ -- { TOOL_INCLUDE_DIR, "BINUTILS", 0, 1, 0, 0}, -+ { TOOL_INCLUDE_DIRVAR, "BINUTILS", 0, 1, 0, 0}, - #else - #define INCLUDE_DEFAULTS_MUSL_TOOL - #endif - - #ifdef GCC_INCLUDE_SUBDIR_TARGET - #define INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET \ -- { STANDARD_STARTFILE_PREFIX_2 GCC_INCLUDE_SUBDIR_TARGET, "GCC", 0, 0, 1, 0}, -+ { STANDARD_STARTFILE_PREFIX_2VAR, "GCC", 0, 0, 1, 0}, - #else - #define INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET - #endif - - #ifdef NATIVE_SYSTEM_HEADER_DIR - #define INCLUDE_DEFAULTS_MUSL_NATIVE \ -- { NATIVE_SYSTEM_HEADER_DIR, 0, 0, 0, 1, 2 }, \ -- { NATIVE_SYSTEM_HEADER_DIR, 0, 0, 0, 1, 0 }, -+ { NATIVE_SYSTEM_HEADER_DIRVAR, 0, 0, 0, 1, 2 }, \ -+ { NATIVE_SYSTEM_HEADER_DIRVAR, 0, 0, 0, 1, 0 }, - #else - #define INCLUDE_DEFAULTS_MUSL_NATIVE - #endif -@@ -205,7 +205,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see - INCLUDE_DEFAULTS_MUSL_TOOL \ - INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET \ - INCLUDE_DEFAULTS_MUSL_NATIVE \ -- { GCC_INCLUDE_DIR, "GCC", 0, 1, 0, 0 }, \ -+ { GCC_INCLUDE_DIRVAR, "GCC", 0, 1, 0, 0 }, \ - { 0, 0, 0, 0, 0, 0 } \ - } - #endif -diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h -index e5dd6538358..b496849b792 100644 ---- a/gcc/config/rs6000/sysv4.h -+++ b/gcc/config/rs6000/sysv4.h -@@ -958,53 +958,53 @@ ncrtn.o%s" - /* Include order changes for musl, same as in generic linux.h. */ - #if DEFAULT_LIBC == LIBC_MUSL - #define INCLUDE_DEFAULTS_MUSL_GPP \ -- { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1, \ -+ { GPLUSPLUS_INCLUDE_DIRVAR, "G++", 1, 1, \ - GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 0 }, \ -- { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1, \ -+ { GPLUSPLUS_TOOL_INCLUDE_DIRVAR, "G++", 1, 1, \ - GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 1 }, \ -- { GPLUSPLUS_BACKWARD_INCLUDE_DIR, "G++", 1, 1, \ -+ { GPLUSPLUS_BACKWARD_INCLUDE_DIRVAR, "G++", 1, 1, \ - GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 0 }, - - #ifdef LOCAL_INCLUDE_DIR - #define INCLUDE_DEFAULTS_MUSL_LOCAL \ -- { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 2 }, \ -- { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 0 }, -+ { LOCAL_INCLUDE_DIRVAR, 0, 0, 1, 1, 2 }, \ -+ { LOCAL_INCLUDE_DIRVAR, 0, 0, 1, 1, 0 }, - #else - #define INCLUDE_DEFAULTS_MUSL_LOCAL - #endif - - #ifdef PREFIX_INCLUDE_DIR - #define INCLUDE_DEFAULTS_MUSL_PREFIX \ -- { PREFIX_INCLUDE_DIR, 0, 0, 1, 0, 0}, -+ { PREFIX_INCLUDE_DIRVAR, 0, 0, 1, 0, 0}, - #else - #define INCLUDE_DEFAULTS_MUSL_PREFIX - #endif - - #ifdef CROSS_INCLUDE_DIR - #define INCLUDE_DEFAULTS_MUSL_CROSS \ -- { CROSS_INCLUDE_DIR, "GCC", 0, 0, 0, 0}, -+ { CROSS_INCLUDE_DIRVAR, "GCC", 0, 0, 0, 0}, - #else - #define INCLUDE_DEFAULTS_MUSL_CROSS - #endif - - #ifdef TOOL_INCLUDE_DIR - #define INCLUDE_DEFAULTS_MUSL_TOOL \ -- { TOOL_INCLUDE_DIR, "BINUTILS", 0, 1, 0, 0}, -+ { TOOL_INCLUDE_DIRVAR, "BINUTILS", 0, 1, 0, 0}, - #else - #define INCLUDE_DEFAULTS_MUSL_TOOL - #endif - - #ifdef GCC_INCLUDE_SUBDIR_TARGET - #define INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET \ -- { STANDARD_STARTFILE_PREFIX_2 GCC_INCLUDE_SUBDIR_TARGET, "GCC", 0, 0, 1, 0}, -+ { STANDARD_STARTFILE_PREFIX_2VAR, "GCC", 0, 0, 1, 0}, - #else - #define INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET - #endif - - #ifdef NATIVE_SYSTEM_HEADER_DIR - #define INCLUDE_DEFAULTS_MUSL_NATIVE \ -- { NATIVE_SYSTEM_HEADER_DIR, 0, 0, 0, 1, 2 }, \ -- { NATIVE_SYSTEM_HEADER_DIR, 0, 0, 0, 1, 0 }, -+ { NATIVE_SYSTEM_HEADER_DIRVAR, 0, 0, 0, 1, 2 }, \ -+ { NATIVE_SYSTEM_HEADER_DIRVAR, 0, 0, 0, 1, 0 }, - #else - #define INCLUDE_DEFAULTS_MUSL_NATIVE - #endif -@@ -1029,7 +1029,7 @@ ncrtn.o%s" - INCLUDE_DEFAULTS_MUSL_TOOL \ - INCLUDE_DEFAULTS_MUSL_SUBDIR_TARGET \ - INCLUDE_DEFAULTS_MUSL_NATIVE \ -- { GCC_INCLUDE_DIR, "GCC", 0, 1, 0, 0 }, \ -+ { GCC_INCLUDE_DIRVAR, "GCC", 0, 1, 0, 0 }, \ - { 0, 0, 0, 0, 0, 0 } \ - } - #endif -diff --git a/gcc/cppdefault.cc b/gcc/cppdefault.cc -index 52cf14e92f8..d8977afc05e 100644 ---- a/gcc/cppdefault.cc -+++ b/gcc/cppdefault.cc -@@ -35,6 +35,30 @@ - # undef CROSS_INCLUDE_DIR - #endif - -+static char GPLUSPLUS_INCLUDE_DIRVAR[4096] __attribute__ ((section (".gccrelocprefix"))) = GPLUSPLUS_INCLUDE_DIR; -+char GCC_INCLUDE_DIRVAR[4096] __attribute__ ((section (".gccrelocprefix"))) = GCC_INCLUDE_DIR; -+static char GPLUSPLUS_TOOL_INCLUDE_DIRVAR[4096] __attribute__ ((section (".gccrelocprefix"))) = GPLUSPLUS_TOOL_INCLUDE_DIR; -+static char GPLUSPLUS_BACKWARD_INCLUDE_DIRVAR[4096] __attribute__ ((section (".gccrelocprefix"))) = GPLUSPLUS_BACKWARD_INCLUDE_DIR; -+static char STANDARD_STARTFILE_PREFIX_2VAR[4096] __attribute__ ((section (".gccrelocprefix"))) = STANDARD_STARTFILE_PREFIX_2 GCC_INCLUDE_SUBDIR_TARGET; -+#ifdef LOCAL_INCLUDE_DIR -+static char LOCAL_INCLUDE_DIRVAR[4096] __attribute__ ((section (".gccrelocprefix"))) = LOCAL_INCLUDE_DIR; -+#endif -+#ifdef PREFIX_INCLUDE_DIR -+static char PREFIX_INCLUDE_DIRVAR[4096] __attribute__ ((section (".gccrelocprefix"))) = PREFIX_INCLUDE_DIR; -+#endif -+#ifdef FIXED_INCLUDE_DIR -+static char FIXED_INCLUDE_DIRVAR[4096] __attribute__ ((section (".gccrelocprefix"))) = FIXED_INCLUDE_DIR; -+#endif -+#ifdef CROSS_INCLUDE_DIR -+static char CROSS_INCLUDE_DIRVAR[4096] __attribute__ ((section (".gccrelocprefix"))) = CROSS_INCLUDE_DIR; -+#endif -+#ifdef TOOL_INCLUDE_DIR -+static char TOOL_INCLUDE_DIRVAR[4096] __attribute__ ((section (".gccrelocprefix"))) = TOOL_INCLUDE_DIR; -+#endif -+#ifdef NATIVE_SYSTEM_HEADER_DIR -+static char NATIVE_SYSTEM_HEADER_DIRVAR[4096] __attribute__ ((section (".gccrelocprefix"))) = NATIVE_SYSTEM_HEADER_DIR; -+#endif -+ - const struct default_include cpp_include_defaults[] - #ifdef INCLUDE_DEFAULTS - = INCLUDE_DEFAULTS; -@@ -42,17 +66,17 @@ const struct default_include cpp_include_defaults[] - = { - #ifdef GPLUSPLUS_INCLUDE_DIR - /* Pick up GNU C++ generic include files. */ -- { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1, -+ { GPLUSPLUS_INCLUDE_DIRVAR, "G++", 1, 1, - GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 0 }, - #endif - #ifdef GPLUSPLUS_TOOL_INCLUDE_DIR - /* Pick up GNU C++ target-dependent include files. */ -- { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1, -+ { GPLUSPLUS_TOOL_INCLUDE_DIRVAR, "G++", 1, 1, - GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 1 }, - #endif - #ifdef GPLUSPLUS_BACKWARD_INCLUDE_DIR - /* Pick up GNU C++ backward and deprecated include files. */ -- { GPLUSPLUS_BACKWARD_INCLUDE_DIR, "G++", 1, 1, -+ { GPLUSPLUS_BACKWARD_INCLUDE_DIRVAR, "G++", 1, 1, - GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 0 }, - #endif - #ifdef GPLUSPLUS_LIBCXX_INCLUDE_DIR -@@ -62,23 +86,23 @@ const struct default_include cpp_include_defaults[] - #endif - #ifdef GCC_INCLUDE_DIR - /* This is the dir for gcc's private headers. */ -- { GCC_INCLUDE_DIR, "GCC", 0, 0, 0, 0 }, -+ { GCC_INCLUDE_DIRVAR, "GCC", 0, 0, 0, 0 }, - #endif - #ifdef GCC_INCLUDE_SUBDIR_TARGET - /* This is the dir for gcc's private headers under the specified sysroot. */ -- { STANDARD_STARTFILE_PREFIX_2 GCC_INCLUDE_SUBDIR_TARGET, "GCC", 0, 0, 1, 0 }, -+ { STANDARD_STARTFILE_PREFIX_2VAR, "GCC", 0, 0, 1, 0 }, - #endif - #ifdef LOCAL_INCLUDE_DIR - /* /usr/local/include comes before the fixincluded header files. */ -- { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 2 }, -- { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 0 }, -+ { LOCAL_INCLUDE_DIRVAR, 0, 0, 1, 1, 2 }, -+ { LOCAL_INCLUDE_DIRVAR, 0, 0, 1, 1, 0 }, - #endif - #ifdef PREFIX_INCLUDE_DIR -- { PREFIX_INCLUDE_DIR, 0, 0, 1, 0, 0 }, -+ { PREFIX_INCLUDE_DIRVAR, 0, 0, 1, 0, 0 }, - #endif - #ifdef FIXED_INCLUDE_DIR - /* This is the dir for fixincludes. */ -- { FIXED_INCLUDE_DIR, "GCC", 0, 0, 0, -+ { FIXED_INCLUDE_DIRVAR, "GCC", 0, 0, 0, - /* A multilib suffix needs adding if different multilibs use - different headers. */ - #ifdef SYSROOT_HEADERS_SUFFIX_SPEC -@@ -90,33 +114,24 @@ const struct default_include cpp_include_defaults[] - #endif - #ifdef CROSS_INCLUDE_DIR - /* One place the target system's headers might be. */ -- { CROSS_INCLUDE_DIR, "GCC", 0, 0, 0, 0 }, -+ { CROSS_INCLUDE_DIRVAR, "GCC", 0, 0, 0, 0 }, - #endif - #ifdef TOOL_INCLUDE_DIR - /* Another place the target system's headers might be. */ -- { TOOL_INCLUDE_DIR, "BINUTILS", 0, 1, 0, 0 }, -+ { TOOL_INCLUDE_DIRVAR, "BINUTILS", 0, 1, 0, 0 }, - #endif - #ifdef NATIVE_SYSTEM_HEADER_DIR - /* /usr/include comes dead last. */ -- { NATIVE_SYSTEM_HEADER_DIR, NATIVE_SYSTEM_HEADER_COMPONENT, 0, 0, 1, 2 }, -- { NATIVE_SYSTEM_HEADER_DIR, NATIVE_SYSTEM_HEADER_COMPONENT, 0, 0, 1, 0 }, -+ { NATIVE_SYSTEM_HEADER_DIRVAR, NATIVE_SYSTEM_HEADER_COMPONENT, 0, 0, 1, 2 }, -+ { NATIVE_SYSTEM_HEADER_DIRVAR, NATIVE_SYSTEM_HEADER_COMPONENT, 0, 0, 1, 0 }, - #endif - { 0, 0, 0, 0, 0, 0 } - }; - #endif /* no INCLUDE_DEFAULTS */ - --#ifdef GCC_INCLUDE_DIR --const char cpp_GCC_INCLUDE_DIR[] = GCC_INCLUDE_DIR; --const size_t cpp_GCC_INCLUDE_DIR_len = sizeof GCC_INCLUDE_DIR - 8; --#else --const char cpp_GCC_INCLUDE_DIR[] = ""; --const size_t cpp_GCC_INCLUDE_DIR_len = 0; --#endif -- - /* The configured prefix. */ --const char cpp_PREFIX[] = PREFIX; --const size_t cpp_PREFIX_len = sizeof PREFIX - 1; --const char cpp_EXEC_PREFIX[] = STANDARD_EXEC_PREFIX; -+char PREFIXVAR[4096] __attribute__ ((section (".gccrelocprefix"))) = PREFIX; -+char EXEC_PREFIXVAR[4096] __attribute__ ((section (".gccrelocprefix"))) = STANDARD_EXEC_PREFIX; - - /* This value is set by cpp_relocated at runtime */ - const char *gcc_exec_prefix; -diff --git a/gcc/cppdefault.h b/gcc/cppdefault.h -index fb97c0b5814..6267150facc 100644 ---- a/gcc/cppdefault.h -+++ b/gcc/cppdefault.h -@@ -33,7 +33,8 @@ - - struct default_include - { -- const char *const fname; /* The name of the directory. */ -+ const char *fname; /* The name of the directory. */ -+ - const char *const component; /* The component containing the directory - (see update_path in prefix.cc) */ - const char cplusplus; /* When this is non-zero, we should only -@@ -55,17 +56,13 @@ struct default_include - }; - - extern const struct default_include cpp_include_defaults[]; --extern const char cpp_GCC_INCLUDE_DIR[]; --extern const size_t cpp_GCC_INCLUDE_DIR_len; -+extern char GCC_INCLUDE_DIRVAR[] __attribute__ ((section (".gccrelocprefix"))); - - /* The configure-time prefix, i.e., the value supplied as the argument - to --prefix=. */ --extern const char cpp_PREFIX[]; -+extern char PREFIXVAR[] __attribute__ ((section (".gccrelocprefix"))); - /* The length of the configure-time prefix. */ --extern const size_t cpp_PREFIX_len; --/* The configure-time execution prefix. This is typically the lib/gcc -- subdirectory of cpp_PREFIX. */ --extern const char cpp_EXEC_PREFIX[]; -+extern char EXEC_PREFIXVAR[] __attribute__ ((section (".gccrelocprefix"))); - /* The run-time execution prefix. This is typically the lib/gcc - subdirectory of the actual installation. */ - extern const char *gcc_exec_prefix; -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index aa4cf92fb78..5569a39a14a 100644 ---- a/gcc/gcc.cc -+++ b/gcc/gcc.cc -@@ -252,6 +252,8 @@ FILE *report_times_to_file = NULL; - #endif - static const char *target_system_root = DEFAULT_TARGET_SYSTEM_ROOT; - -+static char target_relocatable_prefix[4096] __attribute__ ((section (".gccrelocprefix"))) = SYSTEMLIBS_DIR; -+ - /* Nonzero means pass the updated target_system_root to the compiler. */ - - static int target_system_root_changed; -@@ -575,6 +577,7 @@ or with constant text in a single argument. - %G process LIBGCC_SPEC as a spec. - %R Output the concatenation of target_system_root and - target_sysroot_suffix. -+ %r Output the base path target_relocatable_prefix - %S process STARTFILE_SPEC as a spec. A capital S is actually used here. - %E process ENDFILE_SPEC as a spec. A capital E is actually used here. - %C process CPP_SPEC as a spec. -@@ -1627,10 +1630,10 @@ static const char *gcc_libexec_prefix; - gcc_exec_prefix is set because, in that case, we know where the - compiler has been installed, and use paths relative to that - location instead. */ --static const char *const standard_exec_prefix = STANDARD_EXEC_PREFIX; --static const char *const standard_libexec_prefix = STANDARD_LIBEXEC_PREFIX; --static const char *const standard_bindir_prefix = STANDARD_BINDIR_PREFIX; --static const char *const standard_startfile_prefix = STANDARD_STARTFILE_PREFIX; -+static char standard_exec_prefix[4096] __attribute__ ((section (".gccrelocprefix"))) = STANDARD_EXEC_PREFIX; -+static char standard_libexec_prefix[4096] __attribute__ ((section (".gccrelocprefix"))) = STANDARD_LIBEXEC_PREFIX; -+static char standard_bindir_prefix[4096] __attribute__ ((section (".gccrelocprefix"))) = STANDARD_BINDIR_PREFIX; -+static char *const standard_startfile_prefix = STANDARD_STARTFILE_PREFIX; - - /* For native compilers, these are well-known paths containing - components that may be provided by the system. For cross -@@ -1638,9 +1641,9 @@ static const char *const standard_startfile_prefix = STANDARD_STARTFILE_PREFIX; - static const char *md_exec_prefix = MD_EXEC_PREFIX; - static const char *md_startfile_prefix = MD_STARTFILE_PREFIX; - static const char *md_startfile_prefix_1 = MD_STARTFILE_PREFIX_1; --static const char *const standard_startfile_prefix_1 -+static char standard_startfile_prefix_1[4096] __attribute__ ((section (".gccrelocprefix"))) - = STANDARD_STARTFILE_PREFIX_1; --static const char *const standard_startfile_prefix_2 -+static char standard_startfile_prefix_2[4096] __attribute__ ((section (".gccrelocprefix"))) - = STANDARD_STARTFILE_PREFIX_2; - - /* A relative path to be used in finding the location of tools -@@ -6676,6 +6679,11 @@ do_spec_1 (const char *spec, int inswitch, const char *soft_matched_part) - } - break; - -+ case 'r': -+ obstack_grow (&obstack, target_relocatable_prefix, -+ strlen (target_relocatable_prefix)); -+ break; -+ - case 'S': - value = do_spec_1 (startfile_spec, 0, NULL); - if (value != 0) -diff --git a/gcc/incpath.cc b/gcc/incpath.cc -index c80f100f476..5ac03c08693 100644 ---- a/gcc/incpath.cc -+++ b/gcc/incpath.cc -@@ -135,7 +135,7 @@ add_standard_paths (const char *sysroot, const char *iprefix, - int relocated = cpp_relocated (); - size_t len; - -- if (iprefix && (len = cpp_GCC_INCLUDE_DIR_len) != 0) -+ if (iprefix && (len = strlen(GCC_INCLUDE_DIRVAR) - 7) != 0) - { - /* Look for directories that start with the standard prefix. - "Translate" them, i.e. replace /usr/local/lib/gcc... with -@@ -150,7 +150,7 @@ add_standard_paths (const char *sysroot, const char *iprefix, - now. */ - if (sysroot && p->add_sysroot) - continue; -- if (!filename_ncmp (p->fname, cpp_GCC_INCLUDE_DIR, len)) -+ if (!filename_ncmp (p->fname, GCC_INCLUDE_DIRVAR, len)) - { - char *str = concat (iprefix, p->fname + len, NULL); - if (p->multilib == 1 && imultilib) -@@ -191,7 +191,7 @@ add_standard_paths (const char *sysroot, const char *iprefix, - free (sysroot_no_trailing_dir_separator); - } - else if (!p->add_sysroot && relocated -- && !filename_ncmp (p->fname, cpp_PREFIX, cpp_PREFIX_len)) -+ && !filename_ncmp (p->fname, PREFIXVAR, strlen(PREFIXVAR))) - { - static const char *relocated_prefix; - char *ostr; -@@ -208,12 +208,12 @@ add_standard_paths (const char *sysroot, const char *iprefix, - dummy = concat (gcc_exec_prefix, "dummy", NULL); - relocated_prefix - = make_relative_prefix (dummy, -- cpp_EXEC_PREFIX, -- cpp_PREFIX); -+ EXEC_PREFIXVAR, -+ PREFIXVAR); - free (dummy); - } - ostr = concat (relocated_prefix, -- p->fname + cpp_PREFIX_len, -+ p->fname + strlen(PREFIXVAR), - NULL); - str = update_path (ostr, p->component); - free (ostr); -diff --git a/gcc/prefix.cc b/gcc/prefix.cc -index 096ed5afa3d..2526f0ecc39 100644 ---- a/gcc/prefix.cc -+++ b/gcc/prefix.cc -@@ -72,7 +72,9 @@ License along with GCC; see the file COPYING3. If not see - #include "prefix.h" - #include "common/common-target.h" - --static const char *std_prefix = PREFIX; -+char PREFIXVAR1[4096] __attribute__ ((section (".gccrelocprefix"))) = PREFIX; -+ -+static const char *std_prefix = PREFIXVAR1; - - static const char *get_key_value (char *); - static char *translate_name (char *); -@@ -212,7 +214,7 @@ translate_name (char *name) - prefix = getenv (key); - - if (prefix == 0) -- prefix = PREFIX; -+ prefix = PREFIXVAR1; - - /* We used to strip trailing DIR_SEPARATORs here, but that can - sometimes yield a result with no separator when one was coded diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0017-Search-target-sysroot-gcc-version-specific-dirs-with.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0017-Search-target-sysroot-gcc-version-specific-dirs-with.patch deleted file mode 100644 index 9b05da64a..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0017-Search-target-sysroot-gcc-version-specific-dirs-with.patch +++ /dev/null @@ -1,99 +0,0 @@ -From 33a1f07a4417247dc24819d4e583ca09f56d5a7b Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Mon, 7 Dec 2015 23:41:45 +0000 -Subject: [PATCH] Search target sysroot gcc version specific dirs with - multilib. - -We install the gcc libraries (such as crtbegin.p) into -//5.2.0/ -which is a default search path for GCC (aka multi_suffix in the -code below). is 'machine' in gcc's terminology. We use -these directories so that multiple gcc versions could in theory -co-exist on target. - -We only want to build one gcc-cross-canadian per arch and have this work -for all multilibs. can be handled by mapping the multilib - to the one used by gcc-cross-canadian, e.g. -mips64-polkmllib32-linux -is symlinked to by mips64-poky-linux. - -The default gcc search path in the target sysroot for a "lib64" mutlilib -is: - -/lib32/mips64-poky-linux/5.2.0/ -/lib32/../lib64/ -/usr/lib32/mips64-poky-linux/5.2.0/ -/usr/lib32/../lib64/ -/lib32/ -/usr/lib32/ - -which means that the lib32 crtbegin.o will be found and the lib64 ones -will not which leads to compiler failures. - -This patch injects a multilib version of that path first so the lib64 -binaries can be found first. With this change the search path becomes: - -/lib32/../lib64/mips64-poky-linux/5.2.0/ -/lib32/mips64-poky-linux/5.2.0/ -/lib32/../lib64/ -/usr/lib32/../lib64/mips64-poky-linux/5.2.0/ -/usr/lib32/mips64-poky-linux/5.2.0/ -/usr/lib32/../lib64/ -/lib32/ -/usr/lib32/ - -Upstream-Status: Pending -RP 2015/7/31 - -Signed-off-by: Khem Raj ---- - gcc/gcc.cc | 29 ++++++++++++++++++++++++++++- - 1 file changed, 28 insertions(+), 1 deletion(-) - -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 5569a39a14a..4598f6cd7c9 100644 ---- a/gcc/gcc.cc -+++ b/gcc/gcc.cc -@@ -2817,7 +2817,7 @@ for_each_path (const struct path_prefix *paths, - if (path == NULL) - { - len = paths->max_len + extra_space + 1; -- len += MAX (MAX (suffix_len, multi_os_dir_len), multiarch_len); -+ len += MAX ((suffix_len + multi_os_dir_len), multiarch_len); - path = XNEWVEC (char, len); - } - -@@ -2829,6 +2829,33 @@ for_each_path (const struct path_prefix *paths, - /* Look first in MACHINE/VERSION subdirectory. */ - if (!skip_multi_dir) - { -+ if (!(pl->os_multilib ? skip_multi_os_dir : skip_multi_dir)) -+ { -+ const char *this_multi; -+ size_t this_multi_len; -+ -+ if (pl->os_multilib) -+ { -+ this_multi = multi_os_dir; -+ this_multi_len = multi_os_dir_len; -+ } -+ else -+ { -+ this_multi = multi_dir; -+ this_multi_len = multi_dir_len; -+ } -+ -+ /* Look in multilib MACHINE/VERSION subdirectory first */ -+ if (this_multi_len) -+ { -+ memcpy (path + len, this_multi, this_multi_len + 1); -+ memcpy (path + len + this_multi_len, multi_suffix, suffix_len + 1); -+ ret = callback (path, callback_info); -+ if (ret) -+ break; -+ } -+ } -+ - memcpy (path + len, multi_suffix, suffix_len + 1); - ret = callback (path, callback_info); - if (ret) diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0018-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0018-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch deleted file mode 100644 index 56793e03a..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0018-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch +++ /dev/null @@ -1,84 +0,0 @@ -From d7dc2861840e88a4592817a398a054a886c3f3ee Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Tue, 27 Jun 2017 18:10:54 -0700 -Subject: [PATCH] Add ssp_nonshared to link commandline for musl targets - -when -fstack-protector options are enabled we need to -link with ssp_shared on musl since it does not provide -the __stack_chk_fail_local() so essentially it provides -libssp but not libssp_nonshared something like -TARGET_LIBC_PROVIDES_SSP_BUT_NOT_SSP_NONSHARED - where-as for glibc the needed symbols -are already present in libc_nonshared library therefore -we do not need any library helper on glibc based systems -but musl needs the libssp_noshared from gcc - -Upstream-Status: Pending - -Signed-off-by: Khem Raj ---- - gcc/config/linux.h | 7 +++++++ - gcc/config/rs6000/linux.h | 10 ++++++++++ - gcc/config/rs6000/linux64.h | 10 ++++++++++ - 3 files changed, 27 insertions(+) - -diff --git a/gcc/config/linux.h b/gcc/config/linux.h -index 58143dff731..d2409ccac26 100644 ---- a/gcc/config/linux.h -+++ b/gcc/config/linux.h -@@ -208,6 +208,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see - { GCC_INCLUDE_DIRVAR, "GCC", 0, 1, 0, 0 }, \ - { 0, 0, 0, 0, 0, 0 } \ - } -+#ifdef TARGET_LIBC_PROVIDES_SSP -+#undef LINK_SSP_SPEC -+#define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ -+ "|fstack-protector-strong|fstack-protector-explicit" \ -+ ":-lssp_nonshared}" -+#endif -+ - #endif - - #if (DEFAULT_LIBC == LIBC_UCLIBC) && defined (SINGLE_LIBC) /* uClinux */ -diff --git a/gcc/config/rs6000/linux.h b/gcc/config/rs6000/linux.h -index 8c9039ac1e5..259cd485973 100644 ---- a/gcc/config/rs6000/linux.h -+++ b/gcc/config/rs6000/linux.h -@@ -99,6 +99,16 @@ - " -m elf32ppclinux") - #endif - -+/* link libssp_nonshared.a with musl */ -+#if DEFAULT_LIBC == LIBC_MUSL -+#ifdef TARGET_LIBC_PROVIDES_SSP -+#undef LINK_SSP_SPEC -+#define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ -+ "|fstack-protector-strong|fstack-protector-explicit" \ -+ ":-lssp_nonshared}" -+#endif -+#endif -+ - #undef LINK_OS_LINUX_SPEC - #define LINK_OS_LINUX_SPEC LINK_OS_LINUX_EMUL " %{!shared: %{!static: \ - %{!static-pie: \ -diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h -index 364c1a5b155..e33d9ae98e0 100644 ---- a/gcc/config/rs6000/linux64.h -+++ b/gcc/config/rs6000/linux64.h -@@ -372,6 +372,16 @@ extern int dot_symbols; - " -m elf64ppc") - #endif - -+/* link libssp_nonshared.a with musl */ -+#if DEFAULT_LIBC == LIBC_MUSL -+#ifdef TARGET_LIBC_PROVIDES_SSP -+#undef LINK_SSP_SPEC -+#define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ -+ "|fstack-protector-strong|fstack-protector-explicit" \ -+ ":-lssp_nonshared}" -+#endif -+#endif -+ - #define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " %{!shared: %{!static: \ - %{!static-pie: \ - %{rdynamic:-export-dynamic} \ diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0019-Re-introduce-spe-commandline-options.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0019-Re-introduce-spe-commandline-options.patch deleted file mode 100644 index bb1699be2..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0019-Re-introduce-spe-commandline-options.patch +++ /dev/null @@ -1,39 +0,0 @@ -From bf0d7c463e1fab62804556099b56319fe94be1eb Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Wed, 6 Jun 2018 12:10:22 -0700 -Subject: [PATCH] Re-introduce spe commandline options - -This should ensure that we keep accepting -spe options - -Upstream-Status: Inappropriate [SPE port is removed from rs600 port] - -Signed-off-by: Khem Raj ---- - gcc/config/rs6000/rs6000.opt | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - -diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt -index 4931d781c4e..3fb87b6f7d5 100644 ---- a/gcc/config/rs6000/rs6000.opt -+++ b/gcc/config/rs6000/rs6000.opt -@@ -348,6 +348,19 @@ mdebug= - Target RejectNegative Joined - -mdebug= Enable debug output. - -+; PPC SPE ABI -+mspe -+Target Var(rs6000_spe) Save -+Generate SPE SIMD instructions on E500. -+ -+mabi=spe -+Target RejectNegative Var(rs6000_spe_abi) Save -+Use the SPE ABI extensions. -+ -+mabi=no-spe -+Target RejectNegative Var(rs6000_spe_abi, 0) -+Do not use the SPE ABI extensions. -+ - ; Altivec ABI - mabi=altivec - Target RejectNegative Var(rs6000_altivec_abi) Save diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0020-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0020-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch deleted file mode 100644 index f37092089..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0020-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch +++ /dev/null @@ -1,83 +0,0 @@ -From a32c75b37209d6836eaaa943dc6b1207acba5d27 Mon Sep 17 00:00:00 2001 -From: Szabolcs Nagy -Date: Sat, 24 Oct 2015 20:09:53 +0000 -Subject: [PATCH] libgcc_s: Use alias for __cpu_indicator_init instead of - symver - -Adapter from - -https://gcc.gnu.org/ml/gcc-patches/2015-05/msg00899.html - -This fix was debated but hasnt been applied gcc upstream since -they expect musl to support '@' in symbol versioning which is -a sun/gnu versioning extention. This patch however avoids the -need for the '@' symbols at all - -libgcc/Changelog: - -2015-05-11 Szabolcs Nagy - - * config/i386/cpuinfo.c (__cpu_indicator_init_local): Add. - (__cpu_indicator_init@GCC_4.8.0, __cpu_model@GCC_4.8.0): Remove. - - * config/i386/t-linux (HOST_LIBGCC2_CFLAGS): Remove -DUSE_ELF_SYMVER. - -gcc/Changelog: - -2015-05-11 Szabolcs Nagy - - * config/i386/i386-expand.c (ix86_expand_builtin): Make __builtin_cpu_init - call __cpu_indicator_init_local instead of __cpu_indicator_init. - -Upstream-Status: Pending - -Signed-off-by: Khem Raj ---- - gcc/config/i386/i386-expand.cc | 4 ++-- - libgcc/config/i386/cpuinfo.c | 6 +++--- - libgcc/config/i386/t-linux | 2 +- - 3 files changed, 6 insertions(+), 6 deletions(-) - -diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc -index 68978ef8dc2..0c71f36b572 100644 ---- a/gcc/config/i386/i386-expand.cc -+++ b/gcc/config/i386/i386-expand.cc -@@ -12321,10 +12321,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, - { - case IX86_BUILTIN_CPU_INIT: - { -- /* Make it call __cpu_indicator_init in libgcc. */ -+ /* Make it call __cpu_indicator_init_local in libgcc.a. */ - tree call_expr, fndecl, type; - type = build_function_type_list (integer_type_node, NULL_TREE); -- fndecl = build_fn_decl ("__cpu_indicator_init", type); -+ fndecl = build_fn_decl ("__cpu_indicator_init_local", type); - call_expr = build_call_expr (fndecl, 0); - return expand_expr (call_expr, target, mode, EXPAND_NORMAL); - } -diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c -index dab1d98060f..cf824b4114a 100644 ---- a/libgcc/config/i386/cpuinfo.c -+++ b/libgcc/config/i386/cpuinfo.c -@@ -63,7 +63,7 @@ __cpu_indicator_init (void) - __cpu_features2); - } - --#if defined SHARED && defined USE_ELF_SYMVER --__asm__ (".symver __cpu_indicator_init, __cpu_indicator_init@GCC_4.8.0"); --__asm__ (".symver __cpu_model, __cpu_model@GCC_4.8.0"); -+#ifndef SHARED -+int __cpu_indicator_init_local (void) -+ __attribute__ ((weak, alias ("__cpu_indicator_init"))); - #endif -diff --git a/libgcc/config/i386/t-linux b/libgcc/config/i386/t-linux -index 8506a635790..564296f788e 100644 ---- a/libgcc/config/i386/t-linux -+++ b/libgcc/config/i386/t-linux -@@ -3,5 +3,5 @@ - # t-slibgcc-elf-ver and t-linux - SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/i386/libgcc-glibc.ver - --HOST_LIBGCC2_CFLAGS += -mlong-double-80 -DUSE_ELF_SYMVER $(CET_FLAGS) -+HOST_LIBGCC2_CFLAGS += -mlong-double-80 $(CET_FLAGS) - CRTSTUFF_T_CFLAGS += $(CET_FLAGS) diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0021-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0021-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch deleted file mode 100644 index f5f04ae31..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0021-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch +++ /dev/null @@ -1,182 +0,0 @@ -From 4efc42b99c96b026f560b0918de7e237ac3dc8d1 Mon Sep 17 00:00:00 2001 -From: Richard Purdie -Date: Tue, 10 Mar 2020 08:26:53 -0700 -Subject: [PATCH] gentypes/genmodes: Do not use __LINE__ for maintaining - reproducibility - -Inserting line numbers into generated code means its not always reproducible wth -differing versions of host gcc. Void the issue by not adding these. - -Upstream-Status: Inappropriate [OE Reproducibility specific] - -Signed-off-by: Richard Purdie -Signed-off-by: Khem Raj ---- - gcc/gengtype.cc | 6 +++--- - gcc/genmodes.cc | 32 ++++++++++++++++---------------- - 2 files changed, 19 insertions(+), 19 deletions(-) - -diff --git a/gcc/gengtype.cc b/gcc/gengtype.cc -index 386ae1b0506..9762e914296 100644 ---- a/gcc/gengtype.cc -+++ b/gcc/gengtype.cc -@@ -1006,7 +1006,7 @@ create_field_at (pair_p next, type_p type, const char *name, options_p opt, - /* Create a fake field with the given type and name. NEXT is the next - field in the chain. */ - #define create_field(next,type,name) \ -- create_field_all (next,type,name, 0, this_file, __LINE__) -+ create_field_all (next,type,name, 0, this_file, 0) - - /* Like create_field, but the field is only valid when condition COND - is true. */ -@@ -1039,7 +1039,7 @@ create_optional_field_ (pair_p next, type_p type, const char *name, - } - - #define create_optional_field(next,type,name,cond) \ -- create_optional_field_(next,type,name,cond,__LINE__) -+ create_optional_field_(next,type,name,cond,0) - - /* Reverse a linked list of 'struct pair's in place. */ - pair_p -@@ -5238,7 +5238,7 @@ main (int argc, char **argv) - /* These types are set up with #define or else outside of where - we can see them. We should initialize them before calling - read_input_list. */ --#define POS_HERE(Call) do { pos.file = this_file; pos.line = __LINE__; \ -+#define POS_HERE(Call) do { pos.file = this_file; pos.line = 0; \ - Call;} while (0) - POS_HERE (do_scalar_typedef ("CUMULATIVE_ARGS", &pos)); - POS_HERE (do_scalar_typedef ("REAL_VALUE_TYPE", &pos)); -diff --git a/gcc/genmodes.cc b/gcc/genmodes.cc -index 59850bb070a..e187f8542a1 100644 ---- a/gcc/genmodes.cc -+++ b/gcc/genmodes.cc -@@ -440,7 +440,7 @@ complete_all_modes (void) - } - - /* For each mode in class CLASS, construct a corresponding complex mode. */ --#define COMPLEX_MODES(C) make_complex_modes (MODE_##C, __FILE__, __LINE__) -+#define COMPLEX_MODES(C) make_complex_modes (MODE_##C, __FILE__, 0) - static void - make_complex_modes (enum mode_class cl, - const char *file, unsigned int line) -@@ -499,7 +499,7 @@ make_complex_modes (enum mode_class cl, - having as many components as necessary. ORDER is the sorting order - of the mode, with smaller numbers indicating a higher priority. */ - #define VECTOR_MODES_WITH_PREFIX(PREFIX, C, W, ORDER) \ -- make_vector_modes (MODE_##C, #PREFIX, W, ORDER, __FILE__, __LINE__) -+ make_vector_modes (MODE_##C, #PREFIX, W, ORDER, __FILE__, 0) - #define VECTOR_MODES(C, W) VECTOR_MODES_WITH_PREFIX (V, C, W, 0) - static void ATTRIBUTE_UNUSED - make_vector_modes (enum mode_class cl, const char *prefix, unsigned int width, -@@ -552,7 +552,7 @@ make_vector_modes (enum mode_class cl, const char *prefix, unsigned int width, - BYTESIZE bytes in total. */ - #define VECTOR_BOOL_MODE(NAME, COUNT, COMPONENT, BYTESIZE) \ - make_vector_bool_mode (#NAME, COUNT, #COMPONENT, BYTESIZE, \ -- __FILE__, __LINE__) -+ __FILE__, 0) - static void ATTRIBUTE_UNUSED - make_vector_bool_mode (const char *name, unsigned int count, - const char *component, unsigned int bytesize, -@@ -574,7 +574,7 @@ make_vector_bool_mode (const char *name, unsigned int count, - /* Input. */ - - #define _SPECIAL_MODE(C, N) \ -- make_special_mode (MODE_##C, #N, __FILE__, __LINE__) -+ make_special_mode (MODE_##C, #N, __FILE__, 0) - #define RANDOM_MODE(N) _SPECIAL_MODE (RANDOM, N) - #define CC_MODE(N) _SPECIAL_MODE (CC, N) - -@@ -587,7 +587,7 @@ make_special_mode (enum mode_class cl, const char *name, - - #define INT_MODE(N, Y) FRACTIONAL_INT_MODE (N, -1U, Y) - #define FRACTIONAL_INT_MODE(N, B, Y) \ -- make_int_mode (#N, B, Y, __FILE__, __LINE__) -+ make_int_mode (#N, B, Y, __FILE__, 0) - - static void - make_int_mode (const char *name, -@@ -628,16 +628,16 @@ make_opaque_mode (const char *name, - } - - #define FRACT_MODE(N, Y, F) \ -- make_fixed_point_mode (MODE_FRACT, #N, Y, 0, F, __FILE__, __LINE__) -+ make_fixed_point_mode (MODE_FRACT, #N, Y, 0, F, __FILE__, 0) - - #define UFRACT_MODE(N, Y, F) \ -- make_fixed_point_mode (MODE_UFRACT, #N, Y, 0, F, __FILE__, __LINE__) -+ make_fixed_point_mode (MODE_UFRACT, #N, Y, 0, F, __FILE__, 0) - - #define ACCUM_MODE(N, Y, I, F) \ -- make_fixed_point_mode (MODE_ACCUM, #N, Y, I, F, __FILE__, __LINE__) -+ make_fixed_point_mode (MODE_ACCUM, #N, Y, I, F, __FILE__, 0) - - #define UACCUM_MODE(N, Y, I, F) \ -- make_fixed_point_mode (MODE_UACCUM, #N, Y, I, F, __FILE__, __LINE__) -+ make_fixed_point_mode (MODE_UACCUM, #N, Y, I, F, __FILE__, 0) - - /* Create a fixed-point mode by setting CL, NAME, BYTESIZE, IBIT, FBIT, - FILE, and LINE. */ -@@ -658,7 +658,7 @@ make_fixed_point_mode (enum mode_class cl, - - #define FLOAT_MODE(N, Y, F) FRACTIONAL_FLOAT_MODE (N, -1U, Y, F) - #define FRACTIONAL_FLOAT_MODE(N, B, Y, F) \ -- make_float_mode (#N, B, Y, #F, __FILE__, __LINE__) -+ make_float_mode (#N, B, Y, #F, __FILE__, 0) - - static void - make_float_mode (const char *name, -@@ -675,7 +675,7 @@ make_float_mode (const char *name, - #define DECIMAL_FLOAT_MODE(N, Y, F) \ - FRACTIONAL_DECIMAL_FLOAT_MODE (N, -1U, Y, F) - #define FRACTIONAL_DECIMAL_FLOAT_MODE(N, B, Y, F) \ -- make_decimal_float_mode (#N, B, Y, #F, __FILE__, __LINE__) -+ make_decimal_float_mode (#N, B, Y, #F, __FILE__, 0) - - static void - make_decimal_float_mode (const char *name, -@@ -690,7 +690,7 @@ make_decimal_float_mode (const char *name, - } - - #define RESET_FLOAT_FORMAT(N, F) \ -- reset_float_format (#N, #F, __FILE__, __LINE__) -+ reset_float_format (#N, #F, __FILE__, 0) - static void ATTRIBUTE_UNUSED - reset_float_format (const char *name, const char *format, - const char *file, unsigned int line) -@@ -711,7 +711,7 @@ reset_float_format (const char *name, const char *format, - - /* __intN support. */ - #define INT_N(M,PREC) \ -- make_int_n (#M, PREC, __FILE__, __LINE__) -+ make_int_n (#M, PREC, __FILE__, 0) - static void ATTRIBUTE_UNUSED - make_int_n (const char *m, int bitsize, - const char *file, unsigned int line) -@@ -740,7 +740,7 @@ make_int_n (const char *m, int bitsize, - /* Partial integer modes are specified by relation to a full integer - mode. */ - #define PARTIAL_INT_MODE(M,PREC,NAME) \ -- make_partial_integer_mode (#M, #NAME, PREC, __FILE__, __LINE__) -+ make_partial_integer_mode (#M, #NAME, PREC, __FILE__, 0) - static void ATTRIBUTE_UNUSED - make_partial_integer_mode (const char *base, const char *name, - unsigned int precision, -@@ -767,7 +767,7 @@ make_partial_integer_mode (const char *base, const char *name, - /* A single vector mode can be specified by naming its component - mode and the number of components. */ - #define VECTOR_MODE_WITH_PREFIX(PREFIX, C, M, N, ORDER) \ -- make_vector_mode (MODE_##C, #PREFIX, #M, N, ORDER, __FILE__, __LINE__); -+ make_vector_mode (MODE_##C, #PREFIX, #M, N, ORDER, __FILE__, 0); - #define VECTOR_MODE(C, M, N) VECTOR_MODE_WITH_PREFIX(V, C, M, N, 0); - static void ATTRIBUTE_UNUSED - make_vector_mode (enum mode_class bclass, -@@ -814,7 +814,7 @@ make_vector_mode (enum mode_class bclass, - - /* Adjustability. */ - #define _ADD_ADJUST(A, M, X, C1, C2) \ -- new_adjust (#M, &adj_##A, #A, #X, MODE_##C1, MODE_##C2, __FILE__, __LINE__) -+ new_adjust (#M, &adj_##A, #A, #X, MODE_##C1, MODE_##C2, __FILE__, 0) - - #define ADJUST_NUNITS(M, X) _ADD_ADJUST (nunits, M, X, RANDOM, RANDOM) - #define ADJUST_BYTESIZE(M, X) _ADD_ADJUST (bytesize, M, X, RANDOM, RANDOM) diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0022-libatomic-Do-not-enforce-march-on-aarch64.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0022-libatomic-Do-not-enforce-march-on-aarch64.patch deleted file mode 100644 index cb8969b19..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0022-libatomic-Do-not-enforce-march-on-aarch64.patch +++ /dev/null @@ -1,42 +0,0 @@ -From c3870d073eb9e5d82f9d3067d0fa15038b69713a Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Wed, 13 May 2020 15:10:38 -0700 -Subject: [PATCH] libatomic: Do not enforce march on aarch64 - -OE passes the right options via gcc compiler cmdline via TUNE_CCARGS -this can conflict between -mcpu settings and -march setting here, since --mcpu will translate into an appropriate -march, lets depend on that -instead of setting it explicitly - -Upstream-Status: Inappropriate [OE-Specific] - -Signed-off-by: Khem Raj ---- - libatomic/Makefile.am | 1 - - libatomic/Makefile.in | 1 - - 2 files changed, 2 deletions(-) - -diff --git a/libatomic/Makefile.am b/libatomic/Makefile.am -index c6c8d81c56a..d959a5d040e 100644 ---- a/libatomic/Makefile.am -+++ b/libatomic/Makefile.am -@@ -125,7 +125,6 @@ libatomic_la_LIBADD = $(foreach s,$(SIZES),$(addsuffix _$(s)_.lo,$(SIZEOBJS))) - ## On a target-specific basis, include alternates to be selected by IFUNC. - if HAVE_IFUNC - if ARCH_AARCH64_LINUX --IFUNC_OPTIONS = -march=armv8-a+lse - libatomic_la_LIBADD += $(foreach s,$(SIZES),$(addsuffix _$(s)_1_.lo,$(SIZEOBJS))) - libatomic_la_SOURCES += atomic_16.S - -diff --git a/libatomic/Makefile.in b/libatomic/Makefile.in -index a0fa3dfc8cc..e70d389874a 100644 ---- a/libatomic/Makefile.in -+++ b/libatomic/Makefile.in -@@ -447,7 +447,6 @@ M_SRC = $(firstword $(filter %/$(M_FILE), $(all_c_files))) - libatomic_la_LIBADD = $(foreach s,$(SIZES),$(addsuffix \ - _$(s)_.lo,$(SIZEOBJS))) $(am__append_1) $(am__append_3) \ - $(am__append_4) $(am__append_5) --@ARCH_AARCH64_LINUX_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -march=armv8-a+lse - @ARCH_ARM_LINUX_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -march=armv7-a+fp -DHAVE_KERNEL64 - @ARCH_I386_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -march=i586 - @ARCH_X86_64_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -mcx16 -mcx16 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0023-Fix-install-path-of-linux64.h.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0023-Fix-install-path-of-linux64.h.patch deleted file mode 100644 index 11f42c59c..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0023-Fix-install-path-of-linux64.h.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 7bd6e631e4a5273f5ecc41a5a48830a1342e5926 Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Wed, 22 Dec 2021 12:49:25 +0100 -Subject: [PATCH] Fix install path of linux64.h - -We add linux64.h to tm includes[1] as a relative path to B. This patch -adapts the install path of linux64.h to match the include in tm.h. - -[1] 0016-Use-the-multilib-config-files-from-B-instead-of-usin.patch - -Signed-off-by: Andrei Gherzan - -Upstream-Status: Inappropriate [configuration] -Signed-off-by: Khem Raj ---- - gcc/Makefile.in | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/gcc/Makefile.in b/gcc/Makefile.in -index 065ce7e9a5b..d4c723968aa 100644 ---- a/gcc/Makefile.in -+++ b/gcc/Makefile.in -@@ -3738,6 +3738,8 @@ install-plugin: installdirs lang.install-plugin s-header-vars install-gengtype - "$(srcdir)"/config/* | "$(srcdir)"/common/config/* \ - | "$(srcdir)"/c-family/* | "$(srcdir)"/*.def ) \ - base=`echo "$$path" | sed -e "s|$$srcdirstrip/||"`;; \ -+ */linux64.h ) \ -+ base=`dirname $$path`;;\ - *) base=`basename $$path` ;; \ - esac; \ - dest=$(plugin_includedir)/$$base; \ diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0023-libatomic-Do-not-enforce-march-on-aarch64.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0023-libatomic-Do-not-enforce-march-on-aarch64.patch deleted file mode 100644 index 2f0165984..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0023-libatomic-Do-not-enforce-march-on-aarch64.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 52931ec7a708b58d68e69ce9eb99001ae9f099dd Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Wed, 13 May 2020 15:10:38 -0700 -Subject: [PATCH] libatomic: Do not enforce march on aarch64 - -OE passes the right options via gcc compiler cmdline via TUNE_CCARGS -this can conflict between -mcpu settings and -march setting here, since --mcpu will translate into an appropriate -march, lets depend on that -instead of setting it explicitly - -Upstream-Status: Inappropriate [OE-Specific] - -Signed-off-by: Khem Raj ---- - libatomic/Makefile.am | 1 - - libatomic/Makefile.in | 1 - - 2 files changed, 2 deletions(-) - -diff --git a/libatomic/Makefile.am b/libatomic/Makefile.am -index d88515e4a03..e0e2f8b442a 100644 ---- a/libatomic/Makefile.am -+++ b/libatomic/Makefile.am -@@ -125,7 +125,6 @@ libatomic_la_LIBADD = $(foreach s,$(SIZES),$(addsuffix _$(s)_.lo,$(SIZEOBJS))) - ## On a target-specific basis, include alternates to be selected by IFUNC. - if HAVE_IFUNC - if ARCH_AARCH64_LINUX --IFUNC_OPTIONS = -march=armv8-a+lse - libatomic_la_LIBADD += $(foreach s,$(SIZES),$(addsuffix _$(s)_1_.lo,$(SIZEOBJS))) - endif - if ARCH_ARM_LINUX -diff --git a/libatomic/Makefile.in b/libatomic/Makefile.in -index 80d25653dc7..7377689ab34 100644 ---- a/libatomic/Makefile.in -+++ b/libatomic/Makefile.in -@@ -434,7 +434,6 @@ M_SRC = $(firstword $(filter %/$(M_FILE), $(all_c_files))) - libatomic_la_LIBADD = $(foreach s,$(SIZES),$(addsuffix \ - _$(s)_.lo,$(SIZEOBJS))) $(am__append_1) $(am__append_2) \ - $(am__append_3) $(am__append_4) --@ARCH_AARCH64_LINUX_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -march=armv8-a+lse - @ARCH_ARM_LINUX_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -march=armv7-a+fp -DHAVE_KERNEL64 - @ARCH_I386_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -march=i586 - @ARCH_X86_64_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -mcx16 -mcx16 diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0024-Avoid-hardcoded-build-paths-into-ppc-libgcc.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0024-Avoid-hardcoded-build-paths-into-ppc-libgcc.patch deleted file mode 100644 index ad8269016..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0024-Avoid-hardcoded-build-paths-into-ppc-libgcc.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 4623d87d779853a2862ee92a15a41fded81eddb8 Mon Sep 17 00:00:00 2001 -From: Richard Purdie -Date: Sat, 20 Aug 2022 09:04:14 -0700 -Subject: [PATCH] Avoid hardcoded build paths into ppc libgcc - -Avoid encoding build paths into sources used for floating point on powerpc. -(MACHINE=qemuppc bitbake libgcc). - -Upstream-Status: Submitted [https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599882.html] -Signed-off-by: Richard Purdie -Signed-off-by: Khem Raj ---- - libgcc/config/rs6000/t-float128 | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/libgcc/config/rs6000/t-float128 b/libgcc/config/rs6000/t-float128 -index b09b5664af0..513e63748f1 100644 ---- a/libgcc/config/rs6000/t-float128 -+++ b/libgcc/config/rs6000/t-float128 -@@ -103,7 +103,7 @@ $(ibm128_dec_objs) : INTERNAL_CFLAGS += $(IBM128_CFLAGS_DECIMAL) - $(fp128_softfp_src) : $(srcdir)/soft-fp/$(subst -sw,,$(subst kf,tf,$@)) $(fp128_dep) - @src="$(srcdir)/soft-fp/$(subst -sw,,$(subst kf,tf,$@))"; \ - echo "Create $@"; \ -- (echo "/* file created from $$src */"; \ -+ (echo "/* file created from `basename $$src` */"; \ - echo; \ - sed -f $(fp128_sed) < $$src) > $@ - diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0024-Fix-install-path-of-linux64.h.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0024-Fix-install-path-of-linux64.h.patch deleted file mode 100644 index 555be6232..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0024-Fix-install-path-of-linux64.h.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 3e67c9c77e46132c252911bf1e5e4222dfd3aa34 Mon Sep 17 00:00:00 2001 -From: Andrei Gherzan -Date: Wed, 22 Dec 2021 12:49:25 +0100 -Subject: [PATCH] Fix install path of linux64.h - -We add linux64.h to tm includes[1] as a relative path to B. This patch -adapts the install path of linux64.h to match the include in tm.h. - -[1] 0016-Use-the-multilib-config-files-from-B-instead-of-usin.patch - -Signed-off-by: Andrei Gherzan - -Upstream-Status: Inappropriate [configuration] -Signed-off-by: Khem Raj ---- - gcc/Makefile.in | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/gcc/Makefile.in b/gcc/Makefile.in -index 07fa63b6640..0def7394454 100644 ---- a/gcc/Makefile.in -+++ b/gcc/Makefile.in -@@ -3706,6 +3706,8 @@ install-plugin: installdirs lang.install-plugin s-header-vars install-gengtype - "$(srcdir)"/config/* | "$(srcdir)"/common/config/* \ - | "$(srcdir)"/c-family/* | "$(srcdir)"/*.def ) \ - base=`echo "$$path" | sed -e "s|$$srcdirstrip/||"`;; \ -+ */linux64.h ) \ -+ base=`dirname $$path`;;\ - *) base=`basename $$path` ;; \ - esac; \ - dest=$(plugin_includedir)/$$base; \ diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/0026-rust-recursion-limit.patch b/meta-microblaze/recipes-devtools/gcc/gcc/0026-rust-recursion-limit.patch deleted file mode 100644 index bbe2f18f6..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/0026-rust-recursion-limit.patch +++ /dev/null @@ -1,92 +0,0 @@ -From 9234cdca6ee88badfc00297e72f13dac4e540c79 Mon Sep 17 00:00:00 2001 -From: Nick Clifton -Date: Fri, 1 Jul 2022 15:58:52 +0100 -Subject: [PATCH] Add a recursion limit to the demangle_const function in the - Rust demangler. - -libiberty/ - PR demangler/105039 - * rust-demangle.c (demangle_const): Add recursion limit. - -Upstream-Status: Backport [https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=9234cdca6ee88badfc00297e72f13dac4e540c79] ---- - libiberty/rust-demangle.c | 29 ++++++++++++++++++++--------- - 1 file changed, 20 insertions(+), 9 deletions(-) - -diff --git a/libiberty/rust-demangle.c b/libiberty/rust-demangle.c -index bb58d900e27..36afcfae278 100644 ---- a/libiberty/rust-demangle.c -+++ b/libiberty/rust-demangle.c -@@ -126,7 +126,7 @@ parse_integer_62 (struct rust_demangler *rdm) - return 0; - - x = 0; -- while (!eat (rdm, '_')) -+ while (!eat (rdm, '_') && !rdm->errored) - { - c = next (rdm); - x *= 62; -@@ -1148,6 +1148,15 @@ demangle_const (struct rust_demangler *rdm) - if (rdm->errored) - return; - -+ if (rdm->recursion != RUST_NO_RECURSION_LIMIT) -+ { -+ ++ rdm->recursion; -+ if (rdm->recursion > RUST_MAX_RECURSION_COUNT) -+ /* FIXME: There ought to be a way to report -+ that the recursion limit has been reached. */ -+ goto fail_return; -+ } -+ - if (eat (rdm, 'B')) - { - backref = parse_integer_62 (rdm); -@@ -1158,7 +1167,7 @@ demangle_const (struct rust_demangler *rdm) - demangle_const (rdm); - rdm->next = old_next; - } -- return; -+ goto pass_return; - } - - ty_tag = next (rdm); -@@ -1167,7 +1176,7 @@ demangle_const (struct rust_demangler *rdm) - /* Placeholder. */ - case 'p': - PRINT ("_"); -- return; -+ goto pass_return; - - /* Unsigned integer types. */ - case 'h': -@@ -1200,18 +1209,20 @@ demangle_const (struct rust_demangler *rdm) - break; - - default: -- rdm->errored = 1; -- return; -+ goto fail_return; - } - -- if (rdm->errored) -- return; -- -- if (rdm->verbose) -+ if (!rdm->errored && rdm->verbose) - { - PRINT (": "); - PRINT (basic_type (ty_tag)); - } -+ -+ fail_return: -+ rdm->errored = 1; -+ pass_return: -+ if (rdm->recursion != RUST_NO_RECURSION_LIMIT) -+ -- rdm->recursion; - } - - static void --- -2.31.1 - diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/hardcoded-paths.patch b/meta-microblaze/recipes-devtools/gcc/gcc/hardcoded-paths.patch deleted file mode 100644 index f3485858f..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/hardcoded-paths.patch +++ /dev/null @@ -1,19 +0,0 @@ -Avoid encoding build paths into sources used for floating point on powerpc. -(MACHINE=qemuppc bitbake libgcc). - -Upstream-Status: Submitted [https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599882.html] -Signed-off-by: Richard Purdie - -Index: gcc-12.1.0/libgcc/config/rs6000/t-float128 -=================================================================== ---- gcc-12.1.0.orig/libgcc/config/rs6000/t-float128 -+++ gcc-12.1.0/libgcc/config/rs6000/t-float128 -@@ -103,7 +103,7 @@ $(ibm128_dec_objs) : INTERNAL_CFLAGS += - $(fp128_softfp_src) : $(srcdir)/soft-fp/$(subst -sw,,$(subst kf,tf,$@)) $(fp128_dep) - @src="$(srcdir)/soft-fp/$(subst -sw,,$(subst kf,tf,$@))"; \ - echo "Create $@"; \ -- (echo "/* file created from $$src */"; \ -+ (echo "/* file created from `basename $$src` */"; \ - echo; \ - sed -f $(fp128_sed) < $$src) > $@ - diff --git a/meta-microblaze/recipes-devtools/gcc/gcc/prefix-map-realpath.patch b/meta-microblaze/recipes-devtools/gcc/gcc/prefix-map-realpath.patch deleted file mode 100644 index 7f1a2deec..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc/prefix-map-realpath.patch +++ /dev/null @@ -1,63 +0,0 @@ -Relative paths don't work with -fdebug-prefix-map and friends. This -can lead to paths which the user wanted to be remapped being missed. -Setting -fdebug-prefix-map to work with a relative path isn't practical -either. - -Instead, call gcc's realpath function on the incomming path name before -comparing it with the remapping. This means other issues like symlinks -are also accounted for and leads to a more consistent remapping experience. - -Upstream-Status: Submitted [https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599885.html] -[Also https://gcc.gnu.org/pipermail/gcc-patches/2022-August/599884.html] -Signed-off-by: Richard Purdie - - -Index: gcc-12.1.0/gcc/file-prefix-map.cc -=================================================================== ---- gcc-12.1.0.orig/gcc/file-prefix-map.cc -+++ gcc-12.1.0/gcc/file-prefix-map.cc -@@ -70,19 +70,28 @@ remap_filename (file_prefix_map *maps, c - file_prefix_map *map; - char *s; - const char *name; -+ char *realname; - size_t name_len; - -+ if (lbasename (filename) == filename) -+ return filename; -+ -+ realname = lrealpath (filename); -+ - for (map = maps; map; map = map->next) -- if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0) -+ if (filename_ncmp (realname, map->old_prefix, map->old_len) == 0) - break; -- if (!map) -+ if (!map) { -+ free (realname); - return filename; -- name = filename + map->old_len; -+ } -+ name = realname + map->old_len; - name_len = strlen (name) + 1; - - s = (char *) ggc_alloc_atomic (name_len + map->new_len); - memcpy (s, map->new_prefix, map->new_len); - memcpy (s + map->new_len, name, name_len); -+ free (realname); - return s; - } - -Index: gcc-12.1.0/libcpp/macro.cc -=================================================================== ---- gcc-12.1.0.orig/libcpp/macro.cc -+++ gcc-12.1.0/libcpp/macro.cc -@@ -563,7 +563,7 @@ _cpp_builtin_macro_text (cpp_reader *pfi - if (!name) - abort (); - } -- if (pfile->cb.remap_filename) -+ if (pfile->cb.remap_filename && !pfile->state.in_directive) - name = pfile->cb.remap_filename (name); - len = strlen (name); - buf = _cpp_unaligned_alloc (pfile, len * 2 + 3); diff --git a/meta-microblaze/recipes-devtools/gcc/gcc_12.2.bb b/meta-microblaze/recipes-devtools/gcc/gcc_12.2.bb deleted file mode 100644 index c1996ab17..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc_12.2.bb +++ /dev/null @@ -1,14 +0,0 @@ -require recipes-devtools/gcc/gcc-${PV}.inc -require gcc-target.inc - -# Building with thumb enabled on armv4t armv5t fails with -# | gcc-4.8.1-r0/gcc-4.8.1/gcc/cp/decl.c:7438:(.text.unlikely+0x2fa): relocation truncated to fit: R_ARM_THM_CALL against symbol `fancy_abort(char const*, int, char const*)' defined in .glue_7 section in linker stubs -# | gcc-4.8.1-r0/gcc-4.8.1/gcc/cp/decl.c:7442:(.text.unlikely+0x318): additional relocation overflows omitted from the output -ARM_INSTRUCTION_SET:armv4 = "arm" -ARM_INSTRUCTION_SET:armv5 = "arm" - -ARMFPARCHEXT:armv6 = "${@'+fp' if d.getVar('TARGET_FPU') == 'hard' else ''}" -ARMFPARCHEXT:armv7a = "${@'+fp' if d.getVar('TARGET_FPU') == 'hard' else ''}" -ARMFPARCHEXT:armv7ve = "${@'+fp' if d.getVar('TARGET_FPU') == 'hard' else ''}" - -#BBCLASSEXTEND = "nativesdk" diff --git a/meta-microblaze/recipes-devtools/gcc/gcc_14.%.bbappend b/meta-microblaze/recipes-devtools/gcc/gcc_14.%.bbappend deleted file mode 100644 index d1df20617..000000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc_14.%.bbappend +++ /dev/null @@ -1 +0,0 @@ -require microblaze-block.inc diff --git a/meta-microblaze/recipes-devtools/gcc/libgcc-common.inc b/meta-microblaze/recipes-devtools/gcc/libgcc-common.inc deleted file mode 100644 index ac0a5a7b6..000000000 --- a/meta-microblaze/recipes-devtools/gcc/libgcc-common.inc +++ /dev/null @@ -1,163 +0,0 @@ -BPN = "libgcc" - -require gcc-configure-common.inc - -INHIBIT_DEFAULT_DEPS = "1" - -do_configure () { - install -d ${D}${base_libdir} ${D}${libdir} - mkdir -p ${B}/${BPN} - mkdir -p ${B}/${TARGET_SYS}/${BPN}/ - cd ${B}/${BPN} - chmod a+x ${S}/${BPN}/configure - ${S}/${BPN}/configure ${CONFIGUREOPTS} ${EXTRA_OECONF} -} -EXTRACONFFUNCS += "extract_stashed_builddir" -do_configure[depends] += "${COMPILERDEP}" - -do_compile () { - cd ${B}/${BPN} - oe_runmake MULTIBUILDTOP=${B}/${TARGET_SYS}/${BPN}/ -} - -do_install () { - cd ${B}/${BPN} - oe_runmake 'DESTDIR=${D}' MULTIBUILDTOP=${B}/${TARGET_SYS}/${BPN}/ install - - # Move libgcc_s into /lib - mkdir -p ${D}${base_libdir} - if [ -f ${D}${libdir}/nof/libgcc_s.so ]; then - mv ${D}${libdir}/nof/libgcc* ${D}${base_libdir} - else - mv ${D}${libdir}/libgcc* ${D}${base_libdir} || true - fi - - # install the runtime in /usr/lib/ not in /usr/lib/gcc on target - # so that cross-gcc can find it in the sysroot - - mv ${D}${libdir}/gcc/* ${D}${libdir} - rm -rf ${D}${libdir}/gcc/ - # unwind.h is installed here which is shipped in gcc-cross - # as well as target gcc and they are identical so we dont - # ship one with libgcc here - rm -rf ${D}${libdir}/${TARGET_SYS}/${BINV}/include -} - -do_install:append:libc-baremetal () { - if [ "${base_libdir}" != "${libdir}" ]; then - rmdir ${D}${base_libdir} - fi -} -do_install:append:libc-newlib () { - if [ "${base_libdir}" != "${libdir}" ]; then - rmdir ${D}${base_libdir} - fi -} - -# No rpm package is actually created but -dev depends on it, avoid dnf error -DEV_PKG_DEPENDENCY:libc-baremetal = "" -DEV_PKG_DEPENDENCY:libc-newlib = "" - -#BBCLASSEXTEND = "nativesdk" - -addtask multilib_install after do_install before do_package do_populate_sysroot -# this makes multilib gcc files findable for target gcc -# e.g. -# /usr/lib/i586-pokymllib32-linux/4.7/ -# by creating this symlink to it -# /usr/lib64/x86_64-poky-linux/4.7/32 - -fakeroot python do_multilib_install() { - import re - - multilibs = d.getVar('MULTILIB_VARIANTS') - if not multilibs or bb.data.inherits_class('nativesdk', d): - return - - binv = d.getVar('BINV') - - mlprefix = d.getVar('MLPREFIX') - if ('%slibgcc' % mlprefix) != d.getVar('PN'): - return - - if mlprefix: - orig_tune = d.getVar('DEFAULTTUNE_MULTILIB_ORIGINAL') - orig_tune_params = get_tune_parameters(orig_tune, d) - orig_tune_baselib = orig_tune_params['baselib'] - orig_tune_bitness = orig_tune_baselib.replace('lib', '') - if not orig_tune_bitness: - orig_tune_bitness = '32' - - src = '../../../' + orig_tune_baselib + '/' + \ - d.getVar('TARGET_SYS_MULTILIB_ORIGINAL') + '/' + binv + '/' - - dest = d.getVar('D') + d.getVar('libdir') + '/' + \ - d.getVar('TARGET_SYS') + '/' + binv + '/' + orig_tune_bitness - - if os.path.lexists(dest): - os.unlink(dest) - os.symlink(src, dest) - return - - - for ml in multilibs.split(): - tune = d.getVar('DEFAULTTUNE:virtclass-multilib-' + ml) - if not tune: - bb.warn('DEFAULTTUNE:virtclass-multilib-%s is not defined. Skipping...' % ml) - continue - - tune_parameters = get_tune_parameters(tune, d) - tune_baselib = tune_parameters['baselib'] - if not tune_baselib: - bb.warn("Tune %s doesn't have a baselib set. Skipping..." % tune) - continue - - tune_arch = tune_parameters['arch'] - tune_bitness = tune_baselib.replace('lib', '') - if not tune_bitness: - tune_bitness = '32' # /lib => 32bit lib - - tune_abiextension = tune_parameters['abiextension'] - if tune_abiextension: - libcextension = '-gnu' + tune_abiextension - else: - libcextension = '' - - src = '../../../' + tune_baselib + '/' + \ - tune_arch + d.getVar('TARGET_VENDOR') + 'ml' + ml + \ - '-' + d.getVar('TARGET_OS') + libcextension + '/' + binv + '/' - - dest = d.getVar('D') + d.getVar('libdir') + '/' + \ - d.getVar('TARGET_SYS') + '/' + binv + '/' + tune_bitness - - if os.path.lexists(dest): - os.unlink(dest) - os.symlink(src, dest) -} - -def get_original_os(d): - vendoros = d.expand('${TARGET_ARCH}${ORIG_TARGET_VENDOR}-${TARGET_OS}') - for suffix in [d.getVar('ABIEXTENSION'), d.getVar('LIBCEXTENSION')]: - if suffix and vendoros.endswith(suffix): - vendoros = vendoros[:-len(suffix)] - # Arm must use linux-gnueabi not linux as only the former is accepted by gcc - if vendoros.startswith("arm-") and not vendoros.endswith("-gnueabi"): - vendoros = vendoros + "-gnueabi" - return vendoros - -ORIG_TARGET_VENDOR := "${TARGET_VENDOR}" -BASETARGET_SYS = "${@get_original_os(d)}" - -addtask extra_symlinks after do_multilib_install before do_package do_populate_sysroot -fakeroot python do_extra_symlinks() { - if bb.data.inherits_class('nativesdk', d): - return - - targetsys = d.getVar('BASETARGET_SYS') - - if targetsys != d.getVar('TARGET_SYS'): - dest = d.getVar('D') + d.getVar('libdir') + '/' + targetsys - src = d.getVar('TARGET_SYS') - if not os.path.lexists(dest) and os.path.lexists(d.getVar('D') + d.getVar('libdir')): - os.symlink(src, dest) -} diff --git a/meta-microblaze/recipes-devtools/gcc/libgcc-initial.inc b/meta-microblaze/recipes-devtools/gcc/libgcc-initial.inc deleted file mode 100644 index 8251e3c28..000000000 --- a/meta-microblaze/recipes-devtools/gcc/libgcc-initial.inc +++ /dev/null @@ -1,58 +0,0 @@ -# -# Notes on the way the OE cross toolchain now works -# -# We need a libgcc to build glibc. Tranditionally we therefore built -# a non-threaded and non-shared compiler (gcc-cross-initial), then use -# that to build libgcc-initial which is used to build glibc which we can -# then build gcc-cross and libgcc against. -# -# We were able to drop the glibc dependency from gcc-cross, with two tweaks: - -# a) specify the minimum glibc version to support in a configure option -# b) create a dummy limits.h file so that later when glibc creates one, -# the headers structure has support for it. We can do this with a simple -# empty file -# -# Once gcc-cross is libc independent, we can use it to build both -# libgcc-initial and then later libgcc. -# -# libgcc-initial is tricky as we need to imitate the non-threaded and -# non-shared case. We can do that by hacking the threading mode back to -# "single" even if gcc reports "posix" and disable libc presence for the -# libgcc-intial build. We have to create the dummy limits.h to avoid -# compiler errors from a missing header. -# -# glibc will fail to link with libgcc-initial due to a missing "exception -# handler" capable libgcc (libgcc_eh.a). Since we know glibc doesn't need -# any exception handler, we can safely symlink to libgcc.a. -# - -require libgcc-common.inc - -DEPENDS = "virtual/${TARGET_PREFIX}gcc" - -LICENSE = "GPL-3.0-with-GCC-exception" - -PACKAGES = "" - -EXTRA_OECONF += "--disable-shared" - -inherit nopackages - -# We really only want this built by things that need it, not any recrdeptask -deltask do_build - -do_configure:prepend () { - install -d ${STAGING_INCDIR} - touch ${STAGING_INCDIR}/limits.h - sed -i -e 's#INHIBIT_LIBC_CFLAGS =.*#INHIBIT_LIBC_CFLAGS = -Dinhibit_libc#' ${B}/gcc/libgcc.mvars - sed -i -e 's#inhibit_libc = false#inhibit_libc = true#' ${B}/gcc/Makefile -} - -do_configure:append () { - sed -i -e 's#thread_header = .*#thread_header = gthr-single.h#' ${B}/${BPN}/Makefile -} - -do_install:append () { - ln -s libgcc.a ${D}${libdir}/${TARGET_SYS}/${BINV}/libgcc_eh.a -} diff --git a/meta-microblaze/recipes-devtools/gcc/libgcc-initial_12.2.bb b/meta-microblaze/recipes-devtools/gcc/libgcc-initial_12.2.bb deleted file mode 100644 index a259082b4..000000000 --- a/meta-microblaze/recipes-devtools/gcc/libgcc-initial_12.2.bb +++ /dev/null @@ -1,5 +0,0 @@ -require recipes-devtools/gcc/gcc-${PV}.inc -require libgcc-initial.inc - -# Building with thumb enabled on armv6t fails -ARM_INSTRUCTION_SET:armv6 = "arm" diff --git a/meta-microblaze/recipes-devtools/gcc/libgcc-initial_14.%.bbappend b/meta-microblaze/recipes-devtools/gcc/libgcc-initial_14.%.bbappend deleted file mode 100644 index d1df20617..000000000 --- a/meta-microblaze/recipes-devtools/gcc/libgcc-initial_14.%.bbappend +++ /dev/null @@ -1 +0,0 @@ -require microblaze-block.inc diff --git a/meta-microblaze/recipes-devtools/gcc/libgcc.inc b/meta-microblaze/recipes-devtools/gcc/libgcc.inc deleted file mode 100644 index 84a2d930d..000000000 --- a/meta-microblaze/recipes-devtools/gcc/libgcc.inc +++ /dev/null @@ -1,53 +0,0 @@ -require libgcc-common.inc - -DEPENDS = "virtual/${TARGET_PREFIX}gcc virtual/${TARGET_PREFIX}g++ virtual/${MLPREFIX}libc" - -do_install:append:class-target () { - if [ "${TCLIBC}" != "glibc" ]; then - case "${TARGET_OS}" in - "linux-musl" | "linux-*spe") extra_target_os="linux";; - "linux-musleabi") extra_target_os="linux-gnueabi";; - *) extra_target_os="linux";; - esac - if [ ! -e ${D}${libdir}/${TARGET_ARCH}${TARGET_VENDOR}-$extra_target_os ]; then - ln -s ${TARGET_SYS} ${D}${libdir}/${TARGET_ARCH}${TARGET_VENDOR}-$extra_target_os - fi - fi - if [ -n "${@ bb.utils.contains('TUNE_CCARGS_MFLOAT', 'hard', 'hf', '', d)}" ]; then - case "${TARGET_OS}" in - "linux-musleabi") extra_target_os="linux-musleabihf";; - "linux-gnueabi") extra_target_os="linux-gnueabihf";; - esac - if [ ! -e ${D}${libdir}/${TARGET_ARCH}${TARGET_VENDOR}-$extra_target_os ]; then - ln -s ${TARGET_SYS} ${D}${libdir}/${TARGET_ARCH}${TARGET_VENDOR}-$extra_target_os - fi - fi -} - -PACKAGES = "\ - ${PN} \ - ${PN}-dev \ - ${PN}-dbg \ -" - -# All libgcc source is marked with the exception. -# -LICENSE:${PN} = "GPL-3.0-with-GCC-exception" -LICENSE:${PN}-dev = "GPL-3.0-with-GCC-exception" -LICENSE:${PN}-dbg = "GPL-3.0-with-GCC-exception" - - -FILES:${PN}-dev = "\ - ${base_libdir}/libgcc*.so \ - ${@oe.utils.conditional('BASETARGET_SYS', '${TARGET_SYS}', '', '${libdir}/${BASETARGET_SYS}', d)} \ - ${libdir}/${TARGET_SYS}/${BINV}* \ - ${libdir}/${TARGET_ARCH}${TARGET_VENDOR}* \ -" - -do_package[depends] += "virtual/${MLPREFIX}libc:do_packagedata" -do_package_write_ipk[depends] += "virtual/${MLPREFIX}libc:do_packagedata" -do_package_write_deb[depends] += "virtual/${MLPREFIX}libc:do_packagedata" -do_package_write_rpm[depends] += "virtual/${MLPREFIX}libc:do_packagedata" - -INSANE_SKIP:${PN}-dev = "staticdev" - diff --git a/meta-microblaze/recipes-devtools/gcc/libgcc_12.2.bb b/meta-microblaze/recipes-devtools/gcc/libgcc_12.2.bb deleted file mode 100644 index f88963b0a..000000000 --- a/meta-microblaze/recipes-devtools/gcc/libgcc_12.2.bb +++ /dev/null @@ -1,5 +0,0 @@ -require recipes-devtools/gcc/gcc-${PV}.inc -require libgcc.inc - -# Building with thumb enabled on armv6t fails -ARM_INSTRUCTION_SET:armv6 = "arm" diff --git a/meta-microblaze/recipes-devtools/gcc/libgcc_14.%.bbappend b/meta-microblaze/recipes-devtools/gcc/libgcc_14.%.bbappend deleted file mode 100644 index d1df20617..000000000 --- a/meta-microblaze/recipes-devtools/gcc/libgcc_14.%.bbappend +++ /dev/null @@ -1 +0,0 @@ -require microblaze-block.inc diff --git a/meta-microblaze/recipes-devtools/gcc/libgfortran.inc b/meta-microblaze/recipes-devtools/gcc/libgfortran.inc deleted file mode 100644 index 99fdd89c6..000000000 --- a/meta-microblaze/recipes-devtools/gcc/libgfortran.inc +++ /dev/null @@ -1,88 +0,0 @@ -require gcc-configure-common.inc - -EXTRA_OECONF_PATHS = "\ - --with-sysroot=/not/exist \ - --with-build-sysroot=${STAGING_DIR_TARGET} \ -" - -# An arm hard float target like raspberrypi4 won't build -# as CFLAGS don't make it to the fortran compiler otherwise -# (the configure script sets FC to $GFORTRAN unconditionally) -export GFORTRAN = "${FC}" - -do_configure () { - for target in libbacktrace libgfortran - do - rm -rf ${B}/${TARGET_SYS}/$target/ - mkdir -p ${B}/${TARGET_SYS}/$target/ - cd ${B}/${TARGET_SYS}/$target/ - chmod a+x ${S}/$target/configure - relpath=${@os.path.relpath("${S}", "${B}/${TARGET_SYS}")} - ../$relpath/$target/configure ${CONFIGUREOPTS} ${EXTRA_OECONF} - # Easiest way to stop bad RPATHs getting into the library since we have a - # broken libtool here - sed -i -e 's/hardcode_into_libs=yes/hardcode_into_libs=no/' ${B}/${TARGET_SYS}/$target/libtool - done -} -EXTRACONFFUNCS += "extract_stashed_builddir" -do_configure[depends] += "${COMPILERDEP}" - -do_compile () { - for target in libbacktrace libgfortran - do - cd ${B}/${TARGET_SYS}/$target/ - oe_runmake MULTIBUILDTOP=${B}/${TARGET_SYS}/$target/ - done -} - -do_install () { - cd ${B}/${TARGET_SYS}/libgfortran/ - oe_runmake 'DESTDIR=${D}' MULTIBUILDTOP=${B}/${TARGET_SYS}/libgfortran/ install - if [ -d ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/finclude ]; then - rmdir --ignore-fail-on-non-empty -p ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/finclude - fi - if [ -d ${D}${infodir} ]; then - rmdir --ignore-fail-on-non-empty -p ${D}${infodir} - fi - chown -R root:root ${D} -} - -INHIBIT_DEFAULT_DEPS = "1" -DEPENDS = "gcc-runtime gcc-cross-${TARGET_ARCH}" - -#BBCLASSEXTEND = "nativesdk" - -PACKAGES = "\ - ${PN}-dbg \ - libgfortran \ - libgfortran-dev \ - libgfortran-staticdev \ -" - -LICENSE:${PN} = "GPL-3.0-with-GCC-exception" -LICENSE:${PN}-dev = "GPL-3.0-with-GCC-exception" -LICENSE:${PN}-dbg = "GPL-3.0-with-GCC-exception" - -FILES:${PN} = "${libdir}/libgfortran.so.*" -FILES:${PN}-dev = "\ - ${libdir}/libgfortran*.so \ - ${libdir}/libgfortran.spec \ - ${libdir}/libgfortran.la \ - ${libdir}/gcc/${TARGET_SYS}/${BINV}/libgfortranbegin.* \ - ${libdir}/gcc/${TARGET_SYS}/${BINV}/libcaf_single* \ - ${libdir}/gcc/${TARGET_SYS}/${BINV}/finclude/ \ - ${libdir}/gcc/${TARGET_SYS}/${BINV}/include/ \ -" -FILES:${PN}-staticdev = "${libdir}/libgfortran.a" - -INSANE_SKIP:${MLPREFIX}libgfortran-dev = "staticdev" - -do_package_write_ipk[depends] += "virtual/${MLPREFIX}libc:do_packagedata" -do_package_write_deb[depends] += "virtual/${MLPREFIX}libc:do_packagedata" -do_package_write_rpm[depends] += "virtual/${MLPREFIX}libc:do_packagedata" - -python __anonymous () { - f = d.getVar("FORTRAN") - if "fortran" not in f: - raise bb.parse.SkipRecipe("libgfortran needs fortran support to be enabled in the compiler") -} diff --git a/meta-microblaze/recipes-devtools/gcc/libgfortran_12.2.bb b/meta-microblaze/recipes-devtools/gcc/libgfortran_12.2.bb deleted file mode 100644 index 71dd8b4bd..000000000 --- a/meta-microblaze/recipes-devtools/gcc/libgfortran_12.2.bb +++ /dev/null @@ -1,3 +0,0 @@ -require recipes-devtools/gcc/gcc-${PV}.inc -require libgfortran.inc - diff --git a/meta-microblaze/recipes-devtools/gcc/libgfortran_14.%.bbappend b/meta-microblaze/recipes-devtools/gcc/libgfortran_14.%.bbappend deleted file mode 100644 index d1df20617..000000000 --- a/meta-microblaze/recipes-devtools/gcc/libgfortran_14.%.bbappend +++ /dev/null @@ -1 +0,0 @@ -require microblaze-block.inc diff --git a/meta-microblaze/recipes-devtools/gcc/microblaze-block.inc b/meta-microblaze/recipes-devtools/gcc/microblaze-block.inc deleted file mode 100644 index 67c40845e..000000000 --- a/meta-microblaze/recipes-devtools/gcc/microblaze-block.inc +++ /dev/null @@ -1 +0,0 @@ -COMPATIBLE_HOST:microblaze = "^$" diff --git a/meta-microblaze/recipes-devtools/gdb/gdb-common.inc b/meta-microblaze/recipes-devtools/gdb/gdb-common.inc deleted file mode 100644 index aef0d2a14..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb-common.inc +++ /dev/null @@ -1,66 +0,0 @@ -SUMMARY = "GNU debugger" -HOMEPAGE = "http://www.gnu.org/software/gdb/" -DESCRIPTION = "GDB, the GNU Project debugger, allows you to see what is going on inside another program while it executes -- or what another program was doing at the moment it crashed." -SECTION = "devel" -DEPENDS = "expat gmp zlib ncurses virtual/libiconv ${LTTNGUST} bison-native" - -LTTNGUST = "lttng-ust" -LTTNGUST:arc = "" -LTTNGUST:aarch64 = "" -LTTNGUST:mipsarch = "" -LTTNGUST:sh4 = "" - -inherit autotools texinfo - -UPSTREAM_CHECK_GITTAGREGEX = "gdb\-(?P.+)\-release" - -B = "${UNPACKDIR}/build-${TARGET_SYS}" - -EXPAT = "--with-expat --with-libexpat-prefix=${STAGING_DIR_HOST}" - -EXTRA_OECONF = "--disable-gdbtk --disable-x --disable-werror \ - --with-curses --disable-multilib --disable-sim \ - --without-guile \ - ${GDBPROPREFIX} ${EXPAT} \ - ${@bb.utils.contains('DISTRO_FEATURES', 'multiarch', '--enable-64-bit-bfd', '', d)} \ - --disable-rpath \ - --disable-gas --disable-binutils \ - --disable-ld --disable-gold \ - --disable-gprof \ - --with-libgmp-prefix=${STAGING_EXECPREFIXDIR} \ -" - -PACKAGECONFIG ??= "readline ${@bb.utils.filter('DISTRO_FEATURES', 'debuginfod', d)}" -# Use --without-system-readline to compile with readline 5. -PACKAGECONFIG[readline] = "--with-system-readline,--without-system-readline,readline" -PACKAGECONFIG[python] = "--with-python=${UNPACKDIR}/python,--without-python,python3,python3 python3-codecs" -PACKAGECONFIG[babeltrace] = "--with-babeltrace,--without-babeltrace,babeltrace" -# ncurses is already a hard DEPENDS, but would be added here if it weren't -PACKAGECONFIG[tui] = "--enable-tui,--disable-tui" -PACKAGECONFIG[xz] = "--with-lzma --with-liblzma-prefix=${STAGING_DIR_HOST},--without-lzma,xz" -PACKAGECONFIG[debuginfod] = "--with-debuginfod, --without-debuginfod, elfutils" - -GDBPROPREFIX = "--program-prefix=''" - -DISABLE_STATIC = "" - -do_configure () { - # override this function to avoid the autoconf/automake/aclocal/autoheader - # calls for now - (cd ${S} && gnu-configize) || die "failure in running gnu-configize" - oe_runconf -} - -# we don't want gdb to provide bfd/iberty/opcodes, which instead will override the -# right bits installed by binutils. Same for bfd.info -- also from binutils. -do_install:append() { - rm -rf ${D}${libdir} - rm -rf ${D}${includedir} - rm -rf ${D}${datadir}/locale - rm -f ${D}${infodir}/bfd.info -} - -RRECOMMENDS:gdb:append:linux = " glibc-thread-db " -RRECOMMENDS:gdb:append:linux-gnueabi = " glibc-thread-db " -RRECOMMENDS:gdbserver:append:linux = " glibc-thread-db " -RRECOMMENDS:gdbserver:append:linux-gnueabi = " glibc-thread-db " diff --git a/meta-microblaze/recipes-devtools/gdb/gdb-cross-canadian.inc b/meta-microblaze/recipes-devtools/gdb/gdb-cross-canadian.inc deleted file mode 100644 index a6857cf7a..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb-cross-canadian.inc +++ /dev/null @@ -1,44 +0,0 @@ -inherit cross-canadian -inherit python3-dir -inherit pkgconfig - -SUMMARY = "GNU debugger (cross-canadian gdb for ${TARGET_ARCH} target)" -PN = "gdb-cross-canadian-${TRANSLATED_TARGET_ARCH}" -BPN = "gdb" - -DEPENDS = "nativesdk-ncurses nativesdk-expat nativesdk-gettext nativesdk-gmp \ - virtual/${HOST_PREFIX}gcc virtual/${HOST_PREFIX}binutils virtual/nativesdk-libc" - -GDBPROPREFIX = "--program-prefix='${TARGET_PREFIX}'" - -# Overrides PACKAGECONFIG variables in gdb-common.inc -PACKAGECONFIG ??= "readline ${@bb.utils.filter('DISTRO_FEATURES', 'debuginfod', d)}" -PACKAGECONFIG[python] = "--with-python=${UNPACKDIR}/python,--without-python,nativesdk-python3, \ - nativesdk-python3-core \ - nativesdk-python3-codecs nativesdk-python3-netclient \ - " -PACKAGECONFIG[readline] = "--with-system-readline,--without-system-readline,nativesdk-readline" -PACKAGECONFIG[debuginfod] = "--with-debuginfod, --without-debuginfod, nativesdk-elfutils" - -SSTATE_ALLOW_OVERLAP_FILES += "${STAGING_DATADIR}/gdb" - -do_configure:prepend() { -cat > ${UNPACKDIR}/python << EOF -#! /bin/sh -case "\$2" in - --includes) echo "-I${STAGING_INCDIR}/${PYTHON_DIR}${PYTHON_ABI}/" ;; - --ldflags) echo "-Wl,-rpath-link,${STAGING_LIBDIR}/.. -Wl,-rpath,${libdir}/.. -lpthread -ldl -lutil -lm -lpython${PYTHON_BASEVERSION}${PYTHON_ABI}" ;; - --exec-prefix) echo "${exec_prefix}" ;; - *) exit 1 ;; -esac -exit 0 -EOF - chmod +x ${UNPACKDIR}/python -} - -# we don't want gdb to provide bfd/iberty/opcodes, which instead will override the -# right bits installed by binutils. -do_install:append() { - rm -rf ${D}${exec_prefix}/lib - cross_canadian_bindirlinks -} diff --git a/meta-microblaze/recipes-devtools/gdb/gdb-cross-canadian_12.1.bb b/meta-microblaze/recipes-devtools/gdb/gdb-cross-canadian_12.1.bb deleted file mode 100644 index 4ab2b7156..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb-cross-canadian_12.1.bb +++ /dev/null @@ -1,3 +0,0 @@ -require gdb-common.inc -require gdb-cross-canadian.inc -require gdb.inc diff --git a/meta-microblaze/recipes-devtools/gdb/gdb-cross.inc b/meta-microblaze/recipes-devtools/gdb/gdb-cross.inc deleted file mode 100644 index b418f3a3c..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb-cross.inc +++ /dev/null @@ -1,31 +0,0 @@ -require gdb-common.inc - -DEPENDS = "expat-native gmp-native ncurses-native flex-native bison-native" - -inherit python3native pkgconfig - -# Overrides PACKAGECONFIG variables in gdb-common.inc -PACKAGECONFIG ??= "readline ${@bb.utils.filter('DISTRO_FEATURES', 'debuginfod', d)}" -PACKAGECONFIG[python] = "--with-python=${PYTHON},--without-python,python3-native" -PACKAGECONFIG[readline] = "--with-system-readline,--without-system-readline,readline-native" -PACKAGECONFIG[debuginfod] = "--with-debuginfod, --without-debuginfod, elfutils-native" - -do_compile:prepend() { - export STAGING_LIBDIR="${STAGING_LIBDIR_NATIVE}" - export STAGING_INCDIR="${STAGING_INCDIR_NATIVE}" -} - -#EXTRA_OEMAKE += "LDFLAGS='${BUILD_LDFLAGS}'" - -GDBPROPREFIX = "" - -PN = "gdb-cross-${TARGET_ARCH}" -BPN = "gdb" - -# Ignore how TARGET_ARCH is computed. -TARGET_ARCH[vardepvalue] = "${TARGET_ARCH}" - -inherit cross -inherit gettext - -datadir .= "/gdb-${TARGET_SYS}${TARGET_VENDOR}-${TARGET_OS}" diff --git a/meta-microblaze/recipes-devtools/gdb/gdb-cross_12.1.bb b/meta-microblaze/recipes-devtools/gdb/gdb-cross_12.1.bb deleted file mode 100644 index 3b654a2f0..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb-cross_12.1.bb +++ /dev/null @@ -1,2 +0,0 @@ -require gdb-cross.inc -require gdb.inc diff --git a/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc b/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc index d36182299..4e8993c4d 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc +++ b/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc @@ -4,14 +4,54 @@ LTTNGUST:microblaze = "" # Add MicroBlaze patches FILESEXTRAPATHS:append := ":${THISDIR}/gdb" +# Our changes are all local, no real patch-status +ERROR_QA:remove = "patch-status" + +LDFLAGS:append:class-target:microblaze = " -latomic" + SRC_URI:append:microblaze = " \ - file://0001-Add-initial-port-of-linux-gdbserver.patch \ - file://0002-Patch-MicroBlaze-Initial-port-of-core-reading-suppor.patch \ - file://0003-Fix-debug-message-when-register-is-unavailable.patch \ - file://0004-Patch-MicroBlaze-MicroBlaze-native-gdb-port.patch \ - file://0005-Patch-microblaze-Adding-64-bit-MB-support.patch \ - file://0006-Patch-MicroBlaze-these-changes-will-make-64-bit-vect.patch \ - file://0007-Patch-MicroBlaze-Added-m64-abi-for-64-bit-target-des.patch \ - file://0008-Patch-MicroBlaze.patch \ - file://0009-gdb-gdserver-Fix-ABI-settings-for-gdbserver.patch \ + file://0001-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch \ + file://0002-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch \ + file://0003-Initial-port-of-core-reading-support-Added-support-f.patch \ + file://0004-Fix-debug-message-when-register-is-unavailable.patch \ + file://0005-MicroBlaze-native-gdb-port.patch \ + file://0006-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch \ + file://0007-these-changes-will-make-64-bit-vectors-as-default-ta.patch \ + file://0008-Added-m64-abi-for-64-bit-target-descriptions.-set-m6.patch \ + file://0009-Depth-Total-number-of-inline-functions-refer-inline-.patch \ + file://0010-Fix-gdb-14-build-errors-for-microblaze-xilinx-elf-20.patch \ + file://0011-fix-gdb-microblaze-xilinx-elf-crash-issue-on-invocat.patch \ + file://0013-Disable-the-warning-message-for-eh_frame_hdr.patch \ + file://0015-upstream-change-to-garbage-collection-sweep-causes-m.patch \ + file://0016-Add-new-bit-field-instructions.patch \ + file://0019-initial-support-for-MicroBlaze-64-bit-m64.patch \ + file://0020-initial-support-for-MicroBlaze-64-bit-m64.patch \ + file://0021-Added-relocations-for-MB-X.patch \ + file://0022-initial-support-for-MicroBlaze-64-bit-m64.patch \ + file://0023-Added-relocations-for-MB-X.patch \ + file://0025-Fixed-address-computation-issues-with-64bit-address-.patch \ + file://0028-fixing-the-long-long-long-mingw-toolchain-issue.patch \ + file://0029-Added-support-to-new-arithmetic-single-register-inst.patch \ + file://0030-double-imml-generation-for-64-bit-values.patch \ + file://0035-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch \ + file://0036-Invalid-data-offsets-pointer-after-relaxation.-Propo.patch \ + file://0037-Double-free-with-ld-no-keep-memory.-Proposed-patches.patch \ + file://0038-MB-binutils-Upstream-port-issues.patch \ + file://0039-Initial-port-of-core-reading-support-Added-support-f.patch \ + file://0040-Fix-build-issues-after-Xilinx-2023.2-binutils-merge.patch \ + file://0041-disable-truncated-register-warning-gdb-remote.c.patch \ + file://0042-Fix-unresolved-conflicts-from-binutils_2_42_merge.patch \ + file://0043-microblaze_gdbarch_init-set-microblaze_abi-based-on-.patch \ + file://0044-Start-bfd_mach_microblaze-values-from-0-0-1-instead-.patch \ + file://0045-Fix-build-issues-bfd-reloc.c-add-missing-relocs-used.patch \ + file://0046-Regenerate-bfd-bfd-in2.h-bfd-libbfd.h.patch \ + file://0047-gdb-remote.c-revert-earlier-change-to-process_g_pack.patch \ + file://0048-Fix-build-issues-after-Xilinx-2023.2-binutils-patch-.patch \ + file://0049-Add-back-R_MICROBLAZE_NONE-for-linker-relaxation-pro.patch \ + file://0050-When-unwinding-pc-value-adjust-return-pc-value.patch \ + file://0051-info-reg-pc-does-not-print-symbolic-value.patch \ + file://0052-Wrong-target-description-accepted-by-microblaze-arch.patch \ + file://0053-Merge-gdb-microblaze-linux-tdep.c-to-gdb-14-and-fix-.patch \ + file://0054-Roll-back-an-improvement-which-inlines-target_gdbarc.patch \ + file://0055-fix-microblaze-linux-nat.patch \ " diff --git a/meta-microblaze/recipes-devtools/gdb/gdb.inc b/meta-microblaze/recipes-devtools/gdb/gdb.inc deleted file mode 100644 index a5dc55458..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb.inc +++ /dev/null @@ -1,20 +0,0 @@ -LICENSE = "GPL-2.0-only & GPL-3.0-only & LGPL-2.0-only & LGPL-3.0-only" -LIC_FILES_CHKSUM = "file://COPYING;md5=59530bdf33659b29e73d4adb9f9f6552 \ - file://COPYING3;md5=d32239bcb673463ab874e80d47fae504 \ - file://COPYING3.LIB;md5=6a6a8e020838b23406c81b19c1d46df6 \ - file://COPYING.LIB;md5=9f604d8a4f8e74f4f5140845a21b6674" - -SRC_URI = "${GNU_MIRROR}/gdb/gdb-${PV}.tar.xz \ - file://0001-make-man-install-relative-to-DESTDIR.patch \ - file://0002-mips-linux-nat-Define-_ABIO32-if-not-defined.patch \ - file://0003-ppc-ptrace-Define-pt_regs-uapi_pt_regs-on-GLIBC-syst.patch \ - file://0004-Dont-disable-libreadline.a-when-using-disable-static.patch \ - file://0005-use-asm-sgidefs.h.patch \ - file://0006-Change-order-of-CFLAGS.patch \ - file://0007-resolve-restrict-keyword-conflict.patch \ - file://0008-Fix-invalid-sigprocmask-call.patch \ - file://0009-gdbserver-ctrl-c-handling.patch \ - file://readline-8.2.patch \ - file://0008-Define-alignof-using-_Alignof-when-using-C11-or-newe.patch \ - " -SRC_URI[sha256sum] = "0e1793bf8f2b54d53f46dea84ccfd446f48f81b297b28c4f7fc017b818d69fed" diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch new file mode 100644 index 000000000..bf7b33633 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch @@ -0,0 +1,42 @@ +From fc4e376f932514d9e5e3c04a18952d5900334c09 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 10 Oct 2022 15:07:22 +0530 +Subject: [PATCH 01/54] Add initial port of linux gdbserver add + gdb_proc_service_h to gdbserver microblaze-linux + +gdbserver needs to initialise the microblaze registers + +other archs use this step to run a *_arch_setup() to carry out all +architecture specific setup - may need to add in future + + * add linux-ptrace.o to gdbserver configure + * Update breakpoint opcode + * fix segfault on connecting gdbserver + * add microblaze_linux_memory_remove_breakpoint + * add set_solib_svr4_fetch_link_map_offsets + * add set_gdbarch_fetch_tls_load_module_address + * Force reading of r0 as 0, prevent stores + +Signed-off-by: David Holsgrove +Signed-off-by: Nathan Rossi +Signed-off-by: Mahesh Bodapati +Signed-off-by: Aayush Misra +--- + gdbserver/Makefile.in | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in +index b597515d428..faf32cd9d42 100644 +--- a/gdbserver/Makefile.in ++++ b/gdbserver/Makefile.in +@@ -180,6 +180,7 @@ SFILES = \ + $(srcdir)/linux-loongarch-low.cc \ + $(srcdir)/linux-low.cc \ + $(srcdir)/linux-m68k-low.cc \ ++ $(srcdir)/linux-microblaze-low.cc \ + $(srcdir)/linux-mips-low.cc \ + $(srcdir)/linux-nios2-low.cc \ + $(srcdir)/linux-or1k-low.cc \ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0001-make-man-install-relative-to-DESTDIR.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0001-make-man-install-relative-to-DESTDIR.patch deleted file mode 100644 index 16d6cf196..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0001-make-man-install-relative-to-DESTDIR.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 8eca28eddcda4ce8a345ca031f43ff1ed6f37089 Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Mon, 2 Mar 2015 02:27:55 +0000 -Subject: [PATCH 1/9] make man install relative to DESTDIR - -Upstream-Status: Pending - -Signed-off-by: Khem Raj ---- - sim/common/Make-common.in | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in -index 74e5dad3049..9e95c224ba4 100644 ---- a/sim/common/Make-common.in -+++ b/sim/common/Make-common.in -@@ -70,7 +70,7 @@ tooldir = $(libdir)/$(target_alias) - datadir = @datadir@ - datarootdir = @datarootdir@ - mandir = @mandir@ --man1dir = $(mandir)/man1 -+man1dir = $(DESTDIR)$(mandir)/man1 - infodir = @infodir@ - includedir = @includedir@ - --- -2.36.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0002-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0002-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch new file mode 100644 index 000000000..02b42cbd7 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0002-Add-initial-port-of-linux-gdbserver-add-gdb_proc_ser.patch @@ -0,0 +1,639 @@ +From fa91dbd8c23e519760213f32de572cbf98ad6bc3 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 10 Oct 2022 15:07:22 +0530 +Subject: [PATCH 02/54] Add initial port of linux gdbserver add + gdb_proc_service_h to gdbserver microblaze-linux + +gdbserver needs to initialise the microblaze registers + +other archs use this step to run a *_arch_setup() to carry out all +architecture specific setup - may need to add in future + + * add linux-ptrace.o to gdbserver configure + * Update breakpoint opcode + * fix segfault on connecting gdbserver + * add microblaze_linux_memory_remove_breakpoint + * add set_solib_svr4_fetch_link_map_offsets + * add set_gdbarch_fetch_tls_load_module_address + * Force reading of r0 as 0, prevent stores + +Signed-off-by: David Holsgrove +Signed-off-by: Nathan Rossi +Signed-off-by: Mahesh Bodapati +Signed-off-by: Aayush Misra +--- + gdb/configure.host | 2 + + gdb/features/Makefile | 1 + + gdb/features/microblaze-linux.xml | 13 ++ + gdb/microblaze-linux-tdep.c | 29 ++- + gdb/microblaze-tdep.c | 35 +++- + gdb/microblaze-tdep.h | 4 +- + gdb/regformats/microblaze-linux.dat | 64 +++++++ + gdb/regformats/reg-microblaze.dat | 41 +++++ + gdbserver/configure.srv | 10 ++ + gdbserver/linux-microblaze-low.cc | 269 ++++++++++++++++++++++++++++ + 10 files changed, 465 insertions(+), 3 deletions(-) + create mode 100644 gdb/features/microblaze-linux.xml + create mode 100644 gdb/regformats/microblaze-linux.dat + create mode 100644 gdb/regformats/reg-microblaze.dat + create mode 100644 gdbserver/linux-microblaze-low.cc + +diff --git a/gdb/configure.host b/gdb/configure.host +index da71675b201..877537d06ef 100644 +--- a/gdb/configure.host ++++ b/gdb/configure.host +@@ -61,6 +61,7 @@ i[34567]86*) gdb_host_cpu=i386 ;; + loongarch*) gdb_host_cpu=loongarch ;; + m68*) gdb_host_cpu=m68k ;; + mips*) gdb_host_cpu=mips ;; ++microblaze*) gdb_host_cpu=microblaze ;; + powerpc* | rs6000) gdb_host_cpu=powerpc ;; + sparcv9 | sparc64) gdb_host_cpu=sparc ;; + s390*) gdb_host_cpu=s390 ;; +@@ -127,6 +128,7 @@ m68*-*-openbsd*) gdb_host=obsd ;; + + m88*-*-openbsd*) gdb_host=obsd ;; + ++microblaze*-*linux*) gdb_host=linux ;; + mips*-*-linux*) gdb_host=linux ;; + mips*-*-netbsdaout* | mips*-*-knetbsd*-gnu) + gdb_host=nbsd ;; +diff --git a/gdb/features/Makefile b/gdb/features/Makefile +index 32341f71815..0af9d67c2f7 100644 +--- a/gdb/features/Makefile ++++ b/gdb/features/Makefile +@@ -46,6 +46,7 @@ + # List of .dat files to create in ../regformats/ + WHICH = mips-linux mips-dsp-linux \ + mips64-linux mips64-dsp-linux \ ++ microblaze-linux \ + nios2-linux \ + or1k-linux \ + rs6000/powerpc-32 \ +diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml +new file mode 100644 +index 00000000000..688a3f83d1e +--- /dev/null ++++ b/gdb/features/microblaze-linux.xml +@@ -0,0 +1,13 @@ ++ ++ ++ ++ ++ ++ microblaze ++ GNU/Linux ++ ++ +diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c +index ae33cb5c014..9160b4ad464 100644 +--- a/gdb/microblaze-linux-tdep.c ++++ b/gdb/microblaze-linux-tdep.c +@@ -37,6 +37,22 @@ + #include "tramp-frame.h" + #include "linux-tdep.h" + ++static int microblaze_debug_flag = 0; ++ ++static void ++microblaze_debug (const char *fmt, ...) ++{ ++ if (microblaze_debug_flag) ++ { ++ va_list args; ++ ++ va_start (args, fmt); ++ printf_unfiltered ("MICROBLAZE LINUX: "); ++ vprintf_unfiltered (fmt, args); ++ va_end (args); ++ } ++} ++ + static int + microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, + struct bp_target_info *bp_tgt) +@@ -50,13 +66,20 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, + /* Determine appropriate breakpoint contents and size for this address. */ + bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); + ++ /* Make sure we see the memory breakpoints. */ ++ scoped_restore restore_memory ++ = make_scoped_restore_show_memory_breakpoints (1); ++ + val = target_read_memory (addr, old_contents, bplen); + + /* If our breakpoint is no longer at the address, this means that the + program modified the code on us, so it is wrong to put back the + old value. */ + if (val == 0 && memcmp (bp, old_contents, bplen) == 0) +- val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen); ++ { ++ val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen); ++ microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr); ++ } + + return val; + } +@@ -129,6 +152,10 @@ microblaze_linux_init_abi (struct gdbarch_info info, + /* Trampolines. */ + tramp_frame_prepend_unwinder (gdbarch, + µblaze_linux_sighandler_tramp_frame); ++ ++ /* Enable TLS support. */ ++ set_gdbarch_fetch_tls_load_module_address (gdbarch, ++ svr4_fetch_objfile_link_map); + } + + void _initialize_microblaze_linux_tdep (); +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index f254a54305c..28a647e940b 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -128,7 +128,38 @@ microblaze_fetch_instruction (CORE_ADDR pc) + constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT; + + typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint; +- ++static int ++microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, ++ struct bp_target_info *bp_tgt) ++{ ++ CORE_ADDR addr = bp_tgt->placed_address; ++ const unsigned char *bp; ++ int val; ++ int bplen; ++ gdb_byte old_contents[BREAKPOINT_MAX]; ++ ++ /* Determine appropriate breakpoint contents and size for this address. */ ++ bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); ++ if (bp == NULL) ++ error (_("Software breakpoints not implemented for this target.")); ++ ++ /* Make sure we see the memory breakpoints. */ ++ scoped_restore restore_memory ++ = make_scoped_restore_show_memory_breakpoints (1); ++ ++ val = target_read_memory (addr, old_contents, bplen); ++ ++ /* If our breakpoint is no longer at the address, this means that the ++ program modified the code on us, so it is wrong to put back the ++ old value. */ ++ if (val == 0 && memcmp (bp, old_contents, bplen) == 0) ++ { ++ val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen); ++ microblaze_debug ("microblaze_linux_memory_remove_breakpoint writing back to memory at addr 0x%lx\n", addr); ++ } ++ ++ return val; ++} + + /* Allocate and initialize a frame cache. */ + +@@ -714,6 +745,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + microblaze_breakpoint::kind_from_pc); + set_gdbarch_sw_breakpoint_from_kind (gdbarch, + microblaze_breakpoint::bp_from_kind); ++ set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); + + set_gdbarch_frame_args_skip (gdbarch, 8); + +@@ -754,4 +786,5 @@ When non-zero, microblaze specific debugging is enabled."), + NULL, + &setdebuglist, &showdebuglist); + ++ + } +diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h +index 892e5b3b849..e9f57e97c26 100644 +--- a/gdb/microblaze-tdep.h ++++ b/gdb/microblaze-tdep.h +@@ -118,6 +118,8 @@ struct microblaze_frame_cache + + /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used. + Only used for native debugging. */ +-#define MICROBLAZE_BREAKPOINT {0xb9, 0xcc, 0x00, 0x60} ++#define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18} ++#define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba} ++ + + #endif /* microblaze-tdep.h */ +diff --git a/gdb/regformats/microblaze-linux.dat b/gdb/regformats/microblaze-linux.dat +new file mode 100644 +index 00000000000..b5b49f485cd +--- /dev/null ++++ b/gdb/regformats/microblaze-linux.dat +@@ -0,0 +1,64 @@ ++# THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi :set ro: ++# Generated from: microblaze-linux.xml ++name:microblaze_linux ++xmltarget:microblaze-linux.xml ++expedite:r1,rpc ++32:r0 ++32:r1 ++32:r2 ++32:r3 ++32:r4 ++32:r5 ++32:r6 ++32:r7 ++32:r8 ++32:r9 ++32:r10 ++32:r11 ++32:r12 ++32:r13 ++32:r14 ++32:r15 ++32:r16 ++32:r17 ++32:r18 ++32:r19 ++32:r20 ++32:r21 ++32:r22 ++32:r23 ++32:r24 ++32:r25 ++32:r26 ++32:r27 ++32:r28 ++32:r29 ++32:r30 ++32:r31 ++32:rpc ++32:rmsr ++32:rear ++32:resr ++32:rfsr ++32:rbtr ++32:rpvr0 ++32:rpvr1 ++32:rpvr2 ++32:rpvr3 ++32:rpvr4 ++32:rpvr5 ++32:rpvr6 ++32:rpvr7 ++32:rpvr8 ++32:rpvr9 ++32:rpvr10 ++32:rpvr11 ++32:redr ++32:rpid ++32:rzpr ++32:rtlbx ++32:rtlbsx ++32:rtlblo ++32:rtlbhi ++32:slr ++32:shr +diff --git a/gdb/regformats/reg-microblaze.dat b/gdb/regformats/reg-microblaze.dat +new file mode 100644 +index 00000000000..bd8a4384424 +--- /dev/null ++++ b/gdb/regformats/reg-microblaze.dat +@@ -0,0 +1,41 @@ ++name:microblaze ++expedite:r1,pc ++32:r0 ++32:r1 ++32:r2 ++32:r3 ++32:r4 ++32:r5 ++32:r6 ++32:r7 ++32:r8 ++32:r9 ++32:r10 ++32:r11 ++32:r12 ++32:r13 ++32:r14 ++32:r15 ++32:r16 ++32:r17 ++32:r18 ++32:r19 ++32:r20 ++32:r21 ++32:r22 ++32:r23 ++32:r24 ++32:r25 ++32:r26 ++32:r27 ++32:r28 ++32:r29 ++32:r30 ++32:r31 ++32:pc ++32:msr ++32:ear ++32:esr ++32:fsr ++32:slr ++32:shr +diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv +index 9e861a75088..11ce617e72f 100644 +--- a/gdbserver/configure.srv ++++ b/gdbserver/configure.srv +@@ -159,6 +159,16 @@ case "${gdbserver_host}" in + srv_linux_regsets=yes + srv_linux_thread_db=yes + ;; ++ ++microblaze*-*-linux*) srv_regobj="microblaze-linux.o" ++ srv_tgtobj="$srv_linux_obj linux-microblaze-low.o" ++ srv_xmlfiles="microblaze-linux.xml" ++ srv_xmlfiles="${srv_xmlfiles} microblaze-core.xml" ++ srv_linux_usrregs=yes ++ srv_linux_regsets=yes ++ srv_linux_thread_db=yes ++ ;; ++ + mips*-*-linux*) srv_regobj="mips-linux.o" + srv_regobj="${srv_regobj} mips-dsp-linux.o" + srv_regobj="${srv_regobj} mips64-linux.o" +diff --git a/gdbserver/linux-microblaze-low.cc b/gdbserver/linux-microblaze-low.cc +new file mode 100644 +index 00000000000..bf9eecc41ab +--- /dev/null ++++ b/gdbserver/linux-microblaze-low.cc +@@ -0,0 +1,269 @@ ++/* GNU/Linux/Microblaze specific low level interface, for the remote server for ++ GDB. ++ Copyright (C) 1995-2013 Free Software Foundation, Inc. ++ ++ This file is part of GDB. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program. If not, see . */ ++ ++#include "server.h" ++#include "linux-low.h" ++ ++#include "elf/common.h" ++#include "nat/gdb_ptrace.h" ++#include ++ ++#include ++#include ++#include ++ ++#include "gdb_proc_service.h" ++ ++ ++static int microblaze_regmap[] = ++ {PT_GPR(0), PT_GPR(1), PT_GPR(2), PT_GPR(3), ++ PT_GPR(4), PT_GPR(5), PT_GPR(6), PT_GPR(7), ++ PT_GPR(8), PT_GPR(9), PT_GPR(10), PT_GPR(11), ++ PT_GPR(12), PT_GPR(13), PT_GPR(14), PT_GPR(15), ++ PT_GPR(16), PT_GPR(17), PT_GPR(18), PT_GPR(19), ++ PT_GPR(20), PT_GPR(21), PT_GPR(22), PT_GPR(23), ++ PT_GPR(24), PT_GPR(25), PT_GPR(26), PT_GPR(27), ++ PT_GPR(28), PT_GPR(29), PT_GPR(30), PT_GPR(31), ++ PT_PC, PT_MSR, PT_EAR, PT_ESR, ++ PT_FSR ++ }; ++ ++ ++ ++class microblaze_target : public linux_process_target ++{ ++public: ++ ++ const regs_info *get_regs_info () override; ++ ++ const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override; ++ // CORE_ADDR microblaze_reinsert_addr (regcache *regcache); ++ ++protected: ++ ++ void low_arch_setup () override; ++ ++ bool low_cannot_fetch_register (int regno) override; ++ ++ bool low_cannot_store_register (int regno) override; ++ ++ // bool low_supports_breakpoints () override; ++ ++ CORE_ADDR low_get_pc (regcache *regcache) override; ++ ++ void low_set_pc (regcache *regcache, CORE_ADDR newpc) override; ++ ++ bool low_breakpoint_at (CORE_ADDR pc) override; ++}; ++ ++/* The singleton target ops object. */ ++ ++static microblaze_target the_microblaze_target; ++ ++#define microblaze_num_regs (sizeof (microblaze_regmap) / sizeof (microblaze_regmap[0])) ++ ++/* Defined in auto-generated file microblaze-linux.c. */ ++void init_registers_microblaze_linux (void); ++extern const struct target_desc *tdesc_microblaze_linux; ++ ++bool ++microblaze_target::low_cannot_store_register (int regno) ++{ ++ if (microblaze_regmap[regno] == -1 || regno == 0) ++ return 1; ++ ++ return 0; ++} ++ ++bool ++microblaze_target::low_cannot_fetch_register (int regno) ++{ ++ return 0; ++} ++ ++CORE_ADDR ++microblaze_target::low_get_pc (struct regcache *regcache) ++{ ++ unsigned long pc; ++ ++ collect_register_by_name (regcache, "pc", &pc); ++ return (CORE_ADDR) pc; ++} ++ ++void ++microblaze_target::low_set_pc (struct regcache *regcache, CORE_ADDR pc) ++{ ++ unsigned long newpc = pc; ++ ++ supply_register_by_name (regcache, "pc", &newpc); ++} ++ ++/* dbtrap insn */ ++/* brki r16, 0x18; */ ++static const unsigned long microblaze_breakpoint = 0xba0c0018; ++#define microblaze_breakpoint_len 4 ++ ++/* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */ ++ ++const gdb_byte * ++microblaze_target::sw_breakpoint_from_kind (int kind, int *size) ++{ ++ *size = microblaze_breakpoint_len; ++ return (const gdb_byte *) µblaze_breakpoint; ++} ++ ++bool ++microblaze_target::low_breakpoint_at (CORE_ADDR where) ++{ ++ unsigned long insn; ++ ++ read_memory (where, (unsigned char *) &insn, 4); ++ if (insn == microblaze_breakpoint) ++ return 1; ++ /* If necessary, recognize more trap instructions here. GDB only uses the ++ one. */ ++ return 0; ++} ++#if 0 ++CORE_ADDR ++microblaze_target::microblaze_reinsert_addr (struct regcache *regcache) ++{ ++ unsigned long pc; ++ collect_register_by_name (regcache, "r15", &pc); ++ return pc; ++} ++#endif ++#if 0 ++#ifdef HAVE_PTRACE_GETREGS ++ ++static void ++microblaze_collect_ptrace_register (struct regcache *regcache, int regno, char *buf) ++{ ++ int size = register_size (regcache->tdesc, regno); ++ ++ memset (buf, 0, sizeof (long)); ++ ++ if (size < sizeof (long)) ++ collect_register (regcache, regno, buf + sizeof (long) - size); ++ else ++ collect_register (regcache, regno, buf); ++} ++ ++static void ++microblaze_supply_ptrace_register (struct regcache *regcache, ++ int regno, const char *buf) ++{ ++ int size = register_size (regcache->tdesc, regno); ++ ++ if (regno == 0) { ++ unsigned long regbuf_0 = 0; ++ /* clobbering r0 so that it is always 0 as enforced by hardware */ ++ supply_register (regcache, regno, (const char*)®buf_0); ++ } else { ++ if (size < sizeof (long)) ++ supply_register (regcache, regno, buf + sizeof (long) - size); ++ else ++ supply_register (regcache, regno, buf); ++ } ++} ++ ++/* Provide only a fill function for the general register set. ps_lgetregs ++ will use this for NPTL support. */ ++ ++static void microblaze_fill_gregset (struct regcache *regcache, void *buf) ++{ ++ int i; ++ ++ for (i = 0; i < 32; i++) ++ microblaze_collect_ptrace_register (regcache, i, (char *) buf + microblaze_regmap[i]); ++} ++ ++static void ++microblaze_store_gregset (struct regcache *regcache, const void *buf) ++{ ++ int i; ++ ++ for (i = 0; i < 32; i++) ++ supply_register (regcache, i, (char *) buf + microblaze_regmap[i]); ++} ++ ++#endif /* HAVE_PTRACE_GETREGS */ ++#endif ++ ++static struct regset_info microblaze_regsets[] = { ++#if 0 ++#ifdef HAVE_PTRACE_GETREGS ++ { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t), GENERAL_REGS, microblaze_fill_gregset, microblaze_store_gregset }, ++ { 0, 0, 0, -1, GENERAL_REGS, NULL, NULL }, ++#endif /* HAVE_PTRACE_GETREGS */ ++#endif ++ { 0, 0, 0, -1, GENERAL_REGS, NULL, NULL }, ++ NULL_REGSET ++}; ++ ++static struct usrregs_info microblaze_usrregs_info = ++ { ++ microblaze_num_regs, ++ microblaze_regmap, ++ }; ++ ++static struct regsets_info microblaze_regsets_info = ++ { ++ microblaze_regsets, /* regsets */ ++ 0, /* num_regsets */ ++ NULL, /* disabled_regsets */ ++ }; ++ ++static struct regs_info microblaze_regs_info = ++ { ++ NULL, /* regset_bitmap */ ++ µblaze_usrregs_info, ++ µblaze_regsets_info ++ }; ++ ++const regs_info * ++microblaze_target::get_regs_info (void) ++{ ++ return µblaze_regs_info; ++} ++ ++/* Support for hardware single step. */ ++ ++static int ++microblaze_supports_hardware_single_step (void) ++{ ++ return 1; ++} ++ ++ ++void ++microblaze_target::low_arch_setup (void) ++{ ++ current_process ()->tdesc = tdesc_microblaze_linux; ++} ++ ++linux_process_target *the_linux_target = &the_microblaze_target; ++ ++void ++initialize_low_arch (void) ++{ ++ init_registers_microblaze_linux (); ++ initialize_regsets_info (µblaze_regsets_info); ++} ++ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0002-mips-linux-nat-Define-_ABIO32-if-not-defined.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0002-mips-linux-nat-Define-_ABIO32-if-not-defined.patch deleted file mode 100644 index 8d263de89..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0002-mips-linux-nat-Define-_ABIO32-if-not-defined.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 37d3afd2eaa95c89ad7cb5d0079b017752e4d0ea Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Wed, 23 Mar 2016 06:30:09 +0000 -Subject: [PATCH 2/9] mips-linux-nat: Define _ABIO32 if not defined - -This helps building gdb on mips64 on musl, since -musl does not provide sgidefs.h this define is -only defined when GCC is using o32 ABI, in that -case gcc emits it as built-in define and hence -it works ok for mips32 - -Upstream-Status: Pending -Signed-off-by: Khem Raj ---- - gdb/mips-linux-nat.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/gdb/mips-linux-nat.c b/gdb/mips-linux-nat.c -index 20e12b6889e..6adc61235aa 100644 ---- a/gdb/mips-linux-nat.c -+++ b/gdb/mips-linux-nat.c -@@ -41,6 +41,10 @@ - #ifndef PTRACE_GET_THREAD_AREA - #define PTRACE_GET_THREAD_AREA 25 - #endif -+/* musl does not define and relies on compiler built-in macros for it */ -+#ifndef _ABIO32 -+#define _ABIO32 1 -+#endif - - class mips_linux_nat_target final : public linux_nat_trad_target - { --- -2.36.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0003-Fix-debug-message-when-register-is-unavailable.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0003-Fix-debug-message-when-register-is-unavailable.patch deleted file mode 100644 index d8ba6fca4..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0003-Fix-debug-message-when-register-is-unavailable.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 6ecb1de66a6a5f55e69c9b108a3d5a85b0ebf315 Mon Sep 17 00:00:00 2001 -From: Nathan Rossi -Date: Tue, 8 May 2012 18:11:17 +1000 -Subject: [PATCH 3/8] Fix debug message when register is unavailable - -Upstream-Status: Pending - -Signed-off-by: Nathan Rossi - -Conflicts: - gdb/frame.c ---- - gdb/frame.c | 21 ++++++++++++++------- - 1 file changed, 14 insertions(+), 7 deletions(-) - -diff --git a/gdb/frame.c b/gdb/frame.c -index ce95cf8343b..c49ab9feab2 100644 ---- a/gdb/frame.c -+++ b/gdb/frame.c -@@ -1261,13 +1261,20 @@ frame_unwind_register_value (frame_info *next_frame, int regnum) - else - { - int i; -- gdb::array_view buf = value_contents (value); -- -- fprintf_unfiltered (&debug_file, " bytes="); -- fprintf_unfiltered (&debug_file, "["); -- for (i = 0; i < register_size (gdbarch, regnum); i++) -- fprintf_unfiltered (&debug_file, "%02x", buf[i]); -- fprintf_unfiltered (&debug_file, "]"); -+ const gdb_byte *buf = NULL; -+ if (value_entirely_available(value)) { -+ gdb::array_view buf = value_contents (value); -+ } -+ -+ fprintf_unfiltered (gdb_stdlog, " bytes="); -+ fprintf_unfiltered (gdb_stdlog, "["); -+ if (buf != NULL) { -+ for (i = 0; i < register_size (gdbarch, regnum); i++) -+ fprintf_unfiltered (gdb_stdlog, "%02x", buf[i]); -+ } else { -+ fprintf_unfiltered (gdb_stdlog, "unavailable"); -+ } -+ fprintf_unfiltered (gdb_stdlog, "]"); - } - } - --- -2.37.1 (Apple Git-137.1) - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0003-Initial-port-of-core-reading-support-Added-support-f.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0003-Initial-port-of-core-reading-support-Added-support-f.patch new file mode 100644 index 000000000..6e86a7736 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0003-Initial-port-of-core-reading-support-Added-support-f.patch @@ -0,0 +1,301 @@ +From 118ce6c252a56ca592a7fdd40919522be00d5fb4 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 10 Oct 2022 16:37:53 +0530 +Subject: [PATCH 03/54] Initial port of core reading support Added support for + reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO + information for rebuilding ".reg" sections of core dumps at run time. + +Signed-off-by: David Holsgrove +Signed-off-by: Nathan Rossi +Signed-off-by: Mahesh Bodapati +Signed-off-by: Aayush Misra +--- + bfd/elf32-microblaze.c | 84 +++++++++++++++++++++++++++++++++++++ + gdb/configure.tgt | 2 +- + gdb/microblaze-linux-tdep.c | 17 +++++++- + gdb/microblaze-tdep.c | 48 +++++++++++++++++++++ + gdb/microblaze-tdep.h | 28 +++++++++++++ + 5 files changed, 177 insertions(+), 2 deletions(-) + +diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c +index a7e81c70fc8..487ddeafc5a 100644 +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -754,6 +754,87 @@ microblaze_elf_is_local_label_name (bfd *abfd, const char *name) + return _bfd_elf_is_local_label_name (abfd, name); + } + ++/* Support for core dump NOTE sections. */ ++static bool ++microblaze_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) ++{ ++ int offset; ++ unsigned int size; ++ ++ switch (note->descsz) ++ { ++ default: ++ return false; ++ ++ case 228: /* Linux/MicroBlaze */ ++ /* pr_cursig */ ++ elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12); ++ ++ /* pr_pid */ ++ elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24); ++ ++ /* pr_reg */ ++ offset = 72; ++ size = 50 * 4; ++ ++ break; ++ } ++ ++ /* Make a ".reg/999" section. */ ++ return _bfd_elfcore_make_pseudosection (abfd, ".reg", ++ size, note->descpos + offset); ++} ++ ++static bool ++microblaze_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) ++{ ++ switch (note->descsz) ++ { ++ default: ++ return false; ++ ++ case 128: /* Linux/MicroBlaze elf_prpsinfo */ ++ elf_tdata (abfd)->core->program ++ = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16); ++ elf_tdata (abfd)->core->command ++ = _bfd_elfcore_strndup (abfd, note->descdata + 48, 80); ++ } ++ ++ /* Note that for some reason, a spurious space is tacked ++ onto the end of the args in some (at least one anyway) ++ implementations, so strip it off if it exists. */ ++ ++ { ++ char *command = elf_tdata (abfd)->core->command; ++ int n = strlen (command); ++ ++ if (0 < n && command[n - 1] == ' ') ++ command[n - 1] = '\0'; ++ } ++ ++ return true; ++} ++ ++/* The microblaze linker (like many others) needs to keep track of ++ the number of relocs that it decides to copy as dynamic relocs in ++ check_relocs for each symbol. This is so that it can later discard ++ them if they are found to be unnecessary. We store the information ++ in a field extending the regular ELF linker hash table. */ ++ ++struct elf32_mb_dyn_relocs ++{ ++ struct elf32_mb_dyn_relocs *next; ++ ++ /* The input section of the reloc. */ ++ asection *sec; ++ ++ /* Total number of relocs copied for the input section. */ ++ bfd_size_type count; ++ ++ /* Number of pc-relative relocs copied for the input section. */ ++ bfd_size_type pc_count; ++}; ++ + /* ELF linker hash entry. */ + + struct elf32_mb_link_hash_entry +@@ -3480,4 +3561,7 @@ microblaze_elf_add_symbol_hook (bfd *abfd, + #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections + #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook + ++#define elf_backend_grok_prstatus microblaze_elf_grok_prstatus ++#define elf_backend_grok_psinfo microblaze_elf_grok_psinfo ++ + #include "elf32-target.h" +diff --git a/gdb/configure.tgt b/gdb/configure.tgt +index 47a674201f9..d0673abd2b8 100644 +--- a/gdb/configure.tgt ++++ b/gdb/configure.tgt +@@ -415,7 +415,7 @@ mep-*-*) + + microblaze*-linux-*|microblaze*-*-linux*) + # Target: Xilinx MicroBlaze running Linux +- gdb_target_obs="microblaze-tdep.o microblaze-linux-tdep.o solib-svr4.o \ ++ gdb_target_obs="microblaze-tdep.o microblaze-linux-tdep.o solib-svr4.o glibc-tdep.o \ + symfile-mem.o linux-tdep.o" + ;; + microblaze*-*-*) +diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c +index 9160b4ad464..17bcb50fd4f 100644 +--- a/gdb/microblaze-linux-tdep.c ++++ b/gdb/microblaze-linux-tdep.c +@@ -36,6 +36,7 @@ + #include "frame-unwind.h" + #include "tramp-frame.h" + #include "linux-tdep.h" ++#include "glibc-tdep.h" + + static int microblaze_debug_flag = 0; + +@@ -135,11 +136,14 @@ static struct tramp_frame microblaze_linux_sighandler_tramp_frame = + microblaze_linux_sighandler_cache_init + }; + +- + static void + microblaze_linux_init_abi (struct gdbarch_info info, + struct gdbarch *gdbarch) + { ++ struct microblaze_gdbarch_tdep *tdep =(microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); ++ ++ tdep->sizeof_gregset = 200; ++ + linux_init_abi (info, gdbarch, 0); + + set_gdbarch_memory_remove_breakpoint (gdbarch, +@@ -153,6 +157,17 @@ microblaze_linux_init_abi (struct gdbarch_info info, + tramp_frame_prepend_unwinder (gdbarch, + µblaze_linux_sighandler_tramp_frame); + ++ /* BFD target for core files. */ ++ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); ++ else ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); ++ ++ ++ /* Shared library handling. */ ++ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); ++ set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); ++ + /* Enable TLS support. */ + set_gdbarch_fetch_tls_load_module_address (gdbarch, + svr4_fetch_objfile_link_map); +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 28a647e940b..6ab36bd746b 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -665,6 +665,43 @@ microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) + tdesc_microblaze_with_stack_protect); + } + ++void ++microblaze_supply_gregset (const struct regset *regset, ++ struct regcache *regcache, ++ int regnum, const void *gregs) ++{ ++ const unsigned int *regs = (const unsigned int *)gregs; ++ if (regnum >= 0) ++ regcache->raw_supply (regnum, regs + regnum); ++ ++ if (regnum == -1) { ++ int i; ++ ++ for (i = 0; i < 50; i++) { ++ regcache->raw_supply (i, regs + i); ++ } ++ } ++} ++ ++ ++/* Return the appropriate register set for the core section identified ++ by SECT_NAME and SECT_SIZE. */ ++ ++static void ++microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, ++ iterate_over_regset_sections_cb *cb, ++ void *cb_data, ++ const struct regcache *regcache) ++{ ++ struct microblaze_gdbarch_tdep *tdep =(microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); ++ ++ cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data); ++ ++ cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data); ++} ++ ++ ++ + static struct gdbarch * + microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + { +@@ -716,6 +753,10 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + gdbarch *gdbarch + = gdbarch_alloc (&info, gdbarch_tdep_up (new microblaze_gdbarch_tdep)); + ++ tdep->gregset = NULL; ++ tdep->sizeof_gregset = 0; ++ tdep->fpregset = NULL; ++ tdep->sizeof_fpregset = 0; + set_gdbarch_long_double_bit (gdbarch, 128); + + set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS); +@@ -764,6 +805,13 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); + if (tdesc_data != NULL) + tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data)); ++ //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer); ++ ++ /* If we have register sets, enable the generic core file support. */ ++ if (tdep->gregset) { ++ set_gdbarch_iterate_over_regset_sections (gdbarch, ++ microblaze_iterate_over_regset_sections); ++ } + + return gdbarch; + } +diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h +index e9f57e97c26..738da4f0531 100644 +--- a/gdb/microblaze-tdep.h ++++ b/gdb/microblaze-tdep.h +@@ -23,8 +23,23 @@ + #include "gdbarch.h" + + /* Microblaze architecture-specific information. */ ++struct microblaze_gregset ++{ ++ microblaze_gregset() {} ++ unsigned int gregs[32]; ++ unsigned int fpregs[32]; ++ unsigned int pregs[16]; ++}; ++ + struct microblaze_gdbarch_tdep : gdbarch_tdep_base + { ++ int dummy; // declare something. ++ ++ /* Register sets. */ ++ struct regset *gregset; ++ size_t sizeof_gregset; ++ struct regset *fpregset; ++ size_t sizeof_fpregset; + }; + + /* Register numbers. */ +@@ -121,5 +136,18 @@ struct microblaze_frame_cache + #define MICROBLAZE_BREAKPOINT {0xba, 0x0c, 0x00, 0x18} + #define MICROBLAZE_BREAKPOINT_LE {0x18, 0x00, 0x0c, 0xba} + ++extern void microblaze_supply_gregset (const struct regset *regset, ++ struct regcache *regcache, ++ int regnum, const void *gregs); ++extern void microblaze_collect_gregset (const struct regset *regset, ++ const struct regcache *regcache, ++ int regnum, void *gregs); ++extern void microblaze_supply_fpregset (struct regcache *regcache, ++ int regnum, const void *fpregs); ++extern void microblaze_collect_fpregset (const struct regcache *regcache, ++ int regnum, void *fpregs); ++ ++extern const struct regset * microblaze_regset_from_core_section (struct gdbarch *gdbarch, ++ const char *sect_name, size_t sect_size); + + #endif /* microblaze-tdep.h */ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0003-ppc-ptrace-Define-pt_regs-uapi_pt_regs-on-GLIBC-syst.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0003-ppc-ptrace-Define-pt_regs-uapi_pt_regs-on-GLIBC-syst.patch deleted file mode 100644 index 7e09404bb..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0003-ppc-ptrace-Define-pt_regs-uapi_pt_regs-on-GLIBC-syst.patch +++ /dev/null @@ -1,52 +0,0 @@ -From e689eec672ee8c53b3adb2ade2b5deb9b7cd99d4 Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Sat, 30 Apr 2016 18:32:14 -0700 -Subject: [PATCH 3/9] ppc/ptrace: Define pt_regs uapi_pt_regs on !GLIBC systems - -Upstream-Status: Pending - -Signed-off-by: Khem Raj ---- - gdb/nat/ppc-linux.h | 6 ++++++ - gdbserver/linux-ppc-low.cc | 6 ++++++ - 2 files changed, 12 insertions(+) - -diff --git a/gdb/nat/ppc-linux.h b/gdb/nat/ppc-linux.h -index 1094f6b0be3..d8588a646c2 100644 ---- a/gdb/nat/ppc-linux.h -+++ b/gdb/nat/ppc-linux.h -@@ -18,7 +18,13 @@ - #ifndef NAT_PPC_LINUX_H - #define NAT_PPC_LINUX_H - -+#if !defined(__GLIBC__) -+# define pt_regs uapi_pt_regs -+#endif - #include -+#if !defined(__GLIBC__) -+# undef pt_regs -+#endif - #include - - /* This sometimes isn't defined. */ -diff --git a/gdbserver/linux-ppc-low.cc b/gdbserver/linux-ppc-low.cc -index 08824887003..69afbae5359 100644 ---- a/gdbserver/linux-ppc-low.cc -+++ b/gdbserver/linux-ppc-low.cc -@@ -23,7 +23,13 @@ - #include "elf/common.h" - #include - #include -+#if !defined(__GLIBC__) -+# define pt_regs uapi_pt_regs -+#endif - #include -+#if !defined(__GLIBC__) -+# undef pt_regs -+#endif - - #include "arch/ppc-linux-common.h" - #include "arch/ppc-linux-tdesc.h" --- -2.36.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0004-Dont-disable-libreadline.a-when-using-disable-static.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0004-Dont-disable-libreadline.a-when-using-disable-static.patch deleted file mode 100644 index a1e85e91b..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0004-Dont-disable-libreadline.a-when-using-disable-static.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 15ee6a626242efb8f367be49c13e00d0b72317f0 Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Sat, 30 Apr 2016 15:25:03 -0700 -Subject: [PATCH 4/9] Dont disable libreadline.a when using --disable-static - -If gdb is configured with --disable-static then this is dutifully passed to -readline which then disables libreadline.a, which causes a problem when gdb -tries to link against that. - -To ensure that readline always builds static libraries, pass --enable-static to -the sub-configure. - -Upstream-Status: Pending -Signed-off-by: Ross Burton -Signed-off-by: Khem Raj ---- - Makefile.def | 3 ++- - Makefile.in | 2 +- - 2 files changed, 3 insertions(+), 2 deletions(-) - -diff --git a/Makefile.def b/Makefile.def -index acdcd625ed6..78fc31e1199 100644 ---- a/Makefile.def -+++ b/Makefile.def -@@ -120,7 +120,8 @@ host_modules= { module= libiconv; - missing= install-html; - missing= install-info; }; - host_modules= { module= m4; }; --host_modules= { module= readline; }; -+host_modules= { module= readline; -+ extra_configure_flags='--enable-static';}; - host_modules= { module= sid; }; - host_modules= { module= sim; }; - host_modules= { module= texinfo; no_install= true; }; -diff --git a/Makefile.in b/Makefile.in -index 3aacd2daac9..aa58adada4a 100644 ---- a/Makefile.in -+++ b/Makefile.in -@@ -32791,7 +32791,7 @@ configure-readline: - $$s/$$module_srcdir/configure \ - --srcdir=$${topdir}/$$module_srcdir \ - $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ -- --target=${target_alias} \ -+ --target=${target_alias} --enable-static \ - || exit 1 - @endif readline - --- -2.36.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0004-Fix-debug-message-when-register-is-unavailable.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0004-Fix-debug-message-when-register-is-unavailable.patch new file mode 100644 index 000000000..1e6aff76a --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0004-Fix-debug-message-when-register-is-unavailable.patch @@ -0,0 +1,45 @@ +From a027a1ce861f93bd00d814d6aef28414069330a1 Mon Sep 17 00:00:00 2001 +From: Nathan Rossi +Date: Tue, 8 May 2012 18:11:17 +1000 +Subject: [PATCH 04/54] Fix debug message when register is unavailable + +Signed-off-by: Nathan Rossi + +Conflicts: + gdb/frame.c +Signed-off-by: Aayush Misra +--- + gdb/frame.c | 14 +++++++++++--- + 1 file changed, 11 insertions(+), 3 deletions(-) + +diff --git a/gdb/frame.c b/gdb/frame.c +index 87fb3d7a2d5..c4d967e01d5 100644 +--- a/gdb/frame.c ++++ b/gdb/frame.c +@@ -1313,12 +1313,20 @@ frame_unwind_register_value (frame_info_ptr next_frame, int regnum) + else + { + int i; +- gdb::array_view buf = value->contents (); ++ ++ const gdb_byte *buf = NULL; ++ if (value_entirely_available(value)) { ++ gdb::array_view buf = value->contents (); ++ } + + gdb_printf (&debug_file, " bytes="); + gdb_printf (&debug_file, "["); +- for (i = 0; i < register_size (gdbarch, regnum); i++) +- gdb_printf (&debug_file, "%02x", buf[i]); ++ if (buf != NULL) { ++ for (i = 0; i < register_size (gdbarch, regnum); i++) ++ gdb_printf (&debug_file, "%02x", buf[i]); ++ } else { ++ gdb_printf (&debug_file, "unavailable"); ++ } + gdb_printf (&debug_file, "]"); + } + } +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0005-MicroBlaze-native-gdb-port.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0005-MicroBlaze-native-gdb-port.patch new file mode 100644 index 000000000..a9c6aee44 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0005-MicroBlaze-native-gdb-port.patch @@ -0,0 +1,834 @@ +From 2e84106b932f40eeaa4ae40b441b9eb7b713b2fa Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 10 Oct 2022 18:53:46 +0530 +Subject: [PATCH 05/54] MicroBlaze native gdb port. + +signed-off-by : Mahesh Bodapati + +Signed-off-by: Aayush Misra +--- + gdb/Makefile.in | 2 + + gdb/configure.nat | 4 + + gdb/features/microblaze-linux.c | 79 +++++++ + gdb/microblaze-linux-nat.c | 366 ++++++++++++++++++++++++++++++++ + gdb/microblaze-linux-tdep.c | 2 + + gdb/microblaze-linux-tdep.h | 24 +++ + gdb/microblaze-tdep.c | 151 ++++++++++++- + gdb/microblaze-tdep.h | 15 +- + 8 files changed, 629 insertions(+), 14 deletions(-) + create mode 100755 gdb/features/microblaze-linux.c + create mode 100755 gdb/microblaze-linux-nat.c + create mode 100644 gdb/microblaze-linux-tdep.h + +diff --git a/gdb/Makefile.in b/gdb/Makefile.in +index 9c0a0bff2cd..1ad975b50ae 100644 +--- a/gdb/Makefile.in ++++ b/gdb/Makefile.in +@@ -1406,6 +1406,7 @@ HFILES_NO_SRCDIR = \ + memory-map.h \ + memrange.h \ + microblaze-tdep.h \ ++ microblaze-linux-tdep.h \ + mips-linux-tdep.h \ + mips-netbsd-tdep.h \ + mips-tdep.h \ +@@ -1754,6 +1755,7 @@ ALLDEPFILES = \ + m68k-linux-nat.c \ + m68k-linux-tdep.c \ + m68k-tdep.c \ ++ microblaze-linux-nat.c \ + microblaze-linux-tdep.c \ + microblaze-tdep.c \ + mingw-hdep.c \ +diff --git a/gdb/configure.nat b/gdb/configure.nat +index 1dc4206b69c..05003e57020 100644 +--- a/gdb/configure.nat ++++ b/gdb/configure.nat +@@ -274,6 +274,10 @@ case ${gdb_host} in + # Host: Motorola m68k running GNU/Linux. + NATDEPFILES="${NATDEPFILES} m68k-linux-nat.o" + ;; ++ microblaze) ++ # Host: Microblaze running GNU/Linux. ++ NATDEPFILES="${NATDEPFILES} microblaze-linux-nat.o" ++ ;; + mips) + # Host: Linux/MIPS + NATDEPFILES="${NATDEPFILES} linux-nat-trad.o \ +diff --git a/gdb/features/microblaze-linux.c b/gdb/features/microblaze-linux.c +new file mode 100755 +index 00000000000..267e12f6d59 +--- /dev/null ++++ b/gdb/features/microblaze-linux.c +@@ -0,0 +1,79 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: ++ Original: microblaze.xml */ ++ ++#include "defs.h" ++#include "osabi.h" ++#include "target-descriptions.h" ++ ++struct target_desc *tdesc_microblaze_linux; ++static void ++initialize_tdesc_microblaze_linux (void) ++{ ++ target_desc_up result = allocate_target_description (); ++ struct tdesc_feature *feature; ++ set_tdesc_architecture (result.get(), bfd_scan_arch ("microblaze")); ++ set_tdesc_osabi (result.get(), osabi_from_tdesc_string ("GNU/Linux")); ++ ++ feature = tdesc_create_feature (result.get(), "org.gnu.gdb.microblaze.core"); ++ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rfsr", 36, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rbtr", 37, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr0", 38, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr1", 39, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr2", 40, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr3", 41, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr4", 42, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr5", 43, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr6", 44, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr7", 45, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr8", 46, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr9", 47, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr10", 48, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr11", 49, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "redr", 50, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpid", 51, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rzpr", 52, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbx", 53, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); ++ ++ tdesc_microblaze_linux = result.release(); ++} +diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c +new file mode 100755 +index 00000000000..a348001a3e2 +--- /dev/null ++++ b/gdb/microblaze-linux-nat.c +@@ -0,0 +1,366 @@ ++/* Native-dependent code for GNU/Linux MicroBlaze. ++ Copyright (C) 2021 Free Software Foundation, Inc. ++ ++ This file is part of GDB. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program. If not, see . */ ++ ++#include "defs.h" ++#include "arch-utils.h" ++#include "dis-asm.h" ++#include "frame.h" ++#include "trad-frame.h" ++#include "symtab.h" ++#include "value.h" ++#include "gdbcmd.h" ++#include "breakpoint.h" ++#include "inferior.h" ++#include "gdbthread.h" ++#include "gdbcore.h" ++#include "regcache.h" ++#include "regset.h" ++#include "target.h" ++#include "frame.h" ++#include "frame-base.h" ++#include "frame-unwind.h" ++#include "osabi.h" ++#include "gdbsupport/gdb_assert.h" ++#include ++#include "target-descriptions.h" ++#include "opcodes/microblaze-opcm.h" ++#include "opcodes/microblaze-dis.h" ++#include "gregset.h" ++ ++#include "linux-nat.h" ++#include "linux-tdep.h" ++#include "target-descriptions.h" ++ ++#include ++#include ++#include ++#include "gdbsupport/gdb_wait.h" ++#include ++#include ++#include "nat/gdb_ptrace.h" ++#include "nat/linux-ptrace.h" ++#include "inf-ptrace.h" ++#include ++#include ++#include ++#include ++ ++/* Prototypes for supply_gregset etc. */ ++#include "gregset.h" ++ ++#include "microblaze-tdep.h" ++#include "microblaze-linux-tdep.h" ++#include "inferior.h" ++ ++#include "elf/common.h" ++ ++#include "auxv.h" ++#include "linux-tdep.h" ++ ++#include ++ ++ ++//int have_ptrace_getsetregs=1; ++ ++/* MicroBlaze Linux native additions to the default linux support. */ ++ ++class microblaze_linux_nat_target final : public linux_nat_target ++{ ++public: ++ /* Add our register access methods. */ ++ void fetch_registers (struct regcache *regcache, int regnum) override; ++ void store_registers (struct regcache *regcache, int regnum) override; ++ ++ /* Read suitable target description. */ ++ const struct target_desc *read_description () override; ++}; ++ ++static microblaze_linux_nat_target the_microblaze_linux_nat_target; ++ ++static int ++microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) ++{ ++ int u_addr = -1; ++ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); ++ /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace ++ * interface, and not the wordsize of the program's ABI. */ ++ int wordsize = sizeof (long); ++ ++ /* General purpose registers occupy 1 slot each in the buffer. */ ++ if (regno >= MICROBLAZE_R0_REGNUM ++ && regno <= MICROBLAZE_FSR_REGNUM) ++ u_addr = ((regno - MICROBLAZE_R0_REGNUM)* wordsize); ++ ++ return u_addr; ++} ++ ++/* Copy general purpose register REGNUM (or all gp regs if REGNUM == -1) ++ from regset GREGS into REGCACHE. */ ++ ++static void ++supply_gregset_regnum (struct regcache *regcache, const prgregset_t *gregs, ++ int regnum) ++{ ++ int i; ++ const elf_greg_t *regp = *gregs; ++ /* Access all registers */ ++ if (regnum == -1) ++ { ++ /* We fill the general purpose registers. */ ++ for (i = MICROBLAZE_R0_REGNUM + 1; i < MICROBLAZE_FSR_REGNUM; i++) ++ regcache->raw_supply (i, regp + i); ++ ++ /* Supply MICROBLAZE_PC_REGNUM from index 32. */ ++ regcache->raw_supply (MICROBLAZE_PC_REGNUM, regp + 32); ++ ++ /* Fill the inaccessible zero register with zero. */ ++ regcache->raw_supply_zeroed (0); ++ } ++ else if (regnum == MICROBLAZE_R0_REGNUM) ++ regcache->raw_supply_zeroed (0); ++ else if (regnum == MICROBLAZE_PC_REGNUM) ++ regcache->raw_supply (MICROBLAZE_PC_REGNUM, regp + 32); ++ else if (regnum > MICROBLAZE_R0_REGNUM && regnum < MICROBLAZE_FSR_REGNUM) ++ regcache->raw_supply (regnum, regp + regnum); ++} ++ ++/* Copy all general purpose registers from regset GREGS into REGCACHE. */ ++ ++void ++supply_gregset (struct regcache *regcache, const prgregset_t *gregs) ++{ ++ supply_gregset_regnum (regcache, gregs, -1); ++} ++ ++/* Copy general purpose register REGNUM (or all gp regs if REGNUM == -1) ++ from REGCACHE into regset GREGS. */ ++ ++void ++fill_gregset (const struct regcache *regcache, prgregset_t *gregs, int regnum) ++{ ++ elf_greg_t *regp = *gregs; ++ if (regnum == -1) ++ { ++ /* We fill the general purpose registers. */ ++ for (int i = MICROBLAZE_R0_REGNUM + 1; i < MICROBLAZE_FSR_REGNUM; i++) ++ regcache->raw_collect (i, regp + i); ++ ++ regcache->raw_collect (MICROBLAZE_PC_REGNUM, regp + 32); ++ } ++ else if (regnum == MICROBLAZE_R0_REGNUM) ++ /* Nothing to do here. */ ++ ; ++ else if (regnum > MICROBLAZE_R0_REGNUM && regnum < MICROBLAZE_FSR_REGNUM) ++ regcache->raw_collect (regnum, regp + regnum); ++ else if (regnum == MICROBLAZE_PC_REGNUM) ++ regcache->raw_collect (MICROBLAZE_PC_REGNUM, regp + 32); ++} ++ ++/* Transfering floating-point registers between GDB, inferiors and cores. ++ Since MicroBlaze floating-point registers are the same as GPRs these do ++ nothing. */ ++ ++void ++supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregs) ++{ ++} ++ ++void ++fill_fpregset (const struct regcache *regcache, ++ gdb_fpregset_t *fpregs, int regno) ++{ ++} ++ ++ ++static void ++fetch_register (struct regcache *regcache, int tid, int regno) ++{ ++ struct gdbarch *gdbarch = regcache->arch (); ++ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); ++ /* This isn't really an address. But ptrace thinks of it as one. */ ++ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); ++ int bytes_transferred; ++ char buf[MICROBLAZE_MAX_REGISTER_SIZE]; ++ ++ if (regaddr == -1) ++ { ++ memset (buf, '\0', register_size (gdbarch, regno)); /* Supply zeroes */ ++ regcache->raw_supply (regno, buf); ++ return; ++ } ++ ++ /* Read the raw register using sizeof(long) sized chunks. On a ++ * 32-bit platform, 64-bit floating-point registers will require two ++ * transfers. */ ++ for (bytes_transferred = 0; ++ bytes_transferred < register_size (gdbarch, regno); ++ bytes_transferred += sizeof (long)) ++ { ++ long l; ++ ++ errno = 0; ++ l = ptrace (PTRACE_PEEKUSER, tid, (PTRACE_TYPE_ARG3) regaddr, 0); ++ if (errno == EIO) ++ { ++ printf("ptrace io error\n"); ++ } ++ regaddr += sizeof (long); ++ if (errno != 0) ++ { ++ char message[128]; ++ sprintf (message, "reading register %s (#%d)", ++ gdbarch_register_name (gdbarch, regno), regno); ++ perror_with_name (message); ++ } ++ memcpy (&buf[bytes_transferred], &l, sizeof (l)); ++ } ++ ++ /* Now supply the register. Keep in mind that the regcache's idea ++ * of the register's size may not be a multiple of sizeof ++ * (long). */ ++ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) ++ { ++ /* Little-endian values are always found at the left end of the ++ * bytes transferred. */ ++ regcache->raw_supply (regno, buf); ++ } ++ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) ++ { ++ /* Big-endian values are found at the right end of the bytes ++ * transferred. */ ++ size_t padding = (bytes_transferred - register_size (gdbarch, regno)); ++ regcache->raw_supply (regno, buf + padding); ++ } ++ else ++ internal_error (__FILE__, __LINE__, ++ _("fetch_register: unexpected byte order: %d"), ++ gdbarch_byte_order (gdbarch)); ++} ++ ++ ++/* This is a wrapper for the fetch_all_gp_regs function. It is ++ * responsible for verifying if this target has the ptrace request ++ * that can be used to fetch all general-purpose registers at one ++ * shot. If it doesn't, then we should fetch them using the ++ * old-fashioned way, which is to iterate over the registers and ++ * request them one by one. */ ++static void ++fetch_gp_regs (struct regcache *regcache, int tid) ++{ ++ int i; ++/* If we've hit this point, it doesn't really matter which ++ architecture we are using. We just need to read the ++ registers in the "old-fashioned way". */ ++ for (i = MICROBLAZE_R0_REGNUM; i <= MICROBLAZE_FSR_REGNUM; i++) ++ fetch_register (regcache, tid, i); ++} ++ ++/* Return a target description for the current target. */ ++ ++const struct target_desc * ++microblaze_linux_nat_target::read_description () ++{ ++ return tdesc_microblaze_linux; ++} ++ ++/* Fetch REGNUM (or all registers if REGNUM == -1) from the target ++ into REGCACHE using PTRACE_GETREGSET. */ ++ ++void ++microblaze_linux_nat_target::fetch_registers (struct regcache * regcache, ++ int regno) ++{ ++ /* Get the thread id for the ptrace call. */ ++ int tid = regcache->ptid ().lwp (); ++//int tid = get_ptrace_pid (regcache->ptid()); ++#if 1 ++ if (regno == -1) ++#endif ++ fetch_gp_regs (regcache, tid); ++#if 1 ++ else ++ fetch_register (regcache, tid, regno); ++#endif ++} ++ ++ ++/* Store REGNUM (or all registers if REGNUM == -1) to the target ++ from REGCACHE using PTRACE_SETREGSET. */ ++ ++void ++microblaze_linux_nat_target::store_registers (struct regcache *regcache, int regno) ++{ ++ int tid; ++ ++ tid = get_ptrace_pid (regcache->ptid ()); ++ ++ struct gdbarch *gdbarch = regcache->arch (); ++ /* This isn't really an address. But ptrace thinks of it as one. */ ++ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); ++ int i; ++ size_t bytes_to_transfer; ++ char buf[MICROBLAZE_MAX_REGISTER_SIZE]; ++ ++ if (regaddr == -1) ++ return; ++ ++ /* First collect the register. Keep in mind that the regcache's ++ * idea of the register's size may not be a multiple of sizeof ++ * (long). */ ++ memset (buf, 0, sizeof buf); ++ bytes_to_transfer = align_up (register_size (gdbarch, regno), sizeof (long)); ++ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) ++ { ++ /* Little-endian values always sit at the left end of the buffer. */ ++ regcache->raw_collect (regno, buf); ++ } ++ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) ++ { ++ /* Big-endian values sit at the right end of the buffer. */ ++ size_t padding = (bytes_to_transfer - register_size (gdbarch, regno)); ++ regcache->raw_collect (regno, buf + padding); ++ } ++ ++ for (i = 0; i < bytes_to_transfer; i += sizeof (long)) ++ { ++ long l; ++ ++ memcpy (&l, &buf[i], sizeof (l)); ++ errno = 0; ++ ptrace (PTRACE_POKEUSER, tid, (PTRACE_TYPE_ARG3) regaddr, l); ++ regaddr += sizeof (long); ++ ++ if (errno != 0) ++ { ++ char message[128]; ++ sprintf (message, "writing register %s (#%d)", ++ gdbarch_register_name (gdbarch, regno), regno); ++ perror_with_name (message); ++ } ++ } ++} ++ ++void _initialize_microblaze_linux_nat (void); ++ ++void ++_initialize_microblaze_linux_nat (void) ++{ ++ /* Register the target. */ ++ linux_target = &the_microblaze_linux_nat_target; ++ add_inf_child_target (linux_target); ++} +diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c +index 17bcb50fd4f..5b57bb4d3ba 100644 +--- a/gdb/microblaze-linux-tdep.c ++++ b/gdb/microblaze-linux-tdep.c +@@ -37,6 +37,7 @@ + #include "tramp-frame.h" + #include "linux-tdep.h" + #include "glibc-tdep.h" ++#include "features/microblaze-linux.c" + + static int microblaze_debug_flag = 0; + +@@ -179,4 +180,5 @@ _initialize_microblaze_linux_tdep () + { + gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, + microblaze_linux_init_abi); ++ initialize_tdesc_microblaze_linux (); + } +diff --git a/gdb/microblaze-linux-tdep.h b/gdb/microblaze-linux-tdep.h +new file mode 100644 +index 00000000000..a2c744e2961 +--- /dev/null ++++ b/gdb/microblaze-linux-tdep.h +@@ -0,0 +1,24 @@ ++/* Target-dependent code for GNU/Linux on OpenRISC. ++ ++ Copyright (C) 2021 Free Software Foundation, Inc. ++ ++ This file is part of GDB. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program. If not, see . */ ++#ifndef MICROBLAZE_LINUX_TDEP_H ++#define MICROBLAZE_LINUX_TDEP_H ++ /* Target descriptions. */ ++ extern struct target_desc *tdesc_microblaze_linux; ++ ++#endif /* MICROBLAZE_LINUX_TDEP_H */ +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 6ab36bd746b..066602b385a 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -285,6 +285,7 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, + cache->frameless_p = 0; /* Frame found. */ + save_hidden_pointer_found = 0; + non_stack_instruction_found = 0; ++ cache->register_offsets[rd] = -imm; + continue; + } + else if (IS_SPILL_SP(op, rd, ra)) +@@ -431,15 +432,17 @@ microblaze_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc) + if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end)) + { + sal = find_pc_line (func_start, 0); +- +- if (sal.end < func_end +- && start_pc <= sal.end) ++ ++ if (sal.line !=0 && sal.end <= func_end && start_pc <= sal.end) { + start_pc = sal.end; ++ microblaze_debug("start_pc is %d\t sal.end is %d\t func_end is %d\t",start_pc,sal.end,func_end); ++ } + } + + ostart_pc = microblaze_analyze_prologue (gdbarch, func_start, 0xffffffffUL, + &cache); + ++ + if (ostart_pc > start_pc) + return ostart_pc; + return start_pc; +@@ -453,6 +456,7 @@ microblaze_frame_cache (frame_info_ptr next_frame, void **this_cache) + struct microblaze_frame_cache *cache; + struct gdbarch *gdbarch = get_frame_arch (next_frame); + int rn; ++ CORE_ADDR current_pc; + + if (*this_cache) + return (struct microblaze_frame_cache *) *this_cache; +@@ -466,10 +470,17 @@ microblaze_frame_cache (frame_info_ptr next_frame, void **this_cache) + cache->register_offsets[rn] = -1; + + /* Call for side effects. */ +- get_frame_func (next_frame); +- +- cache->pc = get_frame_address_in_block (next_frame); +- ++ cache->pc = get_frame_func (next_frame); ++ ++// cache->pc = get_frame_address_in_block (next_frame); ++ current_pc = get_frame_pc (next_frame); ++ if (cache->pc) ++ microblaze_analyze_prologue (gdbarch, cache->pc, current_pc, cache); ++ ++ cache->saved_sp = cache->base + cache->framesize; ++ cache->register_offsets[MICROBLAZE_PREV_PC_REGNUM] = cache->base; ++ cache->register_offsets[MICROBLAZE_SP_REGNUM] = cache->saved_sp; ++ + return cache; + } + +@@ -494,6 +505,25 @@ microblaze_frame_prev_register (frame_info_ptr this_frame, + struct microblaze_frame_cache *cache = + microblaze_frame_cache (this_frame, this_cache); + ++if ((regnum == MICROBLAZE_SP_REGNUM && ++ cache->register_offsets[MICROBLAZE_SP_REGNUM]) ++ || (regnum == MICROBLAZE_FP_REGNUM && ++ cache->register_offsets[MICROBLAZE_SP_REGNUM])) ++ ++ return frame_unwind_got_constant (this_frame, regnum, ++ cache->register_offsets[MICROBLAZE_SP_REGNUM]); ++ ++if (regnum == MICROBLAZE_PC_REGNUM) ++{ ++ regnum = 15; ++ return frame_unwind_got_memory (this_frame, regnum, ++ cache->register_offsets[MICROBLAZE_PREV_PC_REGNUM]); ++ ++} ++if (regnum == MICROBLAZE_SP_REGNUM) ++ regnum = 1; ++#if 0 ++ + if (cache->frameless_p) + { + if (regnum == MICROBLAZE_PC_REGNUM) +@@ -506,7 +536,9 @@ microblaze_frame_prev_register (frame_info_ptr this_frame, + else + return trad_frame_get_prev_register (this_frame, cache->saved_regs, + regnum); +- ++#endif ++ return trad_frame_get_prev_register (this_frame, cache->saved_regs, ++ regnum); + } + + static const struct frame_unwind microblaze_frame_unwind = +@@ -621,7 +653,106 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type) + return (type->length () == 16); + } + +- ++#if 1 ++static std::vector ++microblaze_software_single_step (struct regcache *regcache) ++{ ++ struct gdbarch *arch = regcache->arch (); ++ //struct gdbarch_tdep *tdep = gdbarch_tdep (arch); ++ static int le_breakp[] = MICROBLAZE_BREAKPOINT_LE; ++ static int be_breakp[] = MICROBLAZE_BREAKPOINT; ++ enum bfd_endian byte_order = gdbarch_byte_order (arch); ++ int *breakp = byte_order == BFD_ENDIAN_BIG ? be_breakp : le_breakp; ++// std::vector ret = NULL; ++ ++ /* Save the address and the values of the next_pc and the target */ ++ static struct sstep_breaks ++ { ++ CORE_ADDR address; ++ bfd_boolean valid; ++ /* Shadow contents. */ ++ char data[INST_WORD_SIZE]; ++ } stepbreaks[2]; ++ int ii; ++ ++ CORE_ADDR pc; ++ std::vector next_pcs; ++ long insn; ++ enum microblaze_instr minstr; ++ bfd_boolean isunsignednum; ++ enum microblaze_instr_type insn_type; ++ short delay_slots; ++ int imm; ++ bfd_boolean immfound = FALSE; ++ ++ /* Set a breakpoint at the next instruction */ ++ /* If the current instruction is an imm, set it at the inst after */ ++ /* If the instruction has a delay slot, skip the delay slot */ ++ pc = regcache_read_pc (regcache); ++ insn = microblaze_fetch_instruction (pc); ++ minstr = get_insn_microblaze (insn, &isunsignednum, &insn_type, &delay_slots); ++ if (insn_type == immediate_inst) ++ { ++ int rd, ra, rb; ++ immfound = TRUE; ++ minstr = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm); ++ pc = pc + INST_WORD_SIZE; ++ insn = microblaze_fetch_instruction (pc); ++ minstr = get_insn_microblaze (insn, &isunsignednum, &insn_type, &delay_slots); ++ } ++ stepbreaks[0].address = pc + (delay_slots * INST_WORD_SIZE) + INST_WORD_SIZE; ++ if (insn_type != return_inst) { ++ stepbreaks[0].valid = TRUE; ++ } else { ++ stepbreaks[0].valid = FALSE; ++ } ++ ++ microblaze_debug ("single-step insn_type=%x insn=%x\n", insn_type, insn); ++ /* Now check for branch or return instructions */ ++ if (insn_type == branch_inst || insn_type == return_inst) { ++ int limm; ++ int lrd, lra, lrb; ++ int ra, rb; ++ bfd_boolean targetvalid; ++ bfd_boolean unconditionalbranch; ++ microblaze_decode_insn(insn, &lrd, &lra, &lrb, &limm); ++ if (lra >= 0 && lra < MICROBLAZE_NUM_REGS) ++ ra = regcache_raw_get_unsigned(regcache, lra); ++ else ++ ra = 0; ++ if (lrb >= 0 && lrb < MICROBLAZE_NUM_REGS) ++ rb = regcache_raw_get_unsigned(regcache, lrb); ++ else ++ rb = 0; ++ stepbreaks[1].address = microblaze_get_target_address (insn, immfound, imm, pc, ra, rb, &targetvalid, &unconditionalbranch); ++ microblaze_debug ("single-step uncondbr=%d targetvalid=%d target=%x\n", unconditionalbranch, targetvalid, stepbreaks[1].address); ++ if (unconditionalbranch) ++ stepbreaks[0].valid = FALSE; /* This is a unconditional branch: will not come to the next address */ ++ if (targetvalid && (stepbreaks[0].valid == FALSE || ++ (stepbreaks[0].address != stepbreaks[1].address)) ++ && (stepbreaks[1].address != pc)) { ++ stepbreaks[1].valid = TRUE; ++ } else { ++ stepbreaks[1].valid = FALSE; ++ } ++ } else { ++ stepbreaks[1].valid = FALSE; ++ } ++ ++ /* Insert the breakpoints */ ++ for (ii = 0; ii < 2; ++ii) ++ { ++ ++ /* ignore invalid breakpoint. */ ++ if (stepbreaks[ii].valid) { ++ // VEC_safe_push (CORE_ADDR, next_pcs, stepbreaks[ii].address);; ++ next_pcs.push_back (stepbreaks[ii].address); ++ } ++ } ++ return next_pcs; ++} ++#endif ++ + static int dwarf2_to_reg_map[78] = + { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */ + 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */ +@@ -788,6 +919,8 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + microblaze_breakpoint::bp_from_kind); + set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); + ++ set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); ++ + set_gdbarch_frame_args_skip (gdbarch, 8); + + set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc); +diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h +index 738da4f0531..21f206777f0 100644 +--- a/gdb/microblaze-tdep.h ++++ b/gdb/microblaze-tdep.h +@@ -60,11 +60,11 @@ enum microblaze_regnum + MICROBLAZE_R12_REGNUM, + MICROBLAZE_R13_REGNUM, + MICROBLAZE_R14_REGNUM, +- MICROBLAZE_R15_REGNUM, ++ MICROBLAZE_R15_REGNUM,MICROBLAZE_PREV_PC_REGNUM = MICROBLAZE_R15_REGNUM, + MICROBLAZE_R16_REGNUM, + MICROBLAZE_R17_REGNUM, + MICROBLAZE_R18_REGNUM, +- MICROBLAZE_R19_REGNUM, ++ MICROBLAZE_R19_REGNUM,MICROBLAZE_FP_REGNUM = MICROBLAZE_R19_REGNUM, + MICROBLAZE_R20_REGNUM, + MICROBLAZE_R21_REGNUM, + MICROBLAZE_R22_REGNUM, +@@ -77,7 +77,8 @@ enum microblaze_regnum + MICROBLAZE_R29_REGNUM, + MICROBLAZE_R30_REGNUM, + MICROBLAZE_R31_REGNUM, +- MICROBLAZE_PC_REGNUM, ++ MICROBLAZE_MAX_GPR_REGS, ++ MICROBLAZE_PC_REGNUM=32, + MICROBLAZE_MSR_REGNUM, + MICROBLAZE_EAR_REGNUM, + MICROBLAZE_ESR_REGNUM, +@@ -102,17 +103,21 @@ enum microblaze_regnum + MICROBLAZE_RTLBSX_REGNUM, + MICROBLAZE_RTLBLO_REGNUM, + MICROBLAZE_RTLBHI_REGNUM, +- MICROBLAZE_SLR_REGNUM, MICROBLAZE_NUM_CORE_REGS = MICROBLAZE_SLR_REGNUM, ++ MICROBLAZE_SLR_REGNUM, + MICROBLAZE_SHR_REGNUM, +- MICROBLAZE_NUM_REGS ++ MICROBLAZE_NUM_REGS, MICROBLAZE_NUM_CORE_REGS = MICROBLAZE_NUM_REGS + }; + ++/* Big enough to hold the size of the largest register in bytes. */ ++#define MICROBLAZE_MAX_REGISTER_SIZE 64 ++ + struct microblaze_frame_cache + { + /* Base address. */ + CORE_ADDR base; + CORE_ADDR pc; + ++ CORE_ADDR saved_sp; + /* Do we have a frame? */ + int frameless_p; + +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0005-use-asm-sgidefs.h.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0005-use-asm-sgidefs.h.patch deleted file mode 100644 index 242099b9b..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0005-use-asm-sgidefs.h.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 25a75aaf29791f4302f0e4452f7ebaf735d4f083 Mon Sep 17 00:00:00 2001 -From: Andre McCurdy -Date: Sat, 30 Apr 2016 15:29:06 -0700 -Subject: [PATCH 5/9] use - -Build fix for MIPS with musl libc - -The MIPS specific header is provided by glibc and uclibc -but not by musl. Regardless of the libc, the kernel headers provide - which provides the same definitions, so use that -instead. - -Upstream-Status: Pending - -Signed-off-by: Andre McCurdy -Signed-off-by: Khem Raj ---- - gdb/mips-linux-nat.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gdb/mips-linux-nat.c b/gdb/mips-linux-nat.c -index 6adc61235aa..afb40066744 100644 ---- a/gdb/mips-linux-nat.c -+++ b/gdb/mips-linux-nat.c -@@ -31,7 +31,7 @@ - #include "gdb_proc_service.h" - #include "gregset.h" - --#include -+#include - #include "nat/gdb_ptrace.h" - #include - #include "inf-ptrace.h" --- -2.36.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0006-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0006-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch new file mode 100644 index 000000000..3a069fdfe --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0006-Adding-64-bit-MB-support-Added-new-architecture-to-M.patch @@ -0,0 +1,1891 @@ +From 510b596b8cd25ccb3563555190d5396c7b378522 Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Thu, 31 Jan 2019 14:36:00 +0530 +Subject: [PATCH 06/54] Adding 64 bit MB support Added new architecture to + Microblaze 64-bit support to GDB Signed-off-by :Nagaraju Mekala + Signed-off-by :Mahesh Bodapati + +Conflicts: + gdb/Makefile.in + +Conflicts: + bfd/cpu-microblaze.c + gdb/microblaze-tdep.c + ld/Makefile.am + ld/Makefile.in + opcodes/microblaze-dis.c + +Conflicts: + bfd/configure + gas/config/tc-microblaze.c + ld/Makefile.in + opcodes/microblaze-opcm.h + +Conflicts: + gdb/microblaze-tdep.c + +Conflicts: + bfd/elf32-microblaze.c + gas/config/tc-microblaze.c + gdb/features/Makefile + gdb/features/microblaze-with-stack-protect.c + gdb/microblaze-tdep.c + gdb/regformats/microblaze-with-stack-protect.dat + gdbserver/linux-microblaze-low.c + include/elf/common.h + +Signed-off-by: Aayush Misra +--- + bfd/Makefile.am | 2 + + bfd/Makefile.in | 3 + + bfd/archures.c | 2 + + bfd/bfd-in2.h | 31 +++- + bfd/config.bfd | 4 + + bfd/configure | 2 + + bfd/cpu-microblaze.c | 55 +++++- + bfd/elf32-microblaze.c | 155 ++++++++++++++-- + bfd/libbfd.h | 3 + + bfd/reloc.c | 20 +++ + bfd/targets.c | 6 + + gdb/features/Makefile | 2 + + gdb/features/microblaze-core.xml | 6 +- + gdb/features/microblaze-stack-protect.xml | 4 +- + gdb/features/microblaze-with-stack-protect.c | 8 +- + gdb/features/microblaze.c | 6 +- + gdb/features/microblaze64-core.xml | 69 ++++++++ + gdb/features/microblaze64-stack-protect.xml | 12 ++ + .../microblaze64-with-stack-protect.c | 79 +++++++++ + .../microblaze64-with-stack-protect.xml | 12 ++ + gdb/features/microblaze64.c | 77 ++++++++ + gdb/features/microblaze64.xml | 11 ++ + gdb/microblaze-linux-tdep.c | 36 +++- + gdb/microblaze-tdep.c | 125 +++++++++---- + gdb/microblaze-tdep.h | 4 +- + include/elf/common.h | 1 + + include/elf/microblaze.h | 4 + + opcodes/microblaze-dis.c | 51 +++++- + opcodes/microblaze-opc.h | 165 +++++++++++++++++- + opcodes/microblaze-opcm.h | 28 ++- + 30 files changed, 896 insertions(+), 87 deletions(-) + create mode 100644 gdb/features/microblaze64-core.xml + create mode 100644 gdb/features/microblaze64-stack-protect.xml + create mode 100644 gdb/features/microblaze64-with-stack-protect.c + create mode 100644 gdb/features/microblaze64-with-stack-protect.xml + create mode 100644 gdb/features/microblaze64.c + create mode 100644 gdb/features/microblaze64.xml + +diff --git a/bfd/Makefile.am b/bfd/Makefile.am +index 378c13198d6..089d86b6191 100644 +--- a/bfd/Makefile.am ++++ b/bfd/Makefile.am +@@ -568,6 +568,7 @@ BFD64_BACKENDS = \ + elf64-ppc.lo \ + elf64-riscv.lo \ + elf64-s390.lo \ ++ elf64-microblaze.lo \ + elf64-sparc.lo \ + elf64-tilegx.lo \ + elf64-x86-64.lo \ +@@ -615,6 +616,7 @@ BFD64_BACKENDS_CFILES = \ + elf64-nfp.c \ + elf64-ppc.c \ + elf64-s390.c \ ++ elf64-microblaze.c \ + elf64-sparc.c \ + elf64-tilegx.c \ + elf64-x86-64.c \ +diff --git a/bfd/Makefile.in b/bfd/Makefile.in +index 8d09f6fa4af..d9fe20f502b 100644 +--- a/bfd/Makefile.in ++++ b/bfd/Makefile.in +@@ -1025,6 +1025,7 @@ BFD64_BACKENDS = \ + elf64-ppc.lo \ + elf64-riscv.lo \ + elf64-s390.lo \ ++ elf64-microblaze.lo \ + elf64-sparc.lo \ + elf64-tilegx.lo \ + elf64-x86-64.lo \ +@@ -1072,6 +1073,7 @@ BFD64_BACKENDS_CFILES = \ + elf64-nfp.c \ + elf64-ppc.c \ + elf64-s390.c \ ++ elf64-microblaze.c \ + elf64-sparc.c \ + elf64-tilegx.c \ + elf64-x86-64.c \ +@@ -1646,6 +1648,7 @@ distclean-compile: + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-microblaze.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-sparc.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-tilegx.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-x86-64.Plo@am__quote@ +diff --git a/bfd/archures.c b/bfd/archures.c +index b59979e60ac..2994a09bc37 100644 +--- a/bfd/archures.c ++++ b/bfd/archures.c +@@ -515,6 +515,8 @@ DESCRIPTION + . bfd_arch_lm32, {* Lattice Mico32. *} + .#define bfd_mach_lm32 1 + . bfd_arch_microblaze,{* Xilinx MicroBlaze. *} ++.#define bfd_mach_microblaze 1 ++.#define bfd_mach_microblaze64 2 + . bfd_arch_kvx, {* Kalray VLIW core of the MPPA processor family *} + .#define bfd_mach_kv3_unknown 0 + .#define bfd_mach_kv3_1 1 +diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h +index eddb9902f5e..9db63f254a3 100644 +--- a/bfd/bfd-in2.h ++++ b/bfd/bfd-in2.h +@@ -1771,6 +1771,8 @@ enum bfd_architecture + bfd_arch_lm32, /* Lattice Mico32. */ + #define bfd_mach_lm32 1 + bfd_arch_microblaze,/* Xilinx MicroBlaze. */ ++#define bfd_mach_microblaze 1 ++#define bfd_mach_microblaze64 2 + bfd_arch_kvx, /* Kalray VLIW core of the MPPA processor family */ + #define bfd_mach_kv3_unknown 0 + #define bfd_mach_kv3_1 1 +@@ -6461,16 +6463,41 @@ value relative to the read-write small data area anchor */ + expressions of the form "Symbol Op Symbol" */ + BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM, + +-/* This is a 64 bit reloc that stores the 32 bit pc relative ++/* This is a 32 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). No relocation is + done here - only used for relaxing */ +- BFD_RELOC_MICROBLAZE_64_NONE, ++ BFD_RELOC_MICROBLAZE_32_NONE, ++ ++/* This is a 64 bit reloc that stores the 32 bit pc relative ++ * +value in two words (with an imml instruction). No relocation is ++ * +done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64_PCREL, ++ ++/* This is a 64 bit reloc that stores the 32 bit relative ++ * +value in two words (with an imml instruction). No relocation is ++ * +done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64, ++ ++/* This is a 64 bit reloc that stores the 32 bit relative ++ * +value in two words (with an imml instruction). No relocation is ++ * +done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_EA64, ++ ++/* This is a 64 bit reloc that stores the 32 bit pc relative ++ * +value in two words (with an imm instruction). No relocation is ++ * +done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64_NONE, + + /* This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). The relocation is + PC-relative GOT offset */ + BFD_RELOC_MICROBLAZE_64_GOTPC, + ++/* This is a 64 bit reloc that stores the 32 bit pc relative ++value in two words (with an imml instruction). The relocation is ++PC-relative GOT offset */ ++ BFD_RELOC_MICROBLAZE_64_GPC, ++ + /* This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). The relocation is + GOT offset */ +diff --git a/bfd/config.bfd b/bfd/config.bfd +index 08129e6a8cb..3a7d427778c 100644 +--- a/bfd/config.bfd ++++ b/bfd/config.bfd +@@ -884,11 +884,15 @@ case "${targ}" in + microblazeel*-*) + targ_defvec=microblaze_elf32_le_vec + targ_selvecs=microblaze_elf32_vec ++ targ64_selvecs=microblaze_elf64_vec ++ targ64_selvecs=microblaze_elf64_le_vec + ;; + + microblaze*-*) + targ_defvec=microblaze_elf32_vec + targ_selvecs=microblaze_elf32_le_vec ++ targ64_selvecs=microblaze_elf64_vec ++ targ64_selvecs=microblaze_elf64_le_vec + ;; + + #ifdef BFD64 +diff --git a/bfd/configure b/bfd/configure +index f0a07ff675f..b2afdcf9bec 100755 +--- a/bfd/configure ++++ b/bfd/configure +@@ -14062,6 +14062,8 @@ do + rx_elf32_linux_le_vec) tb="$tb elf32-rx.lo elf32.lo $elf" ;; + s390_elf32_vec) tb="$tb elf32-s390.lo elf32.lo $elf" ;; + s390_elf64_vec) tb="$tb elf64-s390.lo elf64.lo $elf"; target_size=64 ;; ++ microblaze_elf64_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; ++ microblaze_elf64_le_vec) tb="$tb elf64-microblaze.lo elf64.lo $elf"; target_size=64 ;; + score_elf32_be_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; + score_elf32_le_vec) tb="$tb elf32-score.lo elf32-score7.lo elf32.lo elf64.lo $elf"; want64=true; target_size=64 ;; + sh_coff_vec) tb="$tb coff-sh.lo $coff" ;; +diff --git a/bfd/cpu-microblaze.c b/bfd/cpu-microblaze.c +index c14b170f94b..7557b3de7b3 100644 +--- a/bfd/cpu-microblaze.c ++++ b/bfd/cpu-microblaze.c +@@ -23,13 +23,30 @@ + #include "bfd.h" + #include "libbfd.h" + +-const bfd_arch_info_type bfd_microblaze_arch = ++const bfd_arch_info_type bfd_microblaze_arch[] = ++{ ++#if BFD_DEFAULT_TARGET_SIZE == 64 ++{ ++ 64, /* 32 bits in a word. */ ++ 64, /* 32 bits in an address. */ ++ 8, /* 8 bits in a byte. */ ++ bfd_arch_microblaze, /* Architecture. */ ++ bfd_mach_microblaze64, /* 64 bit Machine */ ++ "microblaze", /* Architecture name. */ ++ "MicroBlaze", /* Printable name. */ ++ 3, /* Section align power. */ ++ false, /* Is this the default architecture ? */ ++ bfd_default_compatible, /* Architecture comparison function. */ ++ bfd_default_scan, /* String to architecture conversion. */ ++ bfd_arch_default_fill, /* Default fill. */ ++ &bfd_microblaze_arch[1] /* Next in list. */ ++}, + { + 32, /* Bits in a word. */ + 32, /* Bits in an address. */ + 8, /* Bits in a byte. */ + bfd_arch_microblaze, /* Architecture number. */ +- 0, /* Machine number - 0 for now. */ ++ bfd_mach_microblaze, /* Machine number - 0 for now. */ + "microblaze", /* Architecture name. */ + "MicroBlaze", /* Printable name. */ + 3, /* Section align power. */ +@@ -39,4 +56,38 @@ const bfd_arch_info_type bfd_microblaze_arch = + bfd_arch_default_fill, /* Default fill. */ + NULL, /* Next in list. */ + 0 /* Maximum offset of a reloc from the start of an insn. */ ++} ++#else ++{ ++ 32, /* 32 bits in a word. */ ++ 32, /* 32 bits in an address. */ ++ 8, /* 8 bits in a byte. */ ++ bfd_arch_microblaze, /* Architecture. */ ++ bfd_mach_microblaze, /* 32 bit Machine */ ++ "microblaze", /* Architecture name. */ ++ "MicroBlaze", /* Printable name. */ ++ 3, /* Section align power. */ ++ true, /* Is this the default architecture ? */ ++ bfd_default_compatible, /* Architecture comparison function. */ ++ bfd_default_scan, /* String to architecture conversion. */ ++ bfd_arch_default_fill, /* Default fill. */ ++ &bfd_microblaze_arch[1] /* Next in list. */ ++}, ++{ ++ 64, /* 32 bits in a word. */ ++ 64, /* 32 bits in an address. */ ++ 8, /* 8 bits in a byte. */ ++ bfd_arch_microblaze, /* Architecture. */ ++ bfd_mach_microblaze64, /* 64 bit Machine */ ++ "microblaze", /* Architecture name. */ ++ "MicroBlaze", /* Printable name. */ ++ 3, /* Section align power. */ ++ false, /* Is this the default architecture ? */ ++ bfd_default_compatible, /* Architecture comparison function. */ ++ bfd_default_scan, /* String to architecture conversion. */ ++ bfd_arch_default_fill, /* Default fill. */ ++ NULL, /* Next in list. */ ++ 0 ++} ++#endif + }; +diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c +index 487ddeafc5a..6ba28e757be 100644 +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -114,6 +114,20 @@ static reloc_howto_type microblaze_elf_howto_raw[] = + 0x0000ffff, /* Dest Mask. */ + true), /* PC relative offset? */ + ++ HOWTO (R_MICROBLAZE_IMML_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 2, /* Size (0 = byte, 1 = short, 2 = long). */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_IMML_64", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ + /* A 64 bit relocation. Table entry not really used. */ + HOWTO (R_MICROBLAZE_64, /* Type. */ + 0, /* Rightshift. */ +@@ -174,7 +188,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = + 0x0000ffff, /* Dest Mask. */ + false), /* PC relative offset? */ + +- /* This reloc does nothing. Used for relaxation. */ ++ HOWTO (R_MICROBLAZE_32_NONE, /* Type. */ ++ 0, /* Rightshift. */ ++ 2, /* Size (0 = byte, 1 = short, 2 = long). */ ++ 32, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_bitfield, /* Complain on overflow. */ ++ NULL, /* Special Function. */ ++ "R_MICROBLAZE_32_NONE",/* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* This reloc does nothing. Used for relaxation. */ + HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ + 0, /* Rightshift. */ + 0, /* Size. */ +@@ -264,6 +292,21 @@ static reloc_howto_type microblaze_elf_howto_raw[] = + 0x0000ffff, /* Dest Mask. */ + true), /* PC relative offset? */ + ++ /* A 64 bit GOTPC relocation. Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 2, /* Size (0 = byte, 1 = short, 2 = long). */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc, /* Special Function. */ ++ "R_MICROBLAZE_GPC_64", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ true), /* PC relative offset? */ ++ + /* A 64 bit GOT relocation. Table-entry not really used. */ + HOWTO (R_MICROBLAZE_GOT_64, /* Type. */ + 0, /* Rightshift. */ +@@ -560,6 +603,9 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, + case BFD_RELOC_NONE: + microblaze_reloc = R_MICROBLAZE_NONE; + break; ++ case BFD_RELOC_MICROBLAZE_32_NONE: ++ microblaze_reloc = R_MICROBLAZE_32_NONE; ++ break; + case BFD_RELOC_MICROBLAZE_64_NONE: + microblaze_reloc = R_MICROBLAZE_64_NONE; + break; +@@ -600,9 +646,15 @@ microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, + case BFD_RELOC_VTABLE_ENTRY: + microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY; + break; ++ case BFD_RELOC_MICROBLAZE_64: ++ microblaze_reloc = R_MICROBLAZE_IMML_64; ++ break; + case BFD_RELOC_MICROBLAZE_64_GOTPC: + microblaze_reloc = R_MICROBLAZE_GOTPC_64; + break; ++ case BFD_RELOC_MICROBLAZE_64_GPC: ++ microblaze_reloc = R_MICROBLAZE_GPC_64; ++ break; + case BFD_RELOC_MICROBLAZE_64_GOT: + microblaze_reloc = R_MICROBLAZE_GOT_64; + break; +@@ -1564,7 +1616,7 @@ microblaze_elf_relocate_section (bfd *output_bfd, + if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) + { + relocation += addend; +- if (r_type == R_MICROBLAZE_32) ++ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) + bfd_put_32 (input_bfd, relocation, contents + offset); + else + { +@@ -1969,8 +2021,7 @@ microblaze_elf_relax_section (bfd *abfd, + else + symval += irel->r_addend; + +- if ((symval & 0xffff8000) == 0 +- || (symval & 0xffff8000) == 0xffff8000) ++ if ((symval & 0xffff8000) == 0) + { + /* We can delete this instruction. */ + sdata->relax[sdata->relax_count].addr = irel->r_offset; +@@ -2034,15 +2085,44 @@ microblaze_elf_relax_section (bfd *abfd, + irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); + } + break; +- case R_MICROBLAZE_NONE: ++ case R_MICROBLAZE_IMML_64: ++ { ++ /* This was a PC-relative instruction that was ++ completely resolved. */ ++ int sfix, efix; ++ unsigned int val; ++ bfd_vma target_address; ++ target_address = irel->r_addend + irel->r_offset; ++ sfix = calc_fixup (irel->r_offset, 0, sec); ++ efix = calc_fixup (target_address, 0, sec); ++ ++ /* Validate the in-band val. */ ++ val = bfd_get_32 (abfd, contents + irel->r_offset); ++ if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { ++ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); ++ } ++ irel->r_addend -= (efix - sfix); ++ /* Should use HOWTO. */ ++ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, ++ irel->r_addend); ++ } ++ break; ++ case R_MICROBLAZE_32_NONE: + { + /* This was a PC-relative instruction that was + completely resolved. */ + size_t sfix, efix; ++ unsigned int val; + bfd_vma target_address; + target_address = irel->r_addend + irel->r_offset; + sfix = calc_fixup (irel->r_offset, 0, sec); + efix = calc_fixup (target_address, 0, sec); ++ ++ /* Validate the in-band val. */ ++ val = bfd_get_32 (abfd, contents + irel->r_offset); ++ if (val != irel->r_addend && ELF32_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { ++ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); ++ } + irel->r_addend -= (efix - sfix); + /* Should use HOWTO. */ + microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, +@@ -2059,8 +2139,8 @@ microblaze_elf_relax_section (bfd *abfd, + sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); + efix = calc_fixup (target_address, 0, sec); + irel->r_addend -= (efix - sfix); +- microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset +- + INST_WORD_SIZE, irel->r_addend); ++ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, ++ irel->r_addend); + } + break; + } +@@ -2090,9 +2170,50 @@ microblaze_elf_relax_section (bfd *abfd, + irelscanend = irelocs + o->reloc_count; + for (irelscan = irelocs; irelscan < irelscanend; irelscan++) + { +- if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32) +- { +- isym = isymbuf + ELF32_R_SYM (irelscan->r_info); ++ if (1 && ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) ++ { ++ unsigned int val; ++ ++ isym = isymbuf + ELF32_R_SYM (irelscan->r_info); ++ ++ /* hax: We only do the following fixup for debug location lists. */ ++ if (strcmp(".debug_loc", o->name)) ++ continue; ++ ++ /* This was a PC-relative instruction that was completely resolved. */ ++ if (ocontents == NULL) ++ { ++ if (elf_section_data (o)->this_hdr.contents != NULL) ++ ocontents = elf_section_data (o)->this_hdr.contents; ++ else ++ { ++ /* We always cache the section contents. ++ Perhaps, if info->keep_memory is FALSE, we ++ should free them, if we are permitted to. */ ++ ++ if (o->rawsize == 0) ++ o->rawsize = o->size; ++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); ++ if (ocontents == NULL) ++ goto error_return; ++ if (!bfd_get_section_contents (abfd, o, ocontents, ++ (file_ptr) 0, ++ o->rawsize)) ++ goto error_return; ++ elf_section_data (o)->this_hdr.contents = ocontents; ++ } ++ } ++ val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); ++ if (val != irelscan->r_addend) { ++ fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); ++ } ++ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); ++ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, ++ irelscan->r_addend); ++ } ++ if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)// || ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64) ++ { ++ isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* Look at the reloc only if the value has been resolved. */ + if (isym->st_shndx == shndx +@@ -2149,7 +2270,7 @@ microblaze_elf_relax_section (bfd *abfd, + elf_section_data (o)->this_hdr.contents = ocontents; + } + } +- irelscan->r_addend -= calc_fixup (irel->r_addend ++ irelscan->r_addend -= calc_fixup (irelscan->r_addend + + isym->st_value, + 0, + sec); +@@ -3490,6 +3611,14 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd, + return true; + } + ++ ++static bool ++elf_microblaze_object_p (bfd *abfd) ++{ ++ /* Set the right machine number for an s390 elf32 file. */ ++ return bfd_default_set_arch_mach (abfd, bfd_arch_microblaze, bfd_mach_microblaze); ++} ++ + /* Hook called by the linker routine which adds symbols from an object + file. We use it to put .comm items in .sbss, and not .bss. */ + +@@ -3560,8 +3689,6 @@ microblaze_elf_add_symbol_hook (bfd *abfd, + #define elf_backend_finish_dynamic_symbol microblaze_elf_finish_dynamic_symbol + #define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections + #define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook +- +-#define elf_backend_grok_prstatus microblaze_elf_grok_prstatus +-#define elf_backend_grok_psinfo microblaze_elf_grok_psinfo ++#define elf_backend_object_p elf_microblaze_object_p + + #include "elf32-target.h" +diff --git a/bfd/libbfd.h b/bfd/libbfd.h +index d5f42f22c08..b0e898bf815 100644 +--- a/bfd/libbfd.h ++++ b/bfd/libbfd.h +@@ -3010,6 +3010,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", + "BFD_RELOC_MICROBLAZE_32_ROSDA", + "BFD_RELOC_MICROBLAZE_32_RWSDA", + "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", ++ "BFD_RELOC_MICROBLAZE_32_NONE", + "BFD_RELOC_MICROBLAZE_64_NONE", + "BFD_RELOC_MICROBLAZE_64_GOTPC", + "BFD_RELOC_MICROBLAZE_64_GOT", +@@ -3017,6 +3018,8 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", + "BFD_RELOC_MICROBLAZE_64_GOTOFF", + "BFD_RELOC_MICROBLAZE_32_GOTOFF", + "BFD_RELOC_MICROBLAZE_COPY", ++ "BFD_RELOC_MICROBLAZE_64", ++ "BFD_RELOC_MICROBLAZE_64_PCREL", + "BFD_RELOC_MICROBLAZE_64_TLS", + "BFD_RELOC_MICROBLAZE_64_TLSGD", + "BFD_RELOC_MICROBLAZE_64_TLSLD", +diff --git a/bfd/reloc.c b/bfd/reloc.c +index 2ac883d0eac..278876e765e 100644 +--- a/bfd/reloc.c ++++ b/bfd/reloc.c +@@ -6694,6 +6694,12 @@ ENUM + ENUMDOC + This is a 32 bit reloc for the microblaze to handle + expressions of the form "Symbol Op Symbol" ++ENUM ++ BFD_RELOC_MICROBLAZE_32_NONE ++ENUMDOC ++ This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imm instruction). No relocation is ++ done here - only used for relaxing + ENUM + BFD_RELOC_MICROBLAZE_64_NONE + ENUMDOC +@@ -7933,6 +7939,20 @@ ENUMX + ENUMDOC + Tilera TILE-Gx Relocations. + ++ This is a 64 bit reloc that stores 64-bit thread pointer relative offset ++ to two words (uses imml instruction). ++ENUM ++BFD_RELOC_MICROBLAZE_64, ++ENUMDOC ++ This is a 64 bit reloc that stores the 64 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++BFD_RELOC_MICROBLAZE_64_PCREL, ++ENUMDOC ++ This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing + ENUM + BFD_RELOC_BPF_64 + ENUMX +diff --git a/bfd/targets.c b/bfd/targets.c +index 63b3abbd287..c48c0929157 100644 +--- a/bfd/targets.c ++++ b/bfd/targets.c +@@ -799,6 +799,8 @@ extern const bfd_target mep_elf32_le_vec; + extern const bfd_target metag_elf32_vec; + extern const bfd_target microblaze_elf32_vec; + extern const bfd_target microblaze_elf32_le_vec; ++extern const bfd_target microblaze_elf64_vec; ++extern const bfd_target microblaze_elf64_le_vec; + extern const bfd_target mips_ecoff_be_vec; + extern const bfd_target mips_ecoff_le_vec; + extern const bfd_target mips_ecoff_bele_vec; +@@ -1166,6 +1168,10 @@ static const bfd_target * const _bfd_target_vector[] = + + &metag_elf32_vec, + ++#ifdef BFD64 ++ µblaze_elf64_vec, ++ µblaze_elf64_le_vec, ++#endif + µblaze_elf32_vec, + + &mips_ecoff_be_vec, +diff --git a/gdb/features/Makefile b/gdb/features/Makefile +index 0af9d67c2f7..ee053b7557c 100644 +--- a/gdb/features/Makefile ++++ b/gdb/features/Makefile +@@ -102,7 +102,9 @@ OUTPUTS = $(patsubst %,$(outdir)/%.dat,$(WHICH)) + # to make on the command line. + XMLTOC = \ + microblaze-with-stack-protect.xml \ ++ microblaze64-with-stack-protect.xml \ + microblaze.xml \ ++ microblaze64.xml \ + mips-dsp-linux.xml \ + mips-linux.xml \ + mips64-dsp-linux.xml \ +diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml +index d49aa075bae..ac052365773 100644 +--- a/gdb/features/microblaze-core.xml ++++ b/gdb/features/microblaze-core.xml +@@ -8,7 +8,7 @@ + + + +- ++ + + + +@@ -39,7 +39,7 @@ + + + +- ++ + + + +@@ -64,4 +64,6 @@ + + + ++ ++ + +diff --git a/gdb/features/microblaze-stack-protect.xml b/gdb/features/microblaze-stack-protect.xml +index a5ffe2e50b1..b15369e03a4 100644 +--- a/gdb/features/microblaze-stack-protect.xml ++++ b/gdb/features/microblaze-stack-protect.xml +@@ -7,6 +7,6 @@ + + + +- +- ++ ++ + +diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c +index 574dc02db67..8ab9565a047 100644 +--- a/gdb/features/microblaze-with-stack-protect.c ++++ b/gdb/features/microblaze-with-stack-protect.c +@@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) + + feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "data_ptr"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); +@@ -45,7 +45,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "code_ptr"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); +@@ -72,8 +72,8 @@ initialize_tdesc_microblaze_with_stack_protect (void) + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); + + feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.stack-protect"); +- tdesc_create_reg (feature, "rslr", 57, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "rshr", 58, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int"); + + tdesc_microblaze_with_stack_protect = result.release (); + } +diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c +index 8f1fb0a142f..ed12e5bcfd2 100644 +--- a/gdb/features/microblaze.c ++++ b/gdb/features/microblaze.c +@@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void) + + feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "data_ptr"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); +@@ -45,7 +45,7 @@ initialize_tdesc_microblaze (void) + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "code_ptr"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); +@@ -70,6 +70,8 @@ initialize_tdesc_microblaze (void) + tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); + + tdesc_microblaze = result.release (); + } +diff --git a/gdb/features/microblaze64-core.xml b/gdb/features/microblaze64-core.xml +new file mode 100644 +index 00000000000..96e99e2fb24 +--- /dev/null ++++ b/gdb/features/microblaze64-core.xml +@@ -0,0 +1,69 @@ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/gdb/features/microblaze64-stack-protect.xml b/gdb/features/microblaze64-stack-protect.xml +new file mode 100644 +index 00000000000..1bbf5fc3cea +--- /dev/null ++++ b/gdb/features/microblaze64-stack-protect.xml +@@ -0,0 +1,12 @@ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/gdb/features/microblaze64-with-stack-protect.c b/gdb/features/microblaze64-with-stack-protect.c +new file mode 100644 +index 00000000000..a4de4666c76 +--- /dev/null ++++ b/gdb/features/microblaze64-with-stack-protect.c +@@ -0,0 +1,79 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: ++ Original: microblaze-with-stack-protect.xml */ ++ ++#include "defs.h" ++#include "osabi.h" ++#include "target-descriptions.h" ++ ++struct target_desc *tdesc_microblaze64_with_stack_protect; ++static void ++initialize_tdesc_microblaze64_with_stack_protect (void) ++{ ++ target_desc_up result = allocate_target_description (); ++ struct tdesc_feature *feature; ++ ++ feature = tdesc_create_feature (result.get() , "org.gnu.gdb.microblaze64.core"); ++ tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rear", 34, 1, NULL, 64, "int"); ++ tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rfsr", 36, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rbtr", 37, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpvr0", 38, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr1", 39, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr2", 40, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr3", 41, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr4", 42, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr5", 43, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr6", 44, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr7", 45, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr8", 46, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpvr9", 47, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpvr10", 48, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr11", 49, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "redr", 50, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpid", 51, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rzpr", 52, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbx", 53, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); ++ ++ feature = tdesc_create_feature (result.get(), "org.gnu.gdb.microblaze64.stack-protect"); ++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); ++ ++ tdesc_microblaze64_with_stack_protect = result.release(); ++} +diff --git a/gdb/features/microblaze64-with-stack-protect.xml b/gdb/features/microblaze64-with-stack-protect.xml +new file mode 100644 +index 00000000000..0e9f01611f3 +--- /dev/null ++++ b/gdb/features/microblaze64-with-stack-protect.xml +@@ -0,0 +1,12 @@ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/gdb/features/microblaze64.c b/gdb/features/microblaze64.c +new file mode 100644 +index 00000000000..8ab7a90dd95 +--- /dev/null ++++ b/gdb/features/microblaze64.c +@@ -0,0 +1,77 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: ++ Original: microblaze.xml */ ++ ++#include "defs.h" ++#include "osabi.h" ++#include "target-descriptions.h" ++ ++struct target_desc *tdesc_microblaze64; ++static void ++initialize_tdesc_microblaze64 (void) ++{ ++ target_desc_up result = allocate_target_description (); ++ struct tdesc_feature *feature; ++ ++ feature = tdesc_create_feature (result.get(), "org.gnu.gdb.microblaze64.core"); ++ tdesc_create_reg (feature, "r0", 0, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r2", 2, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r3", 3, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r4", 4, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r5", 5, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r6", 6, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r7", 7, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r8", 8, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r9", 9, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r10", 10, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r11", 11, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r12", 12, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r13", 13, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r14", 14, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r15", 15, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r16", 16, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r17", 17, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r18", 18, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r19", 19, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r20", 20, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r21", 21, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r22", 22, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r23", 23, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r24", 24, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r25", 25, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r26", 26, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r27", 27, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r28", 28, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r29", 29, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r30", 30, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "r31", 31, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rear", 34, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rfsr", 36, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rbtr", 37, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpvr0", 38, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr1", 39, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr2", 40, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr3", 41, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr4", 42, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr5", 43, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr6", 44, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr7", 45, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr8", 46, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpvr9", 47, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "rpvr10", 48, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr11", 49, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "redr", 50, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpid", 51, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rzpr", 52, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbx", 53, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); ++ ++ tdesc_microblaze64 = result.release(); ++} +diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml +new file mode 100644 +index 00000000000..515d18e65cf +--- /dev/null ++++ b/gdb/features/microblaze64.xml +@@ -0,0 +1,11 @@ ++ ++ ++ ++ ++ ++ ++ +diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c +index 5b57bb4d3ba..39592a43f7c 100644 +--- a/gdb/microblaze-linux-tdep.c ++++ b/gdb/microblaze-linux-tdep.c +@@ -40,6 +40,7 @@ + #include "features/microblaze-linux.c" + + static int microblaze_debug_flag = 0; ++int MICROBLAZE_REGISTER_SIZE=4; + + static void + microblaze_debug (const char *fmt, ...) +@@ -55,6 +56,7 @@ microblaze_debug (const char *fmt, ...) + } + } + ++#if 0 + static int + microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, + struct bp_target_info *bp_tgt) +@@ -86,6 +88,8 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, + return val; + } + ++#endif ++ + static void + microblaze_linux_sigtramp_cache (frame_info_ptr next_frame, + struct trad_frame_cache *this_cache, +@@ -147,8 +151,8 @@ microblaze_linux_init_abi (struct gdbarch_info info, + + linux_init_abi (info, gdbarch, 0); + +- set_gdbarch_memory_remove_breakpoint (gdbarch, +- microblaze_linux_memory_remove_breakpoint); ++ // set_gdbarch_memory_remove_breakpoint (gdbarch, ++ // microblaze_linux_memory_remove_breakpoint); + + /* Shared library handling. */ + set_solib_svr4_fetch_link_map_offsets (gdbarch, +@@ -160,10 +164,30 @@ microblaze_linux_init_abi (struct gdbarch_info info, + + /* BFD target for core files. */ + if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) +- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); ++ { ++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblaze"); ++ MICROBLAZE_REGISTER_SIZE=8; ++ } ++ else ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); ++ } + else +- set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); ++ { ++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) { ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf64-microblazeel"); ++ MICROBLAZE_REGISTER_SIZE=8; ++ } ++ else ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); ++ } + ++ switch (info.bfd_arch_info->mach) ++ { ++ case bfd_mach_microblaze64: ++ set_gdbarch_ptr_bit (gdbarch, 64); ++ break; ++ } + + /* Shared library handling. */ + set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); +@@ -178,7 +202,9 @@ void _initialize_microblaze_linux_tdep (); + void + _initialize_microblaze_linux_tdep () + { +- gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, ++ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze, GDB_OSABI_LINUX, ++ microblaze_linux_init_abi); ++ gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, + microblaze_linux_init_abi); + initialize_tdesc_microblaze_linux (); + } +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 066602b385a..9450882e850 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -40,7 +40,9 @@ + #include "remote.h" + + #include "features/microblaze-with-stack-protect.c" ++#include "features/microblaze64-with-stack-protect.c" + #include "features/microblaze.c" ++#include "features/microblaze64.c" + + /* Instruction macros used for analyzing the prologue. */ + /* This set of instruction macros need to be changed whenever the +@@ -75,12 +77,13 @@ static const char * const microblaze_register_names[] = + "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6", + "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11", + "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi", +- "rslr", "rshr" ++ "slr", "shr" + }; + + #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names) + + static unsigned int microblaze_debug_flag = 0; ++int reg_size = 4; + + #define microblaze_debug(fmt, ...) \ + debug_prefixed_printf_cond_nofunc (microblaze_debug_flag, "MICROBLAZE", \ +@@ -128,6 +131,15 @@ microblaze_fetch_instruction (CORE_ADDR pc) + constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT; + + typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint; ++static CORE_ADDR ++microblaze_store_arguments (struct regcache *regcache, int nargs, ++ struct value **args, CORE_ADDR sp, ++ int struct_return, CORE_ADDR struct_addr) ++{ ++ error (_("store_arguments not implemented")); ++ return sp; ++} ++#if 0 + static int + microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, + struct bp_target_info *bp_tgt) +@@ -146,7 +158,6 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, + /* Make sure we see the memory breakpoints. */ + scoped_restore restore_memory + = make_scoped_restore_show_memory_breakpoints (1); +- + val = target_read_memory (addr, old_contents, bplen); + + /* If our breakpoint is no longer at the address, this means that the +@@ -161,6 +172,7 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, + return val; + } + ++#endif + /* Allocate and initialize a frame cache. */ + + static struct microblaze_frame_cache * +@@ -583,11 +595,11 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache, + { + case 1: /* return last byte in the register. */ + regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf); +- memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1); ++ memcpy(valbuf, buf + reg_size - 1, 1); + return; + case 2: /* return last 2 bytes in register. */ + regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf); +- memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2); ++ memcpy(valbuf, buf + reg_size - 2, 2); + return; + case 4: /* for sizes 4 or 8, copy the required length. */ + case 8: +@@ -753,6 +765,12 @@ microblaze_software_single_step (struct regcache *regcache) + } + #endif + ++static void ++microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc) ++{ ++ regcache_cooked_write_unsigned (regcache, MICROBLAZE_PC_REGNUM, pc); ++} ++ + static int dwarf2_to_reg_map[78] = + { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */ + 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */ +@@ -787,13 +805,14 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) + static void + microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) + { ++ + register_remote_g_packet_guess (gdbarch, + 4 * MICROBLAZE_NUM_CORE_REGS, +- tdesc_microblaze); ++ tdesc_microblaze64); + + register_remote_g_packet_guess (gdbarch, + 4 * MICROBLAZE_NUM_REGS, +- tdesc_microblaze_with_stack_protect); ++ tdesc_microblaze64_with_stack_protect); + } + + void +@@ -801,7 +820,7 @@ microblaze_supply_gregset (const struct regset *regset, + struct regcache *regcache, + int regnum, const void *gregs) + { +- const unsigned int *regs = (const unsigned int *)gregs; ++ const gdb_byte *regs = (const gdb_byte *) gregs; + if (regnum >= 0) + regcache->raw_supply (regnum, regs + regnum); + +@@ -809,7 +828,7 @@ microblaze_supply_gregset (const struct regset *regset, + int i; + + for (i = 0; i < 50; i++) { +- regcache->raw_supply (i, regs + i); ++ regcache->raw_supply (regnum, regs + i); + } + } + } +@@ -832,6 +851,17 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, + } + + ++static void ++make_regs (struct gdbarch *arch) ++{ ++ struct gdbarch_tdep *tdep = gdbarch_tdep (arch); ++ int mach = gdbarch_bfd_arch_info (arch)->mach; ++ ++ if (mach == bfd_mach_microblaze64) ++ { ++ set_gdbarch_ptr_bit (arch, 64); ++ } ++} + + static struct gdbarch * + microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -844,8 +874,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + if (arches != NULL) + return arches->gdbarch; + if (tdesc == NULL) +- tdesc = tdesc_microblaze; +- ++ { ++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ { ++ tdesc = tdesc_microblaze64; ++ reg_size = 8; ++ } ++ else ++ tdesc = tdesc_microblaze; ++ } + /* Check any target description for validity. */ + if (tdesc_has_registers (tdesc)) + { +@@ -853,31 +890,42 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + int valid_p; + int i; + +- feature = tdesc_find_feature (tdesc, +- "org.gnu.gdb.microblaze.core"); ++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ feature = tdesc_find_feature (tdesc, ++ "org.gnu.gdb.microblaze64.core"); ++ else ++ feature = tdesc_find_feature (tdesc, ++ "org.gnu.gdb.microblaze.core"); + if (feature == NULL) + return NULL; + tdesc_data = tdesc_data_alloc (); + + valid_p = 1; +- for (i = 0; i < MICROBLAZE_NUM_CORE_REGS; i++) +- valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i, +- microblaze_register_names[i]); +- feature = tdesc_find_feature (tdesc, +- "org.gnu.gdb.microblaze.stack-protect"); ++ for (i = 0; i < MICROBLAZE_NUM_REGS; i++) ++ valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), i, ++ microblaze_register_names[i]); ++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ feature = tdesc_find_feature (tdesc, ++ "org.gnu.gdb.microblaze64.stack-protect"); ++ else ++ feature = tdesc_find_feature (tdesc, ++ "org.gnu.gdb.microblaze.stack-protect"); + if (feature != NULL) +- { +- valid_p = 1; +- valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), +- MICROBLAZE_SLR_REGNUM, +- "rslr"); +- valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), +- MICROBLAZE_SHR_REGNUM, +- "rshr"); +- } ++ { ++ valid_p = 1; ++ valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), ++ MICROBLAZE_SLR_REGNUM, ++ "slr"); ++ valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), ++ MICROBLAZE_SHR_REGNUM, ++ "shr"); ++ } + + if (!valid_p) +- return NULL; ++ { ++ // tdesc_data_cleanup (tdesc_data.get ()); ++ return NULL; ++ } + } + + /* Allocate space for the new architecture. */ +@@ -897,7 +945,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + /* Register numbers of various important registers. */ + set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM); + set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM); ++ ++ /* Register set. ++ make_regs (gdbarch); */ ++ switch (info.bfd_arch_info->mach) ++ { ++ case bfd_mach_microblaze64: ++ set_gdbarch_ptr_bit (gdbarch, 64); ++ break; ++ } + ++ + /* Map Dwarf2 registers to GDB registers. */ + set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); + +@@ -917,7 +975,9 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + microblaze_breakpoint::kind_from_pc); + set_gdbarch_sw_breakpoint_from_kind (gdbarch, + microblaze_breakpoint::bp_from_kind); +- set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); ++// set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); ++ ++// set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); + + set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); + +@@ -925,7 +985,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + + set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc); + +- microblaze_register_g_packet_guesses (gdbarch); ++ //microblaze_register_g_packet_guesses (gdbarch); + + frame_base_set_default (gdbarch, µblaze_frame_base); + +@@ -940,12 +1000,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data)); + //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer); + +- /* If we have register sets, enable the generic core file support. */ ++ /* If we have register sets, enable the generic core file support. + if (tdep->gregset) { + set_gdbarch_iterate_over_regset_sections (gdbarch, + microblaze_iterate_over_regset_sections); +- } +- ++ }*/ + return gdbarch; + } + +@@ -957,6 +1016,8 @@ _initialize_microblaze_tdep () + + initialize_tdesc_microblaze_with_stack_protect (); + initialize_tdesc_microblaze (); ++ initialize_tdesc_microblaze64_with_stack_protect (); ++ initialize_tdesc_microblaze64 (); + /* Debug this files internals. */ + add_setshow_zuinteger_cmd ("microblaze", class_maintenance, + µblaze_debug_flag, _("\ +diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h +index 21f206777f0..542cdd82070 100644 +--- a/gdb/microblaze-tdep.h ++++ b/gdb/microblaze-tdep.h +@@ -28,7 +28,7 @@ struct microblaze_gregset + microblaze_gregset() {} + unsigned int gregs[32]; + unsigned int fpregs[32]; +- unsigned int pregs[16]; ++ unsigned int pregs[18]; + }; + + struct microblaze_gdbarch_tdep : gdbarch_tdep_base +@@ -134,7 +134,7 @@ struct microblaze_frame_cache + struct trad_frame_saved_reg *saved_regs; + }; + /* All registers are 32 bits. */ +-#define MICROBLAZE_REGISTER_SIZE 4 ++//#define MICROBLAZE_REGISTER_SIZE 8 + + /* MICROBLAZE_BREAKPOINT defines the breakpoint that should be used. + Only used for native debugging. */ +diff --git a/include/elf/common.h b/include/elf/common.h +index 244b13361e5..6395f69426f 100644 +--- a/include/elf/common.h ++++ b/include/elf/common.h +@@ -360,6 +360,7 @@ + #define EM_U16_U8CORE 260 /* LAPIS nX-U16/U8 */ + #define EM_TACHYUM 261 /* Tachyum */ + #define EM_56800EF 262 /* NXP 56800EF Digital Signal Controller (DSC) */ ++#define EM_MB_64 263 /* Xilinx MicroBlaze 32-bit RISC soft processor core */ + + /* If it is necessary to assign new unofficial EM_* values, please pick large + random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision +diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h +index fecdd7e4831..3306e3c3ad6 100644 +--- a/include/elf/microblaze.h ++++ b/include/elf/microblaze.h +@@ -61,6 +61,10 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type) + RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */ + RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */ + RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */ ++ RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33) ++ RELOC_NUMBER (R_MICROBLAZE_IMML_64, 34) ++ RELOC_NUMBER (R_MICROBLAZE_GPC_64, 35) /* GOT entry offset. */ ++ + END_RELOC_NUMBERS (R_MICROBLAZE_max) + + /* Global base address names. */ +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index 12981abfea1..c910f2ff210 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c +@@ -33,6 +33,7 @@ + #define get_field_r1(buf, instr) get_field (buf, instr, RA_MASK, RA_LOW) + #define get_field_r2(buf, instr) get_field (buf, instr, RB_MASK, RB_LOW) + #define get_int_field_imm(instr) ((instr & IMM_MASK) >> IMM_LOW) ++#define get_int_field_imml(instr) ((instr & IMML_MASK) >> IMM_LOW) + #define get_int_field_r1(instr) ((instr & RA_MASK) >> RA_LOW) + + #define NUM_STRBUFS 3 +@@ -73,11 +74,20 @@ get_field_imm (struct string_buf *buf, long instr) + } + + static char * +-get_field_imm5 (struct string_buf *buf, long instr) ++get_field_imml (struct string_buf *buf, long instr) + { + char *p = strbuf (buf); + +- sprintf (p, "%d", (short)((instr & IMM5_MASK) >> IMM_LOW)); ++ sprintf (p, "%d", (int)((instr & IMML_MASK) >> IMM_LOW)); ++ return p; ++} ++ ++static char * ++get_field_imms (struct string_buf *buf, long instr) ++{ ++ char *p = strbuf (buf); ++ ++ sprintf (p, "%d", (short)((instr & IMM6_MASK) >> IMM_LOW)); + return p; + } + +@@ -90,6 +100,18 @@ get_field_imm5_mbar (struct string_buf *buf, long instr) + return p; + } + ++static char * ++get_field_immw (struct string_buf *buf, long instr) ++{ ++ char *p = strbuf (buf); ++ ++ if (instr & 0x00004000) ++ sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ ++ else ++ sprintf (p, "%d", (short)(((instr & IMM6_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM6_MASK) >> IMM_LOW) + 1)); /* bsifi */ ++ return p; ++} ++ + static char * + get_field_rfsl (struct string_buf *buf, long instr) + { +@@ -296,9 +318,14 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + } + } + break; +- case INST_TYPE_RD_R1_IMM5: ++ case INST_TYPE_RD_R1_IMML: ++ print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst), ++ get_field_r1(&buf, inst), get_field_imm (&buf, inst)); ++ /* TODO: Also print symbol */ ++ break; ++ case INST_TYPE_RD_R1_IMMS: + print_func (stream, "\t%s, %s, %s", get_field_rd (&buf, inst), +- get_field_r1 (&buf, inst), get_field_imm5 (&buf, inst)); ++ get_field_r1(&buf, inst), get_field_imms (&buf, inst)); + break; + case INST_TYPE_RD_RFSL: + print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), +@@ -402,9 +429,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + } + } + break; +- case INST_TYPE_RD_R2: +- print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), +- get_field_r2 (&buf, inst)); ++ case INST_TYPE_IMML: ++ print_func (stream, "\t%s", get_field_imml (&buf, inst)); ++ /* TODO: Also print symbol */ ++ break; ++ case INST_TYPE_RD_R2: ++ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_r2 (&buf, inst)); + break; + case INST_TYPE_R2: + print_func (stream, "\t%s", get_field_r2 (&buf, inst)); +@@ -427,7 +457,12 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + /* For mbar 16 or sleep insn. */ + case INST_TYPE_NONE: + break; +- /* For tuqula instruction */ ++ /* For bit field insns. */ ++ case INST_TYPE_RD_R1_IMMW_IMMS: ++ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), ++ get_field_immw (&buf, inst), get_field_imms (&buf, inst)); ++ break; ++ /* For tuqula instruction */ + case INST_TYPE_RD: + print_func (stream, "\t%s", get_field_rd (&buf, inst)); + break; +diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h +index 7398e9e246a..dc78712d67b 100644 +--- a/opcodes/microblaze-opc.h ++++ b/opcodes/microblaze-opc.h +@@ -40,7 +40,7 @@ + #define INST_TYPE_RD_SPECIAL 11 + #define INST_TYPE_R1 12 + /* New instn type for barrel shift imms. */ +-#define INST_TYPE_RD_R1_IMM5 13 ++#define INST_TYPE_RD_R1_IMMS 13 + #define INST_TYPE_RD_RFSL 14 + #define INST_TYPE_R1_RFSL 15 + +@@ -59,6 +59,15 @@ + /* For mbar. */ + #define INST_TYPE_IMM5 20 + ++/* For bsefi and bsifi */ ++#define INST_TYPE_RD_R1_IMMW_IMMS 21 ++ ++/* For 64-bit instructions */ ++#define INST_TYPE_IMML 22 ++#define INST_TYPE_RD_R1_IMML 23 ++#define INST_TYPE_R1_IMML 24 ++#define INST_TYPE_RD_R1_IMMW_IMMS 21 ++ + #define INST_TYPE_NONE 25 + + +@@ -88,11 +97,14 @@ + #define OPCODE_MASK_H24 0xFC1F07FF /* High 6, bits 20-16 and low 11 bits. */ + #define OPCODE_MASK_H124 0xFFFF07FF /* High 16, and low 11 bits. */ + #define OPCODE_MASK_H1234 0xFFFFFFFF /* All 32 bits. */ +-#define OPCODE_MASK_H3 0xFC000600 /* High 6 bits and bits 21, 22. */ ++#define OPCODE_MASK_H3 0xFC000700 /* High 6 bits and bits 21, 22, 23. */ ++#define OPCODE_MASK_H3B 0xFC00E600 /* High 6 bits and bits 16, 17, 18, 21, 22. */ + #define OPCODE_MASK_H32 0xFC00FC00 /* High 6 bits and bit 16-21. */ ++#define OPCODE_MASK_H32B 0xFC00E000 /* High 6 bits and bit 16, 17, 18. */ + #define OPCODE_MASK_H34B 0xFC0000FF /* High 6 bits and low 8 bits. */ + #define OPCODE_MASK_H35B 0xFC0004FF /* High 6 bits and low 9 bits. */ + #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26. */ ++#define OPCODE_MASK_H8 0xFF000000 /* High 8 bits only. */ + + /* New Mask for msrset, msrclr insns. */ + #define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */ +@@ -102,7 +114,7 @@ + #define DELAY_SLOT 1 + #define NO_DELAY_SLOT 0 + +-#define MAX_OPCODES 300 ++#define MAX_OPCODES 412 + + const struct op_code_struct + { +@@ -120,6 +132,7 @@ const struct op_code_struct + /* More info about output format here. */ + } microblaze_opcodes[MAX_OPCODES] = + { ++ /* 32-bit instructions */ + {"add", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x00000000, OPCODE_MASK_H4, add, arithmetic_inst }, + {"rsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H4, rsub, arithmetic_inst }, + {"addc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000000, OPCODE_MASK_H4, addc, arithmetic_inst }, +@@ -156,9 +169,11 @@ const struct op_code_struct + {"ncget", INST_TYPE_RD_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C006000, OPCODE_MASK_H32, ncget, anyware_inst }, + {"ncput", INST_TYPE_R1_RFSL, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6C00E000, OPCODE_MASK_H32, ncput, anyware_inst }, + {"muli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x60000000, OPCODE_MASK_H, muli, mult_inst }, +- {"bslli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3, bslli, barrel_shift_inst }, +- {"bsrai", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3, bsrai, barrel_shift_inst }, +- {"bsrli", INST_TYPE_RD_R1_IMM5, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3, bsrli, barrel_shift_inst }, ++ {"bslli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000400, OPCODE_MASK_H3B, bslli, barrel_shift_inst }, ++ {"bsrai", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000200, OPCODE_MASK_H3B, bsrai, barrel_shift_inst }, ++ {"bsrli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64000000, OPCODE_MASK_H3B, bsrli, barrel_shift_inst }, ++ {"bsefi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64004000, OPCODE_MASK_H32B, bsefi, barrel_shift_inst }, ++ {"bsifi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64008000, OPCODE_MASK_H32B, bsifi, barrel_shift_inst }, + {"or", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000000, OPCODE_MASK_H4, microblaze_or, logical_inst }, + {"and", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000000, OPCODE_MASK_H4, microblaze_and, logical_inst }, + {"xor", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000000, OPCODE_MASK_H4, microblaze_xor, logical_inst }, +@@ -260,9 +275,7 @@ const struct op_code_struct + {"la", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* la translates to addik. */ + {"tuqula",INST_TYPE_RD, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3000002A, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* tuqula rd translates to addik rd, r0, 42. */ + {"not", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA800FFFF, OPCODE_MASK_H34, invalid_inst, logical_inst }, /* not translates to xori rd,ra,-1. */ +- {"neg", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0. */ + {"rtb", INST_TYPE_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB6000004, OPCODE_MASK_H1, invalid_inst, return_inst }, /* rtb translates to rts rd, 4. */ +- {"sub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra. */ + {"lmi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xE8000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, + {"smi", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xF8000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, + {"msrset",INST_TYPE_RD_IMM15, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x94100000, OPCODE_MASK_H23N, msrset, special_inst }, +@@ -418,6 +431,130 @@ const struct op_code_struct + {"suspend", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBB020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 24. */ + {"swapb", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4, swapb, arithmetic_inst }, + {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst }, ++ /* 64-bit instructions */ ++ {"addl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x00000100, OPCODE_MASK_H4, addl, arithmetic_inst }, ++ {"rsubl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000100, OPCODE_MASK_H4, rsubl, arithmetic_inst }, ++ {"addlc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x08000100, OPCODE_MASK_H4, addlc, arithmetic_inst }, ++ {"rsublc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x0C000100, OPCODE_MASK_H4, rsublc, arithmetic_inst }, ++ {"addlk", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x10000100, OPCODE_MASK_H4, addlk, arithmetic_inst }, ++ {"rsublk", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000100, OPCODE_MASK_H4, rsublk, arithmetic_inst }, ++ {"addlkc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x18000100, OPCODE_MASK_H4, addlkc, arithmetic_inst }, ++ {"rsublkc", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x1C000100, OPCODE_MASK_H4, rsublkc, arithmetic_inst }, ++ {"cmpl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst }, ++ {"cmplu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst }, ++ {"addli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x20000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsubli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x24000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addlic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x28000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsublic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x2C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addlik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsublik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x34000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addlikc", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x38000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsublikc",INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"mull", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000100, OPCODE_MASK_H4, mull, mult_inst }, ++ {"bslll", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000500, OPCODE_MASK_H3, bslll, barrel_shift_inst }, ++ {"bslra", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000300, OPCODE_MASK_H3, bslra, barrel_shift_inst }, ++ {"bslrl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000100, OPCODE_MASK_H3, bslrl, barrel_shift_inst }, ++ {"bsllli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002400, OPCODE_MASK_H3B, bsllli, barrel_shift_inst }, ++ {"bslrai", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002200, OPCODE_MASK_H3B, bslrai, barrel_shift_inst }, ++ {"bslrli", INST_TYPE_RD_R1_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64002000, OPCODE_MASK_H3B, bslrli, barrel_shift_inst }, ++ {"bslefi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x64006000, OPCODE_MASK_H32B, bslefi, barrel_shift_inst }, ++ {"bslifi", INST_TYPE_RD_R1_IMMW_IMMS, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x6400a000, OPCODE_MASK_H32B, bslifi, barrel_shift_inst }, ++ {"orl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000100, OPCODE_MASK_H4, orl, logical_inst }, ++ {"andl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x84000100, OPCODE_MASK_H4, andl, logical_inst }, ++ {"xorl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000100, OPCODE_MASK_H4, xorl, logical_inst }, ++ {"andnl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000100, OPCODE_MASK_H4, andnl, logical_inst }, ++ {"pcmplbf", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x80000500, OPCODE_MASK_H4, pcmplbf, logical_inst }, ++ {"pcmpleq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x88000500, OPCODE_MASK_H4, pcmpleq, logical_inst }, ++ {"pcmplne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x8C000500, OPCODE_MASK_H4, pcmplne, logical_inst }, ++ {"srla", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000101, OPCODE_MASK_H34, srla, logical_inst }, ++ {"srlc", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000121, OPCODE_MASK_H34, srlc, logical_inst }, ++ {"srll", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000141, OPCODE_MASK_H34, srll, logical_inst }, ++ {"sextl8", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000160, OPCODE_MASK_H34, sextl8, logical_inst }, ++ {"sextl16", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000161, OPCODE_MASK_H34, sextl16, logical_inst }, ++ {"sextl32", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x90000162, OPCODE_MASK_H34, sextl32, logical_inst }, ++ {"brea", INST_TYPE_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98010000, OPCODE_MASK_H124, brea, branch_inst }, ++ {"bread", INST_TYPE_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98110000, OPCODE_MASK_H124, bread, branch_inst }, ++ {"breald", INST_TYPE_RD_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x98150000, OPCODE_MASK_H24, breald, branch_inst }, ++ {"beaeq", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D000000, OPCODE_MASK_H14, beaeq, branch_inst }, ++ {"bealeq", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D000100, OPCODE_MASK_H14, bealeq, branch_inst }, ++ {"beaeqd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F000000, OPCODE_MASK_H14, beaeqd, branch_inst }, ++ {"bealeqd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F000100, OPCODE_MASK_H14, bealeqd, branch_inst }, ++ {"beane", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D200000, OPCODE_MASK_H14, beane, branch_inst }, ++ {"bealne", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D200100, OPCODE_MASK_H14, bealne, branch_inst }, ++ {"beaned", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F200000, OPCODE_MASK_H14, beaned, branch_inst }, ++ {"bealned", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F200100, OPCODE_MASK_H14, bealned, branch_inst }, ++ {"bealt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D400000, OPCODE_MASK_H14, bealt, branch_inst }, ++ {"beallt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D400100, OPCODE_MASK_H14, beallt, branch_inst }, ++ {"bealtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F400000, OPCODE_MASK_H14, bealtd, branch_inst }, ++ {"bealltd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F400100, OPCODE_MASK_H14, bealltd, branch_inst }, ++ {"beale", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D600000, OPCODE_MASK_H14, beale, branch_inst }, ++ {"bealle", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D600100, OPCODE_MASK_H14, bealle, branch_inst }, ++ {"bealed", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F600000, OPCODE_MASK_H14, bealed, branch_inst }, ++ {"bealled", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F600100, OPCODE_MASK_H14, bealled, branch_inst }, ++ {"beagt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D800000, OPCODE_MASK_H14, beagt, branch_inst }, ++ {"bealgt", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9D800100, OPCODE_MASK_H14, bealgt, branch_inst }, ++ {"beagtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F800000, OPCODE_MASK_H14, beagtd, branch_inst }, ++ {"bealgtd", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9F800100, OPCODE_MASK_H14, bealgtd, branch_inst }, ++ {"beage", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9DA00000, OPCODE_MASK_H14, beage, branch_inst }, ++ {"bealge", INST_TYPE_R1_R2, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9DA00100, OPCODE_MASK_H14, bealge, branch_inst }, ++ {"beaged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00000, OPCODE_MASK_H14, beaged, branch_inst }, ++ {"bealged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00100, OPCODE_MASK_H14, bealged, branch_inst }, ++ {"orli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA0000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"andli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA4000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"xorli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA8000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"andnli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xAC000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"imml", INST_TYPE_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB2000000, OPCODE_MASK_H8, imml, immediate_inst }, ++ {"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst }, ++ {"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst }, ++ {"brealid", INST_TYPE_RD_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8150000, OPCODE_MASK_H2, brealid, branch_inst }, ++ {"beaeqi", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD000000, OPCODE_MASK_H1, beaeqi, branch_inst }, ++ {"bealeqi", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD000000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaeqi */ ++ {"beaeqid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF000000, OPCODE_MASK_H1, beaeqid, branch_inst }, ++ {"bealeqid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF000000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaeqid */ ++ {"beanei", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD200000, OPCODE_MASK_H1, beanei, branch_inst }, ++ {"bealnei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD200000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beanei */ ++ {"beaneid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF200000, OPCODE_MASK_H1, beaneid, branch_inst }, ++ {"bealneid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF200000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beaneid */ ++ {"bealti", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD400000, OPCODE_MASK_H1, bealti, branch_inst }, ++ {"beallti", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD400000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealti */ ++ {"bealtid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF400000, OPCODE_MASK_H1, bealtid, branch_inst }, ++ {"bealltid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF400000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealtid */ ++ {"bealei", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD600000, OPCODE_MASK_H1, bealei, branch_inst }, ++ {"beallei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD600000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealei */ ++ {"bealeid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF600000, OPCODE_MASK_H1, bealeid, branch_inst }, ++ {"bealleid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF600000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to bealeid */ ++ {"beagti", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD800000, OPCODE_MASK_H1, beagti, branch_inst }, ++ {"bealgti", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBD800000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagti */ ++ {"beagtid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF800000, OPCODE_MASK_H1, beagtid, branch_inst }, ++ {"bealgtid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBF800000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagtid */ ++ {"beagei", INST_TYPE_R1_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBDA00000, OPCODE_MASK_H1, beagei, branch_inst }, ++ {"bealgei", INST_TYPE_R1_IMML, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBDA00000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beagei */ ++ {"beageid", INST_TYPE_R1_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBFA00000, OPCODE_MASK_H1, beageid, branch_inst }, ++ {"bealgeid",INST_TYPE_R1_IMML, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBFA00000, OPCODE_MASK_H1, invalid_inst, branch_inst }, /* Identical to beageid */ ++ {"ll", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000100, OPCODE_MASK_H4, ll, memory_load_inst }, ++ {"llr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000300, OPCODE_MASK_H4, llr, memory_load_inst }, ++ {"sl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000100, OPCODE_MASK_H4, sl, memory_store_inst }, ++ {"slr", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xD8000300, OPCODE_MASK_H4, slr, memory_store_inst }, ++ {"lli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xEC000000, OPCODE_MASK_H, invalid_inst, memory_load_inst }, /* Identical to 32-bit */ ++ {"sli", INST_TYPE_RD_R1_IMM, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xFC000000, OPCODE_MASK_H, invalid_inst, memory_store_inst }, /* Identical to 32-bit */ ++ {"lla", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* lla translates to addlik */ ++ {"dadd", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000400, OPCODE_MASK_H4, dadd, arithmetic_inst }, ++ {"drsub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000480, OPCODE_MASK_H4, drsub, arithmetic_inst }, ++ {"dmul", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000500, OPCODE_MASK_H4, dmul, arithmetic_inst }, ++ {"ddiv", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000580, OPCODE_MASK_H4, ddiv, arithmetic_inst }, ++ {"dcmp.lt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000610, OPCODE_MASK_H4, dcmp_lt, arithmetic_inst }, ++ {"dcmp.eq", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000620, OPCODE_MASK_H4, dcmp_eq, arithmetic_inst }, ++ {"dcmp.le", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000630, OPCODE_MASK_H4, dcmp_le, arithmetic_inst }, ++ {"dcmp.gt", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000640, OPCODE_MASK_H4, dcmp_gt, arithmetic_inst }, ++ {"dcmp.ne", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000650, OPCODE_MASK_H4, dcmp_ne, arithmetic_inst }, ++ {"dcmp.ge", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000660, OPCODE_MASK_H4, dcmp_ge, arithmetic_inst }, ++ {"dcmp.un", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000600, OPCODE_MASK_H4, dcmp_un, arithmetic_inst }, ++ {"dbl", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000680, OPCODE_MASK_H4, dbl, arithmetic_inst }, ++ {"dlong", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000700, OPCODE_MASK_H4, dlong, arithmetic_inst }, ++ {"dsqrt", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x58000780, OPCODE_MASK_H4, dsqrt, arithmetic_inst }, ++ {"neg", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* neg translates to rsub rd, ra, r0. */ ++ {"sub", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x04000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* sub translates to rsub rd, rb, ra. */ ++ + {"", 0, 0, 0, 0, 0, 0, 0, 0}, + }; + +@@ -438,5 +575,17 @@ char pvr_register_prefix[] = "rpvr"; + #define MIN_IMM5 ((int) 0x00000000) + #define MAX_IMM5 ((int) 0x0000001f) + ++#define MIN_IMM6 ((int) 0x00000000) ++#define MAX_IMM6 ((int) 0x0000003f) ++ ++#define MIN_IMM_WIDTH ((int) 0x00000001) ++#define MAX_IMM_WIDTH ((int) 0x00000020) ++ ++#define MIN_IMM6_WIDTH ((int) 0x00000001) ++#define MAX_IMM6_WIDTH ((int) 0x00000040) ++ ++#define MIN_IMML ((long) 0xffffff8000000000L) ++#define MAX_IMML ((long) 0x0000007fffffffffL) ++ + #endif /* MICROBLAZE_OPC */ + +diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h +index c91b002d951..3923f6258d8 100644 +--- a/opcodes/microblaze-opcm.h ++++ b/opcodes/microblaze-opcm.h +@@ -25,11 +25,12 @@ + + enum microblaze_instr + { ++ /* 32-bit instructions */ + add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, clz, cmp, cmpu, + addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul, + mulh, mulhu, mulhsu, swapb, swaph, + idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput, +- ncget, ncput, muli, bslli, bsrai, bsrli, mului, ++ ncget, ncput, muli, bslli, bsrai, bsrli, bsefi, bsifi, mului, + /* 'or/and/xor' are C++ keywords. */ + microblaze_or, microblaze_and, microblaze_xor, + andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16, +@@ -39,8 +40,8 @@ enum microblaze_instr + imm, rtsd, rtid, rtbd, rted, bri, brid, brlid, brai, braid, bralid, + brki, beqi, beqid, bnei, bneid, blti, bltid, blei, bleid, bgti, + bgtid, bgei, bgeid, lbu, lbuea, lbur, lhu, lhuea, lhur, lw, lwea, lwr, lwx, +- sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, +- sbi, shi, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, ++ sb, sbea, sbr, sh, shea, shr, sw, swea, swr, swx, lbui, lhui, lwi, lli, ++ sbi, shi, sli, swi, msrset, msrclr, tuqula, mbi_fadd, frsub, mbi_fmul, mbi_fdiv, + fcmp_lt, fcmp_eq, fcmp_le, fcmp_gt, fcmp_ne, fcmp_ge, fcmp_un, flt, + /* 'fsqrt' is a glibc:math.h symbol. */ + fint, microblaze_fsqrt, +@@ -59,6 +60,18 @@ enum microblaze_instr + aputd, taputd, caputd, tcaputd, naputd, tnaputd, ncaputd, tncaputd, + eagetd, teagetd, ecagetd, tecagetd, neagetd, tneagetd, necagetd, tnecagetd, + eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd, ++ ++ /* 64-bit instructions */ ++ addl, rsubl, addlc, rsublc, addlk, rsublk, addlkc, rsublkc, cmpl, cmplu, mull, ++ bslll, bslra, bslrl, bsllli, bslrai, bslrli, bslefi, bslifi, orl, andl, xorl, ++ andnl, pcmplbf, pcmpleq, pcmplne, srla, srlc, srll, sextl8, sextl16, sextl32, ++ brea, bread, breald, beaeq, bealeq, beaeqd, bealeqd, beane, bealne, beaned, ++ bealned, bealt, beallt, bealtd, bealltd, beale, bealle, bealed, bealled, beagt, ++ bealgt, beagtd, bealgtd, beage, bealge, beaged, bealged, breai, breaid, brealid, ++ beaeqi, beaeqid, beanei, beaneid, bealti, bealtid, bealei, bealeid, beagti, ++ beagtid, beagei, beageid, imml, ll, llr, sl, slr, ++ dadd, drsub, dmul, ddiv, dcmp_lt, dcmp_eq, dcmp_le, dcmp_gt, dcmp_ne, dcmp_ge, ++ dcmp_un, dbl, dlong, dsqrt, + invalid_inst + }; + +@@ -130,18 +143,25 @@ enum microblaze_instr_type + #define RB_LOW 11 /* Low bit for RB. */ + #define IMM_LOW 0 /* Low bit for immediate. */ + #define IMM_MBAR 21 /* low bit for mbar instruction. */ ++#define IMM_WIDTH_LOW 6 /* Low bit for immediate width */ + + #define RD_MASK 0x03E00000 + #define RA_MASK 0x001F0000 + #define RB_MASK 0x0000F800 + #define IMM_MASK 0x0000FFFF ++#define IMML_MASK 0x00FFFFFF + +-/* Imm mask for barrel shifts. */ ++/* Imm masks for barrel shifts. */ + #define IMM5_MASK 0x0000001F ++#define IMM6_MASK 0x0000003F + + /* Imm mask for mbar. */ + #define IMM5_MBAR_MASK 0x03E00000 + ++/* Imm masks for extract/insert width. */ ++#define IMM5_WIDTH_MASK 0x000007C0 ++#define IMM6_WIDTH_MASK 0x00000FC0 ++ + /* FSL imm mask for get, put instructions. */ + #define RFSL_MASK 0x000000F + +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0006-Change-order-of-CFLAGS.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0006-Change-order-of-CFLAGS.patch deleted file mode 100644 index 58c9b1d0a..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0006-Change-order-of-CFLAGS.patch +++ /dev/null @@ -1,30 +0,0 @@ -From c0e7c34134aa1f9644075c596a2338a50d3d923e Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Sat, 30 Apr 2016 15:35:39 -0700 -Subject: [PATCH 6/9] Change order of CFLAGS - -Lets us override Werror if need be - -Upstream-Status: Inappropriate - -Signed-off-by: Khem Raj ---- - gdbserver/Makefile.in | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in -index 47648b8d962..5599779de57 100644 ---- a/gdbserver/Makefile.in -+++ b/gdbserver/Makefile.in -@@ -156,7 +156,7 @@ WIN32APILIBS = @WIN32APILIBS@ - INTERNAL_CFLAGS_BASE = ${GLOBAL_CFLAGS} \ - ${PROFILE_CFLAGS} ${INCLUDE_CFLAGS} ${CPPFLAGS} $(PTHREAD_CFLAGS) - INTERNAL_WARN_CFLAGS = ${INTERNAL_CFLAGS_BASE} $(WARN_CFLAGS) --INTERNAL_CFLAGS = ${INTERNAL_WARN_CFLAGS} $(WERROR_CFLAGS) -DGDBSERVER -+INTERNAL_CFLAGS = ${INTERNAL_WARN_CFLAGS} $(WERROR_CFLAGS) ${COMPILER_CFLAGS} -DGDBSERVER - - # LDFLAGS is specifically reserved for setting from the command line - # when running make. --- -2.36.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0007-Patch-MicroBlaze-Added-m64-abi-for-64-bit-target-des.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0007-Patch-MicroBlaze-Added-m64-abi-for-64-bit-target-des.patch deleted file mode 100644 index ec11e7bec..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0007-Patch-MicroBlaze-Added-m64-abi-for-64-bit-target-des.patch +++ /dev/null @@ -1,300 +0,0 @@ -From d2f145ec8e4e149e055adc74e92016447af91806 Mon Sep 17 00:00:00 2001 -From: Mahesh Bodapati -Date: Tue, 9 Nov 2021 16:19:17 +0530 -Subject: [PATCH 7/8] [Patch,MicroBlaze] : Added m64 abi for 64 bit target - descriptions. set m64 abi for 64 bit elf. - -Conflicts: - gdb/microblaze-tdep.c - gdb/microblaze-tdep.h -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - ---- - gdb/features/microblaze64.xml | 1 + - gdb/microblaze-tdep.c | 159 ++++++++++++++++++++++++++++++++-- - gdb/microblaze-tdep.h | 13 ++- - 3 files changed, 165 insertions(+), 8 deletions(-) - -diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml -index 515d18e65cf..9c1b7d22003 100644 ---- a/gdb/features/microblaze64.xml -+++ b/gdb/features/microblaze64.xml -@@ -7,5 +7,6 @@ - - - -+ microblaze64 - - -diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index c347bb9516b..d83072cdaef 100644 ---- a/gdb/microblaze-tdep.c -+++ b/gdb/microblaze-tdep.c -@@ -65,8 +65,95 @@ - #define IS_SAVE_HIDDEN_PTR(op, rd, ra, rb) \ - ((op == add || op == addik) && ra == MICROBLAZE_FIRST_ARGREG && rb == 0) - -+static const char *microblaze_abi_string; -+ -+static const char *const microblaze_abi_strings[] = { -+ "auto", -+ "m64", -+}; -+ -+enum microblaze_abi -+microblaze_abi (struct gdbarch *gdbarch) -+{ -+ microblaze_gdbarch_tdep *tdep = (microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); -+ return tdep->microblaze_abi; -+} - /* The registers of the Xilinx microblaze processor. */ - -+ static struct cmd_list_element *setmicroblazecmdlist = NULL; -+ static struct cmd_list_element *showmicroblazecmdlist = NULL; -+ -+static void -+microblaze_abi_update (const char *ignore_args, -+ int from_tty, struct cmd_list_element *c) -+{ -+ struct gdbarch_info info; -+ -+ /* Force the architecture to update, and (if it's a microblaze architecture) -+ * microblaze_gdbarch_init will take care of the rest. */ -+// gdbarch_info_init (&info); -+ gdbarch_update_p (info); -+} -+ -+ -+static enum microblaze_abi -+global_microblaze_abi (void) -+{ -+ int i; -+ -+ for (i = 0; microblaze_abi_strings[i] != NULL; i++) -+ if (microblaze_abi_strings[i] == microblaze_abi_string) -+ return (enum microblaze_abi) i; -+ -+// internal_error (__FILE__, __LINE__, _("unknown ABI string")); -+} -+ -+static void -+show_microblaze_abi (struct ui_file *file, -+ int from_tty, -+ struct cmd_list_element *ignored_cmd, -+ const char *ignored_value) -+{ -+ enum microblaze_abi global_abi = global_microblaze_abi (); -+ enum microblaze_abi actual_abi = microblaze_abi (target_gdbarch ()); -+ const char *actual_abi_str = microblaze_abi_strings[actual_abi]; -+ -+#if 1 -+ if (global_abi == MICROBLAZE_ABI_AUTO) -+ fprintf_filtered -+ (file, -+ "The microblaze ABI is set automatically (currently \"%s\").\n", -+ actual_abi_str); -+ else if (global_abi == actual_abi) -+ fprintf_filtered -+ (file, -+ "The microblaze ABI is assumed to be \"%s\" (due to user setting).\n", -+ actual_abi_str); -+ else -+ { -+#endif -+ /* Probably shouldn't happen... */ -+ fprintf_filtered (file, -+ "The (auto detected) microblaze ABI \"%s\" is in use " -+ "even though the user setting was \"%s\".\n", -+ actual_abi_str, microblaze_abi_strings[global_abi]); -+ } -+} -+ -+static void -+show_microblaze_command (const char *args, int from_tty) -+{ -+ help_list (showmicroblazecmdlist, "show microblaze ", all_commands, gdb_stdout); -+} -+ -+static void -+set_microblaze_command (const char *args, int from_tty) -+{ -+ printf_unfiltered -+ ("\"set microblaze\" must be followed by an appropriate subcommand.\n"); -+ help_list (setmicroblazecmdlist, "set microblaze ", all_commands, gdb_stdout); -+} -+ - static const char * const microblaze_register_names[] = - { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", -@@ -85,9 +172,21 @@ static const char * const microblaze_register_names[] = - static unsigned int microblaze_debug_flag = 0; - int reg_size = 4; - -+unsigned int -+microblaze_abi_regsize (struct gdbarch *gdbarch) -+{ -+ switch (microblaze_abi (gdbarch)) -+ { -+ case MICROBLAZE_ABI_M64: -+ return 8; -+ default: -+ return 4; -+ } -+} -+ - #define microblaze_debug(fmt, ...) \ - debug_prefixed_printf_cond_nofunc (microblaze_debug_flag, "MICROBLAZE", \ -- fmt, ## __VA_ARGS__) -+ fmt, ## __VA_ARGS__) - - - /* Return the name of register REGNUM. */ -@@ -868,15 +967,30 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - { - struct gdbarch *gdbarch; - tdesc_arch_data_up tdesc_data; -+ enum microblaze_abi microblaze_abi, found_abi, wanted_abi; - const struct target_desc *tdesc = info.target_desc; - -+ /* What has the user specified from the command line? */ -+ wanted_abi = global_microblaze_abi (); -+ if (gdbarch_debug) -+ fprintf_unfiltered (gdb_stdlog, "microblaze_gdbarch_init: wanted_abi = %d\n", -+ wanted_abi); -+ if (wanted_abi != MICROBLAZE_ABI_AUTO) -+ microblaze_abi = wanted_abi; -+ - /* If there is already a candidate, use it. */ - arches = gdbarch_list_lookup_by_info (arches, &info); -- if (arches != NULL) -+ if ((arches != NULL) && (microblaze_abi != MICROBLAZE_ABI_M64)) - return arches->gdbarch; -+ -+ if (microblaze_abi == MICROBLAZE_ABI_M64) -+ { -+ tdesc = tdesc_microblaze64; -+ reg_size = 8; -+ } - if (tdesc == NULL) - { -- if (info.bfd_arch_info->mach == bfd_mach_microblaze64) -+ if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) - { - tdesc = tdesc_microblaze64; - reg_size = 8; -@@ -891,7 +1005,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - int valid_p; - int i; - -- if (info.bfd_arch_info->mach == bfd_mach_microblaze64) -+ if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) - feature = tdesc_find_feature (tdesc, - "org.gnu.gdb.microblaze64.core"); - else -@@ -905,7 +1019,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - for (i = 0; i < MICROBLAZE_NUM_REGS; i++) - valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), i, - microblaze_register_names[i]); -- if (info.bfd_arch_info->mach == bfd_mach_microblaze64) -+ if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) - feature = tdesc_find_feature (tdesc, - "org.gnu.gdb.microblaze64.stack-protect"); - else -@@ -955,7 +1069,8 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) - set_gdbarch_ptr_bit (gdbarch, 64); - break; - } -- -+ if(microblaze_abi == MICROBLAZE_ABI_M64) -+ set_gdbarch_ptr_bit (gdbarch, 64); - - /* Map Dwarf2 registers to GDB registers. */ - set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); -@@ -1014,7 +1129,38 @@ void - _initialize_microblaze_tdep () - { - register_gdbarch_init (bfd_arch_microblaze, microblaze_gdbarch_init); -+// static struct cmd_list_element *setmicroblazecmdlist = NULL; -+// static struct cmd_list_element *showmicroblazecmdlist = NULL; -+ -+ /* Add root prefix command for all "set microblaze"/"show microblaze" commands. */ - -+ add_setshow_prefix_cmd ("microblaze", no_class, -+ _("Various microblaze specific commands."), -+ _("Various microblaze specific commands."), -+ &setmicroblazecmdlist,&showmicroblazecmdlist, -+ &setlist,&showlist); -+#if 0 -+ add_prefix_cmd ("microblaze", no_class, set_microblaze_command, -+ _("Various microblaze specific commands."), -+ &setmicroblazecmdlist, "set microblaze ", 0, &setlist); -+ -+ add_prefix_cmd ("microblaze", no_class, show_microblaze_command, -+ _("Various microblaze specific commands."), -+ &showmicroblazecmdlist, "show microblaze ", 0, &showlist); -+#endif -+ -+ /* Allow the user to override the ABI. */ -+ add_setshow_enum_cmd ("abi", class_obscure, microblaze_abi_strings, -+ µblaze_abi_string, _("\ -+Set the microblaze ABI used by this program."), _("\ -+Show the microblaze ABI used by this program."), _("\ -+This option can be set to one of:\n\ -+ auto - the default ABI associated with the current binary\n\ -+ m64"), -+ microblaze_abi_update, -+ show_microblaze_abi, -+ &setmicroblazecmdlist, &showmicroblazecmdlist); -+ - initialize_tdesc_microblaze_with_stack_protect (); - initialize_tdesc_microblaze (); - initialize_tdesc_microblaze64_with_stack_protect (); -@@ -1029,5 +1175,4 @@ When non-zero, microblaze specific debugging is enabled."), - NULL, - &setdebuglist, &showdebuglist); - -- - } -diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h -index f4d810303ca..babd6c36926 100644 ---- a/gdb/microblaze-tdep.h -+++ b/gdb/microblaze-tdep.h -@@ -19,9 +19,17 @@ - - #ifndef MICROBLAZE_TDEP_H - #define MICROBLAZE_TDEP_H 1 -- -+#include "objfiles.h" - #include "gdbarch.h" - -+struct gdbarch; -+enum microblaze_abi -+ { -+ MICROBLAZE_ABI_AUTO = 0, -+ MICROBLAZE_ABI_M64, -+ }; -+ -+enum microblaze_abi microblaze_abi (struct gdbarch *gdbarch); - /* Microblaze architecture-specific information. */ - struct microblaze_gregset - { -@@ -35,11 +43,14 @@ struct microblaze_gdbarch_tdep : gdbarch_tdep - { - int dummy; // declare something. - -+ enum microblaze_abi microblaze_abi {}; -+ enum microblaze_abi found_abi {}; - /* Register sets. */ - struct regset *gregset; - size_t sizeof_gregset; - struct regset *fpregset; - size_t sizeof_fpregset; -+ int register_size; - }; - - /* Register numbers. */ --- -2.37.1 (Apple Git-137.1) - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0007-resolve-restrict-keyword-conflict.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0007-resolve-restrict-keyword-conflict.patch deleted file mode 100644 index bbd1f0b27..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0007-resolve-restrict-keyword-conflict.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 44fa1ecfbd8a5fe0cfea12a175fa041686842a0c Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Tue, 10 May 2016 08:47:05 -0700 -Subject: [PATCH 7/9] resolve restrict keyword conflict - -GCC detects that we call 'restrict' as param name in function -signatures and complains since both params are called 'restrict' -therefore we use __restrict to denote the C99 keywork - -Upstream-Status: Pending - -Signed-off-by: Khem Raj ---- - gnulib/import/sys_time.in.h | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/gnulib/import/sys_time.in.h b/gnulib/import/sys_time.in.h -index 90a67d18426..664641a1fe8 100644 ---- a/gnulib/import/sys_time.in.h -+++ b/gnulib/import/sys_time.in.h -@@ -93,20 +93,20 @@ struct timeval - # define gettimeofday rpl_gettimeofday - # endif - _GL_FUNCDECL_RPL (gettimeofday, int, -- (struct timeval *restrict, void *restrict) -+ (struct timeval *__restrict, void *__restrict) - _GL_ARG_NONNULL ((1))); - _GL_CXXALIAS_RPL (gettimeofday, int, -- (struct timeval *restrict, void *restrict)); -+ (struct timeval *__restrict, void *__restrict)); - # else - # if !@HAVE_GETTIMEOFDAY@ - _GL_FUNCDECL_SYS (gettimeofday, int, -- (struct timeval *restrict, void *restrict) -+ (struct timeval *__restrict, void *__restrict) - _GL_ARG_NONNULL ((1))); - # endif - /* Need to cast, because on glibc systems, by default, the second argument is - struct timezone *. */ - _GL_CXXALIAS_SYS_CAST (gettimeofday, int, -- (struct timeval *restrict, void *restrict)); -+ (struct timeval *__restrict, void *__restrict)); - # endif - _GL_CXXALIASWARN (gettimeofday); - # if defined __cplusplus && defined GNULIB_NAMESPACE --- -2.36.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0007-these-changes-will-make-64-bit-vectors-as-default-ta.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0007-these-changes-will-make-64-bit-vectors-as-default-ta.patch new file mode 100644 index 000000000..27c04153c --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0007-these-changes-will-make-64-bit-vectors-as-default-ta.patch @@ -0,0 +1,35 @@ +From b6735e00ff7c60f8e66527402dd541b4217ce38f Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 19 Apr 2021 14:33:27 +0530 +Subject: [PATCH 07/54] these changes will make 64 bit vectors as default + target types when we built gdb with microblaze 64 bit type targets,for + instance microblaze-xilinx-elf64/microblazeel-xilinx-elf64 + +Signed-off-by: Aayush Misra +--- + bfd/config.bfd | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/bfd/config.bfd b/bfd/config.bfd +index 3a7d427778c..9a4b26be8f8 100644 +--- a/bfd/config.bfd ++++ b/bfd/config.bfd +@@ -880,7 +880,15 @@ case "${targ}" in + targ_defvec=metag_elf32_vec + targ_underscore=yes + ;; ++ microblazeel*-*64) ++ targ_defvec=microblaze_elf64_le_vec ++ targ_selvecs=microblaze_elf64_vec ++ ;; + ++ microblaze*-*64) ++ targ_defvec=microblaze_elf64_vec ++ targ_selvecs=microblaze_elf64_le_vec ++ ;; + microblazeel*-*) + targ_defvec=microblaze_elf32_le_vec + targ_selvecs=microblaze_elf32_vec +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0008-Added-m64-abi-for-64-bit-target-descriptions.-set-m6.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0008-Added-m64-abi-for-64-bit-target-descriptions.-set-m6.patch new file mode 100644 index 000000000..54e53f6fd --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0008-Added-m64-abi-for-64-bit-target-descriptions.-set-m6.patch @@ -0,0 +1,4104 @@ +From 89f7a0c3e8b3bc37a37280bacec724f764503f38 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Tue, 9 Nov 2021 16:19:17 +0530 +Subject: [PATCH 08/54] Added m64 abi for 64 bit target descriptions. set m64 + abi for 64 bit elf. + +Conflicts: + gdb/microblaze-tdep.c + gdb/microblaze-tdep.h + +Signed-off-by: Aayush Misra +--- + bfd/elf64-microblaze.c | 3810 ++++++++++++++++++++++++++++++++++++++++ + gdb/microblaze-tdep.c | 160 +- + gdb/microblaze-tdep.h | 13 +- + 3 files changed, 3975 insertions(+), 8 deletions(-) + create mode 100755 bfd/elf64-microblaze.c + +diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c +new file mode 100755 +index 00000000000..6cd9753a592 +--- /dev/null ++++ b/bfd/elf64-microblaze.c +@@ -0,0 +1,3810 @@ ++/* Xilinx MicroBlaze-specific support for 32-bit ELF ++ ++ Copyright (C) 2009-2021 Free Software Foundation, Inc. ++ ++ This file is part of BFD, the Binary File Descriptor library. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the ++ Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, ++ Boston, MA 02110-1301, USA. */ ++ ++ ++#include "sysdep.h" ++#include "bfd.h" ++#include "bfdlink.h" ++#include "libbfd.h" ++#include "elf-bfd.h" ++#include "elf/microblaze.h" ++#include ++ ++#define USE_RELA /* Only USE_REL is actually significant, but this is ++ here are a reminder... */ ++#define INST_WORD_SIZE 4 ++ ++static int ro_small_data_pointer = 0; ++static int rw_small_data_pointer = 0; ++ ++static reloc_howto_type * microblaze_elf_howto_table [(int) R_MICROBLAZE_max]; ++ ++static reloc_howto_type microblaze_elf_howto_raw[] = ++{ ++ /* This reloc does nothing. */ ++ HOWTO (R_MICROBLAZE_NONE, /* Type. */ ++ 0, /* Rightshift. */ ++ 0, /* Size. */ ++ 0, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ NULL, /* Special Function. */ ++ "R_MICROBLAZE_NONE", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* A standard 32 bit relocation. */ ++ HOWTO (R_MICROBLAZE_32, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 32, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_bitfield, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_32", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0xffffffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* A standard PCREL 32 bit relocation. */ ++ HOWTO (R_MICROBLAZE_32_PCREL,/* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 32, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_bitfield, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_32_PCREL", /* Name. */ ++ true, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0xffffffff, /* Dest Mask. */ ++ true), /* PC relative offset? */ ++ ++ /* A 64 bit PCREL relocation. Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_64_PCREL,/* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_64_PCREL", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ true), /* PC relative offset? */ ++ ++ /* The low half of a PCREL 32 bit relocation. */ ++ HOWTO (R_MICROBLAZE_32_PCREL_LO, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_signed, /* Complain on overflow. */ ++ bfd_elf_generic_reloc, /* Special Function. */ ++ "R_MICROBLAZE_32_PCREL_LO", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ true), /* PC relative offset? */ ++ ++ HOWTO (R_MICROBLAZE_IMML_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size (0 = byte, 1 = short, 2 = long). */ ++ 64, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_IMML_64", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0xffffffffffffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* A 64 bit relocation. Table entry not really used. */ ++ HOWTO (R_MICROBLAZE_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 2, /* Size (0 = byte, 1 = short, 2 = long). */ ++ 16, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_64", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* The low half of a 32 bit relocation. */ ++ HOWTO (R_MICROBLAZE_32_LO, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_signed, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_32_LO", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* Read-only small data section relocation. */ ++ HOWTO (R_MICROBLAZE_SRO32, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_bitfield, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_SRO32", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* Read-write small data area relocation. */ ++ HOWTO (R_MICROBLAZE_SRW32, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_bitfield, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_SRW32", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* This reloc does nothing. Used for relaxation. */ ++ HOWTO (R_MICROBLAZE_32_NONE, /* Type. */ ++ 0, /* Rightshift. */ ++ 2, /* Size (0 = byte, 1 = short, 2 = long). */ ++ 32, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_bitfield, /* Complain on overflow. */ ++ NULL, /* Special Function. */ ++ "R_MICROBLAZE_32_NONE",/* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* This reloc does nothing. Used for relaxation. */ ++ HOWTO (R_MICROBLAZE_64_NONE, /* Type. */ ++ 0, /* Rightshift. */ ++ 0, /* Size. */ ++ 0, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ NULL, /* Special Function. */ ++ "R_MICROBLAZE_64_NONE",/* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* Symbol Op Symbol relocation. */ ++ HOWTO (R_MICROBLAZE_32_SYM_OP_SYM, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 32, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_bitfield, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_32_SYM_OP_SYM", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0xffffffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* GNU extension to record C++ vtable hierarchy. */ ++ HOWTO (R_MICROBLAZE_GNU_VTINHERIT, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 0, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont,/* Complain on overflow. */ ++ NULL, /* Special Function. */ ++ "R_MICROBLAZE_GNU_VTINHERIT", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* GNU extension to record C++ vtable member usage. */ ++ HOWTO (R_MICROBLAZE_GNU_VTENTRY, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 0, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont,/* Complain on overflow. */ ++ _bfd_elf_rel_vtable_reloc_fn, /* Special Function. */ ++ "R_MICROBLAZE_GNU_VTENTRY", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* A 64 bit GOTPC relocation. Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_GOTPC_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc, /* Special Function. */ ++ "R_MICROBLAZE_GOTPC_64", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ true), /* PC relative offset? */ ++ ++ /* A 64 bit TEXTPCREL relocation. Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_TEXTPCREL_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 2, /* Size (0 = byte, 1 = short, 2 = long). */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc, /* Special Function. */ ++ "R_MICROBLAZE_TEXTPCREL_64", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ true), /* PC relative offset? */ ++ ++ /* A 64 bit GOTPC relocation. Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_GPC_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 2, /* Size (0 = byte, 1 = short, 2 = long). */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc, /* Special Function. */ ++ "R_MICROBLAZE_GPC_64", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ true), /* PC relative offset? */ ++ ++ /* A 64 bit GOT relocation. Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_GOT_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 2, /* Size (0 = byte, 1 = short, 2 = long). */ ++ 16, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_GOT_64",/* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* A 64 bit TEXTREL relocation. Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_TEXTREL_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 2, /* Size (0 = byte, 1 = short, 2 = long). */ ++ 16, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_TEXTREL_64",/* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* A 64 bit PLT relocation. Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_PLT_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_PLT_64",/* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ true), /* PC relative offset? */ ++ ++ /* Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_REL, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_REL", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ true), /* PC relative offset? */ ++ ++ /* Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_JUMP_SLOT,/* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_JUMP_SLOT", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ true), /* PC relative offset? */ ++ ++ /* Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_GLOB_DAT,/* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ true, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_GLOB_DAT", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ true), /* PC relative offset? */ ++ ++ /* A 64 bit GOT relative relocation. Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_GOTOFF_64, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_GOTOFF_64", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* A 32 bit GOT relative relocation. Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_GOTOFF_32, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc, /* Special Function. */ ++ "R_MICROBLAZE_GOTOFF_32", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* COPY relocation. Table-entry not really used. */ ++ HOWTO (R_MICROBLAZE_COPY, /* Type. */ ++ 0, /* Rightshift. */ ++ 4, /* Size. */ ++ 16, /* Bitsize. */ ++ false, /* PC_relative. */ ++ 0, /* Bitpos. */ ++ complain_overflow_dont, /* Complain on overflow. */ ++ bfd_elf_generic_reloc,/* Special Function. */ ++ "R_MICROBLAZE_COPY", /* Name. */ ++ false, /* Partial Inplace. */ ++ 0, /* Source Mask. */ ++ 0x0000ffff, /* Dest Mask. */ ++ false), /* PC relative offset? */ ++ ++ /* Marker relocs for TLS. */ ++ HOWTO (R_MICROBLAZE_TLS, ++ 0, /* rightshift */ ++ 2, /* size (0 = byte, 1 = short, 2 = long) */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_MICROBLAZE_TLS", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ 0x0000ffff, /* dst_mask */ ++ false), /* pcrel_offset */ ++ ++ HOWTO (R_MICROBLAZE_TLSGD, ++ 0, /* rightshift */ ++ 4, /* size */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_MICROBLAZE_TLSGD", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ 0x0000ffff, /* dst_mask */ ++ false), /* pcrel_offset */ ++ ++ HOWTO (R_MICROBLAZE_TLSLD, ++ 0, /* rightshift */ ++ 2, /* size (0 = byte, 1 = short, 2 = long) */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_MICROBLAZE_TLSLD", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ 0x0000ffff, /* dst_mask */ ++ false), /* pcrel_offset */ ++ ++ /* Computes the load module index of the load module that contains the ++ definition of its TLS sym. */ ++ HOWTO (R_MICROBLAZE_TLSDTPMOD32, ++ 0, /* rightshift */ ++ 2, /* size (0 = byte, 1 = short, 2 = long) */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_MICROBLAZE_TLSDTPMOD32", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ 0x0000ffff, /* dst_mask */ ++ false), /* pcrel_offset */ ++ ++ /* Computes a dtv-relative displacement, the difference between the value ++ of sym+add and the base address of the thread-local storage block that ++ contains the definition of sym, minus 0x8000. Used for initializing GOT */ ++ HOWTO (R_MICROBLAZE_TLSDTPREL32, ++ 0, /* rightshift */ ++ 4, /* size */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_MICROBLAZE_TLSDTPREL32", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ 0x0000ffff, /* dst_mask */ ++ false), /* pcrel_offset */ ++ ++ /* Computes a dtv-relative displacement, the difference between the value ++ of sym+add and the base address of the thread-local storage block that ++ contains the definition of sym, minus 0x8000. */ ++ HOWTO (R_MICROBLAZE_TLSDTPREL64, ++ 0, /* rightshift */ ++ 4, /* size */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_MICROBLAZE_TLSDTPREL64", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ 0x0000ffff, /* dst_mask */ ++ false), /* pcrel_offset */ ++ ++ /* Computes a tp-relative displacement, the difference between the value of ++ sym+add and the value of the thread pointer (r13). */ ++ HOWTO (R_MICROBLAZE_TLSGOTTPREL32, ++ 0, /* rightshift */ ++ 4, /* size */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_MICROBLAZE_TLSGOTTPREL32", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ 0x0000ffff, /* dst_mask */ ++ false), /* pcrel_offset */ ++ ++ /* Computes a tp-relative displacement, the difference between the value of ++ sym+add and the value of the thread pointer (r13). */ ++ HOWTO (R_MICROBLAZE_TLSTPREL32, ++ 0, /* rightshift */ ++ 4, /* size */ ++ 32, /* bitsize */ ++ false, /* pc_relative */ ++ 0, /* bitpos */ ++ complain_overflow_dont, /* complain_on_overflow */ ++ bfd_elf_generic_reloc, /* special_function */ ++ "R_MICROBLAZE_TLSTPREL32", /* name */ ++ false, /* partial_inplace */ ++ 0, /* src_mask */ ++ 0x0000ffff, /* dst_mask */ ++ false), /* pcrel_offset */ ++ ++}; ++ ++#ifndef NUM_ELEM ++#define NUM_ELEM(a) (sizeof (a) / sizeof (a)[0]) ++#endif ++ ++/* Initialize the microblaze_elf_howto_table, so that linear accesses can be done. */ ++ ++static void ++microblaze_elf_howto_init (void) ++{ ++ unsigned int i; ++ ++ for (i = NUM_ELEM (microblaze_elf_howto_raw); i--;) ++ { ++ unsigned int type; ++ ++ type = microblaze_elf_howto_raw[i].type; ++ ++ BFD_ASSERT (type < NUM_ELEM (microblaze_elf_howto_table)); ++ ++ microblaze_elf_howto_table [type] = & microblaze_elf_howto_raw [i]; ++ } ++} ++ ++static reloc_howto_type * ++microblaze_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, ++ bfd_reloc_code_real_type code) ++{ ++ enum elf_microblaze_reloc_type microblaze_reloc = R_MICROBLAZE_NONE; ++ ++ switch (code) ++ { ++ case BFD_RELOC_NONE: ++ microblaze_reloc = R_MICROBLAZE_NONE; ++ break; ++ case BFD_RELOC_MICROBLAZE_32_NONE: ++ microblaze_reloc = R_MICROBLAZE_32_NONE; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_NONE: ++ microblaze_reloc = R_MICROBLAZE_64_NONE; ++ break; ++ case BFD_RELOC_32: ++ microblaze_reloc = R_MICROBLAZE_32; ++ break; ++ /* RVA is treated the same as 64 */ ++ case BFD_RELOC_RVA: ++ microblaze_reloc = R_MICROBLAZE_IMML_64; ++ break; ++ case BFD_RELOC_32_PCREL: ++ microblaze_reloc = R_MICROBLAZE_32_PCREL; ++ break; ++ case BFD_RELOC_64_PCREL: ++ microblaze_reloc = R_MICROBLAZE_64_PCREL; ++ break; ++ case BFD_RELOC_MICROBLAZE_32_LO_PCREL: ++ microblaze_reloc = R_MICROBLAZE_32_PCREL_LO; ++ break; ++ case BFD_RELOC_64: ++ microblaze_reloc = R_MICROBLAZE_64; ++ break; ++ case BFD_RELOC_MICROBLAZE_32_LO: ++ microblaze_reloc = R_MICROBLAZE_32_LO; ++ break; ++ case BFD_RELOC_MICROBLAZE_32_ROSDA: ++ microblaze_reloc = R_MICROBLAZE_SRO32; ++ break; ++ case BFD_RELOC_MICROBLAZE_32_RWSDA: ++ microblaze_reloc = R_MICROBLAZE_SRW32; ++ break; ++ case BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM: ++ microblaze_reloc = R_MICROBLAZE_32_SYM_OP_SYM; ++ break; ++ case BFD_RELOC_VTABLE_INHERIT: ++ microblaze_reloc = R_MICROBLAZE_GNU_VTINHERIT; ++ break; ++ case BFD_RELOC_VTABLE_ENTRY: ++ microblaze_reloc = R_MICROBLAZE_GNU_VTENTRY; ++ break; ++ case BFD_RELOC_MICROBLAZE_EA64: ++ microblaze_reloc = R_MICROBLAZE_IMML_64; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_GOTPC: ++ microblaze_reloc = R_MICROBLAZE_GOTPC_64; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_GPC: ++ microblaze_reloc = R_MICROBLAZE_GPC_64; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_GOT: ++ microblaze_reloc = R_MICROBLAZE_GOT_64; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_TEXTPCREL: ++ microblaze_reloc = R_MICROBLAZE_TEXTPCREL_64; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_TEXTREL: ++ microblaze_reloc = R_MICROBLAZE_TEXTREL_64; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_PLT: ++ microblaze_reloc = R_MICROBLAZE_PLT_64; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_GOTOFF: ++ microblaze_reloc = R_MICROBLAZE_GOTOFF_64; ++ break; ++ case BFD_RELOC_MICROBLAZE_32_GOTOFF: ++ microblaze_reloc = R_MICROBLAZE_GOTOFF_32; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_TLSGD: ++ microblaze_reloc = R_MICROBLAZE_TLSGD; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_TLSLD: ++ microblaze_reloc = R_MICROBLAZE_TLSLD; ++ break; ++ case BFD_RELOC_MICROBLAZE_32_TLSDTPREL: ++ microblaze_reloc = R_MICROBLAZE_TLSDTPREL32; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_TLSDTPREL: ++ microblaze_reloc = R_MICROBLAZE_TLSDTPREL64; ++ break; ++ case BFD_RELOC_MICROBLAZE_32_TLSDTPMOD: ++ microblaze_reloc = R_MICROBLAZE_TLSDTPMOD32; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL: ++ microblaze_reloc = R_MICROBLAZE_TLSGOTTPREL32; ++ break; ++ case BFD_RELOC_MICROBLAZE_64_TLSTPREL: ++ microblaze_reloc = R_MICROBLAZE_TLSTPREL32; ++ break; ++ case BFD_RELOC_MICROBLAZE_COPY: ++ microblaze_reloc = R_MICROBLAZE_COPY; ++ break; ++ default: ++ return (reloc_howto_type *) NULL; ++ } ++ ++ if (!microblaze_elf_howto_table [R_MICROBLAZE_32]) ++ /* Initialize howto table if needed. */ ++ microblaze_elf_howto_init (); ++ ++ return microblaze_elf_howto_table [(int) microblaze_reloc]; ++}; ++ ++static reloc_howto_type * ++microblaze_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, ++ const char *r_name) ++{ ++ unsigned int i; ++ ++ for (i = 0; i < NUM_ELEM (microblaze_elf_howto_raw); i++) ++ if (microblaze_elf_howto_raw[i].name != NULL ++ && strcasecmp (microblaze_elf_howto_raw[i].name, r_name) == 0) ++ return µblaze_elf_howto_raw[i]; ++ ++ return NULL; ++} ++ ++/* Set the howto pointer for a RCE ELF reloc. */ ++ ++static bool ++microblaze_elf_info_to_howto (bfd * abfd, ++ arelent * cache_ptr, ++ Elf_Internal_Rela * dst) ++{ ++ unsigned int r_type; ++ ++ if (!microblaze_elf_howto_table [R_MICROBLAZE_32]) ++ /* Initialize howto table if needed. */ ++ microblaze_elf_howto_init (); ++ ++ r_type = ELF64_R_TYPE (dst->r_info); ++ if (r_type >= R_MICROBLAZE_max) ++ { ++ /* xgettext:c-format */ ++ _bfd_error_handler (_("%pB: unsupported relocation type %#x"), ++ abfd, r_type); ++ bfd_set_error (bfd_error_bad_value); ++ return false; ++ } ++ ++ cache_ptr->howto = microblaze_elf_howto_table [r_type]; ++ return true; ++} ++ ++struct _microblaze_elf_section_data ++{ ++ struct bfd_elf_section_data elf; ++ /* Count of used relaxation table entries. */ ++ size_t relax_count; ++ /* Relaxation table. */ ++ struct relax_table *relax; ++}; ++ ++#define microblaze_elf_section_data(sec) \ ++ ((struct _microblaze_elf_section_data *) elf_section_data (sec)) ++ ++static bool ++microblaze_elf_new_section_hook (bfd *abfd, asection *sec) ++{ ++ if (!sec->used_by_bfd) ++ { ++ struct _microblaze_elf_section_data *sdata; ++ size_t amt = sizeof (*sdata); ++ ++ sdata = bfd_zalloc (abfd, amt); ++ if (sdata == NULL) ++ return false; ++ sec->used_by_bfd = sdata; ++ } ++ ++ return _bfd_elf_new_section_hook (abfd, sec); ++} ++ ++/* Microblaze ELF local labels start with 'L.' or '$L', not '.L'. */ ++ ++static bool ++microblaze_elf_is_local_label_name (bfd *abfd, const char *name) ++{ ++ if (name[0] == 'L' && name[1] == '.') ++ return true; ++ ++ if (name[0] == '$' && name[1] == 'L') ++ return true; ++ ++ /* With gcc, the labels go back to starting with '.', so we accept ++ the generic ELF local label syntax as well. */ ++ return _bfd_elf_is_local_label_name (abfd, name); ++} ++ ++/* The microblaze linker (like many others) needs to keep track of ++ the number of relocs that it decides to copy as dynamic relocs in ++ check_relocs for each symbol. This is so that it can later discard ++ them if they are found to be unnecessary. We store the information ++ in a field extending the regular ELF linker hash table. */ ++ ++struct elf64_mb_dyn_relocs ++{ ++ struct elf64_mb_dyn_relocs *next; ++ ++ /* The input section of the reloc. */ ++ asection *sec; ++ ++ /* Total number of relocs copied for the input section. */ ++ bfd_size_type count; ++ ++ /* Number of pc-relative relocs copied for the input section. */ ++ bfd_size_type pc_count; ++}; ++ ++/* ELF linker hash entry. */ ++ ++struct elf64_mb_link_hash_entry ++{ ++ struct elf_link_hash_entry elf; ++ ++ /* Track dynamic relocs copied for this symbol. */ ++ struct elf64_mb_dyn_relocs *dyn_relocs; ++ ++ /* TLS Reference Types for the symbol; Updated by check_relocs */ ++#define TLS_GD 1 /* GD reloc. */ ++#define TLS_LD 2 /* LD reloc. */ ++#define TLS_TPREL 4 /* TPREL reloc, => IE. */ ++#define TLS_DTPREL 8 /* DTPREL reloc, => LD. */ ++#define TLS_TLS 16 /* Any TLS reloc. */ ++ unsigned char tls_mask; ++ ++}; ++ ++#define IS_TLS_GD(x) (x == (TLS_TLS | TLS_GD)) ++#define IS_TLS_LD(x) (x == (TLS_TLS | TLS_LD)) ++#define IS_TLS_DTPREL(x) (x == (TLS_TLS | TLS_DTPREL)) ++#define IS_TLS_NONE(x) (x == 0) ++ ++#define elf64_mb_hash_entry(ent) ((struct elf64_mb_link_hash_entry *)(ent)) ++ ++/* ELF linker hash table. */ ++ ++struct elf64_mb_link_hash_table ++{ ++ struct elf_link_hash_table elf; ++ ++ /* Short-cuts to get to dynamic linker sections. */ ++ asection *sgot; ++ asection *sgotplt; ++ asection *srelgot; ++ asection *splt; ++ asection *srelplt; ++ asection *sdynbss; ++ asection *srelbss; ++ ++ /* Small local sym to section mapping cache. */ ++ struct sym_cache sym_sec; ++ ++ /* TLS Local Dynamic GOT Entry */ ++ union { ++ bfd_signed_vma refcount; ++ bfd_vma offset; ++ } tlsld_got; ++}; ++ ++/* Nonzero if this section has TLS related relocations. */ ++#define has_tls_reloc sec_flg0 ++ ++/* Get the ELF linker hash table from a link_info structure. */ ++ ++#define elf64_mb_hash_table(p) \ ++ ((is_elf_hash_table ((p)->hash) \ ++ && elf_hash_table_id (elf_hash_table (p)) == MICROBLAZE_ELF_DATA) \ ++ ? (struct elf64_mb_link_hash_table *) (p)->hash : NULL) ++ ++/* Create an entry in a microblaze ELF linker hash table. */ ++ ++static struct bfd_hash_entry * ++link_hash_newfunc (struct bfd_hash_entry *entry, ++ struct bfd_hash_table *table, ++ const char *string) ++{ ++ /* Allocate the structure if it has not already been allocated by a ++ subclass. */ ++ if (entry == NULL) ++ { ++ entry = bfd_hash_allocate (table, ++ sizeof (struct elf64_mb_link_hash_entry)); ++ if (entry == NULL) ++ return entry; ++ } ++ ++ /* Call the allocation method of the superclass. */ ++ entry = _bfd_elf_link_hash_newfunc (entry, table, string); ++ if (entry != NULL) ++ { ++ struct elf64_mb_link_hash_entry *eh; ++ ++ eh = (struct elf64_mb_link_hash_entry *) entry; ++ eh->tls_mask = 0; ++ } ++ ++ return entry; ++} ++ ++/* Create a mb ELF linker hash table. */ ++ ++static struct bfd_link_hash_table * ++microblaze_elf_link_hash_table_create (bfd *abfd) ++{ ++ struct elf64_mb_link_hash_table *ret; ++ size_t amt = sizeof (struct elf64_mb_link_hash_table); ++ ++ ret = (struct elf64_mb_link_hash_table *) bfd_zmalloc (amt); ++ if (ret == NULL) ++ return NULL; ++ ++ if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd, link_hash_newfunc, ++ sizeof (struct elf64_mb_link_hash_entry), ++ MICROBLAZE_ELF_DATA)) ++ { ++ free (ret); ++ return NULL; ++ } ++ ++ return &ret->elf.root; ++} ++ ++/* Set the values of the small data pointers. */ ++ ++static void ++microblaze_elf_final_sdp (struct bfd_link_info *info) ++{ ++ struct bfd_link_hash_entry *h; ++ ++ h = bfd_link_hash_lookup (info->hash, RO_SDA_ANCHOR_NAME, false, false, true); ++ if (h != (struct bfd_link_hash_entry *) NULL ++ && h->type == bfd_link_hash_defined) ++ ro_small_data_pointer = (h->u.def.value ++ + h->u.def.section->output_section->vma ++ + h->u.def.section->output_offset); ++ ++ h = bfd_link_hash_lookup (info->hash, RW_SDA_ANCHOR_NAME, false, false, true); ++ if (h != (struct bfd_link_hash_entry *) NULL ++ && h->type == bfd_link_hash_defined) ++ rw_small_data_pointer = (h->u.def.value ++ + h->u.def.section->output_section->vma ++ + h->u.def.section->output_offset); ++} ++ ++static bfd_vma ++dtprel_base (struct bfd_link_info *info) ++{ ++ /* If tls_sec is NULL, we should have signalled an error already. */ ++ if (elf_hash_table (info)->tls_sec == NULL) ++ return 0; ++ return elf_hash_table (info)->tls_sec->vma; ++} ++ ++/* The size of the thread control block. */ ++#define TCB_SIZE 8 ++ ++/* Output a simple dynamic relocation into SRELOC. */ ++ ++static void ++microblaze_elf_output_dynamic_relocation (bfd *output_bfd, ++ asection *sreloc, ++ unsigned long reloc_index, ++ unsigned long indx, ++ int r_type, ++ bfd_vma offset, ++ bfd_vma addend) ++{ ++ ++ Elf_Internal_Rela rel; ++ ++ rel.r_info = ELF64_R_INFO (indx, r_type); ++ rel.r_offset = offset; ++ rel.r_addend = addend; ++ ++ bfd_elf64_swap_reloca_out (output_bfd, &rel, ++ (sreloc->contents + reloc_index * sizeof (Elf64_External_Rela))); ++} ++ ++/* This code is taken from elf64-m32r.c ++ There is some attempt to make this function usable for many architectures, ++ both USE_REL and USE_RELA ['twould be nice if such a critter existed], ++ if only to serve as a learning tool. ++ ++ The RELOCATE_SECTION function is called by the new ELF backend linker ++ to handle the relocations for a section. ++ ++ The relocs are always passed as Rela structures; if the section ++ actually uses Rel structures, the r_addend field will always be ++ zero. ++ ++ This function is responsible for adjust the section contents as ++ necessary, and (if using Rela relocs and generating a ++ relocatable output file) adjusting the reloc addend as ++ necessary. ++ ++ This function does not have to worry about setting the reloc ++ address or the reloc symbol index. ++ ++ LOCAL_SYMS is a pointer to the swapped in local symbols. ++ ++ LOCAL_SECTIONS is an array giving the section in the input file ++ corresponding to the st_shndx field of each local symbol. ++ ++ The global hash table entry for the global symbols can be found ++ via elf_sym_hashes (input_bfd). ++ ++ When generating relocatable output, this function must handle ++ STB_LOCAL/STT_SECTION symbols specially. The output symbol is ++ going to be the section symbol corresponding to the output ++ section, which means that the addend must be adjusted ++ accordingly. */ ++ ++static int ++microblaze_elf_relocate_section (bfd *output_bfd, ++ struct bfd_link_info *info, ++ bfd *input_bfd, ++ asection *input_section, ++ bfd_byte *contents, ++ Elf_Internal_Rela *relocs, ++ Elf_Internal_Sym *local_syms, ++ asection **local_sections) ++{ ++ struct elf64_mb_link_hash_table *htab; ++ Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; ++ struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd); ++ Elf_Internal_Rela *rel, *relend; ++ int endian = (bfd_little_endian (output_bfd)) ? 0 : 2; ++ /* Assume success. */ ++ bool ret = true; ++ asection *sreloc; ++ bfd_vma *local_got_offsets; ++ unsigned int tls_type; ++ ++ if (!microblaze_elf_howto_table[R_MICROBLAZE_max-1]) ++ microblaze_elf_howto_init (); ++ ++ htab = elf64_mb_hash_table (info); ++ if (htab == NULL) ++ return false; ++ ++ local_got_offsets = elf_local_got_offsets (input_bfd); ++ ++ sreloc = elf_section_data (input_section)->sreloc; ++ ++ rel = relocs; ++ relend = relocs + input_section->reloc_count; ++ for (; rel < relend; rel++) ++ { ++ int r_type; ++ reloc_howto_type *howto; ++ unsigned long r_symndx; ++ bfd_vma addend = rel->r_addend; ++ bfd_vma offset = rel->r_offset; ++ struct elf_link_hash_entry *h; ++ Elf_Internal_Sym *sym; ++ asection *sec; ++ const char *sym_name; ++ bfd_reloc_status_type r = bfd_reloc_ok; ++ const char *errmsg = NULL; ++ bool unresolved_reloc = false; ++ ++ h = NULL; ++ r_type = ELF64_R_TYPE (rel->r_info); ++ tls_type = 0; ++ ++ if (r_type < 0 || r_type >= (int) R_MICROBLAZE_max) ++ { ++ /* xgettext:c-format */ ++ _bfd_error_handler (_("%pB: unsupported relocation type %#x"), ++ input_bfd, (int) r_type); ++ bfd_set_error (bfd_error_bad_value); ++ ret = false; ++ continue; ++ } ++ ++ howto = microblaze_elf_howto_table[r_type]; ++ r_symndx = ELF64_R_SYM (rel->r_info); ++ ++ if (bfd_link_relocatable (info)) ++ { ++ /* This is a relocatable link. We don't have to change ++ anything, unless the reloc is against a section symbol, ++ in which case we have to adjust according to where the ++ section symbol winds up in the output section. */ ++ sec = NULL; ++ if (r_symndx >= symtab_hdr->sh_info) ++ /* External symbol. */ ++ continue; ++ ++ /* Local symbol. */ ++ sym = local_syms + r_symndx; ++ sym_name = ""; ++ /* STT_SECTION: symbol is associated with a section. */ ++ if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) ++ /* Symbol isn't associated with a section. Nothing to do. */ ++ continue; ++ ++ sec = local_sections[r_symndx]; ++ addend += sec->output_offset + sym->st_value; ++#ifndef USE_REL ++ /* This can't be done for USE_REL because it doesn't mean anything ++ and elf_link_input_bfd asserts this stays zero. */ ++ /* rel->r_addend = addend; */ ++#endif ++ ++#ifndef USE_REL ++ /* Addends are stored with relocs. We're done. */ ++ continue; ++#else /* USE_REL */ ++ /* If partial_inplace, we need to store any additional addend ++ back in the section. */ ++ if (!howto->partial_inplace) ++ continue; ++ /* ??? Here is a nice place to call a special_function like handler. */ ++ r = _bfd_relocate_contents (howto, input_bfd, addend, ++ contents + offset); ++#endif /* USE_REL */ ++ } ++ else ++ { ++ bfd_vma relocation; ++ bool resolved_to_zero; ++ ++ /* This is a final link. */ ++ sym = NULL; ++ sec = NULL; ++ unresolved_reloc = false; ++ ++ if (r_symndx < symtab_hdr->sh_info) ++ { ++ /* Local symbol. */ ++ sym = local_syms + r_symndx; ++ sec = local_sections[r_symndx]; ++ if (sec == 0) ++ continue; ++ sym_name = ""; ++ relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); ++ /* r_addend may have changed if the reference section was ++ a merge section. */ ++ addend = rel->r_addend; ++ } ++ else ++ { ++ /* External symbol. */ ++ bool warned ATTRIBUTE_UNUSED; ++ bool ignored ATTRIBUTE_UNUSED; ++ ++ RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, ++ r_symndx, symtab_hdr, sym_hashes, ++ h, sec, relocation, ++ unresolved_reloc, warned, ignored); ++ sym_name = h->root.root.string; ++ } ++ ++ /* Sanity check the address. */ ++ if (offset > bfd_get_section_limit (input_bfd, input_section)) ++ { ++ r = bfd_reloc_outofrange; ++ goto check_reloc; ++ } ++ ++ resolved_to_zero = (h != NULL ++ && UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)); ++ ++ switch ((int) r_type) ++ { ++ case (int) R_MICROBLAZE_SRO32 : ++ { ++ const char *name; ++ ++ /* Only relocate if the symbol is defined. */ ++ if (sec) ++ { ++ name = bfd_section_name (sec); ++ ++ if (strcmp (name, ".sdata2") == 0 ++ || strcmp (name, ".sbss2") == 0) ++ { ++ if (ro_small_data_pointer == 0) ++ microblaze_elf_final_sdp (info); ++ if (ro_small_data_pointer == 0) ++ { ++ ret = false; ++ r = bfd_reloc_undefined; ++ goto check_reloc; ++ } ++ ++ /* At this point `relocation' contains the object's ++ address. */ ++ relocation -= ro_small_data_pointer; ++ /* Now it contains the offset from _SDA2_BASE_. */ ++ r = _bfd_final_link_relocate (howto, input_bfd, ++ input_section, ++ contents, offset, ++ relocation, addend); ++ } ++ else ++ { ++ _bfd_error_handler ++ /* xgettext:c-format */ ++ (_("%pB: the target (%s) of an %s relocation" ++ " is in the wrong section (%pA)"), ++ input_bfd, ++ sym_name, ++ microblaze_elf_howto_table[(int) r_type]->name, ++ sec); ++ /*bfd_set_error (bfd_error_bad_value); ??? why? */ ++ ret = false; ++ continue; ++ } ++ } ++ } ++ break; ++ ++ case (int) R_MICROBLAZE_SRW32 : ++ { ++ const char *name; ++ ++ /* Only relocate if the symbol is defined. */ ++ if (sec) ++ { ++ name = bfd_section_name (sec); ++ ++ if (strcmp (name, ".sdata") == 0 ++ || strcmp (name, ".sbss") == 0) ++ { ++ if (rw_small_data_pointer == 0) ++ microblaze_elf_final_sdp (info); ++ if (rw_small_data_pointer == 0) ++ { ++ ret = false; ++ r = bfd_reloc_undefined; ++ goto check_reloc; ++ } ++ ++ /* At this point `relocation' contains the object's ++ address. */ ++ relocation -= rw_small_data_pointer; ++ /* Now it contains the offset from _SDA_BASE_. */ ++ r = _bfd_final_link_relocate (howto, input_bfd, ++ input_section, ++ contents, offset, ++ relocation, addend); ++ } ++ else ++ { ++ _bfd_error_handler ++ /* xgettext:c-format */ ++ (_("%pB: the target (%s) of an %s relocation" ++ " is in the wrong section (%pA)"), ++ input_bfd, ++ sym_name, ++ microblaze_elf_howto_table[(int) r_type]->name, ++ sec); ++ /*bfd_set_error (bfd_error_bad_value); ??? why? */ ++ ret = false; ++ continue; ++ } ++ } ++ } ++ break; ++ ++ case (int) R_MICROBLAZE_32_SYM_OP_SYM: ++ break; /* Do nothing. */ ++ ++ case (int) R_MICROBLAZE_GOTPC_64: ++ relocation = (htab->elf.sgotplt->output_section->vma ++ + htab->elf.sgotplt->output_offset); ++ relocation -= (input_section->output_section->vma ++ + input_section->output_offset ++ + offset + INST_WORD_SIZE); ++ relocation += addend; ++ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, ++ contents + offset + endian); ++ bfd_put_16 (input_bfd, relocation & 0xffff, ++ contents + offset + endian + INST_WORD_SIZE); ++ break; ++ ++ case (int) R_MICROBLAZE_TEXTPCREL_64: ++ relocation = input_section->output_section->vma; ++ relocation -= (input_section->output_section->vma ++ + input_section->output_offset ++ + offset + INST_WORD_SIZE); ++ relocation += addend; ++ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, ++ contents + offset + endian); ++ bfd_put_16 (input_bfd, relocation & 0xffff, ++ contents + offset + endian + INST_WORD_SIZE); ++ break; ++ ++ case (int) R_MICROBLAZE_PLT_64: ++ { ++ bfd_vma immediate; ++ if (htab->elf.splt != NULL && h != NULL ++ && h->plt.offset != (bfd_vma) -1) ++ { ++ relocation = (htab->elf.splt->output_section->vma ++ + htab->elf.splt->output_offset ++ + h->plt.offset); ++ unresolved_reloc = false; ++ immediate = relocation - (input_section->output_section->vma ++ + input_section->output_offset ++ + offset + INST_WORD_SIZE); ++ bfd_put_16 (input_bfd, (immediate >> 16) & 0xffff, ++ contents + offset + endian); ++ bfd_put_16 (input_bfd, immediate & 0xffff, ++ contents + offset + endian + INST_WORD_SIZE); ++ } ++ else ++ { ++ relocation -= (input_section->output_section->vma ++ + input_section->output_offset ++ + offset + INST_WORD_SIZE); ++ immediate = relocation; ++ bfd_put_16 (input_bfd, (immediate >> 16) & 0xffff, ++ contents + offset + endian); ++ bfd_put_16 (input_bfd, immediate & 0xffff, ++ contents + offset + endian + INST_WORD_SIZE); ++ } ++ break; ++ } ++ ++ case (int) R_MICROBLAZE_TLSGD: ++ tls_type = (TLS_TLS | TLS_GD); ++ goto dogot; ++ case (int) R_MICROBLAZE_TLSLD: ++ tls_type = (TLS_TLS | TLS_LD); ++ /* Fall through. */ ++ dogot: ++ case (int) R_MICROBLAZE_GOT_64: ++ { ++ bfd_vma *offp; ++ bfd_vma off, off2; ++ unsigned long indx; ++ bfd_vma static_value; ++ ++ bool need_relocs = false; ++ if (htab->elf.sgot == NULL) ++ abort (); ++ ++ indx = 0; ++ offp = NULL; ++ ++ /* 1. Identify GOT Offset; ++ 2. Compute Static Values ++ 3. Process Module Id, Process Offset ++ 4. Fixup Relocation with GOT offset value. */ ++ ++ /* 1. Determine GOT Offset to use : TLS_LD, global, local */ ++ if (IS_TLS_LD (tls_type)) ++ offp = &htab->tlsld_got.offset; ++ else if (h != NULL) ++ { ++ if (htab->elf.sgotplt != NULL ++ && h->got.offset != (bfd_vma) -1) ++ offp = &h->got.offset; ++ else ++ abort (); ++ } ++ else ++ { ++ if (local_got_offsets == NULL) ++ abort (); ++ offp = &local_got_offsets[r_symndx]; ++ } ++ ++ if (!offp) ++ abort (); ++ ++ off = (*offp) & ~1; ++ off2 = off; ++ ++ if (IS_TLS_LD(tls_type) || IS_TLS_GD(tls_type)) ++ off2 = off + 4; ++ ++ /* Symbol index to use for relocs */ ++ if (h != NULL) ++ { ++ bool dyn = ++ elf_hash_table (info)->dynamic_sections_created; ++ ++ if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, ++ bfd_link_pic (info), ++ h) ++ && (!bfd_link_pic (info) ++ || !SYMBOL_REFERENCES_LOCAL (info, h))) ++ indx = h->dynindx; ++ } ++ ++ /* Need to generate relocs ? */ ++ if ((bfd_link_pic (info) || indx != 0) ++ && (h == NULL ++ || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT ++ || h->root.type != bfd_link_hash_undefweak)) ++ need_relocs = true; ++ ++ /* 2. Compute/Emit Static value of r-expression */ ++ static_value = relocation + addend; ++ ++ /* 3. Process module-id and offset */ ++ if (! ((*offp) & 1) ) ++ { ++ bfd_vma got_offset; ++ ++ got_offset = (htab->elf.sgot->output_section->vma ++ + htab->elf.sgot->output_offset ++ + off); ++ ++ /* Process module-id */ ++ if (IS_TLS_LD(tls_type)) ++ { ++ if (! bfd_link_pic (info)) ++ bfd_put_32 (output_bfd, 1, ++ htab->elf.sgot->contents + off); ++ else ++ microblaze_elf_output_dynamic_relocation ++ (output_bfd, ++ htab->elf.srelgot, ++ htab->elf.srelgot->reloc_count++, ++ /* symindex= */ 0, R_MICROBLAZE_TLSDTPMOD32, ++ got_offset, 0); ++ } ++ else if (IS_TLS_GD(tls_type)) ++ { ++ if (! need_relocs) ++ bfd_put_32 (output_bfd, 1, ++ htab->elf.sgot->contents + off); ++ else ++ microblaze_elf_output_dynamic_relocation ++ (output_bfd, ++ htab->elf.srelgot, ++ htab->elf.srelgot->reloc_count++, ++ /* symindex= */ indx, R_MICROBLAZE_TLSDTPMOD32, ++ got_offset, indx ? 0 : static_value); ++ } ++ ++ /* Process Offset */ ++ if (htab->elf.srelgot == NULL) ++ abort (); ++ ++ got_offset = (htab->elf.sgot->output_section->vma ++ + htab->elf.sgot->output_offset ++ + off2); ++ if (IS_TLS_LD(tls_type)) ++ { ++ /* For LD, offset should be 0 */ ++ *offp |= 1; ++ bfd_put_32 (output_bfd, 0, ++ htab->elf.sgot->contents + off2); ++ } ++ else if (IS_TLS_GD(tls_type)) ++ { ++ *offp |= 1; ++ static_value -= dtprel_base(info); ++ if (need_relocs) ++ microblaze_elf_output_dynamic_relocation ++ (output_bfd, ++ htab->elf.srelgot, ++ htab->elf.srelgot->reloc_count++, ++ /* symindex= */ indx, R_MICROBLAZE_TLSDTPREL32, ++ got_offset, indx ? 0 : static_value); ++ else ++ bfd_put_32 (output_bfd, static_value, ++ htab->elf.sgot->contents + off2); ++ } ++ else ++ { ++ bfd_put_32 (output_bfd, static_value, ++ htab->elf.sgot->contents + off2); ++ ++ /* Relocs for dyn symbols generated by ++ finish_dynamic_symbols */ ++ if (bfd_link_pic (info) && h == NULL) ++ { ++ *offp |= 1; ++ microblaze_elf_output_dynamic_relocation ++ (output_bfd, ++ htab->elf.srelgot, ++ htab->elf.srelgot->reloc_count++, ++ /* symindex= */ indx, R_MICROBLAZE_REL, ++ got_offset, static_value); ++ } ++ } ++ } ++ ++ /* 4. Fixup Relocation with GOT offset value ++ Compute relative address of GOT entry for applying ++ the current relocation */ ++ relocation = htab->elf.sgot->output_section->vma ++ + htab->elf.sgot->output_offset ++ + off ++ - htab->elf.sgotplt->output_section->vma ++ - htab->elf.sgotplt->output_offset; ++ ++ /* Apply Current Relocation */ ++ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, ++ contents + offset + endian); ++ bfd_put_16 (input_bfd, relocation & 0xffff, ++ contents + offset + endian + INST_WORD_SIZE); ++ ++ unresolved_reloc = false; ++ break; ++ } ++ ++ case (int) R_MICROBLAZE_GOTOFF_64: ++ { ++ bfd_vma immediate; ++ unsigned short lo, high; ++ relocation += addend; ++ relocation -= (htab->elf.sgotplt->output_section->vma ++ + htab->elf.sgotplt->output_offset); ++ /* Write this value into correct location. */ ++ immediate = relocation; ++ lo = immediate & 0x0000ffff; ++ high = (immediate >> 16) & 0x0000ffff; ++ bfd_put_16 (input_bfd, high, contents + offset + endian); ++ bfd_put_16 (input_bfd, lo, ++ contents + offset + INST_WORD_SIZE + endian); ++ break; ++ } ++ ++ case (int) R_MICROBLAZE_GOTOFF_32: ++ { ++ relocation += addend; ++ relocation -= (htab->elf.sgotplt->output_section->vma ++ + htab->elf.sgotplt->output_offset); ++ /* Write this value into correct location. */ ++ bfd_put_32 (input_bfd, relocation, contents + offset); ++ break; ++ } ++ ++ case (int) R_MICROBLAZE_TLSDTPREL64: ++ relocation += addend; ++ relocation -= dtprel_base(info); ++ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, ++ contents + offset + endian); ++ bfd_put_16 (input_bfd, relocation & 0xffff, ++ contents + offset + endian + INST_WORD_SIZE); ++ break; ++ case (int) R_MICROBLAZE_TEXTREL_64: ++ case (int) R_MICROBLAZE_TEXTREL_32_LO: ++ case (int) R_MICROBLAZE_64_PCREL : ++ case (int) R_MICROBLAZE_64: ++ case (int) R_MICROBLAZE_32: ++ case (int) R_MICROBLAZE_IMML_64: ++ { ++ /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols ++ from removed linkonce sections, or sections discarded by ++ a linker script. */ ++ if (r_symndx == STN_UNDEF || (input_section->flags & SEC_ALLOC) == 0) ++ { ++ relocation += addend; ++ if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64) ++ bfd_put_32 (input_bfd, relocation, contents + offset); ++ else if (r_type == R_MICROBLAZE_IMML_64) ++ bfd_put_64 (input_bfd, relocation, contents + offset); ++ else ++ { ++ if (r_type == R_MICROBLAZE_64_PCREL) ++ relocation -= (input_section->output_section->vma ++ + input_section->output_offset ++ + offset + INST_WORD_SIZE); ++ else if (r_type == R_MICROBLAZE_TEXTREL_64 ++ || r_type == R_MICROBLAZE_TEXTREL_32_LO) ++ relocation -= input_section->output_section->vma; ++ ++ if (r_type == R_MICROBLAZE_TEXTREL_32_LO) ++ bfd_put_16 (input_bfd, relocation & 0xffff, ++ contents + offset + endian); ++ ++ unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); ++ if ((insn & 0xff000000) == 0xb2000000) ++ { ++ insn &= ~0x00ffffff; ++ insn |= (relocation >> 16) & 0xffffff; ++ bfd_put_32 (input_bfd, insn, ++ contents + offset + endian); ++ } ++ else ++ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, ++ contents + offset + endian); ++ bfd_put_16 (input_bfd, relocation & 0xffff, ++ contents + offset + endian + INST_WORD_SIZE); ++ } ++ break; ++ } ++ ++ if ((bfd_link_pic (info) ++ && (h == NULL ++ || (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT ++ && !resolved_to_zero) ++ || h->root.type != bfd_link_hash_undefweak) ++ && (!howto->pc_relative ++ || (h != NULL ++ && h->dynindx != -1 ++ && (!info->symbolic ++ || !h->def_regular)))) ++ || (!bfd_link_pic (info) ++ && h != NULL ++ && h->dynindx != -1 ++ && !h->non_got_ref ++ && ((h->def_dynamic ++ && !h->def_regular) ++ || h->root.type == bfd_link_hash_undefweak ++ || h->root.type == bfd_link_hash_undefined))) ++ { ++ Elf_Internal_Rela outrel; ++ bfd_byte *loc; ++ bool skip; ++ ++ /* When generating a shared object, these relocations ++ are copied into the output file to be resolved at run ++ time. */ ++ ++ BFD_ASSERT (sreloc != NULL); ++ ++ skip = false; ++ ++ outrel.r_offset = ++ _bfd_elf_section_offset (output_bfd, info, input_section, ++ rel->r_offset); ++ if (outrel.r_offset == (bfd_vma) -1) ++ skip = true; ++ else if (outrel.r_offset == (bfd_vma) -2) ++ skip = true; ++ outrel.r_offset += (input_section->output_section->vma ++ + input_section->output_offset); ++ ++ if (skip) ++ memset (&outrel, 0, sizeof outrel); ++ /* h->dynindx may be -1 if the symbol was marked to ++ become local. */ ++ else if (h != NULL ++ && ((! info->symbolic && h->dynindx != -1) ++ || !h->def_regular)) ++ { ++ BFD_ASSERT (h->dynindx != -1); ++ outrel.r_info = ELF64_R_INFO (h->dynindx, r_type); ++ outrel.r_addend = addend; ++ } ++ else ++ { ++ if (r_type == R_MICROBLAZE_32 || r_type == R_MICROBLAZE_IMML_64) ++ { ++ outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL); ++ outrel.r_addend = relocation + addend; ++ } ++ else ++ { ++ BFD_FAIL (); ++ _bfd_error_handler ++ (_("%pB: probably compiled without -fPIC?"), ++ input_bfd); ++ bfd_set_error (bfd_error_bad_value); ++ return false; ++ } ++ } ++ ++ loc = sreloc->contents; ++ loc += sreloc->reloc_count++ * sizeof (Elf64_External_Rela); ++ bfd_elf64_swap_reloca_out (output_bfd, &outrel, loc); ++ break; ++ } ++ else ++ { ++ relocation += addend; ++ if (r_type == R_MICROBLAZE_32) ++ bfd_put_32 (input_bfd, relocation, contents + offset); ++ else if (r_type == R_MICROBLAZE_IMML_64) ++ bfd_put_64 (input_bfd, relocation, contents + offset + endian); ++ else ++ { ++ if (r_type == R_MICROBLAZE_64_PCREL) ++ { ++ if (!input_section->output_section->vma && ++ !input_section->output_offset && !offset) ++ relocation -= (input_section->output_section->vma ++ + input_section->output_offset ++ + offset); ++ else ++ relocation -= (input_section->output_section->vma ++ + input_section->output_offset + offset + INST_WORD_SIZE); ++ } ++ else if (r_type == R_MICROBLAZE_TEXTREL_64 ++ || r_type == R_MICROBLAZE_TEXTREL_32_LO) ++ relocation -= input_section->output_section->vma; ++ ++ if (r_type == R_MICROBLAZE_TEXTREL_32_LO) ++ { ++ bfd_put_16 (input_bfd, relocation & 0xffff, ++ contents + offset + endian); ++ } ++ unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); ++ if ((insn & 0xff000000) == 0xb2000000) ++ { ++ insn &= ~0x00ffffff; ++ insn |= (relocation >> 16) & 0xffffff; ++ bfd_put_32 (input_bfd, insn, ++ contents + offset + endian); ++ } ++ else ++ bfd_put_16 (input_bfd, (relocation >> 16) & 0xffff, ++ contents + offset + endian); ++ bfd_put_16 (input_bfd, relocation & 0xffff, ++ contents + offset + endian + INST_WORD_SIZE); ++ } ++ break; ++ } ++ } ++ ++ default : ++ r = _bfd_final_link_relocate (howto, input_bfd, input_section, ++ contents, offset, ++ relocation, addend); ++ break; ++ } ++ } ++ ++ check_reloc: ++ ++ if (r != bfd_reloc_ok) ++ { ++ /* FIXME: This should be generic enough to go in a utility. */ ++ const char *name; ++ ++ if (h != NULL) ++ name = h->root.root.string; ++ else ++ { ++ name = (bfd_elf_string_from_elf_section ++ (input_bfd, symtab_hdr->sh_link, sym->st_name)); ++ if (name == NULL || *name == '\0') ++ name = bfd_section_name (sec); ++ } ++ ++ if (errmsg != NULL) ++ goto common_error; ++ ++ switch (r) ++ { ++ case bfd_reloc_overflow: ++ (*info->callbacks->reloc_overflow) ++ (info, (h ? &h->root : NULL), name, howto->name, ++ (bfd_vma) 0, input_bfd, input_section, offset); ++ break; ++ ++ case bfd_reloc_undefined: ++ (*info->callbacks->undefined_symbol) ++ (info, name, input_bfd, input_section, offset, true); ++ break; ++ ++ case bfd_reloc_outofrange: ++ errmsg = _("internal error: out of range error"); ++ goto common_error; ++ ++ case bfd_reloc_notsupported: ++ errmsg = _("internal error: unsupported relocation error"); ++ goto common_error; ++ ++ case bfd_reloc_dangerous: ++ errmsg = _("internal error: dangerous error"); ++ goto common_error; ++ ++ default: ++ errmsg = _("internal error: unknown error"); ++ /* Fall through. */ ++ common_error: ++ (*info->callbacks->warning) (info, errmsg, name, input_bfd, ++ input_section, offset); ++ break; ++ } ++ } ++ } ++ ++ return ret; ++} ++ ++/* Merge backend specific data from an object file to the output ++ object file when linking. ++ ++ Note: We only use this hook to catch endian mismatches. */ ++static bool ++microblaze_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd) ++{ ++ /* Check if we have the same endianess. */ ++ if (! _bfd_generic_verify_endian_match (ibfd, obfd)) ++ return false; ++ ++ return true; ++} ++ ++ ++/* Calculate fixup value for reference. */ ++ ++static size_t ++calc_fixup (bfd_vma start, bfd_vma size, asection *sec) ++{ ++ bfd_vma end = start + size; ++ size_t i, fixup = 0; ++ struct _microblaze_elf_section_data *sdata; ++ ++ if (sec == NULL || (sdata = microblaze_elf_section_data (sec)) == NULL) ++ return 0; ++ ++ /* Look for addr in relax table, total fixup value. */ ++ for (i = 0; i < sdata->relax_count; i++) ++ { ++ if (end <= sdata->relax[i].addr) ++ break; ++ if (end != start && start > sdata->relax[i].addr) ++ continue; ++ fixup += sdata->relax[i].size; ++ } ++ return fixup; ++} ++ ++/* Read-modify-write into the bfd, an immediate value into appropriate fields of ++ a 32-bit instruction. */ ++static void ++microblaze_bfd_write_imm_value_32 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) ++{ ++ unsigned long instr = bfd_get_32 (abfd, bfd_addr); ++ ++ if ((instr & 0xff000000) == 0xb2000000) ++ { ++ instr &= ~0x00ffffff; ++ instr |= (val & 0xffffff); ++ bfd_put_32 (abfd, instr, bfd_addr); ++ } ++ else ++ { ++ instr &= ~0x0000ffff; ++ instr |= (val & 0x0000ffff); ++ bfd_put_32 (abfd, instr, bfd_addr); ++ } ++} ++ ++/* Read-modify-write into the bfd, an immediate value into appropriate fields of ++ two consecutive 32-bit instructions. */ ++static void ++microblaze_bfd_write_imm_value_64 (bfd *abfd, bfd_byte *bfd_addr, bfd_vma val) ++{ ++ unsigned long instr_hi; ++ unsigned long instr_lo; ++ ++ instr_hi = bfd_get_32 (abfd, bfd_addr); ++ if ((instr_hi & 0xff000000) == 0xb2000000) ++ { ++ instr_hi &= ~0x00ffffff; ++ instr_hi |= (val >> 16) & 0xffffff; ++ bfd_put_32 (abfd, instr_hi,bfd_addr); ++ } ++ else ++ { ++ instr_hi &= ~0x0000ffff; ++ instr_hi |= ((val >> 16) & 0x0000ffff); ++ bfd_put_32 (abfd, instr_hi, bfd_addr); ++ } ++ instr_lo = bfd_get_32 (abfd, bfd_addr + INST_WORD_SIZE); ++ instr_lo &= ~0x0000ffff; ++ instr_lo |= (val & 0x0000ffff); ++ bfd_put_32 (abfd, instr_lo, bfd_addr + INST_WORD_SIZE); ++} ++ ++static bool ++microblaze_elf_relax_section (bfd *abfd, ++ asection *sec, ++ struct bfd_link_info *link_info, ++ bool *again) ++{ ++ Elf_Internal_Shdr *symtab_hdr; ++ Elf_Internal_Rela *internal_relocs; ++ Elf_Internal_Rela *irel, *irelend; ++ bfd_byte *contents = NULL; ++ int rel_count; ++ unsigned int shndx; ++ size_t i, sym_index; ++ asection *o; ++ struct elf_link_hash_entry *sym_hash; ++ Elf_Internal_Sym *isymbuf, *isymend; ++ Elf_Internal_Sym *isym; ++ size_t symcount; ++ size_t offset; ++ bfd_vma src, dest; ++ struct _microblaze_elf_section_data *sdata; ++ ++ /* We only do this once per section. We may be able to delete some code ++ by running multiple passes, but it is not worth it. */ ++ *again = false; ++ ++ /* Only do this for a text section. */ ++ if (bfd_link_relocatable (link_info) ++ || (sec->flags & SEC_RELOC) == 0 ++ || (sec->flags & SEC_CODE) == 0 ++ || sec->reloc_count == 0 ++ || (sdata = microblaze_elf_section_data (sec)) == NULL) ++ return true; ++ ++ BFD_ASSERT ((sec->size > 0) || (sec->rawsize > 0)); ++ ++ /* If this is the first time we have been called for this section, ++ initialize the cooked size. */ ++ if (sec->size == 0) ++ sec->size = sec->rawsize; ++ ++ /* Get symbols for this section. */ ++ symtab_hdr = &elf_tdata (abfd)->symtab_hdr; ++ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; ++ symcount = symtab_hdr->sh_size / sizeof (Elf64_External_Sym); ++ if (isymbuf == NULL) ++ isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, symcount, ++ 0, NULL, NULL, NULL); ++ BFD_ASSERT (isymbuf != NULL); ++ ++ internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory); ++ if (internal_relocs == NULL) ++ goto error_return; ++ ++ sdata->relax_count = 0; ++ sdata->relax = (struct relax_table *) bfd_malloc ((sec->reloc_count + 1) ++ * sizeof (*sdata->relax)); ++ if (sdata->relax == NULL) ++ goto error_return; ++ ++ irelend = internal_relocs + sec->reloc_count; ++ rel_count = 0; ++ for (irel = internal_relocs; irel < irelend; irel++, rel_count++) ++ { ++ bfd_vma symval; ++ if ((ELF64_R_TYPE (irel->r_info) != (int) R_MICROBLAZE_64_PCREL) ++ && (ELF64_R_TYPE (irel->r_info) != (int) R_MICROBLAZE_64 ) ++&& (ELF64_R_TYPE (irel->r_info) != (int) R_MICROBLAZE_TEXTREL_64)) ++ continue; /* Can't delete this reloc. */ ++ ++ /* Get the section contents. */ ++ if (contents == NULL) ++ { ++ if (elf_section_data (sec)->this_hdr.contents != NULL) ++ contents = elf_section_data (sec)->this_hdr.contents; ++ else ++ { ++ contents = (bfd_byte *) bfd_malloc (sec->size); ++ if (contents == NULL) ++ goto error_return; ++ if (!bfd_get_section_contents (abfd, sec, contents, ++ (file_ptr) 0, sec->size)) ++ goto error_return; ++ elf_section_data (sec)->this_hdr.contents = contents; ++ } ++ } ++ ++ /* Get the value of the symbol referred to by the reloc. */ ++ if (ELF64_R_SYM (irel->r_info) < symtab_hdr->sh_info) ++ { ++ /* A local symbol. */ ++ asection *sym_sec; ++ ++ isym = isymbuf + ELF64_R_SYM (irel->r_info); ++ if (isym->st_shndx == SHN_UNDEF) ++ sym_sec = bfd_und_section_ptr; ++ else if (isym->st_shndx == SHN_ABS) ++ sym_sec = bfd_abs_section_ptr; ++ else if (isym->st_shndx == SHN_COMMON) ++ sym_sec = bfd_com_section_ptr; ++ else ++ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); ++ ++ symval = _bfd_elf_rela_local_sym (abfd, isym, &sym_sec, irel); ++ } ++ else ++ { ++ unsigned long indx; ++ struct elf_link_hash_entry *h; ++ ++ indx = ELF64_R_SYM (irel->r_info) - symtab_hdr->sh_info; ++ h = elf_sym_hashes (abfd)[indx]; ++ BFD_ASSERT (h != NULL); ++ ++ if (h->root.type != bfd_link_hash_defined ++ && h->root.type != bfd_link_hash_defweak) ++ /* This appears to be a reference to an undefined ++ symbol. Just ignore it--it will be caught by the ++ regular reloc processing. */ ++ continue; ++ ++ symval = (h->root.u.def.value ++ + h->root.u.def.section->output_section->vma ++ + h->root.u.def.section->output_offset); ++ } ++ ++ /* If this is a PC-relative reloc, subtract the instr offset from ++ the symbol value. */ ++ if (ELF64_R_TYPE (irel->r_info) == (int) R_MICROBLAZE_64_PCREL) ++ { ++ symval = symval + irel->r_addend ++ - (irel->r_offset ++ + sec->output_section->vma ++ + sec->output_offset); ++ } ++ else if (ELF64_R_TYPE (irel->r_info) == (int) R_MICROBLAZE_TEXTREL_64) ++ { ++ symval = symval + irel->r_addend - (sec->output_section->vma); ++ } ++ else ++ symval += irel->r_addend; ++ ++ if ((symval & 0xffff8000) == 0 ++ || (symval & 0xffff8000) == 0xffff8000) ++ { ++ /* We can delete this instruction. */ ++ sdata->relax[sdata->relax_count].addr = irel->r_offset; ++ sdata->relax[sdata->relax_count].size = INST_WORD_SIZE; ++ sdata->relax_count++; ++ ++ /* Rewrite relocation type. */ ++ switch ((enum elf_microblaze_reloc_type) ELF64_R_TYPE (irel->r_info)) ++ { ++ case R_MICROBLAZE_64_PCREL: ++ irel->r_info = ELF64_R_INFO (ELF64_R_SYM (irel->r_info), ++ (int) R_MICROBLAZE_32_PCREL_LO); ++ break; ++ case R_MICROBLAZE_64: ++ irel->r_info = ELF64_R_INFO (ELF64_R_SYM (irel->r_info), ++ (int) R_MICROBLAZE_32_LO); ++ break; ++ case R_MICROBLAZE_TEXTREL_64: ++ irel->r_info = ELF64_R_INFO (ELF64_R_SYM (irel->r_info), ++ (int) R_MICROBLAZE_TEXTREL_32_LO); ++ break; ++ default: ++ /* Cannot happen. */ ++ BFD_ASSERT (false); ++ } ++ } ++ } /* Loop through all relocations. */ ++ ++ /* Loop through the relocs again, and see if anything needs to change. */ ++ if (sdata->relax_count > 0) ++ { ++ shndx = _bfd_elf_section_from_bfd_section (abfd, sec); ++ rel_count = 0; ++ sdata->relax[sdata->relax_count].addr = sec->size; ++ ++ for (irel = internal_relocs; irel < irelend; irel++, rel_count++) ++ { ++ bfd_vma nraddr; ++ ++ /* Get the new reloc address. */ ++ nraddr = irel->r_offset - calc_fixup (irel->r_offset, 0, sec); ++ switch ((enum elf_microblaze_reloc_type) ELF64_R_TYPE (irel->r_info)) ++ { ++ default: ++ break; ++ case R_MICROBLAZE_64_PCREL: ++ break; ++ case R_MICROBLAZE_64: ++ case R_MICROBLAZE_32_LO: ++ /* If this reloc is against a symbol defined in this ++ section, we must check the addend to see it will put the value in ++ range to be adjusted, and hence must be changed. */ ++ if (ELF64_R_SYM (irel->r_info) < symtab_hdr->sh_info) ++ { ++ isym = isymbuf + ELF64_R_SYM (irel->r_info); ++ /* Only handle relocs against .text. */ ++ if (isym->st_shndx == shndx ++ && ELF64_ST_TYPE (isym->st_info) == STT_SECTION) ++ irel->r_addend -= calc_fixup (irel->r_addend, 0, sec); ++ } ++ break; ++ case R_MICROBLAZE_IMML_64: ++ { ++ /* This was a PC-relative instruction that was ++ completely resolved. */ ++ int sfix, efix; ++ unsigned int val; ++ bfd_vma target_address; ++ target_address = irel->r_addend + irel->r_offset; ++ sfix = calc_fixup (irel->r_offset, 0, sec); ++ efix = calc_fixup (target_address, 0, sec); ++ ++ /* Validate the in-band val. */ ++ val = bfd_get_64 (abfd, contents + irel->r_offset); ++ if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { ++ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); ++ } ++ irel->r_addend -= (efix - sfix); ++ /* Should use HOWTO. */ ++ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, ++ irel->r_addend); ++ } ++ break; ++ case R_MICROBLAZE_NONE: ++ case R_MICROBLAZE_32_NONE: ++ { ++ /* This was a PC-relative instruction that was ++ completely resolved. */ ++ size_t sfix, efix; ++ unsigned int val; ++ bfd_vma target_address; ++ target_address = irel->r_addend + irel->r_offset; ++ sfix = calc_fixup (irel->r_offset, 0, sec); ++ efix = calc_fixup (target_address, 0, sec); ++ ++ /* Validate the in-band val. */ ++ val = bfd_get_32 (abfd, contents + irel->r_offset); ++ if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { ++ fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); ++ } ++ irel->r_addend -= (efix - sfix); ++ /* Should use HOWTO. */ ++ microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset, ++ irel->r_addend); ++ } ++ break; ++ case R_MICROBLAZE_64_NONE: ++ { ++ /* This was a PC-relative 64-bit instruction that was ++ completely resolved. */ ++ size_t sfix, efix; ++ bfd_vma target_address; ++ target_address = irel->r_addend + irel->r_offset + INST_WORD_SIZE; ++ sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec); ++ efix = calc_fixup (target_address, 0, sec); ++ irel->r_addend -= (efix - sfix); ++ microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset, ++ irel->r_addend); ++ } ++ break; ++ } ++ irel->r_offset = nraddr; ++ } /* Change all relocs in this section. */ ++ ++ /* Look through all other sections. */ ++ for (o = abfd->sections; o != NULL; o = o->next) ++ { ++ Elf_Internal_Rela *irelocs; ++ Elf_Internal_Rela *irelscan, *irelscanend; ++ bfd_byte *ocontents; ++ ++ if (o == sec ++ || (o->flags & SEC_RELOC) == 0 ++ || o->reloc_count == 0) ++ continue; ++ ++ /* We always cache the relocs. Perhaps, if info->keep_memory is ++ false, we should free them, if we are permitted to. */ ++ ++ irelocs = _bfd_elf_link_read_relocs (abfd, o, NULL, NULL, true); ++ if (irelocs == NULL) ++ goto error_return; ++ ++ ocontents = NULL; ++ irelscanend = irelocs + o->reloc_count; ++ for (irelscan = irelocs; irelscan < irelscanend; irelscan++) ++ { ++ if (1 && ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_NONE) ++ { ++ unsigned int val; ++ if (ELF64_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ ++ isym = isymbuf + ELF64_R_SYM (irelscan->r_info); ++ ++ /* hax: We only do the following fixup for debug location lists. */ ++ if (strcmp(".debug_loc", o->name)) ++ continue; ++ ++ /* This was a PC-relative instruction that was completely resolved. */ ++ if (ocontents == NULL) ++ { ++ if (elf_section_data (o)->this_hdr.contents != NULL) ++ ocontents = elf_section_data (o)->this_hdr.contents; ++ else ++ { ++ /* We always cache the section contents. ++ Perhaps, if info->keep_memory is false, we ++ should free them, if we are permitted to. */ ++ ++ if (o->rawsize == 0) ++ o->rawsize = o->size; ++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); ++ if (ocontents == NULL) ++ goto error_return; ++ if (!bfd_get_section_contents (abfd, o, ocontents, ++ (file_ptr) 0, ++ o->rawsize)) ++ goto error_return; ++ elf_section_data (o)->this_hdr.contents = ocontents; ++ } ++ } ++ ++ val = bfd_get_32 (abfd, ocontents + irelscan->r_offset); ++ if (val != irelscan->r_addend) { ++ fprintf(stderr, "%d: CORRUPT relax reloc! %x %lx\n", __LINE__, val, irelscan->r_addend); ++ } ++ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); ++ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, ++ irelscan->r_addend); ++ } ++ if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32 ++ || ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64) ++ { ++ if (ELF64_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ ++ isym = isymbuf + ELF64_R_SYM (irelscan->r_info); ++ ++ /* Look at the reloc only if the value has been resolved. */ ++ if (isym->st_shndx == shndx ++ && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION)) ++ { ++ if (ocontents == NULL) ++ { ++ if (elf_section_data (o)->this_hdr.contents != NULL) ++ ocontents = elf_section_data (o)->this_hdr.contents; ++ else ++ { ++ /* We always cache the section contents. ++ Perhaps, if info->keep_memory is false, we ++ should free them, if we are permitted to. */ ++ if (o->rawsize == 0) ++ o->rawsize = o->size; ++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); ++ if (ocontents == NULL) ++ goto error_return; ++ if (!bfd_get_section_contents (abfd, o, ocontents, ++ (file_ptr) 0, ++ o->rawsize)) ++ goto error_return; ++ elf_section_data (o)->this_hdr.contents = ocontents; ++ } ++ ++ } ++ irelscan->r_addend -= calc_fixup (irelscan->r_addend, 0, sec); ++ } ++ else if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_SYM_OP_SYM) ++ { ++ if (ELF64_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ ++ isym = isymbuf + ELF64_R_SYM (irelscan->r_info); ++ ++ /* Look at the reloc only if the value has been resolved. */ ++ if (ocontents == NULL) ++ { ++ if (elf_section_data (o)->this_hdr.contents != NULL) ++ ocontents = elf_section_data (o)->this_hdr.contents; ++ else ++ { ++ /* We always cache the section contents. ++ Perhaps, if info->keep_memory is false, we ++ should free them, if we are permitted to. */ ++ ++ if (o->rawsize == 0) ++ o->rawsize = o->size; ++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); ++ if (ocontents == NULL) ++ goto error_return; ++ if (!bfd_get_section_contents (abfd, o, ocontents, ++ (file_ptr) 0, ++ o->rawsize)) ++ goto error_return; ++ elf_section_data (o)->this_hdr.contents = ocontents; ++ } ++ } ++ irelscan->r_addend -= calc_fixup (irelscan->r_addend ++ + isym->st_value, ++ 0, ++ sec); ++ } ++ } ++ else if ((ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_PCREL_LO) ++ || (ELF32_R_TYPE (irelscan->r_info) ++ == (int) R_MICROBLAZE_32_LO) ++ || (ELF32_R_TYPE (irelscan->r_info) ++ == (int) R_MICROBLAZE_TEXTREL_32_LO)) ++ { ++ if (ELF64_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ ++ isym = isymbuf + ELF64_R_SYM (irelscan->r_info); ++ ++ /* Look at the reloc only if the value has been resolved. */ ++ if (isym->st_shndx == shndx ++ && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION)) ++ { ++ bfd_vma immediate; ++ bfd_vma target_address; ++ ++ if (ocontents == NULL) ++ { ++ if (elf_section_data (o)->this_hdr.contents != NULL) ++ ocontents = elf_section_data (o)->this_hdr.contents; ++ else ++ { ++ /* We always cache the section contents. ++ Perhaps, if info->keep_memory is false, we ++ should free them, if we are permitted to. */ ++ if (o->rawsize == 0) ++ o->rawsize = o->size; ++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); ++ if (ocontents == NULL) ++ goto error_return; ++ if (!bfd_get_section_contents (abfd, o, ocontents, ++ (file_ptr) 0, ++ o->rawsize)) ++ goto error_return; ++ elf_section_data (o)->this_hdr.contents = ocontents; ++ } ++ } ++ ++ unsigned long instr = bfd_get_32 (abfd, ocontents + irelscan->r_offset); ++ immediate = instr & 0x0000ffff; ++ target_address = immediate; ++ offset = calc_fixup (target_address, 0, sec); ++ immediate -= offset; ++ irelscan->r_addend -= offset; ++ microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset, ++ irelscan->r_addend); ++ } ++ } ++ ++ if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64 ++ || (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_TEXTREL_64)) ++ { ++ if (ELF64_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ ++ isym = isymbuf + ELF64_R_SYM (irelscan->r_info); ++ ++ /* Look at the reloc only if the value has been resolved. */ ++ if (isym->st_shndx == shndx ++ && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION)) ++ { ++ bfd_vma immediate; ++ ++ if (ocontents == NULL) ++ { ++ if (elf_section_data (o)->this_hdr.contents != NULL) ++ ocontents = elf_section_data (o)->this_hdr.contents; ++ else ++ { ++ /* We always cache the section contents. ++ Perhaps, if info->keep_memory is false, we ++ should free them, if we are permitted to. */ ++ ++ if (o->rawsize == 0) ++ o->rawsize = o->size; ++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); ++ if (ocontents == NULL) ++ goto error_return; ++ if (!bfd_get_section_contents (abfd, o, ocontents, ++ (file_ptr) 0, ++ o->rawsize)) ++ goto error_return; ++ elf_section_data (o)->this_hdr.contents = ocontents; ++ } ++ } ++ unsigned long instr_hi = bfd_get_32 (abfd, ocontents ++ + irelscan->r_offset); ++ unsigned long instr_lo = bfd_get_32 (abfd, ocontents ++ + irelscan->r_offset ++ + INST_WORD_SIZE); ++ if ((instr_hi & 0xff000000) == 0xb2000000) ++ immediate = (instr_hi & 0x00ffffff) << 24; ++ else ++ immediate = (instr_hi & 0x0000ffff) << 16; ++ immediate |= (instr_lo & 0x0000ffff); ++ offset = calc_fixup (irelscan->r_addend, 0, sec); ++ immediate -= offset; ++ irelscan->r_addend -= offset; ++ ++ } ++ } ++ else if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_PCREL) ++ { ++ if (ELF64_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ ++ isym = isymbuf + ELF64_R_SYM (irelscan->r_info); ++ ++ /* Look at the reloc only if the value has been resolved. */ ++ if (isym->st_shndx == shndx ++ && (ELF64_ST_TYPE (isym->st_info) == STT_SECTION)) ++ { ++ bfd_vma immediate; ++ bfd_vma target_address; ++ ++ if (ocontents == NULL) ++ { ++ if (elf_section_data (o)->this_hdr.contents != NULL) ++ ocontents = elf_section_data (o)->this_hdr.contents; ++ else ++ { ++ /* We always cache the section contents. ++ Perhaps, if info->keep_memory is false, we ++ should free them, if we are permitted to. */ ++ if (o->rawsize == 0) ++ o->rawsize = o->size; ++ ocontents = (bfd_byte *) bfd_malloc (o->rawsize); ++ if (ocontents == NULL) ++ goto error_return; ++ if (!bfd_get_section_contents (abfd, o, ocontents, ++ (file_ptr) 0, ++ o->rawsize)) ++ goto error_return; ++ elf_section_data (o)->this_hdr.contents = ocontents; ++ } ++ } ++ unsigned long instr_hi = bfd_get_32 (abfd, ocontents ++ + irelscan->r_offset); ++ unsigned long instr_lo = bfd_get_32 (abfd, ocontents ++ + irelscan->r_offset ++ + INST_WORD_SIZE); ++ if ((instr_hi & 0xff000000) == 0xb2000000) ++ immediate = (instr_hi & 0x00ffffff) << 24; ++ else ++ immediate = (instr_hi & 0x0000ffff) << 16; ++ immediate |= (instr_lo & 0x0000ffff); ++ target_address = immediate; ++ offset = calc_fixup (target_address, 0, sec); ++ immediate -= offset; ++ irelscan->r_addend -= offset; ++ microblaze_bfd_write_imm_value_64 (abfd, ocontents ++ + irelscan->r_offset, immediate); ++ } ++ } ++ } ++ } ++ ++ /* Adjust the local symbols defined in this section. */ ++ isymend = isymbuf + symtab_hdr->sh_info; ++ for (isym = isymbuf; isym < isymend; isym++) ++ { ++ if (isym->st_shndx == shndx) ++ { ++ isym->st_value -= calc_fixup (isym->st_value, 0, sec); ++ if (isym->st_size) ++ isym->st_size -= calc_fixup (isym->st_value, isym->st_size, sec); ++ } ++ } ++ ++ /* Now adjust the global symbols defined in this section. */ ++ isym = isymbuf + symtab_hdr->sh_info; ++ symcount = (symtab_hdr->sh_size / sizeof (Elf64_External_Sym)) - symtab_hdr->sh_info; ++ for (sym_index = 0; sym_index < symcount; sym_index++) ++ { ++ sym_hash = elf_sym_hashes (abfd)[sym_index]; ++ if ((sym_hash->root.type == bfd_link_hash_defined ++ || sym_hash->root.type == bfd_link_hash_defweak) ++ && sym_hash->root.u.def.section == sec) ++ { ++ sym_hash->root.u.def.value -= calc_fixup (sym_hash->root.u.def.value, ++ 0, sec); ++ if (sym_hash->size) ++ sym_hash->size -= calc_fixup (sym_hash->root.u.def.value, ++ sym_hash->size, sec); ++ } ++ } ++ ++ /* Physically move the code and change the cooked size. */ ++ dest = sdata->relax[0].addr; ++ for (i = 0; i < sdata->relax_count; i++) ++ { ++ size_t len; ++ src = sdata->relax[i].addr + sdata->relax[i].size; ++ len = (sdata->relax[i+1].addr - sdata->relax[i].addr ++ - sdata->relax[i].size); ++ ++ memmove (contents + dest, contents + src, len); ++ sec->size -= sdata->relax[i].size; ++ dest += len; ++ } ++ ++ elf_section_data (sec)->relocs = internal_relocs; ++ ++ elf_section_data (sec)->this_hdr.contents = contents; ++ ++ symtab_hdr->contents = (bfd_byte *) isymbuf; ++ } ++ ++ if (internal_relocs != NULL ++ && elf_section_data (sec)->relocs != internal_relocs) ++ free (internal_relocs); ++ ++ if (contents != NULL ++ && elf_section_data (sec)->this_hdr.contents != contents) ++ { ++ if (! link_info->keep_memory) ++ free (contents); ++ else ++ { ++ /* Cache the section contents for elf_link_input_bfd. */ ++ elf_section_data (sec)->this_hdr.contents = contents; ++ } ++ } ++ ++ if (sdata->relax_count == 0) ++ { ++ *again = false; ++ free (sdata->relax); ++ sdata->relax = NULL; ++ } ++ else ++ *again = true; ++ return true; ++ ++ error_return: ++ if (isymbuf != NULL ++ && symtab_hdr->contents != (unsigned char *) isymbuf) ++ free (isymbuf); ++ if (internal_relocs != NULL ++ && elf_section_data (sec)->relocs != internal_relocs) ++ free (internal_relocs); ++ if (contents != NULL ++ && elf_section_data (sec)->this_hdr.contents != contents) ++ free (contents); ++ free (sdata->relax); ++ sdata->relax = NULL; ++ sdata->relax_count = 0; ++ return false; ++} ++ ++/* Return the section that should be marked against GC for a given ++ relocation. */ ++ ++static asection * ++microblaze_elf_gc_mark_hook (asection *sec, ++ struct bfd_link_info * info, ++ Elf_Internal_Rela * rel, ++ struct elf_link_hash_entry * h, ++ Elf_Internal_Sym * sym) ++{ ++ if (h != NULL) ++ switch (ELF64_R_TYPE (rel->r_info)) ++ { ++ case R_MICROBLAZE_GNU_VTINHERIT: ++ case R_MICROBLAZE_GNU_VTENTRY: ++ return NULL; ++ } ++ ++ return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); ++} ++ ++/* Update the got entry reference counts for the section being removed. */ ++ ++static bool ++microblaze_elf_gc_sweep_hook (bfd * abfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info * info ATTRIBUTE_UNUSED, ++ asection * sec ATTRIBUTE_UNUSED, ++ const Elf_Internal_Rela * relocs ATTRIBUTE_UNUSED) ++{ ++ return true; ++} ++ ++/* PIC support. */ ++ ++#define PLT_ENTRY_SIZE 16 ++ ++#define PLT_ENTRY_WORD_0 0xb0000000 /* "imm 0". */ ++#define PLT_ENTRY_WORD_1 0xe9940000 /* "lwi r12,r20,0" - relocated to lwi r12,r20,func@GOT. */ ++#define PLT_ENTRY_WORD_1_NOPIC 0xe9800000 /* "lwi r12,r0,0" - non-PIC object. */ ++#define PLT_ENTRY_WORD_2 0x98186000 /* "brad r12". */ ++#define PLT_ENTRY_WORD_3 0x80000000 /* "nop". */ ++ ++/* Create .got, .gotplt, and .rela.got sections in DYNOBJ, and set up ++ shortcuts to them in our hash table. */ ++ ++static bool ++update_local_sym_info (bfd *abfd, ++ Elf_Internal_Shdr *symtab_hdr, ++ unsigned long r_symndx, ++ unsigned int tls_type) ++{ ++ bfd_signed_vma *local_got_refcounts = elf_local_got_refcounts (abfd); ++ unsigned char *local_got_tls_masks; ++ ++ if (local_got_refcounts == NULL) ++ { ++ bfd_size_type size = symtab_hdr->sh_info; ++ ++ size *= (sizeof (*local_got_refcounts) + sizeof (*local_got_tls_masks)); ++ local_got_refcounts = bfd_zalloc (abfd, size); ++ if (local_got_refcounts == NULL) ++ return false; ++ elf_local_got_refcounts (abfd) = local_got_refcounts; ++ } ++ ++ local_got_tls_masks = ++ (unsigned char *) (local_got_refcounts + symtab_hdr->sh_info); ++ local_got_tls_masks[r_symndx] |= tls_type; ++ local_got_refcounts[r_symndx] += 1; ++ ++ return true; ++} ++/* Look through the relocs for a section during the first phase. */ ++ ++static bool ++microblaze_elf_check_relocs (bfd * abfd, ++ struct bfd_link_info * info, ++ asection * sec, ++ const Elf_Internal_Rela * relocs) ++{ ++ Elf_Internal_Shdr * symtab_hdr; ++ struct elf_link_hash_entry ** sym_hashes; ++ struct elf_link_hash_entry ** sym_hashes_end; ++ const Elf_Internal_Rela * rel; ++ const Elf_Internal_Rela * rel_end; ++ struct elf64_mb_link_hash_table *htab; ++ asection *sreloc = NULL; ++ ++ if (bfd_link_relocatable (info)) ++ return true; ++ ++ htab = elf64_mb_hash_table (info); ++ if (htab == NULL) ++ return false; ++ ++ symtab_hdr = & elf_tdata (abfd)->symtab_hdr; ++ sym_hashes = elf_sym_hashes (abfd); ++ sym_hashes_end = sym_hashes + symtab_hdr->sh_size / sizeof (Elf64_External_Sym); ++ if (!elf_bad_symtab (abfd)) ++ sym_hashes_end -= symtab_hdr->sh_info; ++ ++ rel_end = relocs + sec->reloc_count; ++ ++ for (rel = relocs; rel < rel_end; rel++) ++ { ++ unsigned int r_type; ++ struct elf_link_hash_entry * h; ++ unsigned long r_symndx; ++ unsigned char tls_type = 0; ++ ++ r_symndx = ELF64_R_SYM (rel->r_info); ++ r_type = ELF64_R_TYPE (rel->r_info); ++ ++ if (r_symndx < symtab_hdr->sh_info) ++ h = NULL; ++ else ++ { ++ h = sym_hashes [r_symndx - symtab_hdr->sh_info]; ++ while (h->root.type == bfd_link_hash_indirect ++ || h->root.type == bfd_link_hash_warning) ++ h = (struct elf_link_hash_entry *) h->root.u.i.link; ++ /* PR15323, ref flags aren't set for references in the same ++ object. */ ++ h->root.non_ir_ref_regular = 1; ++ } ++ ++ switch (r_type) ++ { ++ /* This relocation describes the C++ object vtable hierarchy. ++ Reconstruct it for later use during GC. */ ++ case R_MICROBLAZE_GNU_VTINHERIT: ++ if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) ++ return false; ++ break; ++ ++ /* This relocation describes which C++ vtable entries are actually ++ used. Record for later use during GC. */ ++ case R_MICROBLAZE_GNU_VTENTRY: ++ if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend)) ++ return false; ++ break; ++ ++ /* This relocation requires .plt entry. */ ++ case R_MICROBLAZE_PLT_64: ++ if (h != NULL) ++ { ++ h->needs_plt = 1; ++ h->plt.refcount += 1; ++ } ++ break; ++ ++ /* This relocation requires .got entry. */ ++ case R_MICROBLAZE_TLSGD: ++ tls_type |= (TLS_TLS | TLS_GD); ++ goto dogottls; ++ case R_MICROBLAZE_TLSLD: ++ tls_type |= (TLS_TLS | TLS_LD); ++ /* Fall through. */ ++ dogottls: ++ sec->has_tls_reloc = 1; ++ /* Fall through. */ ++ case R_MICROBLAZE_GOT_64: ++ if (htab->elf.sgot == NULL) ++ { ++ if (htab->elf.dynobj == NULL) ++ htab->elf.dynobj = abfd; ++ if (!_bfd_elf_create_got_section (htab->elf.dynobj, info)) ++ return false; ++ } ++ if (h != NULL) ++ { ++ h->got.refcount += 1; ++ elf64_mb_hash_entry (h)->tls_mask |= tls_type; ++ } ++ else ++ { ++ if (! update_local_sym_info(abfd, symtab_hdr, r_symndx, tls_type) ) ++ return false; ++ } ++ break; ++ ++ case R_MICROBLAZE_GOTOFF_64: ++ case R_MICROBLAZE_GOTOFF_32: ++ if (htab->elf.sgot == NULL) ++ { ++ if (htab->elf.dynobj == NULL) ++ htab->elf.dynobj = abfd; ++ if (!_bfd_elf_create_got_section (htab->elf.dynobj, info)) ++ return false; ++ } ++ break; ++ ++ case R_MICROBLAZE_64: ++ case R_MICROBLAZE_64_PCREL: ++ case R_MICROBLAZE_32: ++ case R_MICROBLAZE_IMML_64: ++ { ++ if (h != NULL && !bfd_link_pic (info)) ++ { ++ /* we may need a copy reloc. */ ++ h->non_got_ref = 1; ++ ++ /* we may also need a .plt entry. */ ++ h->plt.refcount += 1; ++ if (ELF64_R_TYPE (rel->r_info) != R_MICROBLAZE_64_PCREL) ++ h->pointer_equality_needed = 1; ++ } ++ ++ ++ /* If we are creating a shared library, and this is a reloc ++ against a global symbol, or a non PC relative reloc ++ against a local symbol, then we need to copy the reloc ++ into the shared library. However, if we are linking with ++ -Bsymbolic, we do not need to copy a reloc against a ++ global symbol which is defined in an object we are ++ including in the link (i.e., DEF_REGULAR is set). At ++ this point we have not seen all the input files, so it is ++ possible that DEF_REGULAR is not set now but will be set ++ later (it is never cleared). In case of a weak definition, ++ DEF_REGULAR may be cleared later by a strong definition in ++ a shared library. We account for that possibility below by ++ storing information in the relocs_copied field of the hash ++ table entry. A similar situation occurs when creating ++ shared libraries and symbol visibility changes render the ++ symbol local. ++ ++ If on the other hand, we are creating an executable, we ++ may need to keep relocations for symbols satisfied by a ++ dynamic library if we manage to avoid copy relocs for the ++ symbol. */ ++ ++ if ((bfd_link_pic (info) ++ && (sec->flags & SEC_ALLOC) != 0 ++ && (r_type != R_MICROBLAZE_64_PCREL ++ || (h != NULL ++ && (! info->symbolic ++ || h->root.type == bfd_link_hash_defweak ++ || !h->def_regular)))) ++ || (!bfd_link_pic (info) ++ && (sec->flags & SEC_ALLOC) != 0 ++ && h != NULL ++ && (h->root.type == bfd_link_hash_defweak ++ || !h->def_regular))) ++ { ++ struct elf64_mb_dyn_relocs *p; ++ struct elf64_mb_dyn_relocs **head; ++ ++ /* When creating a shared object, we must copy these ++ relocs into the output file. We create a reloc ++ section in dynobj and make room for the reloc. */ ++ ++ if (sreloc == NULL) ++ { ++ bfd *dynobj; ++ ++ if (htab->elf.dynobj == NULL) ++ htab->elf.dynobj = abfd; ++ dynobj = htab->elf.dynobj; ++ ++ sreloc = _bfd_elf_make_dynamic_reloc_section (sec, dynobj, ++ 2, abfd, 1); ++ if (sreloc == NULL) ++ return false; ++ } ++ ++ /* If this is a global symbol, we count the number of ++ relocations we need for this symbol. */ ++ if (h != NULL) ++ head = &h->dyn_relocs; ++ else ++ { ++ /* Track dynamic relocs needed for local syms too. ++ We really need local syms available to do this ++ easily. Oh well. */ ++ ++ asection *s; ++ Elf_Internal_Sym *isym; ++ void *vpp; ++ ++ isym = bfd_sym_from_r_symndx (&htab->elf.sym_cache, ++ abfd, r_symndx); ++ if (isym == NULL) ++ return false; ++ ++ s = bfd_section_from_elf_index (abfd, isym->st_shndx); ++ if (s == NULL) ++ return false; ++ ++ vpp = &elf_section_data (s)->local_dynrel; ++ head = (struct elf64_mb_dyn_relocs **) vpp; ++ } ++ ++ p = *head; ++ if (p == NULL || p->sec != sec) ++ { ++ size_t amt = sizeof *p; ++ p = ((struct elf64_mb_dyn_relocs *) ++ bfd_alloc (htab->elf.dynobj, amt)); ++ if (p == NULL) ++ return false; ++ p->next = *head; ++ *head = p; ++ p->sec = sec; ++ p->count = 0; ++ p->pc_count = 0; ++ } ++ ++ p->count += 1; ++ if (r_type == R_MICROBLAZE_64_PCREL) ++ p->pc_count += 1; ++ } ++ } ++ break; ++ } ++ } ++ ++ return true; ++} ++ ++static bool ++microblaze_elf_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) ++{ ++ struct elf64_mb_link_hash_table *htab; ++ ++ htab = elf64_mb_hash_table (info); ++ if (htab == NULL) ++ return false; ++ ++ if (!htab->sgot && !_bfd_elf_create_got_section (dynobj, info)) ++ return false; ++ ++ if (!_bfd_elf_create_dynamic_sections (dynobj, info)) ++ return false; ++ ++ htab->splt = bfd_get_linker_section (dynobj, ".plt"); ++ htab->srelplt = bfd_get_linker_section (dynobj, ".rela.plt"); ++ htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss"); ++ if (!bfd_link_pic (info)) ++ htab->srelbss = bfd_get_linker_section (dynobj, ".rela.bss"); ++ ++ if (!htab->splt || !htab->srelplt || !htab->sdynbss ++ || (!bfd_link_pic (info) && !htab->srelbss)) ++ abort (); ++ ++ return true; ++} ++ ++/* Copy the extra info we tack onto an elf_link_hash_entry. */ ++ ++static void ++microblaze_elf_copy_indirect_symbol (struct bfd_link_info *info, ++ struct elf_link_hash_entry *dir, ++ struct elf_link_hash_entry *ind) ++{ ++ struct elf64_mb_link_hash_entry *edir, *eind; ++ ++ edir = (struct elf64_mb_link_hash_entry *) dir; ++ eind = (struct elf64_mb_link_hash_entry *) ind; ++ ++ if (eind->dyn_relocs != NULL) ++ { ++ if (edir->dyn_relocs != NULL) ++ { ++ struct elf64_mb_dyn_relocs **pp; ++ struct elf64_mb_dyn_relocs *p; ++ ++ if (ind->root.type == bfd_link_hash_indirect) ++ abort (); ++ ++ /* Add reloc counts against the weak sym to the strong sym ++ list. Merge any entries against the same section. */ ++ for (pp = &eind->dyn_relocs; (p = *pp) != NULL; ) ++ { ++ struct elf64_mb_dyn_relocs *q; ++ ++ for (q = edir->dyn_relocs; q != NULL; q = q->next) ++ if (q->sec == p->sec) ++ { ++ q->pc_count += p->pc_count; ++ q->count += p->count; ++ *pp = p->next; ++ break; ++ } ++ if (q == NULL) ++ pp = &p->next; ++ } ++ *pp = edir->dyn_relocs; ++ } ++ ++ edir->dyn_relocs = eind->dyn_relocs; ++ eind->dyn_relocs = NULL; ++ } ++ ++ edir->tls_mask |= eind->tls_mask; ++ ++ _bfd_elf_link_hash_copy_indirect (info, dir, ind); ++} ++ ++static bool ++microblaze_elf_adjust_dynamic_symbol (struct bfd_link_info *info, ++ struct elf_link_hash_entry *h) ++{ ++ struct elf64_mb_link_hash_table *htab; ++ struct elf64_mb_link_hash_entry * eh; ++ struct elf64_mb_dyn_relocs *p; ++ asection *sdynbss; ++ asection *s, *srel; ++ unsigned int power_of_two; ++ bfd *dynobj; ++ ++ htab = elf64_mb_hash_table (info); ++ if (htab == NULL) ++ return false; ++ ++ /* If this is a function, put it in the procedure linkage table. We ++ will fill in the contents of the procedure linkage table later, ++ when we know the address of the .got section. */ ++ if (h->type == STT_FUNC ++ || h->needs_plt) ++ { ++ if (h->plt.refcount <= 0 ++ || SYMBOL_CALLS_LOCAL (info, h) ++ || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT ++ && h->root.type == bfd_link_hash_undefweak)) ++ { ++ /* This case can occur if we saw a PLT reloc in an input ++ file, but the symbol was never referred to by a dynamic ++ object, or if all references were garbage collected. In ++ such a case, we don't actually need to build a procedure ++ linkage table, and we can just do a PC32 reloc instead. */ ++ h->plt.offset = (bfd_vma) -1; ++ h->needs_plt = 0; ++ } ++ ++ return true; ++ } ++ else ++ /* It's possible that we incorrectly decided a .plt reloc was ++ needed for an R_MICROBLAZE_64_PCREL reloc to a non-function sym in ++ check_relocs. We can't decide accurately between function and ++ non-function syms in check-relocs; Objects loaded later in ++ the link may change h->type. So fix it now. */ ++ h->plt.offset = (bfd_vma) -1; ++ ++ /* If this is a weak symbol, and there is a real definition, the ++ processor independent code will have arranged for us to see the ++ real definition first, and we can just use the same value. */ ++ if (h->is_weakalias) ++ { ++ struct elf_link_hash_entry *def = weakdef (h); ++ BFD_ASSERT (def->root.type == bfd_link_hash_defined); ++ h->root.u.def.section = def->root.u.def.section; ++ h->root.u.def.value = def->root.u.def.value; ++ return true; ++ } ++ ++ /* This is a reference to a symbol defined by a dynamic object which ++ is not a function. */ ++ ++ /* If we are creating a shared library, we must presume that the ++ only references to the symbol are via the global offset table. ++ For such cases we need not do anything here; the relocations will ++ be handled correctly by relocate_section. */ ++ if (bfd_link_pic (info)) ++ return true; ++ ++ /* If there are no references to this symbol that do not use the ++ GOT, we don't need to generate a copy reloc. */ ++ if (!h->non_got_ref) ++ return true; ++ ++ /* If -z nocopyreloc was given, we won't generate them either. */ ++ if (info->nocopyreloc) ++ { ++ h->non_got_ref = 0; ++ return true; ++ } ++ ++ eh = (struct elf64_mb_link_hash_entry *) h; ++ for (p = eh->dyn_relocs; p != NULL; p = p->next) ++ { ++ s = p->sec->output_section; ++ if (s != NULL && (s->flags & SEC_READONLY) != 0) ++ break; ++ } ++ ++ /* If we didn't find any dynamic relocs in read-only sections, then ++ we'll be keeping the dynamic relocs and avoiding the copy reloc. */ ++ if (p == NULL) ++ { ++ h->non_got_ref = 0; ++ return true; ++ } ++ ++ /* We must allocate the symbol in our .dynbss section, which will ++ become part of the .bss section of the executable. There will be ++ an entry for this symbol in the .dynsym section. The dynamic ++ object will contain position independent code, so all references ++ from the dynamic object to this symbol will go through the global ++ offset table. The dynamic linker will use the .dynsym entry to ++ determine the address it must put in the global offset table, so ++ both the dynamic object and the regular object will refer to the ++ same memory location for the variable. */ ++ ++ /* We must generate a R_MICROBLAZE_COPY reloc to tell the dynamic linker ++ to copy the initial value out of the dynamic object and into the ++ runtime process image. */ ++ dynobj = elf_hash_table (info)->dynobj; ++ BFD_ASSERT (dynobj != NULL); ++ if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) ++ { ++ htab->srelbss->size += sizeof (Elf64_External_Rela); ++ h->needs_copy = 1; ++ } ++ ++ /* We need to figure out the alignment required for this symbol. I ++ have no idea how ELF linkers handle this. */ ++ power_of_two = bfd_log2 (h->size); ++ if (power_of_two > 3) ++ power_of_two = 3; ++ ++ sdynbss = htab->sdynbss; ++ /* Apply the required alignment. */ ++ sdynbss->size = BFD_ALIGN (sdynbss->size, (bfd_size_type) (1 << power_of_two)); ++ if (power_of_two > sdynbss->alignment_power) ++ { ++ if (! bfd_set_section_alignment (sdynbss, power_of_two)) ++ return false; ++ } ++ ++ /* Define the symbol as being at this point in the section. */ ++ h->root.u.def.section = s; ++ h->root.u.def.value = s->size; ++ ++ /* Increment the section size to make room for the symbol. */ ++ s->size += h->size; ++ return true; ++} ++ ++/* Allocate space in .plt, .got and associated reloc sections for ++ dynamic relocs. */ ++ ++static bool ++allocate_dynrelocs (struct elf_link_hash_entry *h, void * dat) ++{ ++ struct bfd_link_info *info; ++ struct elf64_mb_link_hash_table *htab; ++ struct elf64_mb_link_hash_entry *eh; ++ struct elf64_mb_dyn_relocs *p; ++ ++ if (h->root.type == bfd_link_hash_indirect) ++ return true; ++ ++ info = (struct bfd_link_info *) dat; ++ htab = elf64_mb_hash_table (info); ++ if (htab == NULL) ++ return false; ++ ++ if (htab->elf.dynamic_sections_created ++ && h->plt.refcount > 0) ++ { ++ /* Make sure this symbol is output as a dynamic symbol. ++ Undefined weak syms won't yet be marked as dynamic. */ ++ if (h->dynindx == -1 ++ && !h->forced_local) ++ { ++ if (! bfd_elf_link_record_dynamic_symbol (info, h)) ++ return false; ++ } ++ ++ if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h)) ++ { ++ asection *s = htab->elf.splt; ++ ++ /* The first entry in .plt is reserved. */ ++ if (s->size == 0) ++ s->size = PLT_ENTRY_SIZE; ++ ++ h->plt.offset = s->size; ++ ++ /* If this symbol is not defined in a regular file, and we are ++ not generating a shared library, then set the symbol to this ++ location in the .plt. This is required to make function ++ pointers compare as equal between the normal executable and ++ the shared library. */ ++ if (! bfd_link_pic (info) ++ && !h->def_regular) ++ { ++ h->root.u.def.section = s; ++ h->root.u.def.value = h->plt.offset; ++ } ++ ++ /* Make room for this entry. */ ++ s->size += PLT_ENTRY_SIZE; ++ ++ /* We also need to make an entry in the .got.plt section, which ++ will be placed in the .got section by the linker script. */ ++ htab->elf.sgotplt->size += 4; ++ ++ /* We also need to make an entry in the .rel.plt section. */ ++ htab->elf.srelplt->size += sizeof (Elf64_External_Rela); ++ } ++ else ++ { ++ h->plt.offset = (bfd_vma) -1; ++ h->needs_plt = 0; ++ } ++ } ++ else ++ { ++ h->plt.offset = (bfd_vma) -1; ++ h->needs_plt = 0; ++ } ++ ++ eh = (struct elf64_mb_link_hash_entry *) h; ++ if (h->got.refcount > 0) ++ { ++ unsigned int need; ++ asection *s; ++ ++ /* Make sure this symbol is output as a dynamic symbol. ++ Undefined weak syms won't yet be marked as dynamic. */ ++ if (h->dynindx == -1 ++ && !h->forced_local) ++ { ++ if (! bfd_elf_link_record_dynamic_symbol (info, h)) ++ return false; ++ } ++ ++ need = 0; ++ if ((eh->tls_mask & TLS_TLS) != 0) ++ { ++ /* Handle TLS Symbol */ ++ if ((eh->tls_mask & TLS_LD) != 0) ++ { ++ if (!eh->elf.def_dynamic) ++ /* We'll just use htab->tlsld_got.offset. This should ++ always be the case. It's a little odd if we have ++ a local dynamic reloc against a non-local symbol. */ ++ htab->tlsld_got.refcount += 1; ++ else ++ need += 8; ++ } ++ if ((eh->tls_mask & TLS_GD) != 0) ++ need += 8; ++ } ++ else ++ { ++ /* Regular (non-TLS) symbol */ ++ need += 4; ++ } ++ if (need == 0) ++ { ++ h->got.offset = (bfd_vma) -1; ++ } ++ else ++ { ++ s = htab->elf.sgot; ++ h->got.offset = s->size; ++ s->size += need; ++ htab->elf.srelgot->size += need * (sizeof (Elf64_External_Rela) / 4); ++ } ++ } ++ else ++ h->got.offset = (bfd_vma) -1; ++ ++ if (eh->dyn_relocs == NULL) ++ return true; ++ ++ /* In the shared -Bsymbolic case, discard space allocated for ++ dynamic pc-relative relocs against symbols which turn out to be ++ defined in regular objects. For the normal shared case, discard ++ space for pc-relative relocs that have become local due to symbol ++ visibility changes. */ ++ ++ if (bfd_link_pic (info)) ++ { ++ if (h->def_regular ++ && (h->forced_local ++ || info->symbolic)) ++ { ++ struct elf64_mb_dyn_relocs **pp; ++ ++ for (pp = &eh->dyn_relocs; (p = *pp) != NULL; ) ++ { ++ p->count -= p->pc_count; ++ p->pc_count = 0; ++ if (p->count == 0) ++ *pp = p->next; ++ else ++ pp = &p->next; ++ } ++ } ++ else if (UNDEFWEAK_NO_DYNAMIC_RELOC (info, h)) ++ h->dyn_relocs = NULL; ++ } ++ else ++ { ++ /* For the non-shared case, discard space for relocs against ++ symbols which turn out to need copy relocs or are not ++ dynamic. */ ++ ++ if (!h->non_got_ref ++ && ((h->def_dynamic ++ && !h->def_regular) ++ || (htab->elf.dynamic_sections_created ++ && (h->root.type == bfd_link_hash_undefweak ++ || h->root.type == bfd_link_hash_undefined)))) ++ { ++ /* Make sure this symbol is output as a dynamic symbol. ++ Undefined weak syms won't yet be marked as dynamic. */ ++ if (h->dynindx == -1 ++ && !h->forced_local) ++ { ++ if (! bfd_elf_link_record_dynamic_symbol (info, h)) ++ return false; ++ } ++ ++ /* If that succeeded, we know we'll be keeping all the ++ relocs. */ ++ if (h->dynindx != -1) ++ goto keep; ++ } ++ ++ h->dyn_relocs = NULL; ++ ++ keep: ; ++ } ++ ++ /* Finally, allocate space. */ ++ for (p = h->dyn_relocs; p != NULL; p = p->next) ++ { ++ asection *sreloc = elf_section_data (p->sec)->sreloc; ++ sreloc->size += p->count * sizeof (Elf64_External_Rela); ++ } ++ ++ return true; ++} ++ ++/* Set the sizes of the dynamic sections. */ ++ ++static bool ++microblaze_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED, ++ struct bfd_link_info *info) ++{ ++ struct elf64_mb_link_hash_table *htab; ++ bfd *dynobj; ++ asection *s; ++ bfd *ibfd; ++ ++ htab = elf64_mb_hash_table (info); ++ if (htab == NULL) ++ return false; ++ ++ dynobj = htab->elf.dynobj; ++ BFD_ASSERT (dynobj != NULL); ++ ++ /* Set up .got offsets for local syms, and space for local dynamic ++ relocs. */ ++ for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next) ++ { ++ bfd_signed_vma *local_got; ++ bfd_signed_vma *end_local_got; ++ bfd_size_type locsymcount; ++ Elf_Internal_Shdr *symtab_hdr; ++ unsigned char *lgot_masks; ++ asection *srel; ++ ++ if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour) ++ continue; ++ ++ for (s = ibfd->sections; s != NULL; s = s->next) ++ { ++ struct elf_dyn_relocs *p; ++ ++ for (p = ((struct elf64_mb_dyn_relocs *) ++ elf_section_data (s)->local_dynrel); ++ p != NULL; ++ p = p->next) ++ { ++ if (!bfd_is_abs_section (p->sec) ++ && bfd_is_abs_section (p->sec->output_section)) ++ { ++ /* Input section has been discarded, either because ++ it is a copy of a linkonce section or due to ++ linker script /DISCARD/, so we'll be discarding ++ the relocs too. */ ++ } ++ else if (p->count != 0) ++ { ++ srel = elf_section_data (p->sec)->sreloc; ++ srel->size += p->count * sizeof (Elf64_External_Rela); ++ if ((p->sec->output_section->flags & SEC_READONLY) != 0) ++ info->flags |= DF_TEXTREL; ++ } ++ } ++ } ++ ++ local_got = elf_local_got_refcounts (ibfd); ++ if (!local_got) ++ continue; ++ ++ symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; ++ locsymcount = symtab_hdr->sh_info; ++ end_local_got = local_got + locsymcount; ++ lgot_masks = (unsigned char *) end_local_got; ++ s = htab->elf.sgot; ++ srel = htab->elf.srelgot; ++ ++ for (; local_got < end_local_got; ++local_got, ++lgot_masks) ++ { ++ if (*local_got > 0) ++ { ++ unsigned int need = 0; ++ if ((*lgot_masks & TLS_TLS) != 0) ++ { ++ if ((*lgot_masks & TLS_GD) != 0) ++ need += 8; ++ if ((*lgot_masks & TLS_LD) != 0) ++ htab->tlsld_got.refcount += 1; ++ } ++ else ++ need += 4; ++ ++ if (need == 0) ++ { ++ *local_got = (bfd_vma) -1; ++ } ++ else ++ { ++ *local_got = s->size; ++ s->size += need; ++ if (bfd_link_pic (info)) ++ srel->size += need * (sizeof (Elf64_External_Rela) / 4); ++ } ++ } ++ else ++ *local_got = (bfd_vma) -1; ++ } ++ } ++ ++ /* Allocate global sym .plt and .got entries, and space for global ++ sym dynamic relocs. */ ++ elf_link_hash_traverse (elf_hash_table (info), allocate_dynrelocs, info); ++ ++ if (htab->tlsld_got.refcount > 0) ++ { ++ htab->tlsld_got.offset = htab->elf.sgot->size; ++ htab->elf.sgot->size += 8; ++ if (bfd_link_pic (info)) ++ htab->elf.srelgot->size += sizeof (Elf64_External_Rela); ++ } ++ else ++ htab->tlsld_got.offset = (bfd_vma) -1; ++ ++ if (elf_hash_table (info)->dynamic_sections_created) ++ { ++ /* Make space for the trailing nop in .plt. */ ++ if (htab->elf.splt->size > 0) ++ htab->elf.splt->size += 4; ++ } ++ ++ /* The check_relocs and adjust_dynamic_symbol entry points have ++ determined the sizes of the various dynamic sections. Allocate ++ memory for them. */ ++ for (s = dynobj->sections; s != NULL; s = s->next) ++ { ++ const char *name; ++ bool strip = false; ++ ++ if ((s->flags & SEC_LINKER_CREATED) == 0) ++ continue; ++ ++ /* It's OK to base decisions on the section name, because none ++ of the dynobj section names depend upon the input files. */ ++ name = bfd_section_name (s); ++ ++ if (startswith (name, ".rela")) ++ { ++ if (s->size == 0) ++ { ++ /* If we don't need this section, strip it from the ++ output file. This is to handle .rela.bss and ++ .rela.plt. We must create it in ++ create_dynamic_sections, because it must be created ++ before the linker maps input sections to output ++ sections. The linker does that before ++ adjust_dynamic_symbol is called, and it is that ++ function which decides whether anything needs to go ++ into these sections. */ ++ strip = true; ++ } ++ else ++ { ++ /* We use the reloc_count field as a counter if we need ++ to copy relocs into the output file. */ ++ s->reloc_count = 0; ++ } ++ } ++ else if (s != htab->elf.splt ++ && s != htab->elf.sgot ++ && s != htab->elf.sgotplt ++ && s != htab->elf.sdynbss ++ && s != htab->elf.sdynrelro) ++ { ++ /* It's not one of our sections, so don't allocate space. */ ++ continue; ++ } ++ ++ if (strip) ++ { ++ s->flags |= SEC_EXCLUDE; ++ continue; ++ } ++ ++ /* Allocate memory for the section contents. */ ++ /* FIXME: This should be a call to bfd_alloc not bfd_zalloc. ++ Unused entries should be reclaimed before the section's contents ++ are written out, but at the moment this does not happen. Thus in ++ order to prevent writing out garbage, we initialise the section's ++ contents to zero. */ ++ s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size); ++ if (s->contents == NULL && s->size != 0) ++ return false; ++ } ++ ++ /* ??? Force DF_BIND_NOW? */ ++ info->flags |= DF_BIND_NOW; ++ return _bfd_elf_add_dynamic_tags (output_bfd, info, true); ++} ++ ++/* Finish up dynamic symbol handling. We set the contents of various ++ dynamic sections here. */ ++ ++static bool ++microblaze_elf_finish_dynamic_symbol (bfd *output_bfd, ++ struct bfd_link_info *info, ++ struct elf_link_hash_entry *h, ++ Elf_Internal_Sym *sym) ++{ ++ struct elf64_mb_link_hash_table *htab; ++ struct elf64_mb_link_hash_entry *eh = elf64_mb_hash_entry(h); ++ ++ htab = elf64_mb_hash_table (info); ++ if (htab == NULL) ++ return false; ++ ++ if (h->plt.offset != (bfd_vma) -1) ++ { ++ asection *splt; ++ asection *srela; ++ asection *sgotplt; ++ Elf_Internal_Rela rela; ++ bfd_byte *loc; ++ bfd_vma plt_index; ++ bfd_vma got_offset; ++ bfd_vma got_addr; ++ ++ /* This symbol has an entry in the procedure linkage table. Set ++ it up. */ ++ BFD_ASSERT (h->dynindx != -1); ++ ++ splt = htab->elf.splt; ++ srela = htab->elf.srelplt; ++ sgotplt = htab->elf.sgotplt; ++ BFD_ASSERT (splt != NULL && srela != NULL && sgotplt != NULL); ++ ++ plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1; /* first entry reserved. */ ++ got_offset = (plt_index + 3) * 4; /* 3 reserved ??? */ ++ got_addr = got_offset; ++ ++ /* For non-PIC objects we need absolute address of the GOT entry. */ ++ if (!bfd_link_pic (info)) ++ got_addr += sgotplt->output_section->vma + sgotplt->output_offset; ++ ++ /* Fill in the entry in the procedure linkage table. */ ++ bfd_put_32 (output_bfd, PLT_ENTRY_WORD_0 + ((got_addr >> 16) & 0xffff), ++ splt->contents + h->plt.offset); ++ if (bfd_link_pic (info)) ++ bfd_put_32 (output_bfd, PLT_ENTRY_WORD_1 + (got_addr & 0xffff), ++ splt->contents + h->plt.offset + 4); ++ else ++ bfd_put_32 (output_bfd, PLT_ENTRY_WORD_1_NOPIC + (got_addr & 0xffff), ++ splt->contents + h->plt.offset + 4); ++ bfd_put_32 (output_bfd, (bfd_vma) PLT_ENTRY_WORD_2, ++ splt->contents + h->plt.offset + 8); ++ bfd_put_32 (output_bfd, (bfd_vma) PLT_ENTRY_WORD_3, ++ splt->contents + h->plt.offset + 12); ++ ++ /* Any additions to the .got section??? */ ++ /* bfd_put_32 (output_bfd, ++ splt->output_section->vma + splt->output_offset + h->plt.offset + 4, ++ sgotplt->contents + got_offset); */ ++ ++ /* Fill in the entry in the .rela.plt section. */ ++ rela.r_offset = (sgotplt->output_section->vma ++ + sgotplt->output_offset ++ + got_offset); ++ rela.r_info = ELF64_R_INFO (h->dynindx, R_MICROBLAZE_JUMP_SLOT); ++ rela.r_addend = 0; ++ loc = srela->contents; ++ loc += plt_index * sizeof (Elf64_External_Rela); ++ bfd_elf64_swap_reloca_out (output_bfd, &rela, loc); ++ ++ if (!h->def_regular) ++ { ++ /* Mark the symbol as undefined, rather than as defined in ++ the .plt section. Zero the value. */ ++ sym->st_shndx = SHN_UNDEF; ++ sym->st_value = 0; ++ } ++ } ++ ++ /* h->got.refcount to be checked ? */ ++ if (h->got.offset != (bfd_vma) -1 && ++ ! ((h->got.offset & 1) || ++ IS_TLS_LD(eh->tls_mask) || IS_TLS_GD(eh->tls_mask))) ++ { ++ asection *sgot; ++ asection *srela; ++ bfd_vma offset; ++ ++ /* This symbol has an entry in the global offset table. Set it ++ up. */ ++ ++ sgot = htab->elf.sgot; ++ srela = htab->elf.srelgot; ++ BFD_ASSERT (sgot != NULL && srela != NULL); ++ ++ offset = (sgot->output_section->vma + sgot->output_offset ++ + (h->got.offset &~ (bfd_vma) 1)); ++ ++ /* If this is a -Bsymbolic link, and the symbol is defined ++ locally, we just want to emit a RELATIVE reloc. Likewise if ++ the symbol was forced to be local because of a version file. ++ The entry in the global offset table will already have been ++ initialized in the relocate_section function. */ ++ if (bfd_link_pic (info) ++ && ((info->symbolic && h->def_regular) ++ || h->dynindx == -1)) ++ { ++ asection *sec = h->root.u.def.section; ++ bfd_vma value; ++ ++ value = h->root.u.def.value; ++ if (sec->output_section != NULL) ++ /* PR 21180: If the output section is NULL, then the symbol is no ++ longer needed, and in theory the GOT entry is redundant. But ++ it is too late to change our minds now... */ ++ value += sec->output_section->vma + sec->output_offset; ++ ++ microblaze_elf_output_dynamic_relocation (output_bfd, ++ srela, srela->reloc_count++, ++ /* symindex= */ 0, ++ R_MICROBLAZE_REL, offset, ++ value); ++ } ++ else ++ { ++ microblaze_elf_output_dynamic_relocation (output_bfd, ++ srela, srela->reloc_count++, ++ h->dynindx, ++ R_MICROBLAZE_GLOB_DAT, ++ offset, 0); ++ } ++ ++ bfd_put_32 (output_bfd, (bfd_vma) 0, ++ sgot->contents + (h->got.offset &~ (bfd_vma) 1)); ++ } ++ ++ if (h->needs_copy) ++ { ++ asection *s; ++ Elf_Internal_Rela rela; ++ bfd_byte *loc; ++ ++ /* This symbols needs a copy reloc. Set it up. */ ++ ++ BFD_ASSERT (h->dynindx != -1); ++ ++ rela.r_offset = (h->root.u.def.value ++ + h->root.u.def.section->output_section->vma ++ + h->root.u.def.section->output_offset); ++ rela.r_info = ELF64_R_INFO (h->dynindx, R_MICROBLAZE_COPY); ++ rela.r_addend = 0; ++ if (h->root.u.def.section == htab->elf.sdynrelro) ++ s = htab->elf.sreldynrelro; ++ else ++ s = htab->elf.srelbss; ++ loc = s->contents + s->reloc_count++ * sizeof (Elf32_External_Rela); ++ bfd_elf32_swap_reloca_out (output_bfd, &rela, loc); ++ } ++ ++ /* Mark some specially defined symbols as absolute. */ ++ if (h == htab->elf.hdynamic ++ || h == htab->elf.hgot ++ || h == htab->elf.hplt) ++ sym->st_shndx = SHN_ABS; ++ ++ return true; ++} ++ ++ ++/* Finish up the dynamic sections. */ ++ ++static bool ++microblaze_elf_finish_dynamic_sections (bfd *output_bfd, ++ struct bfd_link_info *info) ++{ ++ bfd *dynobj; ++ asection *sdyn, *sgot; ++ struct elf64_mb_link_hash_table *htab; ++ ++ htab = elf64_mb_hash_table (info); ++ if (htab == NULL) ++ return false; ++ ++ dynobj = htab->elf.dynobj; ++ ++ sdyn = bfd_get_linker_section (dynobj, ".dynamic"); ++ ++ if (htab->elf.dynamic_sections_created) ++ { ++ asection *splt; ++ Elf64_External_Dyn *dyncon, *dynconend; ++ ++ dyncon = (Elf64_External_Dyn *) sdyn->contents; ++ dynconend = (Elf64_External_Dyn *) (sdyn->contents + sdyn->size); ++ for (; dyncon < dynconend; dyncon++) ++ { ++ Elf_Internal_Dyn dyn; ++ asection *s; ++ bool size; ++ ++ bfd_elf64_swap_dyn_in (dynobj, dyncon, &dyn); ++ ++ switch (dyn.d_tag) ++ { ++ case DT_PLTGOT: ++ s = htab->elf.sgotplt; ++ size = false; ++ break; ++ ++ case DT_PLTRELSZ: ++ s = htab->elf.srelplt; ++ size = true; ++ break; ++ ++ case DT_JMPREL: ++ s = htab->elf.srelplt; ++ size = false; ++ break; ++ ++ default: ++ continue; ++ } ++ ++ if (s == NULL) ++ dyn.d_un.d_val = 0; ++ else ++ { ++ if (!size) ++ dyn.d_un.d_ptr = s->output_section->vma + s->output_offset; ++ else ++ dyn.d_un.d_val = s->size; ++ } ++ bfd_elf64_swap_dyn_out (output_bfd, &dyn, dyncon); ++ } ++ ++ splt = htab->elf.splt; ++ BFD_ASSERT (splt != NULL && sdyn != NULL); ++ ++ /* Clear the first entry in the procedure linkage table, ++ and put a nop in the last four bytes. */ ++ if (splt->size > 0) ++ { ++ memset (splt->contents, 0, PLT_ENTRY_SIZE); ++ bfd_put_32 (output_bfd, (bfd_vma) 0x80000000 /* nop. */, ++ splt->contents + splt->size - 4); ++ ++ if (splt->output_section != bfd_abs_section_ptr) ++ elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4; ++ } ++ } ++ ++ /* Set the first entry in the global offset table to the address of ++ the dynamic section. */ ++ sgot = htab->elf.sgotplt; ++ if (sgot && sgot->size > 0) ++ { ++ if (sdyn == NULL) ++ bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); ++ else ++ bfd_put_32 (output_bfd, ++ sdyn->output_section->vma + sdyn->output_offset, ++ sgot->contents); ++ elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; ++ } ++ ++ if (htab->elf.sgot && htab->elf.sgot->size > 0) ++ elf_section_data (htab->elf.sgot->output_section)->this_hdr.sh_entsize = 4; ++ ++ return true; ++} ++ ++/* Hook called by the linker routine which adds symbols from an object ++ file. We use it to put .comm items in .sbss, and not .bss. */ ++ ++static bool ++microblaze_elf_add_symbol_hook (bfd *abfd, ++ struct bfd_link_info *info, ++ Elf_Internal_Sym *sym, ++ const char **namep ATTRIBUTE_UNUSED, ++ flagword *flagsp ATTRIBUTE_UNUSED, ++ asection **secp, ++ bfd_vma *valp) ++{ ++ if (sym->st_shndx == SHN_COMMON ++ && !bfd_link_relocatable (info) ++ && sym->st_size <= elf_gp_size (abfd)) ++ { ++ /* Common symbols less than or equal to -G nn bytes are automatically ++ put into .sbss. */ ++ *secp = bfd_make_section_old_way (abfd, ".sbss"); ++ if (*secp == NULL ++ || !bfd_set_section_flags (*secp, SEC_IS_COMMON | SEC_SMALL_DATA)) ++ return false; ++ ++ *valp = sym->st_size; ++ } ++ ++ return true; ++} ++ ++#define TARGET_LITTLE_SYM microblaze_elf64_le_vec ++#define TARGET_LITTLE_NAME "elf64-microblazeel" ++ ++#define TARGET_BIG_SYM microblaze_elf64_vec ++#define TARGET_BIG_NAME "elf64-microblaze" ++ ++#define ELF_ARCH bfd_arch_microblaze ++#define ELF_TARGET_ID MICROBLAZE_ELF_DATA ++#define ELF_MACHINE_CODE EM_MICROBLAZE ++#define ELF_MACHINE_ALT1 EM_MICROBLAZE_OLD ++#define ELF_MAXPAGESIZE 0x1000 ++#define elf_info_to_howto microblaze_elf_info_to_howto ++#define elf_info_to_howto_rel NULL ++ ++#define bfd_elf64_bfd_reloc_type_lookup microblaze_elf_reloc_type_lookup ++#define bfd_elf64_bfd_is_local_label_name microblaze_elf_is_local_label_name ++#define bfd_elf64_new_section_hook microblaze_elf_new_section_hook ++#define elf_backend_relocate_section microblaze_elf_relocate_section ++#define bfd_elf64_bfd_relax_section microblaze_elf_relax_section ++#define bfd_elf64_bfd_merge_private_bfd_data microblaze_elf_merge_private_bfd_data ++#define bfd_elf64_bfd_reloc_name_lookup microblaze_elf_reloc_name_lookup ++ ++#define elf_backend_gc_mark_hook microblaze_elf_gc_mark_hook ++#define elf_backend_gc_sweep_hook microblaze_elf_gc_sweep_hook ++#define elf_backend_check_relocs microblaze_elf_check_relocs ++#define elf_backend_copy_indirect_symbol microblaze_elf_copy_indirect_symbol ++#define bfd_elf64_bfd_link_hash_table_create microblaze_elf_link_hash_table_create ++#define elf_backend_can_gc_sections 1 ++#define elf_backend_can_refcount 1 ++#define elf_backend_want_got_plt 1 ++#define elf_backend_plt_readonly 1 ++#define elf_backend_got_header_size 12 ++#define elf_backend_want_dynrelro 1 ++#define elf_backend_rela_normal 1 ++#define elf_backend_dtrel_excludes_plt 1 ++ ++#define elf_backend_adjust_dynamic_symbol microblaze_elf_adjust_dynamic_symbol ++#define elf_backend_create_dynamic_sections microblaze_elf_create_dynamic_sections ++#define elf_backend_finish_dynamic_sections microblaze_elf_finish_dynamic_sections ++#define elf_backend_finish_dynamic_symbol microblaze_elf_finish_dynamic_symbol ++#define elf_backend_size_dynamic_sections microblaze_elf_size_dynamic_sections ++#define elf_backend_add_symbol_hook microblaze_elf_add_symbol_hook ++ ++#include "elf64-target.h" +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 9450882e850..f265e8fc608 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -65,8 +65,95 @@ + #define IS_SAVE_HIDDEN_PTR(op, rd, ra, rb) \ + ((op == add || op == addik) && ra == MICROBLAZE_FIRST_ARGREG && rb == 0) + ++static const char *microblaze_abi_string; ++ ++static const char *const microblaze_abi_strings[] = { ++ "auto", ++ "m64", ++}; ++ ++enum microblaze_abi ++microblaze_abi (struct gdbarch *gdbarch) ++{ ++ microblaze_gdbarch_tdep *tdep = (microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); ++ return tdep->microblaze_abi; ++} + /* The registers of the Xilinx microblaze processor. */ + ++ static struct cmd_list_element *setmicroblazecmdlist = NULL; ++ static struct cmd_list_element *showmicroblazecmdlist = NULL; ++ ++static void ++microblaze_abi_update (const char *ignore_args, ++ int from_tty, struct cmd_list_element *c) ++{ ++ struct gdbarch_info info; ++ ++ /* Force the architecture to update, and (if it's a microblaze architecture) ++ * microblaze_gdbarch_init will take care of the rest. */ ++// gdbarch_info_init (&info); ++ gdbarch_update_p (info); ++} ++ ++ ++static enum microblaze_abi ++global_microblaze_abi (void) ++{ ++ int i; ++ ++ for (i = 0; microblaze_abi_strings[i] != NULL; i++) ++ if (microblaze_abi_strings[i] == microblaze_abi_string) ++ return (enum microblaze_abi) i; ++ ++// internal_error (__FILE__, __LINE__, _("unknown ABI string")); ++} ++ ++static void ++show_microblaze_abi (struct ui_file *file, ++ int from_tty, ++ struct cmd_list_element *ignored_cmd, ++ const char *ignored_value) ++{ ++ enum microblaze_abi global_abi = global_microblaze_abi (); ++ enum microblaze_abi actual_abi = microblaze_abi (target_gdbarch ()); ++ const char *actual_abi_str = microblaze_abi_strings[actual_abi]; ++ ++#if 1 ++ if (global_abi == MICROBLAZE_ABI_AUTO) ++ fprintf_filtered ++ (file, ++ "The microblaze ABI is set automatically (currently \"%s\").\n", ++ actual_abi_str); ++ else if (global_abi == actual_abi) ++ fprintf_filtered ++ (file, ++ "The microblaze ABI is assumed to be \"%s\" (due to user setting).\n", ++ actual_abi_str); ++ else ++ { ++#endif ++ /* Probably shouldn't happen... */ ++ fprintf_filtered (file, ++ "The (auto detected) microblaze ABI \"%s\" is in use " ++ "even though the user setting was \"%s\".\n", ++ actual_abi_str, microblaze_abi_strings[global_abi]); ++ } ++} ++ ++static void ++show_microblaze_command (const char *args, int from_tty) ++{ ++ help_list (showmicroblazecmdlist, "show microblaze ", all_commands, gdb_stdout); ++} ++ ++static void ++set_microblaze_command (const char *args, int from_tty) ++{ ++ printf_unfiltered ++ ("\"set microblaze\" must be followed by an appropriate subcommand.\n"); ++ help_list (setmicroblazecmdlist, "set microblaze ", all_commands, gdb_stdout); ++} ++ + static const char * const microblaze_register_names[] = + { + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", +@@ -85,9 +172,21 @@ static const char * const microblaze_register_names[] = + static unsigned int microblaze_debug_flag = 0; + int reg_size = 4; + ++unsigned int ++microblaze_abi_regsize (struct gdbarch *gdbarch) ++{ ++ switch (microblaze_abi (gdbarch)) ++ { ++ case MICROBLAZE_ABI_M64: ++ return 8; ++ default: ++ return 4; ++ } ++} ++ + #define microblaze_debug(fmt, ...) \ + debug_prefixed_printf_cond_nofunc (microblaze_debug_flag, "MICROBLAZE", \ +- fmt, ## __VA_ARGS__) ++ fmt, ## __VA_ARGS__) + + + /* Return the name of register REGNUM. */ +@@ -867,15 +966,30 @@ static struct gdbarch * + microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + { + tdesc_arch_data_up tdesc_data; ++ enum microblaze_abi microblaze_abi, found_abi, wanted_abi; + const struct target_desc *tdesc = info.target_desc; + ++ /* What has the user specified from the command line? */ ++ wanted_abi = global_microblaze_abi (); ++ if (gdbarch_debug) ++ fprintf_unfiltered (gdb_stdlog, "microblaze_gdbarch_init: wanted_abi = %d\n", ++ wanted_abi); ++ if (wanted_abi != MICROBLAZE_ABI_AUTO) ++ microblaze_abi = wanted_abi; ++ + /* If there is already a candidate, use it. */ + arches = gdbarch_list_lookup_by_info (arches, &info); +- if (arches != NULL) ++ if ((arches != NULL) && (microblaze_abi != MICROBLAZE_ABI_M64)) + return arches->gdbarch; ++ ++ if (microblaze_abi == MICROBLAZE_ABI_M64) ++ { ++ tdesc = tdesc_microblaze64; ++ reg_size = 8; ++ } + if (tdesc == NULL) + { +- if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) + { + tdesc = tdesc_microblaze64; + reg_size = 8; +@@ -890,7 +1004,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + int valid_p; + int i; + +- if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) + feature = tdesc_find_feature (tdesc, + "org.gnu.gdb.microblaze64.core"); + else +@@ -904,7 +1018,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + for (i = 0; i < MICROBLAZE_NUM_REGS; i++) + valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), i, + microblaze_register_names[i]); +- if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) + feature = tdesc_find_feature (tdesc, + "org.gnu.gdb.microblaze64.stack-protect"); + else +@@ -954,7 +1068,8 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + set_gdbarch_ptr_bit (gdbarch, 64); + break; + } +- ++ if(microblaze_abi == MICROBLAZE_ABI_M64) ++ set_gdbarch_ptr_bit (gdbarch, 64); + + /* Map Dwarf2 registers to GDB registers. */ + set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); +@@ -1014,6 +1129,38 @@ _initialize_microblaze_tdep () + { + gdbarch_register (bfd_arch_microblaze, microblaze_gdbarch_init); + ++// static struct cmd_list_element *setmicroblazecmdlist = NULL; ++// static struct cmd_list_element *showmicroblazecmdlist = NULL; ++ ++ /* Add root prefix command for all "set microblaze"/"show microblaze" commands. */ ++ ++ add_setshow_prefix_cmd ("microblaze", no_class, ++ _("Various microblaze specific commands."), ++ _("Various microblaze specific commands."), ++ &setmicroblazecmdlist,&showmicroblazecmdlist, ++ &setlist,&showlist); ++#if 0 ++ add_prefix_cmd ("microblaze", no_class, set_microblaze_command, ++ _("Various microblaze specific commands."), ++ &setmicroblazecmdlist, "set microblaze ", 0, &setlist); ++ ++ add_prefix_cmd ("microblaze", no_class, show_microblaze_command, ++ _("Various microblaze specific commands."), ++ &showmicroblazecmdlist, "show microblaze ", 0, &showlist); ++#endif ++ ++ /* Allow the user to override the ABI. */ ++ add_setshow_enum_cmd ("abi", class_obscure, microblaze_abi_strings, ++ µblaze_abi_string, _("\ ++Set the microblaze ABI used by this program."), _("\ ++Show the microblaze ABI used by this program."), _("\ ++This option can be set to one of:\n\ ++ auto - the default ABI associated with the current binary\n\ ++ m64"), ++ microblaze_abi_update, ++ show_microblaze_abi, ++ &setmicroblazecmdlist, &showmicroblazecmdlist); ++ + initialize_tdesc_microblaze_with_stack_protect (); + initialize_tdesc_microblaze (); + initialize_tdesc_microblaze64_with_stack_protect (); +@@ -1028,5 +1175,4 @@ When non-zero, microblaze specific debugging is enabled."), + NULL, + &setdebuglist, &showdebuglist); + +- + } +diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h +index 542cdd82070..17a4bb5190c 100644 +--- a/gdb/microblaze-tdep.h ++++ b/gdb/microblaze-tdep.h +@@ -19,9 +19,17 @@ + + #ifndef MICROBLAZE_TDEP_H + #define MICROBLAZE_TDEP_H 1 +- ++#include "objfiles.h" + #include "gdbarch.h" + ++struct gdbarch; ++enum microblaze_abi ++ { ++ MICROBLAZE_ABI_AUTO = 0, ++ MICROBLAZE_ABI_M64, ++ }; ++ ++enum microblaze_abi microblaze_abi (struct gdbarch *gdbarch); + /* Microblaze architecture-specific information. */ + struct microblaze_gregset + { +@@ -35,11 +43,14 @@ struct microblaze_gdbarch_tdep : gdbarch_tdep_base + { + int dummy; // declare something. + ++ enum microblaze_abi microblaze_abi {}; ++ enum microblaze_abi found_abi {}; + /* Register sets. */ + struct regset *gregset; + size_t sizeof_gregset; + struct regset *fpregset; + size_t sizeof_fpregset; ++ int register_size; + }; + + /* Register numbers. */ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0008-Define-alignof-using-_Alignof-when-using-C11-or-newe.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0008-Define-alignof-using-_Alignof-when-using-C11-or-newe.patch deleted file mode 100644 index 3e2932761..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0008-Define-alignof-using-_Alignof-when-using-C11-or-newe.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 48906e1038e469b429aa35d0f967730a929c3880 Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Sun, 15 Jan 2023 00:16:25 -0800 -Subject: [PATCH 8/8] Define alignof using _Alignof when using C11 or newer - -WG14 N2350 made very clear that it is an UB having type definitions -within "offsetof" [1]. This patch enhances the implementation of macro -alignof_slot to use builtin "_Alignof" to avoid undefined behavior on -when using std=c11 or newer - -clang 16+ has started to flag this [2] - -Fixes build when using -std >= gnu11 and using clang16+ - -Older compilers gcc < 4.9 or clang < 8 has buggy _Alignof even though it -may support C11, exclude those compilers too - -gnulib needs this fix and then it will be applied to downstream packages -like gdb [3] - -[1] https://www.open-std.org/jtc1/sc22/wg14/www/docs/n2350.htm -[2] https://reviews.llvm.org/D133574 -[3] https://public-inbox.org/bug-gnulib/20230114232744.215167-1-raj.khem@gmail.com/T/#u - -Upstream-Status: Backport [https://git.savannah.gnu.org/cgit/gnulib.git/commit/?id=2d404c7dd974cc65f894526f4a1b76bc1dcd8d82] -Signed-off-by: Khem Raj ---- - libiberty/sha1.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/libiberty/sha1.c b/libiberty/sha1.c -index 504f06d3b9b..790ada82443 100644 ---- a/libiberty/sha1.c -+++ b/libiberty/sha1.c -@@ -229,7 +229,17 @@ sha1_process_bytes (const void *buffer, size_t len, struct sha1_ctx *ctx) - if (len >= 64) - { - #if !_STRING_ARCH_unaligned -+/* GCC releases before GCC 4.9 had a bug in _Alignof. See GCC bug 52023 -+ . -+ clang versions < 8.0.0 have the same bug. */ -+#if (!defined __STDC_VERSION__ || __STDC_VERSION__ < 201112 \ -+ || (defined __GNUC__ && __GNUC__ < 4 + (__GNUC_MINOR__ < 9) \ -+ && !defined __clang__) \ -+ || (defined __clang__ && __clang_major__ < 8)) - # define alignof(type) offsetof (struct { char c; type x; }, x) -+#else -+# define alignof(type) _Alignof(type) -+#endif - # define UNALIGNED_P(p) (((size_t) p) % alignof (sha1_uint32) != 0) - if (UNALIGNED_P (buffer)) - while (len > 64) --- -2.39.0 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0008-Fix-invalid-sigprocmask-call.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0008-Fix-invalid-sigprocmask-call.patch deleted file mode 100644 index ed1310ced..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0008-Fix-invalid-sigprocmask-call.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 5bdd15553daef7370ca3c1f12d8f14247fdd4907 Mon Sep 17 00:00:00 2001 -From: Yousong Zhou -Date: Fri, 24 Mar 2017 10:36:03 +0800 -Subject: [PATCH 8/9] Fix invalid sigprocmask call -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The POSIX document says - - The pthread_sigmask() and sigprocmask() functions shall fail if: - - [EINVAL] - The value of the how argument is not equal to one of the defined values. - -and this is how musl-libc is currently doing. Fix the call to be safe -and correct - - [1] http://pubs.opengroup.org/onlinepubs/9699919799/functions/pthread_sigmask.html - -gdb/ChangeLog: -2017-03-24 Yousong Zhou - - * common/signals-state-save-restore.c (save_original_signals_state): - Fix invalid sigprocmask call. - -Upstream-Status: Pending [not author, cherry-picked from LEDE https://bugs.lede-project.org/index.php?do=details&task_id=637&openedfrom=-1%2Bweek] -Signed-off-by: André Draszik -Signed-off-by: Khem Raj ---- - gdbsupport/signals-state-save-restore.cc | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gdbsupport/signals-state-save-restore.cc b/gdbsupport/signals-state-save-restore.cc -index 92e799d3551..a4a0234272a 100644 ---- a/gdbsupport/signals-state-save-restore.cc -+++ b/gdbsupport/signals-state-save-restore.cc -@@ -38,7 +38,7 @@ save_original_signals_state (bool quiet) - int i; - int res; - -- res = gdb_sigmask (0, NULL, &original_signal_mask); -+ res = gdb_sigmask (SIG_BLOCK, NULL, &original_signal_mask); - if (res == -1) - perror_with_name (("sigprocmask")); - --- -2.36.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0009-Depth-Total-number-of-inline-functions-refer-inline-.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0009-Depth-Total-number-of-inline-functions-refer-inline-.patch new file mode 100644 index 000000000..6769e1ee0 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0009-Depth-Total-number-of-inline-functions-refer-inline-.patch @@ -0,0 +1,74 @@ +From c37f307714121981fa91766c539913f7912643b7 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Thu, 21 Jul 2022 11:45:01 +0530 +Subject: [PATCH 09/54] =?UTF-8?q?Depth:=20Total=20number=20of=20inline=20f?= + =?UTF-8?q?unctions=20[refer=20inline-frame.c]=20state->skipped=5Fframes?= + =?UTF-8?q?=20:=20Number=20of=20inline=20functions=20skipped.=20the=20curr?= + =?UTF-8?q?ent=20unwind=5Fpc=20is=20causing=20an=20issue=20when=20we=20try?= + =?UTF-8?q?=20to=20step=20into=20inline=20functions[Depth=20is=20becoming?= + =?UTF-8?q?=200].=20It=E2=80=99s=20incrementing=20pc=20by=208=20even=20wit?= + =?UTF-8?q?h=20si=20instruction.?= +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Aayush Misra +--- + gdb/features/microblaze64.xml | 1 + + gdb/microblaze-tdep.c | 14 +++----------- + 2 files changed, 4 insertions(+), 11 deletions(-) + +diff --git a/gdb/features/microblaze64.xml b/gdb/features/microblaze64.xml +index 515d18e65cf..9c1b7d22003 100644 +--- a/gdb/features/microblaze64.xml ++++ b/gdb/features/microblaze64.xml +@@ -7,5 +7,6 @@ + + + ++ microblaze64 + + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index f265e8fc608..3e541789fac 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -513,16 +513,8 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, + static CORE_ADDR + microblaze_unwind_pc (struct gdbarch *gdbarch, frame_info_ptr next_frame) + { +- gdb_byte buf[4]; + CORE_ADDR pc; +- +- frame_unwind_register (next_frame, MICROBLAZE_PC_REGNUM, buf); +- pc = extract_typed_address (buf, builtin_type (gdbarch)->builtin_func_ptr); +- /* For sentinel frame, return address is actual PC. For other frames, +- return address is pc+8. This is a workaround because gcc does not +- generate correct return address in CIE. */ +- if (frame_relative_level (next_frame) >= 0) +- pc += 8; ++ pc=frame_unwind_register_unsigned (next_frame, MICROBLAZE_PC_REGNUM); + return pc; + } + +@@ -553,7 +545,6 @@ microblaze_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc) + ostart_pc = microblaze_analyze_prologue (gdbarch, func_start, 0xffffffffUL, + &cache); + +- + if (ostart_pc > start_pc) + return ostart_pc; + return start_pc; +@@ -660,7 +651,8 @@ static const struct frame_unwind microblaze_frame_unwind = + microblaze_frame_this_id, + microblaze_frame_prev_register, + NULL, +- default_frame_sniffer ++ default_frame_sniffer, ++ NULL, + }; + + static CORE_ADDR +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0009-gdb-gdserver-Fix-ABI-settings-for-gdbserver.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0009-gdb-gdserver-Fix-ABI-settings-for-gdbserver.patch deleted file mode 100644 index 6a9304208..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0009-gdb-gdserver-Fix-ABI-settings-for-gdbserver.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 53b76bb548720367032a51a6d604c975b10bb30e Mon Sep 17 00:00:00 2001 -From: Aayush Misra -Date: Fri, 29 Mar 2024 14:59:16 +0530 -Subject: [PATCH] gdb/gdserver: Fix ABI settings for gdbserver - -Upstream-Status: Pending - ---- - gdb/microblaze-tdep.c | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - -diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index 38ba38e8c7d..35cec286d8f 100644 ---- a/gdb/microblaze-tdep.c -+++ b/gdb/microblaze-tdep.c -@@ -1120,12 +1120,13 @@ void _initialize_microblaze_tdep (); - void - _initialize_microblaze_tdep () - { -+ //Setting abi to auto manually, should be able to modify in 'arch'_gdbarch_init function -+ microblaze_abi_string = microblaze_abi_strings[0]; -+ - register_gdbarch_init (bfd_arch_microblaze, microblaze_gdbarch_init); --// static struct cmd_list_element *setmicroblazecmdlist = NULL; --// static struct cmd_list_element *showmicroblazecmdlist = NULL; - -- /* Add root prefix command for all "set microblaze"/"show microblaze" commands. */ - -+ /* Add root prefix command for all "set microblaze"/"show microblaze" commands. */ - add_setshow_prefix_cmd ("microblaze", no_class, - _("Various microblaze specific commands."), - _("Various microblaze specific commands."), --- -2.34.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0009-gdbserver-ctrl-c-handling.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0009-gdbserver-ctrl-c-handling.patch deleted file mode 100644 index f53d3bd1e..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0009-gdbserver-ctrl-c-handling.patch +++ /dev/null @@ -1,40 +0,0 @@ -From bc3b1f6aacf2d8fe66b022fbfcf28cd82c76e52f Mon Sep 17 00:00:00 2001 -From: Khem Raj -Date: Thu, 29 Nov 2018 18:00:23 -0800 -Subject: [PATCH 9/9] gdbserver ctrl-c handling - -This problem was created by the upstream commit 78708b7c8c -After applying the commit, it will send SIGINT to the process -group(-signal_pid). -But if we use gdbserver send SIGINT, and the attached process is not a -process -group leader, then the "kill (-signal_pid, SIGINT)" returns error and -fails to -interrupt the attached process. - -Upstream-Status: Submitted -[https://sourceware.org/bugzilla/show_bug.cgi?id=18945] - -Author: Josh Gao -Signed-off-by: Zhixiong Chi -Signed-off-by: Khem Raj ---- - gdbserver/linux-low.cc | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/gdbserver/linux-low.cc b/gdbserver/linux-low.cc -index 7726a4a0c36..f750e074a03 100644 ---- a/gdbserver/linux-low.cc -+++ b/gdbserver/linux-low.cc -@@ -5496,7 +5496,7 @@ linux_process_target::request_interrupt () - { - /* Send a SIGINT to the process group. This acts just like the user - typed a ^C on the controlling terminal. */ -- ::kill (-signal_pid, SIGINT); -+ ::kill (signal_pid, SIGINT); - } - - bool --- -2.36.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0010-Fix-gdb-14-build-errors-for-microblaze-xilinx-elf-20.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0010-Fix-gdb-14-build-errors-for-microblaze-xilinx-elf-20.patch new file mode 100644 index 000000000..e5c88f01a --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0010-Fix-gdb-14-build-errors-for-microblaze-xilinx-elf-20.patch @@ -0,0 +1,133 @@ +From 6b6632b730808a012738f9eddf621abd6463e317 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 29 Feb 2024 10:53:04 +0530 +Subject: [PATCH 10/54] Fix gdb-14 build errors for microblaze-xilinx-elf + 2023.2 merge + +Signed-off-by: Aayush Misra +--- + bfd/elf64-microblaze.c | 12 ++++++++++++ + gdb/frame.c | 2 +- + gdb/microblaze-tdep.c | 17 +++++++++++------ + 3 files changed, 24 insertions(+), 7 deletions(-) + +diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c +index 6cd9753a592..119d266f95a 100755 +--- a/bfd/elf64-microblaze.c ++++ b/bfd/elf64-microblaze.c +@@ -750,6 +750,18 @@ microblaze_elf_info_to_howto (bfd * abfd, + return true; + } + ++/* Relax table contains information about instructions which can ++ be removed by relaxation -- replacing a long address with a ++ short address. */ ++struct relax_table ++{ ++ /* Address where bytes may be deleted. */ ++ bfd_vma addr; ++ ++ /* Number of bytes to be deleted. */ ++ size_t size; ++}; ++ + struct _microblaze_elf_section_data + { + struct bfd_elf_section_data elf; +diff --git a/gdb/frame.c b/gdb/frame.c +index c4d967e01d5..8be230e0617 100644 +--- a/gdb/frame.c ++++ b/gdb/frame.c +@@ -1315,7 +1315,7 @@ frame_unwind_register_value (frame_info_ptr next_frame, int regnum) + int i; + + const gdb_byte *buf = NULL; +- if (value_entirely_available(value)) { ++ if (value->entirely_available()) { + gdb::array_view buf = value->contents (); + } + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 3e541789fac..f7d9d6419ce 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -75,7 +75,7 @@ static const char *const microblaze_abi_strings[] = { + enum microblaze_abi + microblaze_abi (struct gdbarch *gdbarch) + { +- microblaze_gdbarch_tdep *tdep = (microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); ++ microblaze_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + return tdep->microblaze_abi; + } + /* The registers of the Xilinx microblaze processor. */ +@@ -120,12 +120,12 @@ show_microblaze_abi (struct ui_file *file, + + #if 1 + if (global_abi == MICROBLAZE_ABI_AUTO) +- fprintf_filtered ++ gdb_printf + (file, + "The microblaze ABI is set automatically (currently \"%s\").\n", + actual_abi_str); + else if (global_abi == actual_abi) +- fprintf_filtered ++ gdb_printf + (file, + "The microblaze ABI is assumed to be \"%s\" (due to user setting).\n", + actual_abi_str); +@@ -133,7 +133,7 @@ show_microblaze_abi (struct ui_file *file, + { + #endif + /* Probably shouldn't happen... */ +- fprintf_filtered (file, ++ gdb_printf (file, + "The (auto detected) microblaze ABI \"%s\" is in use " + "even though the user setting was \"%s\".\n", + actual_abi_str, microblaze_abi_strings[global_abi]); +@@ -934,7 +934,7 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, + void *cb_data, + const struct regcache *regcache) + { +- struct microblaze_gdbarch_tdep *tdep =(microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); ++ microblaze_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data); + +@@ -942,6 +942,8 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, + } + + ++#if 0 ++// compilation errors - function is not actually used ? + static void + make_regs (struct gdbarch *arch) + { +@@ -953,6 +955,7 @@ make_regs (struct gdbarch *arch) + set_gdbarch_ptr_bit (arch, 64); + } + } ++#endif + + static struct gdbarch * + microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -964,7 +967,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + /* What has the user specified from the command line? */ + wanted_abi = global_microblaze_abi (); + if (gdbarch_debug) +- fprintf_unfiltered (gdb_stdlog, "microblaze_gdbarch_init: wanted_abi = %d\n", ++ gdb_printf (gdb_stdlog, "microblaze_gdbarch_init: wanted_abi = %d\n", + wanted_abi); + if (wanted_abi != MICROBLAZE_ABI_AUTO) + microblaze_abi = wanted_abi; +@@ -1038,6 +1041,8 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + gdbarch *gdbarch + = gdbarch_alloc (&info, gdbarch_tdep_up (new microblaze_gdbarch_tdep)); + ++ microblaze_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); ++ + tdep->gregset = NULL; + tdep->sizeof_gregset = 0; + tdep->fpregset = NULL; +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0011-fix-gdb-microblaze-xilinx-elf-crash-issue-on-invocat.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0011-fix-gdb-microblaze-xilinx-elf-crash-issue-on-invocat.patch new file mode 100644 index 000000000..d7e515024 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0011-fix-gdb-microblaze-xilinx-elf-crash-issue-on-invocat.patch @@ -0,0 +1,28 @@ +From 389711a13933a60323d368d5e5f1f54bd171b16b Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 29 Feb 2024 10:55:16 +0530 +Subject: [PATCH 11/54] fix gdb microblaze-xilinx-elf crash issue on invocation + Regression from merging microblaze 64-bit support + +Signed-off-by: Aayush Misra +--- + gdb/microblaze-tdep.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index f7d9d6419ce..d4b9ef837e5 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -1124,6 +1124,9 @@ void _initialize_microblaze_tdep (); + void + _initialize_microblaze_tdep () + { ++ //Setting abi to auto manually, should be able to modify in 'arch'_gdbarch_init function ++ microblaze_abi_string = microblaze_abi_strings[0]; ++ + gdbarch_register (bfd_arch_microblaze, microblaze_gdbarch_init); + + // static struct cmd_list_element *setmicroblazecmdlist = NULL; +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0013-Disable-the-warning-message-for-eh_frame_hdr.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0013-Disable-the-warning-message-for-eh_frame_hdr.patch new file mode 100644 index 000000000..8e9667887 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0013-Disable-the-warning-message-for-eh_frame_hdr.patch @@ -0,0 +1,35 @@ +From ee4f6d0c1ea82b531d7481692e499fc0b35c88a8 Mon Sep 17 00:00:00 2001 +From: "Edgar E. Iglesias" +Date: Fri, 22 Jun 2012 01:20:20 +0200 +Subject: [PATCH 13/54] Disable the warning message for eh_frame_hdr + +Signed-off-by: Edgar E. Iglesias + +Conflicts: + bfd/elf-eh-frame.c +Signed-off-by: Aayush Misra +--- + bfd/elf-eh-frame.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c +index bf7a9902355..21029b59632 100644 +--- a/bfd/elf-eh-frame.c ++++ b/bfd/elf-eh-frame.c +@@ -1045,10 +1045,13 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info, + goto success; + + free_no_table: ++/* FIXME: Remove the microblaze specifics when relaxing gets fixed. */ ++if (bfd_get_arch(abfd) != bfd_arch_microblaze) { + _bfd_error_handler + /* xgettext:c-format */ + (_("error in %pB(%pA); no .eh_frame_hdr table will be created"), + abfd, sec); ++} + hdr_info->u.dwarf.table = false; + free (sec_info); + success: +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0015-upstream-change-to-garbage-collection-sweep-causes-m.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0015-upstream-change-to-garbage-collection-sweep-causes-m.patch new file mode 100644 index 000000000..41118c1a5 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0015-upstream-change-to-garbage-collection-sweep-causes-m.patch @@ -0,0 +1,43 @@ +From 6531ec7f986fff48b9efc883526018f494cf88fb Mon Sep 17 00:00:00 2001 +From: David Holsgrove +Date: Wed, 27 Feb 2013 13:56:11 +1000 +Subject: [PATCH 15/54] upstream change to garbage collection sweep causes mb + regression + +Upstream change for PR13177 now clears the def_regular during gc_sweep of a +section. (All other archs in binutils/bfd/elf32-*.c received an update +to a warning about unresolvable relocations - this warning is not present +in binutils/bfd/elf32-microblaze.c, but this warning check would not +prevent the error being seen) + +The visible issue with this change is when running a c++ application +in Petalinux which links libstdc++.so for exception handling it segfaults +on execution. + +This does not occur if static linking libstdc++.a, so its during the +relocations for a shared lib with garbage collection this occurs + +Signed-off-by: David Holsgrove + +Conflicts: + bfd/elflink.c +Signed-off-by: Aayush Misra +--- + bfd/elflink.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/bfd/elflink.c b/bfd/elflink.c +index ca162145f7e..0524019641e 100644 +--- a/bfd/elflink.c ++++ b/bfd/elflink.c +@@ -6608,7 +6608,6 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *data) + + inf = (struct elf_gc_sweep_symbol_info *) data; + (*inf->hide_symbol) (inf->info, h, true); +- h->def_regular = 0; + h->ref_regular = 0; + h->ref_regular_nonweak = 0; + } +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0016-Add-new-bit-field-instructions.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0016-Add-new-bit-field-instructions.patch new file mode 100644 index 000000000..30a7322d9 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0016-Add-new-bit-field-instructions.patch @@ -0,0 +1,88 @@ +From 50a52ab3ad64b8525a970744dbb1c5f67dc24886 Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Mon, 18 Jul 2016 12:24:28 +0530 +Subject: [PATCH 16/54] Add new bit-field instructions + +This patches adds new bsefi and bsifi instructions. +BSEFI- The instruction shall extract a bit field from a +register and place it right-adjusted in the destination register. +The other bits in the destination register shall be set to zero +BSIFI- The instruction shall insert a right-adjusted bit field +from a register at another position in the destination register. +The rest of the bits in the destination register shall be unchanged + +Signed-off-by :Nagaraju Mekala + +Conflicts: + opcodes/microblaze-dis.c + +Conflicts: + gas/config/tc-microblaze.c + opcodes/microblaze-opc.h + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 71 +++++++++++++++++++++++++++++++++++++- + opcodes/microblaze-dis.c | 18 +++++++++- + opcodes/microblaze-opc.h | 6 ++++ + 3 files changed, 93 insertions(+), 2 deletions(-) + +Index: gdb-14.2/opcodes/microblaze-dis.c +=================================================================== +--- gdb-14.2.orig/opcodes/microblaze-dis.c ++++ gdb-14.2/opcodes/microblaze-dis.c +@@ -113,7 +113,19 @@ get_field_immw (struct string_buf *buf, + } + + static char * +-get_field_rfsl (struct string_buf *buf, long instr) ++get_field_imm5width (struct string_buf *buf, long instr) ++{ ++ char *p = strbuf (buf); ++ ++ if (instr & 0x00004000) ++ sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW))); /* bsefi */ ++ else ++ sprintf (p, "%d", (short)(((instr & IMM5_WIDTH_MASK) >> IMM_WIDTH_LOW) - ((instr & IMM5_MASK) >> IMM_LOW) + 1)); /* bsifi */ ++ return p; ++} ++ ++static char * ++get_field_rfsl (struct string_buf *buf,long instr) + { + char *p = strbuf (buf); + +@@ -462,6 +474,10 @@ print_insn_microblaze (bfd_vma memaddr, + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), + get_field_immw (&buf, inst), get_field_imms (&buf, inst)); + break; ++ /* For bit field insns. */ ++ case INST_TYPE_RD_R1_IMM5_IMM5: ++ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst)); ++ break; + /* For tuqula instruction */ + case INST_TYPE_RD: + print_func (stream, "\t%s", get_field_rd (&buf, inst)); +Index: gdb-14.2/opcodes/microblaze-opc.h +=================================================================== +--- gdb-14.2.orig/opcodes/microblaze-opc.h ++++ gdb-14.2/opcodes/microblaze-opc.h +@@ -68,6 +68,9 @@ + #define INST_TYPE_R1_IMML 24 + #define INST_TYPE_RD_R1_IMMW_IMMS 21 + ++/* For bsefi and bsifi */ ++#define INST_TYPE_RD_R1_IMM5_IMM5 21 ++ + #define INST_TYPE_NONE 25 + + +@@ -587,5 +590,8 @@ char pvr_register_prefix[] = "rpvr"; + #define MIN_IMML ((long) 0xffffff8000000000L) + #define MAX_IMML ((long) 0x0000007fffffffffL) + ++#define MIN_IMM_WIDTH ((int) 0x00000001) ++#define MAX_IMM_WIDTH ((int) 0x00000020) ++ + #endif /* MICROBLAZE_OPC */ + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0019-initial-support-for-MicroBlaze-64-bit-m64.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0019-initial-support-for-MicroBlaze-64-bit-m64.patch new file mode 100644 index 000000000..dc78da6b7 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0019-initial-support-for-MicroBlaze-64-bit-m64.patch @@ -0,0 +1,150 @@ +From 45f177e5de751f11c2d084c4d836d7f8ef754cb4 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 1 Nov 2021 19:06:53 +0530 +Subject: [PATCH 19/54] initial support for MicroBlaze 64 bit [-m64] + +Conflicts: + bfd/elf32-microblaze.c + include/elf/common.h + ld/Makefile.am + ld/Makefile.in +signed-off-by:Nagaraju Mekala + Mahesh Bodapati + +Signed-off-by: Aayush Misra +--- + bfd/bfd-in2.h | 10 ++++++++++ + bfd/libbfd.h | 2 ++ + bfd/reloc.c | 12 ++++++++++++ + gas/config/tc-microblaze.h | 4 +++- + ld/Makefile.am | 2 ++ + ld/configure.tgt | 3 +++ + opcodes/microblaze-dis.c | 8 ++++++-- + opcodes/microblaze-opc.h | 11 +++++++---- + 8 files changed, 45 insertions(+), 7 deletions(-) + +Index: gdb-14.2/bfd/bfd-in2.h +=================================================================== +--- gdb-14.2.orig/bfd/bfd-in2.h ++++ gdb-14.2/bfd/bfd-in2.h +@@ -6489,12 +6489,22 @@ done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_64_NONE, + + /* This is a 64 bit reloc that stores the 32 bit pc relative ++ * +value in two words (with an imml instruction). No relocation is ++ * +done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64, ++ ++/* This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). The relocation is + PC-relative GOT offset */ + BFD_RELOC_MICROBLAZE_64_GOTPC, + + /* This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imml instruction). The relocation is ++PC-relative GOT offset */ ++ BFD_RELOC_MICROBLAZE_64_GPC, ++ ++/* This is a 64 bit reloc that stores the 32 bit pc relative ++value in two words (with an imml instruction). The relocation is + PC-relative GOT offset */ + BFD_RELOC_MICROBLAZE_64_GPC, + +Index: gdb-14.2/bfd/libbfd.h +=================================================================== +--- gdb-14.2.orig/bfd/libbfd.h ++++ gdb-14.2/bfd/libbfd.h +@@ -3012,7 +3012,9 @@ static const char *const bfd_reloc_code_ + "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", + "BFD_RELOC_MICROBLAZE_32_NONE", + "BFD_RELOC_MICROBLAZE_64_NONE", ++ "BFD_RELOC_MICROBLAZE_64", + "BFD_RELOC_MICROBLAZE_64_GOTPC", ++ "BFD_RELOC_MICROBLAZE_64_GPC", + "BFD_RELOC_MICROBLAZE_64_GOT", + "BFD_RELOC_MICROBLAZE_64_PLT", + "BFD_RELOC_MICROBLAZE_64_GOTOFF", +Index: gdb-14.2/bfd/reloc.c +=================================================================== +--- gdb-14.2.orig/bfd/reloc.c ++++ gdb-14.2/bfd/reloc.c +@@ -6703,6 +6703,12 @@ ENUMDOC + ENUM + BFD_RELOC_MICROBLAZE_64_NONE + ENUMDOC ++ This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++ BFD_RELOC_MICROBLAZE_64 ++ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). No relocation is + done here - only used for relaxing +@@ -6710,6 +6716,12 @@ ENUM + BFD_RELOC_MICROBLAZE_64_GOTPC + ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++ BFD_RELOC_MICROBLAZE_64_GPC ++ENUMDOC ++ This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). The relocation is + PC-relative GOT offset + ENUM +Index: gdb-14.2/opcodes/microblaze-dis.c +=================================================================== +--- gdb-14.2.orig/opcodes/microblaze-dis.c ++++ gdb-14.2/opcodes/microblaze-dis.c +@@ -457,6 +457,10 @@ print_insn_microblaze (bfd_vma memaddr, + case INST_TYPE_R1_R2_SPECIAL: + print_func (stream, "\t%s, %s", get_field_r1 (&buf, inst), + get_field_r2 (&buf, inst)); ++ break; ++ case INST_TYPE_IMML: ++ print_func (stream, "\t%s", get_field_imml (&buf, inst)); ++ /* TODO: Also print symbol */ + break; + case INST_TYPE_RD_IMM15: + print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), +@@ -475,8 +479,8 @@ print_insn_microblaze (bfd_vma memaddr, + get_field_immw (&buf, inst), get_field_imms (&buf, inst)); + break; + /* For bit field insns. */ +- case INST_TYPE_RD_R1_IMM5_IMM5: +- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_imm5width (&buf, inst), get_field_imm5 (&buf, inst)); ++ case INST_TYPE_RD_R1_IMMW_IMMS: ++ print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst)); + break; + /* For tuqula instruction */ + case INST_TYPE_RD: +Index: gdb-14.2/opcodes/microblaze-opc.h +=================================================================== +--- gdb-14.2.orig/opcodes/microblaze-opc.h ++++ gdb-14.2/opcodes/microblaze-opc.h +@@ -69,7 +69,13 @@ + #define INST_TYPE_RD_R1_IMMW_IMMS 21 + + /* For bsefi and bsifi */ +-#define INST_TYPE_RD_R1_IMM5_IMM5 21 ++#define INST_TYPE_RD_R1_IMMW_IMMS 21 ++ ++/* For 64-bit instructions */ ++#define INST_TYPE_IMML 22 ++#define INST_TYPE_RD_R1_IMML 23 ++#define INST_TYPE_R1_IMML 24 ++#define INST_TYPE_RD_R1_IMMW_IMMS 21 + + #define INST_TYPE_NONE 25 + +@@ -590,8 +596,5 @@ char pvr_register_prefix[] = "rpvr"; + #define MIN_IMML ((long) 0xffffff8000000000L) + #define MAX_IMML ((long) 0x0000007fffffffffL) + +-#define MIN_IMM_WIDTH ((int) 0x00000001) +-#define MAX_IMM_WIDTH ((int) 0x00000020) +- + #endif /* MICROBLAZE_OPC */ + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0020-initial-support-for-MicroBlaze-64-bit-m64.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0020-initial-support-for-MicroBlaze-64-bit-m64.patch new file mode 100644 index 000000000..a1efcf41f --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0020-initial-support-for-MicroBlaze-64-bit-m64.patch @@ -0,0 +1,82 @@ +From 8ec9b2fe49c8e1e367213fa0b8d6b6f0fedc3456 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 1 Nov 2021 19:06:53 +0530 +Subject: [PATCH 20/54] initial support for MicroBlaze 64 bit [-m64] + +Conflicts: + bfd/elf32-microblaze.c + include/elf/common.h + ld/Makefile.am + ld/Makefile.in +signed-off-by:Nagaraju Mekala + Mahesh Bodapati + +Signed-off-by: Aayush Misra +--- + ld/emulparams/elf64microblaze.sh | 23 +++++++++++++++++++++++ + ld/emulparams/elf64microblazeel.sh | 23 +++++++++++++++++++++++ + 2 files changed, 46 insertions(+) + create mode 100644 ld/emulparams/elf64microblaze.sh + create mode 100644 ld/emulparams/elf64microblazeel.sh + +diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh +new file mode 100644 +index 00000000000..9c7b0eb7080 +--- /dev/null ++++ b/ld/emulparams/elf64microblaze.sh +@@ -0,0 +1,23 @@ ++SCRIPT_NAME=elfmicroblaze ++OUTPUT_FORMAT="elf64-microblazeel" ++#BIG_OUTPUT_FORMAT="elf64-microblaze" ++LITTLE_OUTPUT_FORMAT="elf64-microblazeel" ++#TEXT_START_ADDR=0 ++NONPAGED_TEXT_START_ADDR=0x28 ++ALIGNMENT=4 ++MAXPAGESIZE=4 ++ARCH=microblaze ++EMBEDDED=yes ++ ++NOP=0x80000000 ++ ++# Hmmm, there's got to be a better way. This sets the stack to the ++# top of the simulator memory (2^19 bytes). ++#PAGE_SIZE=0x1000 ++#DATA_ADDR=0x10000 ++#OTHER_RELOCATING_SECTIONS='.stack 0x7000 : { _stack = .; *(.stack) }' ++#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} ++#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' ++ ++TEMPLATE_NAME=elf32 ++#GENERATE_SHLIB_SCRIPT=yes +diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh +new file mode 100644 +index 00000000000..9c7b0eb7080 +--- /dev/null ++++ b/ld/emulparams/elf64microblazeel.sh +@@ -0,0 +1,23 @@ ++SCRIPT_NAME=elfmicroblaze ++OUTPUT_FORMAT="elf64-microblazeel" ++#BIG_OUTPUT_FORMAT="elf64-microblaze" ++LITTLE_OUTPUT_FORMAT="elf64-microblazeel" ++#TEXT_START_ADDR=0 ++NONPAGED_TEXT_START_ADDR=0x28 ++ALIGNMENT=4 ++MAXPAGESIZE=4 ++ARCH=microblaze ++EMBEDDED=yes ++ ++NOP=0x80000000 ++ ++# Hmmm, there's got to be a better way. This sets the stack to the ++# top of the simulator memory (2^19 bytes). ++#PAGE_SIZE=0x1000 ++#DATA_ADDR=0x10000 ++#OTHER_RELOCATING_SECTIONS='.stack 0x7000 : { _stack = .; *(.stack) }' ++#$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} ++#OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' ++ ++TEMPLATE_NAME=elf32 ++#GENERATE_SHLIB_SCRIPT=yes +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0021-Added-relocations-for-MB-X.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0021-Added-relocations-for-MB-X.patch new file mode 100644 index 000000000..caf24b8d2 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0021-Added-relocations-for-MB-X.patch @@ -0,0 +1,69 @@ +From 818a103460da557761aacc0d21b9b087721d2d3e Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Tue, 11 Sep 2018 17:30:17 +0530 +Subject: [PATCH 21/54] Added relocations for MB-X + +Conflicts: + bfd/bfd-in2.h + gas/config/tc-microblaze.c + +Conflicts: + gas/config/tc-microblaze.c + +Signed-off-by: Aayush Misra +--- + bfd/reloc.c | 26 ++++++++++++++------------ + gas/config/tc-microblaze.c | 11 +++++++++++ + 2 files changed, 25 insertions(+), 12 deletions(-) + +Index: gdb-14.2/bfd/reloc.c +=================================================================== +--- gdb-14.2.orig/bfd/reloc.c ++++ gdb-14.2/bfd/reloc.c +@@ -6703,12 +6703,6 @@ ENUMDOC + ENUM + BFD_RELOC_MICROBLAZE_64_NONE + ENUMDOC +- This is a 32 bit reloc that stores the 32 bit pc relative +- value in two words (with an imml instruction). No relocation is +- done here - only used for relaxing +-ENUM +- BFD_RELOC_MICROBLAZE_64 +-ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). No relocation is + done here - only used for relaxing +@@ -6716,12 +6710,6 @@ ENUM + BFD_RELOC_MICROBLAZE_64_GOTPC + ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative +- value in two words (with an imml instruction). No relocation is +- done here - only used for relaxing +-ENUM +- BFD_RELOC_MICROBLAZE_64_GPC +-ENUMDOC +- This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). The relocation is + PC-relative GOT offset + ENUM +@@ -7976,6 +7964,20 @@ ENUMX + ENUMDOC + Linux eBPF relocations. + ++ This is a 64 bit reloc that stores 64-bit thread pointer relative offset ++ to two words (uses imml instruction). ++ENUM ++BFD_RELOC_MICROBLAZE_64, ++ENUMDOC ++ This is a 64 bit reloc that stores the 64 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++BFD_RELOC_MICROBLAZE_64_PCREL, ++ENUMDOC ++ This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing + ENUM + BFD_RELOC_EPIPHANY_SIMM8 + ENUMDOC diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0022-initial-support-for-MicroBlaze-64-bit-m64.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0022-initial-support-for-MicroBlaze-64-bit-m64.patch new file mode 100644 index 000000000..2023287a9 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0022-initial-support-for-MicroBlaze-64-bit-m64.patch @@ -0,0 +1,113 @@ +From 587d5179ce81a4f67ebec321063f6c3c9b1673cb Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 1 Nov 2021 19:06:53 +0530 +Subject: [PATCH 22/54] initial support for MicroBlaze 64 bit [-m64] + +Conflicts: + bfd/elf32-microblaze.c + include/elf/common.h + ld/Makefile.am + ld/Makefile.in +signed-off-by:Nagaraju Mekala + Mahesh Bodapati + +Signed-off-by: Aayush Misra +--- + bfd/elf64-microblaze.c | 8 + + bfd/reloc.c | 42 ++- + gas/config/tc-microblaze.c | 558 ++++++++++++++++++++++++++++++++----- + 3 files changed, 507 insertions(+), 101 deletions(-) + +Index: gdb-14.2/bfd/elf64-microblaze.c +=================================================================== +--- gdb-14.2.orig/bfd/elf64-microblaze.c ++++ gdb-14.2/bfd/elf64-microblaze.c +@@ -1666,6 +1666,14 @@ microblaze_elf_relocate_section (bfd *ou + outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL); + outrel.r_addend = relocation + addend; + } ++ unsigned long insn = bfd_get_32 (input_bfd, contents + offset +endian); ++ if (insn == 0xb2000000 || insn == 0xb2ffffff) ++ { ++ insn &= ~0x00ffffff; ++ insn |= (relocation >> 16) & 0xffffff; ++ bfd_put_32 (input_bfd, insn, ++ contents + offset + endian); ++ } + else + { + BFD_FAIL (); +Index: gdb-14.2/bfd/reloc.c +=================================================================== +--- gdb-14.2.orig/bfd/reloc.c ++++ gdb-14.2/bfd/reloc.c +@@ -6703,13 +6703,31 @@ ENUMDOC + ENUM + BFD_RELOC_MICROBLAZE_64_NONE + ENUMDOC ++ This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++ BFD_RELOC_MICROBLAZE_64 ++ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). No relocation is + done here - only used for relaxing + ENUM ++BFD_RELOC_MICROBLAZE_64_PCREL, ++ENUMDOC ++ This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM + BFD_RELOC_MICROBLAZE_64_GOTPC + ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++ BFD_RELOC_MICROBLAZE_64_GPC ++ENUMDOC ++ This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). The relocation is + PC-relative GOT offset + ENUM +@@ -7942,18 +7960,6 @@ ENUMDOC + This is a 64 bit reloc that stores 64-bit thread pointer relative offset + to two words (uses imml instruction). + ENUM +-BFD_RELOC_MICROBLAZE_64, +-ENUMDOC +- This is a 64 bit reloc that stores the 64 bit pc relative +- value in two words (with an imml instruction). No relocation is +- done here - only used for relaxing +-ENUM +-BFD_RELOC_MICROBLAZE_64_PCREL, +-ENUMDOC +- This is a 32 bit reloc that stores the 32 bit pc relative +- value in two words (with an imml instruction). No relocation is +- done here - only used for relaxing +-ENUM + BFD_RELOC_BPF_64 + ENUMX + BFD_RELOC_BPF_DISP32 +@@ -7967,18 +7973,6 @@ ENUMDOC + This is a 64 bit reloc that stores 64-bit thread pointer relative offset + to two words (uses imml instruction). + ENUM +-BFD_RELOC_MICROBLAZE_64, +-ENUMDOC +- This is a 64 bit reloc that stores the 64 bit pc relative +- value in two words (with an imml instruction). No relocation is +- done here - only used for relaxing +-ENUM +-BFD_RELOC_MICROBLAZE_64_PCREL, +-ENUMDOC +- This is a 32 bit reloc that stores the 32 bit pc relative +- value in two words (with an imml instruction). No relocation is +- done here - only used for relaxing +-ENUM + BFD_RELOC_EPIPHANY_SIMM8 + ENUMDOC + Adapteva EPIPHANY - 8 bit signed pc-relative displacement diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0023-Added-relocations-for-MB-X.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0023-Added-relocations-for-MB-X.patch new file mode 100644 index 000000000..54b0cc453 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0023-Added-relocations-for-MB-X.patch @@ -0,0 +1,84 @@ +From 4992c1383473b2a37551b7391f1eb836d2a447d3 Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Tue, 11 Sep 2018 17:30:17 +0530 +Subject: [PATCH 23/54] Added relocations for MB-X + +Conflicts: + bfd/bfd-in2.h + gas/config/tc-microblaze.c + +Conflicts: + gas/config/tc-microblaze.c + +Signed-off-by: Aayush Misra +--- + bfd/libbfd.h | 2 -- + bfd/reloc.c | 26 ++++++++------- + gas/config/tc-microblaze.c | 68 ++++++++++++-------------------------- + 3 files changed, 36 insertions(+), 60 deletions(-) + +Index: gdb-14.2/bfd/libbfd.h +=================================================================== +--- gdb-14.2.orig/bfd/libbfd.h ++++ gdb-14.2/bfd/libbfd.h +@@ -3012,9 +3012,7 @@ static const char *const bfd_reloc_code_ + "BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM", + "BFD_RELOC_MICROBLAZE_32_NONE", + "BFD_RELOC_MICROBLAZE_64_NONE", +- "BFD_RELOC_MICROBLAZE_64", + "BFD_RELOC_MICROBLAZE_64_GOTPC", +- "BFD_RELOC_MICROBLAZE_64_GPC", + "BFD_RELOC_MICROBLAZE_64_GOT", + "BFD_RELOC_MICROBLAZE_64_PLT", + "BFD_RELOC_MICROBLAZE_64_GOTOFF", +Index: gdb-14.2/bfd/reloc.c +=================================================================== +--- gdb-14.2.orig/bfd/reloc.c ++++ gdb-14.2/bfd/reloc.c +@@ -6669,6 +6669,20 @@ ENUM + ENUMDOC + Address of a GOT entry. + ++ This is a 64 bit reloc that stores 64-bit thread pointer relative offset ++ to two words (uses imml instruction). ++ENUM ++BFD_RELOC_MICROBLAZE_64, ++ENUMDOC ++ This is a 64 bit reloc that stores the 64 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++BFD_RELOC_MICROBLAZE_64_PCREL, ++ENUMDOC ++ This is a 32 bit reloc that stores the 32 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing + ENUM + BFD_RELOC_MICROBLAZE_32_LO + ENUMDOC +@@ -6707,12 +6721,6 @@ ENUMDOC + value in two words (with an imml instruction). No relocation is + done here - only used for relaxing + ENUM +- BFD_RELOC_MICROBLAZE_64 +-ENUMDOC +- This is a 64 bit reloc that stores the 32 bit pc relative +- value in two words (with an imm instruction). No relocation is +- done here - only used for relaxing +-ENUM + BFD_RELOC_MICROBLAZE_64_PCREL, + ENUMDOC + This is a 32 bit reloc that stores the 32 bit pc relative +@@ -6725,12 +6733,6 @@ ENUMDOC + value in two words (with an imml instruction). No relocation is + done here - only used for relaxing + ENUM +- BFD_RELOC_MICROBLAZE_64_GPC +-ENUMDOC +- This is a 64 bit reloc that stores the 32 bit pc relative +- value in two words (with an imm instruction). The relocation is +- PC-relative GOT offset +-ENUM + BFD_RELOC_MICROBLAZE_64_GOT + ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0025-Fixed-address-computation-issues-with-64bit-address-.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0025-Fixed-address-computation-issues-with-64bit-address-.patch new file mode 100644 index 000000000..e495e207d --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0025-Fixed-address-computation-issues-with-64bit-address-.patch @@ -0,0 +1,35 @@ +From 33e22262c6c43af6e7e075df0665838b5b3859a6 Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Tue, 9 Oct 2018 10:14:22 +0530 +Subject: [PATCH 25/54] - Fixed address computation issues with 64bit address - + Fixed imml dissassamble issue + +Conflicts: + gas/config/tc-microblaze.c + opcodes/microblaze-dis.c + +Conflicts: + bfd/elf64-microblaze.c + +Conflicts: + bfd/elf64-microblaze.c + +Signed-off-by: Aayush Misra +--- + bfd/elf64-microblaze.c | 2 +- + gas/config/tc-microblaze.c | 74 +++++++++++++++++++++++++++++++++----- + 2 files changed, 67 insertions(+), 9 deletions(-) + +Index: gdb-14.2/bfd/elf64-microblaze.c +=================================================================== +--- gdb-14.2.orig/bfd/elf64-microblaze.c ++++ gdb-14.2/bfd/elf64-microblaze.c +@@ -2131,7 +2131,7 @@ microblaze_elf_relax_section (bfd *abfd, + efix = calc_fixup (target_address, 0, sec); + + /* Validate the in-band val. */ +- val = bfd_get_32 (abfd, contents + irel->r_offset); ++ val = bfd_get_64 (abfd, contents + irel->r_offset); + if (val != irel->r_addend && ELF64_R_TYPE (irel->r_info) == R_MICROBLAZE_32_NONE) { + fprintf(stderr, "%d: CORRUPT relax reloc %x %lx\n", __LINE__, val, irel->r_addend); + } diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0028-fixing-the-long-long-long-mingw-toolchain-issue.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0028-fixing-the-long-long-long-mingw-toolchain-issue.patch new file mode 100644 index 000000000..f6598cee7 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0028-fixing-the-long-long-long-mingw-toolchain-issue.patch @@ -0,0 +1,26 @@ +From 646b229752b9816b25d2b9ffe79b895b69742745 Mon Sep 17 00:00:00 2001 +From: Nagaraju Mekala +Date: Thu, 29 Nov 2018 17:59:25 +0530 +Subject: [PATCH 28/54] fixing the long & long long mingw toolchain issue + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 10 +++++----- + opcodes/microblaze-opc.h | 4 ++-- + 2 files changed, 7 insertions(+), 7 deletions(-) + +Index: gdb-14.2/opcodes/microblaze-opc.h +=================================================================== +--- gdb-14.2.orig/opcodes/microblaze-opc.h ++++ gdb-14.2/opcodes/microblaze-opc.h +@@ -593,8 +593,8 @@ char pvr_register_prefix[] = "rpvr"; + #define MIN_IMM6_WIDTH ((int) 0x00000001) + #define MAX_IMM6_WIDTH ((int) 0x00000040) + +-#define MIN_IMML ((long) 0xffffff8000000000L) +-#define MAX_IMML ((long) 0x0000007fffffffffL) ++#define MIN_IMML ((long long) 0xffffff8000000000L) ++#define MAX_IMML ((long long) 0x0000007fffffffffL) + + #endif /* MICROBLAZE_OPC */ + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0029-Added-support-to-new-arithmetic-single-register-inst.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0029-Added-support-to-new-arithmetic-single-register-inst.patch new file mode 100644 index 000000000..8e9585a0e --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0029-Added-support-to-new-arithmetic-single-register-inst.patch @@ -0,0 +1,176 @@ +From 1a9a688939dfbf7cca9685b326c0387672c567b4 Mon Sep 17 00:00:00 2001 +From: Nagaraju +Date: Fri, 23 Aug 2019 16:18:43 +0530 +Subject: [PATCH 29/54] Added support to new arithmetic single register + instructions + +Conflicts: + opcodes/microblaze-dis.c + +Conflicts: + gas/config/tc-microblaze.c + opcodes/microblaze-dis.c + +Conflicts: + gas/config/tc-microblaze.c +signed-off-by:Nagaraju + Mahesh + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 147 ++++++++++++++++++++++++++++++++++++- + opcodes/microblaze-dis.c | 11 +++ + opcodes/microblaze-opc.h | 43 ++++++++++- + opcodes/microblaze-opcm.h | 5 +- + 4 files changed, 200 insertions(+), 6 deletions(-) + +Index: gdb-14.2/opcodes/microblaze-dis.c +=================================================================== +--- gdb-14.2.orig/opcodes/microblaze-dis.c ++++ gdb-14.2/opcodes/microblaze-dis.c +@@ -143,6 +143,14 @@ get_field_imm15 (struct string_buf *buf, + return p; + } + ++get_field_imm16 (struct string_buf *buf, long instr) ++{ ++ char *p = strbuf (buf); ++ ++ sprintf (p, "%d", (short)((instr & IMM16_MASK) >> IMM_LOW)); ++ return p; ++} ++ + static char * + get_field_special (struct string_buf *buf, long instr, + const struct op_code_struct *op) +@@ -473,6 +481,9 @@ print_insn_microblaze (bfd_vma memaddr, + /* For mbar 16 or sleep insn. */ + case INST_TYPE_NONE: + break; ++ case INST_TYPE_RD_IMML: ++ print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst)); ++ break; + /* For bit field insns. */ + case INST_TYPE_RD_R1_IMMW_IMMS: + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), +Index: gdb-14.2/opcodes/microblaze-opc.h +=================================================================== +--- gdb-14.2.orig/opcodes/microblaze-opc.h ++++ gdb-14.2/opcodes/microblaze-opc.h +@@ -78,6 +78,7 @@ + #define INST_TYPE_RD_R1_IMMW_IMMS 21 + + #define INST_TYPE_NONE 25 ++#define INST_TYPE_RD_IMML 26 + + + +@@ -93,6 +94,7 @@ + #define IMMVAL_MASK_MFS 0x0000 + + #define OPCODE_MASK_H 0xFC000000 /* High 6 bits only. */ ++#define OPCODE_MASK_LIMM 0xFC1F0000 /* High 6 bits and 12-16 bits */ + #define OPCODE_MASK_H1 0xFFE00000 /* High 11 bits. */ + #define OPCODE_MASK_H2 0xFC1F0000 /* High 6 and bits 20-16. */ + #define OPCODE_MASK_H12 0xFFFF0000 /* High 16. */ +@@ -115,6 +117,33 @@ + #define OPCODE_MASK_H34C 0xFC0007E0 /* High 6 bits and bits 21-26. */ + #define OPCODE_MASK_H8 0xFF000000 /* High 8 bits only. */ + ++/*Defines to identify 64-bit single reg instructions */ ++#define ADDLI_ONE_REG_MASK 0x68000000 ++#define ADDLIC_ONE_REG_MASK 0x68020000 ++#define ADDLIK_ONE_REG_MASK 0x68040000 ++#define ADDLIKC_ONE_REG_MASK 0x68060000 ++#define RSUBLI_ONE_REG_MASK 0x68010000 ++#define RSUBLIC_ONE_REG_MASK 0x68030000 ++#define RSUBLIK_ONE_REG_MASK 0x68050000 ++#define RSUBLIKC_ONE_REG_MASK 0x68070000 ++#define ORLI_ONE_REG_MASK 0x68100000 ++#define ANDLI_ONE_REG_MASK 0x68110000 ++#define XORLI_ONE_REG_MASK 0x68120000 ++#define ANDLNI_ONE_REG_MASK 0x68130000 ++#define ADDLI_MASK 0x20000000 ++#define ADDLIC_MASK 0x28000000 ++#define ADDLIK_MASK 0x30000000 ++#define ADDLIKC_MASK 0x38000000 ++#define RSUBLI_MASK 0x24000000 ++#define RSUBLIC_MASK 0x2C000000 ++#define RSUBLIK_MASK 0x34000000 ++#define RSUBLIKC_MASK 0x3C000000 ++#define ANDLI_MASK 0xA4000000 ++#define ANDLNI_MASK 0xAC000000 ++#define ORLI_MASK 0xA0000000 ++#define XORLI_MASK 0xA8000000 ++ ++ + /* New Mask for msrset, msrclr insns. */ + #define OPCODE_MASK_H23N 0xFC1F8000 /* High 6 and bits 11 - 16. */ + /* Mask for mbar insn. */ +@@ -123,7 +152,7 @@ + #define DELAY_SLOT 1 + #define NO_DELAY_SLOT 0 + +-#define MAX_OPCODES 412 ++#define MAX_OPCODES 424 + + const struct op_code_struct + { +@@ -452,13 +481,21 @@ const struct op_code_struct + {"cmpl", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000101, OPCODE_MASK_H4, cmpl, arithmetic_inst }, + {"cmplu", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x14000103, OPCODE_MASK_H4, cmplu, arithmetic_inst }, + {"addli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x20000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68000000, OPCODE_MASK_LIMM, addli, arithmetic_inst }, + {"rsubli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x24000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsubli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68010000, OPCODE_MASK_LIMM, rsubli, arithmetic_inst }, + {"addlic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x28000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addlic", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68020000, OPCODE_MASK_LIMM, addlic, arithmetic_inst }, + {"rsublic", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x2C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsublic", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68030000, OPCODE_MASK_LIMM, rsublic, arithmetic_inst }, + {"addlik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x30000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addlik", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68040000, OPCODE_MASK_LIMM, addlik, arithmetic_inst }, + {"rsublik", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x34000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsublik", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68050000, OPCODE_MASK_LIMM, rsublik, arithmetic_inst }, + {"addlikc", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x38000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"addlikc", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68060000, OPCODE_MASK_LIMM, addlikc, arithmetic_inst }, + {"rsublikc",INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x3C000000, OPCODE_MASK_H, invalid_inst, arithmetic_inst }, /* Identical to 32-bit */ ++ {"rsublikc", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68070000, OPCODE_MASK_LIMM, rsublikc, arithmetic_inst }, + {"mull", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x40000100, OPCODE_MASK_H4, mull, mult_inst }, + {"bslll", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000500, OPCODE_MASK_H3, bslll, barrel_shift_inst }, + {"bslra", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x44000300, OPCODE_MASK_H3, bslra, barrel_shift_inst }, +@@ -509,9 +546,13 @@ const struct op_code_struct + {"beaged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00000, OPCODE_MASK_H14, beaged, branch_inst }, + {"bealged", INST_TYPE_R1_R2, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x9FA00100, OPCODE_MASK_H14, bealged, branch_inst }, + {"orli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA0000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"orli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68100000, OPCODE_MASK_LIMM, orli, arithmetic_inst }, + {"andli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA4000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"andli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68110000, OPCODE_MASK_LIMM, andli, arithmetic_inst }, + {"xorli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xA8000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"xorli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68120000, OPCODE_MASK_LIMM, xorli, arithmetic_inst }, + {"andnli", INST_TYPE_RD_R1_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xAC000000, OPCODE_MASK_H, invalid_inst, logical_inst }, /* Identical to 32-bit */ ++ {"andnli", INST_TYPE_RD_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL,0x68130000, OPCODE_MASK_LIMM, andnli, arithmetic_inst }, + {"imml", INST_TYPE_IMML, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB2000000, OPCODE_MASK_H8, imml, immediate_inst }, + {"breai", INST_TYPE_IMM, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8010000, OPCODE_MASK_H12, breai, branch_inst }, + {"breaid", INST_TYPE_IMM, INST_PC_OFFSET, DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8110000, OPCODE_MASK_H12, breaid, branch_inst }, +Index: gdb-14.2/opcodes/microblaze-opcm.h +=================================================================== +--- gdb-14.2.orig/opcodes/microblaze-opcm.h ++++ gdb-14.2/opcodes/microblaze-opcm.h +@@ -62,7 +62,9 @@ enum microblaze_instr + eaputd, teaputd, ecaputd, tecaputd, neaputd, tneaputd, necaputd, tnecaputd, + + /* 64-bit instructions */ +- addl, rsubl, addlc, rsublc, addlk, rsublk, addlkc, rsublkc, cmpl, cmplu, mull, ++ addl, addli, addlic, addlik, addlikc, rsubl, rsubli, rsublic, rsublik, rsublikc, ++ addlc, rsublc, addlk, rsublk, addlkc, rsublkc, cmpl, cmplu, mull, ++ andli, andnli, orli, xorli, + bslll, bslra, bslrl, bsllli, bslrai, bslrli, bslefi, bslifi, orl, andl, xorl, + andnl, pcmplbf, pcmpleq, pcmplne, srla, srlc, srll, sextl8, sextl16, sextl32, + brea, bread, breald, beaeq, bealeq, beaeqd, bealeqd, beane, bealne, beaned, +@@ -167,5 +169,6 @@ enum microblaze_instr_type + + /* Imm mask for msrset, msrclr instructions. */ + #define IMM15_MASK 0x00007FFF ++#define IMM16_MASK 0x0000FFFF + + #endif /* MICROBLAZE-OPCM */ diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0030-double-imml-generation-for-64-bit-values.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0030-double-imml-generation-for-64-bit-values.patch new file mode 100644 index 000000000..72b9cc9fa --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0030-double-imml-generation-for-64-bit-values.patch @@ -0,0 +1,29 @@ +From 6967f52fe0ebebb4bdf437cb1e683d9e87a013ff Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 26 Aug 2019 15:29:42 +0530 +Subject: [PATCH 30/54] double imml generation for 64 bit values. + +Conflicts: + gas/config/tc-microblaze.c + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 321 ++++++++++++++++++++++++++++++------- + opcodes/microblaze-opc.h | 4 +- + 2 files changed, 262 insertions(+), 63 deletions(-) + +Index: gdb-14.2/opcodes/microblaze-opc.h +=================================================================== +--- gdb-14.2.orig/opcodes/microblaze-opc.h ++++ gdb-14.2/opcodes/microblaze-opc.h +@@ -634,8 +634,8 @@ char pvr_register_prefix[] = "rpvr"; + #define MIN_IMM6_WIDTH ((int) 0x00000001) + #define MAX_IMM6_WIDTH ((int) 0x00000040) + +-#define MIN_IMML ((long long) 0xffffff8000000000L) +-#define MAX_IMML ((long long) 0x0000007fffffffffL) ++#define MIN_IMML ((long long) -9223372036854775808) ++#define MAX_IMML ((long long) 9223372036854775807) + + #endif /* MICROBLAZE_OPC */ + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0035-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0035-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch new file mode 100644 index 000000000..700ec4c3b --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0035-ld-emulparams-elf64microblaze-Fix-emulation-generati.patch @@ -0,0 +1,44 @@ +From 9ff4551a70734606139f3ecd146cf0a1c45e0fb0 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 8 Nov 2021 22:01:23 +0530 +Subject: [PATCH 35/54] ld/emulparams/elf64microblaze: Fix emulation generation + +Compilation fails when building ld-new with: + +ldemul.o:(.data.rel+0x820): undefined reference to `ld_elf64microblazeel_emulation' +ldemul.o:(.data.rel+0x828): undefined reference to `ld_elf64microblaze_emulation' + +The error appears to be that the elf64 files were referencing the elf32 emulation. + +Signed-off-by: Mark Hatle +Signed-off-by: Aayush Misra +--- + ld/emulparams/elf64microblaze.sh | 2 +- + ld/emulparams/elf64microblazeel.sh | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/ld/emulparams/elf64microblaze.sh b/ld/emulparams/elf64microblaze.sh +index 9c7b0eb7080..7b4c7c411bd 100644 +--- a/ld/emulparams/elf64microblaze.sh ++++ b/ld/emulparams/elf64microblaze.sh +@@ -19,5 +19,5 @@ NOP=0x80000000 + #$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} + #OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' + +-TEMPLATE_NAME=elf32 ++TEMPLATE_NAME=elf + #GENERATE_SHLIB_SCRIPT=yes +diff --git a/ld/emulparams/elf64microblazeel.sh b/ld/emulparams/elf64microblazeel.sh +index 9c7b0eb7080..7b4c7c411bd 100644 +--- a/ld/emulparams/elf64microblazeel.sh ++++ b/ld/emulparams/elf64microblazeel.sh +@@ -19,5 +19,5 @@ NOP=0x80000000 + #$@{RELOCATING+ PROVIDE (__stack = 0x7000);@} + #OTHER_RELOCATING_SECTIONS='PROVIDE (_stack = _end + 0x1000);' + +-TEMPLATE_NAME=elf32 ++TEMPLATE_NAME=elf + #GENERATE_SHLIB_SCRIPT=yes +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0036-Invalid-data-offsets-pointer-after-relaxation.-Propo.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0036-Invalid-data-offsets-pointer-after-relaxation.-Propo.patch new file mode 100644 index 000000000..88c0dc4ea --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0036-Invalid-data-offsets-pointer-after-relaxation.-Propo.patch @@ -0,0 +1,79 @@ +From a233cd9a21bc94c47c1d33cc10a9e24a5d5b8126 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 24 Jan 2022 16:04:07 +0530 +Subject: [PATCH 36/54] Invalid data offsets (pointer) after relaxation. + Proposed patch from community member (dednev@rambler.ru) against 2021.1 + [CR-1115232] + +Signed-off-by: Aayush Misra +--- + bfd/elf32-microblaze.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c +index 6ba28e757be..7a4d35493e9 100644 +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -2174,6 +2174,9 @@ microblaze_elf_relax_section (bfd *abfd, + { + unsigned int val; + ++ if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* hax: We only do the following fixup for debug location lists. */ +@@ -2213,6 +2216,9 @@ microblaze_elf_relax_section (bfd *abfd, + } + if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)// || ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64) + { ++ if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* Look at the reloc only if the value has been resolved. */ +@@ -2245,6 +2251,9 @@ microblaze_elf_relax_section (bfd *abfd, + } + else if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32_SYM_OP_SYM) + { ++ if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* Look at the reloc only if the value has been resolved. */ +@@ -2282,6 +2291,9 @@ microblaze_elf_relax_section (bfd *abfd, + || (ELF32_R_TYPE (irelscan->r_info) + == (int) R_MICROBLAZE_TEXTREL_32_LO)) + { ++ if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* Look at the reloc only if the value has been resolved. */ +@@ -2328,6 +2340,9 @@ microblaze_elf_relax_section (bfd *abfd, + || (ELF32_R_TYPE (irelscan->r_info) + == (int) R_MICROBLAZE_TEXTREL_64)) + { ++ if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* Look at the reloc only if the value has been resolved. */ +@@ -2362,6 +2377,9 @@ microblaze_elf_relax_section (bfd *abfd, + } + else if (ELF32_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_64_PCREL) + { ++ if (ELF32_R_SYM (irelscan->r_info) >= symtab_hdr->sh_info) ++ continue; ++ + isym = isymbuf + ELF32_R_SYM (irelscan->r_info); + + /* Look at the reloc only if the value has been resolved. */ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0037-Double-free-with-ld-no-keep-memory.-Proposed-patches.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0037-Double-free-with-ld-no-keep-memory.-Proposed-patches.patch new file mode 100644 index 000000000..3cae48dc0 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0037-Double-free-with-ld-no-keep-memory.-Proposed-patches.patch @@ -0,0 +1,107 @@ +From 2d0e4a0b3a9ce2ffebc5892cf34219ac01a2475e Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 24 Jan 2022 16:59:19 +0530 +Subject: [PATCH 37/54] Double free with ld --no-keep-memory. Proposed patches + from the community member (dednev@rambler.ru) for 2021.1. [CR-1115233] + +Conflicts: + bfd/elf32-microblaze.c + bfd/elf64-microblaze.c + +Signed-off-by: Aayush Misra +--- + bfd/elf32-microblaze.c | 40 ++++++++++++++++++++++------------------ + 1 file changed, 22 insertions(+), 18 deletions(-) + +diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c +index 7a4d35493e9..554a80ae0e4 100644 +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -1881,10 +1881,8 @@ microblaze_elf_relax_section (bfd *abfd, + { + Elf_Internal_Shdr *symtab_hdr; + Elf_Internal_Rela *internal_relocs; +- Elf_Internal_Rela *free_relocs = NULL; + Elf_Internal_Rela *irel, *irelend; + bfd_byte *contents = NULL; +- bfd_byte *free_contents = NULL; + int rel_count; + unsigned int shndx; + size_t i, sym_index; +@@ -1928,8 +1926,6 @@ microblaze_elf_relax_section (bfd *abfd, + internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory); + if (internal_relocs == NULL) + goto error_return; +- if (! link_info->keep_memory) +- free_relocs = internal_relocs; + + sdata->relax_count = 0; + sdata->relax = (struct relax_table *) bfd_malloc ((sec->reloc_count + 1) +@@ -1957,7 +1953,6 @@ microblaze_elf_relax_section (bfd *abfd, + contents = (bfd_byte *) bfd_malloc (sec->size); + if (contents == NULL) + goto error_return; +- free_contents = contents; + + if (!bfd_get_section_contents (abfd, sec, contents, + (file_ptr) 0, sec->size)) +@@ -2473,25 +2468,26 @@ microblaze_elf_relax_section (bfd *abfd, + } + + elf_section_data (sec)->relocs = internal_relocs; +- free_relocs = NULL; + + elf_section_data (sec)->this_hdr.contents = contents; +- free_contents = NULL; + + symtab_hdr->contents = (bfd_byte *) isymbuf; + } + +- free (free_relocs); +- free_relocs = NULL; ++ if (internal_relocs != NULL ++ && elf_section_data (sec)->relocs != internal_relocs) ++ free (internal_relocs); + +- if (free_contents != NULL) +- { +- if (!link_info->keep_memory) +- free (free_contents); ++ if (contents != NULL ++ && elf_section_data (sec)->this_hdr.contents != contents) ++ { ++ if (! link_info->keep_memory) ++ free (contents); + else +- /* Cache the section contents for elf_link_input_bfd. */ +- elf_section_data (sec)->this_hdr.contents = contents; +- free_contents = NULL; ++ { ++ /* Cache the section contents for elf_link_input_bfd. */ ++ elf_section_data (sec)->this_hdr.contents = contents; ++ } + } + + if (sdata->relax_count == 0) +@@ -2505,8 +2501,16 @@ microblaze_elf_relax_section (bfd *abfd, + return true; + + error_return: +- free (free_relocs); +- free (free_contents); ++ ++ if (isymbuf != NULL ++ && symtab_hdr->contents != (unsigned char *) isymbuf) ++ free (isymbuf); ++ if (internal_relocs != NULL ++ && elf_section_data (sec)->relocs != internal_relocs) ++ free (internal_relocs); ++ if (contents != NULL ++ && elf_section_data (sec)->this_hdr.contents != contents) ++ free (contents); + free (sdata->relax); + sdata->relax = NULL; + sdata->relax_count = 0; +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0038-MB-binutils-Upstream-port-issues.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0038-MB-binutils-Upstream-port-issues.patch new file mode 100644 index 000000000..a27a98074 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0038-MB-binutils-Upstream-port-issues.patch @@ -0,0 +1,83 @@ +From 06e678ebb6c136c85f73ba8a4a064f9050ae47ce Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Sun, 28 Nov 2021 17:17:15 +0530 +Subject: [PATCH 38/54] MB binutils Upstream port issues. + +It's resolving the seg faults with ADDLIK +Conflicts: + bfd/elf64-microblaze.c + +Signed-off-by: Aayush Misra +--- + gas/config/tc-microblaze.c | 2 +- + opcodes/microblaze-dis.c | 12 ++++++------ + opcodes/microblaze-opc.h | 2 +- + 3 files changed, 8 insertions(+), 8 deletions(-) + +Index: gdb-14.2/opcodes/microblaze-dis.c +=================================================================== +--- gdb-14.2.orig/opcodes/microblaze-dis.c ++++ gdb-14.2/opcodes/microblaze-dis.c +@@ -153,7 +153,7 @@ get_field_imm16 (struct string_buf *buf, + + static char * + get_field_special (struct string_buf *buf, long instr, +- const struct op_code_struct *op) ++ struct op_code_struct *op) + { + char *p = strbuf (buf); + char *spr; +@@ -226,11 +226,11 @@ get_field_special (struct string_buf *bu + static unsigned long + read_insn_microblaze (bfd_vma memaddr, + struct disassemble_info *info, +- const struct op_code_struct **opr) ++ struct op_code_struct **opr) + { + unsigned char ibytes[4]; + int status; +- const struct op_code_struct *op; ++ struct op_code_struct *op; + unsigned long inst; + + status = info->read_memory_func (memaddr, ibytes, 4, info); +@@ -266,7 +266,7 @@ print_insn_microblaze (bfd_vma memaddr, + fprintf_ftype print_func = info->fprintf_func; + void *stream = info->stream; + unsigned long inst, prev_inst; +- const struct op_code_struct *op, *pop; ++ struct op_code_struct *op, *pop; + int immval = 0; + bool immfound = false; + static bfd_vma prev_insn_addr = -1; /* Init the prev insn addr. */ +@@ -518,7 +518,7 @@ get_insn_microblaze (long inst, + enum microblaze_instr_type *insn_type, + short *delay_slots) + { +- const struct op_code_struct *op; ++ struct op_code_struct *op; + *isunsignedimm = false; + + /* Just a linear search of the table. */ +@@ -560,7 +560,7 @@ microblaze_get_target_address (long inst + bool *targetvalid, + bool *unconditionalbranch) + { +- const struct op_code_struct *op; ++ struct op_code_struct *op; + long targetaddr = 0; + + *unconditionalbranch = false; +Index: gdb-14.2/opcodes/microblaze-opc.h +=================================================================== +--- gdb-14.2.orig/opcodes/microblaze-opc.h ++++ gdb-14.2/opcodes/microblaze-opc.h +@@ -154,7 +154,7 @@ + + #define MAX_OPCODES 424 + +-const struct op_code_struct ++struct op_code_struct + { + const char * name; + short inst_type; /* Registers and immediate values involved. */ diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0039-Initial-port-of-core-reading-support-Added-support-f.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0039-Initial-port-of-core-reading-support-Added-support-f.patch new file mode 100644 index 000000000..3372de278 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0039-Initial-port-of-core-reading-support-Added-support-f.patch @@ -0,0 +1,89 @@ +From e907440fcfce0828efa7b059ef0c6d61c7736d02 Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Mon, 10 Oct 2022 16:37:53 +0530 +Subject: [PATCH 39/54] Initial port of core reading support Added support for + reading notes in linux core dumps Support for reading of PRSTATUS and PSINFO + information for rebuilding ".reg" sections of core dumps at run time. + +Signed-off-by: David Holsgrove +Signed-off-by: Nathan Rossi +Signed-off-by: Mahesh Bodapati +Signed-off-by: Aayush Misra +--- + gdb/microblaze-linux-tdep.c | 11 +++++++++++ + gdb/microblaze-tdep.c | 37 +++++++++++++++++++++++++++++++++++++ + 2 files changed, 48 insertions(+) + +diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c +index 39592a43f7c..20daef2ccd4 100644 +--- a/gdb/microblaze-linux-tdep.c ++++ b/gdb/microblaze-linux-tdep.c +@@ -193,6 +193,17 @@ microblaze_linux_init_abi (struct gdbarch_info info, + set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); + set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); + ++ /* BFD target for core files. */ ++ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblaze"); ++ else ++ set_gdbarch_gcore_bfd_target (gdbarch, "elf32-microblazeel"); ++ ++ ++ /* Shared library handling. */ ++ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); ++ set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); ++ + /* Enable TLS support. */ + set_gdbarch_fetch_tls_load_module_address (gdbarch, + svr4_fetch_objfile_link_map); +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index d4b9ef837e5..363fee34040 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -957,6 +957,43 @@ make_regs (struct gdbarch *arch) + } + #endif + ++void ++microblaze_supply_gregset (const struct regset *regset, ++ struct regcache *regcache, ++ int regnum, const void *gregs) ++{ ++ const unsigned int *regs = (const unsigned int *)gregs; ++ if (regnum >= 0) ++ regcache->raw_supply (regnum, regs + regnum); ++ ++ if (regnum == -1) { ++ int i; ++ ++ for (i = 0; i < 50; i++) { ++ regcache->raw_supply (i, regs + i); ++ } ++ } ++} ++ ++ ++/* Return the appropriate register set for the core section identified ++ by SECT_NAME and SECT_SIZE. */ ++ ++static void ++microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, ++ iterate_over_regset_sections_cb *cb, ++ void *cb_data, ++ const struct regcache *regcache) ++{ ++ struct microblaze_gdbarch_tdep *tdep =(microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); ++ ++ cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data); ++ ++ cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data); ++} ++ ++ ++ + static struct gdbarch * + microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + { +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0040-Fix-build-issues-after-Xilinx-2023.2-binutils-merge.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0040-Fix-build-issues-after-Xilinx-2023.2-binutils-merge.patch new file mode 100644 index 000000000..3ea09e7e8 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0040-Fix-build-issues-after-Xilinx-2023.2-binutils-merge.patch @@ -0,0 +1,185 @@ +From 73b456c4d8f64ec01b170a49330e6de66716eb1a Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 14 Mar 2024 10:41:33 +0530 +Subject: [PATCH 40/54] Fix build issues after Xilinx 2023.2 binutils merge + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + bfd/bfd-in2.h | 10 ------ + gdb/microblaze-tdep.c | 71 ++++++++++++++-------------------------- + opcodes/microblaze-dis.c | 10 ------ + 3 files changed, 25 insertions(+), 66 deletions(-) + +diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h +index 9dcf233f19f..4b022dbfba1 100644 +--- a/bfd/bfd-in2.h ++++ b/bfd/bfd-in2.h +@@ -6473,11 +6473,6 @@ done here - only used for relaxing */ + * +done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_64_PCREL, + +-/* This is a 64 bit reloc that stores the 32 bit relative +- * +value in two words (with an imml instruction). No relocation is +- * +done here - only used for relaxing */ +- BFD_RELOC_MICROBLAZE_64, +- + /* This is a 64 bit reloc that stores the 32 bit relative + * +value in two words (with an imml instruction). No relocation is + * +done here - only used for relaxing */ +@@ -6503,11 +6498,6 @@ value in two words (with an imml instruction). The relocation is + PC-relative GOT offset */ + BFD_RELOC_MICROBLAZE_64_GPC, + +-/* This is a 64 bit reloc that stores the 32 bit pc relative +-value in two words (with an imml instruction). The relocation is +-PC-relative GOT offset */ +- BFD_RELOC_MICROBLAZE_64_GPC, +- + /* This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imm instruction). The relocation is + GOT offset */ +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 363fee34040..818306f2197 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -70,6 +70,7 @@ static const char *microblaze_abi_string; + static const char *const microblaze_abi_strings[] = { + "auto", + "m64", ++ NULL + }; + + enum microblaze_abi +@@ -105,7 +106,7 @@ global_microblaze_abi (void) + if (microblaze_abi_strings[i] == microblaze_abi_string) + return (enum microblaze_abi) i; + +-// internal_error (__FILE__, __LINE__, _("unknown ABI string")); ++ internal_error (__FILE__, __LINE__, _("unknown ABI string")); + } + + static void +@@ -894,16 +895,31 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) + } + + static void +-microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) ++microblaze_register_g_packet_guesses (struct gdbarch *gdbarch, enum microblaze_abi abi) + { + +- register_remote_g_packet_guess (gdbarch, +- 4 * MICROBLAZE_NUM_CORE_REGS, +- tdesc_microblaze64); ++ if (abi == MICROBLAZE_ABI_M64) ++ { ++ ++ register_remote_g_packet_guess (gdbarch, ++ 8 * MICROBLAZE_NUM_CORE_REGS, ++ tdesc_microblaze64); ++ ++ register_remote_g_packet_guess (gdbarch, ++ 8 * MICROBLAZE_NUM_REGS, ++ tdesc_microblaze64_with_stack_protect); ++ } ++ else ++ { ++ ++ register_remote_g_packet_guess (gdbarch, ++ 4 * MICROBLAZE_NUM_CORE_REGS, ++ tdesc_microblaze); + +- register_remote_g_packet_guess (gdbarch, +- 4 * MICROBLAZE_NUM_REGS, +- tdesc_microblaze64_with_stack_protect); ++ register_remote_g_packet_guess (gdbarch, ++ 4 * MICROBLAZE_NUM_REGS, ++ tdesc_microblaze_with_stack_protect); ++ } + } + + void +@@ -957,43 +973,6 @@ make_regs (struct gdbarch *arch) + } + #endif + +-void +-microblaze_supply_gregset (const struct regset *regset, +- struct regcache *regcache, +- int regnum, const void *gregs) +-{ +- const unsigned int *regs = (const unsigned int *)gregs; +- if (regnum >= 0) +- regcache->raw_supply (regnum, regs + regnum); +- +- if (regnum == -1) { +- int i; +- +- for (i = 0; i < 50; i++) { +- regcache->raw_supply (i, regs + i); +- } +- } +-} +- +- +-/* Return the appropriate register set for the core section identified +- by SECT_NAME and SECT_SIZE. */ +- +-static void +-microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, +- iterate_over_regset_sections_cb *cb, +- void *cb_data, +- const struct regcache *regcache) +-{ +- struct microblaze_gdbarch_tdep *tdep =(microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); +- +- cb(".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, tdep->gregset, NULL, cb_data); +- +- cb(".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data); +-} +- +- +- + static struct gdbarch * + microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + { +@@ -1134,7 +1113,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + + set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc); + +- //microblaze_register_g_packet_guesses (gdbarch); ++ // microblaze_register_g_packet_guesses (gdbarch, microblaze_abi); + + frame_base_set_default (gdbarch, µblaze_frame_base); + +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index 540ddecafd4..00712d5eaf1 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c +@@ -466,10 +466,6 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + print_func (stream, "\t%s, %s", get_field_r1 (&buf, inst), + get_field_r2 (&buf, inst)); + break; +- case INST_TYPE_IMML: +- print_func (stream, "\t%s", get_field_imml (&buf, inst)); +- /* TODO: Also print symbol */ +- break; + case INST_TYPE_RD_IMM15: + print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), + get_field_imm15 (&buf, inst)); +@@ -484,12 +480,6 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + case INST_TYPE_RD_IMML: + print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst)); + break; +- /* For bit field insns. */ +- case INST_TYPE_RD_R1_IMMW_IMMS: +- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst), get_field_r1(&buf, inst), +- get_field_immw (&buf, inst), get_field_imms (&buf, inst)); +- break; +- /* For bit field insns. */ + case INST_TYPE_RD_R1_IMMW_IMMS: + print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst)); + break; +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0041-disable-truncated-register-warning-gdb-remote.c.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0041-disable-truncated-register-warning-gdb-remote.c.patch new file mode 100644 index 000000000..6f5a5f1e5 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0041-disable-truncated-register-warning-gdb-remote.c.patch @@ -0,0 +1,26 @@ +From a96aee31c41e4d851531100a0716401c3464f6ef Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 14 Mar 2024 15:44:56 +0530 +Subject: [PATCH 41/54] disable truncated register warning (gdb/remote.c) + +Signed-off-by: Aayush Misra +--- + gdb/remote.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/gdb/remote.c b/gdb/remote.c +index ae08c980efc..8055c8f62e6 100644 +--- a/gdb/remote.c ++++ b/gdb/remote.c +@@ -8678,7 +8678,7 @@ remote_target::process_g_packet (struct regcache *regcache) + if (rsa->regs[i].pnum == -1) + continue; + +- if (offset >= sizeof_g_packet) ++ if (offset >= sizeof_g_packet || (offset + reg_size > sizeof_g_packet)) + rsa->regs[i].in_g_packet = 0; + else if (offset + reg_size > sizeof_g_packet) + error (_("Truncated register %d in remote 'g' packet"), i); +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0042-Fix-unresolved-conflicts-from-binutils_2_42_merge.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0042-Fix-unresolved-conflicts-from-binutils_2_42_merge.patch new file mode 100644 index 000000000..0b5f27b4b --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0042-Fix-unresolved-conflicts-from-binutils_2_42_merge.patch @@ -0,0 +1,42 @@ +From f9ffc37f48bd9213e89c8821cd07fc679e113007 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 28 Mar 2024 10:20:48 +0530 +Subject: [PATCH 42/54] Fix unresolved conflicts from binutils_2_42_merge + +opcodes/microblaze-dis.c + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + opcodes/microblaze-dis.c | 15 ++++++++++----- + 1 file changed, 10 insertions(+), 5 deletions(-) + +diff --git a/opcodes/microblaze-dis.c b/opcodes/microblaze-dis.c +index 00712d5eaf1..31dbad46b75 100644 +--- a/opcodes/microblaze-dis.c ++++ b/opcodes/microblaze-dis.c +@@ -478,11 +478,16 @@ print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info) + case INST_TYPE_NONE: + break; + case INST_TYPE_RD_IMML: +- print_func (stream, "\t%s, %s", get_field_rd (&buf, inst), get_field_imm16 (&buf, inst)); +- break; +- case INST_TYPE_RD_R1_IMMW_IMMS: +- print_func (stream, "\t%s, %s, %s, %s", get_field_rd (&buf, inst),get_field_r1(&buf, inst),get_field_immw (&buf, inst), get_field_imms (&buf, inst)); +- break; ++ print_func (stream, "\t%s, %s", ++ get_field_rd (&buf, inst), get_field_imm16 (&buf, inst)); ++ break; ++ case INST_TYPE_RD_R1_IMMW_IMMS: ++ print_func (stream, "\t%s, %s, %s, %s", ++ get_field_rd (&buf, inst), ++ get_field_r1(&buf, inst), ++ get_field_immw (&buf, inst), ++ get_field_imms (&buf, inst)); ++ break; + /* For tuqula instruction */ + case INST_TYPE_RD: + print_func (stream, "\t%s", get_field_rd (&buf, inst)); +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0043-microblaze_gdbarch_init-set-microblaze_abi-based-on-.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0043-microblaze_gdbarch_init-set-microblaze_abi-based-on-.patch new file mode 100644 index 000000000..5e1fb44f4 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0043-microblaze_gdbarch_init-set-microblaze_abi-based-on-.patch @@ -0,0 +1,177 @@ +From 03df31becbc7dc6d35189fec3b4b2c7dfd3a8103 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 28 Mar 2024 10:59:40 +0530 +Subject: [PATCH 43/54] microblaze_gdbarch_init: set microblaze_abi based on + wanted_abi and found_abi + +Earlier found_abi was declared but not set, instead gdbarch_info info +was checked every time. Also, microblaze_abi remained undefined for 32-bit +machines. As a result, gdb would show 64-bit registers when connecting +to 32-bit targets with all register values garbled (r5 ended up in r2). +This defect is fixed. found_abi is set from gdbarch_info, microblaze_abi +is set based on wanted_abi and found_abi. Now upon connecting to a 32-bit +remote target (mb-qemu) registers have the correct 32-bit size. + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/microblaze-tdep.c | 73 +++++++++++++++++++------------------------ + 1 file changed, 33 insertions(+), 40 deletions(-) + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 818306f2197..47863819724 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -116,7 +116,7 @@ show_microblaze_abi (struct ui_file *file, + const char *ignored_value) + { + enum microblaze_abi global_abi = global_microblaze_abi (); +- enum microblaze_abi actual_abi = microblaze_abi (target_gdbarch ()); ++ enum microblaze_abi actual_abi = microblaze_abi (current_inferior ()->arch ()); + const char *actual_abi_str = microblaze_abi_strings[actual_abi]; + + #if 1 +@@ -203,6 +203,13 @@ microblaze_register_name (struct gdbarch *gdbarch, int regnum) + static struct type * + microblaze_register_type (struct gdbarch *gdbarch, int regnum) + { ++ ++ int mb_reg_size = microblaze_abi_regsize(gdbarch); ++ ++ if (gdbarch_debug) ++ gdb_printf (gdb_stdlog, "microblaze_register_type: reg_size = %d\n", ++ mb_reg_size); ++ + if (regnum == MICROBLAZE_SP_REGNUM) + return builtin_type (gdbarch)->builtin_data_ptr; + +@@ -980,34 +987,38 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + enum microblaze_abi microblaze_abi, found_abi, wanted_abi; + const struct target_desc *tdesc = info.target_desc; + ++ /* If there is already a candidate, use it. */ ++ arches = gdbarch_list_lookup_by_info (arches, &info); ++ if ((arches != NULL) && (microblaze_abi != MICROBLAZE_ABI_M64)) ++ return arches->gdbarch; ++ + /* What has the user specified from the command line? */ + wanted_abi = global_microblaze_abi (); + if (gdbarch_debug) + gdb_printf (gdb_stdlog, "microblaze_gdbarch_init: wanted_abi = %d\n", + wanted_abi); ++ ++ found_abi = MICROBLAZE_ABI_AUTO; ++ ++ if (info.bfd_arch_info->mach == bfd_mach_microblaze64) ++ found_abi = MICROBLAZE_ABI_M64; ++ + if (wanted_abi != MICROBLAZE_ABI_AUTO) + microblaze_abi = wanted_abi; +- +- /* If there is already a candidate, use it. */ +- arches = gdbarch_list_lookup_by_info (arches, &info); +- if ((arches != NULL) && (microblaze_abi != MICROBLAZE_ABI_M64)) +- return arches->gdbarch; ++ else ++ microblaze_abi = found_abi; + + if (microblaze_abi == MICROBLAZE_ABI_M64) + { +- tdesc = tdesc_microblaze64; +- reg_size = 8; ++ tdesc = tdesc_microblaze64; ++ reg_size = 8; + } +- if (tdesc == NULL) ++ else + { +- if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) +- { +- tdesc = tdesc_microblaze64; +- reg_size = 8; +- } +- else +- tdesc = tdesc_microblaze; ++ tdesc = tdesc_microblaze; ++ reg_size = 4; + } ++ + /* Check any target description for validity. */ + if (tdesc_has_registers (tdesc)) + { +@@ -1015,7 +1026,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + int valid_p; + int i; + +- if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) ++ if (microblaze_abi == MICROBLAZE_ABI_M64) + feature = tdesc_find_feature (tdesc, + "org.gnu.gdb.microblaze64.core"); + else +@@ -1029,7 +1040,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + for (i = 0; i < MICROBLAZE_NUM_REGS; i++) + valid_p &= tdesc_numbered_register (feature, tdesc_data.get(), i, + microblaze_register_names[i]); +- if ((info.bfd_arch_info->mach == bfd_mach_microblaze64) || (microblaze_abi == MICROBLAZE_ABI_M64)) ++ if (microblaze_abi == MICROBLAZE_ABI_M64) + feature = tdesc_find_feature (tdesc, + "org.gnu.gdb.microblaze64.stack-protect"); + else +@@ -1075,15 +1086,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + + /* Register set. + make_regs (gdbarch); */ +- switch (info.bfd_arch_info->mach) +- { +- case bfd_mach_microblaze64: +- set_gdbarch_ptr_bit (gdbarch, 64); +- break; +- } +- if(microblaze_abi == MICROBLAZE_ABI_M64) ++ if (microblaze_abi == MICROBLAZE_ABI_M64) + set_gdbarch_ptr_bit (gdbarch, 64); +- ++ else ++ set_gdbarch_ptr_bit (gdbarch, 32); ++ + /* Map Dwarf2 registers to GDB registers. */ + set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); + +@@ -1105,8 +1112,6 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + microblaze_breakpoint::bp_from_kind); + // set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); + +-// set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); +- + set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); + + set_gdbarch_frame_args_skip (gdbarch, 8); +@@ -1145,9 +1150,6 @@ _initialize_microblaze_tdep () + + gdbarch_register (bfd_arch_microblaze, microblaze_gdbarch_init); + +-// static struct cmd_list_element *setmicroblazecmdlist = NULL; +-// static struct cmd_list_element *showmicroblazecmdlist = NULL; +- + /* Add root prefix command for all "set microblaze"/"show microblaze" commands. */ + + add_setshow_prefix_cmd ("microblaze", no_class, +@@ -1155,15 +1157,6 @@ _initialize_microblaze_tdep () + _("Various microblaze specific commands."), + &setmicroblazecmdlist,&showmicroblazecmdlist, + &setlist,&showlist); +-#if 0 +- add_prefix_cmd ("microblaze", no_class, set_microblaze_command, +- _("Various microblaze specific commands."), +- &setmicroblazecmdlist, "set microblaze ", 0, &setlist); +- +- add_prefix_cmd ("microblaze", no_class, show_microblaze_command, +- _("Various microblaze specific commands."), +- &showmicroblazecmdlist, "show microblaze ", 0, &showlist); +-#endif + + /* Allow the user to override the ABI. */ + add_setshow_enum_cmd ("abi", class_obscure, microblaze_abi_strings, +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0044-Start-bfd_mach_microblaze-values-from-0-0-1-instead-.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0044-Start-bfd_mach_microblaze-values-from-0-0-1-instead-.patch new file mode 100644 index 000000000..f949a982c --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0044-Start-bfd_mach_microblaze-values-from-0-0-1-instead-.patch @@ -0,0 +1,32 @@ +From 254bd83017b21301c73e7501c71b2cf128ac18d9 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 28 Mar 2024 11:36:32 +0530 +Subject: [PATCH 44/54] Start bfd_mach_microblaze values from 0 (0,1) instead + of (1,2) + +Before 64-bit support there was only bfd_mach_microblaze (implicitly set to 0), +setting microblaze_mach_microblaze64 to 1 + +Signed-off-by: Aayush Misra +--- + bfd/archures.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/bfd/archures.c b/bfd/archures.c +index 2994a09bc37..e552349319f 100644 +--- a/bfd/archures.c ++++ b/bfd/archures.c +@@ -515,8 +515,8 @@ DESCRIPTION + . bfd_arch_lm32, {* Lattice Mico32. *} + .#define bfd_mach_lm32 1 + . bfd_arch_microblaze,{* Xilinx MicroBlaze. *} +-.#define bfd_mach_microblaze 1 +-.#define bfd_mach_microblaze64 2 ++.#define bfd_mach_microblaze 0 ++.#define bfd_mach_microblaze64 1 + . bfd_arch_kvx, {* Kalray VLIW core of the MPPA processor family *} + .#define bfd_mach_kv3_unknown 0 + .#define bfd_mach_kv3_1 1 +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0045-Fix-build-issues-bfd-reloc.c-add-missing-relocs-used.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0045-Fix-build-issues-bfd-reloc.c-add-missing-relocs-used.patch new file mode 100644 index 000000000..6e4137efd --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0045-Fix-build-issues-bfd-reloc.c-add-missing-relocs-used.patch @@ -0,0 +1,61 @@ +From b2377a83918c814fd3b6ee2cd46a5f413f97a08e Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 28 Mar 2024 15:37:11 +0530 +Subject: [PATCH 45/54] Fix build issues - bfd/reloc.c add missing relocs used + elsewhere + + BFD_RELOC_MICROBLAZE_EA64 + BFD_RELOC_MICROBLAZE_64_GPC + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + bfd/reloc.c | 16 +++++++++++----- + 1 file changed, 11 insertions(+), 5 deletions(-) + +diff --git a/bfd/reloc.c b/bfd/reloc.c +index fc28e27662f..5afe1518cd0 100644 +--- a/bfd/reloc.c ++++ b/bfd/reloc.c +@@ -6672,13 +6672,19 @@ ENUMDOC + This is a 64 bit reloc that stores 64-bit thread pointer relative offset + to two words (uses imml instruction). + ENUM +-BFD_RELOC_MICROBLAZE_64, ++BFD_RELOC_MICROBLAZE_64 + ENUMDOC + This is a 64 bit reloc that stores the 64 bit pc relative + value in two words (with an imml instruction). No relocation is + done here - only used for relaxing + ENUM +-BFD_RELOC_MICROBLAZE_64_PCREL, ++BFD_RELOC_MICROBLAZE_EA64 ++ENUMDOC ++ This is a 64 bit reloc that stores the 64 bit pc relative ++ value in two words (with an imml instruction). No relocation is ++ done here - only used for relaxing ++ENUM ++BFD_RELOC_MICROBLAZE_64_PCREL + ENUMDOC + This is a 32 bit reloc that stores the 32 bit pc relative + value in two words (with an imml instruction). No relocation is +@@ -6721,13 +6727,13 @@ ENUMDOC + value in two words (with an imml instruction). No relocation is + done here - only used for relaxing + ENUM +-BFD_RELOC_MICROBLAZE_64_PCREL, ++BFD_RELOC_MICROBLAZE_64_GOTPC + ENUMDOC +- This is a 32 bit reloc that stores the 32 bit pc relative ++ This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imml instruction). No relocation is + done here - only used for relaxing + ENUM +- BFD_RELOC_MICROBLAZE_64_GOTPC ++ BFD_RELOC_MICROBLAZE_64_GPC + ENUMDOC + This is a 64 bit reloc that stores the 32 bit pc relative + value in two words (with an imml instruction). No relocation is +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0046-Regenerate-bfd-bfd-in2.h-bfd-libbfd.h.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0046-Regenerate-bfd-bfd-in2.h-bfd-libbfd.h.patch new file mode 100644 index 000000000..e9383c6f8 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0046-Regenerate-bfd-bfd-in2.h-bfd-libbfd.h.patch @@ -0,0 +1,125 @@ +From 4d201d0a948ab6160f449d41a50a6794dd3efde7 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 28 Mar 2024 15:47:56 +0530 +Subject: [PATCH 46/54] Regenerate - bfd/bfd-in2.h bfd/libbfd.h + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + bfd/bfd-in2.h | 65 +++++++++++++++++++++++++++++---------------------- + 1 file changed, 37 insertions(+), 28 deletions(-) + +diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h +index 4b022dbfba1..171de10910c 100644 +--- a/bfd/bfd-in2.h ++++ b/bfd/bfd-in2.h +@@ -1771,8 +1771,8 @@ enum bfd_architecture + bfd_arch_lm32, /* Lattice Mico32. */ + #define bfd_mach_lm32 1 + bfd_arch_microblaze,/* Xilinx MicroBlaze. */ +-#define bfd_mach_microblaze 1 +-#define bfd_mach_microblaze64 2 ++#define bfd_mach_microblaze 0 ++#define bfd_mach_microblaze64 1 + bfd_arch_kvx, /* Kalray VLIW core of the MPPA processor family */ + #define bfd_mach_kv3_unknown 0 + #define bfd_mach_kv3_1 1 +@@ -6440,9 +6440,27 @@ the linker could optimize the movq to a leaq if possible. */ + /* Relative offset within page of GOT slot. */ + BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12, + +-/* Address of a GOT entry. */ ++/* Address of a GOT entry. ++ ++This is a 64 bit reloc that stores 64-bit thread pointer relative offset ++to two words (uses imml instruction). */ + BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT, + ++/* This is a 64 bit reloc that stores the 64 bit pc relative ++value in two words (with an imml instruction). No relocation is ++done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64, ++ ++/* This is a 64 bit reloc that stores the 64 bit pc relative ++value in two words (with an imml instruction). No relocation is ++done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_EA64, ++ ++/* This is a 32 bit reloc that stores the 32 bit pc relative ++value in two words (with an imml instruction). No relocation is ++done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64_PCREL, ++ + /* This is a 32 bit reloc for the microblaze that stores the + low 16 bits of a value */ + BFD_RELOC_MICROBLAZE_32_LO, +@@ -6468,34 +6486,19 @@ value in two words (with an imm instruction). No relocation is + done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_32_NONE, + +-/* This is a 64 bit reloc that stores the 32 bit pc relative +- * +value in two words (with an imml instruction). No relocation is +- * +done here - only used for relaxing */ +- BFD_RELOC_MICROBLAZE_64_PCREL, +- +-/* This is a 64 bit reloc that stores the 32 bit relative +- * +value in two words (with an imml instruction). No relocation is +- * +done here - only used for relaxing */ +- BFD_RELOC_MICROBLAZE_EA64, +- +-/* This is a 64 bit reloc that stores the 32 bit pc relative +- * +value in two words (with an imm instruction). No relocation is +- * +done here - only used for relaxing */ +- BFD_RELOC_MICROBLAZE_64_NONE, +- +-/* This is a 64 bit reloc that stores the 32 bit pc relative +- * +value in two words (with an imml instruction). No relocation is +- * +done here - only used for relaxing */ +- BFD_RELOC_MICROBLAZE_64, ++/* This is a 32 bit reloc that stores the 32 bit pc relative ++value in two words (with an imml instruction). No relocation is ++done here - only used for relaxing */ ++ BFD_RELOC_MICROBLAZE_64_NONE, + + /* This is a 64 bit reloc that stores the 32 bit pc relative +-value in two words (with an imm instruction). The relocation is +-PC-relative GOT offset */ ++value in two words (with an imml instruction). No relocation is ++done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_64_GOTPC, + + /* This is a 64 bit reloc that stores the 32 bit pc relative +-value in two words (with an imml instruction). The relocation is +-PC-relative GOT offset */ ++value in two words (with an imml instruction). No relocation is ++done here - only used for relaxing */ + BFD_RELOC_MICROBLAZE_64_GPC, + + /* This is a 64 bit reloc that stores the 32 bit pc relative +@@ -7199,7 +7202,10 @@ assembler and not (currently) written to any object files. */ + BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA, + BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA, + +-/* Tilera TILE-Gx Relocations. */ ++/* Tilera TILE-Gx Relocations. ++ ++This is a 64 bit reloc that stores 64-bit thread pointer relative offset ++to two words (uses imml instruction). */ + BFD_RELOC_TILEGX_HW0, + BFD_RELOC_TILEGX_HW1, + BFD_RELOC_TILEGX_HW2, +@@ -7310,7 +7316,10 @@ assembler and not (currently) written to any object files. */ + BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD, + BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD, + +-/* Linux eBPF relocations. */ ++/* Linux eBPF relocations. ++ ++This is a 64 bit reloc that stores 64-bit thread pointer relative offset ++to two words (uses imml instruction). */ + BFD_RELOC_BPF_64, + BFD_RELOC_BPF_DISP32, + BFD_RELOC_BPF_DISPCALL32, +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0047-gdb-remote.c-revert-earlier-change-to-process_g_pack.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0047-gdb-remote.c-revert-earlier-change-to-process_g_pack.patch new file mode 100644 index 000000000..d31eb8eeb --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0047-gdb-remote.c-revert-earlier-change-to-process_g_pack.patch @@ -0,0 +1,32 @@ +From 2a1036ac7639aa3b67b1f1ad7e1a6e7c4c22704b Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 28 Mar 2024 16:32:22 +0530 +Subject: [PATCH 47/54] gdb/remote.c - revert earlier change to + process_g_packet + +When connecting to remote target, gdb (microblaze-xilinx-elf) was +generating Truncated register 29 error when parsing the g packet, +workaround added being reverted. + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/remote.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/gdb/remote.c b/gdb/remote.c +index 8055c8f62e6..ae08c980efc 100644 +--- a/gdb/remote.c ++++ b/gdb/remote.c +@@ -8678,7 +8678,7 @@ remote_target::process_g_packet (struct regcache *regcache) + if (rsa->regs[i].pnum == -1) + continue; + +- if (offset >= sizeof_g_packet || (offset + reg_size > sizeof_g_packet)) ++ if (offset >= sizeof_g_packet) + rsa->regs[i].in_g_packet = 0; + else if (offset + reg_size > sizeof_g_packet) + error (_("Truncated register %d in remote 'g' packet"), i); +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0048-Fix-build-issues-after-Xilinx-2023.2-binutils-patch-.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0048-Fix-build-issues-after-Xilinx-2023.2-binutils-patch-.patch new file mode 100644 index 000000000..f9cbb4a6b --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0048-Fix-build-issues-after-Xilinx-2023.2-binutils-patch-.patch @@ -0,0 +1,46 @@ +From 6a5887919f00da84c973ec61c59efcd7d0fb120e Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Mon, 1 Apr 2024 16:21:28 +0530 +Subject: [PATCH 48/54] Fix build issues after Xilinx 2023.2 binutils patch + merge + +binutils/readelf.c - duplicate case statement +gas/config/tc-microblaze.c - Missing , between array elements +gas/config/tc-microblaze.c - A whole hunk ended up in wrong function/switch + +Signed-off-by: Aayush Misra +--- + bfd/libbfd.h | 6 +- + binutils/readelf.c | 5 - + gas/config/tc-microblaze.c | 375 +++++++++++++++++++------------------ + 3 files changed, 192 insertions(+), 194 deletions(-) + +Index: gdb-14.2/bfd/libbfd.h +=================================================================== +--- gdb-14.2.orig/bfd/libbfd.h ++++ gdb-14.2/bfd/libbfd.h +@@ -3005,6 +3005,9 @@ static const char *const bfd_reloc_code_ + "BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21", + "BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12", + "BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT", ++ "BFD_RELOC_MICROBLAZE_64", ++ "BFD_RELOC_MICROBLAZE_EA64", ++ "BFD_RELOC_MICROBLAZE_64_PCREL", + "BFD_RELOC_MICROBLAZE_32_LO", + "BFD_RELOC_MICROBLAZE_32_LO_PCREL", + "BFD_RELOC_MICROBLAZE_32_ROSDA", +@@ -3013,13 +3016,12 @@ static const char *const bfd_reloc_code_ + "BFD_RELOC_MICROBLAZE_32_NONE", + "BFD_RELOC_MICROBLAZE_64_NONE", + "BFD_RELOC_MICROBLAZE_64_GOTPC", ++ "BFD_RELOC_MICROBLAZE_64_GPC", + "BFD_RELOC_MICROBLAZE_64_GOT", + "BFD_RELOC_MICROBLAZE_64_PLT", + "BFD_RELOC_MICROBLAZE_64_GOTOFF", + "BFD_RELOC_MICROBLAZE_32_GOTOFF", + "BFD_RELOC_MICROBLAZE_COPY", +- "BFD_RELOC_MICROBLAZE_64", +- "BFD_RELOC_MICROBLAZE_64_PCREL", + "BFD_RELOC_MICROBLAZE_64_TLS", + "BFD_RELOC_MICROBLAZE_64_TLSGD", + "BFD_RELOC_MICROBLAZE_64_TLSLD", diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0049-Add-back-R_MICROBLAZE_NONE-for-linker-relaxation-pro.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0049-Add-back-R_MICROBLAZE_NONE-for-linker-relaxation-pro.patch new file mode 100644 index 000000000..76fcef7dd --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0049-Add-back-R_MICROBLAZE_NONE-for-linker-relaxation-pro.patch @@ -0,0 +1,27 @@ +From bf491bdb2e4d30c14968be096969da700dedfc64 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Wed, 17 Apr 2024 16:14:14 +0530 +Subject: [PATCH 49/54] Add back R_MICROBLAZE_NONE for linker relaxation + processing + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + bfd/elf32-microblaze.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c +index 554a80ae0e4..ec6613b6572 100644 +--- a/bfd/elf32-microblaze.c ++++ b/bfd/elf32-microblaze.c +@@ -2102,6 +2102,7 @@ microblaze_elf_relax_section (bfd *abfd, + irel->r_addend); + } + break; ++ case R_MICROBLAZE_NONE: + case R_MICROBLAZE_32_NONE: + { + /* This was a PC-relative instruction that was +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0050-When-unwinding-pc-value-adjust-return-pc-value.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0050-When-unwinding-pc-value-adjust-return-pc-value.patch new file mode 100644 index 000000000..c9da78c30 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0050-When-unwinding-pc-value-adjust-return-pc-value.patch @@ -0,0 +1,92 @@ +From d8b25fd6d8cac000bb8f5ad65ada949447322fca Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Wed, 1 May 2024 11:12:32 +0530 +Subject: [PATCH 50/54] When unwinding pc value, adjust return pc value + +A call (branch and link) instruction can include a delay slot, the +value of pc stored in the link register for Microblaze architecture +is the pc value corresponding to last executed instruction (call) +in the caller. The return instruction (branch reg) includes an +offset of 8 so that when function returns execution continues from +the address at : link register + 8, as the instruction in delay slot +(link register + 4) is already executed at the time of call. + +Handle this by adjusting pc value during unwind-pc. + +Basically restoring code to do this that seems to have been removed +as part of a gdb patch (gdb patch #8, Xilinx Yocto 2023.2) + +That patch caused hundreds of regressions in gdb testuite, including +gdb.base/advance.exp, which is now fixed. + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/microblaze-tdep.c | 24 ++++++++++++++++++------ + 1 file changed, 18 insertions(+), 6 deletions(-) + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 47863819724..f87e406ada0 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -523,6 +523,12 @@ microblaze_unwind_pc (struct gdbarch *gdbarch, frame_info_ptr next_frame) + { + CORE_ADDR pc; + pc=frame_unwind_register_unsigned (next_frame, MICROBLAZE_PC_REGNUM); ++ /* For sentinel frame, return address is actual PC. For other frames, ++ return address is pc+8. This is a workaround because gcc does not ++ generate correct return address in CIE. */ ++ if (frame_relative_level (next_frame) >= 0) ++ pc = pc + 8; ++ microblaze_debug ("unwind pc = 0x%x\n", (int) pc); + return pc; + } + +@@ -615,6 +621,7 @@ microblaze_frame_prev_register (frame_info_ptr this_frame, + struct microblaze_frame_cache *cache = + microblaze_frame_cache (this_frame, this_cache); + ++#if 1 + if ((regnum == MICROBLAZE_SP_REGNUM && + cache->register_offsets[MICROBLAZE_SP_REGNUM]) + || (regnum == MICROBLAZE_FP_REGNUM && +@@ -625,15 +632,22 @@ if ((regnum == MICROBLAZE_SP_REGNUM && + + if (regnum == MICROBLAZE_PC_REGNUM) + { +- regnum = 15; ++ regnum = MICROBLAZE_PREV_PC_REGNUM; ++ ++ microblaze_debug ("prev pc is r15 @ frame offset 0x%x\n", ++ (int) cache->register_offsets[regnum] ); ++ + return frame_unwind_got_memory (this_frame, regnum, + cache->register_offsets[MICROBLAZE_PREV_PC_REGNUM]); +- + } ++ + if (regnum == MICROBLAZE_SP_REGNUM) + regnum = 1; +-#if 0 + ++ return trad_frame_get_prev_register (this_frame, cache->saved_regs, ++ regnum); ++ ++#else + if (cache->frameless_p) + { + if (regnum == MICROBLAZE_PC_REGNUM) +@@ -646,9 +660,7 @@ if (regnum == MICROBLAZE_SP_REGNUM) + else + return trad_frame_get_prev_register (this_frame, cache->saved_regs, + regnum); +-#endif +- return trad_frame_get_prev_register (this_frame, cache->saved_regs, +- regnum); ++#endif + } + + static const struct frame_unwind microblaze_frame_unwind = +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0051-info-reg-pc-does-not-print-symbolic-value.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0051-info-reg-pc-does-not-print-symbolic-value.patch new file mode 100644 index 000000000..887ee56ec --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0051-info-reg-pc-does-not-print-symbolic-value.patch @@ -0,0 +1,116 @@ +From 66c0cc9a030667111d4b632314502e868e5e8e37 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 9 May 2024 11:30:22 +0530 +Subject: [PATCH 51/54] info reg pc does not print symbolic value + +Problem - Test gdb.base/pc-fp.exp fails +Fix - Change feature/microblaze-core.xml add type=code_ptr for pc + +Files changed + features/microblaze-core.xml + features/microblaze.c (generated) + features/microblaze-with-stack-protect.c (generated) + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/features/microblaze-core.xml | 4 ++-- + gdb/features/microblaze-with-stack-protect.c | 10 ++++++---- + gdb/features/microblaze.c | 8 ++++---- + 3 files changed, 12 insertions(+), 10 deletions(-) + +diff --git a/gdb/features/microblaze-core.xml b/gdb/features/microblaze-core.xml +index ac052365773..205cdf94a27 100644 +--- a/gdb/features/microblaze-core.xml ++++ b/gdb/features/microblaze-core.xml +@@ -8,7 +8,7 @@ + + + +- ++ + + + +@@ -39,7 +39,7 @@ + + + +- ++ + + + +diff --git a/gdb/features/microblaze-with-stack-protect.c b/gdb/features/microblaze-with-stack-protect.c +index 8ab9565a047..95e3eed1a4e 100644 +--- a/gdb/features/microblaze-with-stack-protect.c ++++ b/gdb/features/microblaze-with-stack-protect.c +@@ -14,7 +14,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) + + feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); +@@ -45,7 +45,7 @@ initialize_tdesc_microblaze_with_stack_protect (void) + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); +@@ -70,10 +70,12 @@ initialize_tdesc_microblaze_with_stack_protect (void) + tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); +- +- feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.stack-protect"); + tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int"); + ++ feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.stack-protect"); ++ tdesc_create_reg (feature, "slr", 59, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "shr", 60, 1, NULL, 32, "int"); ++ + tdesc_microblaze_with_stack_protect = result.release (); + } +diff --git a/gdb/features/microblaze.c b/gdb/features/microblaze.c +index ed12e5bcfd2..ff4865b2acc 100644 +--- a/gdb/features/microblaze.c ++++ b/gdb/features/microblaze.c +@@ -14,7 +14,7 @@ initialize_tdesc_microblaze (void) + + feature = tdesc_create_feature (result.get (), "org.gnu.gdb.microblaze.core"); + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "data_ptr"); + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); +@@ -45,7 +45,7 @@ initialize_tdesc_microblaze (void) + tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "code_ptr"); + tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); +@@ -70,8 +70,8 @@ initialize_tdesc_microblaze (void) + tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); + tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); +- tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); +- tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 32, "int"); + + tdesc_microblaze = result.release (); + } +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0052-Wrong-target-description-accepted-by-microblaze-arch.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0052-Wrong-target-description-accepted-by-microblaze-arch.patch new file mode 100644 index 000000000..89318eec1 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0052-Wrong-target-description-accepted-by-microblaze-arch.patch @@ -0,0 +1,51 @@ +From 0982e0c2733aa773d88876e68320b072e5b2a9ad Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 9 May 2024 11:34:04 +0530 +Subject: [PATCH 52/54] Wrong target description accepted by microblaze + architecture + +Fix - Modify microblaze_gdbarch_init, set tdesc only when it is NULL + +Files changed - gdb/microblaze-tdep.c + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/microblaze-tdep.c | 21 ++++++++++++--------- + 1 file changed, 12 insertions(+), 9 deletions(-) + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index f87e406ada0..4d8c76bcf4c 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -1020,15 +1020,18 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + else + microblaze_abi = found_abi; + +- if (microblaze_abi == MICROBLAZE_ABI_M64) +- { +- tdesc = tdesc_microblaze64; +- reg_size = 8; +- } +- else +- { +- tdesc = tdesc_microblaze; +- reg_size = 4; ++ if (tdesc == NULL) ++ { ++ if (microblaze_abi == MICROBLAZE_ABI_M64) ++ { ++ tdesc = tdesc_microblaze64; ++ reg_size = 8; ++ } ++ else ++ { ++ tdesc = tdesc_microblaze; ++ reg_size = 4; ++ } + } + + /* Check any target description for validity. */ +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0053-Merge-gdb-microblaze-linux-tdep.c-to-gdb-14-and-fix-.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0053-Merge-gdb-microblaze-linux-tdep.c-to-gdb-14-and-fix-.patch new file mode 100644 index 000000000..2cb3ff063 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0053-Merge-gdb-microblaze-linux-tdep.c-to-gdb-14-and-fix-.patch @@ -0,0 +1,42 @@ +From 31b8744afcb31825083a23bbc08b6e00772ebd07 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Thu, 23 May 2024 16:02:59 +0530 +Subject: [PATCH 53/54] Merge gdb/microblaze-linux-tdep.c to gdb-14 and fix + compilation issues. + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/microblaze-linux-tdep.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c +index 20daef2ccd4..16d3a0b5196 100644 +--- a/gdb/microblaze-linux-tdep.c ++++ b/gdb/microblaze-linux-tdep.c +@@ -48,10 +48,12 @@ microblaze_debug (const char *fmt, ...) + if (microblaze_debug_flag) + { + va_list args; ++ string_file file (gdb_stdout->can_emit_style_escape ()); + + va_start (args, fmt); + printf_unfiltered ("MICROBLAZE LINUX: "); +- vprintf_unfiltered (fmt, args); ++ file.vprintf (fmt, args); ++ gdb_stdout->puts_unfiltered (file.string ().c_str ()); + va_end (args); + } + } +@@ -145,7 +147,7 @@ static void + microblaze_linux_init_abi (struct gdbarch_info info, + struct gdbarch *gdbarch) + { +- struct microblaze_gdbarch_tdep *tdep =(microblaze_gdbarch_tdep *) gdbarch_tdep (gdbarch); ++ struct microblaze_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + tdep->sizeof_gregset = 200; + +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0054-Roll-back-an-improvement-which-inlines-target_gdbarc.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0054-Roll-back-an-improvement-which-inlines-target_gdbarc.patch new file mode 100644 index 000000000..eb6bde209 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0054-Roll-back-an-improvement-which-inlines-target_gdbarc.patch @@ -0,0 +1,29 @@ +From 8a7a8b724a87c532096004f43b987c352474a905 Mon Sep 17 00:00:00 2001 +From: Gopi Kumar Bulusu +Date: Fri, 19 Jul 2024 12:39:24 +0530 +Subject: [PATCH 54/54] Roll back an improvement which inlines target_gdbarch + () inherited from binutils 2.42 merge that causes compilation issues on gdb + 14.2 + +Signed-off-by: Gopi Kumar Bulusu +Signed-off-by: Aayush Misra +--- + gdb/microblaze-tdep.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 4d8c76bcf4c..cb6697654b0 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -116,7 +116,7 @@ show_microblaze_abi (struct ui_file *file, + const char *ignored_value) + { + enum microblaze_abi global_abi = global_microblaze_abi (); +- enum microblaze_abi actual_abi = microblaze_abi (current_inferior ()->arch ()); ++ enum microblaze_abi actual_abi = microblaze_abi ( target_gdbarch () ); + const char *actual_abi_str = microblaze_abi_strings[actual_abi]; + + #if 1 +-- +2.34.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0055-fix-microblaze-linux-nat.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0055-fix-microblaze-linux-nat.patch new file mode 100644 index 000000000..a0ac4d39f --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0055-fix-microblaze-linux-nat.patch @@ -0,0 +1,26 @@ +Fix compilation error on Linux native GDB + +Signed-off-by: Mark Hatle + +Index: gdb-14.2/gdb/microblaze-linux-nat.c +=================================================================== +--- gdb-14.2.orig/gdb/microblaze-linux-nat.c ++++ gdb-14.2/gdb/microblaze-linux-nat.c +@@ -96,7 +96,7 @@ static int + microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) + { + int u_addr = -1; +- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); ++ microblaze_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace + * interface, and not the wordsize of the program's ABI. */ + int wordsize = sizeof (long); +@@ -191,7 +192,7 @@ static void + fetch_register (struct regcache *regcache, int tid, int regno) + { + struct gdbarch *gdbarch = regcache->arch (); +- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); ++ microblaze_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + /* This isn't really an address. But ptrace thinks of it as one. */ + CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); + int bytes_transferred; diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/readline-8.2.patch b/meta-microblaze/recipes-devtools/gdb/gdb/readline-8.2.patch deleted file mode 100644 index c2db4c0d7..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/readline-8.2.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 1add37b567a7dee39d99f37b37802034c3fce9c4 Mon Sep 17 00:00:00 2001 -From: Andreas Schwab -Date: Sun, 20 Mar 2022 14:01:54 +0100 -Subject: [PATCH] Add support for readline 8.2 - -In readline 8.2 the type of rl_completer_word_break_characters changed to -include const. - -Upstream-Status: Backport [https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=1add37b567a7dee39d99f37b37802034c3fce9c4] -Signed-off-by: Alexander Kanavin ---- - gdb/completer.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/gdb/completer.c b/gdb/completer.c -index d3900ae2014..a51c16ac7f8 100644 ---- a/gdb/completer.c -+++ b/gdb/completer.c -@@ -36,7 +36,7 @@ - calling a hook instead so we eliminate the CLI dependency. */ - #include "gdbcmd.h" - --/* Needed for rl_completer_word_break_characters() and for -+/* Needed for rl_completer_word_break_characters and for - rl_filename_completion_function. */ - #include "readline/readline.h" - -@@ -2011,7 +2011,7 @@ gdb_completion_word_break_characters_throw () - rl_basic_quote_characters = NULL; - } - -- return rl_completer_word_break_characters; -+ return (char *) rl_completer_word_break_characters; - } - - char * --- -2.31.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb_12.1.bb b/meta-microblaze/recipes-devtools/gdb/gdb_12.1.bb deleted file mode 100644 index ca915d687..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb_12.1.bb +++ /dev/null @@ -1,39 +0,0 @@ -require gdb-common.inc - -inherit gettext pkgconfig - -#LDFLAGS:append = " -s" -#export CFLAGS:append=" -L${STAGING_LIBDIR}" - -# cross-canadian must not see this -PACKAGES =+ "gdbserver" -FILES:gdbserver = "${bindir}/gdbserver" - -require gdb.inc - -inherit python3-dir - -EXTRA_OEMAKE:append:libc-musl = "\ - gt_cv_func_gnugettext1_libc=yes \ - gt_cv_func_gnugettext2_libc=yes \ - gl_cv_func_working_strerror=yes \ - gl_cv_func_strerror_0_works=yes \ - gl_cv_func_gettimeofday_clobber=no \ - " - -do_configure:prepend() { - if [ "${@bb.utils.filter('PACKAGECONFIG', 'python', d)}" ]; then - cat > ${UNPACKDIR}/python << EOF -#!/bin/sh -case "\$2" in - --includes) echo "-I${STAGING_INCDIR}/${PYTHON_DIR}${PYTHON_ABI}/" ;; - --ldflags) echo "-Wl,-rpath-link,${STAGING_LIBDIR}/.. -Wl,-rpath,${libdir}/.. -lpthread -ldl -lutil -lm -lpython${PYTHON_BASEVERSION}${PYTHON_ABI}" ;; - --exec-prefix) echo "${exec_prefix}" ;; - *) exit 1 ;; -esac -exit 0 -EOF - chmod +x ${UNPACKDIR}/python - fi -} - diff --git a/meta-microblaze/recipes-support/attr/attr/microblaze-symver.patch b/meta-microblaze/recipes-support/attr/attr/microblaze-symver.patch deleted file mode 100644 index 0db401d0a..000000000 --- a/meta-microblaze/recipes-support/attr/attr/microblaze-symver.patch +++ /dev/null @@ -1,32 +0,0 @@ -Fix build failure - -On microblaze, we get a failure due to: - - ../attr-2.5.2/libattr/syscalls.c:133:10: error: symver is only supported on ELF platforms - -Upstream-Status: Pending - -Signed-off-by: Mark Hatle - -Index: attr-2.5.2/libattr/syscalls.c -=================================================================== ---- attr-2.5.2.orig/libattr/syscalls.c -+++ attr-2.5.2/libattr/syscalls.c -@@ -31,6 +31,7 @@ - * prefer symver attribute if available (since gcc 10), - * fall back to traditional .symver asm directive otherwise. - */ -+#ifndef __microblaze__ - #ifdef __has_attribute - # if __has_attribute(__symver__) - # define SYMVER(cn, vn) __typeof(cn) cn __attribute__((__symver__(vn))) -@@ -43,6 +44,9 @@ - __asm__(".symver " #cn "," vn) - # endif - #endif -+#else -+# define SYMVER(cn, vn) -+#endif - #ifndef SYMVER - # define SYMVER(cn, vn) __asm__(".symver " #cn "," vn) - #endif diff --git a/meta-microblaze/recipes-support/attr/attr_%.bbappend b/meta-microblaze/recipes-support/attr/attr_%.bbappend deleted file mode 100644 index 75c3696e6..000000000 --- a/meta-microblaze/recipes-support/attr/attr_%.bbappend +++ /dev/null @@ -1,2 +0,0 @@ -FILESEXTRAPATHS:append:microblaze := ":${THISDIR}/attr" -SRC_URI:append:microblaze = " file://microblaze-symver.patch" diff --git a/meta-vitis-tc/README.md b/meta-vitis-tc/README.md index a3de1c2e8..5fd19a270 100644 --- a/meta-vitis-tc/README.md +++ b/meta-vitis-tc/README.md @@ -9,17 +9,27 @@ This layer depends on: URI: https://git.yoctoproject.org/poky layers: meta, meta-poky - branch: master + branch: scarthgap - URI: https://git.openembedded.org/meta-xilinx - layers: meta-xilinx-core, meta-microblaze, meta-xilinx-standalone - branch: master + URI: https://git.openembedded.org/meta-openembedded + layers: meta-oe + branch: scarthgap + + URI: + https://git.yoctoproject.org/meta-xilinx (official version) + https://github.com/Xilinx/meta-xilinx (development and AMD release) + layers: meta-xilinx-microblaze, meta-xilinx-core, meta-xilinx-standalone + branch: scarthgap or AMD release version (e.g. rel-v2024.2) + + URI: https://git.yoctoproject.org/meta-arm + layers: meta-arm, meta-arm-toolchain + branch: scarthgap optionally, you may alwys want to include: URI: https://git.yoctoproject.org/meta-mingw layers: meta-mingw - branch: master + branch: scarthgap --- @@ -27,7 +37,9 @@ optionally, you may alwys want to include: Baremetal toolchains can be built using: -MACHINE= DISTRO=xilinx-standalone bitbake meta-xilinx-toolchain +``` +$ MACHINE= DISTRO=xilinx-standalone bitbake meta-xilinx-toolchain +``` The value should be one of: aarch32-tc - 32-bit Cortex-A toolchains @@ -36,7 +48,8 @@ The value should be one of: microblaze-tc - Microblaze toolchains riscv-tc - Risc-V toolchains - Also there is a standalone QEMU SDK: -MACHINE=zynqmp-generic bitbake meta-qemu-xilinx +``` +$ MACHINE=zynqmp-generic bitbake meta-qemu-xilinx +``` diff --git a/meta-vitis-tc/classes/vitis-tc-baremetal-toolchain-scripts.bbclass b/meta-vitis-tc/classes/vitis-tc-baremetal-toolchain-scripts.bbclass index d532c2cd9..d56ea0964 100644 --- a/meta-vitis-tc/classes/vitis-tc-baremetal-toolchain-scripts.bbclass +++ b/meta-vitis-tc/classes/vitis-tc-baremetal-toolchain-scripts.bbclass @@ -4,7 +4,7 @@ # SPDX-License-Identifier: MIT # # Based on the version in oe-core as commit -# 22b8761c5aee0361de9fe0b93984ce4ffeb0c25c +# a725df1839a23b11ae1bace531d242bfc1ab98e0 # # This is optimized specifically for baremetal builds where we have a single # common toolchain for each multilib. This configuration is unique to @@ -57,8 +57,6 @@ toolchain_create_sdk_env_script:xilinx-standalone () { echo 'export OECORE_BASELIB="${baselib}"' >> $script echo 'export OECORE_TARGET_ARCH="${TARGET_ARCH}"' >>$script echo 'export OECORE_TARGET_OS="${TARGET_OS}"' >>$script - echo 'export OECORE_TARGET_BITS="${@siteinfo_with_prefix(d, 'bit-')}"' >>$script - echo 'export OECORE_TARGET_ENDIAN="${@siteinfo_with_prefix(d, 'endian-')}"' >>$script echo 'unset command_not_found_handle' >> $script @@ -112,7 +110,7 @@ EOF ##### # Following is copied from meta-mingw/classes/toolchain-scripts-mingw32.bbclass # Based off of the oe-core meta/classes/toolchain-scripts.bbclass version as of -# commit e4d377d5ddb62b265536bd33dbccfbb0904f8701 +# commit acbba477893ef87388effc4679b7f40ee49fc852 toolchain_create_sdk_env_script:sdkmingw32:xilinx-standalone () { # Create environment setup script sdkpathnative=${7:-${SDKPATHNATIVE}} diff --git a/meta-vitis-tc/conf/machine/microblaze-tc.conf b/meta-vitis-tc/conf/machine/microblaze-tc.conf index 8e9d9500d..38e0b01b5 100644 --- a/meta-vitis-tc/conf/machine/microblaze-tc.conf +++ b/meta-vitis-tc/conf/machine/microblaze-tc.conf @@ -37,7 +37,7 @@ MULTILIBS += "multilib:libmbbsmfpd" MULTILIBS += "multilib:libmbbspm" MULTILIBS += "multilib:libmbbspfpd" MULTILIBS += "multilib:libmbbspmfpd" -#MULTILIBS += "multilib:libmblem64" +MULTILIBS += "multilib:libmblem64" MULTILIBS += "multilib:libmblebs" MULTILIBS += "multilib:libmblep" MULTILIBS += "multilib:libmblem" @@ -53,21 +53,21 @@ MULTILIBS += "multilib:libmblebsmfpd" MULTILIBS += "multilib:libmblebspm" MULTILIBS += "multilib:libmblebspfpd" MULTILIBS += "multilib:libmblebspmfpd" -#MULTILIBS += "multilib:libmblem64bs" -#MULTILIBS += "multilib:libmblem64p" -#MULTILIBS += "multilib:libmblem64m" -#MULTILIBS += "multilib:libmblem64fpd" -#MULTILIBS += "multilib:libmblem64mfpd" -#MULTILIBS += "multilib:libmblem64pm" -#MULTILIBS += "multilib:libmblem64pfpd" -#MULTILIBS += "multilib:libmblem64pmfpd" -#MULTILIBS += "multilib:libmblem64bsp" -#MULTILIBS += "multilib:libmblem64bsm" -#MULTILIBS += "multilib:libmblem64bsfpd" -#MULTILIBS += "multilib:libmblem64bsmfpd" -#MULTILIBS += "multilib:libmblem64bspm" -#MULTILIBS += "multilib:libmblem64bspfpd" -#MULTILIBS += "multilib:libmblem64bspmfpd" +MULTILIBS += "multilib:libmblem64bs" +MULTILIBS += "multilib:libmblem64p" +MULTILIBS += "multilib:libmblem64m" +MULTILIBS += "multilib:libmblem64fpd" +MULTILIBS += "multilib:libmblem64mfpd" +MULTILIBS += "multilib:libmblem64pm" +MULTILIBS += "multilib:libmblem64pfpd" +MULTILIBS += "multilib:libmblem64pmfpd" +MULTILIBS += "multilib:libmblem64bsp" +MULTILIBS += "multilib:libmblem64bsm" +MULTILIBS += "multilib:libmblem64bsfpd" +MULTILIBS += "multilib:libmblem64bsmfpd" +MULTILIBS += "multilib:libmblem64bspm" +MULTILIBS += "multilib:libmblem64bspfpd" +MULTILIBS += "multilib:libmblem64bspmfpd" # Base configuration diff --git a/meta-vitis-tc/conf/machine/riscv-tc.conf b/meta-vitis-tc/conf/machine/riscv-tc.conf index 89ee39a21..d53cbbd77 100644 --- a/meta-vitis-tc/conf/machine/riscv-tc.conf +++ b/meta-vitis-tc/conf/machine/riscv-tc.conf @@ -38,22 +38,23 @@ TUNE_ARCH:tune-riscv = "riscv32" # Everything below is generated by riscv-convert.sh MULTILIBS = "" MULTILIBS += "multilib:librv32iilp32" -MULTILIBS += "multilib:librv32ifzicsrilp32f" MULTILIBS += "multilib:librv32icilp32" -MULTILIBS += "multilib:librv32ifczicsrilp32f" MULTILIBS += "multilib:librv32imilp32" -MULTILIBS += "multilib:librv32imfzicsrilp32f" MULTILIBS += "multilib:librv32imcilp32" +MULTILIBS += "multilib:librv32imacilp32" +MULTILIBS += "multilib:librv32eilp32e" +MULTILIBS += "multilib:librv32imfzicsrilp32f" MULTILIBS += "multilib:librv32imfczicsrilp32f" +MULTILIBS += "multilib:librv32imafczicsrilp32f" +MULTILIBS += "multilib:librv32imfdczicsrilp32d" MULTILIBS += "multilib:librv64ilp64" -MULTILIBS += "multilib:librv64ifzicsrlp64f" MULTILIBS += "multilib:librv64iclp64" -MULTILIBS += "multilib:librv64ifczicsrlp64f" MULTILIBS += "multilib:librv64imlp64" -MULTILIBS += "multilib:librv64imfzicsrlp64f" MULTILIBS += "multilib:librv64imclp64" +MULTILIBS += "multilib:librv64imaclp64" +MULTILIBS += "multilib:librv64imfzicsrlp64f" MULTILIBS += "multilib:librv64imfczicsrlp64f" -MULTILIBS += "multilib:librv32imfdczicsrilp32d" +MULTILIBS += "multilib:librv64imafczicsrlp64f" MULTILIBS += "multilib:librv64imfdczicsrlp64d" # Base configuration @@ -82,19 +83,6 @@ TUNE_PKGARCH:tune-rv32iilp32 = "rv32iilp32" TUNE_ARCH:tune-rv32iilp32 = "riscv32" -# rv32if_zicsr/ilp32f -# CFLAGS: -march=rv32if_zicsr -mabi=ilp32f -DEFAULTTUNE:virtclass-multilib-librv32ifzicsrilp32f = "rv32if_zicsrilp32f" - -AVAILTUNES += "rv32if_zicsrilp32f" -PACKAGE_EXTRA_ARCHS:tune-rv32if_zicsrilp32f = "${TUNE_PKGARCH:tune-rv32if_zicsrilp32f}" -BASE_LIB:tune-rv32if_zicsrilp32f = "lib/rv32if_zicsr/ilp32f" -TUNE_FEATURES:tune-rv32if_zicsrilp32f = "riscv" -TUNE_CCARGS:tune-rv32if_zicsrilp32f = " -march=rv32if_zicsr -mabi=ilp32f" -TUNE_PKGARCH:tune-rv32if_zicsrilp32f = "rv32if_zicsrilp32f" -TUNE_ARCH:tune-rv32if_zicsrilp32f = "riscv32" - - # rv32ic/ilp32 # CFLAGS: -march=rv32ic -mabi=ilp32 DEFAULTTUNE:virtclass-multilib-librv32icilp32 = "rv32icilp32" @@ -108,19 +96,6 @@ TUNE_PKGARCH:tune-rv32icilp32 = "rv32icilp32" TUNE_ARCH:tune-rv32icilp32 = "riscv32" -# rv32ifc_zicsr/ilp32f -# CFLAGS: -march=rv32ifc_zicsr -mabi=ilp32f -DEFAULTTUNE:virtclass-multilib-librv32ifczicsrilp32f = "rv32ifc_zicsrilp32f" - -AVAILTUNES += "rv32ifc_zicsrilp32f" -PACKAGE_EXTRA_ARCHS:tune-rv32ifc_zicsrilp32f = "${TUNE_PKGARCH:tune-rv32ifc_zicsrilp32f}" -BASE_LIB:tune-rv32ifc_zicsrilp32f = "lib/rv32ifc_zicsr/ilp32f" -TUNE_FEATURES:tune-rv32ifc_zicsrilp32f = "riscv" -TUNE_CCARGS:tune-rv32ifc_zicsrilp32f = " -march=rv32ifc_zicsr -mabi=ilp32f" -TUNE_PKGARCH:tune-rv32ifc_zicsrilp32f = "rv32ifc_zicsrilp32f" -TUNE_ARCH:tune-rv32ifc_zicsrilp32f = "riscv32" - - # rv32im/ilp32 # CFLAGS: -march=rv32im -mabi=ilp32 DEFAULTTUNE:virtclass-multilib-librv32imilp32 = "rv32imilp32" @@ -134,19 +109,6 @@ TUNE_PKGARCH:tune-rv32imilp32 = "rv32imilp32" TUNE_ARCH:tune-rv32imilp32 = "riscv32" -# rv32imf_zicsr/ilp32f -# CFLAGS: -march=rv32imf_zicsr -mabi=ilp32f -DEFAULTTUNE:virtclass-multilib-librv32imfzicsrilp32f = "rv32imf_zicsrilp32f" - -AVAILTUNES += "rv32imf_zicsrilp32f" -PACKAGE_EXTRA_ARCHS:tune-rv32imf_zicsrilp32f = "${TUNE_PKGARCH:tune-rv32imf_zicsrilp32f}" -BASE_LIB:tune-rv32imf_zicsrilp32f = "lib/rv32imf_zicsr/ilp32f" -TUNE_FEATURES:tune-rv32imf_zicsrilp32f = "riscv" -TUNE_CCARGS:tune-rv32imf_zicsrilp32f = " -march=rv32imf_zicsr -mabi=ilp32f" -TUNE_PKGARCH:tune-rv32imf_zicsrilp32f = "rv32imf_zicsrilp32f" -TUNE_ARCH:tune-rv32imf_zicsrilp32f = "riscv32" - - # rv32imc/ilp32 # CFLAGS: -march=rv32imc -mabi=ilp32 DEFAULTTUNE:virtclass-multilib-librv32imcilp32 = "rv32imcilp32" @@ -160,6 +122,45 @@ TUNE_PKGARCH:tune-rv32imcilp32 = "rv32imcilp32" TUNE_ARCH:tune-rv32imcilp32 = "riscv32" +# rv32imac/ilp32 +# CFLAGS: -march=rv32imac -mabi=ilp32 +DEFAULTTUNE:virtclass-multilib-librv32imacilp32 = "rv32imacilp32" + +AVAILTUNES += "rv32imacilp32" +PACKAGE_EXTRA_ARCHS:tune-rv32imacilp32 = "${TUNE_PKGARCH:tune-rv32imacilp32}" +BASE_LIB:tune-rv32imacilp32 = "lib/rv32imac/ilp32" +TUNE_FEATURES:tune-rv32imacilp32 = "riscv" +TUNE_CCARGS:tune-rv32imacilp32 = " -march=rv32imac -mabi=ilp32" +TUNE_PKGARCH:tune-rv32imacilp32 = "rv32imacilp32" +TUNE_ARCH:tune-rv32imacilp32 = "riscv32" + + +# rv32e/ilp32e +# CFLAGS: -march=rv32e -mabi=ilp32e +DEFAULTTUNE:virtclass-multilib-librv32eilp32e = "rv32eilp32e" + +AVAILTUNES += "rv32eilp32e" +PACKAGE_EXTRA_ARCHS:tune-rv32eilp32e = "${TUNE_PKGARCH:tune-rv32eilp32e}" +BASE_LIB:tune-rv32eilp32e = "lib/rv32e/ilp32e" +TUNE_FEATURES:tune-rv32eilp32e = "riscv" +TUNE_CCARGS:tune-rv32eilp32e = " -march=rv32e -mabi=ilp32e" +TUNE_PKGARCH:tune-rv32eilp32e = "rv32eilp32e" +TUNE_ARCH:tune-rv32eilp32e = "riscv32" + + +# rv32imf_zicsr/ilp32f +# CFLAGS: -march=rv32imf_zicsr -mabi=ilp32f +DEFAULTTUNE:virtclass-multilib-librv32imfzicsrilp32f = "rv32imf_zicsrilp32f" + +AVAILTUNES += "rv32imf_zicsrilp32f" +PACKAGE_EXTRA_ARCHS:tune-rv32imf_zicsrilp32f = "${TUNE_PKGARCH:tune-rv32imf_zicsrilp32f}" +BASE_LIB:tune-rv32imf_zicsrilp32f = "lib/rv32imf_zicsr/ilp32f" +TUNE_FEATURES:tune-rv32imf_zicsrilp32f = "riscv" +TUNE_CCARGS:tune-rv32imf_zicsrilp32f = " -march=rv32imf_zicsr -mabi=ilp32f" +TUNE_PKGARCH:tune-rv32imf_zicsrilp32f = "rv32imf_zicsrilp32f" +TUNE_ARCH:tune-rv32imf_zicsrilp32f = "riscv32" + + # rv32imfc_zicsr/ilp32f # CFLAGS: -march=rv32imfc_zicsr -mabi=ilp32f DEFAULTTUNE:virtclass-multilib-librv32imfczicsrilp32f = "rv32imfc_zicsrilp32f" @@ -173,6 +174,32 @@ TUNE_PKGARCH:tune-rv32imfc_zicsrilp32f = "rv32imfc_zicsrilp32f" TUNE_ARCH:tune-rv32imfc_zicsrilp32f = "riscv32" +# rv32imafc_zicsr/ilp32f +# CFLAGS: -march=rv32imafc_zicsr -mabi=ilp32f +DEFAULTTUNE:virtclass-multilib-librv32imafczicsrilp32f = "rv32imafc_zicsrilp32f" + +AVAILTUNES += "rv32imafc_zicsrilp32f" +PACKAGE_EXTRA_ARCHS:tune-rv32imafc_zicsrilp32f = "${TUNE_PKGARCH:tune-rv32imafc_zicsrilp32f}" +BASE_LIB:tune-rv32imafc_zicsrilp32f = "lib/rv32imafc_zicsr/ilp32f" +TUNE_FEATURES:tune-rv32imafc_zicsrilp32f = "riscv" +TUNE_CCARGS:tune-rv32imafc_zicsrilp32f = " -march=rv32imafc_zicsr -mabi=ilp32f" +TUNE_PKGARCH:tune-rv32imafc_zicsrilp32f = "rv32imafc_zicsrilp32f" +TUNE_ARCH:tune-rv32imafc_zicsrilp32f = "riscv32" + + +# rv32imfdc_zicsr/ilp32d +# CFLAGS: -march=rv32imfdc_zicsr -mabi=ilp32d +DEFAULTTUNE:virtclass-multilib-librv32imfdczicsrilp32d = "rv32imfdc_zicsrilp32d" + +AVAILTUNES += "rv32imfdc_zicsrilp32d" +PACKAGE_EXTRA_ARCHS:tune-rv32imfdc_zicsrilp32d = "${TUNE_PKGARCH:tune-rv32imfdc_zicsrilp32d}" +BASE_LIB:tune-rv32imfdc_zicsrilp32d = "lib/rv32imfdc_zicsr/ilp32d" +TUNE_FEATURES:tune-rv32imfdc_zicsrilp32d = "riscv" +TUNE_CCARGS:tune-rv32imfdc_zicsrilp32d = " -march=rv32imfdc_zicsr -mabi=ilp32d" +TUNE_PKGARCH:tune-rv32imfdc_zicsrilp32d = "rv32imfdc_zicsrilp32d" +TUNE_ARCH:tune-rv32imfdc_zicsrilp32d = "riscv32" + + # rv64i/lp64 # CFLAGS: -march=rv64i -mabi=lp64 DEFAULTTUNE:virtclass-multilib-librv64ilp64 = "rv64ilp64" @@ -186,19 +213,6 @@ TUNE_PKGARCH:tune-rv64ilp64 = "rv64ilp64" TUNE_ARCH:tune-rv64ilp64 = "riscv64" -# rv64if_zicsr/lp64f -# CFLAGS: -march=rv64if_zicsr -mabi=lp64f -DEFAULTTUNE:virtclass-multilib-librv64ifzicsrlp64f = "rv64if_zicsrlp64f" - -AVAILTUNES += "rv64if_zicsrlp64f" -PACKAGE_EXTRA_ARCHS:tune-rv64if_zicsrlp64f = "${TUNE_PKGARCH:tune-rv64if_zicsrlp64f}" -BASE_LIB:tune-rv64if_zicsrlp64f = "lib/rv64if_zicsr/lp64f" -TUNE_FEATURES:tune-rv64if_zicsrlp64f = "riscv" -TUNE_CCARGS:tune-rv64if_zicsrlp64f = " -march=rv64if_zicsr -mabi=lp64f" -TUNE_PKGARCH:tune-rv64if_zicsrlp64f = "rv64if_zicsrlp64f" -TUNE_ARCH:tune-rv64if_zicsrlp64f = "riscv64" - - # rv64ic/lp64 # CFLAGS: -march=rv64ic -mabi=lp64 DEFAULTTUNE:virtclass-multilib-librv64iclp64 = "rv64iclp64" @@ -212,19 +226,6 @@ TUNE_PKGARCH:tune-rv64iclp64 = "rv64iclp64" TUNE_ARCH:tune-rv64iclp64 = "riscv64" -# rv64ifc_zicsr/lp64f -# CFLAGS: -march=rv64ifc_zicsr -mabi=lp64f -DEFAULTTUNE:virtclass-multilib-librv64ifczicsrlp64f = "rv64ifc_zicsrlp64f" - -AVAILTUNES += "rv64ifc_zicsrlp64f" -PACKAGE_EXTRA_ARCHS:tune-rv64ifc_zicsrlp64f = "${TUNE_PKGARCH:tune-rv64ifc_zicsrlp64f}" -BASE_LIB:tune-rv64ifc_zicsrlp64f = "lib/rv64ifc_zicsr/lp64f" -TUNE_FEATURES:tune-rv64ifc_zicsrlp64f = "riscv" -TUNE_CCARGS:tune-rv64ifc_zicsrlp64f = " -march=rv64ifc_zicsr -mabi=lp64f" -TUNE_PKGARCH:tune-rv64ifc_zicsrlp64f = "rv64ifc_zicsrlp64f" -TUNE_ARCH:tune-rv64ifc_zicsrlp64f = "riscv64" - - # rv64im/lp64 # CFLAGS: -march=rv64im -mabi=lp64 DEFAULTTUNE:virtclass-multilib-librv64imlp64 = "rv64imlp64" @@ -238,19 +239,6 @@ TUNE_PKGARCH:tune-rv64imlp64 = "rv64imlp64" TUNE_ARCH:tune-rv64imlp64 = "riscv64" -# rv64imf_zicsr/lp64f -# CFLAGS: -march=rv64imf_zicsr -mabi=lp64f -DEFAULTTUNE:virtclass-multilib-librv64imfzicsrlp64f = "rv64imf_zicsrlp64f" - -AVAILTUNES += "rv64imf_zicsrlp64f" -PACKAGE_EXTRA_ARCHS:tune-rv64imf_zicsrlp64f = "${TUNE_PKGARCH:tune-rv64imf_zicsrlp64f}" -BASE_LIB:tune-rv64imf_zicsrlp64f = "lib/rv64imf_zicsr/lp64f" -TUNE_FEATURES:tune-rv64imf_zicsrlp64f = "riscv" -TUNE_CCARGS:tune-rv64imf_zicsrlp64f = " -march=rv64imf_zicsr -mabi=lp64f" -TUNE_PKGARCH:tune-rv64imf_zicsrlp64f = "rv64imf_zicsrlp64f" -TUNE_ARCH:tune-rv64imf_zicsrlp64f = "riscv64" - - # rv64imc/lp64 # CFLAGS: -march=rv64imc -mabi=lp64 DEFAULTTUNE:virtclass-multilib-librv64imclp64 = "rv64imclp64" @@ -264,6 +252,32 @@ TUNE_PKGARCH:tune-rv64imclp64 = "rv64imclp64" TUNE_ARCH:tune-rv64imclp64 = "riscv64" +# rv64imac/lp64 +# CFLAGS: -march=rv64imac -mabi=lp64 +DEFAULTTUNE:virtclass-multilib-librv64imaclp64 = "rv64imaclp64" + +AVAILTUNES += "rv64imaclp64" +PACKAGE_EXTRA_ARCHS:tune-rv64imaclp64 = "${TUNE_PKGARCH:tune-rv64imaclp64}" +BASE_LIB:tune-rv64imaclp64 = "lib/rv64imac/lp64" +TUNE_FEATURES:tune-rv64imaclp64 = "riscv" +TUNE_CCARGS:tune-rv64imaclp64 = " -march=rv64imac -mabi=lp64" +TUNE_PKGARCH:tune-rv64imaclp64 = "rv64imaclp64" +TUNE_ARCH:tune-rv64imaclp64 = "riscv64" + + +# rv64imf_zicsr/lp64f +# CFLAGS: -march=rv64imf_zicsr -mabi=lp64f +DEFAULTTUNE:virtclass-multilib-librv64imfzicsrlp64f = "rv64imf_zicsrlp64f" + +AVAILTUNES += "rv64imf_zicsrlp64f" +PACKAGE_EXTRA_ARCHS:tune-rv64imf_zicsrlp64f = "${TUNE_PKGARCH:tune-rv64imf_zicsrlp64f}" +BASE_LIB:tune-rv64imf_zicsrlp64f = "lib/rv64imf_zicsr/lp64f" +TUNE_FEATURES:tune-rv64imf_zicsrlp64f = "riscv" +TUNE_CCARGS:tune-rv64imf_zicsrlp64f = " -march=rv64imf_zicsr -mabi=lp64f" +TUNE_PKGARCH:tune-rv64imf_zicsrlp64f = "rv64imf_zicsrlp64f" +TUNE_ARCH:tune-rv64imf_zicsrlp64f = "riscv64" + + # rv64imfc_zicsr/lp64f # CFLAGS: -march=rv64imfc_zicsr -mabi=lp64f DEFAULTTUNE:virtclass-multilib-librv64imfczicsrlp64f = "rv64imfc_zicsrlp64f" @@ -277,17 +291,17 @@ TUNE_PKGARCH:tune-rv64imfc_zicsrlp64f = "rv64imfc_zicsrlp64f" TUNE_ARCH:tune-rv64imfc_zicsrlp64f = "riscv64" -# rv32imfdc_zicsr/ilp32d -# CFLAGS: -march=rv32imfdc_zicsr -mabi=ilp32d -DEFAULTTUNE:virtclass-multilib-librv32imfdczicsrilp32d = "rv32imfdc_zicsrilp32d" +# rv64imafc_zicsr/lp64f +# CFLAGS: -march=rv64imafc_zicsr -mabi=lp64f +DEFAULTTUNE:virtclass-multilib-librv64imafczicsrlp64f = "rv64imafc_zicsrlp64f" -AVAILTUNES += "rv32imfdc_zicsrilp32d" -PACKAGE_EXTRA_ARCHS:tune-rv32imfdc_zicsrilp32d = "${TUNE_PKGARCH:tune-rv32imfdc_zicsrilp32d}" -BASE_LIB:tune-rv32imfdc_zicsrilp32d = "lib/rv32imfdc_zicsr/ilp32d" -TUNE_FEATURES:tune-rv32imfdc_zicsrilp32d = "riscv" -TUNE_CCARGS:tune-rv32imfdc_zicsrilp32d = " -march=rv32imfdc_zicsr -mabi=ilp32d" -TUNE_PKGARCH:tune-rv32imfdc_zicsrilp32d = "rv32imfdc_zicsrilp32d" -TUNE_ARCH:tune-rv32imfdc_zicsrilp32d = "riscv32" +AVAILTUNES += "rv64imafc_zicsrlp64f" +PACKAGE_EXTRA_ARCHS:tune-rv64imafc_zicsrlp64f = "${TUNE_PKGARCH:tune-rv64imafc_zicsrlp64f}" +BASE_LIB:tune-rv64imafc_zicsrlp64f = "lib/rv64imafc_zicsr/lp64f" +TUNE_FEATURES:tune-rv64imafc_zicsrlp64f = "riscv" +TUNE_CCARGS:tune-rv64imafc_zicsrlp64f = " -march=rv64imafc_zicsr -mabi=lp64f" +TUNE_PKGARCH:tune-rv64imafc_zicsrlp64f = "rv64imafc_zicsrlp64f" +TUNE_ARCH:tune-rv64imafc_zicsrlp64f = "riscv64" # rv64imfdc_zicsr/lp64d diff --git a/meta-vitis-tc/files/toolchain-shar-extract.sh b/meta-vitis-tc/files/toolchain-shar-extract.sh index a04d9046d..ec2008c8e 100644 --- a/meta-vitis-tc/files/toolchain-shar-extract.sh +++ b/meta-vitis-tc/files/toolchain-shar-extract.sh @@ -169,9 +169,7 @@ else fi # limit the length for target_sdk_dir, ensure the relocation behaviour in relocate_sdk.py has right result. -# This is due to ELF interpreter being set to 'a'*1024 in -# meta/recipes-core/meta/uninative-tarball.bb -if [ ${#target_sdk_dir} -gt 1024 ]; then +if [ ${#target_sdk_dir} -gt 2048 ]; then echo "Error: The target directory path is too long!!!" exit 1 fi diff --git a/meta-vitis-tc/recipes-core/meta/meta-xilinx-toolchain.bb b/meta-vitis-tc/recipes-core/meta/meta-xilinx-toolchain.bb index bcc226d8c..a276dee7d 100644 --- a/meta-vitis-tc/recipes-core/meta/meta-xilinx-toolchain.bb +++ b/meta-vitis-tc/recipes-core/meta/meta-xilinx-toolchain.bb @@ -18,8 +18,6 @@ HOST_DEPENDS = " \ nativesdk-sdk-provides-dummy \ " -S = "${UNPACKDIR}" - PLNX_ADD_VAI_SDK = "" TOOLCHAIN_HOST_TASK = "${HOST_DEPENDS} packagegroup-cross-canadian-${MACHINE}" @@ -29,7 +27,7 @@ TOOLCHAIN_SHAR_EXT_TMPL = "${VITIS_TC_PATH}/files/toolchain-shar-extract.sh" TOOLCHAIN_SHAR_REL_TMPL = "${VITIS_TC_PATH}/files/toolchain-shar-relocate.sh" create_sdk_files:append () { - cp ${S}/relocate-wrapper.py ${SDK_OUTPUT}/${SDKPATH}/ + cp ${WORKDIR}/relocate-wrapper.py ${SDK_OUTPUT}/${SDKPATH}/ } # The wrappers don't do anything, remove them! diff --git a/meta-vitis-tc/recipes-core/packagegroups/packagegroup-cross-canadian.bbappend b/meta-vitis-tc/recipes-core/packagegroups/packagegroup-cross-canadian.bbappend index e8a91376d..78df7ae16 100644 --- a/meta-vitis-tc/recipes-core/packagegroups/packagegroup-cross-canadian.bbappend +++ b/meta-vitis-tc/recipes-core/packagegroups/packagegroup-cross-canadian.bbappend @@ -1,9 +1,6 @@ # Avoid installing all of the alternative toolchains # due to multilib enabled in the primary toolchain. -# Avoid GDB, does not currently build for microblaze -GDB:xilinx-standalone:baremetal-multilib-tc:microblaze = "" - RDEPENDS:${PN}:xilinx-standalone:baremetal-multilib-tc = " \ ${BINUTILS} \ ${GCC} \ diff --git a/meta-vitis-tc/recipes-devtools/gcc/gcc-12/riscv-multilib-generator-python.patch b/meta-vitis-tc/recipes-devtools/gcc/gcc-12/riscv-multilib-generator-python.patch deleted file mode 100644 index 9575539ef..000000000 --- a/meta-vitis-tc/recipes-devtools/gcc/gcc-12/riscv-multilib-generator-python.patch +++ /dev/null @@ -1,14 +0,0 @@ -Use python3 instead of python when calling the mutlib-generator - -Upstream-Status: Backport - -Signed-off-by: Mark Hatle - ---- gcc-12.2.0/gcc/config/riscv/multilib-generator.orig 2024-02-22 19:23:07.166805418 -0700 -+++ gcc-12.2.0/gcc/config/riscv/multilib-generator 2024-02-22 19:18:12.803798625 -0700 -@@ -1,4 +1,4 @@ --#!/usr/bin/env python -+#!/usr/bin/env python3 - - # RISC-V multilib list generator. - # Copyright (C) 2011-2022 Free Software Foundation, Inc. diff --git a/meta-vitis-tc/recipes-devtools/gcc/gcc-12/additional-microblaze-multilibs.patch b/meta-vitis-tc/recipes-devtools/gcc/gcc-13/additional-microblaze-multilibs.patch similarity index 100% rename from meta-vitis-tc/recipes-devtools/gcc/gcc-12/additional-microblaze-multilibs.patch rename to meta-vitis-tc/recipes-devtools/gcc/gcc-13/additional-microblaze-multilibs.patch diff --git a/meta-vitis-tc/recipes-devtools/gcc/gcc-13/riscv-multilib-generator-python.patch b/meta-vitis-tc/recipes-devtools/gcc/gcc-13/riscv-multilib-generator-python.patch new file mode 100644 index 000000000..ba08945c9 --- /dev/null +++ b/meta-vitis-tc/recipes-devtools/gcc/gcc-13/riscv-multilib-generator-python.patch @@ -0,0 +1,16 @@ +Use python3 instead of python when calling the mutlib-generator + +Upstream-Status: Pending + +Signed-off-by: Mark Hatle + +Index: gcc-13.3.0/gcc/config/riscv/multilib-generator +=================================================================== +--- gcc-13.3.0.orig/gcc/config/riscv/multilib-generator ++++ gcc-13.3.0/gcc/config/riscv/multilib-generator +@@ -1,4 +1,4 @@ +-#!/usr/bin/env python ++#!/usr/bin/env python3 + + # RISC-V multilib list generator. + # Copyright (C) 2011-2023 Free Software Foundation, Inc. diff --git a/meta-vitis-tc/recipes-devtools/gcc/gcc-source_12.%.bbappend b/meta-vitis-tc/recipes-devtools/gcc/gcc-source_13.%.bbappend similarity index 55% rename from meta-vitis-tc/recipes-devtools/gcc/gcc-source_12.%.bbappend rename to meta-vitis-tc/recipes-devtools/gcc/gcc-source_13.%.bbappend index a439407df..e38dd8b32 100644 --- a/meta-vitis-tc/recipes-devtools/gcc/gcc-source_12.%.bbappend +++ b/meta-vitis-tc/recipes-devtools/gcc/gcc-source_13.%.bbappend @@ -1,5 +1,4 @@ -# Add MicroBlaze Patches (only when using MicroBlaze) -FILESEXTRAPATHS:append := ":${THISDIR}/gcc-12" +FILESEXTRAPATHS:append := ":${THISDIR}/gcc-13" SRC_URI += " \ file://additional-microblaze-multilibs.patch \ file://riscv-multilib-generator-python.patch \ diff --git a/meta-vitis-tc/recipes-devtools/gcc/gcc-xilinx-standalone-multilib.inc b/meta-vitis-tc/recipes-devtools/gcc/gcc-xilinx-standalone-multilib.inc index f69ac4d8d..c69e07456 100644 --- a/meta-vitis-tc/recipes-devtools/gcc/gcc-xilinx-standalone-multilib.inc +++ b/meta-vitis-tc/recipes-devtools/gcc/gcc-xilinx-standalone-multilib.inc @@ -9,11 +9,10 @@ EXTRA_OECONF:append:xilinx-standalone:arm:baremetal-multilib-tc = " \ # RISC V configuration RISCV_MULTILIB = "\ -rv32i-ilp32--;rv32if-ilp32f--;rv32ic-ilp32--;rv32ifc-ilp32f--;\ -rv32im-ilp32--;rv32imf-ilp32f--;rv32imc-ilp32--;rv32imfc-ilp32f--;\ -rv64i-lp64--;rv64if-lp64f--;rv64ic-lp64--;rv64ifc-lp64f--;\ -rv64im-lp64--;rv64imf-lp64f--;rv64imc-lp64--;rv64imfc-lp64f--;\ -rv32imfdc-ilp32d--;rv64imfdc-lp64d--\ +rv32i-ilp32--;rv32ic-ilp32--;rv32im-ilp32--;rv32imc-ilp32--;rv32imac-ilp32--;rv32e-ilp32e--;\ +rv32imf-ilp32f--;rv32imfc-ilp32f--;rv32imafc-ilp32f--;rv32imfdc-ilp32d--;\ +rv64i-lp64--;rv64ic-lp64--;rv64im-lp64--;rv64imc-lp64--;rv64imac-lp64--;\ +rv64imf-lp64f--;rv64imfc-lp64f--;rv64imafc-lp64f--;rv64imfdc-lp64d--\ " EXTRA_OECONF:append:xilinx-standalone:riscv32:baremetal-multilib-tc = " \ diff --git a/meta-vitis-tc/recipes-devtools/gcc/libgcc_14.1.bbappend b/meta-vitis-tc/recipes-devtools/gcc/libgcc_14.1.bbappend deleted file mode 100644 index 2490c4199..000000000 --- a/meta-vitis-tc/recipes-devtools/gcc/libgcc_14.1.bbappend +++ /dev/null @@ -1,4 +0,0 @@ -# There are some configurations that can result in addition spec files being written -FILES:${PN}-dev:append:xilinx-standalone:class-target:baremetal-multilib-tc = "\ - ${libdir}/*.specs \ -" diff --git a/meta-vitis-tc/scripts/relocate-wrapper.py b/meta-vitis-tc/scripts/relocate-wrapper.py index 6523241b8..d6c63edfb 100755 --- a/meta-vitis-tc/scripts/relocate-wrapper.py +++ b/meta-vitis-tc/scripts/relocate-wrapper.py @@ -209,9 +209,9 @@ def is_elf_executable(f): print('') wrapperf.write('#!/bin/bash\n') - wrapperf.write('# Written by Mark Hatle \n') + wrapperf.write('# Written by Mark Hatle \n') wrapperf.write('# Copyright (C) 2019-2020, Xilinx, Inc. All rights reserved\n') - wrapperf.write('# Copyright (C) 2023, Advanced Micro Devices, Inc. All rights reserved\n') + wrapperf.write('# Copyright (C) 2023-2024, Advanced Micro Devices, Inc. All rights reserved\n') wrapperf.write('#\n') wrapperf.write('# SPDX-License-Identifier: GPL-2.0-only\n') wrapperf.write('LDSO=%s\n' % ldso) diff --git a/meta-xilinx-bsp/README.md b/meta-xilinx-bsp/README.md index 3f7df18e2..3002355cb 100644 --- a/meta-xilinx-bsp/README.md +++ b/meta-xilinx-bsp/README.md @@ -1,65 +1,31 @@ # meta-xilinx-bsp -This layer enables AMD Xilinx MicroBlaze, Zynq, ZynqMP and Versal device +This layer enables AMD MicroBlaze, Zynq, ZynqMP and Versal device evaluation boards and provides related metadata. ## Additional documentation * [Building Image Instructions](../README.building.md) * [Booting Image Instructions](../README.booting.md) ---- -## AMD Xilinx Evaluation Boards BSP Machines files - -The following boards are supported by the meta-xilinx-bsp layer: - -> **Variable usage examples:** -> -> Machine Configuration file: `MACHINE = "zcu102-zynqmp"` -> -> Reference XSA: `HDF_MACHINE = "zcu102-zynqmp"` -> -> HW Board Device tree: `YAML_DT_BOARD_FLAGS = "{BOARD zcu102-rev1.0}"` - -| Devices | Evaluation Board | Machine Configuration file | Reference XSA | HW Board Device tree | QEMU tested | HW tested | -|------------|-------------------------------------------------------------------------------|--------------------------------------------------------------|-----------------------|-------------------------------------|-------------|-----------| -| MicroBlaze | [KC705](https://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html) | [kc705-microblazeel](conf/machine/kc705-microblazeel.conf) | `kc705-microblazeel` | `kc705-full` | Yes | Yes | -| | [AC701](https://www.xilinx.com/products/boards-and-kits/ek-a7-ac701-g.html) | [ac701-microblazeel](conf/machine/ac701-microblazeel.conf) | `ac701-microblazeel` | `ac701-full` | Yes | Yes | -| | [KCU105](https://www.xilinx.com/products/boards-and-kits/kcu105.html) | [kcu105-microblazeel](conf/machine/kcu105-microblazeel.conf) | `kcu105-microblazeel` | `kcu105` | Yes | Yes | -| | [VCU118](https://www.xilinx.com/products/boards-and-kits/vcu118.html) | [vcu118-microblazeel](conf/machine/vcu118-microblazeel.conf) | `vcu118-microblazeel` | `vcu118-rev2.0` | Yes | Yes | -| Zynq-7000 | [ZC702](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html) | [zc702-zynq7](conf/machine/zc702-zynq7.conf) | `zc702-zynq7` | `zc702` | Yes | Yes | -| | [ZC706](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc706-g.html) | [zc706-zynq7](conf/machine/zc706-zynq7.conf) | `zc706-zynq7` | `zc706` | Yes | Yes | -| ZynqMP | [ZCU102](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) | [zcu102-zynqmp](conf/machine/zcu102-zynqmp.conf) | `zcu102-zynqmp` | `zcu102-rev1.0` | Yes | Yes | -| | [ZCU104](https://www.xilinx.com/products/boards-and-kits/zcu104.html) | [zcu104-zynqmp](conf/machine/zcu104-zynqmp.conf) | `zcu104-zynqmp` | `zcu104-revc` | Yes | Yes | -| | [ZCU106](https://www.xilinx.com/products/boards-and-kits/zcu106.html) | [zcu106-zynqmp](conf/machine/zcu106-zynqmp.conf) | `zcu106-zynqmp` | `zcu106-reva` | Yes | Yes | -| | [ZCU111](https://www.xilinx.com/products/boards-and-kits/zcu111.html) | [zcu111-zynqmp](conf/machine/zcu111-zynqmp.conf) | `zcu111-zynqmp` | `zcu111-reva` | Yes | Yes | -| | [ZCU208](https://www.xilinx.com/products/boards-and-kits/zcu208.html) | [zcu208-zynqmp](conf/machine/zcu208-zynqmp.conf) | `zcu208-zynqmp` | `zcu208-reva` | Yes | Yes | -| | [ZCU216](https://www.xilinx.com/products/boards-and-kits/zcu216.html) | [zcu216-zynqmp](conf/machine/zcu216-zynqmp.conf) | `zcu216-zynqmp` | `zcu216-reva` | Yes | Yes | -| | [ZCU670](https://www.xilinx.com/products/boards-and-kits/zcu670.html) | [zcu670-zynqmp](conf/machine/zcu670-zynqmp.conf) | `zcu670-zynqmp` | `zcu670-revb` | Yes | Yes | -| Versal | [VCK190](https://www.xilinx.com/products/boards-and-kits/vck190.html) | [vck190-versal](conf/machine/vck190-versal.conf) | `vck190-versal` | `versal-vck190-reva-x-ebm-01-reva` | Yes | Yes | -| | [VMK180](https://www.xilinx.com/products/boards-and-kits/vmk180.html) | [vmk180-versal](conf/machine/vmk180-versal.conf) | `vmk180-versal` | `versal-vmk180-reva-x-ebm-01-reva` | Yes | Yes | -| | [VPK120](https://www.xilinx.com/products/boards-and-kits/vpk120.html) | [vpk120-versal](conf/machine/vpk120-versal.conf) | `vpk120-versal` | `versal-vpk120-reva` | Yes | Yes | -| | [VPK180](https://www.xilinx.com/products/boards-and-kits/vpk180.html) | [vpk180-versal](conf/machine/vpk180-versal.conf) | `vpk180-versal` | `versal-vpk180-reva` | Yes | Yes | -| | [VEK280](https://www.xilinx.com/products/boards-and-kits/vek280.html) | [vek280-versal](conf/machine/vek280-versal.conf) | `vek280-versal` | `versal-vek280-revb` | Yes | Yes | -| | [VHK158](https://www.xilinx.com/products/boards-and-kits/vhk158.html) | [vhk158-versal](conf/machine/vhk158-versal.conf) | `vhk158-versal` | `versal-vhk158-reva` | Yes | Yes | - -> **Note:** Additional information on Xilinx architectures can be found at: - https://www.xilinx.com/products/silicon-devices.html ---- ## Dependencies This layer depends on: URI: https://git.yoctoproject.org/poky layers: meta, meta-poky - branch: langdale + branch: scarthgap URI: https://git.openembedded.org/meta-openembedded layers: meta-oe - branch: langdale + branch: scarthgap + + URI: https://git.yoctoproject.org/meta-arm + layers: meta-arm, meta-arm-toolchain + branch: scarthgap URI: https://git.yoctoproject.org/meta-xilinx (official version) - https://github.com/Xilinx/meta-xilinx (development and amd xilinx release) - layers: meta-xilinx-microblaze, meta-xilinx-core - branch: langdale or amd xilinx release version (e.g. rel-v2023.1) + https://github.com/Xilinx/meta-xilinx (development and AMD release) + layers: meta-xilinx-microblaze, meta-xilinx-core, meta-xilinx-standalone + branch: scarthgap or AMD release version (e.g. rel-v2024.2) diff --git a/meta-xilinx-bsp/conf/machine/ac701-microblazeel.conf b/meta-xilinx-bsp/conf/machine/ac701-microblazeel.conf deleted file mode 100644 index 27cb3939b..000000000 --- a/meta-xilinx-bsp/conf/machine/ac701-microblazeel.conf +++ /dev/null @@ -1,50 +0,0 @@ -#@TYPE: Machine -#@NAME: ac701-microblazeel -#@DESCRIPTION: Machine configuration for the AC701 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'ac701-microblazeel:']['ac701-microblazeel' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in microblazeel-generic.conf will be set. - -# Yocto AC701 device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "MIG_7SERIES_0" -DT_PADDING_SIZE:pn-device-tree ?= "0x1000" -DTC_FLAGS:pn-device-tree ?= "" -XSCTH_PROC:pn-device-tree ?= "microblaze_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD ac701-full}" - -# Yocto FS-Boot variables -YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0" -YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "MIG_7SERIES_0" -YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0" -XSCTH_PROC:pn-fs-boot ?= "microblaze_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x80000000" -UBOOT_LOADADDRESS ?= "0x80000000" - -# ac701-microblazeel Serial Console -SERIAL_CONSOLES ?= "115200;ttyUL0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Set DDR Base address for u-boot-xlnx-scr variables -DDR_BASEADDR ?= "0x80000000" -SKIP_APPEND_BASEADDR ?= "0" - -# Required generic machine inclusion -require conf/machine/microblaze-generic.conf - -# This machine conf file uses ac701-microblazeel xsa as reference input. -# User can override with ac701 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "ac701-microblazeel" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' ac701_microblazeel']['ac701-microblazeel' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/kc705-microblazeel.conf b/meta-xilinx-bsp/conf/machine/kc705-microblazeel.conf deleted file mode 100644 index f3236f075..000000000 --- a/meta-xilinx-bsp/conf/machine/kc705-microblazeel.conf +++ /dev/null @@ -1,50 +0,0 @@ -#@TYPE: Machine -#@NAME: kc705-microblazeel -#@DESCRIPTION: Machine configuration for the KC705 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'kc705-microblazeel:']['kc705-microblazeel' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in microblazeel-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "MIG_7SERIES_0" -DT_PADDING_SIZE:pn-device-tree ?= "0x1000" -DTC_FLAGS:pn-device-tree ?= "" -XSCTH_PROC:pn-device-tree ?= "microblaze_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD kc705-full}" - -# Yocto FS-Boot variables -YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0" -YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "MIG_7SERIES_0" -YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_emc_0" -XSCTH_PROC:pn-fs-boot ?= "microblaze_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x80000000" -UBOOT_LOADADDRESS ?= "0x80000000" - -# kc705-microblazeel Serial Console -SERIAL_CONSOLES ?= "115200;ttyUL0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Set DDR Base address for u-boot-xlnx-scr variables -DDR_BASEADDR ?= "0x80000000" -SKIP_APPEND_BASEADDR ?= "0" - -# Required generic machine inclusion -require conf/machine/microblaze-generic.conf - -# This machine conf file uses kc705-microblazeel xsa as reference input. -# User can override with kc705 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "kc705-microblazeel" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' kc705_microblazeel']['kc705-microblazeel' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/kcu105-microblazeel.conf b/meta-xilinx-bsp/conf/machine/kcu105-microblazeel.conf deleted file mode 100644 index a866f87cc..000000000 --- a/meta-xilinx-bsp/conf/machine/kcu105-microblazeel.conf +++ /dev/null @@ -1,50 +0,0 @@ -#@TYPE: Machine -#@NAME: kcu105-microblazeel -#@DESCRIPTION: Machine configuration for the KCU105 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'kcu105-microblazeel:']['kcu105-microblazeel' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in microblazeel-generic.conf will be set. - -# Yocto KCU105 device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "DDR4_0" -DT_PADDING_SIZE:pn-device-tree ?= "0x1000" -DTC_FLAGS:pn-device-tree ?= "" -XSCTH_PROC:pn-device-tree ?= "microblaze_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD kcu105}" - -# Yocto FS-Boot variables -YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0" -YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "DDR4_0" -YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0" -XSCTH_PROC:pn-fs-boot ?= "microblaze_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x80000000" -UBOOT_LOADADDRESS ?= "0x80000000" - -# kcu105-microblazeel Serial Console -SERIAL_CONSOLES ?= "115200;ttyUL0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Set DDR Base address for u-boot-xlnx-scr variables -DDR_BASEADDR ?= "0x80000000" -SKIP_APPEND_BASEADDR ?= "0" - -# Required generic machine inclusion -require conf/machine/microblaze-generic.conf - -# This machine conf file uses kcu105-microblazeel xsa as reference input. -# User can override with kcu105 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "kcu105-microblazeel" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' kcu105_microblazeel']['kcu105-microblazeel' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-mh-div-generic.conf b/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-mh-div-generic.conf deleted file mode 100644 index 96b4e6d1e..000000000 --- a/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-mh-div-generic.conf +++ /dev/null @@ -1,7 +0,0 @@ -#@TYPE: Machine -#@NAME: microblazeel-v11.0-bs-cmp-mh-div-generic -#@DESCRIPTION: microblazeel-v11.0-bs-cmp-mh-div - -TUNE_FEATURES:tune-microblaze ?= "microblaze v11.0 barrel-shift pattern-compare reorder divide-hard multiply-high" - -require conf/machine/microblaze-generic.conf diff --git a/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-ml-generic.conf b/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-ml-generic.conf deleted file mode 100644 index cf83acf81..000000000 --- a/meta-xilinx-bsp/conf/machine/microblazeel-v11.0-bs-cmp-ml-generic.conf +++ /dev/null @@ -1,7 +0,0 @@ -#@TYPE: Machine -#@NAME: microblazeel-v11.0-bs-cmp-ml-generic -#@DESCRIPTION: microblazeel-v11.0-bs-cmp-ml - -TUNE_FEATURES:tune-microblaze ?= "microblaze v11.0 barrel-shift reorder pattern-compare multiply-low" - -require conf/machine/microblaze-generic.conf diff --git a/meta-xilinx-bsp/conf/machine/qemu-zynqmp-cg.conf b/meta-xilinx-bsp/conf/machine/qemu-zynqmp-cg.conf deleted file mode 100644 index cb92bc714..000000000 --- a/meta-xilinx-bsp/conf/machine/qemu-zynqmp-cg.conf +++ /dev/null @@ -1,42 +0,0 @@ -#@TYPE: Machine -#@NAME: QEMU ZynqMP CG machine -#@DESCRIPTION: Machine configuration for running a ZynqMP CG system on QEMU w/ testimage - -# This machine is NOT designed to be inherited by other machines or used as an -# example of how to create a machine. It is only useful for running testimage -# with runqemu. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'qemu-zynqmp-cg:']['qemu-zynqmp-cg' !='${MACHINE}']}" -#### Regular settings follow - -# The following is from conf/machine/include/qemu.inc, but we can not use it -# as it changes other values that need to come from the distro and the -# AMD machine settings -XSERVER ?= "xserver-xorg \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-swrast xserver-xorg-extension-glx', '', d)} \ - xf86-video-fbdev \ - xf86-video-modesetting \ - " - -MACHINE_FEATURES = "alsa bluetooth usbgadget screen vfat" - -MACHINEOVERRIDES =. "qemuall:" - -IMAGE_FSTYPES += "tar.bz2 ext4" - -# Don't include kernels in standard images -RDEPENDS:${KERNEL_PACKAGE_NAME}-base = "" - -# Provide the nfs server kernel module for all qemu images -KERNEL_FEATURES:append:pn-linux-yocto = " features/nfsd/nfsd-enable.scc" -KERNEL_FEATURES:append:pn-linux-yocto-rt = " features/nfsd/nfsd-enable.scc" -KERNEL_FEATURES:append:pn-linux-xlnx = " features/nfsd/nfsd-enable.scc" - - -# Now include the generic machine which already supports QEMU booting -require conf/machine/zynqmp-cg-generic.conf - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' qemu_zynqmp_cg']['qemu-zynqmp-cg' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/qemu-zynqmp-dr.conf b/meta-xilinx-bsp/conf/machine/qemu-zynqmp-dr.conf deleted file mode 100644 index 5fcb35411..000000000 --- a/meta-xilinx-bsp/conf/machine/qemu-zynqmp-dr.conf +++ /dev/null @@ -1,42 +0,0 @@ -#@TYPE: Machine -#@NAME: QEMU ZynqMP DR machine -#@DESCRIPTION: Machine configuration for running a ZynqMP DR system on QEMU w/ testimage - -# This machine is NOT designed to be inherited by other machines or used as an -# example of how to create a machine. It is only useful for running testimage -# with runqemu. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'qemu-zynqmp-dr:']['qemu-zynqmp-dr' !='${MACHINE}']}" -#### Regular settings follow - -# The following is from conf/machine/include/qemu.inc, but we can not use it -# as it changes other values that need to come from the distro and the -# AMD machine settings -XSERVER ?= "xserver-xorg \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-swrast xserver-xorg-extension-glx', '', d)} \ - xf86-video-fbdev \ - xf86-video-modesetting \ - " - -MACHINE_FEATURES = "alsa bluetooth usbgadget screen vfat" - -MACHINEOVERRIDES =. "qemuall:" - -IMAGE_FSTYPES += "tar.bz2 ext4" - -# Don't include kernels in standard images -RDEPENDS:${KERNEL_PACKAGE_NAME}-base = "" - -# Provide the nfs server kernel module for all qemu images -KERNEL_FEATURES:append:pn-linux-yocto = " features/nfsd/nfsd-enable.scc" -KERNEL_FEATURES:append:pn-linux-yocto-rt = " features/nfsd/nfsd-enable.scc" -KERNEL_FEATURES:append:pn-linux-xlnx = " features/nfsd/nfsd-enable.scc" - - -# Now include the generic machine which already supports QEMU booting -require conf/machine/zynqmp-dr-generic.conf - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' qemu_zynqmp_dr']['qemu-zynqmp-dr' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/qemu-zynqmp-eg.conf b/meta-xilinx-bsp/conf/machine/qemu-zynqmp-eg.conf deleted file mode 100644 index 5f4b972cf..000000000 --- a/meta-xilinx-bsp/conf/machine/qemu-zynqmp-eg.conf +++ /dev/null @@ -1,42 +0,0 @@ -#@TYPE: Machine -#@NAME: QEMU ZynqMP EG machine -#@DESCRIPTION: Machine configuration for running a ZynqMP EG system on QEMU w/ testimage - -# This machine is NOT designed to be inherited by other machines or used as an -# example of how to create a machine. It is only useful for running testimage -# with runqemu. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'qemu-zynqmp-eg:']['qemu-zynqmp-eg' !='${MACHINE}']}" -#### Regular settings follow - -# The following is from conf/machine/include/qemu.inc, but we can not use it -# as it changes other values that need to come from the distro and the -# AMD machine settings -XSERVER ?= "xserver-xorg \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-swrast xserver-xorg-extension-glx', '', d)} \ - xf86-video-fbdev \ - xf86-video-modesetting \ - " - -MACHINE_FEATURES = "alsa bluetooth usbgadget screen vfat" - -MACHINEOVERRIDES =. "qemuall:" - -IMAGE_FSTYPES += "tar.bz2 ext4" - -# Don't include kernels in standard images -RDEPENDS:${KERNEL_PACKAGE_NAME}-base = "" - -# Provide the nfs server kernel module for all qemu images -KERNEL_FEATURES:append:pn-linux-yocto = " features/nfsd/nfsd-enable.scc" -KERNEL_FEATURES:append:pn-linux-yocto-rt = " features/nfsd/nfsd-enable.scc" -KERNEL_FEATURES:append:pn-linux-xlnx = " features/nfsd/nfsd-enable.scc" - - -# Now include the generic machine which already supports QEMU booting -require conf/machine/zynqmp-eg-generic.conf - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' qemu_zynqmp_eg']['qemu-zynqmp-eg' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/qemu-zynqmp-ev.conf b/meta-xilinx-bsp/conf/machine/qemu-zynqmp-ev.conf deleted file mode 100644 index 6058bfa42..000000000 --- a/meta-xilinx-bsp/conf/machine/qemu-zynqmp-ev.conf +++ /dev/null @@ -1,42 +0,0 @@ -#@TYPE: Machine -#@NAME: QEMU ZynqMP EV machine -#@DESCRIPTION: Machine configuration for running a ZynqMP EV system on QEMU w/ testimage - -# This machine is NOT designed to be inherited by other machines or used as an -# example of how to create a machine. It is only useful for running testimage -# with runqemu. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'qemu-zynqmp-ev:']['qemu-zynqmp-ev' !='${MACHINE}']}" -#### Regular settings follow - -# The following is from conf/machine/include/qemu.inc, but we can not use it -# as it changes other values that need to come from the distro and the -# AMD machine settings -XSERVER ?= "xserver-xorg \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-swrast xserver-xorg-extension-glx', '', d)} \ - xf86-video-fbdev \ - xf86-video-modesetting \ - " - -MACHINE_FEATURES = "alsa bluetooth usbgadget screen vfat" - -MACHINEOVERRIDES =. "qemuall:" - -IMAGE_FSTYPES += "tar.bz2 ext4" - -# Don't include kernels in standard images -RDEPENDS:${KERNEL_PACKAGE_NAME}-base = "" - -# Provide the nfs server kernel module for all qemu images -KERNEL_FEATURES:append:pn-linux-yocto = " features/nfsd/nfsd-enable.scc" -KERNEL_FEATURES:append:pn-linux-yocto-rt = " features/nfsd/nfsd-enable.scc" -KERNEL_FEATURES:append:pn-linux-xlnx = " features/nfsd/nfsd-enable.scc" - - -# Now include the generic machine which already supports QEMU booting -require conf/machine/zynqmp-ev-generic.conf - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' qemu_zynqmp_ev']['qemu-zynqmp-ev' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/qemu-zynqmp.conf b/meta-xilinx-bsp/conf/machine/qemu-zynqmp.conf deleted file mode 100644 index 91a96edeb..000000000 --- a/meta-xilinx-bsp/conf/machine/qemu-zynqmp.conf +++ /dev/null @@ -1,45 +0,0 @@ -#@TYPE: Machine -#@NAME: QEMU ZynqMP machine -#@DESCRIPTION: Machine configuration for running a ZynqMP system on QEMU w/ testimage - -# This machine is NOT designed to be inherited by other machines or used as an -# example of how to create a machine. It is only useful for running testimage -# with runqemu. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'qemu-zynqmp:']['qemu-zynqmp' !='${MACHINE}']}" -#### Regular settings follow - -# The following is from conf/machine/include/qemu.inc, but we can not use it -# as it changes other values that need to come from the distro and the -# AMD machine settings -XSERVER ?= "xserver-xorg \ - ${@bb.utils.contains('DISTRO_FEATURES', 'opengl', 'mesa-driver-swrast xserver-xorg-extension-glx', '', d)} \ - xf86-video-fbdev \ - xf86-video-modesetting \ - " - -MACHINE_FEATURES = "alsa bluetooth usbgadget screen vfat" - -MACHINEOVERRIDES =. "qemuall:" - -IMAGE_FSTYPES += "tar.bz2 ext4" - -# Don't include kernels in standard images -RDEPENDS:${KERNEL_PACKAGE_NAME}-base = "" - -# Provide the nfs server kernel module for all qemu images -KERNEL_FEATURES:append:pn-linux-yocto = " features/nfsd/nfsd-enable.scc" -KERNEL_FEATURES:append:pn-linux-yocto-rt = " features/nfsd/nfsd-enable.scc" -KERNEL_FEATURES:append:pn-linux-xlnx = " features/nfsd/nfsd-enable.scc" - - -# Now include the generic machine which already supports QEMU booting -require conf/machine/zynqmp-generic.conf - -# This may break standalone runqemu, but allows testimage to work -QB_XILINX_SERIAL = "" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' qemu_zynqmp']['qemu-zynqmp' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/sp701-microblazeel.conf b/meta-xilinx-bsp/conf/machine/sp701-microblazeel.conf deleted file mode 100644 index e3df1d261..000000000 --- a/meta-xilinx-bsp/conf/machine/sp701-microblazeel.conf +++ /dev/null @@ -1,52 +0,0 @@ -#@TYPE: Machine -#@NAME: sp701-microblazeel -#@DESCRIPTION: Machine configuration for the SP701 boards. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'sp701-microblazeel:']['sp701-microblazeel' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in microblazeel-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "MIG_7SERIES_0" -DT_PADDING_SIZE:pn-device-tree ?= "0x1000" -DTC_FLAGS:pn-device-tree ?= "" -XSCTH_PROC:pn-device-tree ?= "microblaze_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD sp701-rev1.0}" - -# Yocto u-boot-xlnx variables - -# Yocto FS-Boot variables -YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0" -YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "MIG_7SERIES_0" -YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0" -XSCTH_PROC:pn-fs-boot ?= "microblaze_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x80000000" -UBOOT_LOADADDRESS ?= "0x80000000" - -# xilinx-sp701 Serial Console -SERIAL_CONSOLES ?= "115200;ttyUL0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Set DDR Base address for u-boot-xlnx-scr variables -DDR_BASEADDR ?= "0x80000000" -SKIP_APPEND_BASEADDR ?= "0" - -# Required generic machine inclusion -require conf/machine/microblaze-generic.conf - -# This machine conf file uses sp701-microblazeel xsa as reference input. -# User can override with kc705 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "sp701-microblazeel" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' sp701_microblazeel']['sp701-microblazeel' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/vck190-versal.conf b/meta-xilinx-bsp/conf/machine/vck190-versal.conf deleted file mode 100644 index ed0492687..000000000 --- a/meta-xilinx-bsp/conf/machine/vck190-versal.conf +++ /dev/null @@ -1,45 +0,0 @@ -#@TYPE: Machine -#@NAME: vck190-versal -#@DESCRIPTION: Machine configuration for the VCK190 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'vck190-versal:']['vck190-versal' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in versal-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "CIPS_0_pspmc_0_psv_sbsauart_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vck190-reva-x-ebm-01-reva}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "pl011" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PLM variables -YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware ?= "CIPS_0_pspmc_0_psv_sbsauart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "CIPS_0_pspmc_0_psv_sbsauart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# vck190-versal Serial Console -SERIAL_CONSOLES ?= "115200;ttyAMA0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# VCK190 board uses Versal AI Core device hence use soc variant based generic -# machine inclusion -require conf/machine/versal-ai-core-generic.conf - -# This machine conf file uses vck190-versal xsa as reference input. -# User can override with vck190 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "vck190-versal" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' vck190_versal']['vck190-versal' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/vcu118-microblazeel.conf b/meta-xilinx-bsp/conf/machine/vcu118-microblazeel.conf deleted file mode 100644 index bfd60336e..000000000 --- a/meta-xilinx-bsp/conf/machine/vcu118-microblazeel.conf +++ /dev/null @@ -1,50 +0,0 @@ -#@TYPE: Machine -#@NAME: vcu118-microblazeel -#@DESCRIPTION: Machine configuration for the VCU118 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'vcu118-microblazeel:']['vcu118-microblazeel' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in microblazeel-generic.conf will be set. - -# Yocto VCU118 device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "DDR4_0" -DT_PADDING_SIZE:pn-device-tree ?= "0x1000" -DTC_FLAGS:pn-device-tree ?= "" -XSCTH_PROC:pn-device-tree ?= "microblaze_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD vcu118-rev2.0}" - -# Yocto FS-Boot variables -YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0" -YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "DDR4_0" -YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0" -XSCTH_PROC:pn-fs-boot ?= "microblaze_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x80000000" -UBOOT_LOADADDRESS ?= "0x80000000" - -# vcu118-microblazeel Serial Console -SERIAL_CONSOLES ?= "115200;ttyUL0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Set DDR Base address for u-boot-xlnx-scr variables -DDR_BASEADDR ?= "0x80000000" -SKIP_APPEND_BASEADDR ?= "0" - -# Required generic machine inclusion -require conf/machine/microblaze-generic.conf - -# This machine conf file uses vcu118-microblazeel xsa as reference input. -# User can override with vcu118 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "vcu118-microblazeel" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' vcu118_microblazeel']['vcu118-microblazeel' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/vek280-versal.conf b/meta-xilinx-bsp/conf/machine/vek280-versal.conf deleted file mode 100644 index ffe2fcb75..000000000 --- a/meta-xilinx-bsp/conf/machine/vek280-versal.conf +++ /dev/null @@ -1,55 +0,0 @@ -XILINX_DEPRECATED[vek280-versal] = "${@'vek280-versal is not supported in 2023.2' if d.getVar("XILINX_RELEASE_VERSION") == 'v2023.2' else ''}" - -#@TYPE: Machine -#@NAME: vek280-versal -#@DESCRIPTION: Machine configuration for the VEK280 evaluation boards. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'vek280-versal:']['vek280-versal' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in versal-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "CIPS_0_pspmc_0_psv_sbsauart_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vek280-revb}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "pl011" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PLM variables -YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware ?= "CIPS_0_pspmc_0_psv_sbsauart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "CIPS_0_pspmc_0_psv_sbsauart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# vek280-versal Serial Console -SERIAL_CONSOLES ?= "115200;ttyAMA0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -require conf/machine/versal-ai-edge-generic.conf - -# This machine conf file uses vek280-versal xsa as reference input. -# User can override with vek280 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "vek280-versal" - -# VEK280 board has 12GB memory only but default versal-generic has QB_MEM set to -# 8G, Hence we need set 12G in QB_MEM. -QB_MEM = "-m 12G" - -QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/board-versal-ps-vek280.dtb" -QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb" - -# Yocto MACHINE_FEATURES Variable -MACHINE_FEATURES += "vdu" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' vek280_versal']['vek280-versal' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/vhk158-versal.conf b/meta-xilinx-bsp/conf/machine/vhk158-versal.conf deleted file mode 100644 index bc2dc6c86..000000000 --- a/meta-xilinx-bsp/conf/machine/vhk158-versal.conf +++ /dev/null @@ -1,53 +0,0 @@ -#@TYPE: Machine -#@NAME: vhk158-versal -#@DESCRIPTION: Machine configuration for the VHK158 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'vhk158-versal:']['vhk158-versal' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in versal-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "versal_cips_0_pspmc_0_psv_sbsauart_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "axi_noc_0_C0_DDR_LOW0x2" -YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vhk158-reva}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "pl011" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PLM variables -YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# vhk158-versal Serial Console -SERIAL_CONSOLES ?= "115200;ttyAMA0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# VHK158 board uses Versal HBM device hence use soc variant based generic -# machine inclusion -require conf/machine/versal-hbm-generic.conf - -# This machine conf file uses vhk158-versal xsa as reference input. -# User can override with vhk158 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "vhk158-versal" - -# VHK158 has 32GB memory only but default versal-generic has QB_MEM set to 8G, -# Since versal-vhk158-reva.dts has 32GB set, we need set same in QB_MEM -QB_MEM = "-m 32G" - -QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/board-versal-ps-vhk158.dtb" -QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', 'vhk158_versal']['vhk158-versal' != '${MACHINE}']}" \ No newline at end of file diff --git a/meta-xilinx-bsp/conf/machine/vmk180-versal.conf b/meta-xilinx-bsp/conf/machine/vmk180-versal.conf deleted file mode 100644 index 0f474f780..000000000 --- a/meta-xilinx-bsp/conf/machine/vmk180-versal.conf +++ /dev/null @@ -1,45 +0,0 @@ -#@TYPE: Machine -#@NAME: vmk180-versal -#@DESCRIPTION: Machine configuration for the VMK180 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'vmk180-versal:']['vmk180-versal' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in versal-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "versal_cips_0_pspmc_0_psv_sbsauart_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vmk180-reva-x-ebm-01-reva}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "pl011" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PLM variables -YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# vmk180-versal Serial Console -SERIAL_CONSOLES ?= "115200;ttyAMA0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# VMK180 board uses Versal Prime device hence use soc variant based generic -# machine inclusion -require conf/machine/versal-prime-generic.conf - -# This machine conf file uses vmk180-versal xsa as reference input. -# User can override with vmk180 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "vmk180-versal" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' vmk180_versal']['vmk180-versal' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/vpk120-versal.conf b/meta-xilinx-bsp/conf/machine/vpk120-versal.conf deleted file mode 100644 index e200d42d6..000000000 --- a/meta-xilinx-bsp/conf/machine/vpk120-versal.conf +++ /dev/null @@ -1,48 +0,0 @@ -#@TYPE: Machine -#@NAME: vpk120-versal -#@DESCRIPTION: Machine configuration for the VPK120 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'vpk120-versal:']['vpk120-versal' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in versal-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "versal_cips_0_pspmc_0_psv_sbsauart_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vpk120-reva}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "pl011" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PLM variables -YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# vpk120-versal Serial Console -SERIAL_CONSOLES ?= "115200;ttyAMA0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# VPK120 board uses Versal Premium device hence use soc variant based generic -# machine inclusion -require conf/machine/versal-premium-generic.conf - -# This machine conf file uses vpk120-versal xsa as reference input. -# User can override with vpk120 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "vpk120-versal" - -QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/board-versal-ps-vpk120.dtb" -QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' vpk120_versal']['vpk120-versal' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/vpk180-versal.conf b/meta-xilinx-bsp/conf/machine/vpk180-versal.conf deleted file mode 100644 index 92630e97b..000000000 --- a/meta-xilinx-bsp/conf/machine/vpk180-versal.conf +++ /dev/null @@ -1,48 +0,0 @@ -#@TYPE: Machine -#@NAME: vpk180-versal -#@DESCRIPTION: Machine configuration for the VPK180 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'vpk180-versal:']['vpk180-versal' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in versal-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "versal_cips_0_pspmc_0_psv_sbsauart_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vpk180-reva}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "pl011" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PLM variables -YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# vpk180-versal Serial Console -SERIAL_CONSOLES ?= "115200;ttyAMA0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# VPK180 board uses Versal Premium device hence use soc variant based generic -# machine inclusion -require conf/machine/versal-premium-generic.conf - -# This machine conf file uses vpk180-versal xsa as reference input. -# User can override with vpk180 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "vpk180-versal" - -QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/board-versal-ps-vpk180.dtb" -QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' vpk180_versal']['vpk180-versal' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/zc1254-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zc1254-zynqmp.conf deleted file mode 100644 index a9dbe800f..000000000 --- a/meta-xilinx-bsp/conf/machine/zc1254-zynqmp.conf +++ /dev/null @@ -1,11 +0,0 @@ -#@TYPE: Machine -#@NAME: zc1254-zynqmp -#@DESCRIPTION: Machine support for ZC1254 Evaluation Board. -# - -require conf/machine/zynqmp-dr-generic.conf - -# Add board compatibility override -MACHINEOVERRIDES .= ":zc1254" - -KERNEL_DEVICETREE = "xilinx/zynqmp-zc1254-revA.dtb" diff --git a/meta-xilinx-bsp/conf/machine/zc702-zynq7.conf b/meta-xilinx-bsp/conf/machine/zc702-zynq7.conf deleted file mode 100644 index 1db0616fb..000000000 --- a/meta-xilinx-bsp/conf/machine/zc702-zynq7.conf +++ /dev/null @@ -1,44 +0,0 @@ -#@TYPE: Machine -#@NAME: zc702-zynq7 -#@DESCRIPTION: Machine configuration for the ZC702 evaluation boards. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'zc702-zynq7:']['zc702-zynq7' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in zynq-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "ps7_uart_1" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PS7_DDR_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD zc702}" - -# Yocto FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "ps7_uart_1" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "ps7_uart_1" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# zc702-zynq7 Serial Console -SERIAL_CONSOLES ?= "115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -require conf/machine/zynq-generic.conf - -# This eval board machine conf file uses zc702-zynq7 xsa as reference input. -# User can override with zc702 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "zc702-zynq7" - -# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match -# the xsa. User can enable explicitly if required from local.conf. -# KERNEL_DEVICETREE = "zynq-zc702.dtb" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' zc702_zynq7']['zc702-zynq7' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/zc706-zynq7.conf b/meta-xilinx-bsp/conf/machine/zc706-zynq7.conf deleted file mode 100644 index 7e0525d1c..000000000 --- a/meta-xilinx-bsp/conf/machine/zc706-zynq7.conf +++ /dev/null @@ -1,44 +0,0 @@ -#@TYPE: Machine -#@NAME: zc706-zynq7 -#@DESCRIPTION: Machine configuration for the ZC706 evaluation boards. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'zc706-zynq7:']['zc706-zynq7' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in zynq-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "ps7_uart_1" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PS7_DDR_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD zc706}" - -# Yocto FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "ps7_uart_1" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "ps7_uart_1" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# zc706-zynq7 Serial Console -SERIAL_CONSOLES ?= "115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -require conf/machine/zynq-generic.conf - -# This eval board machine conf file uses zc702-zynq7 xsa as reference input. -# User can override with zc702 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "zc706-zynq7" - -# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match -# the xsa. User can enable explicitly if required from local.conf. -# KERNEL_DEVICETREE = "zynq-zc706.dtb" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' zc706_zynq7']['zc706-zynq7' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf deleted file mode 100644 index acd2544a3..000000000 --- a/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf +++ /dev/null @@ -1,54 +0,0 @@ -#@TYPE: Machine -#@NAME: zcu102-zynqmp -#@DESCRIPTION: Machine configuration for the ZCU102 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'zcu102-zynqmp:']['zcu102-zynqmp' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in zynqmp-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD zcu102-rev1.0}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "cadence" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PMUFW variables -YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware ?= "psu_uart_0" - -# Yocto FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# zcu102-zynqmp Serial Console -SERIAL_CONSOLES ?= "115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# ZCU102 board uses ZynqMP EG device hence use soc variant based generic machine -# inclusion -require conf/machine/zynqmp-eg-generic.conf - -# This eval board machine conf file uses zcu102-zynqmp xsa as reference input. -# User can override with zcu102 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "zcu102-zynqmp" - -# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match -# the xsa. User can enable explicitly if required from local.conf. -# KERNEL_DEVICETREE = "xilinx/zynqmp-zcu102-rev1.0.dtb" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu102_zynqmp']['zcu102-zynqmp' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf deleted file mode 100644 index bff853b8d..000000000 --- a/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf +++ /dev/null @@ -1,58 +0,0 @@ -#@TYPE: Machine -#@NAME: zcu104-zynqmp -#@DESCRIPTION: Machine configuration for the ZCU104 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'zcu104-zynqmp:']['zcu104-zynqmp' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in zynqmp-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD zcu104-revc}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "cadence" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PMUFW variables -YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware ?= "psu_uart_0" - -# Yocto FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# zcu104-zynqmp Serial Console -SERIAL_CONSOLES ?= "115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# ZCU104 board uses ZynqMP EV device hence use soc variant based generic machine -# inclusion -require conf/machine/zynqmp-ev-generic.conf - -# This eval board machine conf file uses zcu104-zynqmp xsa as reference input. -# User can override with zcu104 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "zcu104-zynqmp" - -# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match -# the xsa. User can enable explicitly if required from local.conf. -# KERNEL_DEVICETREE = "xilinx/zynqmp-zcu104-revC.dtb" - -# Yocto IMAGE_FEATURES Variable -MACHINE_HWCODECS = "libvcu-omxil" -IMAGE_FEATURES += "hwcodecs" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu104_zynqmp']['zcu104-zynqmp' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf deleted file mode 100644 index cc2c6083d..000000000 --- a/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf +++ /dev/null @@ -1,58 +0,0 @@ -#@TYPE: Machine -#@NAME: zcu106-zynqmp -#@DESCRIPTION: Machine configuration for the ZCU106 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'zcu106-zynqmp:']['zcu106-zynqmp' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in zynqmp-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD zcu106-reva}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "cadence" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PMUFW variables -YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware ?= "psu_uart_0" - -# Yocto FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# zcu106-zynqmp Serial Console -SERIAL_CONSOLES ?= "115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# ZCU106 board uses ZynqMP EV device hence use soc variant based generic machine -# inclusion -require conf/machine/zynqmp-ev-generic.conf - -# This eval board machine conf file uses zcu106-zynqmp xsa as reference input. -# User can override with zcu106 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "zcu106-zynqmp" - -# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match -# the xsa. User can enable explicitly if required from local.conf. -# KERNEL_DEVICETREE = "xilinx/zynqmp-zcu106-revA.dtb" - -# Yocto IMAGE_FEATURES Variable -MACHINE_HWCODECS = "libvcu-omxil" -IMAGE_FEATURES += "hwcodecs" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu106_zynqmp']['zcu106-zynqmp' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf deleted file mode 100644 index 77da93ca1..000000000 --- a/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf +++ /dev/null @@ -1,54 +0,0 @@ -#@TYPE: Machine -#@NAME: zcu111-zynqmp -#@DESCRIPTION: Machine configuration for the ZCU111 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'zcu111-zynqmp:']['zcu111-zynqmp' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in zynqmp-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD zcu111-reva}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "cadence" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PMUFW variables -YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware ?= "psu_uart_0" - -# Yocto FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# zcu111-zynqmp Serial Console -SERIAL_CONSOLES ?= "115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# ZCU111 board uses ZynqMP DR device hence use soc variant based generic machine -# inclusion -require conf/machine/zynqmp-dr-generic.conf - -# This eval board machine conf file uses zcu111-zynqmp xsa as reference input. -# User can override with zcu111 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "zcu111-zynqmp" - -# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match -# the xsa. User can enable explicitly if required from local.conf. -# KERNEL_DEVICETREE = "xilinx/zynqmp-zcu111-revA.dtb" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu111_zynqmp']['zcu111-zynqmp' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/zcu1275-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu1275-zynqmp.conf deleted file mode 100644 index 18aa3eeee..000000000 --- a/meta-xilinx-bsp/conf/machine/zcu1275-zynqmp.conf +++ /dev/null @@ -1,52 +0,0 @@ -XILINX_DEPRECATED[zcu1275-zynqmp] = "${@'zcu1275-zynqmp is not supported in 2023.2' if d.getVar("XILINX_RELEASE_VERSION") == 'v2023.2' else ''}" - -#@TYPE: Machine -#@NAME: zcu1275-zynqmp -#@DESCRIPTION: Machine configuration for the ZCU1275 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'zcu1275-zynqmp:']['zcu1275-zynqmp' !='${MACHINE}']}" -#### Regular settings follow - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD zcu1275-revb}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "cadence" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PMUFW variables -YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware ?= "psu_uart_0" - -# Yocto FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# zcu1275-zynqmp Serial Console -SERIAL_CONSOLES ?= "115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# ZCU1275 board uses ZynqMP DR device hence use soc variant based generic machine -# inclusion -require conf/machine/zynqmp-dr-generic.conf - -# This eval board machine conf file uses zcu1275-zynqmp xsa as reference input. -# User can override with zcu1275 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "zcu1275-zynqmp" - -# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match -# the xsa. User can enable explicitly if required from local.conf. -# KERNEL_DEVICETREE = "xilinx/zynqmp-zcu1275-revB.dtb" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', 'zcu1275_zynqmp']['zcu1275-zynqmp' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf deleted file mode 100644 index 6fba36191..000000000 --- a/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf +++ /dev/null @@ -1,56 +0,0 @@ -XILINX_DEPRECATED[zcu1285-zynqmp] = "${@'zcu1285-zynqmp is not supported in 2023.2' if d.getVar("XILINX_RELEASE_VERSION") == 'v2023.2' else ''}" - -#@TYPE: Machine -#@NAME: zcu1285-zynqmp -#@DESCRIPTION: Machine configuration for the ZCU1285 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'zcu1285-zynqmp:']['zcu1285-zynqmp' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in zynqmp-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD zcu1285-reva}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "cadence" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PMUFW variables -YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware ?= "psu_uart_0" - -# Yocto FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# zcu1285-zynqmp Serial Console -SERIAL_CONSOLES ?= "115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# ZCU1285 board uses ZynqMP DR device hence use soc variant based generic machine -# inclusion -require conf/machine/zynqmp-dr-generic.conf - -# This eval board machine conf file uses zcu1285-zynqmp xsa as reference input. -# User can override with zcu1285 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "zcu1285-zynqmp" - -# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match -# the xsa. User can enable explicitly if required from local.conf. -# KERNEL_DEVICETREE = "xilinx/zynqmp-zcu1285-revA.dtb" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', 'zcu1285_zynqmp']['zcu1285-zynqmp' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf deleted file mode 100644 index 7bb2c9db2..000000000 --- a/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf +++ /dev/null @@ -1,50 +0,0 @@ -#@TYPE: Machine -#@NAME: zcu208-zynqmp -#@DESCRIPTION: Machine configuration for the ZCU208 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'zcu208-zynqmp:']['zcu208-zynqmp' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in zynqmp-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD zcu208-reva}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "cadence" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PMUFW variables -YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware ?= "psu_uart_0" - -# Yocto FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# zcu208-zynqmp Serial Console -SERIAL_CONSOLES ?= "115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# ZCU208 board uses ZynqMP DR device hence use soc variant based generic machine -# inclusion -require conf/machine/zynqmp-dr-generic.conf - -# This eval board machine conf file uses zcu208-zynqmp xsa as reference input. -# User can override with zcu208 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "zcu208-zynqmp" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu208_zynqmp']['zcu208-zynqmp' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf deleted file mode 100644 index f4e1619d8..000000000 --- a/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf +++ /dev/null @@ -1,50 +0,0 @@ -#@TYPE: Machine -#@NAME: zcu216-zynqmp -#@DESCRIPTION: Machine configuration for the ZCU216 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'zcu216-zynqmp:']['zcu216-zynqmp' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in zynqmp-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD zcu216-reva}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "cadence" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PMUFW variables -YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware ?= "psu_uart_0" - -# Yocto FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# zcu216-zynqmp Serial Console -SERIAL_CONSOLES ?= "115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# ZCU216 board uses ZynqMP DR device hence use soc variant based generic machine -# inclusion -require conf/machine/zynqmp-dr-generic.conf - -# This eval board machine conf file uses zcu216-zynqmp xsa as reference input. -# User can override with zcu216 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "zcu216-zynqmp" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu216_zynqmp']['zcu216-zynqmp' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/conf/machine/zcu670-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu670-zynqmp.conf deleted file mode 100644 index 6b1dd4887..000000000 --- a/meta-xilinx-bsp/conf/machine/zcu670-zynqmp.conf +++ /dev/null @@ -1,50 +0,0 @@ -#@TYPE: Machine -#@NAME: zcu670-zynqmp -#@DESCRIPTION: Machine configuration for the ZCU670 evaluation board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'zcu670-zynqmp:']['zcu670-zynqmp' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in zynqmp-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD zcu670-revb}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE_DEFAULT ?= "cadence" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PMUFW variables -YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware ?= "psu_uart_0" - -# Yocto FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_0" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# zcu670-zynqmp Serial Console -SERIAL_CONSOLES ?= "115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# ZCU670 board uses ZynqMP DR device hence use soc variant based generic machine -# inclusion -require conf/machine/zynqmp-dr-generic.conf - -# This eval board machine conf file uses zcu670-zynqmp xsa as reference input. -# User can override with zcu670 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "zcu670-zynqmp" - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', 'zcu670_zynqmp']['zcu670-zynqmp' != '${MACHINE}']}" diff --git a/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_%.bbappend b/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_%.bbappend deleted file mode 100644 index c6c92fe7c..000000000 --- a/meta-xilinx-bsp/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_%.bbappend +++ /dev/null @@ -1,2 +0,0 @@ -EXTRA_OEMAKE:append:vc-p-a2197-00-versal =" VERSAL_PLATFORM=silicon" - diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend deleted file mode 100644 index 7acda75e8..000000000 --- a/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend +++ /dev/null @@ -1,9 +0,0 @@ -FILESEXTRAPATHS:prepend := "${THISDIR}/files:" - -# device tree sources for the various machines -COMPATIBLE_MACHINE:qemu-zynq7 = ".*" -SRC_URI:append:qemu-zynq7 = " file://qemu-zynq7.dts" - -EXTRA_OVERLAYS:append = "${@bb.utils.contains('MACHINE_FEATURES', 'provencore', ' pnc.dtsi', '', d)}" - -EXTRA_OVERLAYS:append:vek280-versal = " system-vek280.dtsi" diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/pnc.dtsi b/meta-xilinx-bsp/recipes-bsp/device-tree/files/pnc.dtsi deleted file mode 100644 index 760b76be0..000000000 --- a/meta-xilinx-bsp/recipes-bsp/device-tree/files/pnc.dtsi +++ /dev/null @@ -1,13 +0,0 @@ -/ { - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - pnc-reserved-memory@70000000{ - compatible = "pnc,secure-memory"; - reg = <0x0 0x70000000 0x0 0x0FF00000>; - no-map; - }; - }; -}; diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/qemu-zynq7.dts b/meta-xilinx-bsp/recipes-bsp/device-tree/files/qemu-zynq7.dts deleted file mode 100644 index cd0694d6b..000000000 --- a/meta-xilinx-bsp/recipes-bsp/device-tree/files/qemu-zynq7.dts +++ /dev/null @@ -1,85 +0,0 @@ -/dts-v1/; -/include/ "zynq-7000.dtsi" -/include/ "zynq-7000-qspi-dummy.dtsi" - -/ { - model = "Zynq A9 QEMU"; - compatible = "qemu,xilinx-zynq-a9", "xlnx,zynq-7000"; - - aliases { - ethernet0 = &gem0; - serial0 = &uart1; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x40000000>; - }; - - chosen { - bootargs = "earlyprintk"; - stdout-path = "serial0:115200n8"; - }; -}; - -&amba { - /* Setup a fixed 25 MHz clock (100Mbps) to trick the ethernet driver */ - fixednetclk: clock { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <25000000>; - }; -}; - -&gem0 { - status = "okay"; - clocks = <&clkc 30>, <&clkc 30>, <&fixednetclk>, <&fixednetclk>, <&clkc 30>; - phy-mode = "rgmii-id"; - phy-handle = <ðernet_phy>; - - ethernet_phy: ethernet-phy@23 { - device_type = "ethernet-phy"; - reg = <23>; - }; -}; - -&sdhci0 { - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&qspi { - status = "okay"; - is-dual = <1>; - primary_flash: ps7-qspi@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p80"; - reg = <0x0>; - spi-max-frequency = <50000000>; - partition@0x00000000 { - label = "boot"; - reg = <0x00000000 0x00500000>; - }; - partition@0x00500000 { - label = "bootenv"; - reg = <0x00500000 0x00020000>; - }; - partition@0x00520000 { - label = "config"; - reg = <0x00520000 0x00020000>; - }; - partition@0x00540000 { - label = "image"; - reg = <0x00540000 0x00a80000>; - }; - partition@0x00fc0000 { - label = "spare"; - reg = <0x00fc0000 0x00000000>; - }; - }; -}; - diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/system-vek280.dtsi b/meta-xilinx-bsp/recipes-bsp/device-tree/files/system-vek280.dtsi deleted file mode 100644 index 0d2ca87d3..000000000 --- a/meta-xilinx-bsp/recipes-bsp/device-tree/files/system-vek280.dtsi +++ /dev/null @@ -1,20 +0,0 @@ -/ { -/* Reserve the bad block DDR memory for linux to not touch it, refer:CR-1143646 */ -reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - pl_ddr: buffer@0 - { - no-map; - reg = <0x08 0x00 0x00 0x80000000>; - }; - - lpddr_memory: buffer@1 - { - no-map; - reg = <0x500 0x0 0x2 0x0>; - }; - -}; -}; diff --git a/meta-xilinx-bsp/recipes-bsp/dfx-mgr/dfx-mgr_%.bbappend b/meta-xilinx-bsp/recipes-bsp/dfx-mgr/dfx-mgr_%.bbappend deleted file mode 100644 index 1ff1e0585..000000000 --- a/meta-xilinx-bsp/recipes-bsp/dfx-mgr/dfx-mgr_%.bbappend +++ /dev/null @@ -1,10 +0,0 @@ -FILESEXTRAPATHS:append := ":${THISDIR}/files" - -SRC_URI += "file://zcu106-xlnx-firmware-detect" - -PACKAGE_ARCH:zcu106-zynqmp = "${MACHINE_ARCH}" - -# ZCU106 eval board firmware detection script. -do_install:append:zcu106-zynqmp () { - install -m 0755 ${UNPACKDIR}/zcu106-xlnx-firmware-detect ${D}${bindir}/xlnx-firmware-detect -} diff --git a/meta-xilinx-bsp/recipes-bsp/dfx-mgr/files/zcu106-xlnx-firmware-detect b/meta-xilinx-bsp/recipes-bsp/dfx-mgr/files/zcu106-xlnx-firmware-detect deleted file mode 100644 index ef5654ccf..000000000 --- a/meta-xilinx-bsp/recipes-bsp/dfx-mgr/files/zcu106-xlnx-firmware-detect +++ /dev/null @@ -1,71 +0,0 @@ -#! /bin/sh - -# Copyright (C) 2022 Xilinx, Inc. All rights reserved. -# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. -# -# SPDX-License-Identifier: MIT - -# read values from dfx-mgr conf file -conffile="/etc/dfx-mgrd/daemon.conf" -if [ ! -f "${conffile}" ]; then - echo "dfx-mgrd configuration file not found: ${conffile}" - exit 1 -fi - -fwbasedir=$(grep "firmware_location" ${conffile} | sed 's/.*:.*\[\"\(.*\)\"\],\?/\1/') -if [ -z "${fwbasedir}" ]; then - echo "Property 'firmware_location' not found in ${conffile}" - exit 1 -fi - -fwfile=$(grep "default_accel" ${conffile} | sed 's/.*:.*\"\(.*\)\",\?/\1/') -if [ -z "${fwfile}" ]; then - echo "Property 'default_accel' not found in ${conffile}" - exit 1 -fi - -# check if default firmware is already set and present -if [ -f "${fwfile}" ]; then - fwname=$(cat ${fwfile}) - fwdir="${fwbasedir}/${fwname}" - if [ -n "${fwname}" ] && [ -d "${fwdir}" ]; then - echo "Default firmware detected: ${fwname}" - exit 0 - fi -fi - -# search for firmware based on EEPROM board id -echo "Trying to detect default firmware based on EEPROM..." - -#check if board is a zcu106 eval board product -eeprom=$(ls /sys/bus/i2c/devices/*54/eeprom 2> /dev/null) -if [ -n "${eeprom}" ]; then - boardid=`dd if=$eeprom bs=1 count=6 skip=208 2>/dev/null | tr '[:upper:]' '[:lower:]'` - revision=`dd if=$eeprom bs=1 count=3 skip=224 2>/dev/null | tr '[:upper:]' '[:lower:]'` - - fwname="${boardid}-${revision}" - fwdir="${fwbasedir}/${fwname}" - - fixed_rev=2.0 - var=$(awk 'BEGIN{ print "'$fixed_rev'"<"'$revision'" }') - - if [ "${boardid}" == "zcu106" ] && [ "${var}" -eq 1 ] ;then - revision=2.0 - echo "later than 2.0 board revisions are supported in 2.0 bit and dtbo files" - fwname="${boardid}-${revision}" - fwdir="${fwbasedir}/${fwname}" - echo "${fwname}" > "${fwfile}" - exit 1 - elif [ ! -d "${fwdir}" ] ; then - echo "No default firmware named ${fwname} found in ${fwbasedir} , Loading rev1.0 bitstream and dtbo as default " - revision=1.0 - fwname=$(ls ${fwbasedir} | grep ${revision}) - fwdir="${fwbasedir}/${fwname}" - echo "${fwname}" > "${fwfile}" - exit 1 - fi - - echo "Default firmware detected: ${fwname}" - echo "${fwname}" > "${fwfile}" - exit 0 -fi diff --git a/meta-xilinx-bsp/recipes-bsp/embeddedsw/fsbl-firmware_%.bbappend b/meta-xilinx-bsp/recipes-bsp/embeddedsw/fsbl-firmware_%.bbappend index 6a23dc47b..c4b6c4ef8 100644 --- a/meta-xilinx-bsp/recipes-bsp/embeddedsw/fsbl-firmware_%.bbappend +++ b/meta-xilinx-bsp/recipes-bsp/embeddedsw/fsbl-firmware_%.bbappend @@ -7,14 +7,10 @@ PMU_CONF_BASE_NAME ?= "${PMU_CONF_NAME}-${PKGE}-${PKGV}-${PKGR}-${MACHINE}${IMAG DEPENDS:append:zynqmp = " virtual/${TARGET_PREFIX}binutils" do_compile:append:zynqmp () { - if [ -z "${SYSTEM_DTFILE}" ]; then - ${OBJCOPY} --dump-section .sys_cfg_data=${B}/${PMU_CONF_NAME}.bin ${B}/${ESW_COMPONENT} - fi + ${OBJCOPY} --dump-section .sys_cfg_data=${B}/${PMU_CONF_NAME}.bin ${B}/${ESW_COMPONENT} } do_deploy:append:zynqmp () { - if [ -z "${SYSTEM_DTFILE}" ]; then - install -Dm 0644 ${B}/${PMU_CONF_NAME}.bin ${DEPLOYDIR}/${PMU_CONF_BASE_NAME}.bin - ln -s ${PMU_CONF_BASE_NAME}.bin ${DEPLOYDIR}/${PMU_CONF_NAME}.bin - fi + install -Dm 0644 ${B}/${PMU_CONF_NAME}.bin ${DEPLOYDIR}/${PMU_CONF_BASE_NAME}.bin + ln -s ${PMU_CONF_BASE_NAME}.bin ${DEPLOYDIR}/${PMU_CONF_NAME}.bin } diff --git a/meta-xilinx-bsp/recipes-bsp/u-boot/files/kc705-microblazeel.cfg b/meta-xilinx-bsp/recipes-bsp/u-boot/files/kc705-microblazeel.cfg deleted file mode 100644 index 8fb389506..000000000 --- a/meta-xilinx-bsp/recipes-bsp/u-boot/files/kc705-microblazeel.cfg +++ /dev/null @@ -1,39 +0,0 @@ -# SPDX-License-Identifier: MIT - -#........................................................................ -# WARNING -# -# This file is a u-boot configuration fragment, and not a full u-boot -# configuration file. The final u-boot configuration is made up of -# an assembly of processed fragments, each of which is designed to -# capture a specific part of the final configuration (e.g. platform -# configuration, feature configuration, and board specific hardware -# configuration). For more information on u-boot configuration, please -# refer the product documentation. -# -#....................................................................... - -# -# Definitions for KC705 evaluation board -# -CONFIG_SYS_FLASH_PROTECTION=y -CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_CMD_FLASH=y -CONFIG_CMD_IMLS=y -CONFIG_MTD_NOR_FLASH=y -CONFIG_MTD_DEVICE=y -# CONFIG_CMD_SPI is not set -# CONFIG_CMD_SF is not set -# CONFIG_SPI_FLASH is not set -# CONFIG_SPI_FLASH_BAR is not set -# CONFIG_DM_SPI_FLASH is not set -# CONFIG_DM_SPI is not set -# CONFIG_SPI_FLASH_SPANSION is not set -# CONFIG_SPI_FLASH_STMICRO is not set -# CONFIG_SPI_FLASH_WINBOND is not set -# CONFIG_SPI_FLASH_MACRONIX is not set -# CONFIG_SPI is not set -# CONFIG_SPI_FLASH_ISSI is not set -# CONFIG_XILINX_SPI is not set \ No newline at end of file diff --git a/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx_%.bbappend b/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx_%.bbappend deleted file mode 100644 index 23b1eb502..000000000 --- a/meta-xilinx-bsp/recipes-bsp/u-boot/u-boot-xlnx_%.bbappend +++ /dev/null @@ -1,5 +0,0 @@ -FILESEXTRAPATHS:prepend := "${THISDIR}/files:" - -SRC_URI:append:kc705-microblazeel = " \ - file://kc705-microblazeel.cfg \ - " \ No newline at end of file diff --git a/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx-dev.bbappend b/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx-dev.bbappend deleted file mode 100644 index 5f4db3090..000000000 --- a/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx-dev.bbappend +++ /dev/null @@ -1,3 +0,0 @@ -# MicroBlaze BSP fragments -KERNEL_FEATURES:append:kc705-microblazeel = " bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.scc" - diff --git a/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/linux-xlnx-bsp-kmeta/bsp/ac701-microblazeel/ac701-microblazeel.cfg b/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/linux-xlnx-bsp-kmeta/bsp/ac701-microblazeel/ac701-microblazeel.cfg deleted file mode 100644 index 05452ce9c..000000000 --- a/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/linux-xlnx-bsp-kmeta/bsp/ac701-microblazeel/ac701-microblazeel.cfg +++ /dev/null @@ -1,19 +0,0 @@ -# SPDX-License-Identifier: MIT - -#........................................................................ -# WARNING -# -# This file is a kernel configuration fragment, and not a full kernel -# configuration file. The final kernel configuration is made up of -# an assembly of processed fragments, each of which is designed to -# capture a specific part of the final configuration (e.g. platform -# configuration, feature configuration, and board specific hardware -# configuration). For more information on kernel configuration, please -# refer the product documentation. -# -#........................................................................ - -# -# Definitions for MICROBLAZE -# -CONFIG_XILINX_MICROBLAZE0_FAMILY="artix7" diff --git a/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/linux-xlnx-bsp-kmeta/bsp/ac701-microblazeel/ac701-microblazeel.scc b/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/linux-xlnx-bsp-kmeta/bsp/ac701-microblazeel/ac701-microblazeel.scc deleted file mode 100644 index 6d5514619..000000000 --- a/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/linux-xlnx-bsp-kmeta/bsp/ac701-microblazeel/ac701-microblazeel.scc +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: MIT - -define KFEATURE_DESCRIPTION "Kernel Config for AC701 machine BSP" -define KFEATURE_COMPATIBILITY AC701 board - -kconf hardware ac701-microblazeel.cfg diff --git a/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/linux-xlnx-bsp-kmeta/bsp/vcu118-microblazeel/vcu118-microblazeel.cfg b/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/linux-xlnx-bsp-kmeta/bsp/vcu118-microblazeel/vcu118-microblazeel.cfg deleted file mode 100644 index c25a48e1c..000000000 --- a/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/linux-xlnx-bsp-kmeta/bsp/vcu118-microblazeel/vcu118-microblazeel.cfg +++ /dev/null @@ -1,19 +0,0 @@ -# SPDX-License-Identifier: MIT - -#........................................................................ -# WARNING -# -# This file is a kernel configuration fragment, and not a full kernel -# configuration file. The final kernel configuration is made up of -# an assembly of processed fragments, each of which is designed to -# capture a specific part of the final configuration (e.g. platform -# configuration, feature configuration, and board specific hardware -# configuration). For more information on kernel configuration, please -# refer the product documentation. -# -#........................................................................ - -# -# Definitions for MICROBLAZE -# -CONFIG_XILINX_MICROBLAZE0_FAMILY="virtexuplus" diff --git a/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/linux-xlnx-bsp-kmeta/bsp/vcu118-microblazeel/vcu118-microblazeel.scc b/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/linux-xlnx-bsp-kmeta/bsp/vcu118-microblazeel/vcu118-microblazeel.scc deleted file mode 100644 index 292618058..000000000 --- a/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx/linux-xlnx-bsp-kmeta/bsp/vcu118-microblazeel/vcu118-microblazeel.scc +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: MIT - -define KFEATURE_DESCRIPTION "Kernel Config for VCU118 machine BSP" -define KFEATURE_COMPATIBILITY VCU118 board - -kconf hardware vcu118-microblazeel.cfg diff --git a/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx_%.bbappend b/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx_%.bbappend deleted file mode 100644 index 627f66618..000000000 --- a/meta-xilinx-bsp/recipes-kernel/linux/linux-xlnx_%.bbappend +++ /dev/null @@ -1,10 +0,0 @@ -FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" - -SRC_URI:append = " \ - file://linux-xlnx-bsp-kmeta;type=kmeta;name=linux-xlnx-bsp-kmeta;destsuffix=linux-xlnx-bsp-kmeta \ - " - -# MicroBlaze BSP fragments -KERNEL_FEATURES:append:kc705-microblazeel = " bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.scc" -KERNEL_FEATURES:append:ac701-microblazeel = " bsp/ac701-microblazeel/ac701-microblazeel.scc" -KERNEL_FEATURES:append:vcu118-microblazeel = " bsp/vcu118-microblazeel/vcu118-microblazeel.scc" diff --git a/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto-dev.bbappend b/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto-dev.bbappend deleted file mode 100644 index 0233531dc..000000000 --- a/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto-dev.bbappend +++ /dev/null @@ -1,7 +0,0 @@ -# MicroBlaze KMACHINEs -KMACHINE:ml605-qemu-microblazeel = "qemumicroblazeel" -KMACHINE:s3adsp1800-qemu-microblazeeb = "qemumicroblazeeb" - -# Default kernel config fragements for specific machines -KERNEL_FEATURES:append:kc705-microblazeel = " bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.scc" - diff --git a/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto-tiny_%.bbappend b/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto-tiny_%.bbappend deleted file mode 100644 index 0233531dc..000000000 --- a/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto-tiny_%.bbappend +++ /dev/null @@ -1,7 +0,0 @@ -# MicroBlaze KMACHINEs -KMACHINE:ml605-qemu-microblazeel = "qemumicroblazeel" -KMACHINE:s3adsp1800-qemu-microblazeeb = "qemumicroblazeeb" - -# Default kernel config fragements for specific machines -KERNEL_FEATURES:append:kc705-microblazeel = " bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.scc" - diff --git a/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto_%.bbappend b/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto_%.bbappend deleted file mode 100644 index 0233531dc..000000000 --- a/meta-xilinx-bsp/recipes-kernel/linux/linux-yocto_%.bbappend +++ /dev/null @@ -1,7 +0,0 @@ -# MicroBlaze KMACHINEs -KMACHINE:ml605-qemu-microblazeel = "qemumicroblazeel" -KMACHINE:s3adsp1800-qemu-microblazeeb = "qemumicroblazeeb" - -# Default kernel config fragements for specific machines -KERNEL_FEATURES:append:kc705-microblazeel = " bsp/xilinx/kc705-microblazeel-features/kc705-microblazeel-features.scc" - diff --git a/meta-xilinx-contrib/README.md b/meta-xilinx-contrib/README.md index 30dc32828..c3ccd68c6 100644 --- a/meta-xilinx-contrib/README.md +++ b/meta-xilinx-contrib/README.md @@ -1,6 +1,6 @@ # meta-xilinx-contrib -This layer is a contribution layer enables AMD Xilinx MicroBlaze, Zynq, ZynqMP +This layer is a contribution layer enables AMD MicroBlaze, Zynq, ZynqMP and Versal devices and provides related metadata. Any patches from open source contributors for vendor board can be added here. @@ -10,7 +10,7 @@ The following boards are supported by the meta-xilinx-contrib layer: | Devices | Vendor Board Variant | Machine Configuration file | HW Board Device tree | QEMU tested | HW tested | |------------|----------------------------------------------------------------------------------------------------|----------------------------------------------------------------------|----------------------|-------------|-----------| -| MicroBlaze | [Xilinx ML605 (QEMU)](https://www.digikey.com/en/products/detail/amd-xilinx/EK-V6-ML605-G/2175174) | [ml605-qemu-microblazeel](conf/machine/ml605-qemu-microblazeel.conf) | NA | No | NA | +| MicroBlaze | [AMD ML605 (QEMU)](https://www.digikey.com/en/products/detail/amd-xilinx/EK-V6-ML605-G/2175174) | [ml605-qemu-microblazeel](conf/machine/ml605-qemu-microblazeel.conf) | NA | No | NA | | Zynq-7000 | NA | NA | NA | | | | ZynqMP | NA | NA | NA | | | | Versal | NA | NA | NA | | | @@ -21,14 +21,18 @@ This layer depends on: URI: https:///git.yoctoproject.org/poky layers: meta, meta-poky - branch: langdale + branch: scarthgap URI: https://git.openembedded.org/meta-openembedded layers: meta-oe - branch: langdale + branch: scarthgap + + URI: https://git.yoctoproject.org/meta-arm + layers: meta-arm, meta-arm-toolchain + branch: scarthgap URI: https://git.yoctoproject.org/meta-xilinx (official version) - https://github.com/Xilinx/meta-xilinx (development and amd xilinx release) + https://github.com/Xilinx/meta-xilinx (development and AMD release) layers: meta-xilinx-microblaze, meta-xilinx-core, meta-xilinx-vendor - branch: langdale or amd xilinx release version (e.g. rel-v2023.1) + branch: scarthgap or AMD release version (e.g. rel-v2024.2) diff --git a/meta-xilinx-contrib/recipes-bsp/reference-design/zybo-linux-bd.bb b/meta-xilinx-contrib/recipes-bsp/reference-design/zybo-linux-bd.bb index 239b827c0..22b8b1bb7 100644 --- a/meta-xilinx-contrib/recipes-bsp/reference-design/zybo-linux-bd.bb +++ b/meta-xilinx-contrib/recipes-bsp/reference-design/zybo-linux-bd.bb @@ -18,11 +18,11 @@ SRCREV = "63ca49fe027da49f3b0ac636bd404fd31fbbd945" PV = "+git" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" HDF = "/Projects/${HW_BD}/hw_handoff/${HW_BD}_wrapper.hdf" -S ?= "${UNPACKDIR}/${MACHINE}" +S ?= "${WORKDIR}/${MACHINE}" PROVIDES = "virtual/bitstream virtual/xilinx-platform-init" diff --git a/meta-xilinx-contrib/recipes-kernel/linux-firmware/linux-firmware_%.bbappend b/meta-xilinx-contrib/recipes-kernel/linux-firmware/linux-firmware_%.bbappend index a32bcbd42..99793df28 100644 --- a/meta-xilinx-contrib/recipes-kernel/linux-firmware/linux-firmware_%.bbappend +++ b/meta-xilinx-contrib/recipes-kernel/linux-firmware/linux-firmware_%.bbappend @@ -14,9 +14,9 @@ do_install:append:minized-zynq7() { install -d ${D}${bindir} - install -m 0644 ${UNPACKDIR}/cyw-fmac-nvram/brcmfmac43430-sdio.txt ${D}${nonarch_base_libdir}/firmware/brcm/ - install -m 0644 ${UNPACKDIR}/cyw-bt-patch/CYW43430A1.1DX.hcd ${D}${nonarch_base_libdir}/firmware/brcm/ - install -m 0644 ${UNPACKDIR}/cyw-fmac-utils-imx32/wl ${D}${bindir} + install -m 0644 ${WORKDIR}/cyw-fmac-nvram/brcmfmac43430-sdio.txt ${D}${nonarch_base_libdir}/firmware/brcm/ + install -m 0644 ${WORKDIR}/cyw-bt-patch/CYW43430A1.1DX.hcd ${D}${nonarch_base_libdir}/firmware/brcm/ + install -m 0644 ${WORKDIR}/cyw-fmac-utils-imx32/wl ${D}${bindir} } PACKAGES:prepend:minized-zynq7 = "\ diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-yocto-dev.bbappend b/meta-xilinx-contrib/recipes-kernel/linux/linux-yocto-dev.bbappend new file mode 100644 index 000000000..8b41f24af --- /dev/null +++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-yocto-dev.bbappend @@ -0,0 +1,3 @@ +# MicroBlaze KMACHINEs +KMACHINE:ml605-qemu-microblazeel = "qemumicroblazeel" + diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-yocto-tiny_%.bbappend b/meta-xilinx-contrib/recipes-kernel/linux/linux-yocto-tiny_%.bbappend new file mode 100644 index 000000000..8b41f24af --- /dev/null +++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-yocto-tiny_%.bbappend @@ -0,0 +1,3 @@ +# MicroBlaze KMACHINEs +KMACHINE:ml605-qemu-microblazeel = "qemumicroblazeel" + diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-yocto_%.bbappend b/meta-xilinx-contrib/recipes-kernel/linux/linux-yocto_%.bbappend new file mode 100644 index 000000000..8b41f24af --- /dev/null +++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-yocto_%.bbappend @@ -0,0 +1,3 @@ +# MicroBlaze KMACHINEs +KMACHINE:ml605-qemu-microblazeel = "qemumicroblazeel" + diff --git a/meta-xilinx-core/README.md b/meta-xilinx-core/README.md index ec5b663ba..945a76a7e 100644 --- a/meta-xilinx-core/README.md +++ b/meta-xilinx-core/README.md @@ -10,11 +10,15 @@ This layer depends on: URI: https://git.yoctoproject.org/poky layers: meta, meta-poky - branch: langdale + branch: scarthgap URI: https://git.openembedded.org/meta-openembedded layers: meta-oe - branch: langdale + branch: scarthgap + + URI: https://git.yoctoproject.org/meta-arm + layers: meta-arm, meta-arm-toolchain + branch: scarthgap --- ## Configuring Machines @@ -36,13 +40,13 @@ Zynqmp-generic requires pmu-firmware. The firmware can be passed directly as a path to a binary: PMU_FILE, you may use the generic built version by including meta-xilinx-standalone, the XSCT version by adding meta-xilinx-tools or the DTB workflow version using -meta-xilinx-standalone-experimental. +meta-xilinx-standalone-sdt. Versal-generic requires both PLM and PSM firmware to be specified. They can be specified as a path to a binary using PLM_FILE and PSM_FILE. Or they can be generated by including meta-xilinx-standalone, the XSCT version by adding meta-xilinx-tools or the DTB workflow version using -meta-xilinx-standalone-experimental. Additionally some configurations may +meta-xilinx-standalone-sdt. Additionally some configurations may require you to specify the path to a PDI file using PDI_PATH. The XSCT version will extract the PDI automatically. --- diff --git a/meta-xilinx-core/classes-recipe/amd_spi_image.bbclass b/meta-xilinx-core/classes-recipe/amd_spi_image.bbclass index 6dd18d766..5020b02b3 100644 --- a/meta-xilinx-core/classes-recipe/amd_spi_image.bbclass +++ b/meta-xilinx-core/classes-recipe/amd_spi_image.bbclass @@ -62,7 +62,7 @@ def generate_spi_image(d): qspi_data.write(b'\xFF' * qspi_size) # Image Selector - Primary, Backup, Image A and Image B - imgsel_file = d.getVar("DEPLOY_DIR_IMAGE")+"/imgsel-"+d.getVar("MACHINE")+".bin" + imgsel_file = d.getVar("DEPLOY_DIR_IMAGE")+"/image-selector-"+d.getVar("MACHINE")+".bin" try: with open(imgsel_file, "rb") as il: imgsel = il.read(-1) @@ -105,7 +105,7 @@ def generate_spi_image(d): qspi_data.write(bootbin) # Recovery Image & Recovery Image Backup - imgrcry_file = d.getVar("DEPLOY_DIR_IMAGE")+"/imgrcry-"+d.getVar("MACHINE")+".bin" + imgrcry_file = d.getVar("DEPLOY_DIR_IMAGE")+"/image-recovery-"+d.getVar("MACHINE")+".bin" try: with open(imgrcry_file, "rb") as iy: imgrcry = iy.read(-1) diff --git a/meta-xilinx-core/classes-recipe/dfx_user_dts.bbclass b/meta-xilinx-core/classes-recipe/dfx_user_dts.bbclass index 1b5f451f9..d4a01048a 100644 --- a/meta-xilinx-core/classes-recipe/dfx_user_dts.bbclass +++ b/meta-xilinx-core/classes-recipe/dfx_user_dts.bbclass @@ -26,7 +26,7 @@ do_fetch[cleandirs] = "${B}" DT_PADDING_SIZE = "0x1000" BOOTGEN_FLAGS ?= " -arch ${SOC_FAMILY} -w ${@bb.utils.contains('SOC_FAMILY','zynqmp','','-process_bitstream bin',d)}" -S ?= "${UNPACKDIR}" +S ?= "${WORKDIR}" FW_DIR ?= "" DTSI_PATH ?= "" DTBO_PATH ?= "" @@ -52,7 +52,7 @@ python() { import re soc_family = d.getVar("SOC_FAMILY") if "git://" in d.getVar("SRC_URI") or "https://" in d.getVar("SRC_URI"): - d.setVar("S",'${UNPACKDIR}/git/'+d.getVar("FW_DIR")) + d.setVar("S",'${WORKDIR}/git/'+d.getVar("FW_DIR")) else: dtsi_found = False dtbo_found = False @@ -255,8 +255,12 @@ do_install() { # doesn't have any driver then user can load pdi/bit/bin file. if [ `ls ${S}/*.dtbo | wc -l` -eq 1 ]; then install -Dm 0644 ${S}/*.dtbo ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/ + elif [ `ls ${S}/${DTBO_PATH}/*.dtbo | wc -l` -eq 1 ]; then + install -Dm 0644 ${S}/${DTBO_PATH}/*.dtbo ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/ elif [ `ls ${S}/*.dtbo | wc -l` -gt 1 ]; then bbfatal "Multiple DTBO found, use the right DTBO in SRC_URI from the following:\n$(basename -a ${S}/*.dtbo)" + elif [ `ls ${S}/${DTBO_PATH}/*.dtbo | wc -l` -gt 1 ]; then + bbfatal "Multiple DTBO found, use the right DTBO in SRC_URI from the following:\n$(basename -a ${S}/${DTBO_PATH}/*.dtbo)" elif [ -f ${B}/${USER_DTS_FILE}.dtbo ]; then install -Dm 0644 ${B}/${USER_DTS_FILE}.dtbo ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.dtbo else @@ -272,12 +276,20 @@ do_install() { if [ "${SOC_FAMILY}" = "zynq" ] || [ "${SOC_FAMILY}" = "zynqmp" ]; then if [ `ls ${S}/*.bit | wc -l` -gt 1 ]; then bbfatal "Multiple .bit found, use the right .bit in SRC_URI from the following:\n$(basename -a ${S}/*.bit)" + elif [ `ls ${S}/${BIT_PATH}/*.bit | wc -l` -gt 1 ]; then + bbfatal "Multiple .bit found, use the right .bit in SRC_URI from the following:\n$(basename -a ${S}/${BIT_PATH}/*.bit)" elif [ `ls ${S}/*.bin | wc -l` -gt 1 ]; then bbfatal "Multiple .bin found, use the right .bin in SRC_URI from the following:\n$(basename -a ${S}/*.bin)" + elif [ `ls ${S}/${BIN_PATH}/*.bin | wc -l` -gt 1 ]; then + bbfatal "Multiple .bin found, use the right .bin in SRC_URI from the following:\n$(basename -a ${S}/${BIN_PATH}/*.bin)" elif [ `ls ${S}/*.bit | wc -l` -eq 1 ] && [ ! -f ${B}/${USER_DTS_FILE}.dtbo ]; then install -Dm 0644 ${S}/*.bit ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/ + elif [ `ls ${S}/${BIT_PATH}/*.bit | wc -l` -eq 1 ] && [ ! -f ${B}/${USER_DTS_FILE}.dtbo ]; then + install -Dm 0644 ${S}/${BIT_PATH}/*.bit ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/ elif [ `ls ${S}/*.bin | wc -l` -eq 1 ]; then install -Dm 0644 ${S}/*.bin ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/ + elif [ `ls ${S}/${BIN_PATH}/*.bin | wc -l` -eq 1 ]; then + install -Dm 0644 ${S}/${BIN_PATH}/*.bin ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/ elif [ -f ${B}/${PN}.bin ] && [ -f ${B}/${USER_DTS_FILE}.dtbo ]; then install -Dm 0644 ${B}/${PN}.bin ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.bin else @@ -295,10 +307,16 @@ do_install() { if [ "${SOC_FAMILY}" != "zynq" ] && [ "${SOC_FAMILY}" != "zynqmp" ]; then if [ `ls ${S}/*.pdi | wc -l` -eq 1 ] && [ ! -f ${B}/${USER_DTS_FILE}.dtbo ]; then install -Dm 0644 ${S}/*.pdi ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/ + elif [ `ls ${S}/${PDI_PATH}/*.pdi | wc -l` -eq 1 ] && [ ! -f ${B}/${USER_DTS_FILE}.dtbo ]; then + install -Dm 0644 ${S}/${PDI_PATH}/*.pdi ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/ elif [ `ls ${S}/*.pdi | wc -l` -gt 1 ]; then bbfatal "Multiple PDI found, use the right PDI in SRC_URI from the following:\n$(basename -a ${S}/*.pdi)" + elif [ `ls ${S}/${PDI_PATH}/*.pdi | wc -l` -gt 1 ]; then + bbfatal "Multiple PDI found, use the right PDI in SRC_URI from the following:\n$(basename -a ${S}/${PDI_PATH}/*.pdi)" elif [ `ls ${S}/*.pdi | wc -l` -eq 1 ] && [ -f ${B}/${USER_DTS_FILE}.dtbo ]; then install -Dm 0644 ${S}/*.pdi ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.pdi + elif [ `ls ${S}/${PDI_PATH}/*.pdi | wc -l` -eq 1 ] && [ -f ${B}/${USER_DTS_FILE}.dtbo ]; then + install -Dm 0644 ${S}/${PDI_PATH}/*.pdi ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.pdi else bbwarn "A PDI file with '.pdi' expected but not found" fi diff --git a/meta-xilinx-core/classes-recipe/qemuboot-xilinx.bbclass b/meta-xilinx-core/classes-recipe/qemuboot-xilinx.bbclass index a0ea15311..df7016d49 100644 --- a/meta-xilinx-core/classes-recipe/qemuboot-xilinx.bbclass +++ b/meta-xilinx-core/classes-recipe/qemuboot-xilinx.bbclass @@ -23,10 +23,26 @@ QB_DEFAULT_KERNEL:zynq ?= "${@'zImage' if \ QB_DEFAULT_KERNEL:microblaze ?= "${@'simpleImage.mb' if \ d.getVar('INITRAMFS_IMAGE_BUNDLE') != '1' else 'simpleImage.mb-initramfs-${MACHINE}.bin'}" +# https://docs.amd.com/r/en-US/ug585-zynq-7000-SoC-TRM/Boot-Mode-Pin-Settings # https://docs.amd.com/r/en-US/ug1085-zynq-ultrascale-trm/Boot-Modes # https://docs.amd.com/r/en-US/ug1304-versal-acap-ssdg/Boot-Device-Modes QB_BOOT_MODE ?= "-boot mode=5" + +# ZynqMP or Versal SD and eMMC drive index. +# Note: Do not set drive index based on boot mode some boards may have primary +# boot mode as QSPI/OSPI and secondary boot mode as SD/eMMC. +# +# SoC Device Drive Index +# Zynq-7000, ZynqMP, Versal SD0 0 +# ZynqMP, Versal SD1 1 +# ZynqMP, Versal eMMC0(secondary boot only) 2 +# ZynqMP, Versal eMMC1 3 + +QB_SD_DRIVE_INDEX ?= "1" +QB_SD_DRIVE_INDEX:zynq ?= "0" +QB_SD_DRIVE_INDEX:versal-net ?= "0" + inherit qemuboot def qemu_target_binary(data): @@ -78,6 +94,7 @@ def qemu_rootfs_params(data, param): bundle_image = data.getVar('INITRAMFS_IMAGE_BUNDLE') or "" soc_family = data.getVar('SOC_FAMILY') or "" tune_features = (data.getVar('TUNE_FEATURES') or []).split() + sd_index = data.getVar('QB_SD_DRIVE_INDEX') or "" if 'microblaze' in tune_features: soc_family = 'microblaze' @@ -101,12 +118,6 @@ def qemu_rootfs_params(data, param): return fstype_dict[soc_family] elif param == 'rootfs-opt': - sd_index = "1" - if soc_family == 'zynq': - sd_index = "0" - if soc_family == 'versal-net': - sd_index = "0" - # Device is using a disk if not initramfs_image: return ' -drive if=sd,index=%s,file=@ROOTFS@,format=raw' % (sd_index) diff --git a/meta-xilinx-core/classes/image-types-xilinx-qemu.bbclass b/meta-xilinx-core/classes/image-types-xilinx-qemu.bbclass index 0b826ee2c..b4de5ee10 100644 --- a/meta-xilinx-core/classes/image-types-xilinx-qemu.bbclass +++ b/meta-xilinx-core/classes/image-types-xilinx-qemu.bbclass @@ -39,18 +39,18 @@ CONVERSION_CMD:qemu-sd-fatimg () { parted -s ${QEMU_IMG} set 1 boot on parted ${QEMU_IMG} print BOOT_BLOCKS=$(LC_ALL=C parted -s ${QEMU_IMG} unit b print | awk '/ 1 / { print substr($4, 1, length($4 -1)) / 512 /2 }') - rm -f ${UNPACKDIR}/${BOOT_VOLUME_ID}.img - mkfs.vfat -n "${BOOT_VOLUME_ID}" -S 512 -C ${UNPACKDIR}/${BOOT_VOLUME_ID}.img $BOOT_BLOCKS + rm -f ${WORKDIR}/${BOOT_VOLUME_ID}.img + mkfs.vfat -n "${BOOT_VOLUME_ID}" -S 512 -C ${WORKDIR}/${BOOT_VOLUME_ID}.img $BOOT_BLOCKS if [ -e ${DEPLOY_DIR_IMAGE}/boot.bin ]; then - mcopy -i ${UNPACKDIR}/${BOOT_VOLUME_ID}.img -s ${DEPLOY_DIR_IMAGE}/boot.bin ::/ + mcopy -i ${WORKDIR}/${BOOT_VOLUME_ID}.img -s ${DEPLOY_DIR_IMAGE}/boot.bin ::/ fi if [ -e ${DEPLOY_DIR_IMAGE}/boot.scr ]; then - mcopy -i ${UNPACKDIR}/${BOOT_VOLUME_ID}.img -s ${DEPLOY_DIR_IMAGE}/boot.scr ::/ + mcopy -i ${WORKDIR}/${BOOT_VOLUME_ID}.img -s ${DEPLOY_DIR_IMAGE}/boot.scr ::/ fi if [ ${INITRAMFS_IMAGE} = ${IMAGE_BASENAME} ] && [ x"${INITRAMFS_IMAGE_BUNDLE}" != "x1" ]; then - mcopy -i ${UNPACKDIR}/${BOOT_VOLUME_ID}.img -s ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type} ::rootfs.cpio.gz.u-boot + mcopy -i ${WORKDIR}/${BOOT_VOLUME_ID}.img -s ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type} ::rootfs.cpio.gz.u-boot fi - dd if=${UNPACKDIR}/${BOOT_VOLUME_ID}.img of=${QEMU_IMG} conv=notrunc seek=1 bs=$(expr ${IMAGE_ALIGNMENT} \* 1024) + dd if=${WORKDIR}/${BOOT_VOLUME_ID}.img of=${QEMU_IMG} conv=notrunc seek=1 bs=$(expr ${IMAGE_ALIGNMENT} \* 1024) } CONVERSION_DEPENDS_qemu-sd = "qemu-system-native" diff --git a/meta-xilinx-core/classes/xilinx-deprecated.bbclass b/meta-xilinx-core/classes/xilinx-deprecated.bbclass index 1aee2fe1f..788b963e7 100644 --- a/meta-xilinx-core/classes/xilinx-deprecated.bbclass +++ b/meta-xilinx-core/classes/xilinx-deprecated.bbclass @@ -9,10 +9,15 @@ python xilinx_deprecated_config_eventhandler () { if d.getVar('BOARD') or d.getVar('BOARD_VARIANT'): bb.error("Deprecated BOARD (%s) or BOARD_VARIANT (%s) is being used, they are no longer supported and are ignored." % (d.getVar('BOARD'), d.getVar('BOARD_VARIANT'))) + # Check for 'generic' machines, warn the user this isn't what they want + if d.getVar('MACHINE').endswith('-generic'): + bb.warn('The %s machine is intended to be included by other machines, it should not be used by itself. For a non-machine, SoC specific filesystem, please use one of the common machines defined in meta-xilinx-core.' % d.getVar('MACHINE')) + msg_list = d.getVarFlags('XILINX_DEPRECATED') or [] for msg_source in msg_list: if msg_source == "doc": continue msg = d.getVarFlag('XILINX_DEPRECATED', msg_source) or "" - bb.warn('%s: %s' % (msg_source, msg)) + if msg: + bb.warn('%s: %s' % (msg_source, msg)) } diff --git a/meta-xilinx-core/classes/xilinx-vars.bbclass b/meta-xilinx-core/classes/xilinx-vars.bbclass index 19cf8771b..e19918ca6 100644 --- a/meta-xilinx-core/classes/xilinx-vars.bbclass +++ b/meta-xilinx-core/classes/xilinx-vars.bbclass @@ -6,15 +6,6 @@ xilinx_variables_config_eventhandler[eventmask] = "bb.event.ConfigParsed" # It's up to the base sytem to define the variables being used here, we're # only going to check them. python xilinx_variables_config_eventhandler () { - # Verify HDF_MACHINE - hdf_prior = d.getVar('HDF_MACHINE_PRIOR') - hdf_final = d.getVar('HDF_MACHINE') - - if hdf_prior and hdf_prior != hdf_final: - bb.fatal("HDF_MACHINE is set to %s, it appears you intended %s. " \ - "This is usually as a result of specifying it in the local.conf or before the 'require' in the machine .conf file. " \ - "See meta-xilinx-core/conf/machine/README." % (hdf_final, hdf_prior)) - # Verify DEFAULTTUNE tune_prior = d.getVar('DEFAULTTUNE_PRIOR') tune_final = d.getVar('DEFAULTTUNE') diff --git a/meta-xilinx-core/conf/layer.conf b/meta-xilinx-core/conf/layer.conf index b9eabc8b1..399011a74 100644 --- a/meta-xilinx-core/conf/layer.conf +++ b/meta-xilinx-core/conf/layer.conf @@ -22,7 +22,7 @@ xilinx-tools:${LAYERDIR}/dynamic-layers/meta-xilinx-tools/recipes-*/*/*.bb \ xilinx-tools:${LAYERDIR}/dynamic-layers/meta-xilinx-tools/recipes-*/*/*.bbappend \ " -LAYERDEPENDS_xilinx = "core" +LAYERDEPENDS_xilinx = "core meta-arm" LAYERRECOMMENDS_xilinx = "openembedded-layer" LAYERSERIES_COMPAT_xilinx = "scarthgap" @@ -42,7 +42,7 @@ SIGGEN_EXCLUDE_SAFE_RECIPE_DEPS += " \ *->xserver-xorg \ " -XILINX_RELEASE_VERSION ??= "v2024.1" +XILINX_RELEASE_VERSION ??= "v2024.2" BUILDCFG_VARS:append = " XILINX_RELEASE_VERSION" @@ -55,13 +55,20 @@ XILINX_ATF_VERSION[v2022.2] = "2.6-xilinx-v2022.2%" XILINX_ATF_VERSION[v2023.1] = "2.8-xilinx-v2023.1%" XILINX_ATF_VERSION[v2023.2] = "2.8-xilinx-v2023.2%" XILINX_ATF_VERSION[v2024.1] = "2.10-xilinx-v2024.1%" -PREFERRED_VERSION_arm-trusted-firmware ?= "${@d.getVarFlag('XILINX_ATF_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" +XILINX_ATF_VERSION[v2024.2] = "2.10-xilinx-v2024.2%" +PREFERRED_VERSION_virtual/arm-trusted-firmware ?= "${@d.getVarFlag('XILINX_ATF_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" + +# The name of the software has changed to match upstream ARM +XILINX_ATF_PROVIDERS[v2024.2] = "trusted-firmware-a" +PREFERRED_PROVIDER_virtual/arm-trusted-firmware = "${@d.getVarFlag('XILINX_ATF_PROVIDERS', d.getVar('XILINX_RELEASE_VERSION')) or 'arm-trusted-firmware'}" + XILINX_UBOOT_VERSION[v2022.1] = "1:2021.01-xilinx-v2022.1%" XILINX_UBOOT_VERSION[v2022.2] = "1:2022.01-xilinx-v2022.2%" XILINX_UBOOT_VERSION[v2023.1] = "1:2023.01-xilinx-v2023.1%" XILINX_UBOOT_VERSION[v2023.2] = "1:2023.01-xilinx-v2023.2%" XILINX_UBOOT_VERSION[v2024.1] = "1:2024.01-xilinx-v2024.1%" +XILINX_UBOOT_VERSION[v2024.2] = "1:2024.01-xilinx-v2024.2%" PREFERRED_VERSION_u-boot-xlnx ?= "${@d.getVarFlag('XILINX_UBOOT_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" PREFERRED_VERSION_u-boot-tools-xlnx ?= "${@d.getVarFlag('XILINX_UBOOT_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" @@ -71,6 +78,7 @@ XILINX_LINUX_VERSION[v2022.2] = "5.15.36%" XILINX_LINUX_VERSION[v2023.1] = "6.1.30%" XILINX_LINUX_VERSION[v2023.2] = "6.1.60%" XILINX_LINUX_VERSION[v2024.1] = "6.6.10%" +XILINX_LINUX_VERSION[v2024.2] = "6.6.40%" PREFERRED_VERSION_linux-xlnx ?= "${@d.getVarFlag('XILINX_LINUX_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" # XRT/ZOCL @@ -79,6 +87,7 @@ XRT_ZOCL_VERSION[v2022.2] = "202220.2.14.0" XRT_ZOCL_VERSION[v2023.1] = "202310.2.15.0" XRT_ZOCL_VERSION[v2023.2] = "202320.2.16.0" XRT_ZOCL_VERSION[v2024.1] = "202410.2.17.319" +XRT_ZOCL_VERSION[v2024.2] = "202420.2.18.0" PREFERRED_VERSION_xrt ?= "${@d.getVarFlag('XRT_ZOCL_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" PREFERRED_VERSION_zocl ?= "${@d.getVarFlag('XRT_ZOCL_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" @@ -88,6 +97,7 @@ AIEFAL_VERSION[v2022.2] = "1.4" AIEFAL_VERSION[v2023.1] = "1.5" AIEFAL_VERSION[v2023.2] = "1.5" AIEFAL_VERSION[v2024.1] = "1.6" +AIEFAL_VERSION[v2024.2] = "1.7" PREFERRED_VERSION_aiefal ?= "${@d.getVarFlag('AIEFAL_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" AI_ENGINE_DRIVER_VERSION[v2022.1] = "3.3" @@ -95,6 +105,7 @@ AI_ENGINE_DRIVER_VERSION[v2022.2] = "3.3" AI_ENGINE_DRIVER_VERSION[v2023.1] = "3.4" AI_ENGINE_DRIVER_VERSION[v2023.2] = "3.4" AI_ENGINE_DRIVER_VERSION[v2024.1] = "3.5" +AI_ENGINE_DRIVER_VERSION[v2024.2] = "3.6" PREFERRED_VERSION_ai-engine-driver ?= "${@d.getVarFlag('AI_ENGINE_DRIVER_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}" # Add support to eSDK for gen-machine-conf if it exists diff --git a/meta-xilinx-core/conf/machine/README b/meta-xilinx-core/conf/machine/README index f664a2f08..5db8fa8f8 100644 --- a/meta-xilinx-core/conf/machine/README +++ b/meta-xilinx-core/conf/machine/README @@ -44,7 +44,6 @@ MACHINEOVERRIDES =. "${@['', 'my-example:']['my-example' != '${MACHINE}']}" require conf/machine/zynqmp-generic.conf -HDF_MACHINE = "zcu102-zynqmp" MACHINE_FEATURES += "pci" #### No additional settings should be after the Postamble @@ -67,7 +66,6 @@ DEFAULTTUNE ?= "aarch64" require conf/machine/zynqmp-generic.conf -HDF_MACHINE = "zcu102-zynqmp" MACHINE_FEATURES += "pci" #### No additional settings should be after the Postamble @@ -88,7 +86,6 @@ TUNE_FEATURES:tune-microblaze ?= "microblaze v8.50 barrel-shift reorder pattern- require conf/machine/microblaze-generic.conf -HDF_MACHINE = "ml605" SERIAL_CONSOLE = "115200,ttyUL0" #### No additional settings should be after the Postamble @@ -149,12 +146,17 @@ local.conf System wide setting: TUNE_FEATURES:tune- - Specific tune features +XILINX_WITH_ESW = "xsct" or "sdt" - Specify xsct or sdt workflow + external-hdf recipe from meta-xilinx-tools: -HDF_MACHINE - Machine to load from reference defign xsa using hdf-examples recipe -HDF_EXT - Only ".xsa" externsion is supported, legacy variable. -HDF_BASE - Download protocol (file://, git://, http:// or https://) protocol if - not using the default external-hdf repository. -HDF_PATH - Path to the repository or XSA file +XILINX_XSCT_VERSION - Version of the XSCT tool and associated ESW software +HDF_URI - URL for the .xsa file +HDF_URI[sha256sum] - sha256sum of the .xsa + +sdt-artifacts recipe from meta-xilinx-standalone-sdt: +SDT_URI - URI for the system device tree artifacts (usually a tarball) +SDT_URI[sha256sum] - sha256sum of the SDT artifacts file +SDT_URI[S] - the 'S' (source) directory where the artifacts are extracted fs-boot recipe from meta-xilinx-tools: YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot - YAML based uart stdin configuration for @@ -208,15 +210,3 @@ HAS_PLATFORM_INIT - List of defconfig files available for u-boot only for SPL bo u-boot-xlnx-scr recipe from meta-xilinx-core: DDR_BASEADDR - Base address for DDR used for loading the images from u-boot env. SKIP_APPEND_BASEADDR - Skip appending ${DDR_BASEADDR} for image offsets. - -Varibable set after required inclusion file: -Varibables that does not intend to change must be set before required inclusion -file. - -external-hdf recipe from meta-xilinx-tools: -HDF_MACHINE - Used by the recipe to find the correct XSA -HDF_EXT - only xsa is supported, legacy variable -HDF_BASE - protocol if not using the default external-hdf repository -HDF_PATH - path to the repository or XSA file - -...and more... diff --git a/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc b/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc index 9284aa1f3..cf890a518 100644 --- a/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc +++ b/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc @@ -1,5 +1,3 @@ -# HDF_MACHINE should be set _AFTER_ this has been loaded -HDF_MACHINE_PRIOR := "${HDF_MACHINE}" INHERIT += "xilinx-vars" INHERIT += "xilinx-deprecated" @@ -14,7 +12,7 @@ IMAGE_FSTYPES ?= "tar.gz cpio cpio.gz cpio.gz.u-boot" PREFERRED_PROVIDER_virtual/kernel ??= "linux-xlnx" # Device tree Configuration -PREFERRED_PROVIDER_virtual/dtb ??= "device-tree" +PREFERRED_PROVIDER_virtual/dtb ??= "${@'device-tree' if d.getVar('XILINX_WITH_ESW') else ''}" # U-Boot Configuration PREFERRED_PROVIDER_virtual/bootloader ??= "u-boot-xlnx" @@ -82,6 +80,17 @@ IMAGE_BOOT_FILES ?= "${@get_default_image_boot_files(d)}" def get_default_image_boot_files(d): files = [] + esw_type = d.getVar('XILINX_WITH_ESW') or '' + if esw_type: + if 'zynq' in d.getVar('OVERRIDES').split(':'): + files.append('boot.bin') + if 'zynqmp' in d.getVar('OVERRIDES').split(':'): + files.append('boot.bin') + if 'versal' in d.getVar('OVERRIDES').split(':'): + files.append('boot.bin') + if 'versal-net' in d.getVar('OVERRIDES').split(':'): + files.append('boot.bin') + # kernel images kerneltypes = set((d.getVar("KERNEL_IMAGETYPE") or "").split()) kerneltypes |= set((d.getVar("KERNEL_IMAGETYPES") or "").split()) @@ -95,6 +104,7 @@ def get_default_image_boot_files(d): # device trees (device-tree only), these are first as they are likely desired over the kernel ones if "device-tree" in (d.getVar("PREFERRED_PROVIDER_virtual/dtb") or ""): + files.append("system.dtb") files.append("devicetree/*.dtb;devicetree/") files.append("devicetree/*.dtbo;devicetree/") @@ -107,6 +117,34 @@ def get_default_image_boot_files(d): return " ".join(files) +EXTRA_IMAGEDEPENDS += "${@get_default_extra_imagedepends(d)}" + +def get_default_extra_imagedepends(d): + depends = [] + + # Add firmware dependencies + esw_type = d.getVar('XILINX_WITH_ESW') or '' + if esw_type: + depends.append('libyaml-native') + depends.append('python3-cython-native') + depends.append('python3-pyyaml-native') + if 'microblaze' in d.getVar('OVERRIDES').split(':'): + depends.append('virtual/bitstream') + if 'zynq' in d.getVar('OVERRIDES').split(':'): + depends.append('virtual/boot-bin') + if 'zynqmp' in d.getVar('OVERRIDES').split(':'): + depends.append('virtual/boot-bin') + if 'versal' in d.getVar('OVERRIDES').split(':'): + depends.append('virtual/boot-bin') + depends.append('virtual/cdo') + if 'versal-net' in d.getVar('OVERRIDES').split(':'): + depends.append('virtual/boot-bin') + depends.append('virtual/cdo') + + return " ".join(depends) + + + XSERVER_EXT ?= "" FPGA_MNGR_RECONFIG_ENABLE ?= "1" diff --git a/meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc b/meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc index c450b542d..e75f556ba 100644 --- a/meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc +++ b/meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc @@ -9,7 +9,7 @@ PREFERRED_PROVIDER_nativesdk-qemu = "nativesdk-qemu-xilinx" MACHINEOVERRIDES =. "qemuboot-xilinx:" # depend on qemu-helper-native, which will depend on QEMU -EXTRA_IMAGEDEPENDS += "qemu-system-native qemu-helper-native:do_addto_recipe_sysroot" +EXTRA_IMAGEDEPENDS += "qemu-devicetrees-native qemu-system-native qemu-helper-native:do_addto_recipe_sysroot" # Use the xilinx specific version for these users IMAGE_CLASSES += "qemuboot-xilinx" @@ -21,5 +21,5 @@ IMAGE_CLASSES += "qemuboot-xilinx" # QB_XILINX_SERIAL that will allow us to define serial ports for qemu # emulated boards that may not match the standard Linux behavior. # -QB_XILINX_SERIAL ?= "" -QB_OPT_APPEND += "${QB_XILINX_SERIAL}" +QB_XILINX_SERIAL ??= "" +QB_OPT_APPEND += "${QB_XILINX_SERIAL} -nodefaults" diff --git a/meta-xilinx-core/conf/machine/include/soc-tune-include.inc b/meta-xilinx-core/conf/machine/include/soc-tune-include.inc index b3216426e..197a998db 100644 --- a/meta-xilinx-core/conf/machine/include/soc-tune-include.inc +++ b/meta-xilinx-core/conf/machine/include/soc-tune-include.inc @@ -7,6 +7,7 @@ TUNEFILE[cortexr5hf] = "conf/machine/include/arm/armv7r/tune-cortexr5.inc" TUNEFILE[cortexr52] = "conf/machine/include/arm/armv8r/tune-cortexr52.inc" TUNEFILE[cortexr52hf] = "conf/machine/include/arm/armv8r/tune-cortexr52.inc" TUNEFILE[cortexa9thf-neon] = "conf/machine/include/arm/armv7a/tune-cortexa9.inc" +TUNEFILE[cortexa9] = "conf/machine/include/arm/armv7a/tune-cortexa9.inc" TUNEFILE[armv8a] = "conf/machine/include/arm/arch-armv8a.inc" TUNEFILE[cortexa53] = "conf/machine/include/arm/armv8a/tune-cortexa53.inc" TUNEFILE[cortexa72] = "conf/machine/include/arm/armv8a/tune-cortexa72.inc" diff --git a/meta-xilinx-core/conf/machine/include/soc-zynq.inc b/meta-xilinx-core/conf/machine/include/soc-zynq.inc index 02220e8a1..587a0d5a1 100644 --- a/meta-xilinx-core/conf/machine/include/soc-zynq.inc +++ b/meta-xilinx-core/conf/machine/include/soc-zynq.inc @@ -9,11 +9,3 @@ KERNEL_IMAGETYPE ?= "uImage" KERNEL_IMAGETYPES += "zImage" UBOOT_ELF ?= "u-boot.elf" - -# Default, if multiconfig is off, the fsbl is in the regular deploydir, otherwise -# it is located under a multiconfig specific deploydir -FSBL_DEPENDS ?= "${@bb.utils.contains('BBMULTICONFIG', 'fsbl-fw', '', 'fsbl-firmware:do_deploy', d)}" -FSBL_MCDEPENDS ?= "${@bb.utils.contains('BBMULTICONFIG', 'fsbl-fw', 'mc::fsbl-fw:fsbl-firmware:do_deploy', '', d)}" -FSBL_DEPLOY_DIR ?= "${@bb.utils.contains('BBMULTICONFIG', 'fsbl-fw', '${TOPDIR}/tmp-fsbl-fw/deploy/images/${MACHINE}', '${DEPLOY_DIR_IMAGE}', d)}" -FSBL_DEPLOY_DIR[vardepsexclude] += "TOPDIR" -FSBL_IMAGE_NAME ?= "fsbl-${MACHINE}" diff --git a/meta-xilinx-core/conf/machine/microblaze-generic.conf b/meta-xilinx-core/conf/machine/microblaze-generic.conf index 8fb400707..39059511a 100644 --- a/meta-xilinx-core/conf/machine/microblaze-generic.conf +++ b/meta-xilinx-core/conf/machine/microblaze-generic.conf @@ -2,11 +2,6 @@ #@NAME: microblaze-generic #@DESCRIPTION: Machine configuration for the microblaze-generic devices -# Deprecated board config -USE_BOARD = "${@"conf/machine/include/xilinx-board-pre.inc" if d.getVar("BOARD") or d.getVar("BOARD_VARIANT") else ""}" -require ${USE_BOARD} -unset USE_BOARD - #### Preamble MACHINEOVERRIDES =. "${@['', 'microblaze-generic:']['microblaze-generic' != '${MACHINE}']}" #### Regular settings follow @@ -19,21 +14,6 @@ DEFAULTTUNE ?= "microblaze" # defined before calling the required inclusion file else pre-expansion value # defined in local.conf without machine override will not be reflected. -# Yocto Microblaze device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "DDR4_0" -DT_PADDING_SIZE:pn-device-tree ?= "0x1000" -DTC_FLAGS:pn-device-tree ?= "" -XSCTH_PROC:pn-device-tree ?= "microblaze_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD kcu105}" - -# Yocto Microblaze FS-Boot variables -YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0" -YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "DDR4_0" -YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0" -XSCTH_PROC:pn-fs-boot ?= "microblaze_0" - # Yocto Microblaze u-boot-xlnx variables UBOOT_MACHINE ?= "microblaze-generic_defconfig" UBOOT_INITIAL_ENV = "" @@ -46,7 +26,6 @@ KERNEL_EXTRA_ARGS += "UIMAGE_LOADADDR=${UBOOT_ENTRYPOINT}" # Microblaze Serial Console settings SERIAL_CONSOLES ?= "115200;ttyUL0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" require conf/machine/include/soc-tune-include.inc require conf/machine/include/machine-xilinx-default.inc @@ -60,27 +39,12 @@ MB_MACHINE_ARCH = "${@[d.getVar('TUNE_PKGARCH'), d.getVar('TUNE_PKGARCH') + '-ge MACHINE_ARCH = "${@['${MB_MACHINE_ARCH}', '${DEF_MACHINE_ARCH}']['microblaze-generic' != "${MACHINE}"]}" -# microblaze-generic.conf uses kcu105-microblazeel xsa as reference input. -# User can override with custom xsa using HDF_BASE and HDF_PATH variables from -# local.conf. -HDF_MACHINE = "kcu105-microblazeel" - MACHINE_FEATURES = "" KERNEL_IMAGETYPE ?= "linux.bin.ub" KERNEL_IMAGETYPES = "" -MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "${PREFERRED_PROVIDER_virtual/dtb}" - -IMAGE_BOOT_FILES += " \ - ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ - " - EXTRA_IMAGEDEPENDS += " \ - libyaml-native \ - python3-cython-native \ - python3-pyyaml-native \ - virtual/bitstream \ virtual/bootloader \ virtual/elfrealloc \ u-boot-xlnx-scr \ @@ -89,9 +53,9 @@ EXTRA_IMAGEDEPENDS += " \ IMAGE_FSTYPES += "cpio.gz" # Microblaze QEMU Configurations -QB_MEM = "-m 2G" -QB_KERNEL_CMDLINE_APPEND = "console=ttyUL0,115200 root=/dev/ram0 rw" -QB_NETWORK_DEVICE = "-net nic,netdev=net0,macaddr=@MAC@" +QB_MEM ?= "-m 2G" +QB_KERNEL_CMDLINE_APPEND ?= "console=ttyUL0,115200 root=/dev/ram0 rw" +QB_NETWORK_DEVICE ?= "-net nic,netdev=net0,macaddr=@MAC@" # This will work with the default runqemu, as the first serial port is the # correct console @@ -99,13 +63,8 @@ QB_NETWORK_DEVICE = "-net nic,netdev=net0,macaddr=@MAC@" # One total serial port defined in this model (according to the generated dts) # # hw serial0 axi_uartlite_0 (40600000) - linux serial0 (ttyUL0) -QB_XILINX_SERIAL = "" +QB_XILINX_SERIAL ?= "" #### No additional settings should be after the Postamble #### Postamble PACKAGE_EXTRA_ARCHS:append = "${@['', ' ${MB_MACHINE_ARCH}']['microblaze-generic' != "${MACHINE}"]}" - -# Deprecated board config -USE_BOARD = "${@"conf/machine/include/xilinx-board-post.inc" if d.getVar("BOARD") or d.getVar("BOARD_VARIANT") else ""}" -require ${USE_BOARD} -unset USE_BOARD diff --git a/meta-xilinx-core/conf/machine/versal-ai-edge-generic.conf b/meta-xilinx-core/conf/machine/versal-ai-edge-generic.conf index 2b4f94d29..0d7f3223c 100644 --- a/meta-xilinx-core/conf/machine/versal-ai-edge-generic.conf +++ b/meta-xilinx-core/conf/machine/versal-ai-edge-generic.conf @@ -8,9 +8,9 @@ MACHINE_FEATURES += "aie vdu" # VEK280 board has 12GB memory only but default versal-generic has QB_MEM set to # 8G, Hence we need set 12G in QB_MEM. -QB_MEM = "-m 12G" +QB_MEM ?= "-m 12G" -QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/board-versal-ps-vek280.dtb" +QEMU_HW_DTB_PS ?= "${QEMU_HW_DTB_PATH}/board-versal-ps-vek280.dtb" #### No additional settings should be after the Postamble #### Postamble diff --git a/meta-xilinx-core/conf/machine/versal-common.conf b/meta-xilinx-core/conf/machine/versal-common.conf new file mode 100644 index 000000000..bc530d639 --- /dev/null +++ b/meta-xilinx-core/conf/machine/versal-common.conf @@ -0,0 +1,17 @@ +#@TYPE: Machine +#@NAME: versal-common +#@DESCRIPTION: Machine configuration for a common Versal filesystem devices + +#### Preamble +MACHINEOVERRIDES =. "${@['', 'versal-common:']['versal-common' != '${MACHINE}']}" +#### Regular settings follow + +DEFAULTTUNE = "cortexa72" + +require conf/machine/versal-generic.conf + +MACHINE_FEATURES += "aie vdu" + +#### No additional settings should be after the Postamble +#### Postamble +PACKAGE_EXTRA_ARCHS:append = "${@['', ' versal_common']['versal-common' != "${MACHINE}"]}" diff --git a/meta-xilinx-core/conf/machine/versal-generic.conf b/meta-xilinx-core/conf/machine/versal-generic.conf index aea775984..9aa47892c 100644 --- a/meta-xilinx-core/conf/machine/versal-generic.conf +++ b/meta-xilinx-core/conf/machine/versal-generic.conf @@ -10,12 +10,6 @@ MACHINEOVERRIDES =. "${@['', 'versal-generic:']['versal-generic' != '${MACHINE}' # defined before calling the required inclusion file else pre-expansion value # defined in local.conf without machine override will not be reflected. -# Yocto Versal device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "CIPS_0_pspmc_0_psv_sbsauart_0" -DT_PADDING_SIZE:pn-device-tree ?= "0x1000" -DTC_FLAGS:pn-device-tree = "-@" -YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vck190-reva-x-ebm-01-reva}" - # Yocto Versal u-boot-xlnx variables UBOOT_MACHINE ?= "xilinx_versal_virt_defconfig" BOOTMODE ?= "generic.root" @@ -23,64 +17,44 @@ BOOTMODE ?= "generic.root" # Yocto Versal arm-trusted-firmware(TF-A) variables TFA_BL33_LOAD ?= "0x8000000" -# Yocto Versal PLM variables -YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware ?= "CIPS_0_pspmc_0_psv_sbsauart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "CIPS_0_pspmc_0_psv_sbsauart_0" - # Yocto Versal KERNEL Variables UBOOT_ENTRYPOINT ?= "0x200000" UBOOT_LOADADDRESS ?= "0x200000" # Versal Serial Console SERIAL_CONSOLES ?= "115200;ttyAMA0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" require conf/machine/include/soc-versal.inc require conf/machine/include/machine-xilinx-default.inc require conf/machine/include/machine-xilinx-qemu.inc -# versal-generic.conf uses vck190-versal xsa as reference input. -# User can override with custom xsa using HDF_BASE and HDF_PATH variables from -# local.conf. -HDF_MACHINE = "vck190-versal" - MACHINE_FEATURES += "rtc ext2 ext3 vfat usbhost" -MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "${PREFERRED_PROVIDER_virtual/dtb}" - # Default SD image build onfiguration, use qemu-sd to pad IMAGE_CLASSES += "image-types-xilinx-qemu" # Add wic.qemu-sd only if initramfs_image not set due to circular dependecies IMAGE_FSTYPES += "${@'wic.qemu-sd' if (d.getVar('INITRAMFS_IMAGE') or '') == '' else 'cpio.gz.u-boot.qemu-sd-fatimg'}" EXTRA_IMAGEDEPENDS += " \ - libyaml-native \ - python3-cython-native \ - python3-pyyaml-native \ - virtual/boot-bin \ u-boot-xlnx-scr \ - qemu-devicetrees:do_deploy \ - virtual/cdo:do_deploy \ " IMAGE_BOOT_FILES += " \ - boot.bin \ - ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ Image \ boot.scr \ " # Versal QEMU Configurations # This machine has a QEMU model, runqemu setup: -QB_MEM = "-m 8G" -QB_DEFAULT_KERNEL = "none" +QB_MEM ?= "-m 8G" +QB_DEFAULT_KERNEL ?= "none" # Iteration appears to be eth0 then eth1 -QB_NETWORK_DEVICE = "-net nic,netdev=net0,macaddr=@MAC@ -net nic" +QB_NETWORK_DEVICE ?= "-net nic,netdev=net0,macaddr=@MAC@ -net nic" QB_KERNEL_CMDLINE_APPEND ?= "" -QEMU_HW_DTB_PATH = "${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch" -QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/board-versal-ps-vck190.dtb" -QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb" +QEMU_HW_DTB_PATH ?= "${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch" +QEMU_HW_DTB_PS ?= "${QEMU_HW_DTB_PATH}/board-versal-ps-vck190.dtb" +QEMU_HW_DTB_PMC ?= "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb" # Four total serial ports defined in this model (according to the dts) # @@ -89,7 +63,7 @@ QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb" # hw serial2 pl011 (ff000000) - linux serial0 (ttyAMA0) # hw serial3 pl011 (ff010000) - linux serial1 (ttyAMA1) (disabled) # ? dcc ? - linux serial2 (????) -QB_XILINX_SERIAL = "-serial null -serial null -serial mon:stdio -serial null" +QB_XILINX_SERIAL ?= "-serial null -serial null -serial mon:stdio -serial null" QB_OSPI_FILE ??= "" @@ -115,7 +89,7 @@ QB_FW_FILES = " \ -device loader,file=${DEPLOY_DIR_IMAGE}/CDO/pmc_cdo.bin,addr=0xf2000000,force-raw \ -device loader,file=${DEPLOY_DIR_IMAGE}/plm-${MACHINE}.elf,cpu-num=1 \ " -QB_PLM_OPT += "${@'' if d.getVar('QB_OSPI_FILE') else d.getVar('QB_FW_FILES')}" +QB_PLM_OPT += "${@d.getVar('QB_FW_FILES') if d.getVar('QB_OSPI_FILE') == '' else ''}" QB_OPT_APPEND += " -plm-args '${QB_PLM_OPT}'" diff --git a/meta-xilinx-core/conf/machine/versal-hbm-generic.conf b/meta-xilinx-core/conf/machine/versal-hbm-generic.conf index 9fef78f34..805df7fc7 100644 --- a/meta-xilinx-core/conf/machine/versal-hbm-generic.conf +++ b/meta-xilinx-core/conf/machine/versal-hbm-generic.conf @@ -6,9 +6,9 @@ require conf/machine/versal-generic.conf # VHK158 has 32GB memory only but default versal-generic has QB_MEM set to 8G, # Since versal-vhk158-reva.dts has 32GB set, we need set same in QB_MEM -QB_MEM = "-m 32G" +QB_MEM ?= "-m 32G" -QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/board-versal-ps-vhk158.dtb" +QEMU_HW_DTB_PS ?= "${QEMU_HW_DTB_PATH}/board-versal-ps-vhk158.dtb" #### No additional settings should be after the Postamble #### Postamble diff --git a/meta-xilinx-core/conf/machine/versal-net-common.conf b/meta-xilinx-core/conf/machine/versal-net-common.conf new file mode 100644 index 000000000..efde0bbb0 --- /dev/null +++ b/meta-xilinx-core/conf/machine/versal-net-common.conf @@ -0,0 +1,15 @@ +#@TYPE: Machine +#@NAME: versal-net-common +#@DESCRIPTION: Machine configuration for a common versal-net filesystem devices + +#### Preamble +MACHINEOVERRIDES =. "${@['', 'versal-net-common:']['versal-net-common' != '${MACHINE}']}" +#### Regular settings follow + +DEFAULTTUNE = "cortexa78" + +require conf/machine/versal-net-generic.conf + +#### No additional settings should be after the Postamble +#### Postamble +PACKAGE_EXTRA_ARCHS:append = "${@['', ' versal_net_common']['versal-net-common' != "${MACHINE}"]}" diff --git a/meta-xilinx-core/conf/machine/versal-net-generic.conf b/meta-xilinx-core/conf/machine/versal-net-generic.conf index 4895c5d02..b26fb5e1e 100644 --- a/meta-xilinx-core/conf/machine/versal-net-generic.conf +++ b/meta-xilinx-core/conf/machine/versal-net-generic.conf @@ -10,12 +10,6 @@ MACHINEOVERRIDES =. "${@['', 'versal-net-generic:']['versal-net-generic' != '${M # defined before calling the required inclusion file else pre-expansion value # defined in local.conf without machine override will not be reflected. -# Yocto Versal device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psx_wizard_0_psxl_0_psx_sbsauart_0" -DT_PADDING_SIZE:pn-device-tree ?= "0x1000" -DTC_FLAGS:pn-device-tree = "-@" -YAML_DT_BOARD_FLAGS ?= "{BOARD versal-net-ipp-rev1.9}" - # Yocto Versal u-boot-xlnx variables UBOOT_MACHINE ?= "xilinx_versal_net_virt_defconfig" BOOTMODE ?= "generic.root" @@ -23,64 +17,44 @@ BOOTMODE ?= "generic.root" # Yocto Versal arm-trusted-firmware(TF-A) variables TFA_BL33_LOAD ?= "0x8000000" -# Yocto Versal PLM variables -YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware ?= "psx_wizard_0_psxl_0_psx_sbsauart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "psx_wizard_0_psxl_0_psx_sbsauart_0" - # Yocto Versal KERNEL Variables UBOOT_ENTRYPOINT ?= "0x200000" UBOOT_LOADADDRESS ?= "0x200000" # Versal Serial Console SERIAL_CONSOLES ?= "115200;ttyAMA0 115200;ttyAMA1" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" require conf/machine/include/soc-versal-net.inc require conf/machine/include/machine-xilinx-default.inc require conf/machine/include/machine-xilinx-qemu.inc -# versal-net-generic.conf uses a qemu only xsa as reference input. -# User can override with custom xsa using HDF_BASE and HDF_PATH variables from -# local.conf. -HDF_MACHINE = "versal-net-generic" - MACHINE_FEATURES += "rtc ext2 ext3 vfat usbhost" -MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "${PREFERRED_PROVIDER_virtual/dtb}" - # Default SD image build onfiguration, use qemu-sd to pad IMAGE_CLASSES += "image-types-xilinx-qemu" # Add wic.qemu-sd only if initramfs_image not set due to circular dependecies IMAGE_FSTYPES += "${@'wic.qemu-sd' if (d.getVar('INITRAMFS_IMAGE') or '') == '' else 'cpio.gz.u-boot.qemu-sd-fatimg'}" EXTRA_IMAGEDEPENDS += " \ - libyaml-native \ - python3-cython-native \ - python3-pyyaml-native \ - virtual/boot-bin \ u-boot-xlnx-scr \ - qemu-devicetrees:do_deploy \ - virtual/cdo:do_deploy \ " IMAGE_BOOT_FILES += " \ - boot.bin \ - ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ Image \ boot.scr \ " # Versal QEMU Configurations # This machine has a QEMU model, runqemu setup: -QB_MEM = "-m 8G" -QB_DEFAULT_KERNEL = "none" +QB_MEM ?= "-m 8G" +QB_DEFAULT_KERNEL ?= "none" # Iteration appears to be eth0 then eth1 -QB_NETWORK_DEVICE = "-net nic,netdev=net0,macaddr=@MAC@ -net nic" +QB_NETWORK_DEVICE ?= "-net nic,netdev=net0,macaddr=@MAC@ -net nic" QB_KERNEL_CMDLINE_APPEND ?= "" -QEMU_HW_DTB_PATH = "${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch" -QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/board-versal-net-psx-spp-1.4.dtb" -QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmx-virt.dtb" +QEMU_HW_DTB_PATH ?= "${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch" +QEMU_HW_DTB_PS ?= "${QEMU_HW_DTB_PATH}/board-versal-net-psx-spp-1.4.dtb" +QEMU_HW_DTB_PMC ?= "${QEMU_HW_DTB_PATH}/board-versal-pmx-virt.dtb" # Four total serial ports defined in this model (according to the dts) # @@ -88,7 +62,7 @@ QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmx-virt.dtb" # hw serial1 xps-uartlite (0xf0310000) - # hw serial2 pl011 (0xf1920000) - linux serial0 (ttyAMA0) # hw serial3 pl011 (0xf1930000) - linux serial1 (ttyAMA1) -QB_XILINX_SERIAL = "-serial null -serial null -serial mon:stdio -serial null" +QB_XILINX_SERIAL ?= "-serial null -serial null -serial mon:stdio -serial null" QB_OSPI_FILE ??= "" @@ -110,11 +84,11 @@ QB_PLM_OPT = " \ " QB_FW_FILES = " \ - -device loader,file=${DEPLOY_DIR_IMAGE}/BOOT-${MACHINE}_bh.bin,addr=0xF201E000,force-raw \ - -device loader,file=${DEPLOY_DIR_IMAGE}/CDO/pmc_cdo.bin,addr=0xf2000000,force-raw \ + -device loader,file=${DEPLOY_DIR_IMAGE}/BOOT-${MACHINE}_bh.bin,addr=0xF201E000,force-raw=on \ + -device loader,file=${DEPLOY_DIR_IMAGE}/CDO/pmc_cdo.bin,addr=0xf2000000,force-raw=on \ -device loader,file=${DEPLOY_DIR_IMAGE}/plm-${MACHINE}.elf,cpu-num=1 \ " -QB_PLM_OPT += "${@'' if d.getVar('QB_OSPI_FILE') else d.getVar('QB_FW_FILES')}" +QB_PLM_OPT += "${@d.getVar('QB_FW_FILES') if d.getVar('QB_OSPI_FILE') == '' else ''}" QB_OPT_APPEND += " -plm-args '${QB_PLM_OPT}'" diff --git a/meta-xilinx-core/conf/machine/zynq-common.conf b/meta-xilinx-core/conf/machine/zynq-common.conf new file mode 100644 index 000000000..f54b6e5b2 --- /dev/null +++ b/meta-xilinx-core/conf/machine/zynq-common.conf @@ -0,0 +1,15 @@ +#@TYPE: Machine +#@NAME: zynq-common +#@DESCRIPTION: Machine configuration for a common Zynq7 filesystem devices + +#### Preamble +MACHINEOVERRIDES =. "${@['', 'zynq-common:']['zynq-common' != '${MACHINE}']}" +#### Regular settings follow + +DEFAULTTUNE = "cortexa9thf-neon" + +require conf/machine/zynq-generic.conf + +#### No additional settings should be after the Postamble +#### Postamble +PACKAGE_EXTRA_ARCHS:append = "${@['', ' zynq_common']['zynq-common' != "${MACHINE}"]}" diff --git a/meta-xilinx-core/conf/machine/zynq-generic.conf b/meta-xilinx-core/conf/machine/zynq-generic.conf index 27b10833f..8442e4e36 100644 --- a/meta-xilinx-core/conf/machine/zynq-generic.conf +++ b/meta-xilinx-core/conf/machine/zynq-generic.conf @@ -10,21 +10,10 @@ MACHINEOVERRIDES =. "${@['', 'zynq-generic:']['zynq-generic' != '${MACHINE}']}" # defined before calling the required inclusion file else pre-expansion value # defined in local.conf without machine override will not be reflected. -# Yocto Zynq-7000 device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "ps7_uart_1" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PS7_DDR_0" -DT_PADDING_SIZE:pn-device-tree ?= "0x1000" -DTC_FLAGS:pn-device-tree = "-@" -YAML_DT_BOARD_FLAGS ?= "{BOARD zc702}" - # Yocto Zynq-7000 u-boot-xlnx variables UBOOT_MACHINE ?= "xilinx_zynq_virt_defconfig" BOOTMODE ?= "generic.root" -# Yocto Zynq-7000 FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "ps7_uart_1" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "ps7_uart_1" - # Yocto KERNEL Variables UBOOT_ENTRYPOINT ?= "0x200000" UBOOT_LOADADDRESS ?= "0x200000" @@ -32,31 +21,18 @@ KERNEL_EXTRA_ARGS += "UIMAGE_LOADADDR=${UBOOT_ENTRYPOINT}" # Zynq-7000 Serial Console settings SERIAL_CONSOLES ?= "115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" require conf/machine/include/soc-zynq.inc require conf/machine/include/machine-xilinx-default.inc require conf/machine/include/machine-xilinx-qemu.inc -# zynq-generic.conf uses zc702-zynq7 xsa as reference input. -# User can override with custom xsa using HDF_BASE and HDF_PATH variables from -# local.conf. -HDF_MACHINE = "zc702-zynq7" - MACHINE_FEATURES += "rtc ext2 ext3 vfat usbhost usbgadget" -MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "${PREFERRED_PROVIDER_virtual/dtb}" - EXTRA_IMAGEDEPENDS += " \ - libyaml-native \ - python3-cython-native \ - python3-pyyaml-native \ u-boot-xlnx-scr \ " IMAGE_BOOT_FILES += " \ - boot.bin \ - ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ boot.scr \ uImage \ " @@ -67,10 +43,10 @@ IMAGE_FSTYPES += "${@'wic.qemu-sd' if (d.getVar('INITRAMFS_IMAGE') or '') == '' # Zynq-7000 QEMU Configurations # This machine has a QEMU model, runqemu setup: -QB_MEM = "-m 1024" -QB_NETWORK_DEVICE = "-net nic,netdev=net0,macaddr=@MAC@" +QB_MEM ?= "-m 1024" +QB_NETWORK_DEVICE ?= "-net nic,netdev=net0,macaddr=@MAC@" -QB_KERNEL_ROOT = "/dev/mmcblk0p2" +QB_KERNEL_ROOT ?= "/dev/mmcblk0p2" # Side effect of not-enabled serial port is we have to lock # the second (console) to mon:stdio. @@ -79,7 +55,7 @@ QB_KERNEL_ROOT = "/dev/mmcblk0p2" # # hw uart0 xuartps (e0000000) - # hw uart1 xuartps (e0001000) - linux serial0 (ttyPS0) -QB_XILINX_SERIAL = "-serial null -serial mon:stdio" +QB_XILINX_SERIAL ?= "-serial null -serial mon:stdio" # Replicate BootROM like behaviour, having loaded SPL and PMU(ROM+FW) QB_OPT_APPEND += " \ diff --git a/meta-xilinx-core/conf/machine/zynqmp-common.conf b/meta-xilinx-core/conf/machine/zynqmp-common.conf new file mode 100644 index 000000000..e2e112f9a --- /dev/null +++ b/meta-xilinx-core/conf/machine/zynqmp-common.conf @@ -0,0 +1,17 @@ +#@TYPE: Machine +#@NAME: zynqmp-common +#@DESCRIPTION: Machine configuration for a common ZynqMP (MPSOC) filesystem devices w/o mali400 + +#### Preamble +MACHINEOVERRIDES =. "${@['', 'zynqmp-common:']['zynqmp-common' != '${MACHINE}']}" +#### Regular settings follow + +DEFAULTTUNE = "cortexa53" + +require conf/machine/zynqmp-generic.conf + +MACHINE_FEATURES += "vcu rfsoc" + +#### No additional settings should be after the Postamble +#### Postamble +PACKAGE_EXTRA_ARCHS:append = "${@['', ' zynqmp_common']['zynqmp-common' != "${MACHINE}"]}" diff --git a/meta-xilinx-core/conf/machine/zynqmp-generic.conf b/meta-xilinx-core/conf/machine/zynqmp-generic.conf index c69fcd1d0..15a481020 100644 --- a/meta-xilinx-core/conf/machine/zynqmp-generic.conf +++ b/meta-xilinx-core/conf/machine/zynqmp-generic.conf @@ -10,13 +10,6 @@ MACHINEOVERRIDES =. "${@['', 'zynqmp-generic:']['zynqmp-generic' != '${MACHINE}' # defined before calling the required inclusion file else pre-expansion value # defined in local.conf without machine override will not be reflected. -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_0" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" -DT_PADDING_SIZE:pn-device-tree ?= "0x1000" -DTC_FLAGS:pn-device-tree = "-@" -YAML_DT_BOARD_FLAGS ?= "{BOARD zcu102-rev1.0}" - # Yocto ZynqMP u-boot-xlnx variables UBOOT_MACHINE ?= "xilinx_zynqmp_virt_defconfig" BOOTMODE ?= "generic.root" @@ -30,31 +23,17 @@ SPL_BINARY ?= "" # Yocto ZynqMP arm-trusted-firmware(TF-A) variables TFA_BL33_LOAD ?= "0x8000000" -# Yocto ZynqMP PMUFW variables -YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware ?= "psu_uart_0" - -# Yocto ZynqMP FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "psu_uart_0" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_0" - # Yocto ZynqMP KERNEL Variables UBOOT_ENTRYPOINT ?= "0x200000" UBOOT_LOADADDRESS ?= "0x200000" # ZynqMP Serial Console SERIAL_CONSOLES ?= "115200;ttyPS0 115200;ttyPS1" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" require conf/machine/include/soc-zynqmp.inc require conf/machine/include/machine-xilinx-default.inc require conf/machine/include/machine-xilinx-qemu.inc -# zynqmp-generic.conf uses zcu102-zynqmp xsa as reference input. -# User can override with custom xsa using HDF_BASE and HDF_PATH variables from -# local.conf. -HDF_MACHINE = "zcu102-zynqmp" - # Machine features must result in a superset # Basic features: MACHINE_FEATURES += "rtc ext2 ext3 vfat usbhost usbgadget wifi bluetooth" @@ -64,37 +43,28 @@ IMAGE_CLASSES += "image-types-xilinx-qemu" # Add wic.qemu-sd only if initramfs_image not set due to circular dependecies IMAGE_FSTYPES += "${@'wic.qemu-sd' if (d.getVar('INITRAMFS_IMAGE') or '') == '' else 'cpio.gz.u-boot'}" -MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "${PREFERRED_PROVIDER_virtual/dtb}" - EXTRA_IMAGEDEPENDS += " \ - libyaml-native \ - python3-cython-native \ - python3-pyyaml-native \ - virtual/boot-bin \ virtual/bootloader \ - qemu-devicetrees:do_deploy \ u-boot-xlnx-uenv \ u-boot-xlnx-scr \ " IMAGE_BOOT_FILES += " \ - boot.bin \ - ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ boot.scr \ Image \ " # ZynqMP QEMU Configurations # This machine has a QEMU model, runqemu setup: -QB_MEM = "-m 4096" +QB_MEM ?= "-m 4096" # Iteration appears to be eth3, eth2, eth1, eth0 -QB_NETWORK_DEVICE = "-net nic -net nic -net nic -net nic,netdev=net0,macaddr=@MAC@" +QB_NETWORK_DEVICE ?= "-net nic -net nic -net nic -net nic,netdev=net0,macaddr=@MAC@" # Set variables for QEMU DTB PATH, PS DTB and PMU DTB for zynqmp_generic, this # allows user to use different QEMU HW DTB to match their board. -QEMU_HW_DTB_PATH = "${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch" -QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/zcu102-arm.dtb" -QEMU_HW_DTB_PMU = "${QEMU_HW_DTB_PATH}/zynqmp-pmu.dtb" +QEMU_HW_DTB_PATH ?= "${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch" +QEMU_HW_DTB_PS ?= "${QEMU_HW_DTB_PATH}/zcu102-arm.dtb" +QEMU_HW_DTB_PMU ?= "${QEMU_HW_DTB_PATH}/zynqmp-pmu.dtb" # Two total serial ports defined in this model (according to the dts) # diff --git a/meta-xilinx-core/conf/machine/zynqmp-mali-common.conf b/meta-xilinx-core/conf/machine/zynqmp-mali-common.conf new file mode 100644 index 000000000..7b5dc68cd --- /dev/null +++ b/meta-xilinx-core/conf/machine/zynqmp-mali-common.conf @@ -0,0 +1,17 @@ +#@TYPE: Machine +#@NAME: zynqmp-mali-common +#@DESCRIPTION: Machine configuration for a common ZynqMP (MPSOC) filesystem devices w/ mali400 + +#### Preamble +MACHINEOVERRIDES =. "${@['', 'zynqmp-mali-common:']['zynqmp-mali-common' != '${MACHINE}']}" +#### Regular settings follow + +DEFAULTTUNE = "cortexa53" + +require conf/machine/zynqmp-generic.conf + +MACHINE_FEATURES += "mali400 vcu" + +#### No additional settings should be after the Postamble +#### Postamble +PACKAGE_EXTRA_ARCHS:append = "${@['', ' zynqmp_mali_common']['zynqmp-mali-common' != "${MACHINE}"]}" diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/device-tree.bbappend index fd7681e69..7d3742913 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/device-tree.bbappend +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/device-tree.bbappend @@ -1,21 +1,21 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files:" # openamp.dtsi is in the WORKDIR -DT_INCLUDE:append = " ${UNPACKDIR}" +DT_INCLUDE:append = " ${WORKDIR}" -do_configure[vardeps] += "ENABLE_OPENAMP_DTSI OPENAMP_EXTRA_OVERLAYS" +do_configure[vardeps] += "ENABLE_OPENAMP_DTSI OPENAMP_EXTRA_DT_INCLUDE_FILES" -OPENAMP_EXTRA_OVERLAYS:zynq = "zynq-openamp.dtsi" -OPENAMP_EXTRA_OVERLAYS:zynqmp = "zynqmp-openamp.dtsi" -OPENAMP_EXTRA_OVERLAYS:versal = "versal-openamp.dtsi" -OPENAMP_EXTRA_OVERLAYS:versal-net = "versal-net-openamp.dtsi" +OPENAMP_EXTRA_DT_INCLUDE_FILES ?= "" +OPENAMP_EXTRA_DT_INCLUDE_FILES:zynqmp = "zynqmp-openamp.dtsi" +OPENAMP_EXTRA_DT_INCLUDE_FILES:versal = "versal-openamp.dtsi" +OPENAMP_EXTRA_DT_INCLUDE_FILES:versal-net = "versal-net-openamp.dtsi" -def set_openamp_extra_overlays(d): +def set_openamp_extra_dt_include_files(d): distro_features = d.getVar('DISTRO_FEATURES', True) enable_openamp_dtsi = d.getVar('ENABLE_OPENAMP_DTSI') if 'openamp' in distro_features and enable_openamp_dtsi == '1': - return ' ${OPENAMP_EXTRA_OVERLAYS}' + return ' ${OPENAMP_EXTRA_DT_INCLUDE_FILES}' else: return '' -EXTRA_OVERLAYS:append = "${@set_openamp_extra_overlays(d)}" +EXTRA_DT_INCLUDE_FILES:append = "${@set_openamp_extra_dt_include_files(d)}" diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/versal-net-openamp.dtsi b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/versal-net-openamp.dtsi index a918faf2d..a1c939eb3 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/versal-net-openamp.dtsi +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/versal-net-openamp.dtsi @@ -53,7 +53,7 @@ reg = <0x0 0xeba00000 0x0 0x10000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&versal_net_firmware 0x183180cb>; + power-domains = <&versal_net_firmware 0x183180cb>; }; tcm_0b: tcm_0b@eba10000 { @@ -61,7 +61,7 @@ reg = <0x0 0xeba10000 0x0 0x8000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&versal_net_firmware 0x183180cc>; + power-domains = <&versal_net_firmware 0x183180cc>; }; tcm_0c: tcm_0b@eba20000 { @@ -69,7 +69,7 @@ reg = <0x0 0xeba20000 0x0 0x8000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&versal_net_firmware 0x183180cd>; + power-domains = <&versal_net_firmware 0x183180cd>; }; tcm_1a: tcm_0a@eba40000 { @@ -77,7 +77,7 @@ reg = <0x0 0xeba40000 0x0 0x10000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&versal_net_firmware 0x183180ce>; + power-domains = <&versal_net_firmware 0x183180ce>; }; tcm_1b: tcm_0b@eba50000 { @@ -85,7 +85,7 @@ reg = <0x0 0xeba50000 0x0 0x8000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&versal_net_firmware 0x183180cf>; + power-domains = <&versal_net_firmware 0x183180cf>; }; tcm_1c: tcm_0b@eba60000 { @@ -93,7 +93,7 @@ reg = <0x0 0xeba60000 0x0 0x8000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&versal_net_firmware 0x183180d0>; + power-domains = <&versal_net_firmware 0x183180d0>; }; r52ss { @@ -110,7 +110,7 @@ ranges; sram = <&tcm_0a>, <&tcm_0b>, <&tcm_0c>; memory-region = <&rproc_0_reserved>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; - power-domain = <&versal_net_firmware 0x181100BF>; + power-domains = <&versal_net_firmware 0x181100BF>; mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; mbox-names = "tx", "rx"; }; @@ -121,7 +121,7 @@ ranges; sram = <&tcm_1a>, <&tcm_1b>, <&tcm_1c>; memory-region = <&rproc_1_reserved>, <&rpu1vdev0buffer>, <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; - power-domain = <&versal_net_firmware 0x181100C0>; + power-domains = <&versal_net_firmware 0x181100C0>; mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; mbox-names = "tx", "rx"; }; diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/versal-openamp.dtsi b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/versal-openamp.dtsi index 01e337c72..b21b40964 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/versal-openamp.dtsi +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/versal-openamp.dtsi @@ -52,7 +52,7 @@ reg = <0x0 0xffe00000 0x0 0x10000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&versal_firmware 0x1831800b>; + power-domains = <&versal_firmware 0x1831800b>; }; tcm_0b: tcm_0b@ffe20000 { @@ -60,7 +60,7 @@ reg = <0x0 0xffe20000 0x0 0x10000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&versal_firmware 0x1831800c>; + power-domains = <&versal_firmware 0x1831800c>; }; tcm_1a: tcm_1a@ffe90000 { @@ -68,7 +68,7 @@ reg = <0x0 0xffe90000 0x0 0x10000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&versal_firmware 0x1831800d>; + power-domains = <&versal_firmware 0x1831800d>; }; tcm_1b: tcm_1b@ffeb0000 { @@ -76,7 +76,7 @@ reg = <0x0 0xffeb0000 0x0 0x10000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&versal_firmware 0x1831800e>; + power-domains = <&versal_firmware 0x1831800e>; }; rf5ss@ff9a0000 { @@ -94,7 +94,7 @@ ranges; sram = <&tcm_0a>, <&tcm_0b>; memory-region = <&rproc_0_reserved>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; - power-domain = <&versal_firmware 0x18110005>; + power-domains = <&versal_firmware 0x18110005>; mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; mbox-names = "tx", "rx"; }; @@ -105,7 +105,7 @@ ranges; sram = <&tcm_1a>, <&tcm_1b>; memory-region = <&rproc_1_reserved>, <&rpu1vdev0buffer>, <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; - power-domain = <&versal_firmware 0x18110006>; + power-domains = <&versal_firmware 0x18110006>; mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; mbox-names = "tx", "rx"; }; diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynq-openamp-overlay.dts b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynq-openamp-overlay.dts deleted file mode 100644 index b5d238ffa..000000000 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynq-openamp-overlay.dts +++ /dev/null @@ -1,13 +0,0 @@ -/* - * SPDX-License-Identifier: MIT - * - * dts overlay file for Zynq OpenAMP - * - * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. - * - */ - -/dts-v1/; -/plugin/; - -#include "zynq-openamp.dtsi" diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynq-openamp.dtsi b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynq-openamp.dtsi deleted file mode 100644 index 0e8222028..000000000 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynq-openamp.dtsi +++ /dev/null @@ -1,43 +0,0 @@ -/* - * SPDX-License-Identifier: MIT - * - * dts file for Zynq OpenAMP - * - * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. - * - */ - -&{/} { - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - vdev0vring0: vdev0vring0@3e800000 { - no-map; - compatible = "shared-dma-pool"; - reg = <0x3e800000 0x4000>; - }; - vdev0vring1: vdev0vring1@3e804000 { - no-map; - compatible = "shared-dma-pool"; - reg = <0x3e804000 0x4000>; - }; - vdev0buffer: vdev0buffer@3e808000 { - no-map; - compatible = "shared-dma-pool"; - reg = <0x3e808000 0x100000>; - }; - rproc_0_reserved: rproc@3e000000 { - no-map; - compatible = "shared-dma-pool"; - reg = <0x3e000000 0x800000>; - }; - }; - - remoteproc0: remoteproc@0 { - compatible = "xlnx,zynq_remoteproc"; - firmware = "firmware"; - memory-region = <&rproc_0_reserved>, <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>; - interrupt-parent = <&intc>; - }; -}; diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynqmp-openamp.dtsi b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynqmp-openamp.dtsi index 8ef726560..1ad51fef3 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynqmp-openamp.dtsi +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/files/zynqmp-openamp.dtsi @@ -52,7 +52,7 @@ reg = <0x0 0xffe00000 0x0 0x10000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&zynqmp_firmware 15>; + power-domains = <&zynqmp_firmware 15>; }; tcm_0b: tcm_0b@ffe20000 { @@ -60,14 +60,14 @@ reg = <0x0 0xffe20000 0x0 0x10000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&zynqmp_firmware 16>; + power-domains = <&zynqmp_firmware 16>; }; tcm_1a: tcm_0a@ffe90000 { no-map; reg = <0x0 0xffe90000 0x0 0x10000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&zynqmp_firmware 17>; + power-domains = <&zynqmp_firmware 17>; }; tcm_1b: tcm_0b@ffeb0000 { @@ -75,7 +75,7 @@ reg = <0x0 0xffeb0000 0x0 0x10000>; status = "okay"; compatible = "mmio-sram"; - power-domain = <&zynqmp_firmware 18>; + power-domains = <&zynqmp_firmware 18>; }; rf5ss@ff9a0000 { compatible = "xlnx,zynqmp-r5-remoteproc"; @@ -92,7 +92,7 @@ ranges; sram = <&tcm_0a>, <&tcm_0b>; memory-region = <&rproc_0_reserved>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; - power-domain = <&zynqmp_firmware 7>; + power-domains = <&zynqmp_firmware 7>; mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; mbox-names = "tx", "rx"; }; @@ -103,7 +103,7 @@ ranges; sram = <&tcm_1a>, <&tcm_1b>; memory-region = <&rproc_1_reserved>, <&rpu1vdev0buffer>, <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; - power-domain = <&zynqmp_firmware 8>; + power-domains = <&zynqmp_firmware 8>; mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; mbox-names = "tx", "rx"; }; diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/open-amp-device-tree.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/open-amp-device-tree.bb index 68c4d0f90..7b626ee39 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/open-amp-device-tree.bb +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/open-amp-device-tree.bb @@ -5,8 +5,6 @@ LICENSE = "MIT" LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" SRC_URI = " \ - file://zynq-openamp.dtsi \ - file://zynq-openamp-overlay.dts \ file://zynqmp-openamp.dtsi \ file://zynqmp-openamp-overlay.dts \ file://versal-openamp.dtsi \ @@ -18,7 +16,6 @@ SRC_URI = " \ # We don't have anything to include from the kernel KERNEL_INCLUDE = "" -COMPATIBLE_MACHINE:zynq = "${MACHINE}" COMPATIBLE_MACHINE:zynqmp = "${MACHINE}" COMPATIBLE_MACHINE:versal = "${MACHINE}" COMPATIBLE_MACHINE:versal-net = "${MACHINE}" @@ -32,7 +29,7 @@ PROVIDES:remove = "virtual/dtb" DEPENDS += "python3-dtc-native" -S = "${UNPACKDIR}/source" +S = "${WORKDIR}/source" # Set a default so something resolves SOC_FAMILY ??= "SOC_FAMILY" @@ -40,12 +37,12 @@ SOC_FAMILY ??= "SOC_FAMILY" do_configure:prepend() { mkdir -p source - if [ -e ${UNPACKDIR}/${MACHINE}-openamp-overlay.dts ]; then - install ${UNPACKDIR}/${MACHINE}-openamp.dtsi ${UNPACKDIR}/source/. || : - install ${UNPACKDIR}/${MACHINE}-openamp-overlay.dts ${UNPACKDIR}/source/openamp.dts - elif [ -e ${UNPACKDIR}/${SOC_FAMILY}-openamp-overlay.dts ]; then - install ${UNPACKDIR}/${SOC_FAMILY}-openamp.dtsi ${UNPACKDIR}/source/. || : - install ${UNPACKDIR}/${SOC_FAMILY}-openamp-overlay.dts ${UNPACKDIR}/source/openamp.dts + if [ -e ${WORKDIR}/${MACHINE}-openamp-overlay.dts ]; then + install ${WORKDIR}/${MACHINE}-openamp.dtsi ${WORKDIR}/source/. || : + install ${WORKDIR}/${MACHINE}-openamp-overlay.dts ${WORKDIR}/source/openamp.dts + elif [ -e ${WORKDIR}/${SOC_FAMILY}-openamp-overlay.dts ]; then + install ${WORKDIR}/${SOC_FAMILY}-openamp.dtsi ${WORKDIR}/source/. || : + install ${WORKDIR}/${SOC_FAMILY}-openamp-overlay.dts ${WORKDIR}/source/openamp.dts else bbfatal "${MACHINE}-openamp-overlay.dts or ${SOC_FAMILY}-openamp-overlay.dts file is not available. Cannot automatically add OpenAMP dtbo file." fi diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-core/packagegroups/packagegroup-openamp.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-core/packagegroups/packagegroup-openamp.bb index ba8ef9f6e..13992ebc1 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-core/packagegroups/packagegroup-openamp.bb +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-core/packagegroups/packagegroup-openamp.bb @@ -2,6 +2,9 @@ DESCRIPTION = "OpenAMP supported packages" PACKAGE_ARCH = "${MACHINE_ARCH}" +# We don't support Zynq +COMPATIBLE_MACHINE:zynq = "$^" + inherit packagegroup features_check REQUIRED_DISTRO_FEATURES = "openamp" diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2024.1.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2024.1.bb index a03912d74..9ca9cbc1a 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2024.1.bb +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2024.1.bb @@ -1,8 +1,8 @@ SRCBRANCH ?= "2024" -SRCREV = "e2fdb4fecbebe41b4cd1c0b4fbfa3496bcded485" +SRCREV = "9e9997221ddd335c31cf881edf7026c762024a58" BRANCH = "xlnx_rel_v2024.1" LIC_FILES_CHKSUM ?= "file://LICENSE.md;md5=f4d5df0f12dcea1b1a0124219c0dbab4" -PV = "${SRCBRANCH}+git" +PV .= "+git" REPO = "git://github.com/Xilinx/libmetal.git;protocol=https" diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2024.2.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2024.2.bb new file mode 100644 index 000000000..bcde904dd --- /dev/null +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2024.2.bb @@ -0,0 +1,16 @@ +SRCBRANCH ?= "2024" +SRCREV = "e2fdb4fecbebe41b4cd1c0b4fbfa3496bcded485" +BRANCH = "xlnx_rel_v2024.2" +LIC_FILES_CHKSUM ?= "file://LICENSE.md;md5=f4d5df0f12dcea1b1a0124219c0dbab4" +PV .= "+git" + +REPO = "git://github.com/Xilinx/libmetal.git;protocol=https" + +include ${LAYER_PATH_openamp-layer}/recipes-openamp/libmetal/libmetal.inc +include ${LAYER_PATH_openamp-layer}/vendor/xilinx/recipes-openamp/libmetal/libmetal-xlnx.inc + +RPROVIDES:${PN}-dbg += "libmetal-dbg" +RPROVIDES:${PN}-dev += "libmetal-dev" +RPROVIDES:${PN}-lic += "libmetal-lic" +RPROVIDES:${PN}-src += "libmetal-src" +RPROVIDES:${PN}-staticdev += "libmetal-staticdev" diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2024.1.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2024.1.bb index 94535abc9..29d4bc4f7 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2024.1.bb +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2024.1.bb @@ -1,8 +1,8 @@ SRCBRANCH ?= "2024" -SRCREV = "dbf0857389190f4c4cedfb77bd1f9bdd7ab404f3" +SRCREV = "699ad2c5b9236d61aae1b89e2857361db1bfeb95" BRANCH = "xlnx_rel_v2024.1" LIC_FILES_CHKSUM ?= "file://LICENSE.md;md5=ab88daf995c0bd0071c2e1e55f3d3505" -PV = "${SRCBRANCH}+git" +PV .= "+git" REPO = "git://github.com/Xilinx/open-amp.git;protocol=https" include ${LAYER_PATH_openamp-layer}/recipes-openamp/open-amp/open-amp.inc diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2024.2.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2024.2.bb new file mode 100644 index 000000000..06c2ecbc8 --- /dev/null +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2024.2.bb @@ -0,0 +1,16 @@ +SRCBRANCH ?= "2024" +SRCREV = "47caef116ccbf5d5a9778082a98fe8f3710b549c" +BRANCH = "xlnx_rel_v2024.2" +LIC_FILES_CHKSUM ?= "file://LICENSE.md;md5=ab88daf995c0bd0071c2e1e55f3d3505" +PV .= "+git" +REPO = "git://github.com/Xilinx/open-amp.git;protocol=https" + +include ${LAYER_PATH_openamp-layer}/recipes-openamp/open-amp/open-amp.inc +require ${LAYER_PATH_openamp-layer}/vendor/xilinx/recipes-openamp/open-amp/open-amp-xlnx.inc + +RPROVIDES:${PN}-dbg += "open-amp-dbg" +RPROVIDES:${PN}-dev += "open-amp-dev" +RPROVIDES:${PN}-lic += "open-amp-lic" +RPROVIDES:${PN}-src += "open-amp-src" +RPROVIDES:${PN}-staticdev += "open-amp-staticdev" + diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_%.bbappend b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202210.2.13.479.bbappend similarity index 100% rename from meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_%.bbappend rename to meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202210.2.13.479.bbappend diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202220.2.14.0.bbappend b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202220.2.14.0.bbappend new file mode 100644 index 000000000..0e7f3693e --- /dev/null +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202220.2.14.0.bbappend @@ -0,0 +1,8 @@ +# Use libmetal for systems with AIE +# For versal devices with the ai-engine +PACKAGE_ARCH_orig := "${PACKAGE_ARCH}" +PACKAGE_ARCH = "${@bb.utils.contains('MACHINE_FEATURES', 'aie', '${MACHINE_ARCH}', '${PACKAGE_ARCH_orig}', d)}" +EXTRA_OECMAKE .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' -DXRT_AIE_BUILD=true', '', d)}" +TARGET_CXXFLAGS .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' -DXRT_ENABLE_AIE -DFAL_LINUX=on', '', d)}" +DEPENDS .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' libxaiengine aiefal', '', d)}" +RDEPENDS:${PN} += "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' libxaiengine aiefal', '', d)}" diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202310.2.15.0.bbappend b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202310.2.15.0.bbappend index 362dc45a2..a7ab6bb87 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202310.2.15.0.bbappend +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202310.2.15.0.bbappend @@ -1,2 +1,9 @@ -# Older xrt requires a manual dependency on libmetal -DEPENDS .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' libmetal', '', d)}" +# Use libmetal for systems with AIE +# For versal devices with the ai-engine +PACKAGE_ARCH_orig := "${PACKAGE_ARCH}" +PACKAGE_ARCH = "${@bb.utils.contains('MACHINE_FEATURES', 'aie', '${MACHINE_ARCH}', '${PACKAGE_ARCH_orig}', d)}" +EXTRA_OECMAKE .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' -DXRT_AIE_BUILD=true', '', d)}" +TARGET_CXXFLAGS .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' -DXRT_ENABLE_AIE -DFAL_LINUX=on', '', d)}" +DEPENDS .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' libxaiengine aiefal libmetal', '', d)}" +RDEPENDS:${PN} += "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' libxaiengine aiefal', '', d)}" + diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202320.2.16.0.bbappend b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202320.2.16.0.bbappend index 362dc45a2..a7ab6bb87 100644 --- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202320.2.16.0.bbappend +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202320.2.16.0.bbappend @@ -1,2 +1,9 @@ -# Older xrt requires a manual dependency on libmetal -DEPENDS .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' libmetal', '', d)}" +# Use libmetal for systems with AIE +# For versal devices with the ai-engine +PACKAGE_ARCH_orig := "${PACKAGE_ARCH}" +PACKAGE_ARCH = "${@bb.utils.contains('MACHINE_FEATURES', 'aie', '${MACHINE_ARCH}', '${PACKAGE_ARCH_orig}', d)}" +EXTRA_OECMAKE .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' -DXRT_AIE_BUILD=true', '', d)}" +TARGET_CXXFLAGS .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' -DXRT_ENABLE_AIE -DFAL_LINUX=on', '', d)}" +DEPENDS .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' libxaiengine aiefal libmetal', '', d)}" +RDEPENDS:${PN} += "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' libxaiengine aiefal', '', d)}" + diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202410.2.17.319.bbappend b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202410.2.17.319.bbappend new file mode 100644 index 000000000..0e7f3693e --- /dev/null +++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt/xrt_202410.2.17.319.bbappend @@ -0,0 +1,8 @@ +# Use libmetal for systems with AIE +# For versal devices with the ai-engine +PACKAGE_ARCH_orig := "${PACKAGE_ARCH}" +PACKAGE_ARCH = "${@bb.utils.contains('MACHINE_FEATURES', 'aie', '${MACHINE_ARCH}', '${PACKAGE_ARCH_orig}', d)}" +EXTRA_OECMAKE .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' -DXRT_AIE_BUILD=true', '', d)}" +TARGET_CXXFLAGS .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' -DXRT_ENABLE_AIE -DFAL_LINUX=on', '', d)}" +DEPENDS .= "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' libxaiengine aiefal', '', d)}" +RDEPENDS:${PN} += "${@bb.utils.contains('MACHINE_FEATURES', 'aie', ' libxaiengine aiefal', '', d)}" diff --git a/meta-xilinx-core/dynamic-layers/openembedded-layer/recipes-graphics/xorg-driver/xf86-video-armsoc/0001-xf86-video-armosc-Accelerate-picture-composition.patch b/meta-xilinx-core/dynamic-layers/openembedded-layer/recipes-graphics/xorg-driver/xf86-video-armsoc/0001-xf86-video-armosc-Accelerate-picture-composition.patch new file mode 100644 index 000000000..3fa4d6eca --- /dev/null +++ b/meta-xilinx-core/dynamic-layers/openembedded-layer/recipes-graphics/xorg-driver/xf86-video-armsoc/0001-xf86-video-armosc-Accelerate-picture-composition.patch @@ -0,0 +1,1058 @@ +From 015f8a54f7e5a754e1cefba1aa7b1f6992a8aa9b Mon Sep 17 00:00:00 2001 +From: Anatoliy Klymenko +Date: Tue, 16 Jul 2024 19:48:47 +0000 +Subject: [PATCH] xf86-video-armosc: Accelerate picture composition + +Introduce Repulsion - simplistic GPU accelerated compositor to back RandR +display manipulation features. This library is inspired by Glamor extension +https://www.freedesktop.org/wiki/Software/Glamor/. Unfortunately Glamor +doesn't work as is on ARM Mali-400 MP due to the lack of required features +and several bugs in Mali EGL/GLES implementation. + +Install and manage picture compositor hooks. + +Provide access to dma-buf fd from ARSOC buffer object. + +Attach shadow buffer object to corresponding pixmap. + +Signed-off-by: Anatoliy Klymenko +--- + src/Makefile.am | 3 +- + src/armsoc_driver.c | 145 ++++++++++ + src/armsoc_driver.h | 7 + + src/armsoc_dumb.c | 8 + + src/armsoc_dumb.h | 1 + + src/armsoc_exa.c | 18 +- + src/armsoc_repulsion.c | 624 +++++++++++++++++++++++++++++++++++++++++ + src/armsoc_repulsion.h | 67 +++++ + 8 files changed, 867 insertions(+), 6 deletions(-) + create mode 100644 src/armsoc_repulsion.c + create mode 100644 src/armsoc_repulsion.h + +diff --git a/src/Makefile.am b/src/Makefile.am +index db5f110..cd4f795 100644 +--- a/src/Makefile.am ++++ b/src/Makefile.am +@@ -38,7 +38,7 @@ ERROR_CFLAGS = -Werror -Wall -Wdeclaration-after-statement -Wvla \ + AM_CFLAGS = @XORG_CFLAGS@ $(ERROR_CFLAGS) + armsoc_drv_la_LTLIBRARIES = armsoc_drv.la + armsoc_drv_la_LDFLAGS = -module -avoid-version -no-undefined +-armsoc_drv_la_LIBADD = @XORG_LIBS@ ++armsoc_drv_la_LIBADD = -lMali @XORG_LIBS@ + armsoc_drv_ladir = @moduledir@/drivers + DRMMODE_SRCS = drmmode_exynos/drmmode_exynos.c \ + drmmode_pl111/drmmode_pl111.c \ +@@ -54,4 +54,5 @@ armsoc_drv_la_SOURCES = \ + armsoc_dri2.c \ + armsoc_driver.c \ + armsoc_dumb.c \ ++ armsoc_repulsion.c \ + $(DRMMODE_SRCS) +diff --git a/src/armsoc_driver.c b/src/armsoc_driver.c +index a4a1ba3..f5b8f21 100644 +--- a/src/armsoc_driver.c ++++ b/src/armsoc_driver.c +@@ -42,6 +42,7 @@ + #include + + #include "armsoc_driver.h" ++#include "armsoc_repulsion.h" + + #include "micmap.h" + +@@ -971,6 +972,138 @@ ARMSOCAccelInit(ScreenPtr pScreen) + pARMSOC->dri = FALSE; + } + ++#define ARMSOC_ACCEL_MIN_DIMS 200 ++ ++/** ++ * Classify compositor input to figure out if we can accelerate composition ++ */ ++static Bool ++ARMSOCCanAccelerateComposition(CARD8 op, ++ PicturePtr src, ++ PicturePtr mask, ++ PicturePtr dest, ++ CARD16 width, ++ CARD16 height) ++{ ++ /* We only support source to destination pixmap copy */ ++ if (op != PictOpSrc) ++ return FALSE; ++ ++ /* ++ * Don't accelerate small picture compositions, e.g. toolbars, cursor, ++ * icons, etc. ++ */ ++ if (width < ARMSOC_ACCEL_MIN_DIMS || height < ARMSOC_ACCEL_MIN_DIMS) ++ return FALSE; ++ ++ /* Check source picture */ ++ if (!src || !src->pDrawable) ++ return FALSE; ++ ++ /* Check destination picture constraints */ ++ if (!dest || !dest->pDrawable || dest->pDrawable->type != DRAWABLE_PIXMAP) ++ return FALSE; ++ ++ /* We don't support masking */ ++ if (mask) ++ return FALSE; ++ ++ /* ++ * We expect source transform to be assigned, otherwise there is not much ++ * to accelerate ++ */ ++ if (!src->transform) ++ return FALSE; ++ ++ /* We expect buffer object to be assigned to source */ ++ if (!draw2pix(src->pDrawable)) ++ return FALSE; ++ ++ /* We expect buffer object to be assigned to destination */ ++ if (!draw2pix(dest->pDrawable)) ++ return FALSE; ++ ++ return TRUE; ++} ++ ++/** ++ * This callback will be invoked every time xserver needs to combine 2 ++ * pictures. Our special interest is the case when we need to blit draw buffer ++ * into shadow buffer while performing rotation or reflection. Without ++ * acceleration such composition will end up in tons of matrix multiplications ++ * for every pixel, which is obviously very slow. Here we need to detect such ++ * cases and accelerate the composition on the GPU. ++ */ ++static void ++ARMSOCComposite(CARD8 op, ++ PicturePtr src, ++ PicturePtr mask, ++ PicturePtr dest, ++ INT16 x_src, ++ INT16 y_src, ++ INT16 x_mask, ++ INT16 y_mask, ++ INT16 x_dest, ++ INT16 y_dest, ++ CARD16 width, ++ CARD16 height) ++{ ++ ScreenPtr pScreen = dest->pDrawable->pScreen; ++ PictureScreenPtr ps = GetPictureScreen(pScreen); ++ ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); ++ struct ARMSOCRec *pARMSOC = ARMSOCPTR(pScrn); ++ struct armsoc_bo *src_bo = NULL, *dest_bo = NULL; ++ float xform_matrix[3][3] = {}; ++ ++ Bool can_accelerate = ++ ARMSOCCanAccelerateComposition(op, src, mask, dest, width, height); ++ ++ ++ if (can_accelerate) { ++ /* Transpose, scale & adjust transformation matrix */ ++ int x, y; ++ for (y = 0; y < 3; ++y) ++ for (x = 0; x < 3; ++x) ++ xform_matrix[x][y] = ++ (float)src->transform->matrix[y][x] / 65536.f; ++ /* ++ * TODO: Figure out coordinate system where these sins make sence, ++ * insted of just reversing them ++ */ ++ xform_matrix[0][1] = -xform_matrix[0][1]; ++ xform_matrix[1][0] = -xform_matrix[1][0]; ++ } ++ ++ /* Extract source buffer object */ ++ if (can_accelerate) { ++ PixmapPtr pm = draw2pix(src->pDrawable); ++ src_bo = ARMSOCPixmapBo(pm); ++ } ++ ++ /* Extract destination buffer object */ ++ if (can_accelerate) { ++ PixmapPtr pm = draw2pix(dest->pDrawable); ++ dest_bo = ARMSOCPixmapBo(pm); ++ } ++ ++ if (can_accelerate && ++ armsoc_repulsion_composite(pARMSOC->repulsion, ++ src_bo, ++ dest_bo, ++ xform_matrix)) { ++ } else { ++ /* Fallback to saved compositor if accelerated composition fails */ ++ pARMSOC->composite_proc(op, src, mask, dest, ++ x_src, y_src, x_mask, y_mask, ++ x_dest, y_dest, width, height); ++ } ++ ++ if (ps->Composite != ARMSOCComposite) { ++ pARMSOC->composite_proc = ps->Composite; ++ ps->Composite = ARMSOCComposite; ++ } ++} ++ + /** + * The driver's ScreenInit() function, called at the start of each server + * generation. Fill in pScreen, map the frame buffer, save state, +@@ -986,6 +1119,7 @@ ARMSOCScreenInit(SCREEN_INIT_ARGS_DECL) + struct ARMSOCRec *pARMSOC = ARMSOCPTR(pScrn); + VisualPtr visual; + xf86CrtcConfigPtr xf86_config; ++ PictureScreenPtr ps; + int j; + const char *fbdev; + int depth; +@@ -1174,6 +1308,13 @@ ARMSOCScreenInit(SCREEN_INIT_ARGS_DECL) + pARMSOC->lockFD = -1; + } + ++ pARMSOC->repulsion = armsoc_repulsion_init(); ++ ++ ps = GetPictureScreen(pScreen); ++ pARMSOC->composite_proc = ps->Composite; ++ ++ ps->Composite = ARMSOCComposite; ++ + TRACE_EXIT(); + return TRUE; + +@@ -1250,6 +1391,8 @@ ARMSOCCloseScreen(CLOSE_SCREEN_ARGS_DECL) + + TRACE_ENTER(); + ++ armsoc_repulsion_release(pARMSOC->repulsion); ++ + drmmode_screen_fini(pScrn); + drmmode_cursor_fini(pScreen); + +@@ -1294,6 +1437,8 @@ ARMSOCCloseScreen(CLOSE_SCREEN_ARGS_DECL) + pARMSOC->lockFD = -1; + } + ++ armsoc_repulsion_release(pARMSOC->repulsion); ++ + TRACE_EXIT(); + + return ret; +diff --git a/src/armsoc_driver.h b/src/armsoc_driver.h +index eae76ca..20b0f80 100644 +--- a/src/armsoc_driver.h ++++ b/src/armsoc_driver.h +@@ -38,6 +38,7 @@ + #include "xf86drm.h" + #include + #include "armsoc_exa.h" ++#include "armsoc_repulsion.h" + + /* Apparently not used by X server */ + #define ARMSOC_VERSION 1000 +@@ -183,6 +184,12 @@ struct ARMSOCRec { + /* Size of the swap chain. Set to 1 if DRI2SwapLimit unsupported, + * driNumBufs if early display enabled, otherwise driNumBufs-1 */ + unsigned int swap_chain_size; ++ ++ /* GPU accelerated picture compositor, AKA Repulsion */ ++ struct ARMSOCRepulsion *repulsion; ++ ++ /* SW (pixman based) picture compositor fallback */ ++ CompositeProcPtr composite_proc; + }; + + /* +diff --git a/src/armsoc_dumb.c b/src/armsoc_dumb.c +index 7e6dbd9..3c16ed2 100644 +--- a/src/armsoc_dumb.c ++++ b/src/armsoc_dumb.c +@@ -130,6 +130,14 @@ int armsoc_bo_has_dmabuf(struct armsoc_bo *bo) + return bo->dmabuf >= 0; + } + ++int armsoc_bo_get_dmabuf(struct armsoc_bo *bo) ++{ ++ if (!armsoc_bo_has_dmabuf(bo)) ++ armsoc_bo_set_dmabuf(bo); ++ ++ return bo->dmabuf; ++} ++ + struct armsoc_bo *armsoc_bo_new_with_dim(struct armsoc_device *dev, + uint32_t width, uint32_t height, uint8_t depth, + uint8_t bpp, enum armsoc_buf_type buf_type) +diff --git a/src/armsoc_dumb.h b/src/armsoc_dumb.h +index a299ccf..3b687c7 100644 +--- a/src/armsoc_dumb.h ++++ b/src/armsoc_dumb.h +@@ -89,6 +89,7 @@ void armsoc_bo_unreference(struct armsoc_bo *bo); + int armsoc_bo_set_dmabuf(struct armsoc_bo *bo); + void armsoc_bo_clear_dmabuf(struct armsoc_bo *bo); + int armsoc_bo_has_dmabuf(struct armsoc_bo *bo); ++int armsoc_bo_get_dmabuf(struct armsoc_bo *bo); + int armsoc_bo_clear(struct armsoc_bo *bo); + int armsoc_bo_rm_fb(struct armsoc_bo *bo); + int armsoc_bo_resize(struct armsoc_bo *bo, uint32_t new_width, +diff --git a/src/armsoc_exa.c b/src/armsoc_exa.c +index a310727..7edf0ac 100644 +--- a/src/armsoc_exa.c ++++ b/src/armsoc_exa.c +@@ -161,10 +161,16 @@ ARMSOCModifyPixmapHeader(PixmapPtr pPixmap, int width, int height, + ScrnInfoPtr pScrn = pix2scrn(pPixmap); + struct ARMSOCRec *pARMSOC = ARMSOCPTR(pScrn); + enum armsoc_buf_type buf_type = ARMSOC_BO_NON_SCANOUT; ++ struct armsoc_bo *fb_bo = NULL; + + /* Only modify specified fields, keeping all others intact. */ +- if (pPixData) ++ if (pPixData) { + pPixmap->devPrivate.ptr = pPixData; ++ if (pARMSOC->shadow && pPixData == armsoc_bo_map(pARMSOC->shadow)) ++ fb_bo = pARMSOC->shadow; ++ else if (pPixData == armsoc_bo_map(pARMSOC->scanout)) ++ fb_bo = pARMSOC->scanout; ++ } + + if (devKind > 0) + pPixmap->devKind = devKind; +@@ -173,7 +179,7 @@ ARMSOCModifyPixmapHeader(PixmapPtr pPixmap, int width, int height, + * We can't accelerate this pixmap, and don't ever want to + * see it again.. + */ +- if (pPixData && pPixData != armsoc_bo_map(pARMSOC->scanout)) { ++ if (pPixData && fb_bo && pPixData != armsoc_bo_map(fb_bo)) { + /* scratch-pixmap (see GetScratchPixmapHeader()) gets recycled, + * so could have a previous bo! + * Pixmap drops ref on its old bo */ +@@ -185,10 +191,10 @@ ARMSOCModifyPixmapHeader(PixmapPtr pPixmap, int width, int height, + } + + /* Replacing the pixmap's current bo with the scanout bo */ +- if (pPixData == armsoc_bo_map(pARMSOC->scanout) && priv->bo != pARMSOC->scanout) { ++ if (fb_bo && pPixData == armsoc_bo_map(fb_bo) && priv->bo != fb_bo) { + struct armsoc_bo *old_bo = priv->bo; + +- priv->bo = pARMSOC->scanout; ++ priv->bo = fb_bo; + /* pixmap takes a ref on its new bo */ + armsoc_bo_reference(priv->bo); + +@@ -225,7 +231,9 @@ ARMSOCModifyPixmapHeader(PixmapPtr pPixmap, int width, int height, + if (!pPixmap->drawable.width || !pPixmap->drawable.height) + return TRUE; + +- assert(priv->bo); ++ if(!priv->bo) ++ return FALSE; ++ + if (armsoc_bo_width(priv->bo) != pPixmap->drawable.width || + armsoc_bo_height(priv->bo) != pPixmap->drawable.height || + armsoc_bo_bpp(priv->bo) != pPixmap->drawable.bitsPerPixel) { +diff --git a/src/armsoc_repulsion.c b/src/armsoc_repulsion.c +new file mode 100644 +index 0000000..1a7c0cd +--- /dev/null ++++ b/src/armsoc_repulsion.c +@@ -0,0 +1,624 @@ ++/* ++ * Copyright (C) 2024 AMD, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the next ++ * paragraph) shall be included in all copies or substantial portions of the ++ * Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE ++ * SOFTWARE. ++ * ++ * Author: Anatoliy Klymenko ++ * ++ */ ++ ++#include "armsoc_repulsion.h" ++ ++#include ++#include ++ ++#define EGL_GL_PROTOTYPES 1 ++#include ++#define EGL_EGLEXT_PROTOTYPES 1 ++#include ++#include ++#define GL_GLEXT_PROTOTYPES 1 ++#include ++ ++#include ++ ++/* ----------------------------------------------------------------------------- ++ * Utilities ++ */ ++ ++#define INFO_LOG(fmt, ...) \ ++do { xf86DrvMsg(0, X_INFO, fmt "\n", ##__VA_ARGS__); } while (0) ++ ++#define WARN_LOG(fmt, ...) \ ++do { xf86DrvMsg(0, X_WARNING, "WARNING: " fmt "\n", ##__VA_ARGS__); } while (0) ++ ++#define ERROR_LOG(fmt, ...) \ ++do { xf86DrvMsg(0, X_ERROR, "ERROR: " fmt "\n", ##__VA_ARGS__); } while (0) ++ ++/** ++ * struct RepulsiveVertex - vertex data used for rendering ++ * @pos: vertex position in the screen coordinate space ++ * @uv: texture coordinate bound to this vertex ++ */ ++struct RepulsiveVertex { ++ GLfloat pos[3]; ++ GLfloat uv[2]; ++}; ++ ++/** ++ * struct ARMSOCRepulsion - GPU acceleration data ++ * @egl: EGL specific bits ++ * @egl.display: EGL display connection ++ * @egl.context: EGL context ++ * @egl.surface: primary EGL surface ++ * @gles: OpenGL ES related bits ++ * @gles.vbo: Vertex buffer object ++ * @gles.ibo: Index buffer object ++ * @gles.texture: External texture object ++ * @gles.proj_location: Shader location for projection matrix ++ * @gles.xform_location: Shader location for transformation matrix ++ * @gles.vertices: Array of vertices used in rendering ++ */ ++struct ARMSOCRepulsion { ++ struct { ++ EGLDisplay display; ++ EGLContext context; ++ EGLSurface surface; ++ } egl; ++ struct { ++ GLuint vbo; ++ GLuint ibo; ++ GLuint texture; ++ GLuint program; ++ GLint proj_location; ++ GLint xform_location; ++ struct RepulsiveVertex vertices[4]; ++ } gles; ++}; ++ ++/* ----------------------------------------------------------------------------- ++ * GLES2 Functions ++ */ ++ ++static const char *vertex_shader = " \ ++precision highp float; \ ++ \ ++uniform mat3 u_projection; \ ++uniform mat3 u_transform; \ ++attribute vec3 a_position; \ ++attribute vec2 a_texcoord; \ ++ \ ++varying vec2 v_texcoord; \ ++ \ ++void main() \ ++{ \ ++ gl_Position.xyz = u_transform * u_projection * a_position; \ ++ gl_Position.w = 1.0; \ ++ v_texcoord = a_texcoord; \ ++} \ ++"; ++ ++static const char *fragment_shader = " \ ++#extension GL_OES_EGL_image_external : require\n \ ++precision highp float; \ ++ \ ++uniform samplerExternalOES texture; \ ++varying vec2 v_texcoord; \ ++ \ ++void main() \ ++{ \ ++ gl_FragColor = texture2D(texture, v_texcoord); \ ++} \ ++"; ++ ++#define SHADER_POSITION_ATTR_SLOT 0 ++#define SHADER_TEX_COOR_ATTR_SLOT 1 ++ ++static void armsoc_repulsion_gles_log(GLenum source, GLenum type, GLuint id, ++ GLenum severity, GLsizei length, ++ const GLchar *message, const void *data) ++{ ++ switch (severity) { ++ case GL_DEBUG_SEVERITY_HIGH_KHR: ++ ERROR_LOG("GLES2: %s", message); ++ break; ++ case GL_DEBUG_SEVERITY_MEDIUM_KHR: ++ WARN_LOG("GLES2: %s", message); ++ break; ++ default: ++ INFO_LOG("GLES2: %s", message); ++ }; ++} ++ ++static const char* gles_error_str(GLenum err) ++{ ++ switch (err) { ++ case GL_NO_ERROR: return "no error"; ++ case GL_INVALID_ENUM: return "invalid enum"; ++ case GL_INVALID_VALUE: return "invalid value"; ++ case GL_INVALID_OPERATION: return "invalid operation"; ++ case GL_OUT_OF_MEMORY: return "out of memory"; ++ case GL_INVALID_FRAMEBUFFER_OPERATION: return "invalid fb operation"; ++ default: return "unknowm error"; ++ } ++}; ++ ++static int armsoc_repulsion_compile_shader(struct ARMSOCRepulsion *repulsion) ++{ ++ GLuint vs, fs; ++ GLint status, texture; ++ GLenum err; ++ ++ vs = glCreateShader(GL_VERTEX_SHADER); ++ if (!vs) { ++ err = glGetError(); ++ return err == GL_NO_ERROR ? -1 : err; ++ } ++ glShaderSource(vs, 1, &vertex_shader, NULL); ++ glCompileShader(vs); ++ glGetShaderiv(vs, GL_COMPILE_STATUS, &status); ++ if (status == GL_FALSE) { ++ GLint max_len = 1024; ++ GLchar err_log[1024]; ++ glGetShaderInfoLog(vs, max_len, &max_len, &err_log[0]); ++ ERROR_LOG("VS: %s", err_log); ++ err = glGetError(); ++ return err == GL_NO_ERROR ? -1 : err; ++ } ++ ++ fs = glCreateShader(GL_FRAGMENT_SHADER); ++ if (!fs) { ++ err = glGetError(); ++ return err == GL_NO_ERROR ? -1 : err; ++ } ++ glShaderSource(fs, 1, &fragment_shader, NULL); ++ glCompileShader(fs); ++ glGetShaderiv(fs, GL_COMPILE_STATUS, &status); ++ if (status == GL_FALSE) { ++ err = glGetError(); ++ return err == GL_NO_ERROR ? -1 : err; ++ } ++ ++ repulsion->gles.program = glCreateProgram(); ++ if (!repulsion->gles.program) { ++ err = glGetError(); ++ return err == GL_NO_ERROR ? -1 : err; ++ } ++ glAttachShader(repulsion->gles.program, vs); ++ glAttachShader(repulsion->gles.program, fs); ++ glBindAttribLocation(repulsion->gles.program, SHADER_POSITION_ATTR_SLOT, ++ "a_position"); ++ glBindAttribLocation(repulsion->gles.program, SHADER_TEX_COOR_ATTR_SLOT, ++ "a_texcoord"); ++ glLinkProgram(repulsion->gles.program); ++ glDetachShader(repulsion->gles.program, vs); ++ glDetachShader(repulsion->gles.program, fs); ++ glGetProgramiv(repulsion->gles.program, GL_LINK_STATUS, &status); ++ if (status == GL_FALSE) { ++ err = glGetError(); ++ return err == GL_NO_ERROR ? -1 : err; ++ } ++ glUseProgram(repulsion->gles.program); ++ glEnableVertexAttribArray(SHADER_POSITION_ATTR_SLOT); ++ glEnableVertexAttribArray(SHADER_TEX_COOR_ATTR_SLOT); ++ ++ repulsion->gles.proj_location = ++ glGetUniformLocation(repulsion->gles.program, "u_projection"); ++ repulsion->gles.xform_location = ++ glGetUniformLocation(repulsion->gles.program, "u_transform"); ++ ++ texture = glGetUniformLocation(repulsion->gles.program, "texture"); ++ glUniform1i(texture, 0); ++ glActiveTexture(GL_TEXTURE0); ++ ++ return GL_NO_ERROR; ++} ++ ++static int armsoc_repulsion_create_vbo(struct ARMSOCRepulsion *repulsion) ++{ ++ glGenBuffers(1, &repulsion->gles.vbo); ++ glBindBuffer(GL_ARRAY_BUFFER, repulsion->gles.vbo); ++ ++ return GL_NO_ERROR; ++} ++ ++static int armsoc_repulsion_create_ibo(struct ARMSOCRepulsion *repulsion) ++{ ++ static const GLushort indices[] = {0, 1, 2, 0, 2, 3}; ++ ++ glGenBuffers(1, &repulsion->gles.ibo); ++ glBindBuffer(GL_ELEMENT_ARRAY_BUFFER, repulsion->gles.ibo); ++ glBufferData(GL_ELEMENT_ARRAY_BUFFER, sizeof(indices), indices, ++ GL_STATIC_DRAW); ++ ++ return GL_NO_ERROR; ++} ++ ++static int armsoc_repulsion_create_texture(struct ARMSOCRepulsion *repulsion) ++{ ++ glGenTextures(1, &repulsion->gles.texture); ++ glBindTexture(GL_TEXTURE_EXTERNAL_OES, repulsion->gles.texture); ++ glTexParameteri(GL_TEXTURE_EXTERNAL_OES, GL_TEXTURE_MIN_FILTER, GL_LINEAR); ++ glTexParameteri(GL_TEXTURE_EXTERNAL_OES, GL_TEXTURE_MAG_FILTER, GL_LINEAR); ++ glTexParameteri(GL_TEXTURE_EXTERNAL_OES, GL_TEXTURE_WRAP_S, ++ GL_CLAMP_TO_EDGE); ++ glTexParameteri(GL_TEXTURE_EXTERNAL_OES, GL_TEXTURE_WRAP_T, ++ GL_CLAMP_TO_EDGE); ++ ++ return GL_NO_ERROR; ++} ++ ++static int armsoc_repulsion_init_gles(struct ARMSOCRepulsion *repulsion) ++{ ++ int rc; ++ ++ glEnable(GL_DEBUG_OUTPUT_KHR); ++ glDebugMessageCallbackKHR(armsoc_repulsion_gles_log, repulsion); ++ ++ rc = armsoc_repulsion_compile_shader(repulsion); ++ if (rc != GL_NO_ERROR) { ++ ERROR_LOG("Failed to compile shader: 0x%04x (%s)", ++ rc, gles_error_str(rc)); ++ return rc; ++ } ++ ++ rc = armsoc_repulsion_create_vbo(repulsion); ++ if (rc != GL_NO_ERROR) { ++ ERROR_LOG("Failed to create vertex buffer: 0x%04x (%s)", ++ rc, gles_error_str(rc)); ++ return rc; ++ } ++ ++ rc = armsoc_repulsion_create_ibo(repulsion); ++ if (rc != GL_NO_ERROR) { ++ ERROR_LOG("Failed to create index buffer: 0x%04x (%s)", ++ rc, gles_error_str(rc)); ++ return rc; ++ } ++ ++ rc = armsoc_repulsion_create_texture(repulsion); ++ if (rc != GL_NO_ERROR) { ++ ERROR_LOG("Failed to create texture: 0x%04x (%s)", ++ rc, gles_error_str(rc)); ++ return rc; ++ } ++ ++ return GL_NO_ERROR; ++} ++ ++static void armsoc_repulsion_release_texture(struct ARMSOCRepulsion *repulsion) ++{ ++ glDeleteTextures(1, &repulsion->gles.texture); ++} ++ ++static void armsoc_repulsion_release_ibo(struct ARMSOCRepulsion *repulsion) ++{ ++ glDeleteBuffers(1, &repulsion->gles.ibo); ++} ++ ++static void armsoc_repulsion_release_vbo(struct ARMSOCRepulsion *repulsion) ++{ ++ glDeleteBuffers(1, &repulsion->gles.vbo); ++} ++ ++static void armsoc_repulsion_release_shader(struct ARMSOCRepulsion *repulsion) ++{ ++ glDeleteProgram(repulsion->gles.program); ++} ++ ++static void armsoc_repulsion_release_gles(struct ARMSOCRepulsion *repulsion) ++{ ++ armsoc_repulsion_release_texture(repulsion); ++ armsoc_repulsion_release_ibo(repulsion); ++ armsoc_repulsion_release_vbo(repulsion); ++ armsoc_repulsion_release_shader(repulsion); ++} ++ ++/* ----------------------------------------------------------------------------- ++ * EGL Functions ++ */ ++ ++static const char* egl_error_str(EGLint err) ++{ ++ switch (err) { ++ case EGL_SUCCESS: return "no error"; ++ case EGL_NOT_INITIALIZED: return "not initialized"; ++ case EGL_BAD_ACCESS: return "bad access"; ++ case EGL_BAD_ALLOC: return "bad alloc"; ++ case EGL_BAD_CONFIG: return "bad config"; ++ case EGL_BAD_CONTEXT: return "bad context"; ++ case EGL_BAD_CURRENT_SURFACE: return "bad current surface"; ++ case EGL_BAD_DISPLAY: return "bad display"; ++ case EGL_BAD_MATCH: return "bad match"; ++ case EGL_BAD_NATIVE_PIXMAP: return "bad native pixmap"; ++ case EGL_BAD_NATIVE_WINDOW: return "bad native window"; ++ case EGL_BAD_PARAMETER: return "bad parameter"; ++ case EGL_BAD_SURFACE: return "bad surface"; ++ case EGL_CONTEXT_LOST: return "context lost"; ++ default: return "unknowm error"; ++ } ++}; ++ ++static int armsoc_repulsion_init_egl(struct ARMSOCRepulsion *repulsion) ++{ ++ static const EGLint config_attrs[] = { ++ EGL_RENDERABLE_TYPE, EGL_OPENGL_ES2_BIT, ++ EGL_CONFORMANT, EGL_OPENGL_ES2_BIT, ++ EGL_SURFACE_TYPE, EGL_PBUFFER_BIT, ++ EGL_DEPTH_SIZE, 8, ++ EGL_RED_SIZE, 8, ++ EGL_GREEN_SIZE, 8, ++ EGL_BLUE_SIZE, 8, ++ EGL_ALPHA_SIZE, 8, ++ EGL_NONE ++ }; ++ static const EGLint context_attrs[] = { ++ EGL_CONTEXT_CLIENT_VERSION, 2, ++ EGL_NONE ++ }; ++ EGLint count; ++ EGLConfig config; ++ ++ repulsion->egl.display = eglGetDisplay(EGL_DEFAULT_DISPLAY); ++ if (repulsion->egl.display == EGL_NO_DISPLAY) ++ return eglGetError(); ++ ++ if(!eglInitialize(repulsion->egl.display, NULL, NULL)) ++ return eglGetError(); ++ ++ if (!eglChooseConfig(repulsion->egl.display, config_attrs, &config, 1, ++ &count)) ++ return eglGetError(); ++ ++ if (!eglBindAPI(EGL_OPENGL_ES_API)) ++ return eglGetError(); ++ ++ repulsion->egl.context = eglCreateContext(repulsion->egl.display, config, ++ EGL_NO_CONTEXT, context_attrs); ++ if (repulsion->egl.context == EGL_NO_CONTEXT) ++ return eglGetError(); ++ ++ repulsion->egl.surface = eglCreatePbufferSurface(repulsion->egl.display, ++ config, NULL); ++ if (repulsion->egl.surface == EGL_NO_SURFACE) ++ return eglGetError(); ++ ++ if (!eglMakeCurrent(repulsion->egl.display, repulsion->egl.surface, ++ repulsion->egl.surface, repulsion->egl.context)) ++ return eglGetError(); ++ ++ if (!eglSwapInterval(repulsion->egl.display, 0)) ++ return eglGetError(); ++ ++ return EGL_SUCCESS; ++} ++ ++static void armsoc_repulsion_release_egl(struct ARMSOCRepulsion *repulsion) ++{ ++ if (repulsion->egl.surface != EGL_NO_SURFACE) ++ eglDestroySurface(repulsion->egl.display, repulsion->egl.surface); ++ ++ if (repulsion->egl.context) ++ eglDestroyContext(repulsion->egl.display, repulsion->egl.context); ++ ++ if (repulsion->egl.display) ++ eglTerminate(repulsion->egl.display); ++ ++ repulsion->egl.display = EGL_NO_DISPLAY; ++} ++ ++static EGLint armsoc_repulsion_guess_bo_format(struct armsoc_bo *bo) ++{ ++ switch(armsoc_bo_bpp(bo)) { ++ case 16: ++ return DRM_FORMAT_RGB565; ++ case 32: ++ return DRM_FORMAT_ARGB8888; ++ default: ++ return 0; ++ } ++} ++ ++static EGLImageKHR ++armsoc_repulsion_create_egl_image(struct ARMSOCRepulsion *repulsion, ++ struct armsoc_bo *bo) ++{ ++ const EGLint attributes[] = { ++ EGL_WIDTH, armsoc_bo_width(bo), ++ EGL_HEIGHT, armsoc_bo_height(bo), ++ EGL_LINUX_DRM_FOURCC_EXT, armsoc_repulsion_guess_bo_format(bo), ++ EGL_DMA_BUF_PLANE0_FD_EXT, armsoc_bo_get_dmabuf(bo), ++ EGL_DMA_BUF_PLANE0_OFFSET_EXT, 0, ++ EGL_DMA_BUF_PLANE0_PITCH_EXT, armsoc_bo_pitch(bo), ++ EGL_NONE ++ }; ++ ++ return eglCreateImageKHR(repulsion->egl.display, EGL_NO_CONTEXT, ++ EGL_LINUX_DMA_BUF_EXT, NULL, attributes); ++} ++ ++static void ++armsoc_repulsion_destroy_egl_image(struct ARMSOCRepulsion *repulsion, ++ EGLImageKHR img) ++{ ++ eglDestroyImageKHR(repulsion->egl.display, img); ++} ++ ++/* ----------------------------------------------------------------------------- ++ * Repulsion API ++ */ ++ ++bool armsoc_repulsion_composite(struct ARMSOCRepulsion *repulsion, ++ struct armsoc_bo *src, ++ struct armsoc_bo *dest, ++ float xform_matrix[3][3]) ++{ ++ GLuint tex, fbo; ++ GLenum status; ++ EGLImageKHR dest_img, src_img; ++ GLsizei width, height; ++ static GLfloat proj_matrix[3][3] = { ++ { 2.f, 0.f, 0.f }, ++ { 0.f, 2.f, 0.f }, ++ { -1.f, -1.f, 0.f }, ++ }; ++ ++ if (!repulsion || !src || !dest) ++ return false; ++ ++ dest_img = armsoc_repulsion_create_egl_image(repulsion, dest); ++ if (dest_img == EGL_NO_IMAGE_KHR) { ++ EGLint err = eglGetError(); ++ ERROR_LOG("Failed to create dest EGL image: 0x%04x (%s)", ++ err, egl_error_str(err)); ++ return false; ++ } ++ src_img = armsoc_repulsion_create_egl_image(repulsion, src); ++ if (src_img == EGL_NO_IMAGE_KHR) { ++ EGLint err = eglGetError(); ++ ERROR_LOG("Failed to create src EGL image: 0x%04x (%s)", ++ err, egl_error_str(err)); ++ armsoc_repulsion_destroy_egl_image(repulsion, dest_img); ++ return false; ++ } ++ ++ glGenTextures(1, &tex); ++ glBindTexture(GL_TEXTURE_2D, tex); ++ glEGLImageTargetTexture2DOES(GL_TEXTURE_2D, dest_img); ++ ++ glGenFramebuffers(1, &fbo); ++ glBindFramebuffer(GL_FRAMEBUFFER, fbo); ++ ++ glFramebufferTexture2D(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0, ++ GL_TEXTURE_2D, tex, 0); ++ ++ status = glCheckFramebufferStatus(GL_FRAMEBUFFER); ++ if (status != GL_FRAMEBUFFER_COMPLETE) { ++ ERROR_LOG("Failed to complete framebuffer"); ++ glDeleteFramebuffers(1, &fbo); ++ glDeleteTextures(1, &tex); ++ armsoc_repulsion_destroy_egl_image(repulsion, dest_img); ++ armsoc_repulsion_destroy_egl_image(repulsion, src_img); ++ return false; ++ } ++ ++ width = armsoc_bo_width(dest); ++ height = armsoc_bo_height(dest); ++ proj_matrix[0][0] = 2.f / width; ++ proj_matrix[1][1] = 2.f / height; ++ ++ glUniformMatrix3fv(repulsion->gles.proj_location, 1, false, ++ &proj_matrix[0][0]); ++ ++ glUniformMatrix3fv(repulsion->gles.xform_location, 1, false, ++ &xform_matrix[0][0]); ++ ++ glViewport(0, 0, width, height); ++ ++ glClearColor(0.f, 0.f, 1.f, 1.f); ++ glClear(GL_COLOR_BUFFER_BIT); ++ ++ glEGLImageTargetTexture2DOES(GL_TEXTURE_EXTERNAL_OES, src_img); ++ ++ repulsion->gles.vertices[0].pos[0] = 0.f; ++ repulsion->gles.vertices[0].pos[1] = height; ++ repulsion->gles.vertices[0].pos[2] = 1.f; ++ repulsion->gles.vertices[0].uv[0] = 0.f; ++ repulsion->gles.vertices[0].uv[1] = 1.f; ++ ++ repulsion->gles.vertices[1].pos[0] = 0.f; ++ repulsion->gles.vertices[1].pos[1] = 0.f; ++ repulsion->gles.vertices[1].pos[2] = 1.f; ++ repulsion->gles.vertices[1].uv[0] = 0.f; ++ repulsion->gles.vertices[1].uv[1] = 0.f; ++ ++ repulsion->gles.vertices[2].pos[0] = width; ++ repulsion->gles.vertices[2].pos[1] = 0.f; ++ repulsion->gles.vertices[2].pos[2] = 1.f; ++ repulsion->gles.vertices[2].uv[0] = 1.f; ++ repulsion->gles.vertices[2].uv[1] = 0.f; ++ ++ repulsion->gles.vertices[3].pos[0] = width; ++ repulsion->gles.vertices[3].pos[1] = height; ++ repulsion->gles.vertices[3].pos[2] = 1.f; ++ repulsion->gles.vertices[3].uv[0] = 1.f; ++ repulsion->gles.vertices[3].uv[1] = 1.f; ++ ++ glBufferData(GL_ARRAY_BUFFER, sizeof(repulsion->gles.vertices), ++ repulsion->gles.vertices, GL_STATIC_DRAW); ++ ++ glVertexAttribPointer(SHADER_POSITION_ATTR_SLOT, 3, GL_FLOAT, GL_FALSE, ++ sizeof(*repulsion->gles.vertices), (const void *)(0)); ++ glVertexAttribPointer(SHADER_TEX_COOR_ATTR_SLOT, 2, GL_FLOAT, GL_FALSE, ++ sizeof(*repulsion->gles.vertices), ++ (const void *)(sizeof(repulsion->gles.vertices->pos))); ++ ++ glDrawElements(GL_TRIANGLES, 6, GL_UNSIGNED_SHORT, 0); ++ ++ glFinish(); ++ ++ glBindFramebuffer(GL_FRAMEBUFFER, 0); ++ glDeleteFramebuffers(1, &fbo); ++ glDeleteTextures(1, &tex); ++ ++ armsoc_repulsion_destroy_egl_image(repulsion, src_img); ++ armsoc_repulsion_destroy_egl_image(repulsion, dest_img); ++ ++ return true; ++} ++ ++struct ARMSOCRepulsion *armsoc_repulsion_init(void) ++{ ++ int rc; ++ struct ARMSOCRepulsion *repulsion = calloc(1, sizeof(*repulsion)); ++ if (!repulsion) { ++ ERROR_LOG("Out of memory"); ++ return NULL; ++ } ++ ++ rc = armsoc_repulsion_init_egl(repulsion); ++ if (rc != EGL_SUCCESS) { ++ ERROR_LOG("Failed to initialize EGL: 0x%04x (%s)", ++ rc, egl_error_str(rc)); ++ armsoc_repulsion_release(repulsion); ++ return NULL; ++ } ++ ++ rc = armsoc_repulsion_init_gles(repulsion); ++ if (rc != GL_NO_ERROR) { ++ ERROR_LOG("Failed to initialize GLES: 0x%04x (%s)", ++ rc, gles_error_str(rc)); ++ armsoc_repulsion_release(repulsion); ++ return NULL; ++ } ++ ++ INFO_LOG("Repulsion initialized"); ++ ++ return repulsion; ++} ++ ++void armsoc_repulsion_release(struct ARMSOCRepulsion *repulsion) ++{ ++ if (!repulsion) ++ return; ++ armsoc_repulsion_release_gles(repulsion); ++ armsoc_repulsion_release_egl(repulsion); ++ free(repulsion); ++} +diff --git a/src/armsoc_repulsion.h b/src/armsoc_repulsion.h +new file mode 100644 +index 0000000..b5e57df +--- /dev/null ++++ b/src/armsoc_repulsion.h +@@ -0,0 +1,67 @@ ++/* ++ * Copyright (C) 2024 AMD, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the next ++ * paragraph) shall be included in all copies or substantial portions of the ++ * Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE ++ * SOFTWARE. ++ * ++ * Author: Anatoliy Klymenko ++ * ++ */ ++ ++#ifndef ARMSOC_REPULSION_H_ ++#define ARMSOC_REPULSION_H_ ++ ++#include ++#include "armsoc_dumb.h" ++ ++struct ARMSOCRepulsion; ++ ++/** ++ * Initialize armsoc repulsion compositor. ++ * ++ * Return: pointer to new ARMSOCRepulsion object on success, NULL otherwise. ++ */ ++struct ARMSOCRepulsion *armsoc_repulsion_init(void); ++ ++/** ++ * Release armsoc repulsion compositor and free all resources. ++ * @repulsion: pointer to previously allocated ARMSOCRepulsion object. ++ */ ++void armsoc_repulsion_release(struct ARMSOCRepulsion *repulsion); ++ ++/** ++ * Perform 2 image composition. ++ * @repulsion: pointer to ARMSOCRepulsion object. ++ * @src: source buffer object. ++ * @dest: destination buffer object. ++ * @xform_matrix: transformation matrix to apply to source image before copying ++ * it into destination. ++ * ++ * This function performs GPU accelerated copy of @src buffer into @dest buffer ++ * while applying linear transformation. ++ * ++ * Return: pointer to new ARMSOCRepulsion object on success, NULL otherwise. ++ */ ++bool armsoc_repulsion_composite(struct ARMSOCRepulsion *repulsion, ++ struct armsoc_bo *src, ++ struct armsoc_bo *dest, ++ float xform_matrix[3][3]); ++ ++ ++#endif // ARMSOC_REPULSION_H_ +-- +2.25.1 + diff --git a/meta-xilinx-core/dynamic-layers/openembedded-layer/recipes-graphics/xorg-driver/xf86-video-armsoc/0001-xf86-video-armosc-Option-to-control-acceleration.patch b/meta-xilinx-core/dynamic-layers/openembedded-layer/recipes-graphics/xorg-driver/xf86-video-armsoc/0001-xf86-video-armosc-Option-to-control-acceleration.patch new file mode 100644 index 000000000..9cc186deb --- /dev/null +++ b/meta-xilinx-core/dynamic-layers/openembedded-layer/recipes-graphics/xorg-driver/xf86-video-armsoc/0001-xf86-video-armosc-Option-to-control-acceleration.patch @@ -0,0 +1,110 @@ +From 83047c38b0a9e8cc535eba580ca28497f1bee544 Mon Sep 17 00:00:00 2001 +From: Anatoliy Klymenko +Date: Fri, 19 Jul 2024 14:10:22 -0700 +Subject: [PATCH] xf86-video-armosc: Option to control acceleration + +Add xorg config option to enable / disable GPU accelerated picture +composition. Enable acceleration by default. + +Signed-off-by: Anatoliy Klymenko +--- + man/armsoc.man | 6 ++++++ + src/armsoc_driver.c | 20 +++++++++++++++----- + src/armsoc_driver.h | 3 +++ + 3 files changed, 24 insertions(+), 5 deletions(-) + +diff --git a/man/armsoc.man b/man/armsoc.man +index d85c2fa..cdeb19e 100644 +--- a/man/armsoc.man ++++ b/man/armsoc.man +@@ -69,6 +69,12 @@ Default: NULL + Use the umplock module for cross-process access synchronization. It should be only enabled for Mali400 + .IP + Default: Umplock is Disabled ++.TP ++.BI "Option \*qAccelerateComposition\*q \*q" boolean \*q ++Accelerate picture composition on GPU. ++.IP ++Default: Accelerated composition is Enabled ++ + + .SH DRM DEVICE SELECTION + +diff --git a/src/armsoc_driver.c b/src/armsoc_driver.c +index f5b8f21..15cc620 100644 +--- a/src/armsoc_driver.c ++++ b/src/armsoc_driver.c +@@ -110,6 +110,7 @@ enum { + OPTION_DRI_NUM_BUF, + OPTION_INIT_FROM_FBDEV, + OPTION_UMP_LOCK, ++ OPTION_ACCELERATE_COMPOSITION, + }; + + /** Supported options. */ +@@ -122,6 +123,8 @@ static const OptionInfoRec ARMSOCOptions[] = { + { OPTION_DRI_NUM_BUF, "DRI2MaxBuffers", OPTV_INTEGER, {-1}, FALSE }, + { OPTION_INIT_FROM_FBDEV, "InitFromFBDev", OPTV_STRING, {0}, FALSE }, + { OPTION_UMP_LOCK, "UMP_LOCK", OPTV_BOOLEAN, {0}, FALSE }, ++ { OPTION_ACCELERATE_COMPOSITION, "AccelerateComposition", OPTV_BOOLEAN, ++ {0}, FALSE }, + { -1, NULL, OPTV_NONE, {0}, FALSE } + }; + +@@ -871,6 +874,10 @@ ARMSOCPreInit(ScrnInfoPtr pScrn, int flags) + armsocDebug = xf86ReturnOptValBool(pARMSOC->pOptionInfo, + OPTION_DEBUG, FALSE); + ++ /* Should we enable GPU accelerated picture composition? */ ++ pARMSOC->enable_repulsion = xf86ReturnOptValBool(pARMSOC->pOptionInfo, ++ OPTION_ACCELERATE_COMPOSITION, TRUE); ++ + if (!xf86GetOptValInteger(pARMSOC->pOptionInfo, OPTION_DRI_NUM_BUF, + &driNumBufs)) { + /* Default to double buffering */ +@@ -1119,7 +1126,6 @@ ARMSOCScreenInit(SCREEN_INIT_ARGS_DECL) + struct ARMSOCRec *pARMSOC = ARMSOCPTR(pScrn); + VisualPtr visual; + xf86CrtcConfigPtr xf86_config; +- PictureScreenPtr ps; + int j; + const char *fbdev; + int depth; +@@ -1308,12 +1314,16 @@ ARMSOCScreenInit(SCREEN_INIT_ARGS_DECL) + pARMSOC->lockFD = -1; + } + +- pARMSOC->repulsion = armsoc_repulsion_init(); ++ if (pARMSOC->enable_repulsion) { ++ PictureScreenPtr ps; ++ ++ pARMSOC->repulsion = armsoc_repulsion_init(); + +- ps = GetPictureScreen(pScreen); +- pARMSOC->composite_proc = ps->Composite; ++ ps = GetPictureScreen(pScreen); ++ pARMSOC->composite_proc = ps->Composite; + +- ps->Composite = ARMSOCComposite; ++ ps->Composite = ARMSOCComposite; ++ } + + TRACE_EXIT(); + return TRUE; +diff --git a/src/armsoc_driver.h b/src/armsoc_driver.h +index 20b0f80..27e978e 100644 +--- a/src/armsoc_driver.h ++++ b/src/armsoc_driver.h +@@ -185,6 +185,9 @@ struct ARMSOCRec { + * driNumBufs if early display enabled, otherwise driNumBufs-1 */ + unsigned int swap_chain_size; + ++ /* Enable GPU accelerated picture compositor? */ ++ Bool enable_repulsion; ++ + /* GPU accelerated picture compositor, AKA Repulsion */ + struct ARMSOCRepulsion *repulsion; + +-- +2.25.1 + diff --git a/meta-xilinx-core/dynamic-layers/openembedded-layer/recipes-graphics/xorg-driver/xf86-video-armsoc_%.bbappend b/meta-xilinx-core/dynamic-layers/openembedded-layer/recipes-graphics/xorg-driver/xf86-video-armsoc_%.bbappend index 82736cc8c..9f8af267a 100644 --- a/meta-xilinx-core/dynamic-layers/openembedded-layer/recipes-graphics/xorg-driver/xf86-video-armsoc_%.bbappend +++ b/meta-xilinx-core/dynamic-layers/openembedded-layer/recipes-graphics/xorg-driver/xf86-video-armsoc_%.bbappend @@ -3,4 +3,11 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/xf86-video-armsoc:" SRC_URI:append = " file://0001-src-drmmode_xilinx-Add-the-dumb-gem-support-for-Xili.patch \ file://0001-armsoc_driver.c-Bypass-the-exa-layer-to-free-the-roo.patch \ file://0001-xf86-video-armsoc-Add-shadow-buffer-hooks.patch \ - " + " +EXTRA_MALI400_SRC = " file://0001-xf86-video-armosc-Accelerate-picture-composition.patch \ + file://0001-xf86-video-armosc-Option-to-control-acceleration.patch \ + " +SRC_URI:append = "${@bb.utils.contains('MACHINE_FEATURES', 'mali400', '${EXTRA_MALI400_SRC}', '', d)}" + +DEPENDS:append = "${@bb.utils.contains('MACHINE_FEATURES', 'mali400', ' libmali-xlnx', '', d)}" + diff --git a/meta-xilinx-core/dynamic-layers/virtualization-layer/recipes-kernel/lopper/lopper_git.bbappend b/meta-xilinx-core/dynamic-layers/virtualization-layer/recipes-kernel/lopper/lopper_git.bbappend index 8a2b7a462..6de745a5a 100644 --- a/meta-xilinx-core/dynamic-layers/virtualization-layer/recipes-kernel/lopper/lopper_git.bbappend +++ b/meta-xilinx-core/dynamic-layers/virtualization-layer/recipes-kernel/lopper/lopper_git.bbappend @@ -1,9 +1,9 @@ -SRC_URI = "git://github.com/devicetree-org/lopper.git;branch=v0.2024.x;protocol=https" -SRCREV = "4fb08575157d7712e0cd50e9e9c07620bc9f8b4b" +SRC_URI = "git://github.com/devicetree-org/lopper.git;branch=master;protocol=https" +SRCREV = "c0facd087263a24a83f7fad917884348db03175d" FILESEXTRAPATHS:prepend := "${THISDIR}/lopper:" -BASEVERSION = "1.1.0" +BASEVERSION = "1.2.0" RDEPENDS:${PN} += " \ python3-ruamel-yaml \ diff --git a/meta-xilinx-core/gen-machine-conf b/meta-xilinx-core/gen-machine-conf index e3968c5d6..3e691e28b 160000 --- a/meta-xilinx-core/gen-machine-conf +++ b/meta-xilinx-core/gen-machine-conf @@ -1 +1 @@ -Subproject commit e3968c5d6b1d02b2c1fa51de838f0757bca1c16b +Subproject commit 3e691e28bf47876fb7e0c4be3c62be6b9d46bf87 diff --git a/meta-xilinx-core/lib/devtool/boot-jtag.py b/meta-xilinx-core/lib/devtool/boot-jtag.py index f9c298e89..2d8a7d8f5 100644 --- a/meta-xilinx-core/lib/devtool/boot-jtag.py +++ b/meta-xilinx-core/lib/devtool/boot-jtag.py @@ -36,6 +36,7 @@ def bootjtag(args, config, basepath, workspace): rootfs_load_addr = rd.getVar('RAMDISK_IMAGE_ADDRESS') machine_features = rd.getVar('MACHINE_FEATURES') boot_mode = rd.getVar('BOOTMODE') + image_name_suffix = rd.getVar('IMAGE_NAME_SUFFIX') finally: tinfoil.shutdown() @@ -96,7 +97,7 @@ def bootjtag(args, config, basepath, workspace): data['kernel'] = os.path.join(deploy_dir, kernel_img_name) if not args.norootfs: - data['rfs'] = os.path.join(deploy_dir, args.image + '-' + machine + '.cpio.gz.u-boot') + data['rfs'] = os.path.join(deploy_dir, args.image + '-' + machine + image_name_suffix + '.cpio.gz.u-boot') # Check if all the required boot images exists for key in data: diff --git a/meta-xilinx-core/recipes-apps/image-update/image-update_1.1.bb b/meta-xilinx-core/recipes-apps/image-update/image-update_1.3.bb similarity index 80% rename from meta-xilinx-core/recipes-apps/image-update/image-update_1.1.bb rename to meta-xilinx-core/recipes-apps/image-update/image-update_1.3.bb index df3b11885..828a3ca1a 100644 --- a/meta-xilinx-core/recipes-apps/image-update/image-update_1.1.bb +++ b/meta-xilinx-core/recipes-apps/image-update/image-update_1.3.bb @@ -4,15 +4,15 @@ SUMMARY = "Image update is used to update alternate image on compatible firmware Usage: image_update " LICENSE = "MIT" -LIC_FILES_CHKSUM = "file://${UNPACKDIR}/git/LICENSES/MIT;md5=2ac09a7a37dd6ee0ba23ce497d57d09b" +LIC_FILES_CHKSUM = "file://${WORKDIR}/git/LICENSES/MIT;md5=2ac09a7a37dd6ee0ba23ce497d57d09b" -BRANCH = "xlnx_rel_v2024.1" +BRANCH = "master" SRC_URI = "git://github.com/Xilinx/linux-image_update.git;branch=${BRANCH};protocol=https" -SRCREV = "a68308f329578d3585fd335071a9184aa7f46d2e" +SRCREV = "1bd7d7405b484d808176c6e711691a846c18b4f0" RDEPENDS:${PN} += "freeipmi" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" COMPATIBLE_MACHINE = "^$" COMPATIBLE_MACHINE:zynqmp = "zynqmp" diff --git a/meta-xilinx-core/recipes-apps/raft/python-async.inc b/meta-xilinx-core/recipes-apps/raft/python-async.inc new file mode 100644 index 000000000..fde864601 --- /dev/null +++ b/meta-xilinx-core/recipes-apps/raft/python-async.inc @@ -0,0 +1,14 @@ +SUMMARY = "Python framework to process interdependent tasks in a pool of workers" +HOMEPAGE = "http://github.com/gitpython-developers/async" +SECTION = "devel/python" +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://PKG-INFO;beginline=8;endline=8;md5=88df8e78b9edfd744953862179f2d14e" + +inherit pypi + +SRC_URI[md5sum] = "9b06b5997de2154f3bc0273f80bcef6b" +SRC_URI[sha256sum] = "ac6894d876e45878faae493b0cf61d0e28ec417334448ac0a6ea2229d8343051" + +RDEPENDS:${PN} += "${PYTHON_PN}-threading" + +BBCLASSEXTEND = "native nativesdk" diff --git a/meta-xilinx-core/recipes-apps/raft/python3-async_0.6.2.bb b/meta-xilinx-core/recipes-apps/raft/python3-async_0.6.2.bb new file mode 100644 index 000000000..0da5fdecd --- /dev/null +++ b/meta-xilinx-core/recipes-apps/raft/python3-async_0.6.2.bb @@ -0,0 +1,2 @@ +inherit setuptools3 +require python-async.inc diff --git a/meta-xilinx-core/recipes-apps/raft/raft_2024.1.bb b/meta-xilinx-core/recipes-apps/raft/raft_2024.1.bb new file mode 100644 index 000000000..a287d8cea --- /dev/null +++ b/meta-xilinx-core/recipes-apps/raft/raft_2024.1.bb @@ -0,0 +1,65 @@ +SUMMARY = "RAFT python application" +LICENSE = "MIT & BSD-3-Clause" +LIC_FILES_CHKSUM = " \ + file://${WORKDIR}/git/LICENSE;md5=cc21c526211d34984839aa67dd16f172 \ + file://${WORKDIR}/git/docs/LICENSE;md5=d8f0ffdbc8d019bc821a5a07bdca1406 \ +" +BRANCH = "2024.1" +SRC_URI = "git://github.com/Xilinx/RAFT;protocol=https;branch=${BRANCH}" +SRCREV = "87ea8f4c5ac52fcbc465f41e681fc77aaee9a285" + +inherit update-rc.d systemd + +S = "${WORKDIR}/git" +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE:zcu208-zynqmp = "${MACHINE}" +COMPATIBLE_MACHINE:zcu216-zynqmp = "${MACHINE}" +COMPATIBLE_MACHINE:system-controller = "${MACHINE}" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +INITSCRIPT_NAME = "raft-startup" +INITSCRIPT_PARAMS = "start 99 S ." + +SYSTEMD_PACKAGES = "${PN}" +SYSTEMD_SERVICE:${PN} = "raft-startup.service" +SYSTEMD_AUTO_ENABLE:${PN}="enable" + +DEPENDS += "libmetal" + +RDEPENDS:${PN} += "\ + python3 \ + python3-pyro4 \ + python3-cffi \ + python3-serpent \ + bash \ + " + +PACKAGECONFIG[raftnotebooks] = "enabled,disabled,,packagegroup-xilinx-jupyter" +PACKAGECONFIG[raftstartup] = "enabled,disabled,,librfdc librfclk libmetal" +PACKAGECONFIG[raftstartupsc] = "enabled,disabled,,python3-psutil python3-periphery" + +do_install() { + if ${@bb.utils.contains('DISTRO_FEATURES','sysvinit','true','false',d)}; then + SYSCONFDIR=${D}${sysconfdir}/init.d/ + else + SYSCONFDIR='' + fi + oe_runmake install DESTDIR=${D}\ + NOTEBOOKS=${@bb.utils.contains('PACKAGECONFIG','raftnotebooks','enabled','', d)}\ + STARTUPSC=${@bb.utils.contains('PACKAGECONFIG','raftstartupsc','enabled','',d)}\ + STARTUP=${@bb.utils.contains('PACKAGECONFIG','raftstartup','enabled','',d)}\ + BINDIR=${D}${bindir}\ + SYSTEM_UNIT_DIR=${D}${systemd_system_unitdir}\ + SYSCONF_DIR=${SYSCONFDIR} +} + +PACKAGECONFIG:append:zcu208-zynqmp = "raftnotebooks raftstartup" +PACKAGECONFIG:append:zcu216-zynqmp = "raftnotebooks raftstartup" +PACKAGECONFIG:append:system-controller = "raftstartupsc" + +FILES:${PN} += " \ + ${datadir}/raft/* \ + ${datadir}/notebooks \ + ${@bb.utils.contains('DISTRO_FEATURES','sysvinit','${sysconfdir}/*', '', d)} \ + " diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.3.bb b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.3.bb index 0b3effe2b..e726ac5be 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.3.bb +++ b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.3.bb @@ -6,7 +6,7 @@ require aie-rt-2022.inc SECTION = "libs" AIEDIR ?= "${S}/driver" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" I = "${AIEDIR}/include" inherit features_check diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.4.bb b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.4.bb index 88d4995fd..92f44a34b 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.4.bb +++ b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.4.bb @@ -6,7 +6,7 @@ require aie-rt-2023.inc SECTION = "libs" AIEDIR ?= "${S}/driver" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" I = "${AIEDIR}/include" inherit features_check diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.5.bb b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.5.bb index 0710a2bb3..6befcffa3 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.5.bb +++ b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.5.bb @@ -6,7 +6,7 @@ require aie-rt-2024.inc SECTION = "libs" AIEDIR ?= "${S}/driver" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" I = "${AIEDIR}/include" inherit features_check diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.6.bb b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.6.bb new file mode 100644 index 000000000..a99f296a1 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.6.bb @@ -0,0 +1,40 @@ +SUMMARY = "Xilinx AI Engine runtime" +DESCRIPTION = "This library provides APIs for the runtime support of the Xilinx AI Engine IP" + +require aie-rt-2024.2.inc + +SECTION = "libs" + +AIEDIR ?= "${S}/driver" +S = "${WORKDIR}/git" +I = "${AIEDIR}/include" + +IOBACKENDS ?= "Linux" + +DEPENDS = "${@bb.utils.contains('IOBACKENDS', 'metal', 'libmetal', '', d)}" +RDEPENDS:${PN} = "${@bb.utils.contains('IOBACKENDS', 'metal', 'libmetal', '', d)}" + +PROVIDES = "libxaiengine" +RPROVIDES:${PN} = "libxaiengine" + +# The makefile isn't ready for parallel execution at the moment +PARALLEL_MAKE = "-j 1" + +CFLAGS += "-Wall -Wextra" +CFLAGS += "${@bb.utils.contains('IOBACKENDS', 'Linux', ' -D__AIELINUX__', '', d)}" +CFLAGS += "${@bb.utils.contains('IOBACKENDS', 'metal', ' -D__AIEMETAL__', '', d)}" +EXTRA_OEMAKE = "-C ${AIEDIR}/src -f Makefile.Linux CFLAGS='${CFLAGS}'" + + +do_compile(){ + oe_runmake +} + +do_install(){ + install -d ${D}${includedir} + install ${I}/*.h ${D}${includedir}/ + install -d ${D}${includedir}/xaiengine + install ${I}/xaiengine/*.h ${D}${includedir}/xaiengine/ + install -d ${D}${libdir} + cp -dr ${AIEDIR}/src/*.so* ${D}${libdir} +} diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt-2024.2.inc b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt-2024.2.inc new file mode 100644 index 000000000..9ccc76212 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt-2024.2.inc @@ -0,0 +1,11 @@ +SECTION = "libs" + +REPO ?= "git://github.com/Xilinx/aie-rt.git;protocol=https" + +BRANCH ?= "xlnx_rel_v2024.2" +SRCREV ?= "8845d962e5b30b576c87dcf6635fb84a90ef1e36" + +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM ?= "file://license.txt;md5=04a153cae61a8a606fc79dff49c2c897" + +SRC_URI = "${REPO};branch=${BRANCH}" diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.4.bb b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.4.bb index 73cbfdd67..5b741f9a2 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.4.bb +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.4.bb @@ -6,7 +6,7 @@ require aie-rt-2022.inc SECTION = "devel" XAIEFAL_DIR ?= "fal" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit features_check diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.5.bb b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.5.bb index ab65f319b..8b5c43349 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.5.bb +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.5.bb @@ -6,7 +6,7 @@ require aie-rt-2023.inc SECTION = "devel" XAIEFAL_DIR ?= "fal" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit features_check diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.6.bb b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.6.bb index 11c88d340..f8c9482b0 100644 --- a/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.6.bb +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.6.bb @@ -6,7 +6,7 @@ require aie-rt-2024.inc SECTION = "devel" XAIEFAL_DIR ?= "fal" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit features_check diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.7.bb b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.7.bb new file mode 100644 index 000000000..2e60941b3 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.7.bb @@ -0,0 +1,27 @@ +SUMMARY = "Xilinx AI Engine FAL(Functional Abstraction Layer)" +DESCRIPTION = "AIE FAL provides functional abstraction APIs for runtime support of Xilinx AI Engine IP" + +require aie-rt-2024.2.inc + +SECTION = "devel" + +XAIEFAL_DIR ?= "fal" +S = "${WORKDIR}/git" + +IOBACKENDS ?= "Linux" + +PROVIDES = "aiefal" +ALLOW_EMPTY:${PN} = "1" + +inherit pkgconfig cmake + +DEPENDS = "libxaiengine" + +OECMAKE_SOURCEPATH = "${S}/${XAIEFAL_DIR}" + +EXTRA_OECMAKE = "-DWITH_TESTS=OFF -DFAL_LINUX=ON " +EXTRA_OECMAKE:append = "${@'-DWITH_EXAMPLES=ON' if d.getVar('WITH_EXAMPLES') == 'y' else '-DWITH_EXAMPLES=OFF'}" + +FILES:${PN}-demos = " \ + ${bindir}/* \ +" diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc index e6d4f1643..485d3b173 100644 --- a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc +++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc @@ -9,8 +9,8 @@ inherit deploy DEPENDS += "u-boot-mkimage-native" -S = "${UNPACKDIR}/git" -B = "${UNPACKDIR}/build" +S = "${WORKDIR}/git" +B = "${WORKDIR}/build" SYSROOT_DIRS += "/boot" @@ -75,9 +75,6 @@ EXTRA_OEMAKE:append:versal = "${@' VERSAL_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.get EXTRA_OEMAKE:append:versal-net = "${@' VERSAL_NET_ATF_MEM_BASE=${ATF_MEM_BASE}' if d.getVar('ATF_MEM_BASE', True) != '' else ''}" EXTRA_OEMAKE:append:versal-net = "${@' VERSAL_NET_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.getVar('ATF_MEM_SIZE', True) != '' else ''}" -ATF_PROVENCORE = "SPD=pncd SPD_PNCD_NS_IRQ=51 ZYNQMP_BL32_MEM_BASE=0x70000000 ZYNQMP_BL32_MEM_SIZE=0x0FF00000" -EXTRA_OEMAKE:append = "${@bb.utils.contains('MACHINE_FEATURES', 'provencore', ' ${ATF_PROVENCORE}', '', d)}" - TFA_BL33_LOAD ?= "" EXTRA_OEMAKE:append = "${@' PRELOADED_BL33_BASE=${TFA_BL33_LOAD}' if d.getVar('TFA_BL33_LOAD', True) != '' else ''}" diff --git a/meta-xilinx-core/recipes-bsp/base-pdi/base-pdi_1.0.bb b/meta-xilinx-core/recipes-bsp/base-pdi/base-pdi_1.0.bb index ba4d2964d..9fd9c34a1 100644 --- a/meta-xilinx-core/recipes-bsp/base-pdi/base-pdi_1.0.bb +++ b/meta-xilinx-core/recipes-bsp/base-pdi/base-pdi_1.0.bb @@ -4,6 +4,8 @@ LICENSE = "CLOSED" PROVIDES = "virtual/base-pdi" +INHIBIT_DEFAULT_DEPS = "1" + COMPATIBLE_MACHINE = "^$" COMPATIBLE_MACHINE:microblaze = ".*" COMPATIBLE_MACHINE:versal = ".*" @@ -16,8 +18,6 @@ do_compile[noexec] = "1" PDI_PATH ?= "" SRC_URI += "${@['file://'+d.getVar('PDI_PATH'),''][d.getVar('PDI_PATH') == '']}" -S = "${UNPACKDIR}" - python() { if d.getVar('PDI_SKIP_CHECK') != "1" and not d.getVar('PDI_PATH'): raise bb.parse.SkipRecipe("PDI_PATH is not configured with the base design pdi") @@ -27,9 +27,9 @@ python() { #will need to bbappend to this in meta-xilinx-tools to use xsct to extract pdi from xsa and install do_install() { - if [ -f ${UNPACKDIR}/${PDI_PATH} ];then + if [ -f ${WORKDIR}/${PDI_PATH} ];then install -d ${D}/boot - install -m 0644 ${UNPACKDIR}/${PDI_PATH} ${D}/boot/base-design.pdi + install -m 0644 ${WORKDIR}/${PDI_PATH} ${D}/boot/base-design.pdi else bbfatal "No base pdi supplied" fi diff --git a/meta-xilinx-core/recipes-bsp/bitstream/bitstream.bb b/meta-xilinx-core/recipes-bsp/bitstream/bitstream.bb deleted file mode 100644 index f61761f4d..000000000 --- a/meta-xilinx-core/recipes-bsp/bitstream/bitstream.bb +++ /dev/null @@ -1,59 +0,0 @@ -DESCRIPTION = "Recipe to provide a bitstream via virtual/bitstream" - -LICENSE = "MIT" -LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" - -INHIBIT_DEFAULT_DEPS = "1" - -# We never want to prefer this over another provider -DEFAULT_PREFERENCE = "-1" - -PROVIDES = "virtual/bitstream" - -COMPATIBLE_MACHINE = "$^" -COMPATIBLE_MACHINE:zynq = ".*" -COMPATIBLE_MACHINE:zynqmp = ".*" - -# Since we're just copying, we can run any config -COMPATIBLE_HOST = ".*" - -PACKAGE_ARCH = "${MACHINE_ARCH}" - -# Path where the bitstream can be found -BITSTREAM_PATH ?= "" - -inherit deploy - -do_install() { - if [ ! -e ${BITSTREAM_PATH} ]; then - echo "Unable to find BITSTREAM_PATH (${BITSTREAM_PATH})" - exit 1 - fi - - install -Dm 0644 ${BITSTREAM_PATH} ${D}/boot/. -} - -# If the item is already in OUR deploy_image_dir, nothing to deploy! -SHOULD_DEPLOY = "${@'false' if (d.getVar('BITSTREAM_PATH')).startswith(d.getVar('DEPLOY_DIR_IMAGE')) else 'true'}" -do_deploy() { - # If the item is already in OUR deploy_image_dir, nothing to deploy! - if ${SHOULD_DEPLOY}; then - install -Dm 0644 ${BITSTREAM_PATH} ${DEPLOYDIR}/. - fi -} - -def check_bitstream_vars(d): - # If BITSTREAM_PATH is not defined, we error and instruct the user - # Don't cache this, as the items on disk can change! - d.setVar('BB_DONT_CACHE', '1') - if d.getVar('BITSTREAM_PATH') and not os.path.exists(d.getVar('BITSTREAM_PATH')): - raise bb.parse.SkipRecipe("The expected bitstream file %s is not available.\nSee the meta-xilinx-core README.") - - if not d.getVar('BITSTREAM_PATH'): - raise bb.parse.SkipRecipe("Something is depending on virtual/bitstream and you have not provided a bitstream using BITSTREAM_PATH variable.\n See the meta-xilinx-core README.") - -python() { - # Need to allow bbappends to change the check - check_bitstream_vars(d) -} - diff --git a/meta-xilinx-core/recipes-bsp/bitstream/bitstream_1.0.bb b/meta-xilinx-core/recipes-bsp/bitstream/bitstream_1.0.bb new file mode 100644 index 000000000..979652799 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/bitstream/bitstream_1.0.bb @@ -0,0 +1,76 @@ +DESCRIPTION = "Recipe to provide a bitstream via virtual/bitstream" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +INHIBIT_DEFAULT_DEPS = "1" + +BITSTREAM_PATH_DEPENDS ??= "" +DEPENDS += "${BITSTREAM_PATH_DEPENDS}" + +# We never want to prefer this over another provider +DEFAULT_PREFERENCE = "-1" + +PROVIDES = "virtual/bitstream" + +COMPATIBLE_MACHINE = "$^" +COMPATIBLE_MACHINE:zynq = ".*" +COMPATIBLE_MACHINE:zynqmp = ".*" + +# Since we're just copying, we can run any config +COMPATIBLE_HOST = ".*" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +# Path where the bitstream can be found +BITSTREAM_PATH ?= "" + +inherit deploy + +BITSTREAM_NAME ?= "download" +BITSTREAM_NAME:microblaze ?= "system" + +BITSTREAM_BASE_NAME ?= "${BITSTREAM_NAME}-${MACHINE}${IMAGE_VERSION_SUFFIX}" + +SYSROOT_DIRS += "/boot/bitstream" + +do_install() { + if [ ! -e ${BITSTREAM_PATH} ]; then + echo "Unable to find BITSTREAM_PATH (${BITSTREAM_PATH})" + exit 1 + fi + install -d ${D}/boot/bitstream/ + install -Dm 0644 ${BITSTREAM_PATH} ${D}/boot/bitstream/${BITSTREAM_BASE_NAME}.bit +} + +# If the item is already in OUR deploy_image_dir, nothing to deploy! +SHOULD_DEPLOY = "${@'false' if (d.getVar('BITSTREAM_PATH')).startswith(d.getVar('DEPLOY_DIR_IMAGE')) else 'true'}" +do_deploy() { + # If the item is already in OUR deploy_image_dir, nothing to deploy! + if ${SHOULD_DEPLOY}; then + install -Dm 0644 ${BITSTREAM_PATH} ${DEPLOYDIR}/${BITSTREAM_BASE_NAME}.bit + fi +} + +addtask deploy before do_build after do_install + +FILES:${PN} += "/boot/bitstream/*.bit" + +def check_bitstream_vars(d): + # Assuming if BITSTREAM_PATH_DEPENDS exists, that the file will be available later. + if not d.getVar('BITSTREAM_PATH_DEPENDS'): + # Don't cache this, as the items on disk can change! + d.setVar('BB_DONT_CACHE', '1') + + # If BITSTREAM_PATH is not found or defined, we error and instruct the user + if not d.getVar('BITSTREAM_PATH'): + raise bb.parse.SkipRecipe("Something is depending on virtual/bitstream and you have not provided a bitstream using BITSTREAM_PATH variable.\n See the meta-xilinx-core README.") + + if d.getVar('BITSTREAM_PATH') and not os.path.exists(d.getVar('BITSTREAM_PATH')): + raise bb.parse.SkipRecipe("The expected bitstream file %s is not available.\nSee the meta-xilinx-core README." % d.getVar('BITSTREAM_PATH')) + +python() { + # Need to allow bbappends to change the check + check_bitstream_vars(d) +} + diff --git a/meta-xilinx-core/recipes-bsp/bootbin/xilinx-bootbin_1.0.bb b/meta-xilinx-core/recipes-bsp/bootbin/xilinx-bootbin_1.0.bb index aabced596..b9236f553 100644 --- a/meta-xilinx-core/recipes-bsp/bootbin/xilinx-bootbin_1.0.bb +++ b/meta-xilinx-core/recipes-bsp/bootbin/xilinx-bootbin_1.0.bb @@ -7,6 +7,8 @@ LICENSE = "BSD" include machine-xilinx-${SOC_FAMILY}.inc +BOOTBIN_INCLUDE ?= "" + inherit deploy # Don't allow building for microblaze MACHINE @@ -18,10 +20,11 @@ COMPATIBLE_MACHINE:versal-net = ".*" PROVIDES = "virtual/boot-bin" -DEPENDS += "bootgen-native" +DEPENDS += "bootgen-native u-boot-xlnx-scr" # There is no bitstream recipe, so really depend on virtual/bitstream -DEPENDS += "${@(d.getVar('BIF_PARTITION_ATTR') or "").replace('bitstream', 'virtual/bitstream')}" +# We need to refer to virtual/arm-trusted-firmware and not arm-trusted-firmware as there may be multiple providers +DEPENDS += "${@(d.getVar('BIF_PARTITION_ATTR') or "").replace('bitstream', 'virtual/bitstream').replace('arm-trusted-firmware', 'virtual/arm-trusted-firmware')}" PACKAGE_ARCH = "${MACHINE_ARCH}" @@ -32,8 +35,6 @@ LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda SRC_URI += "${@('file://' + d.getVar("BIF_FILE_PATH")) if d.getVar("BIF_FILE_PATH") != (d.getVar('B') + '/bootgen.bif') else ''}" -S = "${UNPACKDIR}" - # bootgen command -arch option for different SOC architectures # zynq7000 : zynq # zynqmp : zynqmp @@ -47,8 +48,17 @@ BOOTGEN_ARCH_DEFAULT:versal-net = "versalnet" BOOTGEN_ARCH ?= "${BOOTGEN_ARCH_DEFAULT}" BOOTGEN_EXTRA_ARGS ?= "" +QEMU_FLASH_TYPE ?= "qspi" +BOOTSCR_DEP = '' +BOOTSCR_DEP:versal = 'u-boot-xlnx-scr:do_deploy' +BOOTSCR_DEP:versal-net = 'u-boot-xlnx-scr:do_deploy' + +BIF_BITSTREAM_ATTR ?= "${@bb.utils.contains('MACHINE_FEATURES', 'fpga-overlay', '', 'bitstream', d)}" + do_patch[noexec] = "1" +do_compile[depends] .= " ${BOOTSCR_DEP}" + def create_bif(config, attrflags, attrimage, ids, common_attr, biffd, d): arch = d.getVar("SOC_FAMILY") bb.error("create_bif function not defined for arch: %s" % (arch)) @@ -168,10 +178,10 @@ do_configure[vardeps] += "BIF_PARTITION_ATTR BIF_PARTITION_IMAGE BIF_COMMON_ATTR do_configure[vardeps] += "BIF_FSBL_ATTR BIF_BITSTREAM_ATTR BIF_ATF_ATTR BIF_DEVICETREE_ATTR BIF_SSBL_ATTR" do_compile() { - cd ${UNPACKDIR} + cd ${WORKDIR} rm -f ${B}/BOOT.bin if [ "${BIF_FILE_PATH}" != "${B}/bootgen.bif" ];then - BIF_FILE_PATH="${UNPACKDIR}${BIF_FILE_PATH}" + BIF_FILE_PATH="${WORKDIR}${BIF_FILE_PATH}" fi bootgen -image ${BIF_FILE_PATH} -arch ${BOOTGEN_ARCH} ${BOOTGEN_EXTRA_ARGS} -w -o ${B}/BOOT.bin if [ ! -e ${B}/BOOT.bin ]; then @@ -179,6 +189,18 @@ do_compile() { fi } +do_compile:append:versal() { + dd if=/dev/zero bs=256M count=1 > ${B}/qemu-${QEMU_FLASH_TYPE}.bin + dd if=${B}/BOOT.bin of=${B}/qemu-${QEMU_FLASH_TYPE}.bin bs=1 seek=0 conv=notrunc + dd if=${DEPLOY_DIR_IMAGE}/boot.scr of=${B}/qemu-${QEMU_FLASH_TYPE}.bin bs=1 seek=66584576 conv=notrunc +} + +do_compile:append:versal-net() { + dd if=/dev/zero bs=256M count=1 > ${B}/qemu-${QEMU_FLASH_TYPE}.bin + dd if=${B}/BOOT.bin of=${B}/qemu-${QEMU_FLASH_TYPE}.bin bs=1 seek=0 conv=notrunc + dd if=${DEPLOY_DIR_IMAGE}/boot.scr of=${B}/qemu-${QEMU_FLASH_TYPE}.bin bs=1 seek=66584576 conv=notrunc +} + do_install() { install -d ${D}/boot install -m 0644 ${B}/BOOT.bin ${D}/boot/BOOT.bin @@ -186,7 +208,7 @@ do_install() { inherit image-artifact-names -QEMUQSPI_BASE_NAME ?= "QEMU_qspi-${MACHINE}${IMAGE_VERSION_SUFFIX}" +QEMU_FLASH_IMAGE_NAME ?= "qemu-${QEMU_FLASH_TYPE}-${MACHINE}${IMAGE_VERSION_SUFFIX}" BOOTBIN_BASE_NAME ?= "BOOT-${MACHINE}${IMAGE_VERSION_SUFFIX}" @@ -201,12 +223,18 @@ do_deploy:append:versal () { install -m 0644 ${B}/BOOT_bh.bin ${DEPLOYDIR}/${BOOTBIN_BASE_NAME}_bh.bin ln -sf ${BOOTBIN_BASE_NAME}_bh.bin ${DEPLOYDIR}/BOOT-${MACHINE}_bh.bin + + install -m 0644 ${B}/qemu-${QEMU_FLASH_TYPE}.bin ${DEPLOYDIR}/${QEMU_FLASH_IMAGE_NAME}.bin + ln -sf ${QEMU_FLASH_IMAGE_NAME}.bin ${DEPLOYDIR}/qemu-${QEMU_FLASH_TYPE}-${MACHINE}.bin } do_deploy:append:versal-net () { install -m 0644 ${B}/BOOT_bh.bin ${DEPLOYDIR}/${BOOTBIN_BASE_NAME}_bh.bin ln -sf ${BOOTBIN_BASE_NAME}_bh.bin ${DEPLOYDIR}/BOOT-${MACHINE}_bh.bin + + install -m 0644 ${B}/qemu-${QEMU_FLASH_TYPE}.bin ${DEPLOYDIR}/${QEMU_FLASH_IMAGE_NAME}.bin + ln -sf ${QEMU_FLASH_IMAGE_NAME}.bin ${DEPLOYDIR}/qemu-${QEMU_FLASH_TYPE}-${MACHINE}.bin } FILES:${PN} += "/boot/BOOT.bin" diff --git a/meta-xilinx-core/recipes-bsp/bootbin/xilinx-mcs_1.0.bb b/meta-xilinx-core/recipes-bsp/bootbin/xilinx-mcs_1.0.bb index 655eca2f8..48c7bca94 100644 --- a/meta-xilinx-core/recipes-bsp/bootbin/xilinx-mcs_1.0.bb +++ b/meta-xilinx-core/recipes-bsp/bootbin/xilinx-mcs_1.0.bb @@ -26,7 +26,7 @@ MB_OUT_FORMAT ??= "mcs" BOOT_EXT = "${@d.getVar('MB_OUT_FORMAT').lower()}" BITSTREAM_FILE ?= "${RECIPE_SYSROOT}/boot/bitstream/download.bit" -B = "${UNPACKDIR}/build" +B = "${WORKDIR}/build" WR_CFGMEM_MISC ?= "-loadbit \" up 0 ${BITSTREAM_FILE}\"" do_check_for_vivado() { diff --git a/meta-xilinx-core/recipes-bsp/cdo/extract-cdo_1.0.bb b/meta-xilinx-core/recipes-bsp/cdo/extract-cdo_1.0.bb index 04cbab69c..17d8af8ca 100644 --- a/meta-xilinx-core/recipes-bsp/cdo/extract-cdo_1.0.bb +++ b/meta-xilinx-core/recipes-bsp/cdo/extract-cdo_1.0.bb @@ -16,7 +16,7 @@ COMPATIBLE_MACHINE:versal-net = "versal-net" PACKAGE_ARCH ?= "${MACHINE_ARCH}" -B = "${UNPACKDIR}/build" +B = "${WORKDIR}/build" BOOTGEN_CMD ?= "bootgen" BOOTGEN_ARGS ?= "-arch versal" @@ -37,4 +37,4 @@ do_deploy() { install -m 0644 ${B}/pmc_cdo.bin ${DEPLOYDIR}/pmc_cdo.bin } -addtask do_deploy after do_compile +addtask deploy before do_build after do_install diff --git a/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb b/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb index 87dddfce1..fbe85f966 100644 --- a/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb +++ b/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb @@ -23,6 +23,9 @@ inherit devicetree image-artifact-names SYSTEM_DTFILE ??= "" CONFIG_DTFILE ??= "${SYSTEM_DTFILE}" +SYSTEM_DTFILE_DEPENDS ??= "" +DEPENDS += "${SYSTEM_DTFILE_DEPENDS}" + BASE_DTS ?= "${@os.path.splitext(os.path.basename(d.getVar('CONFIG_DTFILE') or ''))[0] or 'system-top'}" EXTRA_DT_FILES ?= "" @@ -31,12 +34,12 @@ EXTRA_DTFILES_BUNDLE ?= "" UBOOT_DT_FILES ?= "" UBOOT_DTFILE_PREFIX ?= "system-top" UBOOT_DTFILES_BUNDLE ?= "" -EXTRA_OVERLAYS ?= "" +EXTRA_DT_INCLUDE_FILES ?= "" SYSTEM_DTFILE[doc] = "System Device Tree which accepts at 0...1 dts file" CONFIG_DTFILE[doc] = "Domain Specific Device Tree which accepts 0...1 dts file" EXTRA_DT_FILES[doc] = "Add extra files to DT_FILES_PATH, it accepts 1...n dtsi files and adds to SRC_URI" -EXTRA_OVERLAYS[doc] = "Add extra files to DT_FILES_PATH and adds a #include for each to the BASE_DTS, it access 1..n dtsi files and adds to SRC_URI" +EXTRA_DT_INCLUDE_FILES[doc] = "Add extra files to DT_FILES_PATH and adds a #include for each to the BASE_DTS, it access 1..n dtsi files and adds to SRC_URI" # There should only be ONE CONFIG_DTFILE listed # These need to be passed in from global, not from a bbappend @@ -44,7 +47,7 @@ FILESEXTRAPATHS:prepend := "${@'%s:' % os.path.dirname(d.getVar('CONFIG_DTFILE') SRC_URI:append := " ${@'file://%s' % os.path.basename(d.getVar('CONFIG_DTFILE') or '') if (d.getVar('CONFIG_DTFILE')) else ''}" SRC_URI:append = " ${@" ".join(["file://%s" % f for f in (d.getVar('EXTRA_DT_FILES') or "").split()])}" -SRC_URI:append = " ${@" ".join(["file://%s" % f for f in (d.getVar('EXTRA_OVERLAYS') or "").split()])}" +SRC_URI:append = " ${@" ".join(["file://%s" % f for f in (d.getVar('EXTRA_DT_INCLUDE_FILES') or "").split()])}" COMPATIBLE_MACHINE:zynq = ".*" COMPATIBLE_MACHINE:zynqmp = ".*" @@ -62,7 +65,7 @@ DTB_FILE_NAME ?= "${BASE_DTS}.dtb" DTB_BASE_NAME ?= "${MACHINE}-system${IMAGE_VERSION_SUFFIX}" -# Copy the EXTRA_DT_FILES and EXTRA_OVERLAYS files in prepend operation so that +# Copy the EXTRA_DT_FILES and EXTRA_DT_INCLUDE_FILES files in prepend operation so that # it can be preprocessed. do_configure:prepend () { # Create DT_FILES_PATH directory if doesn't exist during prepend operation. @@ -70,20 +73,20 @@ do_configure:prepend () { mkdir -p ${DT_FILES_PATH} fi - for f in ${EXTRA_DT_FILES} ${EXTRA_OVERLAYS}; do - if [ "$(realpath ${UNPACKDIR}/${f})" != "$(realpath ${DT_FILES_PATH}/`basename ${f}`)" ]; then - cp ${UNPACKDIR}/${f} ${DT_FILES_PATH}/ + for f in ${EXTRA_DT_FILES} ${EXTRA_DT_INCLUDE_FILES}; do + if [ "$(realpath ${WORKDIR}/${f})" != "$(realpath ${DT_FILES_PATH}/`basename ${f}`)" ]; then + cp ${WORKDIR}/${f} ${DT_FILES_PATH}/ fi done } do_configure:append () { - for f in ${EXTRA_OVERLAYS}; do + for f in ${EXTRA_DT_INCLUDE_FILES}; do if [ ! -e ${DT_FILES_PATH}/${BASE_DTS}.dts ]; then if [ -e ${DT_FILES_PATH}/${BASE_DTS}.dtb ]; then - bberror "Unable to find ${BASE_DTS}.dts, to use EXTRA_OVERLAYS you must use a 'dts' and not 'dtb' in CONFIG_DTFILE" + bberror "Unable to find ${BASE_DTS}.dts, to use EXTRA_DT_INCLUDE_FILES you must use a 'dts' and not 'dtb' in CONFIG_DTFILE" else - bberror "Unable to find ${BASE_DTS}.dts, to use EXTRA_OVERLAYS you must set a valid CONFIG_DTFILE or use system-top.dts" + bberror "Unable to find ${BASE_DTS}.dts, to use EXTRA_DT_INCLUDE_FILES you must set a valid CONFIG_DTFILE or use system-top.dts" fi exit 1 fi diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_1.0.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_1.0.bb index 9e0f07ac8..386e1b79f 100644 --- a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_1.0.bb +++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_1.0.bb @@ -19,7 +19,7 @@ COMPATIBLE_MACHINE:zynqmp = "zynqmp" COMPATIBLE_MACHINE:versal = "versal" COMPATIBLE_MACHINE:versal-net = "versal-net" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit cmake update-rc.d systemd diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.1.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.1.bb index 2699a55db..f25201bd0 100644 --- a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.1.bb +++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.1.bb @@ -19,7 +19,7 @@ COMPATIBLE_MACHINE:zynqmp = "zynqmp" COMPATIBLE_MACHINE:versal = "versal" COMPATIBLE_MACHINE:versal-net = "versal-net" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit cmake update-rc.d systemd diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb index da2f3e261..b55ce8c07 100644 --- a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb +++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb @@ -19,7 +19,7 @@ COMPATIBLE_MACHINE:zynqmp = "zynqmp" COMPATIBLE_MACHINE:versal = "versal" COMPATIBLE_MACHINE:versal-net = "versal-net" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit cmake update-rc.d systemd diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2024.1.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2024.1.bb index 261156f99..c646228d7 100644 --- a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2024.1.bb +++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2024.1.bb @@ -19,7 +19,7 @@ COMPATIBLE_MACHINE:zynqmp = "zynqmp" COMPATIBLE_MACHINE:versal = "versal" COMPATIBLE_MACHINE:versal-net = "versal-net" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit cmake update-rc.d systemd diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2024.2.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2024.2.bb new file mode 100644 index 000000000..88dec7b89 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2024.2.bb @@ -0,0 +1,74 @@ +SUMMARY = "Xilinx dfx-mgr libraries" +DESCRIPTION = "Xilinx Runtime User Space Libraries and Binaries" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://LICENSE;md5=d67bcef754e935bf77b6d7051bd62b5e" + +REPO ?= "git://github.com/Xilinx/dfx-mgr.git;protocol=https" +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +BRANCH = "xlnx_rel_v2024.2" +SRCREV = "839e8e646c54a63326e36c48a7bd879f5e8efa31" +SOMAJOR = "2" +SOMINOR = "0" +SOVERSION = "${SOMAJOR}.${SOMINOR}" + +# Don't allow building for Zynq and Microblaze MACHINE unless it is supported. +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE:zynqmp = ".*" +COMPATIBLE_MACHINE:versal = ".*" +COMPATIBLE_MACHINE:versal-net = ".*" + +S = "${WORKDIR}/git" + +inherit cmake update-rc.d systemd + +DEPENDS += " libwebsockets inotify-tools libdfx zocl libdrm systemd" +RDEPENDS:${PN} += " freeipmi" +EXTRA_OECMAKE += " \ + -DCMAKE_SYSROOT:PATH=${RECIPE_SYSROOT} \ + " + +INITSCRIPT_NAME = "dfx-mgr.sh" +INITSCRIPT_PARAMS = "start 99 S ." + +SYSTEMD_PACKAGES="${PN}" +SYSTEMD_SERVICE:${PN}="dfx-mgr.service" +SYSTEMD_AUTO_ENABLE:${PN}="enable" + + +do_install(){ + install -d ${D}${bindir} + install -d ${D}${libdir} + install -d ${D}${includedir} + install -d ${D}${base_libdir}/firmware/xilinx + install -d ${D}${sysconfdir}/dfx-mgrd + + cp ${B}/example/sys/linux/dfx-mgrd-static ${D}${bindir}/dfx-mgrd + cp ${B}/example/sys/linux/dfx-mgr-client-static ${D}${bindir}/dfx-mgr-client + chrpath -d ${D}${bindir}/dfx-mgrd + chrpath -d ${D}${bindir}/dfx-mgr-client + install -m 0644 ${S}/src/dfxmgr_client.h ${D}${includedir} + + oe_soinstall ${B}/src/libdfx-mgr.so.${SOVERSION} ${D}${libdir} + + install -m 0755 ${S}/src/daemon.conf ${D}${sysconfdir}/dfx-mgrd/ + + if ${@bb.utils.contains('DISTRO_FEATURES', 'sysvinit', 'true', 'false', d)}; then + install -d ${D}${sysconfdir}/init.d/ + install -m 0755 ${S}/src/dfx-mgr.sh ${D}${sysconfdir}/init.d/ + fi + + install -m 0755 ${S}/src/dfx-mgr.sh ${D}${bindir} + install -m 0755 ${S}/src/scripts/xlnx-firmware-detect ${D}${bindir} + + install -d ${D}${systemd_system_unitdir} + install -m 0644 ${S}/src/dfx-mgr.service ${D}${systemd_system_unitdir} +} + +PACKAGES =+ "libdfx-mgr" + +FILES:${PN} += "${base_libdir}/firmware/xilinx" +FILES:${PN} += "${@bb.utils.contains('DISTRO_FEATURES','sysvinit','${sysconfdir}/init.d/dfx-mgr.sh', '', d)} ${systemd_system_unitdir}" +FILES:libdfx-mgr = "${libdir}/libdfx-mgr.so.${SOVERSION} ${libdir}/libdfx-mgr.so.${SOMAJOR}" diff --git a/meta-xilinx-core/recipes-bsp/embeddedsw/imgrcry.bb b/meta-xilinx-core/recipes-bsp/embeddedsw/imgrcry.bb new file mode 100644 index 000000000..e87e87935 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/embeddedsw/imgrcry.bb @@ -0,0 +1,69 @@ +DESCRIPTION = "Image Recovery" + +LICENSE = "CLOSED" + +PROVIDES = "virtual/imgrcry" + +INHIBIT_DEFAULT_DEPS = "1" + +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE:zynqmp = "zynqmp" + +# Since we're just copying, we can run any config +COMPATIBLE_HOST = ".*" + +# Default expects the user to provide the imagerecovery in the deploy +# directory, named "image-recovery-${MACHINE}.bin" and "image-recovery-${MACHINE}.bin" +# A machine, multiconfig, or local.conf should override this +IMGRCRY_DEPENDS ??= "" +IMGRCRY_MCDEPENDS ??= "" +IMGRCRY_DEPLOY_DIR ??= "${DEPLOY_DIR_IMAGE}" +IMGRCRY_DEPLOY_DIR[vardepsexclude] += "TOPDIR" +IMGRCRY_IMAGE_NAME ??= "image-recovery-${MACHINE}" + +# Default is for the multilib case (without the extension .bin) +IMGRCRY_FILE ??= "${IMGRCRY_DEPLOY_DIR}/${IMGRCRY_IMAGE_NAME}" +IMGRCRY_FILE[vardepsexclude] = "IMGRCRY_DEPLOY_DIR" + +do_fetch[depends] += "${IMGRCRY_DEPENDS}" +do_fetch[mcdepends] += "${IMGRCRY_MCDEPENDS}" + +inherit deploy + +# If the item is already in OUR deploy_image_dir, nothing to deploy! +SHOULD_DEPLOY = "${@'false' if (d.getVar('IMGRCRY_FILE')).startswith(d.getVar('DEPLOY_DIR_IMAGE')) else 'true'}" +do_deploy() { + # If the item is already in OUR deploy_image_dir, nothing to deploy! + if ${SHOULD_DEPLOY}; then + install -Dm 0644 ${IMGRCRY_FILE}.bin ${DEPLOYDIR}/${IMGRCRY_IMAGE_NAME}.bin + install -Dm 0644 ${IMGRCRY_FILE}.elf ${DEPLOYDIR}/${IMGRCRY_IMAGE_NAME}.elf + fi +} + +addtask deploy before do_build after do_install + +INSANE_SKIP:${PN} = "arch" +INSANE_SKIP:${PN}-dbg = "arch" + +# Disable buildpaths QA check warnings. +INSANE_SKIP:${PN} += "buildpaths" + +def check_imgrcry_variables(d): + # If both are blank, the user MUST pass in the path to the firmware! + if not d.getVar('IMGRCRY_DEPENDS') and not d.getVar('IMGRCRY_MCDEPENDS'): + # Don't cache this, as the items on disk can change! + d.setVar('BB_DONT_CACHE', '1') + + if not os.path.exists(d.getVar('IMGRCRY_FILE') + ".bin"): + if not d.getVar('WITHIN_EXT_SDK'): + raise bb.parse.SkipRecipe("The expected file %s.bin is not available.\nSet IMGRCRY_FILE to the path with a precompiled IMGRCRY binary." % d.getVar('IMGRCRY_FILE')) + else: + # We found the file, so be sure to track it + d.setVar('SRC_URI', 'file://${IMGRCRY_FILE}.bin') + d.setVarFlag('do_install', 'file-checksums', '${IMGRCRY_FILE}.bin:True') + d.setVarFlag('do_deploy', 'file-checksums', '${IMGRCRY_FILE}.bin:True') + +python() { + # Need to allow bbappends to change the check + check_imgrcry_variables(d) +} diff --git a/meta-xilinx-core/recipes-bsp/embeddedsw/imgsel.bb b/meta-xilinx-core/recipes-bsp/embeddedsw/imgsel.bb new file mode 100644 index 000000000..0c0f1549a --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/embeddedsw/imgsel.bb @@ -0,0 +1,72 @@ +DESCRIPTION = "Image Selector" + +LICENSE = "CLOSED" + +PROVIDES = "virtual/imgsel" + +INHIBIT_DEFAULT_DEPS = "1" + +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE:zynqmp = "zynqmp" + +# Since we're just copying, we can run any config +COMPATIBLE_HOST = ".*" + +# Default expects the user to provide the imageselector in the deploy +# directory, named "image-selector-${MACHINE}.bin" and "image-selector-${MACHINE}.bin" +# A machine, multiconfig, or local.conf should override this +IMGSEL_DEPENDS ??= "" +IMGSEL_MCDEPENDS ??= "" +IMGSEL_DEPLOY_DIR ??= "${DEPLOY_DIR_IMAGE}" +IMGSEL_DEPLOY_DIR[vardepsexclude] += "TOPDIR" +IMGSEL_IMAGE_NAME ??= "image-selector-${MACHINE}" + +# Default is for the multilib case (without the extension .bin) +IMGSEL_FILE ??= "${IMGSEL_DEPLOY_DIR}/${IMGSEL_IMAGE_NAME}" +IMGSEL_FILE[vardepsexclude] = "IMGSEL_DEPLOY_DIR" + +do_fetch[depends] += "${IMGSEL_DEPENDS}" +do_fetch[mcdepends] += "${IMGSEL_MCDEPENDS}" + +inherit deploy + +# If the item is already in OUR deploy_image_dir, nothing to deploy! +SHOULD_DEPLOY = "${@'false' if (d.getVar('IMGSEL_FILE')).startswith(d.getVar('DEPLOY_DIR_IMAGE')) else 'true'}" +do_deploy() { + # If the item is already in OUR deploy_image_dir, nothing to deploy! + if ${SHOULD_DEPLOY}; then + install -Dm 0644 ${IMGSEL_FILE}.bin ${DEPLOYDIR}/${IMGSEL_IMAGE_NAME}.bin + install -Dm 0644 ${IMGSEL_FILE}.elf ${DEPLOYDIR}/${IMGSEL_IMAGE_NAME}.elf + fi +} + +addtask deploy before do_build after do_install + +INSANE_SKIP:${PN} = "arch" +INSANE_SKIP:${PN}-dbg = "arch" + +# Disable buildpaths QA check warnings. +INSANE_SKIP:${PN} += "buildpaths" + +#SYSROOT_DIRS += "/boot" +#FILES:${PN} = "/boot/${PN}.bin" + +def check_imgsel_variables(d): + # If both are blank, the user MUST pass in the path to the firmware! + if not d.getVar('IMGSEL_DEPENDS') and not d.getVar('IMGSEL_MCDEPENDS'): + # Don't cache this, as the items on disk can change! + d.setVar('BB_DONT_CACHE', '1') + + if not os.path.exists(d.getVar('IMGSEL_FILE') + ".bin"): + if not d.getVar('WITHIN_EXT_SDK'): + raise bb.parse.SkipRecipe("The expected file %s.bin is not available.\nSet IMGSEL_FILE to the path with a precompiled IMGSEL binary." % d.getVar('IMGSEL_FILE')) + else: + # We found the file, so be sure to track it + d.setVar('SRC_URI', 'file://${IMGSEL_FILE}.bin') + d.setVarFlag('do_install', 'file-checksums', '${IMGSEL_FILE}.bin:True') + d.setVarFlag('do_deploy', 'file-checksums', '${IMGSEL_FILE}.bin:True') + +python() { + # Need to allow bbappends to change the check + check_imgsel_variables(d) +} diff --git a/meta-xilinx-core/recipes-bsp/fpga-manager-script/fpga-manager-script_1.0.bb b/meta-xilinx-core/recipes-bsp/fpga-manager-script/fpga-manager-script_1.0.bb index f7eaa1116..b9a36d779 100644 --- a/meta-xilinx-core/recipes-bsp/fpga-manager-script/fpga-manager-script_1.0.bb +++ b/meta-xilinx-core/recipes-bsp/fpga-manager-script/fpga-manager-script_1.0.bb @@ -1,12 +1,12 @@ SUMMARY = "Install user script to support fpga-manager" DESCRIPTION = "Install user script that loads and unloads overlays using kernel fpga-manager" LICENSE = "Proprietary" -LIC_FILES_CHKSUM = "file://fpgautil.c;beginline=1;endline=24;md5=0dbf04c2c1026b3d120136e728b7a09f" +LIC_FILES_CHKSUM = "file://${WORKDIR}/fpgautil.c;beginline=1;endline=24;md5=0dbf04c2c1026b3d120136e728b7a09f" SRC_URI = "\ file://fpgautil.c \ " -S = "${UNPACKDIR}" +S = "${WORKDIR}" FILESEXTRAPATHS:prepend := "${THISDIR}/files:" diff --git a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_1.0.bb b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_1.0.bb index 7727b93da..1bd468d77 100644 --- a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_1.0.bb +++ b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_1.0.bb @@ -15,7 +15,7 @@ COMPATIBLE_MACHINE:zynqmp = "zynqmp" COMPATIBLE_MACHINE:versal = "versal" COMPATIBLE_MACHINE:versal-net = "versal-net" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit cmake diff --git a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.1.bb b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.1.bb index e64687f5d..15c04addc 100644 --- a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.1.bb +++ b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.1.bb @@ -15,7 +15,7 @@ COMPATIBLE_MACHINE:zynqmp = "zynqmp" COMPATIBLE_MACHINE:versal = "versal" COMPATIBLE_MACHINE:versal-net = "versal-net" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit cmake diff --git a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb index 06d991df1..70d85f88c 100644 --- a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb +++ b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb @@ -15,7 +15,7 @@ COMPATIBLE_MACHINE:zynqmp = "zynqmp" COMPATIBLE_MACHINE:versal = "versal" COMPATIBLE_MACHINE:versal-net = "versal-net" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit cmake diff --git a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2024.1.bb b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2024.1.bb index 9eea4fbeb..c82984f4c 100644 --- a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2024.1.bb +++ b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2024.1.bb @@ -15,7 +15,7 @@ COMPATIBLE_MACHINE:zynqmp = "zynqmp" COMPATIBLE_MACHINE:versal = "versal" COMPATIBLE_MACHINE:versal-net = "versal-net" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit cmake diff --git a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2024.2.bb b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2024.2.bb new file mode 100644 index 000000000..3a097b246 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2024.2.bb @@ -0,0 +1,25 @@ +SUMMARY = "Xilinx libdfx library" +DESCRIPTION = "Xilinx libdfx Library and headers" + +LICENSE = "MIT & GPL-2.0-or-later" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=94aba86aec117f003b958a52f019f1a7" + +BRANCH ?= "xlnx_rel_v2024.2" +REPO ?= "git://github.com/Xilinx/libdfx.git;protocol=https" +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" +SRCREV = "af8d735fae286e7bc94c830a86c960598a4ac014" + +# Don't allow building for Zynq and Microblaze MACHINE unless it is supported. +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE:zynqmp = ".*" +COMPATIBLE_MACHINE:versal = ".*" +COMPATIBLE_MACHINE:versal-net = ".*" + +S = "${WORKDIR}/git" + +inherit cmake + +# Due to an update where the soname/version was defined, we need to use an RREPLACES +# so updates will work properly. +RREPLACES:${PN} = "libdfx" diff --git a/meta-xilinx-core/recipes-bsp/platform-init/platform-init.bb b/meta-xilinx-core/recipes-bsp/platform-init/platform-init.bb index a9c10d479..75c83ee83 100644 --- a/meta-xilinx-core/recipes-bsp/platform-init/platform-init.bb +++ b/meta-xilinx-core/recipes-bsp/platform-init/platform-init.bb @@ -18,7 +18,7 @@ PROVIDES += "virtual/xilinx-platform-init" SRC_URI = "${@" ".join(["file://%s" % f for f in (d.getVar('PLATFORM_INIT_FILES') or "").split()])}" -S = "${UNPACKDIR}" +S = "${WORKDIR}" SYSROOT_DIRS += "${PLATFORM_INIT_DIR}" diff --git a/meta-xilinx-core/recipes-bsp/pmu-firmware/pmu-rom-native.bb b/meta-xilinx-core/recipes-bsp/pmu-firmware/pmu-rom-native.bb index 2d36b4a8b..44ad93680 100644 --- a/meta-xilinx-core/recipes-bsp/pmu-firmware/pmu-rom-native.bb +++ b/meta-xilinx-core/recipes-bsp/pmu-firmware/pmu-rom-native.bb @@ -10,7 +10,7 @@ LIC_FILES_CHKSUM = "file://PMU_ROM-LICENSE.txt;md5=d43d49bc1eb1c907fc6f4ea75abaf SRC_URI = "https://www.xilinx.com/bin/public/openDownload?filename=PMU_ROM.tar.gz" SRC_URI[sha256sum] = "f9a450ef960979463ea0a87a35fafb4a5b62d3a741de30cbcef04c8edc22a7cf" -S = "${UNPACKDIR}/PMU_ROM" +S = "${WORKDIR}/PMU_ROM" inherit deploy native diff --git a/meta-xilinx-core/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.10.0-xilinx-v2024.2.bb b/meta-xilinx-core/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.10.0-xilinx-v2024.2.bb new file mode 100644 index 000000000..e6ba4938d --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/trusted-firmware-a/trusted-firmware-a_2.10.0-xilinx-v2024.2.bb @@ -0,0 +1,154 @@ +require recipes-bsp/trusted-firmware-a/trusted-firmware-a.inc + +DEPENDS:remove:zynqmp:qemuall = " optee-os" +DEPENDS:remove:versal:qemuall = " optee-os" +DEPENDS:remove:versal-net:qemuall = " optee-os" + +# Xilinx TF-A v2.10 +SRC_URI_TRUSTED_FIRMWARE_A = "git://github.com/Xilinx/arm-trusted-firmware.git;protocol=https" +SRCREV_tfa = "14cea4616b6edaceabb607c7c92332436a1699e5" +SRCBRANCH = "xlnx_rebase_v2.10" + +LIC_FILES_CHKSUM = "file://docs/license.rst;md5=b2c740efedc159745b9b31f88ff03dde" + +# mbedtls-3.4.1 is not enabled in this configuration + +# The following are Xilinx specific settings +PROVIDES = "virtual/arm-trusted-firmware" + +COMPATIBLE_MACHINE ?= "^$" +COMPATIBLE_MACHINE:zynqmp = ".*" +COMPATIBLE_MACHINE:versal = ".*" +COMPATIBLE_MACHINE:versal-net = ".*" + +### Platform Settings +TFA_PLATFORM:zynqmp = "zynqmp" +TFA_PLATFORM:versal = "versal" +TFA_PLATFORM:versal-net = "versal_net" + + +### Console settings +TFA_CONSOLE_DEFAULT = "" +TFA_CONSOLE_DEFAULT:zynqmp = "cadence" +TFA_CONSOLE_DEFAULT:versal = "pl011" +TFA_CONSOLE_DEFAULT:versal-net = "pl011" + +# Use old name for compatibility +ATF_CONSOLE ?= "${TFA_CONSOLE_DEFAULT}" + +# Old name to new name +TFA_CONSOLE ?= "${ATF_CONSOLE}" + +TFA_CONSOLE_OEMAKE = "" +TFA_CONSOLE_OEMAKE:append:zynqmp = "${@' ZYNQMP_CONSOLE=${TFA_CONSOLE}' if d.getVar('TFA_CONSOLE', True) != '' else ''}" +TFA_CONSOLE_OEMAKE:append:versal = "${@' VERSAL_CONSOLE=${TFA_CONSOLE}' if d.getVar('TFA_CONSOLE', True) != '' else ''}" +TFA_CONSOLE_OEMAKE:append:versal-net = "${@' VERSAL_NET_CONSOLE=${TFA_CONSOLE}' if d.getVar('TFA_CONSOLE', True) != '' else ''}" + +EXTRA_OEMAKE += "${TFA_CONSOLE_OEMAKE}" + + +### Debug settings +DEBUG_ATF_DEFAULT = "" +DEBUG_ATF_DEFAULT:versal = "1" +DEBUG_ATF_DEFAULT:versal-net = "1" +DEBUG_ATF ?= "${DEBUG_ATF_DEFAULT}" + +# Translate old to new name +TFA_DEBUG = "${DEBUG_ATF}" + + +### Mem Settings +ATF_MEM_BASE ?= "" +ATF_MEM_SIZE ?= "" + +TFA_MEM_BASE ?= "${ATF_MEM_BASE}" +TFA_MEM_SIZE ?= "${ATF_MEM_SIZE}" + +TFA_MEM_OEMAKE = "" +TFA_MEM_OEMAKE:append:zynqmp = "${@' ZYNQMP_ATF_MEM_BASE=${ATF_MEM_BASE}' if d.getVar('ATF_MEM_BASE', True) != '' else ''}" +TFA_MEM_OEMAKE:append:zynqmp = "${@' ZYNQMP_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.getVar('ATF_MEM_SIZE', True) != '' else ''}" +TFA_MEM_OEMAKE:append:versal = "${@' VERSAL_ATF_MEM_BASE=${ATF_MEM_BASE}' if d.getVar('ATF_MEM_BASE', True) != '' else ''}" +TFA_MEM_OEMAKE:append:versal = "${@' VERSAL_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.getVar('ATF_MEM_SIZE', True) != '' else ''}" +TFA_MEM_OEMAKE:append:versal-net = "${@' VERSAL_NET_ATF_MEM_BASE=${ATF_MEM_BASE}' if d.getVar('ATF_MEM_BASE', True) != '' else ''}" +TFA_MEM_OEMAKE:append:versal-net = "${@' VERSAL_NET_ATF_MEM_SIZE=${ATF_MEM_SIZE}' if d.getVar('ATF_MEM_SIZE', True) != '' else ''}" + +EXTRA_OEMAKE += "${TFA_MEM_OEMAKE}" + + +### Preloaded Base +TFA_BL33_LOAD ?= "" +EXTRA_OEMAKE += "${@' PRELOADED_BL33_BASE=${TFA_BL33_LOAD}' if d.getVar('TFA_BL33_LOAD', True) != '' else ''}" + + +# Workaround for bl31.elf has a LOAD segment with RWX permissions +EXTRA_OEMAKE += ' TF_LDFLAGS="--no-warn-rwx-segments --fatal-warnings -O1 --gc-sections"' + +# We use bl31 +TFA_BUILD_TARGET = "bl31" +TFA_INSTALL_TARGET = "bl31" + +inherit image-artifact-names + +# arm-trusted-firmware instead of ${PN} for compatibility +ATF_BASE_NAME ?= "arm-trusted-firmware-${PKGE}-${PKGV}-${PKGR}${IMAGE_VERSION_SUFFIX}" + +do_install:append() { + # The first TFA_INSTALL_TARGET found will be copied as the standard boot firmware + for atfbin in ${TFA_INSTALL_TARGET} ; do + install -d ${D}/boot + if [ -e ${D}/firmware/$atfbin-${TFA_PLATFORM}.elf ]; then + ln ${D}/firmware/$atfbin-${TFA_PLATFORM}.elf ${D}/boot/${ATF_BASE_NAME}.elf + ln -sf ${ATF_BASE_NAME}.elf ${D}/boot/arm-trusted-firmware.elf + ln ${D}/firmware/$atfbin-${TFA_PLATFORM}.bin ${D}/boot/${ATF_BASE_NAME}.bin + ln -sf ${ATF_BASE_NAME}.bin ${D}/boot/arm-trusted-firmware.bin + + # Get the entry point address from the elf. + BL31_BASE_ADDR=$(${READELF} -h ${D}/boot/${ATF_BASE_NAME}.elf | egrep -m 1 -i "entry point.*?0x" | sed -r 's/.*?(0x.*?)/\1/g') + mkimage -A arm64 -O arm-trusted-firmware -T kernel -C none \ + -a $BL31_BASE_ADDR -e $BL31_BASE_ADDR \ + -d ${D}/firmware/$atfbin-${TFA_PLATFORM}.bin ${D}/boot/${ATF_BASE_NAME}.ub + ln -sf ${ATF_BASE_NAME}.ub ${D}/boot/arm-trusted-firmware.ub + ln -sf ${ATF_BASE_NAME}.ub ${D}/boot/atf-uboot.ub + break + fi + done +} + +inherit deploy + +DEPENDS += "u-boot-mkimage-native" + +do_deploy() { + # Copy the /boot items to deploy + install -d ${DEPLOYDIR} + install -m 0644 ${D}/boot/${ATF_BASE_NAME}.elf ${DEPLOYDIR}/${ATF_BASE_NAME}.elf + ln -sf ${ATF_BASE_NAME}.elf ${DEPLOYDIR}/arm-trusted-firmware.elf + install -m 0644 ${D}/boot/${ATF_BASE_NAME}.bin ${DEPLOYDIR}/${ATF_BASE_NAME}.bin + ln -sf ${ATF_BASE_NAME}.bin ${DEPLOYDIR}/arm-trusted-firmware.bin + + install -m 0644 ${D}/boot/${ATF_BASE_NAME}.ub ${DEPLOYDIR}/${ATF_BASE_NAME}.ub + ln -sf ${ATF_BASE_NAME}.ub ${DEPLOYDIR}/arm-trusted-firmware.ub + ln -sf ${ATF_BASE_NAME}.ub ${DEPLOYDIR}/atf-uboot.ub +} + +addtask deploy before do_build after do_compile + +SYSROOT_DIRS += "/boot" +FILES:${PN} += "/boot/*.elf /boot/*.bin /boot/*.ub" +RPROVIDES:${PN} += "arm-trusted-firmware" + +python() { + soc_family = d.getVar('SOC_FAMILY') + tfa_console = d.getVar('TFA_CONSOLE') + + # See plat/xilinx//platform.mk + if soc_family and soc_family == "zynqmp": + if not tfa_console in [ 'cadence', 'cadence0', 'cadence1', 'dcc' ]: + raise bb.parse.SkipRecipe('TFA_CONSOLE (%s) is not configured properly for ZynqMP, only cadence, cadence0, cadence1, and dcc are valid options.' % (tfa_console)) + elif soc_family and soc_family == "versal": + if not tfa_console in [ 'pl011', 'pl011_0', 'pl011_1', 'dcc' ]: + raise bb.parse.SkipRecipe('TFA_CONSOLE (%s) is not configured properly for Versal, only pl011, pl011_0, pl011_1, and dcc are valid options.' % (tfa_console)) + elif soc_family and soc_family == "versal-net": + if not tfa_console in [ 'pl011', 'pl011_0', 'pl011_1', 'dcc' ]: + raise bb.parse.SkipRecipe('TFA_CONSOLE (%s) is not configured properly for Versal-Net, only pl011, pl011_0, pl011_1, and dcc are valid options.' % (tfa_console)) +} diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2024.01-xilinx-v2024.2.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2024.01-xilinx-v2024.2.bb new file mode 100644 index 000000000..4214fdd9e --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2024.01-xilinx-v2024.2.bb @@ -0,0 +1,21 @@ +require u-boot-tools-xlnx.inc +require u-boot-xlnx-2024.2.inc + +# MUST clear CONFIG_VIDEO to avoid a compilation failure trying to construct +# bmp_logo.h +SED_CONFIG_EFI:append = ' -e "s/CONFIG_VIDEO=.*/# CONFIG_VIDEO is not set/"' + +# Default do_compile fails with: +# | error: object directory ../downloads/git2/github.com.Xilinx.u-boot-xlnx.git/objects does not exist; check .git/objects/info/alternates. +# The regular workaround of calling 'git diff' seems to be problematic. +do_compile () { + oe_runmake -C ${S} tools-only_defconfig O=${B} + + # Disable CONFIG_CMD_LICENSE, license.h is not used by tools and + # generating it requires bin2header tool, which for target build + # is built with target tools and thus cannot be executed on host. + sed -i -e "s/CONFIG_CMD_LICENSE=.*/# CONFIG_CMD_LICENSE is not set/" ${SED_CONFIG_EFI} ${B}/.config + + oe_runmake -C ${S} cross_tools NO_SDL=1 O=${B} +} + diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc index 3c8d1ed66..86ba82bbe 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc @@ -19,5 +19,5 @@ SRC_URI:append:microblaze = " file://microblaze-generic-top.h" FILESEXTRAPATHS:prepend := "${THISDIR}/u-boot-v2023.01:" do_configure:prepend:microblaze () { - install ${UNPACKDIR}/microblaze-generic-top.h ${S}/include/configs/ + install ${WORKDIR}/microblaze-generic-top.h ${S}/include/configs/ } diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2024.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2024.2.inc new file mode 100644 index 000000000..feb9bbcd0 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2024.2.inc @@ -0,0 +1,17 @@ +UBRANCH = "xlnx_rebase_v2024.01" + +SRCREV = "7f6ec94aac7eacfec07bd45c83a6d17df4b7d383" + +LICENSE = "GPL-2.0-or-later" +LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897" + +# u-boot-xlnx has support for these +HAS_PLATFORM_INIT ?= " \ + xilinx_zynqmp_virt_config \ + xilinx_zynq_virt_defconfig \ + xilinx_versal_vc_p_a2197_revA_x_prc_01_revA \ + " + +DEPENDS += "bc-native dtc-native python3-setuptools-native gnutls-native" + +FILESEXTRAPATHS:prepend := "${THISDIR}/u-boot-v2024.01:" diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-blob.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-blob.inc index bbf4125f0..7eac6bfd2 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-blob.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-blob.inc @@ -9,7 +9,6 @@ IMPORT_CC_DTBS ?= "" CC_DTBS_DUP ?= "" IMPORT_CC_UBOOT_DTBS ?= "" -DEPENDS:append:eval-brd-sc-zynqmp = " uboot-device-tree" MKIMAGE_DTBLOB_OPTS ?= "-E -B 0x8" # Everything is swtiched on with UBOOT_IMAGE_BLOB = '1' diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-common.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-common.inc index 9c8bd7a84..765af276d 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-common.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-common.inc @@ -6,8 +6,8 @@ UBRANCHARG = "${@['nobranch=1', 'branch=${UBRANCH}'][d.getVar('UBRANCH', True) ! SRC_URI = "${UBOOTURI};${UBRANCHARG}" -S = "${UNPACKDIR}/git" -B = "${UNPACKDIR}/build" +S = "${WORKDIR}/git" +B = "${WORKDIR}/build" UBOOT_MB_INC = "" UBOOT_MB_INC:microblaze = "u-boot-xlnx-microblaze.inc" diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb index f823e478c..e13413a15 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb @@ -4,8 +4,6 @@ LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda DEPENDS = "u-boot-mkimage-native" -S = "${UNPACKDIR}" - inherit deploy image-wic-utils INHIBIT_DEFAULT_DEPS = "1" @@ -41,6 +39,9 @@ DDR_BASEADDR ?= "0x0" DDR_BASEADDR:microblaze ?= "0x80000000" PRE_BOOTENV ?= "" +# Set debfault SD boot device to mmc 0 interface +SDBOOTDEV ?= "0" + SRC_URI = " \ file://boot.cmd.sd.zynq \ file://boot.cmd.sd.zynqmp \ @@ -83,7 +84,7 @@ DEVICETREE_OVERLAY_OFFSET:zynqmp ??= "0x100000" DEVICETREE_OVERLAY_OFFSET:zynq ??= "0x100000" DEVICETREE_OVERLAY_OFFSET:versal ??= "0x1000" DEVICETREE_OVERLAY_OFFSET:versal-net ??= "0x1000" -DEVICETREE_OVERLAY_PADSIZE ??= "0xf00000" +DEVICETREE_OVERLAY_PADSIZE ??= "0x1f00000" DEVICETREE_OVERLAY_ADDRESS ?= "${@hex(int(append_baseaddr(d,d.getVar('DEVICETREE_OVERLAY_OFFSET')),16) \ + int(d.getVar('DEVICETREE_OVERLAY_PADSIZE'),16))}" @@ -267,14 +268,14 @@ do_compile() { -e 's:@@KERNEL_ROOT_RAMDISK@@:${KERNEL_ROOT_RAMDISK}:' \ -e 's:@@KERNEL_COMMAND_APPEND@@:${KERNEL_COMMAND_APPEND}:' \ ${SCRIPT_SED_ADDENDUM} \ - "${UNPACKDIR}/boot.cmd.${BOOTMODE}${BOOTFILE_EXT}" > "${UNPACKDIR}/boot.cmd" + "${WORKDIR}/boot.cmd.${BOOTMODE}${BOOTFILE_EXT}" > "${WORKDIR}/boot.cmd" - mkimage -A arm -T script -C none -n "Boot script" -d "${UNPACKDIR}/boot.cmd" boot.scr + mkimage -A arm -T script -C none -n "Boot script" -d "${WORKDIR}/boot.cmd" boot.scr sed -e 's/@@KERNEL_IMAGETYPE@@/${KERNEL_IMAGETYPE}/' \ -e 's/@@DEVICE_TREE_NAME@@/${DEVICE_TREE_NAME}/' \ -e 's/@@RAMDISK_IMAGE@@/${PXERAMDISK_IMAGE}/' \ - "${UNPACKDIR}/pxeboot.pxe" > "pxeboot.pxe" + "${WORKDIR}/pxeboot.pxe" > "pxeboot.pxe" } do_install() { diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic index e09bdfa99..f60a1ea9d 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic @@ -13,7 +13,6 @@ rootfs_name=@@RAMDISK_IMAGE@@ setenv get_bootargs 'fdt addr $fdtcontroladdr;fdt get value bootargs /chosen bootargs;' setenv update_bootargs 'if test -n ${launch_ramdisk_init} && test ${bootargs} = "";then if run get_bootargs;then setenv bootargs "\$bootargs launch_ramdisk_init=${launch_ramdisk_init} $extrabootargs";fi;fi' - for boot_target in ${boot_targets}; do echo "Trying to load boot images from ${boot_target}" @@ -83,4 +82,15 @@ do @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@; echo "Booting using Separate images failed" fi + if test "${boot_target}" = "nor" || test "${boot_target}" = "nor0"; then + cp.b @@QSPI_FIT_IMAGE_OFFSET@@ @@FIT_IMAGE_LOAD_ADDRESS@@ @@QSPI_FIT_IMAGE_SIZE@@ + bootm @@FIT_IMAGE_LOAD_ADDRESS@@; + echo "Booting using Fit image failed" + + cp.b @@QSPI_KERNEL_OFFSET@@ @@KERNEL_LOAD_ADDRESS@@ @@QSPI_KERNEL_SIZE@@ + cp.b @@QSPI_RAMDISK_OFFSET@@ @@RAMDISK_IMAGE_ADDRESS@@ @@QSPI_RAMDISK_SIZE@@ + run update_bootargs + @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@; + echo "Booting using Separate images failed" +fi done diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root index ed12f9413..a3ec12865 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root @@ -9,6 +9,7 @@ ramdisk_name=@@RAMDISK_IMAGE1@@ rootfs_name=@@RAMDISK_IMAGE@@ @@PRE_BOOTENV@@ + for boot_target in ${boot_targets}; do echo "Trying to load boot images from ${boot_target}" @@ -43,17 +44,17 @@ do fi echo "Checking for /${kernel_name}" if test -e ${devtype} ${devnum}:${distro_bootpart} /${kernel_name}; then - echo "Loading ${kernel_name}"; + echo "Loading ${kernel_name} at @@KERNEL_LOAD_ADDRESS@@"; fatload ${devtype} ${devnum}:${distro_bootpart} @@KERNEL_LOAD_ADDRESS@@ ${kernel_name}; fi echo "Checking for /system.dtb" if test -e ${devtype} ${devnum}:${distro_bootpart} /system.dtb; then - echo "Loading system.dtb"; + echo "Loading system.dtb at @@DEVICETREE_ADDRESS@@"; fatload ${devtype} ${devnum}:${distro_bootpart} @@DEVICETREE_ADDRESS@@ system.dtb; fi echo "Checking for /devicetree/openamp.dtbo" if test -e ${devtype} ${devnum}:${distro_bootpart} /devicetree/openamp.dtbo; then - echo "Loading and merging openamp.dtbo into device tree"; + echo "Loading and merging openamp.dtbo into device tree at @@DEVICETREE_OVERLAY_ADDRESS@@"; fatload ${devtype} ${devnum}:${distro_bootpart} @@DEVICETREE_OVERLAY_ADDRESS@@ devicetree/openamp.dtbo; fdt addr @@DEVICETREE_ADDRESS@@ fdt resize 8192 @@ -61,7 +62,7 @@ do fi echo "Checking for /${ramdisk_name}" if test -e ${devtype} ${devnum}:${distro_bootpart} /${ramdisk_name} && test "${skip_tinyramdisk}" != "yes"; then - echo "Loading ${ramdisk_name}"; + echo "Loading ${ramdisk_name} at @@RAMDISK_IMAGE_ADDRESS@@"; fatload ${devtype} ${devnum}:${distro_bootpart} @@RAMDISK_IMAGE_ADDRESS@@ ${ramdisk_name}; fdt addr @@DEVICETREE_ADDRESS@@ fdt get value bootargs /chosen bootargs @@ -70,7 +71,7 @@ do fi echo "Checking for /${rootfs_name}" if test -e ${devtype} ${devnum}:${distro_bootpart} /${rootfs_name} && test "${skip_ramdisk}" != "yes"; then - echo "Loading ${rootfs_name}"; + echo "Loading ${rootfs_name} at @@RAMDISK_IMAGE_ADDRESS@@"; fatload ${devtype} ${devnum}:${distro_bootpart} @@RAMDISK_IMAGE_ADDRESS@@ ${rootfs_name}; fdt addr @@DEVICETREE_ADDRESS@@ fdt get value bootargs /chosen bootargs diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-uenv.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-uenv.bb index 3f59ef7de..dafaab254 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-uenv.bb +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-uenv.bb @@ -16,7 +16,7 @@ def remove_task_from_depends(d): extra_imagedepends = d.getVar('EXTRA_IMAGEDEPENDS') or '' uenv_depends = '' for imagedepend in extra_imagedepends.split(): - if imagedepend == d.getVar("BPN"): + if imagedepend == d.getVar("BPN") or '': continue elif ':' in imagedepend: uenv_depends += ' %s' % imagedepend.split(':')[0] @@ -25,16 +25,16 @@ def remove_task_from_depends(d): return uenv_depends def uboot_boot_cmd(d): - if d.getVar("KERNEL_IMAGETYPE") in ["uImage", "fitImage"]: + if (d.getVar("KERNEL_IMAGETYPE") or '') in ["uImage", "fitImage"]: return "bootm" - if d.getVar("KERNEL_IMAGETYPE") in ["zImage"]: + if (d.getVar("KERNEL_IMAGETYPE") or '') in ["zImage"]: return "bootz" - if d.getVar("KERNEL_IMAGETYPE") in ["Image"]: + if (d.getVar("KERNEL_IMAGETYPE") or '') in ["Image"]: return "booti" raise bb.parse.SkipRecipe("Unsupport kernel image type") def get_sdbootdev(d): - if d.getVar("SOC_FAMILY") in ["zynqmp"]: + if (d.getVar("SOC_FAMILY") or '') in ["zynqmp"]: return "${devnum}" else: return "0" @@ -43,24 +43,24 @@ def uenv_populate(d): # populate the environment values env = {} - env["machine_name"] = d.getVar("MACHINE") + env["machine_name"] = d.getVar("MACHINE") or '' - env["kernel_image"] = d.getVar("KERNEL_IMAGETYPE") - env["kernel_load_address"] = d.getVar("KERNEL_LOAD_ADDRESS") + env["kernel_image"] = d.getVar("KERNEL_IMAGETYPE") or '' + env["kernel_load_address"] = d.getVar("KERNEL_LOAD_ADDRESS") or '' env["devicetree_image"] = boot_files_dtb_filepath(d) - env["devicetree_load_address"] = d.getVar("DEVICETREE_LOAD_ADDRESS") - env["devicetree_overlay_load_address" ] = d.getVar("DEVICETREE_OVERLAY_LOAD_ADDRESS") + env["devicetree_load_address"] = d.getVar("DEVICETREE_LOAD_ADDRESS") or '' + env["devicetree_overlay_load_address" ] = d.getVar("DEVICETREE_OVERLAY_LOAD_ADDRESS") or '' - env["bootargs"] = d.getVar("KERNEL_BOOTARGS") + env["bootargs"] = d.getVar("KERNEL_BOOTARGS") or '' env["loadkernel"] = "fatload mmc " + get_sdbootdev(d) + " ${kernel_load_address} ${kernel_image}" env["loaddtb"] = "fatload mmc " + get_sdbootdev(d) + " ${devicetree_load_address} ${devicetree_image}" env["loaddtbo"] = "if test -e mmc " + get_sdbootdev(d) + " /devicetree/openamp.dtbo; then fatload mmc " + get_sdbootdev(d) + " ${devicetree_overlay_load_address} /devicetree/openamp.dtbo ; fdt addr ${devicetree_load_address} ; fdt resize 8192 ; fdt apply ${devicetree_overlay_load_address} ; fi" env["bootkernel"] = "run loadkernel && run loaddtb && run loaddtbo && " + uboot_boot_cmd(d) + " ${kernel_load_address} - ${devicetree_load_address}" - if d.getVar("SOC_FAMILY") in ["zynqmp"]: - env["bootkernel"] = "setenv bootargs " + d.getVar("KERNEL_BOOTARGS") + " ; " + env["bootkernel"] + if (d.getVar("SOC_FAMILY") or '') in ["zynqmp"]: + env["bootkernel"] = "setenv bootargs " + (d.getVar("KERNEL_BOOTARGS") or '') + " ; " + env["bootkernel"] # default uenvcmd does not load bitstream env["uenvcmd"] = "run bootkernel" @@ -89,11 +89,12 @@ KERNEL_LOAD_ADDRESS:zynq = "0x2080000" KERNEL_LOAD_ADDRESS:zynqmp = "0x200000" DEVICETREE_LOAD_ADDRESS:zynq = "0x2000000" DEVICETREE_LOAD_ADDRESS:zynqmp = "0x4000000" -DEVICETREE_OVERLAY_LOAD_ADDRESS = "${@hex(int(d.getVar("DEVICETREE_LOAD_ADDRESS"),16) + 0xf00000)}" +DEVICETREE_OVERLAY_LOAD_ADDRESS:zynq = "${@hex(int(d.getVar("DEVICETREE_LOAD_ADDRESS"),16) + 0xf00000)}" +DEVICETREE_OVERLAY_LOAD_ADDRESS:zynqmp = "${@hex(int(d.getVar("DEVICETREE_LOAD_ADDRESS"),16) + 0xf00000)}" python do_compile() { env = uenv_populate(d) - with open(d.expand("${UNPACKDIR}/uEnv.txt"), "w") as f: + with open(d.expand("${WORKDIR}/uEnv.txt"), "w") as f: for k, v in env.items(): f.write("{0}={1}\n".format(k, v)) } @@ -101,11 +102,11 @@ python do_compile() { FILES:${PN} += "/boot/uEnv.txt" do_install() { - install -Dm 0644 ${UNPACKDIR}/uEnv.txt ${D}/boot/uEnv.txt + install -Dm 0644 ${WORKDIR}/uEnv.txt ${D}/boot/uEnv.txt } do_deploy() { - install -Dm 0644 ${UNPACKDIR}/uEnv.txt ${DEPLOYDIR}/uEnv.txt + install -Dm 0644 ${WORKDIR}/uEnv.txt ${DEPLOYDIR}/uEnv.txt } addtask do_deploy after do_compile before do_build diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2024.01-xilinx-v2024.2.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2024.01-xilinx-v2024.2.bb new file mode 100644 index 000000000..bcadf1e43 --- /dev/null +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2024.01-xilinx-v2024.2.bb @@ -0,0 +1,4 @@ + +require u-boot-xlnx.inc +require u-boot-spl-zynq-init.inc +require u-boot-xlnx-2024.2.inc diff --git a/meta-xilinx-core/recipes-connectivity/iproute2/iproute2.inc b/meta-xilinx-core/recipes-connectivity/iproute2/iproute2.inc deleted file mode 100644 index b1bcc1434..000000000 --- a/meta-xilinx-core/recipes-connectivity/iproute2/iproute2.inc +++ /dev/null @@ -1,91 +0,0 @@ -SUMMARY = "TCP / IP networking and traffic control utilities" -DESCRIPTION = "Iproute2 is a collection of utilities for controlling \ -TCP / IP networking and traffic control in Linux. Of the utilities ip \ -and tc are the most important. ip controls IPv4 and IPv6 \ -configuration and tc stands for traffic control." -HOMEPAGE = "http://www.linuxfoundation.org/collaborate/workgroups/networking/iproute2" -SECTION = "base" -LICENSE = "GPL-2.0-or-later" -LIC_FILES_CHKSUM = "file://COPYING;md5=eb723b61539feef013de476e68b5c50a \ - file://ip/ip.c;beginline=3;endline=8;md5=689d691d0410a4b64d3899f8d6e31817" - -DEPENDS = "flex-native bison-native iptables libcap" - -inherit update-alternatives bash-completion pkgconfig - -CLEANBROKEN = "1" - -PACKAGECONFIG ??= "tipc elf devlink" -PACKAGECONFIG[tipc] = ",,libmnl," -PACKAGECONFIG[elf] = ",,elfutils," -PACKAGECONFIG[devlink] = ",,libmnl," -PACKAGECONFIG[rdma] = ",,libmnl," - -IPROUTE2_MAKE_SUBDIRS = "lib tc ip bridge misc genl ${@bb.utils.filter('PACKAGECONFIG', 'devlink tipc rdma', d)}" - -EXTRA_OEMAKE = "\ - CC='${CC}' \ - KERNEL_INCLUDE=${STAGING_INCDIR} \ - DOCDIR=${docdir}/iproute2 \ - SUBDIRS='${IPROUTE2_MAKE_SUBDIRS}' \ - SBINDIR='${base_sbindir}' \ - LIBDIR='${libdir}' \ -" - -do_configure:append () { - sh configure ${STAGING_INCDIR} - # Explicitly disable ATM support - sed -i -e '/TC_CONFIG_ATM/d' config.mk -} - -do_install () { - oe_runmake DESTDIR=${D} install - mv ${D}${base_sbindir}/ip ${D}${base_sbindir}/ip.iproute2 - install -d ${D}${datadir} - mv ${D}/share/* ${D}${datadir}/ || true - rm ${D}/share -rf || true -} - -# The .so files in iproute2-tc are modules, not traditional libraries -INSANE_SKIP:${PN}-tc = "dev-so" - -IPROUTE2_PACKAGES =+ "\ - ${PN}-devlink \ - ${PN}-genl \ - ${PN}-ifstat \ - ${PN}-ip \ - ${PN}-lnstat \ - ${PN}-nstat \ - ${PN}-rtacct \ - ${PN}-ss \ - ${PN}-tc \ - ${PN}-tipc \ - ${PN}-rdma \ -" - -PACKAGE_BEFORE_PN = "${IPROUTE2_PACKAGES}" -RDEPENDS:${PN} += "${PN}-ip" - -FILES:${PN}-tc = "${base_sbindir}/tc* \ - ${libdir}/tc/*.so" -FILES:${PN}-lnstat = "${base_sbindir}/lnstat \ - ${base_sbindir}/ctstat \ - ${base_sbindir}/rtstat" -FILES:${PN}-ifstat = "${base_sbindir}/ifstat" -FILES:${PN}-ip = "${base_sbindir}/ip.${PN} ${sysconfdir}/iproute2" -FILES:${PN}-genl = "${base_sbindir}/genl" -FILES:${PN}-rtacct = "${base_sbindir}/rtacct" -FILES:${PN}-nstat = "${base_sbindir}/nstat" -FILES:${PN}-ss = "${base_sbindir}/ss" -FILES:${PN}-tipc = "${base_sbindir}/tipc" -FILES:${PN}-devlink = "${base_sbindir}/devlink" -FILES:${PN}-rdma = "${base_sbindir}/rdma" - -ALTERNATIVE:${PN}-ip = "ip" -ALTERNATIVE_TARGET[ip] = "${base_sbindir}/ip.${BPN}" -ALTERNATIVE_LINK_NAME[ip] = "${base_sbindir}/ip" -ALTERNATIVE_PRIORITY = "100" - -ALTERNATIVE:${PN}-tc = "tc" -ALTERNATIVE_LINK_NAME[tc] = "${base_sbindir}/tc" -ALTERNATIVE_PRIORITY_${PN}-tc = "100" diff --git a/meta-xilinx-core/recipes-connectivity/iproute2/iproute2/0001-libc-compat.h-add-musl-workaround.patch b/meta-xilinx-core/recipes-connectivity/iproute2/iproute2/0001-libc-compat.h-add-musl-workaround.patch deleted file mode 100644 index 74e3de1ce..000000000 --- a/meta-xilinx-core/recipes-connectivity/iproute2/iproute2/0001-libc-compat.h-add-musl-workaround.patch +++ /dev/null @@ -1,39 +0,0 @@ -From c25f8d1f7a6203dfeb10b39f80ffd314bb84a58d Mon Sep 17 00:00:00 2001 -From: Baruch Siach -Date: Thu, 22 Dec 2016 15:26:30 +0200 -Subject: [PATCH] libc-compat.h: add musl workaround - -The libc-compat.h kernel header uses glibc specific macros (__GLIBC__ and -__USE_MISC) to solve conflicts with libc provided headers. This patch makes -libc-compat.h work for musl libc as well. - -Upstream-Status: Pending - -Taken From: -https://git.buildroot.net/buildroot/tree/package/iproute2/0001-Add-the-musl-workaround-to-the-libc-compat.h-copy.patch - -Signed-off-by: Baruch Siach -Signed-off-by: Maxin B. John - ---- - include/uapi/linux/libc-compat.h | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/include/uapi/linux/libc-compat.h b/include/uapi/linux/libc-compat.h -index a159991..22198fa 100644 ---- a/include/uapi/linux/libc-compat.h -+++ b/include/uapi/linux/libc-compat.h -@@ -50,10 +50,12 @@ - #define _LIBC_COMPAT_H - - /* We have included glibc headers... */ --#if defined(__GLIBC__) -+#if 1 -+#define __USE_MISC - - /* Coordinate with glibc net/if.h header. */ - #if defined(_NET_IF_H) && defined(__USE_MISC) -+#define __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO 0 - - /* GLIBC headers included first so don't define anything - * that would already be defined. */ diff --git a/meta-xilinx-core/recipes-connectivity/iproute2/iproute2_5.15.0.bb b/meta-xilinx-core/recipes-connectivity/iproute2/iproute2_5.15.0.bb deleted file mode 100644 index 99a743391..000000000 --- a/meta-xilinx-core/recipes-connectivity/iproute2/iproute2_5.15.0.bb +++ /dev/null @@ -1,11 +0,0 @@ -require iproute2.inc - -SRC_URI = "${KERNELORG_MIRROR}/linux/utils/net/${BPN}/${BP}.tar.xz \ - file://0001-libc-compat.h-add-musl-workaround.patch \ - " - -SRC_URI[sha256sum] = "38e3e4a5f9a7f5575c015027a10df097c149111eeb739993128e5b2b35b291ff" - -# CFLAGS are computed in Makefile and reference CCOPTS -# -EXTRA_OEMAKE:append = " CCOPTS='${CFLAGS}'" diff --git a/meta-xilinx-core/recipes-connectivity/slirp/libslirp_git.bb b/meta-xilinx-core/recipes-connectivity/slirp/libslirp_git.bb deleted file mode 100644 index 95e9b0164..000000000 --- a/meta-xilinx-core/recipes-connectivity/slirp/libslirp_git.bb +++ /dev/null @@ -1,18 +0,0 @@ -SUMMARY = "A general purpose TCP-IP emulator" -DESCRIPTION = "A general purpose TCP-IP emulator used by virtual machine hypervisors to provide virtual networking services." -HOMEPAGE = "https://gitlab.freedesktop.org/slirp/libslirp" -LICENSE = "BSD-3-Clause & MIT" -LIC_FILES_CHKSUM = "file://COPYRIGHT;md5=bca0186b14e6b05e338e729f106db727" - -SRC_URI = "git://gitlab.freedesktop.org/slirp/libslirp.git;protocol=https;branch=master" -SRCREV = "3ad1710a96678fe79066b1469cead4058713a1d9" -PV = "4.7.0" -S = "${UNPACKDIR}/git" - -DEPENDS = " \ - glib-2.0 \ -" - -inherit meson pkgconfig - -BBCLASSEXTEND = "native nativesdk" diff --git a/meta-xilinx-core/recipes-devtools/bootgen/bootgen_2024.1.bb b/meta-xilinx-core/recipes-devtools/bootgen/bootgen_2024.2.bb similarity index 88% rename from meta-xilinx-core/recipes-devtools/bootgen/bootgen_2024.1.bb rename to meta-xilinx-core/recipes-devtools/bootgen/bootgen_2024.2.bb index 3e3577d54..ba6d829d1 100644 --- a/meta-xilinx-core/recipes-devtools/bootgen/bootgen_2024.1.bb +++ b/meta-xilinx-core/recipes-devtools/bootgen/bootgen_2024.2.bb @@ -4,14 +4,14 @@ DESCRIPTION = "Building and installing bootgen, a Xilinx tool that lets you stit LICENSE = "Apache-2.0" LIC_FILES_CHKSUM = "file://LICENSE;md5=d526b6d0807bf263b97da1da876f39b1" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" DEPENDS += "openssl" RDEPENDS:${PN} += "openssl" REPO ?= "git://github.com/Xilinx/bootgen.git;protocol=https" -BRANCH = "xlnx_rel_v2024.1" -SRCREV = "92e09bf37ea17d7b1f0e102a2548f27fb768651c" +BRANCH = "xlnx_rel_v2024.2" +SRCREV = "6f448fece5d999985128fd454ae047e065a5e45d" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" diff --git a/meta-xilinx-core/recipes-devtools/python/python3-anytree_2.8.0.bb b/meta-xilinx-core/recipes-devtools/python/python3-anytree_2.8.0.bb index 20210be9b..8bd6e6bc1 100644 --- a/meta-xilinx-core/recipes-devtools/python/python3-anytree_2.8.0.bb +++ b/meta-xilinx-core/recipes-devtools/python/python3-anytree_2.8.0.bb @@ -10,7 +10,7 @@ DEPENDS += "python3-six" SRC_URI = "git://github.com/c0fec0de/anytree.git;branch=2.x.x;protocol=https" SRCREV = "75c0198636f8997967ba00df5077cd21350f68ce" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit setuptools3 diff --git a/meta-xilinx-core/recipes-devtools/python/python3-bokeh_3.5.1.bb b/meta-xilinx-core/recipes-devtools/python/python3-bokeh_3.5.1.bb new file mode 100644 index 000000000..75295decf --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/python/python3-bokeh_3.5.1.bb @@ -0,0 +1,27 @@ +SUMMARY = "Interactive plots and applications in the browser from Python" +HOMEPAGE = "https://bokeh.org" +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=4d2241e774601133cb2c58ae1277f9a5" + +DEPENDS += " \ + python3-colorama-native \ + python3-setuptools-git-versioning-native \ + " + +SRC_URI[sha256sum] = "21dbe86842b24d83c73a1aef2de346a1a7c11c437015d6e9d180a1637e6e8197" + +inherit pypi python_setuptools_build_meta + +RDEPENDS:${PN} = " \ + python3-colorama \ + python3-contourpy \ + python3-jinja2 \ + python3-numpy \ + python3-packaging \ + python3-pandas \ + python3-pillow \ + python3-pyyaml \ + python3-tornado \ + python3-typing-extensions \ + python3-xyzservices \ + " diff --git a/meta-xilinx-core/recipes-devtools/python/python3-contourpy_1.2.1.bb b/meta-xilinx-core/recipes-devtools/python/python3-contourpy_1.2.1.bb new file mode 100644 index 000000000..5f21b0023 --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/python/python3-contourpy_1.2.1.bb @@ -0,0 +1,15 @@ +SUMMARY = "Python library for calculating contours of 2D quadrilateral grids" +HOMEPAGE = "https://github.com/contourpy/contourpy" +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://LICENSE;md5=a051d5dfc6ccbc7bbe3e626d65156784" + +DEPENDS += " \ + meson-native \ + python3-pybind11-native \ + " + +SRC_URI[sha256sum] = "4d8908b3bee1c889e547867ca4cdc54e5ab6be6d3e078556814a22457f49423c" + +inherit pypi python_mesonpy + +RDEPENDS:${PN} = "python3-numpy" diff --git a/meta-xilinx-core/recipes-devtools/python/python3-mercantile_1.2.1.bb b/meta-xilinx-core/recipes-devtools/python/python3-mercantile_1.2.1.bb new file mode 100644 index 000000000..33987e681 --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/python/python3-mercantile_1.2.1.bb @@ -0,0 +1,16 @@ +SUMMARY = "Web mercator XYZ tile utilities" +HOMEPAGE = "https://github.com/mapbox/mercantile" +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=11e1a3a1ec3801b170b9152c135e8f74 \ + file://docs/license.rst;md5=083a4719b463be5b728fd0e3f47db7e7" + +SRC_URI[sha256sum] = "fa3c6db15daffd58454ac198b31887519a19caccee3f9d63d17ae7ff61b3b56b" + +inherit pypi setuptools3 + +RDEPENDS:${PN} += " \ + python3-click \ + python3-core \ + python3-json \ + python3-logging \ + " diff --git a/meta-xilinx-core/recipes-devtools/python/python3-pybind11_2.13.1.bb b/meta-xilinx-core/recipes-devtools/python/python3-pybind11_2.13.1.bb new file mode 100644 index 000000000..3c03069b4 --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/python/python3-pybind11_2.13.1.bb @@ -0,0 +1,9 @@ +SUMMARY = "Seamless operability between C++11 and Python" +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://LICENSE;md5=774f65abd8a7fe3124be2cdf766cd06f" + +SRC_URI[sha256sum] = "65be498b1cac516161add1508e65375674916bebf2570d057dc9c3c7bcbbc7b0" + +inherit pypi python_setuptools_build_meta + +BBCLASSEXTEND += "native" diff --git a/meta-xilinx-core/recipes-devtools/python/python3-setuptools-git-versioning_2.0.0.bb b/meta-xilinx-core/recipes-devtools/python/python3-setuptools-git-versioning_2.0.0.bb new file mode 100644 index 000000000..53f04b77d --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/python/python3-setuptools-git-versioning_2.0.0.bb @@ -0,0 +1,20 @@ +SUMMARY = "Use git repo data for building a version number according PEP-440" +HOMEPAGE = "https://setuptools-git-versioning.readthedocs.io" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://LICENSE;md5=92e79e3a844e66731724600f3ac9c0d8" + +SRC_URI[sha256sum] = "85b5fbe7bda8e9c24bbd9e587a9d4b91129417f4dd3e11e3c0d5f3f835fc4d4d" + +inherit pypi setuptools3 + +RDEPENDS:${PN} += " \ + python3-core \ + python3-datetime \ + python3-logging \ + python3-packaging \ + python3-pprint \ + python3-setuptools \ + python3-tomllib \ + " + +BBCLASSEXTEND += "native" diff --git a/meta-xilinx-core/recipes-devtools/python/python3-xyzservices_2024.6.0.bb b/meta-xilinx-core/recipes-devtools/python/python3-xyzservices_2024.6.0.bb new file mode 100644 index 000000000..3e9b7ee18 --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/python/python3-xyzservices_2024.6.0.bb @@ -0,0 +1,20 @@ +SUMMARY = "Source of XYZ tiles providers" +HOMEPAGE = "https://github.com/geopandas/xyzservices" +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://LICENSE;md5=6a3e440ffacb99f21fa410467c048574" + +DEPENDS += "python3-setuptools-scm-native" + +SRC_URI[sha256sum] = "58c1bdab4257d2551b9ef91cd48571f77b7c4d2bc45bf5e3c05ac97b3a4d7282" + +inherit pypi python_setuptools_build_meta + +FILES:${PN} += "${prefix}" + +RDEPENDS:${PN} += " \ + python3-core \ + python3-json \ + python3-mercantile \ + python3-netclient \ + python3-requests \ + " diff --git a/meta-xilinx-core/recipes-devtools/qemu/flashstrip_1.0.bb b/meta-xilinx-core/recipes-devtools/qemu/flashstrip_1.0.bb index 11d9146cb..e1dcc5aea 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/flashstrip_1.0.bb +++ b/meta-xilinx-core/recipes-devtools/qemu/flashstrip_1.0.bb @@ -4,17 +4,17 @@ DESCRIPTION = "Building and installing flash strip utility" LICENSE = "MIT" LIC_FILES_CHKSUM = "file://../flash_stripe.c;beginline=1;endline=23;md5=abb859d98b7c4eede655e1b71824125a" -B = "${UNPACKDIR}/build" +B = "${WORKDIR}/build" SRC_URI += "file://flash_stripe.c" TARGET_CC_ARCH += "${LDFLAGS}" do_compile() { - ${CC} ${UNPACKDIR}/flash_stripe.c -o flash_strip - ${CC} ${UNPACKDIR}/flash_stripe.c -o flash_unstrip - ${CC} ${UNPACKDIR}/flash_stripe.c -o flash_strip_bw -DFLASH_STRIPE_BW - ${CC} ${UNPACKDIR}/flash_stripe.c -o flash_unstrip_bw -DUNSTRIP -DFLASH_STRIPE_BW + ${CC} ${WORKDIR}/flash_stripe.c -o flash_strip + ${CC} ${WORKDIR}/flash_stripe.c -o flash_unstrip + ${CC} ${WORKDIR}/flash_stripe.c -o flash_strip_bw -DFLASH_STRIPE_BW + ${CC} ${WORKDIR}/flash_stripe.c -o flash_unstrip_bw -DUNSTRIP -DFLASH_STRIPE_BW } do_install() { diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-8.1.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-8.1.inc index 7772fc298..5154e2476 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-8.1.inc +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-8.1.inc @@ -123,7 +123,7 @@ EXTRA_OECONF = " \ EXTRA_OECONF:append:class-target = " --cross-prefix=${HOST_PREFIX}" EXTRA_OECONF:append:class-nativesdk = " --cross-prefix=${HOST_PREFIX}" -B = "${UNPACKDIR}/build" +B = "${WORKDIR}/build" #EXTRA_OECONF:append = " --python=${HOSTTOOLS_DIR}/python3" @@ -148,11 +148,11 @@ do_install () { # If we built the guest agent, also install startup/udev rules if [ -e "${D}${bindir}/qemu-ga" ]; then install -d ${D}${sysconfdir}/init.d/ - install -m 0755 ${UNPACKDIR}/qemu-guest-agent.init ${D}${sysconfdir}/init.d/qemu-guest-agent + install -m 0755 ${WORKDIR}/qemu-guest-agent.init ${D}${sysconfdir}/init.d/qemu-guest-agent sed -i 's:@bindir@:${bindir}:' ${D}${sysconfdir}/init.d/qemu-guest-agent install -d ${D}${sysconfdir}/udev/rules.d/ - install -m 0644 ${UNPACKDIR}/qemu-guest-agent.udev ${D}${sysconfdir}/udev/rules.d/60-qemu-guest-agent.rules + install -m 0644 ${WORKDIR}/qemu-guest-agent.udev ${D}${sysconfdir}/udev/rules.d/60-qemu-guest-agent.rules install -d ${D}${systemd_unitdir}/system/ install -m 0644 ${S}/contrib/systemd/qemu-guest-agent.service ${D}${systemd_unitdir}/system diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-8.1/0001-python-rename-QEMUMonitorProtocol.cmd-to-cmd_raw.patch b/meta-xilinx-core/recipes-devtools/qemu/qemu-8.1/0001-python-rename-QEMUMonitorProtocol.cmd-to-cmd_raw.patch new file mode 100644 index 000000000..ff7f64ad6 --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-8.1/0001-python-rename-QEMUMonitorProtocol.cmd-to-cmd_raw.patch @@ -0,0 +1,81 @@ +From 84986d94277de2ac853cb613c37dbafe485f0981 Mon Sep 17 00:00:00 2001 +From: Vladimir Sementsov-Ogievskiy +Date: Fri, 6 Oct 2023 18:41:14 +0300 +Subject: [PATCH 1/2] python: rename QEMUMonitorProtocol.cmd() to cmd_raw() + +Having cmd() and command() methods in one class doesn't look good. +Rename cmd() to cmd_raw(), to show its meaning better. + +We also want to rename command() to cmd() in future, so this commit is +a necessary step. + +Signed-off-by: Vladimir Sementsov-Ogievskiy +Reviewed-by: Eric Blake +Message-id: 20231006154125.1068348-5-vsementsov@yandex-team.ru +Signed-off-by: John Snow + +Upstream-Status: Backport (37274707f6f3868fae7e0055d9a703006fc142d0) +Signed-off-by: Mark Hatle +--- + python/qemu/machine/machine.py | 2 +- + python/qemu/qmp/legacy.py | 8 ++------ + tests/qemu-iotests/iotests.py | 2 +- + 3 files changed, 4 insertions(+), 8 deletions(-) + +diff --git a/python/qemu/machine/machine.py b/python/qemu/machine/machine.py +index c16a0b6fed..82fa8cdddf 100644 +--- a/python/qemu/machine/machine.py ++++ b/python/qemu/machine/machine.py +@@ -686,7 +686,7 @@ def qmp(self, cmd: str, + conv_keys = True + + qmp_args = self._qmp_args(conv_keys, args) +- ret = self._qmp.cmd(cmd, args=qmp_args) ++ ret = self._qmp.cmd_raw(cmd, args=qmp_args) + if cmd == 'quit' and 'error' not in ret and 'return' in ret: + self._quit_issued = True + return ret +diff --git a/python/qemu/qmp/legacy.py b/python/qemu/qmp/legacy.py +index e1e9383978..e5fa1ce9c4 100644 +--- a/python/qemu/qmp/legacy.py ++++ b/python/qemu/qmp/legacy.py +@@ -194,21 +194,17 @@ def cmd_obj(self, qmp_cmd: QMPMessage) -> QMPMessage: + ) + ) + +- def cmd(self, name: str, +- args: Optional[Dict[str, object]] = None, +- cmd_id: Optional[object] = None) -> QMPMessage: ++ def cmd_raw(self, name: str, ++ args: Optional[Dict[str, object]] = None) -> QMPMessage: + """ + Build a QMP command and send it to the QMP Monitor. + + :param name: command name (string) + :param args: command arguments (dict) +- :param cmd_id: command id (dict, list, string or int) + """ + qmp_cmd: QMPMessage = {'execute': name} + if args: + qmp_cmd['arguments'] = args +- if cmd_id: +- qmp_cmd['id'] = cmd_id + return self.cmd_obj(qmp_cmd) + + def command(self, cmd: str, **kwds: object) -> QMPReturnValue: +diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py +index ef66fbd62b..8ffd9fb660 100644 +--- a/tests/qemu-iotests/iotests.py ++++ b/tests/qemu-iotests/iotests.py +@@ -460,7 +460,7 @@ def __init__(self, *args: str, instance_id: str = 'a', qmp: bool = False): + def qmp(self, cmd: str, args: Optional[Dict[str, object]] = None) \ + -> QMPMessage: + assert self._qmp is not None +- return self._qmp.cmd(cmd, args) ++ return self._qmp.cmd_raw(cmd, args) + + def get_qmp(self) -> QEMUMonitorProtocol: + assert self._qmp is not None +-- +2.34.1 + diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-8.1/0002-python-qemu-rename-command-to-cmd.patch b/meta-xilinx-core/recipes-devtools/qemu/qemu-8.1/0002-python-qemu-rename-command-to-cmd.patch new file mode 100644 index 000000000..e776a537d --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-8.1/0002-python-qemu-rename-command-to-cmd.patch @@ -0,0 +1,1011 @@ +From a7037d9661d40351b15d8c8bf209b512a7b5047e Mon Sep 17 00:00:00 2001 +From: Vladimir Sementsov-Ogievskiy +Date: Fri, 6 Oct 2023 18:41:15 +0300 +Subject: [PATCH 2/2] python/qemu: rename command() to cmd() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Use a shorter name. We are going to move in iotests from qmp() to +command() where possible. But command() is longer than qmp() and don't +look better. Let's rename. + +You can simply grep for '\.command(' and for 'def command(' to check +that everything is updated (command() in tests/docker/docker.py is +unrelated). + +Signed-off-by: Vladimir Sementsov-Ogievskiy +Reviewed-by: Daniel P. Berrangé +Reviewed-by: Eric Blake +Reviewed-by: Cédric Le Goater +Reviewed-by: Juan Quintela +Message-id: 20231006154125.1068348-6-vsementsov@yandex-team.ru +[vsementsov: also update three occurrences in + tests/avocado/machine_aspeed.py and keep r-b] +Signed-off-by: John Snow + +Upstream-status: Backport (684750ab4f8a3ad69512b71532408be3ac2547d4) + +Signed-off-by: Mark Hatle +--- + docs/devel/testing.rst | 10 +- + python/qemu/machine/machine.py | 8 +- + python/qemu/qmp/legacy.py | 2 +- + python/qemu/qmp/qmp_shell.py | 11 +- + python/qemu/utils/qemu_ga_client.py | 2 +- + python/qemu/utils/qom.py | 8 +- + python/qemu/utils/qom_common.py | 2 +- + python/qemu/utils/qom_fuse.py | 6 +- + scripts/cpu-x86-uarch-abi.py | 4 +- + scripts/device-crash-test | 8 +- + scripts/render_block_graph.py | 8 +- + tests/avocado/avocado_qemu/__init__.py | 4 +- + tests/avocado/cpu_queries.py | 5 +- + tests/avocado/hotplug_cpu.py | 10 +- + tests/avocado/info_usernet.py | 4 +- + tests/avocado/machine_arm_integratorcp.py | 6 +- + tests/avocado/machine_aspeed.py | 12 +- + tests/avocado/machine_m68k_nextcube.py | 4 +- + tests/avocado/machine_mips_malta.py | 6 +- + tests/avocado/machine_s390_ccw_virtio.py | 28 ++-- + tests/avocado/migration.py | 10 +- + tests/avocado/pc_cpu_hotplug_props.py | 2 +- + tests/avocado/version.py | 4 +- + tests/avocado/virtio_check_params.py | 6 +- + tests/avocado/virtio_version.py | 5 +- + tests/avocado/x86_cpu_model_versions.py | 13 +- + tests/migration/guestperf/engine.py | 150 +++++++++++----------- + tests/qemu-iotests/256 | 34 ++--- + tests/qemu-iotests/257 | 36 +++--- + 29 files changed, 207 insertions(+), 201 deletions(-) + +diff --git a/docs/devel/testing.rst b/docs/devel/testing.rst +index b6ad21bed1..dddf1d6140 100644 +--- a/docs/devel/testing.rst ++++ b/docs/devel/testing.rst +@@ -1014,8 +1014,8 @@ class. Here's a simple usage example: + """ + def test_qmp_human_info_version(self): + self.vm.launch() +- res = self.vm.command('human-monitor-command', +- command_line='info version') ++ res = self.vm.cmd('human-monitor-command', ++ command_line='info version') + self.assertRegexpMatches(res, r'^(\d+\.\d+\.\d)') + + To execute your test, run: +@@ -1065,15 +1065,15 @@ and hypothetical example follows: + first_machine.launch() + second_machine.launch() + +- first_res = first_machine.command( ++ first_res = first_machine.cmd( + 'human-monitor-command', + command_line='info version') + +- second_res = second_machine.command( ++ second_res = second_machine.cmd( + 'human-monitor-command', + command_line='info version') + +- third_res = self.get_vm(name='third_machine').command( ++ third_res = self.get_vm(name='third_machine').cmd( + 'human-monitor-command', + command_line='info version') + +diff --git a/python/qemu/machine/machine.py b/python/qemu/machine/machine.py +index 82fa8cdddf..0c48b76731 100644 +--- a/python/qemu/machine/machine.py ++++ b/python/qemu/machine/machine.py +@@ -691,16 +691,16 @@ def qmp(self, cmd: str, + self._quit_issued = True + return ret + +- def command(self, cmd: str, +- conv_keys: bool = True, +- **args: Any) -> QMPReturnValue: ++ def cmd(self, cmd: str, ++ conv_keys: bool = True, ++ **args: Any) -> QMPReturnValue: + """ + Invoke a QMP command. + On success return the response dict. + On failure raise an exception. + """ + qmp_args = self._qmp_args(conv_keys, args) +- ret = self._qmp.command(cmd, **qmp_args) ++ ret = self._qmp.cmd(cmd, **qmp_args) + if cmd == 'quit': + self._quit_issued = True + return ret +diff --git a/python/qemu/qmp/legacy.py b/python/qemu/qmp/legacy.py +index e5fa1ce9c4..22a2b5616e 100644 +--- a/python/qemu/qmp/legacy.py ++++ b/python/qemu/qmp/legacy.py +@@ -207,7 +207,7 @@ def cmd_raw(self, name: str, + qmp_cmd['arguments'] = args + return self.cmd_obj(qmp_cmd) + +- def command(self, cmd: str, **kwds: object) -> QMPReturnValue: ++ def cmd(self, cmd: str, **kwds: object) -> QMPReturnValue: + """ + Build and send a QMP command to the monitor, report errors if any + """ +diff --git a/python/qemu/qmp/qmp_shell.py b/python/qemu/qmp/qmp_shell.py +index 619ab42ced..08240c16f8 100644 +--- a/python/qemu/qmp/qmp_shell.py ++++ b/python/qemu/qmp/qmp_shell.py +@@ -194,11 +194,12 @@ def close(self) -> None: + super().close() + + def _fill_completion(self) -> None: +- cmds = self.cmd('query-commands') +- if 'error' in cmds: +- return +- for cmd in cmds['return']: +- self._completer.append(cmd['name']) ++ try: ++ cmds = cast(List[Dict[str, str]], self.cmd('query-commands')) ++ for cmd in cmds: ++ self._completer.append(cmd['name']) ++ except ExecuteError: ++ pass + + def _completer_setup(self) -> None: + self._completer = QMPCompleter() +diff --git a/python/qemu/utils/qemu_ga_client.py b/python/qemu/utils/qemu_ga_client.py +index d8411bb2d0..9a665e6e99 100644 +--- a/python/qemu/utils/qemu_ga_client.py ++++ b/python/qemu/utils/qemu_ga_client.py +@@ -64,7 +64,7 @@ + class QemuGuestAgent(QEMUMonitorProtocol): + def __getattr__(self, name: str) -> Callable[..., Any]: + def wrapper(**kwds: object) -> object: +- return self.command('guest-' + name.replace('_', '-'), **kwds) ++ return self.cmd('guest-' + name.replace('_', '-'), **kwds) + return wrapper + + +diff --git a/python/qemu/utils/qom.py b/python/qemu/utils/qom.py +index bcf192f477..426a0f245f 100644 +--- a/python/qemu/utils/qom.py ++++ b/python/qemu/utils/qom.py +@@ -84,7 +84,7 @@ def __init__(self, args: argparse.Namespace): + self.value = args.value + + def run(self) -> int: +- rsp = self.qmp.command( ++ rsp = self.qmp.cmd( + 'qom-set', + path=self.path, + property=self.prop, +@@ -129,7 +129,7 @@ def __init__(self, args: argparse.Namespace): + self.prop = tmp[1] + + def run(self) -> int: +- rsp = self.qmp.command( ++ rsp = self.qmp.cmd( + 'qom-get', + path=self.path, + property=self.prop +@@ -231,8 +231,8 @@ def _list_node(self, path: str) -> None: + if item.child: + continue + try: +- rsp = self.qmp.command('qom-get', path=path, +- property=item.name) ++ rsp = self.qmp.cmd('qom-get', path=path, ++ property=item.name) + print(f" {item.name}: {rsp} ({item.type})") + except ExecuteError as err: + print(f" {item.name}: ({item.type})") +diff --git a/python/qemu/utils/qom_common.py b/python/qemu/utils/qom_common.py +index 80da1b2304..dd2c8b1908 100644 +--- a/python/qemu/utils/qom_common.py ++++ b/python/qemu/utils/qom_common.py +@@ -140,7 +140,7 @@ def qom_list(self, path: str) -> List[ObjectPropertyInfo]: + """ + :return: a strongly typed list from the 'qom-list' command. + """ +- rsp = self.qmp.command('qom-list', path=path) ++ rsp = self.qmp.cmd('qom-list', path=path) + # qom-list returns List[ObjectPropertyInfo] + assert isinstance(rsp, list) + return [ObjectPropertyInfo.make(x) for x in rsp] +diff --git a/python/qemu/utils/qom_fuse.py b/python/qemu/utils/qom_fuse.py +index 8dcd59fcde..cf7e344bd5 100644 +--- a/python/qemu/utils/qom_fuse.py ++++ b/python/qemu/utils/qom_fuse.py +@@ -137,7 +137,7 @@ def read(self, path: str, size: int, offset: int, fh: IO[bytes]) -> bytes: + if path == '': + path = '/' + try: +- data = str(self.qmp.command('qom-get', path=path, property=prop)) ++ data = str(self.qmp.cmd('qom-get', path=path, property=prop)) + data += '\n' # make values shell friendly + except ExecuteError as err: + raise FuseOSError(EPERM) from err +@@ -152,8 +152,8 @@ def readlink(self, path: str) -> Union[bool, str]: + return False + path, prop = path.rsplit('/', 1) + prefix = '/'.join(['..'] * (len(path.split('/')) - 1)) +- return prefix + str(self.qmp.command('qom-get', path=path, +- property=prop)) ++ return prefix + str(self.qmp.cmd('qom-get', path=path, ++ property=prop)) + + def getattr(self, path: str, + fh: Optional[IO[bytes]] = None) -> Mapping[str, object]: +diff --git a/scripts/cpu-x86-uarch-abi.py b/scripts/cpu-x86-uarch-abi.py +index 82ff07582f..379a3c64bd 100644 +--- a/scripts/cpu-x86-uarch-abi.py ++++ b/scripts/cpu-x86-uarch-abi.py +@@ -94,8 +94,8 @@ + + for name in sorted(names): + cpu = shell.cmd("query-cpu-model-expansion", +- { "type": "static", +- "model": { "name": name }}) ++ { "type": "static", ++ "model": { "name": name }}) + + got = {} + for (feature, present) in cpu["return"]["model"]["props"].items(): +diff --git a/scripts/device-crash-test b/scripts/device-crash-test +index b74d887331..9bf9d0d6e6 100755 +--- a/scripts/device-crash-test ++++ b/scripts/device-crash-test +@@ -269,14 +269,14 @@ def formatTestCase(t): + + def qomListTypeNames(vm, **kwargs): + """Run qom-list-types QMP command, return type names""" +- types = vm.command('qom-list-types', **kwargs) ++ types = vm.cmd('qom-list-types', **kwargs) + return [t['name'] for t in types] + + + def infoQDM(vm): + """Parse 'info qdm' output""" + args = {'command-line': 'info qdm'} +- devhelp = vm.command('human-monitor-command', **args) ++ devhelp = vm.cmd('human-monitor-command', **args) + for l in devhelp.split('\n'): + l = l.strip() + if l == '' or l.endswith(':'): +@@ -304,9 +304,9 @@ class QemuBinaryInfo(object): + # there's no way to query DeviceClass::user_creatable using QMP, + # so use 'info qdm': + self.no_user_devs = set([d['name'] for d in infoQDM(vm, ) if d['no-user']]) +- self.machines = list(m['name'] for m in vm.command('query-machines')) ++ self.machines = list(m['name'] for m in vm.cmd('query-machines')) + self.user_devs = self.alldevs.difference(self.no_user_devs) +- self.kvm_available = vm.command('query-kvm')['enabled'] ++ self.kvm_available = vm.cmd('query-kvm')['enabled'] + finally: + vm.shutdown() + +diff --git a/scripts/render_block_graph.py b/scripts/render_block_graph.py +index 8f731a5cfe..3e1a2e3fa7 100755 +--- a/scripts/render_block_graph.py ++++ b/scripts/render_block_graph.py +@@ -43,13 +43,13 @@ def render_block_graph(qmp, filename, format='png'): + representation in @format into "@filename.@format" + ''' + +- bds_nodes = qmp.command('query-named-block-nodes') ++ bds_nodes = qmp.cmd('query-named-block-nodes') + bds_nodes = {n['node-name']: n for n in bds_nodes} + +- job_nodes = qmp.command('query-block-jobs') ++ job_nodes = qmp.cmd('query-block-jobs') + job_nodes = {n['device']: n for n in job_nodes} + +- block_graph = qmp.command('x-debug-query-block-graph') ++ block_graph = qmp.cmd('x-debug-query-block-graph') + + graph = Digraph(comment='Block Nodes Graph') + graph.format = format +@@ -94,7 +94,7 @@ class LibvirtGuest(): + def __init__(self, name): + self.name = name + +- def command(self, cmd): ++ def cmd(self, cmd): + # only supports qmp commands without parameters + m = {'execute': cmd} + ar = ['virsh', 'qemu-monitor-command', self.name, json.dumps(m)] +diff --git a/tests/avocado/avocado_qemu/__init__.py b/tests/avocado/avocado_qemu/__init__.py +index 33090903f1..1a4d40a46f 100644 +--- a/tests/avocado/avocado_qemu/__init__.py ++++ b/tests/avocado/avocado_qemu/__init__.py +@@ -408,8 +408,8 @@ class LinuxSSHMixIn: + + def ssh_connect(self, username, credential, credential_is_key=True): + self.ssh_logger = logging.getLogger('ssh') +- res = self.vm.command('human-monitor-command', +- command_line='info usernet') ++ res = self.vm.cmd('human-monitor-command', ++ command_line='info usernet') + port = get_info_usernet_hostfwd_port(res) + self.assertIsNotNone(port) + self.assertGreater(port, 0) +diff --git a/tests/avocado/cpu_queries.py b/tests/avocado/cpu_queries.py +index cf69f69b11..86c2d5c92d 100644 +--- a/tests/avocado/cpu_queries.py ++++ b/tests/avocado/cpu_queries.py +@@ -23,12 +23,13 @@ def test(self): + self.vm.add_args('-S') + self.vm.launch() + +- cpus = self.vm.command('query-cpu-definitions') ++ cpus = self.vm.cmd('query-cpu-definitions') + for c in cpus: + self.log.info("Checking CPU: %s", c) + self.assertNotIn('', c['unavailable-features'], c['name']) + + for c in cpus: + model = {'name': c['name']} +- e = self.vm.command('query-cpu-model-expansion', model=model, type='full') ++ e = self.vm.cmd('query-cpu-model-expansion', model=model, ++ type='full') + self.assertEquals(e['model']['name'], c['name']) +diff --git a/tests/avocado/hotplug_cpu.py b/tests/avocado/hotplug_cpu.py +index 6374bf1b54..292bb43e4d 100644 +--- a/tests/avocado/hotplug_cpu.py ++++ b/tests/avocado/hotplug_cpu.py +@@ -29,9 +29,9 @@ def test(self): + with self.assertRaises(AssertionError): + self.ssh_command('test -e /sys/devices/system/cpu/cpu1') + +- self.vm.command('device_add', +- driver='Haswell-x86_64-cpu', +- socket_id=0, +- core_id=1, +- thread_id=0) ++ self.vm.cmd('device_add', ++ driver='Haswell-x86_64-cpu', ++ socket_id=0, ++ core_id=1, ++ thread_id=0) + self.ssh_command('test -e /sys/devices/system/cpu/cpu1') +diff --git a/tests/avocado/info_usernet.py b/tests/avocado/info_usernet.py +index fdc4d90c42..e1aa7a6e0a 100644 +--- a/tests/avocado/info_usernet.py ++++ b/tests/avocado/info_usernet.py +@@ -22,8 +22,8 @@ def test_hostfwd(self): + self.require_netdev('user') + self.vm.add_args('-netdev', 'user,id=vnet,hostfwd=:127.0.0.1:0-:22') + self.vm.launch() +- res = self.vm.command('human-monitor-command', +- command_line='info usernet') ++ res = self.vm.cmd('human-monitor-command', ++ command_line='info usernet') + port = get_info_usernet_hostfwd_port(res) + self.assertIsNotNone(port, + ('"info usernet" output content does not seem to ' +diff --git a/tests/avocado/machine_arm_integratorcp.py b/tests/avocado/machine_arm_integratorcp.py +index 1ffe1073ef..87f5cf3953 100644 +--- a/tests/avocado/machine_arm_integratorcp.py ++++ b/tests/avocado/machine_arm_integratorcp.py +@@ -81,9 +81,9 @@ def test_framebuffer_tux_logo(self): + self.boot_integratorcp() + framebuffer_ready = 'Console: switching to colour frame buffer device' + wait_for_console_pattern(self, framebuffer_ready) +- self.vm.command('human-monitor-command', command_line='stop') +- self.vm.command('human-monitor-command', +- command_line='screendump %s' % screendump_path) ++ self.vm.cmd('human-monitor-command', command_line='stop') ++ self.vm.cmd('human-monitor-command', ++ command_line='screendump %s' % screendump_path) + logger = logging.getLogger('framebuffer') + + cpu_count = 1 +diff --git a/tests/avocado/machine_aspeed.py b/tests/avocado/machine_aspeed.py +index 724ee72c02..68619bbbdc 100644 +--- a/tests/avocado/machine_aspeed.py ++++ b/tests/avocado/machine_aspeed.py +@@ -181,8 +181,8 @@ def test_arm_ast2500_evb_buildroot(self): + 'i2c i2c-3: new_device: Instantiated device lm75 at 0x4d'); + exec_command_and_wait_for_pattern(self, + 'cat /sys/class/hwmon/hwmon1/temp1_input', '0') +- self.vm.command('qom-set', path='/machine/peripheral/tmp-test', +- property='temperature', value=18000); ++ self.vm.cmd('qom-set', path='/machine/peripheral/tmp-test', ++ property='temperature', value=18000); + exec_command_and_wait_for_pattern(self, + 'cat /sys/class/hwmon/hwmon1/temp1_input', '18000') + +@@ -213,8 +213,8 @@ def test_arm_ast2600_evb_buildroot(self): + 'i2c i2c-3: new_device: Instantiated device lm75 at 0x4d'); + exec_command_and_wait_for_pattern(self, + 'cat /sys/class/hwmon/hwmon0/temp1_input', '0') +- self.vm.command('qom-set', path='/machine/peripheral/tmp-test', +- property='temperature', value=18000); ++ self.vm.cmd('qom-set', path='/machine/peripheral/tmp-test', ++ property='temperature', value=18000); + exec_command_and_wait_for_pattern(self, + 'cat /sys/class/hwmon/hwmon0/temp1_input', '18000') + +@@ -357,8 +357,8 @@ def test_arm_ast2600_evb_sdk(self): + 'i2c i2c-5: new_device: Instantiated device lm75 at 0x4d'); + self.ssh_command_output_contains( + 'cat /sys/class/hwmon/hwmon19/temp1_input', '0') +- self.vm.command('qom-set', path='/machine/peripheral/tmp-test', +- property='temperature', value=18000); ++ self.vm.cmd('qom-set', path='/machine/peripheral/tmp-test', ++ property='temperature', value=18000); + self.ssh_command_output_contains( + 'cat /sys/class/hwmon/hwmon19/temp1_input', '18000') + +diff --git a/tests/avocado/machine_m68k_nextcube.py b/tests/avocado/machine_m68k_nextcube.py +index 6790e7d9cd..d6da2fbb01 100644 +--- a/tests/avocado/machine_m68k_nextcube.py ++++ b/tests/avocado/machine_m68k_nextcube.py +@@ -43,8 +43,8 @@ def check_bootrom_framebuffer(self, screenshot_path): + # 'displaysurface_create 1120x832' trace-event. + time.sleep(2) + +- self.vm.command('human-monitor-command', +- command_line='screendump %s' % screenshot_path) ++ self.vm.cmd('human-monitor-command', ++ command_line='screendump %s' % screenshot_path) + + @skipUnless(PIL_AVAILABLE, 'Python PIL not installed') + def test_bootrom_framebuffer_size(self): +diff --git a/tests/avocado/machine_mips_malta.py b/tests/avocado/machine_mips_malta.py +index 92233451c5..9bd54518bf 100644 +--- a/tests/avocado/machine_mips_malta.py ++++ b/tests/avocado/machine_mips_malta.py +@@ -71,9 +71,9 @@ def do_test_i6400_framebuffer_logo(self, cpu_cores_count): + framebuffer_ready = 'Console: switching to colour frame buffer device' + wait_for_console_pattern(self, framebuffer_ready, + failure_message='Kernel panic - not syncing') +- self.vm.command('human-monitor-command', command_line='stop') +- self.vm.command('human-monitor-command', +- command_line='screendump %s' % screendump_path) ++ self.vm.cmd('human-monitor-command', command_line='stop') ++ self.vm.cmd('human-monitor-command', ++ command_line='screendump %s' % screendump_path) + logger = logging.getLogger('framebuffer') + + match_threshold = 0.95 +diff --git a/tests/avocado/machine_s390_ccw_virtio.py b/tests/avocado/machine_s390_ccw_virtio.py +index e7a2a20ba6..e1f493bc44 100644 +--- a/tests/avocado/machine_s390_ccw_virtio.py ++++ b/tests/avocado/machine_s390_ccw_virtio.py +@@ -107,10 +107,10 @@ def test_s390x_devices(self): + 'dd if=/dev/hwrng of=/dev/null bs=1k count=10', + '10+0 records out') + self.clear_guest_dmesg() +- self.vm.command('device_del', id='rn1') ++ self.vm.cmd('device_del', id='rn1') + self.wait_for_crw_reports() + self.clear_guest_dmesg() +- self.vm.command('device_del', id='rn2') ++ self.vm.cmd('device_del', id='rn2') + self.wait_for_crw_reports() + exec_command_and_wait_for_pattern(self, + 'dd if=/dev/hwrng of=/dev/null bs=1k count=10', +@@ -132,8 +132,8 @@ def test_s390x_devices(self): + '0x0000000c') + # add another device + self.clear_guest_dmesg() +- self.vm.command('device_add', driver='virtio-net-ccw', +- devno='fe.0.4711', id='net_4711') ++ self.vm.cmd('device_add', driver='virtio-net-ccw', ++ devno='fe.0.4711', id='net_4711') + self.wait_for_crw_reports() + exec_command_and_wait_for_pattern(self, 'for i in 1 2 3 4 5 6 7 ; do ' + 'if [ -e /sys/bus/ccw/devices/*4711 ]; then break; fi ;' +@@ -141,7 +141,7 @@ def test_s390x_devices(self): + '0.0.4711') + # and detach it again + self.clear_guest_dmesg() +- self.vm.command('device_del', id='net_4711') ++ self.vm.cmd('device_del', id='net_4711') + self.vm.event_wait(name='DEVICE_DELETED', + match={'data': {'device': 'net_4711'}}) + self.wait_for_crw_reports() +@@ -151,10 +151,10 @@ def test_s390x_devices(self): + # test the virtio-balloon device + exec_command_and_wait_for_pattern(self, 'head -n 1 /proc/meminfo', + 'MemTotal: 115640 kB') +- self.vm.command('human-monitor-command', command_line='balloon 96') ++ self.vm.cmd('human-monitor-command', command_line='balloon 96') + exec_command_and_wait_for_pattern(self, 'head -n 1 /proc/meminfo', + 'MemTotal: 82872 kB') +- self.vm.command('human-monitor-command', command_line='balloon 128') ++ self.vm.cmd('human-monitor-command', command_line='balloon 128') + exec_command_and_wait_for_pattern(self, 'head -n 1 /proc/meminfo', + 'MemTotal: 115640 kB') + +@@ -245,7 +245,7 @@ def test_s390x_fedora(self): + '12+0 records out') + with tempfile.NamedTemporaryFile(suffix='.ppm', + prefix='qemu-scrdump-') as ppmfile: +- self.vm.command('screendump', filename=ppmfile.name) ++ self.vm.cmd('screendump', filename=ppmfile.name) + ppmfile.seek(0) + line = ppmfile.readline() + self.assertEqual(line, b"P6\n") +@@ -261,16 +261,16 @@ def test_s390x_fedora(self): + # Hot-plug a virtio-crypto device and see whether it gets accepted + self.log.info("Test hot-plug virtio-crypto device") + self.clear_guest_dmesg() +- self.vm.command('object-add', qom_type='cryptodev-backend-builtin', +- id='cbe0') +- self.vm.command('device_add', driver='virtio-crypto-ccw', id='crypdev0', +- cryptodev='cbe0', devno='fe.0.2342') ++ self.vm.cmd('object-add', qom_type='cryptodev-backend-builtin', ++ id='cbe0') ++ self.vm.cmd('device_add', driver='virtio-crypto-ccw', id='crypdev0', ++ cryptodev='cbe0', devno='fe.0.2342') + exec_command_and_wait_for_pattern(self, + 'while ! (dmesg -c | grep Accelerator.device) ; do' + ' sleep 1 ; done', 'Accelerator device is ready') + exec_command_and_wait_for_pattern(self, 'lscss', '0.0.2342') +- self.vm.command('device_del', id='crypdev0') +- self.vm.command('object-del', id='cbe0') ++ self.vm.cmd('device_del', id='crypdev0') ++ self.vm.cmd('object-del', id='cbe0') + exec_command_and_wait_for_pattern(self, + 'while ! (dmesg -c | grep Start.virtcrypto_remove) ; do' + ' sleep 1 ; done', 'Start virtcrypto_remove.') +diff --git a/tests/avocado/migration.py b/tests/avocado/migration.py +index fdc1d234fb..09b62f813e 100644 +--- a/tests/avocado/migration.py ++++ b/tests/avocado/migration.py +@@ -30,7 +30,7 @@ class MigrationTest(QemuSystemTest): + + @staticmethod + def migration_finished(vm): +- return vm.command('query-migrate')['status'] in ('completed', 'failed') ++ return vm.cmd('query-migrate')['status'] in ('completed', 'failed') + + def assert_migration(self, src_vm, dst_vm): + wait.wait_for(self.migration_finished, +@@ -41,10 +41,10 @@ def assert_migration(self, src_vm, dst_vm): + timeout=self.timeout, + step=0.1, + args=(dst_vm,)) +- self.assertEqual(src_vm.command('query-migrate')['status'], 'completed') +- self.assertEqual(dst_vm.command('query-migrate')['status'], 'completed') +- self.assertEqual(dst_vm.command('query-status')['status'], 'running') +- self.assertEqual(src_vm.command('query-status')['status'],'postmigrate') ++ self.assertEqual(src_vm.cmd('query-migrate')['status'], 'completed') ++ self.assertEqual(dst_vm.cmd('query-migrate')['status'], 'completed') ++ self.assertEqual(dst_vm.cmd('query-status')['status'], 'running') ++ self.assertEqual(src_vm.cmd('query-status')['status'],'postmigrate') + + def do_migrate(self, dest_uri, src_uri=None): + dest_vm = self.get_vm('-incoming', dest_uri) +diff --git a/tests/avocado/pc_cpu_hotplug_props.py b/tests/avocado/pc_cpu_hotplug_props.py +index 52b878188e..b56f51d02a 100644 +--- a/tests/avocado/pc_cpu_hotplug_props.py ++++ b/tests/avocado/pc_cpu_hotplug_props.py +@@ -32,4 +32,4 @@ def test_no_die_id(self): + self.vm.add_args('-smp', '1,sockets=2,cores=2,threads=2,maxcpus=8') + self.vm.add_args('-device', 'qemu64-x86_64-cpu,socket-id=1,core-id=0,thread-id=0') + self.vm.launch() +- self.assertEquals(len(self.vm.command('query-cpus-fast')), 2) ++ self.assertEquals(len(self.vm.cmd('query-cpus-fast')), 2) +diff --git a/tests/avocado/version.py b/tests/avocado/version.py +index dd775955eb..93ffdf3d97 100644 +--- a/tests/avocado/version.py ++++ b/tests/avocado/version.py +@@ -20,6 +20,6 @@ class Version(QemuSystemTest): + def test_qmp_human_info_version(self): + self.vm.add_args('-nodefaults') + self.vm.launch() +- res = self.vm.command('human-monitor-command', +- command_line='info version') ++ res = self.vm.cmd('human-monitor-command', ++ command_line='info version') + self.assertRegexpMatches(res, r'^(\d+\.\d+\.\d)') +diff --git a/tests/avocado/virtio_check_params.py b/tests/avocado/virtio_check_params.py +index 4093da8a67..f4314ef824 100644 +--- a/tests/avocado/virtio_check_params.py ++++ b/tests/avocado/virtio_check_params.py +@@ -51,8 +51,8 @@ def query_virtqueue(self, vm, dev_type_name): + error = None + props = None + +- output = vm.command('human-monitor-command', +- command_line = 'info qtree') ++ output = vm.cmd('human-monitor-command', ++ command_line = 'info qtree') + props_list = DEV_TYPES[dev_type_name].values(); + pattern = self.make_pattern(props_list) + res = re.findall(pattern, output) +@@ -121,7 +121,7 @@ def test_machine_types(self): + # collect all machine types except 'none', 'isapc', 'microvm' + with QEMUMachine(self.qemu_bin) as vm: + vm.launch() +- machines = [m['name'] for m in vm.command('query-machines')] ++ machines = [m['name'] for m in vm.cmd('query-machines')] + vm.shutdown() + machines.remove('none') + machines.remove('isapc') +diff --git a/tests/avocado/virtio_version.py b/tests/avocado/virtio_version.py +index c84e48813a..afe5e828b5 100644 +--- a/tests/avocado/virtio_version.py ++++ b/tests/avocado/virtio_version.py +@@ -48,7 +48,8 @@ def pci_modern_device_id(virtio_devid): + return virtio_devid + 0x1040 + + def devtype_implements(vm, devtype, implements): +- return devtype in [d['name'] for d in vm.command('qom-list-types', implements=implements)] ++ return devtype in [d['name'] for d in ++ vm.cmd('qom-list-types', implements=implements)] + + def get_pci_interfaces(vm, devtype): + interfaces = ('pci-express-device', 'conventional-pci-device') +@@ -78,7 +79,7 @@ def run_device(self, devtype, opts=None, machine='pc'): + vm.add_args('-S') + vm.launch() + +- pcibuses = vm.command('query-pci') ++ pcibuses = vm.cmd('query-pci') + alldevs = [dev for bus in pcibuses for dev in bus['devices']] + devfortest = [dev for dev in alldevs + if dev['qdev_id'] == 'devfortest'] +diff --git a/tests/avocado/x86_cpu_model_versions.py b/tests/avocado/x86_cpu_model_versions.py +index a6edf74c1c..9e07b8a55d 100644 +--- a/tests/avocado/x86_cpu_model_versions.py ++++ b/tests/avocado/x86_cpu_model_versions.py +@@ -84,7 +84,8 @@ def test_4_0_alias_compatibility(self): + # with older QEMU versions that didn't have the versioned CPU model + self.vm.add_args('-S') + self.vm.launch() +- cpus = dict((m['name'], m) for m in self.vm.command('query-cpu-definitions')) ++ cpus = dict((m['name'], m) for m in ++ self.vm.cmd('query-cpu-definitions')) + + self.assertFalse(cpus['Cascadelake-Server']['static'], + 'unversioned Cascadelake-Server CPU model must not be static') +@@ -115,7 +116,8 @@ def test_4_1_alias(self): + self.vm.add_args('-S') + self.vm.launch() + +- cpus = dict((m['name'], m) for m in self.vm.command('query-cpu-definitions')) ++ cpus = dict((m['name'], m) for m in ++ self.vm.cmd('query-cpu-definitions')) + + self.assertFalse(cpus['Cascadelake-Server']['static'], + 'unversioned Cascadelake-Server CPU model must not be static') +@@ -220,7 +222,8 @@ def test_none_alias(self): + self.vm.add_args('-S') + self.vm.launch() + +- cpus = dict((m['name'], m) for m in self.vm.command('query-cpu-definitions')) ++ cpus = dict((m['name'], m) for m in ++ self.vm.cmd('query-cpu-definitions')) + + self.assertFalse(cpus['Cascadelake-Server']['static'], + 'unversioned Cascadelake-Server CPU model must not be static') +@@ -246,8 +249,8 @@ class CascadelakeArchCapabilities(avocado_qemu.QemuSystemTest): + :avocado: tags=arch:x86_64 + """ + def get_cpu_prop(self, prop): +- cpu_path = self.vm.command('query-cpus-fast')[0].get('qom-path') +- return self.vm.command('qom-get', path=cpu_path, property=prop) ++ cpu_path = self.vm.cmd('query-cpus-fast')[0].get('qom-path') ++ return self.vm.cmd('qom-get', path=cpu_path, property=prop) + + def test_4_1(self): + """ +diff --git a/tests/migration/guestperf/engine.py b/tests/migration/guestperf/engine.py +index e69d16a62c..da96ca034a 100644 +--- a/tests/migration/guestperf/engine.py ++++ b/tests/migration/guestperf/engine.py +@@ -77,7 +77,7 @@ def _cpu_timing(self, pid): + return TimingRecord(pid, now, 1000 * (stime + utime) / jiffies_per_sec) + + def _migrate_progress(self, vm): +- info = vm.command("query-migrate") ++ info = vm.cmd("query-migrate") + + if "ram" not in info: + info["ram"] = {} +@@ -109,7 +109,7 @@ def _migrate(self, hardware, scenario, src, dst, connect_uri): + src_vcpu_time = [] + src_pid = src.get_pid() + +- vcpus = src.command("query-cpus-fast") ++ vcpus = src.cmd("query-cpus-fast") + src_threads = [] + for vcpu in vcpus: + src_threads.append(vcpu["thread-id"]) +@@ -128,82 +128,82 @@ def _migrate(self, hardware, scenario, src, dst, connect_uri): + if self._verbose: + print("Starting migration") + if scenario._auto_converge: +- resp = src.command("migrate-set-capabilities", +- capabilities = [ +- { "capability": "auto-converge", +- "state": True } +- ]) +- resp = src.command("migrate-set-parameters", +- cpu_throttle_increment=scenario._auto_converge_step) ++ resp = src.cmd("migrate-set-capabilities", ++ capabilities = [ ++ { "capability": "auto-converge", ++ "state": True } ++ ]) ++ resp = src.cmd("migrate-set-parameters", ++ cpu_throttle_increment=scenario._auto_converge_step) + + if scenario._post_copy: +- resp = src.command("migrate-set-capabilities", +- capabilities = [ +- { "capability": "postcopy-ram", +- "state": True } +- ]) +- resp = dst.command("migrate-set-capabilities", +- capabilities = [ +- { "capability": "postcopy-ram", +- "state": True } +- ]) +- +- resp = src.command("migrate-set-parameters", +- max_bandwidth=scenario._bandwidth * 1024 * 1024) +- +- resp = src.command("migrate-set-parameters", +- downtime_limit=scenario._downtime) ++ resp = src.cmd("migrate-set-capabilities", ++ capabilities = [ ++ { "capability": "postcopy-ram", ++ "state": True } ++ ]) ++ resp = dst.cmd("migrate-set-capabilities", ++ capabilities = [ ++ { "capability": "postcopy-ram", ++ "state": True } ++ ]) ++ ++ resp = src.cmd("migrate-set-parameters", ++ max_bandwidth=scenario._bandwidth * 1024 * 1024) ++ ++ resp = src.cmd("migrate-set-parameters", ++ downtime_limit=scenario._downtime) + + if scenario._compression_mt: +- resp = src.command("migrate-set-capabilities", +- capabilities = [ +- { "capability": "compress", +- "state": True } +- ]) +- resp = src.command("migrate-set-parameters", +- compress_threads=scenario._compression_mt_threads) +- resp = dst.command("migrate-set-capabilities", +- capabilities = [ +- { "capability": "compress", +- "state": True } +- ]) +- resp = dst.command("migrate-set-parameters", +- decompress_threads=scenario._compression_mt_threads) ++ resp = src.cmd("migrate-set-capabilities", ++ capabilities = [ ++ { "capability": "compress", ++ "state": True } ++ ]) ++ resp = src.cmd("migrate-set-parameters", ++ compress_threads=scenario._compression_mt_threads) ++ resp = dst.cmd("migrate-set-capabilities", ++ capabilities = [ ++ { "capability": "compress", ++ "state": True } ++ ]) ++ resp = dst.cmd("migrate-set-parameters", ++ decompress_threads=scenario._compression_mt_threads) + + if scenario._compression_xbzrle: +- resp = src.command("migrate-set-capabilities", +- capabilities = [ +- { "capability": "xbzrle", +- "state": True } +- ]) +- resp = dst.command("migrate-set-capabilities", +- capabilities = [ +- { "capability": "xbzrle", +- "state": True } +- ]) +- resp = src.command("migrate-set-parameters", +- xbzrle_cache_size=( +- hardware._mem * +- 1024 * 1024 * 1024 / 100 * +- scenario._compression_xbzrle_cache)) ++ resp = src.cmd("migrate-set-capabilities", ++ capabilities = [ ++ { "capability": "xbzrle", ++ "state": True } ++ ]) ++ resp = dst.cmd("migrate-set-capabilities", ++ capabilities = [ ++ { "capability": "xbzrle", ++ "state": True } ++ ]) ++ resp = src.cmd("migrate-set-parameters", ++ xbzrle_cache_size=( ++ hardware._mem * ++ 1024 * 1024 * 1024 / 100 * ++ scenario._compression_xbzrle_cache)) + + if scenario._multifd: +- resp = src.command("migrate-set-capabilities", +- capabilities = [ +- { "capability": "multifd", +- "state": True } +- ]) +- resp = src.command("migrate-set-parameters", +- multifd_channels=scenario._multifd_channels) +- resp = dst.command("migrate-set-capabilities", +- capabilities = [ +- { "capability": "multifd", +- "state": True } +- ]) +- resp = dst.command("migrate-set-parameters", +- multifd_channels=scenario._multifd_channels) +- +- resp = src.command("migrate", uri=connect_uri) ++ resp = src.cmd("migrate-set-capabilities", ++ capabilities = [ ++ { "capability": "multifd", ++ "state": True } ++ ]) ++ resp = src.cmd("migrate-set-parameters", ++ multifd_channels=scenario._multifd_channels) ++ resp = dst.cmd("migrate-set-capabilities", ++ capabilities = [ ++ { "capability": "multifd", ++ "state": True } ++ ]) ++ resp = dst.cmd("migrate-set-parameters", ++ multifd_channels=scenario._multifd_channels) ++ ++ resp = src.cmd("migrate", uri=connect_uri) + + post_copy = False + paused = False +@@ -228,7 +228,7 @@ def _migrate(self, hardware, scenario, src, dst, connect_uri): + + if progress._status in ("completed", "failed", "cancelled"): + if progress._status == "completed" and paused: +- dst.command("cont") ++ dst.cmd("cont") + if progress_history[-1] != progress: + progress_history.append(progress) + +@@ -256,13 +256,13 @@ def _migrate(self, hardware, scenario, src, dst, connect_uri): + if progress._ram._iterations > scenario._max_iters: + if self._verbose: + print("No completion after %d iterations over RAM" % scenario._max_iters) +- src.command("migrate_cancel") ++ src.cmd("migrate_cancel") + continue + + if time.time() > (start + scenario._max_time): + if self._verbose: + print("No completion after %d seconds" % scenario._max_time) +- src.command("migrate_cancel") ++ src.cmd("migrate_cancel") + continue + + if (scenario._post_copy and +@@ -270,7 +270,7 @@ def _migrate(self, hardware, scenario, src, dst, connect_uri): + not post_copy): + if self._verbose: + print("Switching to post-copy after %d iterations" % scenario._post_copy_iters) +- resp = src.command("migrate-start-postcopy") ++ resp = src.cmd("migrate-start-postcopy") + post_copy = True + + if (scenario._pause and +@@ -278,7 +278,7 @@ def _migrate(self, hardware, scenario, src, dst, connect_uri): + not paused): + if self._verbose: + print("Pausing VM after %d iterations" % scenario._pause_iters) +- resp = src.command("stop") ++ resp = src.cmd("stop") + paused = True + + def _is_ppc64le(self): +diff --git a/tests/qemu-iotests/256 b/tests/qemu-iotests/256 +index d7e67f4a05..f34af6cef7 100755 +--- a/tests/qemu-iotests/256 ++++ b/tests/qemu-iotests/256 +@@ -40,25 +40,25 @@ with iotests.FilePath('img0') as img0_path, \ + def create_target(filepath, name, size): + basename = os.path.basename(filepath) + nodename = "file_{}".format(basename) +- log(vm.command('blockdev-create', job_id='job1', +- options={ +- 'driver': 'file', +- 'filename': filepath, +- 'size': 0, +- })) ++ log(vm.cmd('blockdev-create', job_id='job1', ++ options={ ++ 'driver': 'file', ++ 'filename': filepath, ++ 'size': 0, ++ })) + vm.run_job('job1') +- log(vm.command('blockdev-add', driver='file', +- node_name=nodename, filename=filepath)) +- log(vm.command('blockdev-create', job_id='job2', +- options={ +- 'driver': iotests.imgfmt, +- 'file': nodename, +- 'size': size, +- })) ++ log(vm.cmd('blockdev-add', driver='file', ++ node_name=nodename, filename=filepath)) ++ log(vm.cmd('blockdev-create', job_id='job2', ++ options={ ++ 'driver': iotests.imgfmt, ++ 'file': nodename, ++ 'size': size, ++ })) + vm.run_job('job2') +- log(vm.command('blockdev-add', driver=iotests.imgfmt, +- node_name=name, +- file=nodename)) ++ log(vm.cmd('blockdev-add', driver=iotests.imgfmt, ++ node_name=name, ++ file=nodename)) + + log('--- Preparing images & VM ---\n') + vm.add_object('iothread,id=iothread0') +diff --git a/tests/qemu-iotests/257 b/tests/qemu-iotests/257 +index e7e7a2317e..7d3720b8e5 100755 +--- a/tests/qemu-iotests/257 ++++ b/tests/qemu-iotests/257 +@@ -160,26 +160,26 @@ class Drive: + file_node_name = "file_{}".format(basename) + vm = self.vm + +- log(vm.command('blockdev-create', job_id='bdc-file-job', +- options={ +- 'driver': 'file', +- 'filename': self.path, +- 'size': 0, +- })) ++ log(vm.cmd('blockdev-create', job_id='bdc-file-job', ++ options={ ++ 'driver': 'file', ++ 'filename': self.path, ++ 'size': 0, ++ })) + vm.run_job('bdc-file-job') +- log(vm.command('blockdev-add', driver='file', +- node_name=file_node_name, filename=self.path)) +- +- log(vm.command('blockdev-create', job_id='bdc-fmt-job', +- options={ +- 'driver': fmt, +- 'file': file_node_name, +- 'size': size, +- })) ++ log(vm.cmd('blockdev-add', driver='file', ++ node_name=file_node_name, filename=self.path)) ++ ++ log(vm.cmd('blockdev-create', job_id='bdc-fmt-job', ++ options={ ++ 'driver': fmt, ++ 'file': file_node_name, ++ 'size': size, ++ })) + vm.run_job('bdc-fmt-job') +- log(vm.command('blockdev-add', driver=fmt, +- node_name=name, +- file=file_node_name)) ++ log(vm.cmd('blockdev-add', driver=fmt, ++ node_name=name, ++ file=file_node_name)) + self.fmt = fmt + self.size = size + self.node = name +-- +2.34.1 + diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc index 6121cf889..26327ba3e 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc @@ -14,12 +14,12 @@ REPO ?= "git://github.com/Xilinx/qemu-devicetrees.git;protocol=https" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" -S = "${UNPACKDIR}/git" +SRC_URI += "file://0001-versal-Reorder-serial-ports.patch" +SRC_URI += "file://0001-versal-net-Reorder-serial-port.patch" -# Don't need to do anything -do_install() { - : -} +S = "${WORKDIR}/git" + +do_install[noexec] = '1' do_deploy() { # single-arch dtbs @@ -33,4 +33,7 @@ do_deploy() { done } -addtask deploy after do_install +addtask deploy after do_install before do_build + +COMPATIBLE_HOST:class-target = "none" +BBCLASSEXTEND = "native nativesdk" diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees/0001-versal-Reorder-serial-ports.patch b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees/0001-versal-Reorder-serial-ports.patch new file mode 100644 index 000000000..23ed36599 --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees/0001-versal-Reorder-serial-ports.patch @@ -0,0 +1,1466 @@ +From 2da2588a1dda1fd7fd2f6fc89db13cc5694d793e Mon Sep 17 00:00:00 2001 +From: Mark Hatle +Date: Sat, 24 Aug 2024 11:23:18 -0600 +Subject: [PATCH] versal: Reorder serial ports + +This change affects the order of the serial ports when calling qemu. +Previously the serial ports 0 & 1 were the PMC (firmware) uartlite, +while the standard serial pors were 2 & 3. Reverse this order to +ensure that the first two serial ports are the ones used by Linux. + +Signed-off-by: Mark Hatle +--- + board-versal-pmc-virt-alt.dts | 230 ++++++++++++++++ + board-versal-ps-vck190-alt.dts | 58 ++++ + board-versal-ps-virt-alt.dts | 354 +++++++++++++++++++++++++ + versal-pmc-alt.dtsi | 40 +++ + versal-pmc-ppu-alt.dtsi | 252 ++++++++++++++++++ + versal-ps-iou-alt.dtsi | 467 +++++++++++++++++++++++++++++++++ + 6 files changed, 1401 insertions(+) + create mode 100644 board-versal-pmc-virt-alt.dts + create mode 100644 board-versal-ps-vck190-alt.dts + create mode 100644 board-versal-ps-virt-alt.dts + create mode 100644 versal-pmc-alt.dtsi + create mode 100644 versal-pmc-ppu-alt.dtsi + create mode 100644 versal-ps-iou-alt.dtsi + +diff --git a/board-versal-pmc-virt-alt.dts b/board-versal-pmc-virt-alt.dts +new file mode 100644 +index 00000000..52d23c83 +--- /dev/null ++++ b/board-versal-pmc-virt-alt.dts +@@ -0,0 +1,230 @@ ++/* ++ * Versal Virtual PMC board device tree ++ * ++ * Copyright (c) 2016, Xilinx Inc ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of the nor the ++ * names of its contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ++ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ++ * DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY ++ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ++ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ++ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++/dts-v1/; ++ ++#ifndef VERSAL_NPI_OVERRIDE ++ #include "versal-npi-memmap.dtsh" ++#endif ++ ++#define VERSAL_NPI_GENERIC ++ ++#include "versal.dtsh" ++ ++#ifndef MULTI_ARCH ++#include "versal-pmc-alt.dtsi" ++#include "versal-psm.dtsi" ++#include "versal-ddrmc.dtsi" ++#include "versal-ps-iou-alt.dtsi" ++#include "versal-pmc-ppu-cpus.dtsi" ++#include "versal-psm-cpu.dtsi" ++ ++/ { ++ /* FIXME: Once we add the NOC, these should be attached to it. */ ++ MEM_REGION(ddr, 0x0, MM_TOP_DDR, 0x00000000, MM_TOP_DDR_SIZE, &ddr_mem) // 2 GB ++ MEM_SPEC(ddr_2, MM_TOP_DDR_2_H, MM_TOP_DDR_2_L, MM_TOP_DDR_2, ++ MM_TOP_DDR_2_SIZE_H, MM_TOP_DDR_2_SIZE_L, &ddr_2_mem) // 32 GB ++ ++ /* Dummy APUs. */ ++ cpu0: apu@0 { ++ }; ++ cpu1: apu@1 { ++ }; ++ rpu_cpu0: rpu_cpu0 { ++ }; ++ rpu_cpu1: rpu_cpu1 { ++ }; ++#ifndef HAVE_DDRMC_CPUS ++ ddrmc_ub0: ddrmc_ub@0 { ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ }; ++ ddrmc_ub1: ddrmc_ub@1 { ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ }; ++#endif ++ /* Dummy GIC. */ ++ gic: apu_gic@0 { ++ #interrupt-cells = <3>; ++ interrupt-controller; ++ }; ++}; ++ ++&pmc_qspi_0 { ++ SPI_FLASH(qspi_flash_lcs_lb,"m25qu02gcbb", 0x02000000, 0x0 0x0) ++ SPI_FLASH(qspi_flash_lcs_ub,"m25qu02gcbb", 0x02000000, 0x2 0x1) ++ SPI_FLASH(qspi_flash_ucs_lb,"m25qu02gcbb", 0x02000000, 0x1 0x0) ++ SPI_FLASH(qspi_flash_ucs_ub,"m25qu02gcbb", 0x02000000, 0x3 0x1) ++}; ++ ++&ospi { ++ SPI_FLASH(ospi_flash_lcs_lb, "mt35xu01gbba", 0x02000000, 0x0 0x0) ++ SPI_FLASH(ospi_flash_lcs_ub, "mt35xu01gbba", 0x02000000, 0x1 0x0) ++ SPI_FLASH(ospi_flash_ucs_lb, "mt35xu01gbba", 0x02000000, 0x2 0x0) ++ SPI_FLASH(ospi_flash_ucs_ub, "mt35xu01gbba", 0x02000000, 0x3 0x0) ++}; ++ ++#else ++#include "versal-icnt.dtsi" ++#include "versal-rams.dtsi" ++#include "versal-pmc-ppu-cpus.dtsi" ++#include "versal-psm-cpu.dtsi" ++ ++/ { ++ /* FIXME: Once we add the NOC, these should be attached to it. */ ++ MEM_REGION(ddr, 0x0, 0x00000000, 0x00000000, 0x80000000, &ddr_mem) ++ ++ ps_pmc_rp: ps_pmc_rp@0 { ++ doc-name = "Remote-port PMC-PS"; ++ compatible = "remote-port"; ++ chrdev-id = "ps-pmc-rp"; ++ }; ++ rp_pmc_ppu0: rp_pmc_ppu0@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 1>; ++ interrupts-extended = < &pmc_ppu0 0 >; ++ }; ++ rp_pmc_ppu1: rp_pmc_ppu1@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 2>; ++ interrupts-extended = < &pmc_ppu1 0 >; ++ }; ++ pmc_global: rp_pmc_global@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 3>; ++ #gpio-cells = <1>; ++ num-gpios = <16>; ++ }; ++ lmb_pmc_ppu0: lmb_pmc_ppu0@0 { ++ rp_lmb_pmc_ppu0@0 { ++ compatible = "remote-port-memory-master"; ++ remote-ports = <&ps_pmc_rp 4>; ++ reg = < 0x0 0x0 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF /* -1 */ >; ++ }; ++ }; ++ lmb_pmc_ppu1: lmb_pmc_ppu1@0 { ++ rp_lmb_pmc_ppu1@0 { ++ compatible = "remote-port-memory-master"; ++ remote-ports = <&ps_pmc_rp 5>; ++ reg = < 0x0 0x0 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF /* -1 */ >; ++ }; ++ }; ++ crl: crl@MM_CRL { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 6>; ++ #gpio-cells = <1>; ++ num-gpios = <35>; ++ }; ++ pmc_clk_rst: pmc_clk_rst@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 7>; ++ #gpio-cells = <1>; ++ num-gpios = <30>; ++ }; ++ rp_psm0: rp_psm0@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 8>; ++ interrupts-extended = < &psm0 0 >; ++ }; ++#ifdef MM_NPI_DDRMC_MAIN_0 ++ rp_ddrmc_ub0: rp_ddrmc_ub@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 9>; ++# ifdef HAVE_DDRMC_CPUS ++ interrupts-extended = < &ddrmc_ub0 0 >; ++# endif ++ }; ++ ++ npi_ddrmc_ub0: rp_npi_ddrmc_ub@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 11>; ++ #gpio-cells = <1>; ++ }; ++#endif ++#ifdef MM_NPI_DDRMC_MAIN_1 ++ rp_ddrmc_ub1: rp_ddrmc_ub@1 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 10>; ++ # ifdef HAVE_DDRMC_CPUS ++ interrupts-extended = < &ddrmc_ub1 0 >; ++ # endif ++ }; ++ ++ npi_ddrmc_ub1: rp_npi_ddrmc_ub@1 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 12>; ++ #gpio-cells = <1>; ++ }; ++#endif ++ lmb_psm: lmb_psm@0 { ++ rp_lmb_psm@0 { ++ compatible = "remote-port-memory-master"; ++ remote-ports = <&ps_pmc_rp 13>; ++ reg = < 0x0 0x0 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF /* -1 */ >; ++ }; ++ }; ++ ++ /* Dummy stub to avoid ifdefs in the interrupt-map. */ ++ pmc_gic_proxy: pmc_gic_proxy { ++ doc-ignore = <1>; ++ #interrupt-cells = <3>; ++ interrupt-controller; ++ }; ++ psm_gic_proxy: psm_gic_proxy { ++ doc-ignore = <1>; ++ #interrupt-cells = <3>; ++ interrupt-controller; ++ }; ++ psm0_io_intc: psm0_io_intc { ++ doc-ignore = <1>; ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ }; ++ pmc_ppu1_io_intc: pmc_ppu1_io_intc { ++ doc-ignore = <1>; ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ }; ++}; ++#endif ++ ++/ { ++ /* ++ * FIXME: This legacy hook will reset the entire PMC instance ++ * meaning PSM and PMC MicroBlazes for multi-arch and all ++ * devices for single-arch. ++ * Once the CPU reset infrastructure is improved, we should ++ * remove this. ++ */ ++ pmc_reset: pmc_reset@ { ++ compatible = "qemu,reset-device"; ++ gpios = <&pmc_clk_rst CRP_RST_PS_PMC_SRST>; ++ }; ++}; +diff --git a/board-versal-ps-vck190-alt.dts b/board-versal-ps-vck190-alt.dts +new file mode 100644 +index 00000000..b61d3d5c +--- /dev/null ++++ b/board-versal-ps-vck190-alt.dts +@@ -0,0 +1,58 @@ ++/* ++ * Versal Virtual vck190 board device tree ++ * ++ * Copyright (c) 2020, Xilinx Inc ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of the nor the ++ * names of its contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ++ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ++ * DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY ++ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ++ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ++ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++#include "board-versal-ps-virt-alt.dts" ++#include "versal-silicon-freq.dtsi" ++ ++/{ ++ MEM_REGION64(ddr_3, MM_TOP_DDR_CH1_H, MM_TOP_DDR_CH1_L, MM_TOP_DDR_CH1, ++ 0x2, 0x0, &ddr_3_mem) // 8 GB ++}; ++ ++&ps_i2c1 { ++ i2cswitch@74 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "nxp,pca9548"; ++ reg = <0x74>; ++ chip-enable = <0x1>; ++ i2c@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0>; ++ eeprom@54 { ++ compatible = "at,24c08"; ++ reg = <0x54>; ++ }; ++ }; ++ }; ++}; ++ ++&ospi_flash_lcs_lb { ++ compatible = "mt35xu02gbba"; ++}; +diff --git a/board-versal-ps-virt-alt.dts b/board-versal-ps-virt-alt.dts +new file mode 100644 +index 00000000..7585d196 +--- /dev/null ++++ b/board-versal-ps-virt-alt.dts +@@ -0,0 +1,354 @@ ++/* ++ * Versal Virtual PS board device tree ++ * ++ * Copyright (c) 2016-2022, Xilinx Inc. ++ * Copyright (C) 2022-2024, Advanced Micro Devices, Inc. ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of the nor the ++ * names of its contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ++ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ++ * DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY ++ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ++ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ++ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++#ifndef __BOARD_VERSAL_PS_VIRT__ ++#define __BOARD_VERSAL_PS_VIRT__ ++ ++/dts-v1/; ++#ifndef VERSAL_NPI_OVERRIDE ++ #include "versal-npi-memmap.dtsh" ++#endif ++ ++#ifndef NUM_APUS ++/* Base platform has 2 APUs. */ ++#define NUM_APUS 2 ++#endif ++ ++#define HAS_SMMU ++#define HAVE_APU_GIC ++ ++#ifndef RPU_GIC_INTERRUPT_TARGET_STEM ++#ifdef MULTI_ARCH ++ #define RPU_GIC_INTERRUPT_TARGET_STEM rpu_intc_redirect_ ++#else ++ #define RPU_GIC_INTERRUPT_TARGET_STEM rpu_cpu ++#endif ++#endif ++ ++#define VERSAL_NPI_GENERIC ++ ++#include "versal.dtsh" ++ ++#include "versal-pmc.dtsi" ++#include "versal-psm.dtsi" ++#include "versal-ddrmc.dtsi" ++#ifdef VERSAL_PSX ++#include "versal-psx-apu.dtsi" ++#else ++#include "versal-ps-apu.dtsi" ++#include "versal-ps-rpu.dtsi" ++#include "versal-boot-init.dtsi" ++#endif ++#include "versal-ps-iou-alt.dtsi" ++#include "versal-virtio-mmio.dtsi" ++#include "versal-boot-init.dtsi" ++#include "versal-gty.dtsi" ++#include "versal-silicon-freq.dtsi" ++ ++/ { ++#ifdef MULTI_ARCH ++ ps_pmc_rp: ps_pmc_rp@0 { ++ doc-status = "complete"; ++ doc-name = "Remote-port PMC"; ++ doc-subdtb = "board-versal-pmc-virt.dtb"; ++ compatible = "remote-port"; ++ chrdev-id = "ps-pmc-rp"; ++ }; ++ pmc_ppu0: rp_pmc_ppu0@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 1>; ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ }; ++ pmc_ppu1: rp_pmc_ppu1@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 2>; ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ }; ++ rp_pmc_global: rp_pmc_global@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 3>; ++ gpio-controller; ++ #gpio-cells = <1>; ++ num-gpios = <16>; ++ ++ /* We only need to proxy GPIO 1 and 2 (PPU1 RST and WAKE). */ ++ gpios = < &dummy1 0 ++ &pmc_global 1 ++ &pmc_global 2 >; ++ }; ++ rp_lmb_pmc_ppu0: rp_lmb_pmc_ppu0@0 { ++ compatible = "remote-port-memory-slave"; ++ remote-ports = <&ps_pmc_rp 4>; ++ mr = <&lmb_pmc_ppu0>; ++ }; ++ rp_lmb_pmc_ppu1: rp_lmb_pmc_ppu1@0 { ++ compatible = "remote-port-memory-slave"; ++ remote-ports = <&ps_pmc_rp 5>; ++ mr = <&lmb_pmc_ppu1>; ++ }; ++ rp_crl: rp_crl@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 6>; ++ gpio-controller; ++ #gpio-cells = <1>; ++ num-gpios = <35>; ++ ++ gpios = < ++ &crl 0 ++ &crl 1 ++ &crl 2 ++ &crl 3 ++ &crl 4 ++ &crl 5 ++ &crl 6 ++ &crl 7 ++ &crl 8 ++ &crl 9 ++ &crl 10 ++ &crl 11 ++ &crl 12 ++ &crl 13 ++ &crl 14 ++ &crl 15 ++ &crl 16 ++ &crl 17 ++ &crl 18 ++ &crl 19 ++ &crl 20 ++ &crl 21 ++ &crl 22 ++ &crl 23 ++ &crl 24 ++ &crl 25 ++ &crl 26 ++ &crl 27 ++ &crl 28 ++ &crl 29 ++ &crl 30 ++ &crl 31 ++ &dummy1 0 ++ &dummy1 0 ++ &crl 34 >; ++ }; ++ rp_pmc_clk_rst: rp_pmc_clk_rst@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 7>; ++ gpio-controller; ++ #gpio-cells = <1>; ++ num-gpios = <30>; ++ ++ gpios = < &pmc_clk_rst 0 &pmc_clk_rst 1 ++ &pmc_clk_rst 2 &pmc_clk_rst 3 ++ &pmc_clk_rst 4 &pmc_clk_rst 5 ++ &pmc_clk_rst 6 &pmc_clk_rst 7 ++ &pmc_clk_rst 8 &pmc_clk_rst 9 ++ &pmc_clk_rst 10 &pmc_clk_rst 11 ++ &pmc_clk_rst 12 &pmc_clk_rst 13 ++ &pmc_clk_rst 14 &pmc_clk_rst 15 ++ &pmc_clk_rst 16 &pmc_clk_rst 17 ++ &pmc_clk_rst 18 &pmc_clk_rst 19 ++ &pmc_clk_rst 20 &pmc_clk_rst 21 ++ &pmc_clk_rst 22 &pmc_clk_rst 23 ++ &pmc_clk_rst 24 &pmc_clk_rst 25 ++ &pmc_clk_rst 26 &pmc_clk_rst 27 ++ &pmc_clk_rst 28 &pmc_clk_rst 29 ++ >; ++ }; ++ psm0: rp_psm0@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 8>; ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ }; ++#ifdef MM_NPI_DDRMC_MAIN_0 ++ ddrmc_ub0: rp_ddrmc@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 9>; ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ }; ++ rp_npi_ddrmc_ub0: rp_npi_ddrmc_ub@0 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 11>; ++ gpios = < &npi_ddrmc_ub0 0 >; ++ }; ++#endif ++#ifdef MM_NPI_DDRMC_MAIN_1 ++ ddrmc_ub1: rp_ddrmc@1 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 10>; ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ }; ++ rp_npi_ddrmc_ub1: rp_npi_ddrmc_ub@1 { ++ compatible = "remote-port-gpio"; ++ remote-ports = <&ps_pmc_rp 12>; ++ gpios = < &npi_ddrmc_ub1 0 >; ++ }; ++#endif ++ rp_lmb_psm: rp_lmb_psm@0 { ++ compatible = "remote-port-memory-slave"; ++ remote-ports = <&ps_pmc_rp 13>; ++ mr = <&lmb_psm>; ++ }; ++ ++#define RPU_INTC_REDIRECT(NCPU, PSMOUT, RPUN) \ ++glue(rpu_intc_redirect_, NCPU): glue(rpu_intc_redirect, NCPU)@NCPU { \ ++ #interrupt-cells = <1>; \ ++ compatible = "xlnx,zynqmp-intc-redirect"; \ ++ interrupt-controller; \ ++ interrupts-extended = ; \ ++ gpios = <&psm_global PSMOUT &rpu_ctrl RPUN>; \ ++}; ++ ++ amba_rpu: amba_rpu@0 { ++ RPU_INTC_REDIRECT(0, 4, 6) ++ RPU_INTC_REDIRECT(1, 5, 7) ++ }; ++ ++#else ++ /* Single ARCH PS board has no PPU MicroBlazes. */ ++ pmc_ppu0: dummy_ppu0@0 { ++ #interrupt-cells = <1>; ++ }; ++ pmc_ppu1: dummy_ppu1@0 { ++ #interrupt-cells = <1>; ++ }; ++ psm0: dummy_ppu0@0 { ++ #interrupt-cells = <1>; ++ }; ++ ddrmc_ub0: dummy_ddrmc0@0 { ++ #interrupt-cells = <1>; ++ }; ++ ddrmc_ub1: dummy_ddrmc1@0 { ++ #interrupt-cells = <1>; ++ }; ++#endif ++ ++ /* FIXME: Once we add the NOC, these should be attached to it. */ ++ MEM_REGION(ddr, 0x0, MM_TOP_DDR, 0x00000000, MM_TOP_DDR_SIZE, &ddr_mem) // 2 GB ++ MEM_SPEC(ddr_2, MM_TOP_DDR_2_H, MM_TOP_DDR_2_L, MM_TOP_DDR_2, ++ MM_TOP_DDR_2_SIZE_H, MM_TOP_DDR_2_SIZE_L, &ddr_2_mem) // 32 GB ++ mdio0: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ #priority-cells = <0>; ++ compatible="mdio"; ++ phy0: phy@1 { ++ compatible = "dp83867"; ++ device_type = "ethernet-phy"; ++ reg = <1>; ++ }; ++ phy1: phy@2 { ++ compatible = "88e1118r"; ++ device_type = "ethernet-phy"; ++ reg = <2>; ++ }; ++ }; ++}; ++ ++/* ++ * One flash for each SPI-master to match prebuilt system.dtb in BSP ++ * xilinx-versal-virt-2019.1 ++ */ ++#define BDEV_SPI_FLASH(_NAME, _COMPAT, _SIZEM, _REGVAL) \ ++_NAME: _NAME@0 { \ ++ #address-cells = <1>; \ ++ #size-cells = <1>; \ ++ #priority-cells = <0>; \ ++ #bus-cells = <1>; \ ++ compatible = _COMPAT, "st,m25p80"; \ ++ spi-max-frequency = <50000000>; \ ++ reg = <_REGVAL>; \ ++ blockdev-node-name = #_NAME; \ ++ _NAME@0x00000000 { \ ++ label = #_NAME; \ ++ reg = <0x00000000 _SIZEM>; \ ++ }; \ ++}; ++ ++&spi0 { ++ BDEV_SPI_FLASH(spi0_flash0, "m25p80", 0x00100000, 0x0 0x0) ++}; ++ ++&spi1 { ++ BDEV_SPI_FLASH(spi1_flash0, "m25p80", 0x00100000, 0x0 0x0) ++}; ++ ++/* ++ * Use 2Gbit QSPI flashes to allow verification of Image-searching ++ * in ROM upto 256MB. ++ */ ++#define DI_SPI_FLASH(_DI, _NAME, _COMPAT, _SIZEM, _REGVAL) \ ++_NAME: _NAME@0 { \ ++ #address-cells = <1>; \ ++ #size-cells = <1>; \ ++ #priority-cells = <0>; \ ++ #bus-cells = <1>; \ ++ compatible = _COMPAT, "st,m25p80"; \ ++ spi-max-frequency = <50000000>; \ ++ reg = <_REGVAL>; \ ++ drive-index = <_DI>; \ ++ _NAME@0x00000000 { \ ++ label = #_NAME; \ ++ reg = <0x00000000 _SIZEM>; \ ++ }; \ ++}; ++ ++&pmc_qspi_0 { ++ DI_SPI_FLASH(0, qspi_flash_lcs_lb, "m25qu02gcbb", 0x02000000, 0x0 0x0) ++ DI_SPI_FLASH(1, qspi_flash_lcs_ub, "m25qu02gcbb", 0x02000000, 0x2 0x1) ++ DI_SPI_FLASH(2, qspi_flash_ucs_lb, "m25qu02gcbb", 0x02000000, 0x1 0x0) ++ DI_SPI_FLASH(3, qspi_flash_ucs_ub, "m25qu02gcbb", 0x02000000, 0x3 0x1) ++}; ++ ++&ospi { ++ DI_SPI_FLASH(4, ospi_flash_lcs_lb, "mt35xu01gbba", 0x02000000, 0x0 0x0) ++ DI_SPI_FLASH(5, ospi_flash_lcs_ub, "mt35xu01gbba", 0x02000000, 0x1 0x0) ++ DI_SPI_FLASH(6, ospi_flash_ucs_lb, "mt35xu01gbba", 0x02000000, 0x2 0x0) ++ DI_SPI_FLASH(7, ospi_flash_ucs_ub, "mt35xu01gbba", 0x02000000, 0x3 0x0) ++}; ++ ++&gem0 { ++ mdio = <&mdio0>; ++}; ++ ++&gem1 { ++ mdio = <&mdio0>; ++}; ++ ++&pmc_tap { ++ /* ++ * Default device: xcvc1902 ++ */ ++ idcode = <0x14CA8093>; ++}; ++#endif +diff --git a/versal-pmc-alt.dtsi b/versal-pmc-alt.dtsi +new file mode 100644 +index 00000000..8236911b +--- /dev/null ++++ b/versal-pmc-alt.dtsi +@@ -0,0 +1,40 @@ ++/* ++ * Versal PMC ++ * ++ * Copyright (c) 2016, Xilinx Inc. ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of the nor the ++ * names of its contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ++ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ++ * DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY ++ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ++ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ++ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include "versal.dtsh" ++ ++#include "versal-icnt.dtsi" ++#include "versal-rams.dtsi" ++#include "versal-pmc-ppu-alt.dtsi" ++#include "versal-pmc-iou.dtsi" ++#include "versal-pmc-sys.dtsi" ++#include "versal-pmc-sec.dtsi" ++#include "versal-pmc-npi.dtsi" ++#include "versal-pmc-pl.dtsi" ++#include "versal-pmc-bat.dtsi" +diff --git a/versal-pmc-ppu-alt.dtsi b/versal-pmc-ppu-alt.dtsi +new file mode 100644 +index 00000000..726413f4 +--- /dev/null ++++ b/versal-pmc-ppu-alt.dtsi +@@ -0,0 +1,252 @@ ++/* ++ * Versal PMC PPU block ++ * ++ * Copyright (c) 2016, Xilinx Inc. ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of the nor the ++ * names of its contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ++ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ++ * DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY ++ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ++ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ++ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include "versal.dtsh" ++ ++#define CREATE_PPU_IOMOD(X) \ ++ pmc_ppu ## X ## _io_module: io-module@00 { \ ++ doc-status = "complete"; \ ++ #address-cells = <2>; \ ++ #size-cells = <1>; \ ++ #priority-cells = <0>; \ ++ compatible = "xlnx,iomodule-1.02.a", "syscon", "simple-bus"; \ ++ container = <&lmb_pmc_ppu ## X>; \ ++ priority = <0xffffffff>; \ ++ xlnx,freq = <0x47868c0>; \ ++ xlnx,instance = "iomodule_1"; \ ++ xlnx,io-mask = <0xfffe0000>; \ ++ xlnx,lmb-awidth = <0x20>; \ ++ xlnx,lmb-dwidth = <0x20>; \ ++ xlnx,mask = <0xffffff80>; \ ++ xlnx,use-io-bus = <0x1>; \ ++ \ ++ pmc_ppu ## X ## _io_intc: pmc_ppu ## X ## _intc@0C { \ ++ #interrupt-cells = <1>; \ ++ compatible = "xlnx,io-intc-1.02.a", "xlnx,io_intc"; \ ++ interrupt-controller ; \ ++ interrupts-extended = <&pmc_ppu ## X 0>; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(0C) 0x4 0x0 MM_PMC_PPU ## X ## _IOM(30) 0x10 0x0 MM_PMC_PPU ## X ## _IOM(80) 0x7C>; \ ++ xlnx,intc-addr-width = <0x20>; \ ++ xlnx,intc-base-vectors = <0x0>; \ ++ xlnx,intc-has-fast = <0x0>; \ ++ xlnx,intc-intr-size = <0x10>; \ ++ xlnx,intc-level-edge = <0x0>; \ ++ xlnx,intc-positive = <0xffff>; \ ++ xlnx,intc-use-ext-intr = <0x1>; \ ++ }; \ ++ \ ++ pmc_ppu ## X ## _io_gpi1: pmc_ppu ## X ## _gpi@20 { \ ++ #gpio-cells = <1>; \ ++ gpio-controller; \ ++ compatible = "xlnx,io-gpi-1.02.a", "xlnx,io_gpi"; \ ++ interrupt-parent = <&pmc_ppu ## X ## _io_intc>; \ ++ interrupts = <11>; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(20) 0x4>; \ ++ xlnx,gpi-interrupt = <0x1>; \ ++ xlnx,gpi-size = <0x20>; \ ++ xlnx,use-gpi = <0x1>; \ ++ }; \ ++ pmc_ppu ## X ## _io_gpi2: pmc_ppu ## X ## _gpi@24 { \ ++ #gpio-cells = <1>; \ ++ gpio-controller; \ ++ compatible = "xlnx,io-gpi-1.02.a", "xlnx,io_gpi"; \ ++ interrupt-parent = <&pmc_ppu ## X ## _io_intc>; \ ++ interrupts = <12>; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(24) 0x4>; \ ++ xlnx,gpi-interrupt = <0x1>; \ ++ xlnx,gpi-size = <0x20>; \ ++ xlnx,use-gpi = <0x1>; \ ++ }; \ ++ pmc_ppu ## X ## _io_gpi3: pmc_ppu ## X ## _gpi@28 { \ ++ #gpio-cells = <1>; \ ++ gpio-controller; \ ++ compatible = "xlnx,io-gpi-1.02.a", "xlnx,io_gpi"; \ ++ interrupt-parent = <&pmc_ppu ## X ## _io_intc>; \ ++ interrupts = <13>; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(28) 0x4>; \ ++ xlnx,gpi-interrupt = <0x1>; \ ++ xlnx,gpi-size = <0x20>; \ ++ xlnx,use-gpi = <0x1>; \ ++ }; \ ++ pmc_ppu ## X ## _io_gpi4: pmc_ppu ## X ## _gpi@2c { \ ++ #gpio-cells = <1>; \ ++ gpio-controller; \ ++ compatible = "xlnx,io-gpi-1.02.a", "xlnx,io_gpi"; \ ++ interrupt-parent = <&pmc_ppu ## X ## _io_intc>; \ ++ interrupts = <14>; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(2c) 0x4>; \ ++ xlnx,gpi-interrupt = <0x1>; \ ++ xlnx,gpi-size = <0x20>; \ ++ xlnx,use-gpi = <0x1>; \ ++ }; \ ++ \ ++ pmc_ppu ## X ## _io_gpo1: pmc_ppu ## X ## _gpo@10 { \ ++ #gpio-cells = <1>; \ ++ gpio-controller; \ ++ compatible = "xlnx,io-gpo-1.02.a", "xlnx,io_gpo"; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(10) 0x4>; \ ++ xlnx,gpo-init = <0x0>; \ ++ xlnx,gpo-size = <0x9>; \ ++ xlnx,use-gpo = <0x1>; \ ++ }; \ ++ pmc_ppu ## X ## _io_gpo2: pmc_ppu ## X ## _gpo@14 { \ ++ #gpio-cells = <1>; \ ++ gpio-controller; \ ++ compatible = "xlnx,io-gpo-1.02.a", "xlnx,io_gpo"; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(14) 0x4>; \ ++ xlnx,gpo-init = <0x0>; \ ++ xlnx,gpo-size = <0x20>; \ ++ xlnx,use-gpo = <0x1>; \ ++ }; \ ++ pmc_ppu ## X ## _io_gpo3: pmc_ppu ## X ## _gpo@18 { \ ++ #gpio-cells = <1>; \ ++ gpio-controller; \ ++ compatible = "xlnx,io-gpo-1.02.a", "xlnx,io_gpo"; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(18) 0x4>; \ ++ xlnx,gpo-init = <0x0>; \ ++ xlnx,gpo-size = <0x20>; \ ++ xlnx,use-gpo = <0x1>; \ ++ }; \ ++ pmc_ppu ## X ## _io_gpo4: pmc_ppu ## X ## _gpo@1c { \ ++ #gpio-cells = <1>; \ ++ gpio-controller; \ ++ compatible = "xlnx,io-gpo-1.02.a", "xlnx,io_gpo"; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(1c) 0x4>; \ ++ xlnx,gpo-init = <0x0>; \ ++ xlnx,gpo-size = <0x20>; \ ++ xlnx,use-gpo = <0x1>; \ ++ }; \ ++ \ ++ pmc_ppu ## X ## _io_pit1: pmc_ppu ## X ## _pit@40 { \ ++ compatible = "xlnx,io-pit-1.02.a", "xlnx,io_pit"; \ ++ interrupt-parent = <&pmc_ppu ## X ## _io_intc>; \ ++ interrupts = <3>; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(40) 0xc>; \ ++ xlnx,pit-interrupt = <0x1>; \ ++ xlnx,pit-prescaler = <0x9>; \ ++ xlnx,pit-readable = <0x1>; \ ++ xlnx,pit-size = <0x20>; \ ++ xlnx,use-pit = <0x1>; \ ++ frequency = <460000000>; \ ++ gpios = <&pmc_ppu ## X ## _io_gpo1 1 &pmc_ppu ## X ## _io_pit2 0>; \ ++ gpio-names = "ps_config","ps_hit_in"; \ ++ gpio-controller; \ ++ #gpio-cells = <1>; \ ++ }; \ ++ pmc_ppu ## X ## _io_pit2: pmc_ppu ## X ## _pit@50 { \ ++ compatible = "xlnx,io-pit-1.02.a", "xlnx,io_pit"; \ ++ interrupt-parent = <&pmc_ppu ## X ## _io_intc>; \ ++ interrupts = <4>; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(50) 0xc>; \ ++ xlnx,pit-interrupt = <0x1>; \ ++ xlnx,pit-prescaler = <0x9>; \ ++ xlnx,pit-readable = <0x1>; \ ++ xlnx,pit-size = <0x20>; \ ++ xlnx,use-pit = <0x1>; \ ++ frequency = <460000000>; \ ++ gpio-controller; \ ++ #gpio-cells = <1>; \ ++ }; \ ++ pmc_ppu ## X ## _io_pit3: pmc_ppu ## X ## _pit@60 { \ ++ compatible = "xlnx,io-pit-1.02.a", "xlnx,io_pit"; \ ++ interrupt-parent = <&pmc_ppu ## X ## _io_intc>; \ ++ interrupts = <5>; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(60) 0xc>; \ ++ xlnx,pit-interrupt = <0x1>; \ ++ xlnx,pit-prescaler = <0x9>; \ ++ xlnx,pit-readable = <0x1>; \ ++ xlnx,pit-size = <0x20>; \ ++ xlnx,use-pit = <0x1>; \ ++ frequency = <460000000>; \ ++ gpios = <&pmc_ppu ## X ## _io_gpo1 6 &pmc_ppu ## X ## _io_pit4 0>; \ ++ gpio-names = "ps_config","ps_hit_in"; \ ++ gpio-controller; \ ++ #gpio-cells = <1>; \ ++ }; \ ++ pmc_ppu ## X ## _io_pit4: pmc_ppu ## X ## _pit@70 { \ ++ compatible = "xlnx,io-pit-1.02.a", "xlnx,io_pit"; \ ++ interrupt-parent = <&pmc_ppu ## X ## _io_intc>; \ ++ interrupts = <6>; \ ++ reg = <0x0 MM_PMC_PPU ## X ## _IOM(70) 0xc>; \ ++ xlnx,pit-interrupt = <0x1>; \ ++ xlnx,pit-prescaler = <0x9>; \ ++ xlnx,pit-readable = <0x1>; \ ++ xlnx,pit-size = <0x20>; \ ++ xlnx,use-pit = <0x1>; \ ++ frequency = <460000000>; \ ++ gpio-controller; \ ++ #gpio-cells = <1>; \ ++ }; \ ++ } ++ ++/ { ++ /* MDM UARTs. We put them here for instantiation ordering purposes ++ * making sure that -serial command line options refer to these ++ * first. ++ */ ++ ppu0_mdm_uart@MM_PMC_PPU0_MDM_HSD { ++ doc-status = "complete"; ++ compatible = "xlnx,xps-uartlite"; ++ reg-extended = <&lmb_pmc_ppu0 0x0 MM_PMC_PPU0_MDM_HSD 0x0 0x10 0x1>; ++ chardev = "serial2"; ++ }; ++ ++ ppu1_mdm_uart@MM_PMC_PPU1_MDM_HSD { ++ doc-status = "complete"; ++ compatible = "xlnx,xps-uartlite"; ++ reg-extended = <&lmb_pmc_ppu1 0x0 MM_PMC_PPU1_MDM_HSD 0x0 0x10 0x1>; ++ chardev = "serial3"; ++ }; ++}; ++ ++&lmb_pmc_ppu0 { ++ doc-name = "LMB PPU0"; ++ doc-status = "complete"; ++ CREATE_PPU_IOMOD(0); ++}; ++ ++&lmb_pmc_ppu1 { ++ doc-name = "LMB PPU1"; ++ doc-status = "complete"; ++ CREATE_PPU_IOMOD(1); ++}; ++ ++&amba_pmc_ppu { ++ pmc_gic_proxy: pmc_gic_proxy@0 { ++ doc-status = "complete"; ++ #interrupt-cells = <3>; ++ interrupt-controller; ++ ++ compatible = "xlnx,zynqmp-gicp"; ++ reg = <0x0 MM_PMC_GIC_PROXY 0x0 MM_PMC_GIC_PROXY_SIZE 0x0>; ++ interrupt-parent = <&pmc_ppu1_io_intc>; ++ interrupts = ; ++ }; ++}; ++ +diff --git a/versal-ps-iou-alt.dtsi b/versal-ps-iou-alt.dtsi +new file mode 100644 +index 00000000..a6c22b86 +--- /dev/null ++++ b/versal-ps-iou-alt.dtsi +@@ -0,0 +1,467 @@ ++/* ++ * Versal PS IOU ++ * ++ * Copyright (C) 2016-2022, Xilinx, Inc. ++ * Copyright (C) 2023, Advanced Micro Devices, Inc. ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of the nor the ++ * names of its contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ++ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ++ * DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY ++ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ++ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ++ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include "versal.dtsh" ++ ++#define GEM(g_name, g_base, g_size, g_dma, g_irq, rst_idx, pwr_idx) \ ++g_name: ethernet@g_base { \ ++ #address-cells = <1>; \ ++ #size-cells = <0>; \ ++ #priority-cells = <0>; \ ++ compatible = "cdns,gem"; \ ++ interrupts = ; \ ++ dma = ; \ ++ memattr = <& ## g_name ## _memattr_smid>; \ ++ memattr-write = <& ## g_name ## _w_memattr_smid>; \ ++ reg = <0x0 g_base 0x0 g_size 0x0>; \ ++ num-priority-queues = <2>; \ ++ reset-gpios = <&crl rst_idx>; \ ++ power-gpios = <&psm_local pwr_idx>; \ ++} ++ ++// FIXME: Add support for SMIDs ++#define ZDMA_CHANNEL(zname, zdomain, zbase, zirq, zbuswidth, zdma, mid, num) \ ++zname ## _mattr: zname ## mattr { \ ++ compatible = "qemu:memory-transaction-attr"; \ ++ requester-id = ; \ ++}; \ ++ \ ++zname: dma-controller@zbase { \ ++ compatible = "xlnx,zdma"; \ ++ reg = <0x0 zbase 0x0 MM_ADMA_CH0_SIZE 0x0>; \ ++ bus-width = ; \ ++ has-parity = <1>; \ ++ interrupts = ; \ ++ #stream-id-cells = <0x1>; \ ++ dma = ; \ ++ memattr = <& ## zname ## _mattr>; \ ++ reset-gpios = < &crl CRL_RST_ADMA >; \ ++ #gpio-cells = <1>; \ ++ gpio-names = "memattr-secure"; \ ++ gpios = <&lpd_slcr_secure num>; \ ++} ++ ++/* ++ * Our XRAM model only has the correctable interrupt line. ++ * All instances connect to a single line in the GIC. ++ * ++ * To support shared memories for co-sim, we provide the ++ * actual RAMs externally and not from the XRAMC model. ++ */ ++#define XRAM_CTRL(n) xram_ctrl_ ## n { \ ++ compatible = "xlnx,versal-xramc"; \ ++ reg = <0x0 (MM_XRAM + 0x## n ##0000) 0 0x10000 0x0 >; \ ++ interrupts = ; \ ++ alloc-ram = <0>; \ ++} ++ ++&amba_fpd { ++#ifdef MM_FPD_FPD_APU ++ apu_ctrl: apu_ctrl@MM_FPD_FPD_APU { ++ compatible = "xlnx,versal-apu-ctrl"; ++ reg = <0x0 MM_FPD_FPD_APU 0x0 MM_FPD_FPD_APU_SIZE 0x0>; ++ cpu0 = <&cpu0>; ++ cpu1 = <&cpu1>; ++ #gpio-cells = <1>; ++ }; ++#endif ++ ++ afi_fm@MM_FPD_FPD_AFIFM0 { ++ compatible = "xlnx,versal-afi-fm"; ++ reg = <0x0 MM_FPD_FPD_AFIFM0 0x0 MM_FPD_FPD_AFIFM0_SIZE 0x0>; ++ }; ++ ++ afi_fm@MM_FPD_FPD_AFIFM2 { ++ compatible = "xlnx,versal-afi-fm"; ++ reg = <0x0 MM_FPD_FPD_AFIFM2 0x0 MM_FPD_FPD_AFIFM2_SIZE 0x0>; ++ }; ++ ++#ifdef MM_FPD_FPD_GPCCI ++ cci_reg@MM_FPD_FPD_GPCCI { ++ compatible = "xlnx,cci_reg"; ++ reg = <0x0 MM_FPD_FPD_GPCCI 0x0 MM_FPD_FPD_MAINCCI_SIZE 0x0>; ++ }; ++#endif ++ ++#ifdef MM_FPD_FPD_MAINCCI ++ cci500@MM_FPD_FPD_MAINCCI { ++ compatible = "xlnx,cci500"; ++ reg = <0x0 MM_FPD_FPD_MAINCCI 0x0 MM_FPD_FPD_MAINCCI_SIZE 0x0>; ++ }; ++#endif ++ ++ cpm_crcpm@MM_CPM_CPM_CRCPM { ++ compatible = "xlnx,versal_cpm_crcpm"; ++ reg = <0x0 MM_CPM_CPM_CRCPM 0x0 MM_CPM_CPM_CRCPM_SIZE 0x0>; ++ }; ++ ++ cpm_pcsr@MM_CPM_CPM_PCSR { ++ compatible = "xlnx,versal_cpm_pcsr"; ++ reg = <0x0 MM_CPM_CPM_PCSR 0x0 MM_CPM_CPM_PCSR_SIZE 0x0>; ++ }; ++ ++ cpm_slcr_secure@MM_CPM_CPM_SLCR_SECURE { ++ compatible = "xlnx.cpm_slcr_secure"; ++ reg = <0x0 MM_CPM_CPM_SLCR_SECURE 0x0 MM_CPM_CPM_SLCR_SECURE_SIZE 0x0>; ++ }; ++ ++ fpd_slcr@MM_FPD_FPD_SLCR { ++ compatible = "xlnx,versal-fpd-slcr"; ++ interrupts = ; ++ reg = <0x0 MM_FPD_FPD_SLCR 0x0 MM_FPD_FPD_SLCR_SIZE 0x0>; ++ }; ++ ++ fpd_slcr_secure@MM_FPD_FPD_SLCR { ++ compatible = "xlnx,versal-fpd-slcr-secure"; ++ interrupts = ; ++ reg = <0x0 MM_FPD_FPD_SLCR_SECURE 0x0 MM_FPD_FPD_SLCR_SECURE_SIZE 0x0>; ++ }; ++ ++#ifdef MM_FPD_FPD_WWDT ++ wwdt0: watchdog@MM_FPD_FPD_WWDT { ++ compatible = "xlnx,versal-wwdt"; ++ reg = <0x0 MM_FPD_FPD_WWDT 0x0 MM_FPD_FPD_WWDT_SIZE 0x0>; ++ /* IRQ order must match the QEMU model */ ++ interrupts = ; ++ pclk = <100000000>; ++ reset-gpios = <&crf 27>; ++ }; ++#endif ++#ifdef MM_FPD_INTFPD_CONFIG ++ intfpd: intfpd@MM_FPD_INTFPD_CONFIG { ++ compatible = "xlnx-intfpd-config"; ++ reg = <0x0 MM_FPD_INTFPD_CONFIG 0x0 MM_FPD_INTFPD_CONFIG_SIZE 0x0>; ++ interrupts = < ++ #if FPD_APB_INT_IRQ_0 ++ FPD_APB_INT_IRQ_0 ++ #elif INT_FPD_IRQ_0 ++ INT_FPD_IRQ_0 ++ #endif ++ >; ++ }; ++#endif ++}; ++ ++&amba_lpd { ++ GEM(gem0, MM_GEM0, MM_GEM0_SIZE, &smmu_tbu0, GEM0_IRQ_0, CRL_RST_GEM0, PLR_PWR_GEM0); ++ GEM(gem1, MM_GEM1, MM_GEM1_SIZE, &smmu_tbu0, GEM1_IRQ_0, CRL_RST_GEM1, PLR_PWR_GEM1); ++ ++ serial0: serial@MM_UART0 { ++ compatible = "pl011"; ++ interrupts = ; ++ reg = <0x0 MM_UART0 0x0 MM_UART0_SIZE 0x0 >; ++ reset-gpios = < &crl CRL_RST_UART0 >; ++ chardev = "serial0"; ++ }; ++ serial1: serial@MM_UART1 { ++ compatible = "pl011"; ++ interrupts = ; ++ reg = <0x0 MM_UART1 0x0 MM_UART1_SIZE 0x0 >; ++ reset-gpios = < &crl CRL_RST_UART1 >; ++ chardev = "serial1"; ++ }; ++ ++ canfdbus0: canfdbus@0 { ++ compatible = "can-bus"; ++ }; ++ ++ can0: can@MM_CANFD0 { ++ compatible = "xlnx,versal-canfd"; ++ rx-fifo0 = <0x40>; ++ rx-fifo1 = <0x40>; ++ enable-rx-fifo1 = <0x1>; ++ canfdbus = <&canfdbus0>; ++ interrupts = ; ++ reg = <0x0 MM_CANFD0 0x0 MM_CANFD0_SIZE 0x0>; ++ reset-gpios = <&crl CRL_RST_CAN0>; ++ }; ++ can1: can@MM_CANFD1 { ++ compatible = "xlnx,versal-canfd"; ++ rx-fifo0 = <0x40>; ++ rx-fifo1 = <0x40>; ++ enable-rx-fifo1 = <0x1>; ++ canfdbus = <&canfdbus0>; ++ interrupts = ; ++ reg = <0x0 MM_CANFD1 0x0 MM_CANFD1_SIZE 0x0>; ++ reset-gpios = <&crl CRL_RST_CAN1>; ++ }; ++ ++ crl: crl@MM_CRL { ++ compatible = "xlnx,versal-crl"; ++ reg = <0x0 MM_CRL 0x0 MM_CRL_SIZE 0x0>; ++ gpio-controller; ++ #gpio-cells = <1>; ++ }; ++ ++ lpd_iou_slcr: slcr@MM_LPD_IOU_SLCR { ++ compatible = "xlnx,versal-lpd-iou-slcr"; ++ reg = <0x0 MM_LPD_IOU_SLCR 0x0 MM_LPD_IOU_SLCR_SIZE 0x0>; ++ }; ++ ++#ifdef MM_RPU ++ rpu_ctrl: rpu_ctrl@MM_RPU { ++ compatible = "xlnx,versal-rpu"; ++ reg-extended = <&amba_lpd 0x0 MM_RPU 0x0 MM_RPU_SIZE 0x0 ++ &amba_r5_0 0x0 0x0 0x0 0x80000 0x0 ++ &amba 0x0 MM_R5_0_ATCM 0x0 0x60000 0x0 ++ &amba_r5_1 0x0 0x0 0x0 0x80000 0x0 ++ &amba 0x0 0xFFE90000 0x0 0x50000 0x0>; ++ rpu0 = <&rpu_cpu0>; ++ rpu1 = <&rpu_cpu1>; ++ ++ gpio-controller; ++ #gpio-cells = <1>; ++ ++ gpios = < &crl CRL_RST_CPU_R5_0 &crl CRL_RST_CPU_R5_1 ++ &psm_local 42 &psm_local 43 ++ >; ++ }; ++#endif ++ ++ ipi: ipi@MM_IPI { ++ compatible = "xlnx,versal-ipi"; ++ reg = <0x0 MM_IPI 0x0 MM_IPI_SIZE 0x0>; ++ ++ /* Interrupt ordering here needs to match ++ * QEMU's sysbus-irq output order. */ ++ interrupts = ; ++ reset-gpios = <&crl CRL_RST_IPI>; ++ }; ++ ++ spi0: spi@MM_SPI0 { ++ compatible = "cdns,spi-r1p6"; ++ interrupts = ; ++ num-ss-bits = <4>; ++ reg = <0x0 MM_SPI0 0x0 MM_SPI0_SIZE 0x0 >; ++ ++ #address-cells = <1>; /* For child; must match SPI_FLASH() */ ++ #size-cells = <0>; ++ #bus-cells = <1>; ++ reset-gpios = <&crl CRL_RST_SPI0>; ++ }; ++ spi1: spi@MM_SPI1 { ++ compatible = "cdns,spi-r1p6"; ++ interrupts = ; ++ num-ss-bits = <4>; ++ reg = <0x0 MM_SPI1 0x0 MM_SPI1_SIZE 0x0 >; ++ ++ #address-cells = <1>; /* For child; must match SPI_FLASH() */ ++ #size-cells = <0>; ++ #bus-cells = <1>; ++ reset-gpios = <&crl CRL_RST_SPI1>; ++ }; ++ ++ dwc3_0: usb2@USB2_0_XHCI { ++ compatible = "usb_dwc3"; ++ reg = <0x0 MM_USB_DWC3_0 0x0 MM_USB_DWC3_0_SIZE 0x0 0x0 MM_USB_XHCI 0x0 MM_USB_XHCI_SIZE 0x0>; ++ interrupts = ; ++ dma = <&smmu_tbu0>; ++ memattr = <&usb0_memattr>; ++ reset-gpios = <&crl CRL_RST_USB0>; ++ intrs = <4>; ++ slots = <2>; ++ }; ++ ++ ttc0: timer@MM_TTC0 { ++ compatible = "xlnx,ps7-ttc-1.00.a"; ++ interrupts = ; ++ reg = <0x0 MM_TTC0 0x0 MM_TTC0_SIZE 0x0>; ++ width = <32>; ++ reset-gpios = < &crl CRL_RST_TTC0 >; ++ }; ++ ttc1: timer@MM_TTC1 { ++ compatible = "xlnx,ps7-ttc-1.00.a"; ++ interrupts = ; ++ reg = <0x0 MM_TTC1 0x0 MM_TTC1_SIZE 0x0>; ++ width = <32>; ++ reset-gpios = < &crl CRL_RST_TTC1 >; ++ }; ++ ttc2: timer@MM_TTC2 { ++ compatible = "xlnx,ps7-ttc-1.00.a"; ++ interrupts = ; ++ reg = <0x0 MM_TTC2 0x0 MM_TTC2_SIZE 0x0>; ++ width = <32>; ++ reset-gpios = < &crl CRL_RST_TTC2 >; ++ }; ++ ttc3: timer@MM_TTC3 { ++ compatible = "xlnx,ps7-ttc-1.00.a"; ++ interrupts = ; ++ reg = <0x0 MM_TTC3 0x0 MM_TTC3_SIZE 0x0>; ++ width = <32>; ++ reset-gpios = < &crl CRL_RST_TTC3 >; ++ }; ++ ++ ZDMA_CHANNEL(adma0, adma, MM_ADMA_CH0, ADMA_IRQ_0, 128, &smmu_tbu0, SMID_DMA0_CH0, 0x0); ++ ZDMA_CHANNEL(adma1, adma, MM_ADMA_CH1, ADMA_IRQ_1, 128, &smmu_tbu0, SMID_DMA0_CH1, 0x1); ++ ZDMA_CHANNEL(adma2, adma, MM_ADMA_CH2, ADMA_IRQ_2, 128, &smmu_tbu0, SMID_DMA0_CH2, 0x2); ++ ZDMA_CHANNEL(adma3, adma, MM_ADMA_CH3, ADMA_IRQ_3, 128, &smmu_tbu0, SMID_DMA0_CH3, 0x3); ++ ZDMA_CHANNEL(adma4, adma, MM_ADMA_CH4, ADMA_IRQ_4, 128, &smmu_tbu0, SMID_DMA0_CH4, 0x4); ++ ZDMA_CHANNEL(adma5, adma, MM_ADMA_CH5, ADMA_IRQ_5, 128, &smmu_tbu0, SMID_DMA0_CH5, 0x5); ++ ZDMA_CHANNEL(adma6, adma, MM_ADMA_CH6, ADMA_IRQ_6, 128, &smmu_tbu0, SMID_DMA0_CH6, 0x6); ++ ZDMA_CHANNEL(adma7, adma, MM_ADMA_CH7, ADMA_IRQ_7, 128, &smmu_tbu0, SMID_DMA0_CH7, 0x7); ++ ++ afi_fm@MM_LPD_AFIFM4 { ++ compatible = "xlnx,versal-afi-fm"; ++ reg = <0x0 MM_LPD_AFIFM4 0x0 MM_LPD_AFIFM4_SIZE 0x0>; ++ }; ++ ++ lpd_i2c_wrapper { ++#ifdef MM_PS_I2C0 ++ ps_i2c0: ps_i2c0@MM_PS_I2C0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "xlnx,ps7-i2c-1.00.a", "cdns,i2c-r1p10"; ++ interrupts = ; ++ reg-extended = <&amba_lpd 0x0 MM_PS_I2C0 0x0 MM_PS_I2C0_SIZE 0x0>; ++ reset-gpios = <&crl CRL_RST_I2C0>; ++ }; ++ ps_i2c1: ps_i2c0@MM_PS_I2C1 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "xlnx,ps7-i2c-1.00.a", "cdns,i2c-r1p10"; ++ interrupts = ; ++ reg-extended = <&amba_lpd 0x0 MM_PS_I2C1 0x0 MM_PS_I2C1_SIZE 0x0>; ++ reset-gpios = <&crl CRL_RST_I2C1>; ++ }; ++#endif ++ }; ++ ++ ocm_ctrl0: ocm_ctrl@OCM { ++ compatible = "xlnx,zynqmp-ocmc"; ++ interrupts = ; ++ memsize = ; ++ reg = <0x0 MM_OCM 0x0 MM_OCM_SIZE 0x0>; ++ reset-gpios = <&crl CRL_RST_OCM>; ++ }; ++ ++#ifdef MM_XRAM_SLCR ++ xram_slcr@MM_XRAM_SLCR { ++ compatible = "xlnx,xram_slcr"; ++ reg = <0x0 MM_XRAM_SLCR 0x0 MM_XRAM_SLCR_SIZE 0x0>; ++ }; ++#endif ++ ++ lpd_slcr@MM_LPD_SLCR { ++ compatible = "xlnx,versal-lpd-slcr"; ++ reg = <0x0 MM_LPD_SLCR 0x0 MM_LPD_SLCR_SIZE 0x0>; ++ }; ++ ++ lpd_slcr_secure: lpd_slcr_secure@MM_LPD_SLCR_SECURE { ++ compatible = "xlnx,versal-lpd-slcr-secure"; ++ reg = <0x0 MM_LPD_SLCR_SECURE 0x0 MM_LPD_SLCR_SECURE_SIZE 0x0>; ++ gpio-controller; ++ #gpio-cells = <1>; ++ }; ++ ++ lpd_iou_slcr_secure: lpd_iou_slcr_secure@MM_LPD_IOU_SECURE_SLCR { ++ compatible = "xlnx,versal-lpd-iou-slcr-secure"; ++ reg = <0x0 MM_LPD_IOU_SECURE_SLCR 0x0 MM_LPD_IOU_SECURE_SLCR_SIZE 0x0>; ++ memattr-gem0 = <&gem0_memattr_smid>; ++ memattr-write-gem0 = <&gem0_w_memattr_smid>; ++ memattr-gem1 = <&gem1_memattr_smid>; ++ memattr-write-gem1 = <&gem1_w_memattr_smid>; ++ }; ++ ++#ifdef MM_WWDT ++ lpd_wwdt: wwdt@MM_WWDT { ++ compatible = "xlnx,versal-wwdt"; ++ reg = <0x0 MM_WWDT 0x0 MM_WWDT_SIZE 0x0>; ++ /* IRQ order must match the QEMU model */ ++ interrupts = ; ++ pclk = <100000000>; ++ reset-gpios = <&crl CRL_RST_SWDT>; ++ }; ++#endif ++ ++ lpd_gpio: lpd_gpio@MM_PS_GPIO { ++ #gpio-cells = <1>; ++ compatible = "xlnx,zynqmp-gpio"; ++ gpio-controller; ++ interrupts = ; ++ reg = <0x0 MM_PS_GPIO 0x0 MM_PS_GPIO_SIZE 0x0>; ++ reset-gpios = < &crl CRL_RST_GPIO >; ++ }; ++#ifdef MM_INTLPD_CONFIG ++ intlpd: intlpd@MM_INTLPD_CONFIG { ++ compatible = "xlnx-intlpd-config"; ++ reg = <0x0 MM_INTLPD_CONFIG 0x0 MM_INTLPD_CONFIG_SIZE 0x0>; ++ interrupts = ; ++ }; ++#endif ++}; ++ ++&amba_xram { ++ XRAM_CTRL(0); ++ XRAM_CTRL(1); ++ XRAM_CTRL(2); ++ XRAM_CTRL(3); ++}; ++ ++&amba_root { ++ /* These devices need to be created before the CPUs. */ ++ crf: crf@MM_FPD_CRF { ++ compatible = "xlnx,versal-crf"; ++ reg-extended = <&amba_fpd 0x0 MM_FPD_CRF 0x0 MM_FPD_CRF_SIZE 0x0>; ++ gpio-controller; ++ #gpio-cells = <1>; ++ }; ++}; ++ ++/ { ++ /* Reset domains. */ ++ lpd_reset_domain@0 { ++ compatible = "qemu,reset-domain"; ++ mr0 = <&amba_lpd>; ++ reset-gpios = < &pmc_clk_rst CRP_RST_PS_PS_SRST ++ &pmc_clk_rst CRP_RST_PS_PS_POR >; ++ }; ++ ++ fpd_reset_domain@0 { ++ compatible = "qemu,reset-domain"; ++ mr0 = <&amba_fpd>; ++ reset-gpios = < &pmc_clk_rst CRP_RST_PS_PS_SRST ++ &pmc_clk_rst CRP_RST_PS_PS_POR ++ &crl CRL_RST_FPD_POR ++ &crl CRL_RST_FPD_SRST >; ++ }; ++}; +-- +2.34.1 + diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees/0001-versal-net-Reorder-serial-port.patch b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees/0001-versal-net-Reorder-serial-port.patch new file mode 100644 index 000000000..97262ae4c --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees/0001-versal-net-Reorder-serial-port.patch @@ -0,0 +1,291 @@ +From 58fdfde013dfabf3a9f2c83525c00a6f057768f1 Mon Sep 17 00:00:00 2001 +From: Mark Hatle +Date: Fri, 4 Oct 2024 15:49:46 -0600 +Subject: [PATCH] versal-net: Reorder serial port + +This commit requires the corresponding "versal: Reorder serial ports" + +This change affects the order of the serial ports when calling qemu. +Previously the serial ports 0 & 1 were the PMC (firmware) uartlite, +while the standard serial pors were 2 & 3. Reverse this order to +ensure that the first two serial ports are the ones used by Linux. + +Signed-off-by: Mark Hatle +--- + board-versal-net-psx-spp-1.4-alt.dts | 36 ++++++++ + board-versal-net-psx-virt-alt.dts | 130 +++++++++++++++++++++++++++ + board-versal-pmx-virt-alt.dts | 82 +++++++++++++++++ + 3 files changed, 248 insertions(+) + create mode 100644 board-versal-net-psx-spp-1.4-alt.dts + create mode 100644 board-versal-net-psx-virt-alt.dts + create mode 100644 board-versal-pmx-virt-alt.dts + +diff --git a/board-versal-net-psx-spp-1.4-alt.dts b/board-versal-net-psx-spp-1.4-alt.dts +new file mode 100644 +index 00000000..770a388e +--- /dev/null ++++ b/board-versal-net-psx-spp-1.4-alt.dts +@@ -0,0 +1,36 @@ ++/* ++ * Versal Net PSX device tree. ++ * ++ * Copyright (c) 2022, Xilinx Inc ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of the nor the ++ * names of its contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ++ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ++ * DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY ++ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ++ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ++ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#define VERSAL_NET_APU_CPU_FREQ 100000000 ++ ++#include "board-versal-net-psx-virt-alt.dts" ++ ++&pmc_tap { ++ platform-ver = <0x5>; ++}; +diff --git a/board-versal-net-psx-virt-alt.dts b/board-versal-net-psx-virt-alt.dts +new file mode 100644 +index 00000000..7ee4ad9d +--- /dev/null ++++ b/board-versal-net-psx-virt-alt.dts +@@ -0,0 +1,130 @@ ++/* ++ * Versal-Net Virtual PSX board device tree. ++ * ++ * Copyright (c) 2021-2022, Xilinx Inc. ++ * Copyright (C) 2022-2024, Advanced Micro Devices, Inc. ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of the nor the ++ * names of its contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ++ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ++ * DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY ++ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ++ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ++ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef NUM_APUS ++#define NUM_APUS 16 ++#endif ++#define VERSAL_NET_APU_CPU_FREQ 100000000 ++ ++#define NUM_APUS_PER_CLUSTER 4 ++ ++#define VERSAL_NPI_GENERIC ++#define VERSAL_PSX ++#define VERSAL_NET ++#define VERSAL_NPI_OVERRIDE ++ ++/* TODO: Add GIC interrupt redirection support. */ ++#define RPU_GIC_INTERRUPT_TARGET_STEM rpu_cpu ++ ++#define APU_CPU_MODEL "cortex-a78-arm-cpu" ++#define RPU_CPU_MODEL "cortex-r52-arm-cpu" ++ ++#include "include/versal-net/npi-memmap.dtsh" ++#include "include/versal-net/fpd-memmap.dtsh" ++#include "board-versal-ps-virt-alt.dts" ++#include "versal-psx.dtsi" ++#include "versal-net-psmx.dtsi" ++#include "versal-psx-rpu.dtsi" ++#include "versal-net-boot-init.dtsi" ++#include "versal-net-hnic.dtsi" ++#include "versal-pmx-shared-overlay.dtsi" ++#include "versal-pmx-system-overlay.dtsi" ++#include "versal-psx-shared-overlay.dtsi" ++ ++#ifndef VERSAL_NET_APU_CPU_FREQ ++ #define VERSAL_NET_APU_CPU_FREQ 2720000 ++#endif ++ ++#define SET_CPU_FREQ(n, f) \ ++&cpu ## n { \ ++ generic-timer-frequency = ; \ ++} ++ ++SET_CPU_FREQ(0, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(1, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(2, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(3, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(4, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(5, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(6, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(7, VERSAL_NET_APU_CPU_FREQ); ++#if (NUM_APUS >= 16) ++SET_CPU_FREQ(8, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(9, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(10,VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(11,VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(12,VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(13,VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(14,VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(15,VERSAL_NET_APU_CPU_FREQ); ++#endif ++#if (NUM_APUS >= 32) ++SET_CPU_FREQ(16, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(17, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(18, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(19, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(20, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(21, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(22, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(23, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(24, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(25, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(26, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(27, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(28, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(29, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(30, VERSAL_NET_APU_CPU_FREQ); ++SET_CPU_FREQ(31, VERSAL_NET_APU_CPU_FREQ); ++#endif ++ ++&rpu_ctrl_a { ++ tcm-mr = <&s_axi_tcm_a>; ++}; ++&rpu_ctrl_a0 { ++ core = <&rpu_cpu0>; ++}; ++&rpu_ctrl_a1 { ++ core = <&rpu_cpu1>; ++}; ++ ++&rpu_ctrl_b { ++ tcm-mr = <&s_axi_tcm_b>; ++}; ++&rpu_ctrl_b0 { ++ core = <&rpu_cpu2>; ++}; ++&rpu_ctrl_b1 { ++ core = <&rpu_cpu3>; ++}; ++ ++&pmc_tap { ++ idcode = <0x14D80093>; ++ platform-ver = <0x5>; ++}; +diff --git a/board-versal-pmx-virt-alt.dts b/board-versal-pmx-virt-alt.dts +new file mode 100644 +index 00000000..7a4679d0 +--- /dev/null ++++ b/board-versal-pmx-virt-alt.dts +@@ -0,0 +1,82 @@ ++/* ++ * Versal Virtual PMC board device tree ++ * ++ * Copyright (c) 2016, Xilinx Inc ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the name of the nor the ++ * names of its contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ++ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ++ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ++ * DISCLAIMED. IN NO EVENT SHALL BE LIABLE FOR ANY ++ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; ++ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ++ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#define VERSAL_PMX ++#define VERSAL_NET ++#define NUM_APUS 16 ++#define NUM_APUS_PER_CLUSTER 4 ++#define VERSAL_NPI_OVERRIDE ++ ++#include "include/versal-net/npi-memmap.dtsh" ++#include "include/versal-net/fpd-memmap.dtsh" ++#include "board-versal-pmc-virt-alt.dts" ++#include "versal-pmx-shared-overlay.dtsi" ++ ++#ifndef MULTI_ARCH ++/* ++ * The single-arch setup has the entire system except ++ * the ARM cores. So we need to add the missing dummy ++ * ARM cores (pmc-virt.dts already has 0 - 1) and include ++ * the PSX and PMX system overlays. ++ */ ++#include "versal-pmx-system-overlay.dtsi" ++#include "versal-psx.dtsi" ++#include "versal-psx-shared-overlay.dtsi" ++#include "versal-net-psmx.dtsi" ++ ++/ { ++ /* Dummy APUs. */ ++ cpu2: apu@2 { }; ++ cpu3: apu@3 { }; ++ cpu4: apu@4 { }; ++ cpu5: apu@5 { }; ++ cpu6: apu@6 { }; ++ cpu7: apu@7 { }; ++#if (NUM_APUS >= 16) ++ cpu8: apu@8 { }; ++ cpu9: apu@9 { }; ++ cpu10: apu@10 { }; ++ cpu11: apu@11 { }; ++ cpu12: apu@12 { }; ++ cpu13: apu@13 { }; ++ cpu14: apu@14 { }; ++ cpu15: apu@15 { }; ++#endif ++ /* Dummy GICs. */ ++ rpu_gic_a: rpu_gic_a@0 { ++ gpio_controller ; ++ #gpio-cells = <1>; ++ }; ++ ++ rpu_gic_b: rpu_gic_b@0 { ++ gpio_controller ; ++ #gpio-cells = <1>; ++ }; ++}; ++#endif +-- +2.34.1 + diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2024.1.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2024.1.bb deleted file mode 100644 index d10504d3a..000000000 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2024.1.bb +++ /dev/null @@ -1,6 +0,0 @@ - -require qemu-devicetrees.inc - -BRANCH ?= "xlnx_rel_v2024.1" -SRCREV ?= "b9c88cbfaaa0c8b8be70ea3c74f4cb69fb02a080" - diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2024.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2024.2.bb new file mode 100644 index 000000000..5780aed1e --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2024.2.bb @@ -0,0 +1,6 @@ + +require qemu-devicetrees.inc + +BRANCH ?= "xlnx_rel_v2024.2" +SRCREV ?= "a6eeb7ec0fdb765ab0057d95eb6201d97359eff9" + diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-8.1.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-8.1.inc index 53ad1145f..da62c8b74 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-8.1.inc +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-8.1.inc @@ -8,8 +8,8 @@ COMPATIBLE_HOST:arm = "null" # x86_64 is needed to build nativesdks QEMU_TARGETS = "aarch64 arm microblaze microblazeel riscv32 x86_64" -BRANCH = "xlnx_rel_v2024.1" -SRCREV = "2319c870e754148ec3b9d40be0d3dbee959c3251" +BRANCH = "xlnx_rel_v2024.2" +SRCREV = "01482fa113dcbfa785feb7d513df50d15ec4c5df" LIC_FILES_CHKSUM = "file://COPYING;md5=441c28d2cf86e15a37fa47e15a72fbac \ file://COPYING.LIB;endline=24;md5=8c5efda6cf1e1b03dcfd0e6c0d271c7f" @@ -72,7 +72,14 @@ SRC_URI += "\ # Patch doesn't apply to 8.1.0 # file://fixmips.patch -S = "${UNPACKDIR}/git" +# Additional patches to match Scarthgap, which requires a slightly newer qmp interface +SRC_URI += "\ + file://0001-python-rename-QEMUMonitorProtocol.cmd-to-cmd_raw.patch \ + file://0002-python-qemu-rename-command-to-cmd.patch \ + " + + +S = "${WORKDIR}/git" # Based on qemu settings in poky/meta/conf/distro/include/no-static-libs.inc DISABLE_STATIC:pn-qemu-xilinx = "" diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-multiarch-helper-native_1.0.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-multiarch-helper-native_1.0.bb index 53e92c3f6..1eec01630 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-multiarch-helper-native_1.0.bb +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-multiarch-helper-native_1.0.bb @@ -9,14 +9,12 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files:" SRC_URI = "file://qemu-system-aarch64-multiarch" -S = "${UNPACKDIR}" - do_configure[noexec] = "1" do_compile[noexec] = "1" SYSROOT_DIRS += "${bindir}/qemu-xilinx" do_install() { - install -Dm 0755 ${UNPACKDIR}/qemu-system-aarch64-multiarch ${D}${bindir}/qemu-system-aarch64-multiarch + install -Dm 0755 ${WORKDIR}/qemu-system-aarch64-multiarch ${D}${bindir}/qemu-system-aarch64-multiarch } diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_%.bbappend b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_%.bbappend index 7c152d600..45bbccdfb 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_%.bbappend +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_%.bbappend @@ -1,5 +1,5 @@ # Automatically enable pmu-rom-native for ZynqMP support PMU_ROM_DEP[vardepsexclude] = "LICENSE_FLAGS_ACCEPTED" -PMU_ROM_DEP = "${@bb.utils.contains("LICENSE_FLAGS_ACCEPTED", "xilinx", " pmu-rom-native", "", d)}" +PMU_ROM_DEP = "${@bb.utils.contains_any("LICENSE_FLAGS_ACCEPTED", "xilinx xilinx_pmu-rom-native", " pmu-rom-native", "", d)}" DEPENDS .= "${PMU_ROM_DEP}" diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_8.1.0.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_8.1.0.bb index 1e626ffe3..4a8018109 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_8.1.0.bb +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_8.1.0.bb @@ -20,7 +20,7 @@ PACKAGECONFIG ??= "fdt alsa kvm pie slirp png gcrypt \ PACKAGECONFIG:remove = "${@'kvm' if not os.path.exists('/usr/include/linux/kvm.h') else ''}" do_install:append() { - install -Dm 0755 ${UNPACKDIR}/powerpc_rom.bin ${D}${datadir}/qemu-xilinx + install -Dm 0755 ${WORKDIR}/powerpc_rom.bin ${D}${datadir}/qemu-xilinx # The following is also installed by qemu-native rm -f ${D}${datadir}/qemu-xilinx/trace-events-all diff --git a/meta-xilinx-core/recipes-devtools/tcf-agent/tcf-agent_%.bbappend b/meta-xilinx-core/recipes-devtools/tcf-agent/tcf-agent_%.bbappend new file mode 100644 index 000000000..d0bbaa0a2 --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/tcf-agent/tcf-agent_%.bbappend @@ -0,0 +1,2 @@ +# On a Zynq system hardware breakpoints are limited, so used software +CFLAGS:append:zynq = " -DENABLE_HardwareBreakpoints=0" diff --git a/meta-xilinx-core/recipes-graphics/x11-common/xserver-nodm-init/xserver-nodm.conf.in b/meta-xilinx-core/recipes-graphics/x11-common/xserver-nodm-init/xserver-nodm.conf.in new file mode 100644 index 000000000..ba8c8f215 --- /dev/null +++ b/meta-xilinx-core/recipes-graphics/x11-common/xserver-nodm-init/xserver-nodm.conf.in @@ -0,0 +1,8 @@ +# common environment file for sysvinit and systemd + +LD_LIBRARY_PATH=/usr/lib/headless:${LD_LIBRARY_PATH} +XSERVER=/usr/bin/Xorg +DISPLAY=:0 +ARGS=" -br -pn @BLANK_ARGS@ @NO_CURSOR_ARG@ " +HOME=@HOME@ +USER=@USER@ diff --git a/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg/0001-xf86Rotate.c-Add-required-NULL-check.patch b/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg/0001-xf86Rotate.c-Add-required-NULL-check.patch new file mode 100644 index 000000000..8c086ddb1 --- /dev/null +++ b/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg/0001-xf86Rotate.c-Add-required-NULL-check.patch @@ -0,0 +1,35 @@ +From e94754360160cfe4faada7b9a523e57004b39e74 Mon Sep 17 00:00:00 2001 +From: Anatoliy Klymenko +Date: Thu, 15 Aug 2024 15:48:21 -0700 +Subject: [PATCH] xf86Rotate.c: Add required NULL check + +Add missing NULL check on BlockHandler callback before invoking it. There +is no guarantee that said callback is always defined. + +Fixes xorg crash on startup when screen rotation is specified in the config +file. + +Upstream-Status: Pending + +Signed-off-by: Anatoliy Klymenko +--- + hw/xfree86/modes/xf86Rotate.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/hw/xfree86/modes/xf86Rotate.c b/hw/xfree86/modes/xf86Rotate.c +index ea9c43c..43eab53 100644 +--- a/hw/xfree86/modes/xf86Rotate.c ++++ b/hw/xfree86/modes/xf86Rotate.c +@@ -230,7 +230,8 @@ xf86RotateBlockHandler(ScreenPtr pScreen, void *pTimeout) + + xf86RotateRedisplay(pScreen); + +- (*pScreen->BlockHandler) (pScreen, pTimeout); ++ if (pScreen->BlockHandler) ++ (*pScreen->BlockHandler) (pScreen, pTimeout); + + /* Re-wrap if we still need this hook */ + if (xf86_config->rotation_damage != NULL) { +-- +2.25.1 + diff --git a/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend b/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend index fe24534f2..ebf7cd9e9 100644 --- a/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend +++ b/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend @@ -3,14 +3,15 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" SRC_URI += " \ file://monitor-hotplug.sh \ file://99-monitor-hotplug.rules \ + file://0001-xf86Rotate.c-Add-required-NULL-check.patch \ " do_install:append() { install -d ${D}${bindir} - install -m 0755 ${UNPACKDIR}/monitor-hotplug.sh ${D}${bindir} + install -m 0755 ${WORKDIR}/monitor-hotplug.sh ${D}${bindir} install -d ${D}${sysconfdir}/udev/rules.d - install -m 0644 ${UNPACKDIR}/99-monitor-hotplug.rules ${D}${sysconfdir}/udev/rules.d/99-monitor-hotplug.rules + install -m 0644 ${WORKDIR}/99-monitor-hotplug.rules ${D}${sysconfdir}/udev/rules.d/99-monitor-hotplug.rules } FILES:${PN} += "${sysconfdir}/udev/rules.d/*" diff --git a/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_6.6.10.bb b/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_6.6.10.bb index 23f31802a..3aaac030c 100644 --- a/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_6.6.10.bb +++ b/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_6.6.10.bb @@ -6,7 +6,7 @@ LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a" PV .= "+git" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" BRANCH ?= "xlnx_rel_v2024.1" REPO ?= "git://github.com/xilinx/dp-modules.git;protocol=https" @@ -23,4 +23,3 @@ EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}" COMPATIBLE_MACHINE = "^$" COMPATIBLE_MACHINE:zynqmp = "zynqmp" COMPATIBLE_MACHINE:versal = "versal" -COMPATIBLE_MACHINE:versal-net = "versal-net" diff --git a/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_6.6.10.bb b/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_6.6.40.bb similarity index 82% rename from meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_6.6.10.bb rename to meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_6.6.40.bb index da056896a..d6b4d5655 100644 --- a/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_6.6.10.bb +++ b/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_6.6.40.bb @@ -6,11 +6,11 @@ LIC_FILES_CHKSUM = "file://LICENSE.md;md5=b34277fe156508fd5a650609dc36d1fe" PV .= "+git" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" -BRANCH ?= "xlnx_rel_v2024.1" +BRANCH ?= "xlnx_rel_v2024.2" REPO ?= "git://github.com/Xilinx/hdmi-modules.git;protocol=https" -SRCREV = "edd297762e0bac3f4c5b64ef67244968e22020e2" +SRCREV = "4bb89eb3f3062eac8de1aa2b7e64d7f861e18caa" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" @@ -23,4 +23,3 @@ EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}" COMPATIBLE_MACHINE = "^$" COMPATIBLE_MACHINE:zynqmp = "zynqmp" COMPATIBLE_MACHINE:versal = "versal" -COMPATIBLE_MACHINE:versal-net = "versal-net" diff --git a/meta-xilinx-core/recipes-kernel/hdmi21/kernel-module-hdmi21_2024.2.bb b/meta-xilinx-core/recipes-kernel/hdmi21/kernel-module-hdmi21_2024.2.bb new file mode 100644 index 000000000..806d25158 --- /dev/null +++ b/meta-xilinx-core/recipes-kernel/hdmi21/kernel-module-hdmi21_2024.2.bb @@ -0,0 +1,23 @@ +SUMMARY = "Xilinx HDMI 2.1 FMC linux kernel module" +DESCRIPTION = "Out-of-tree HDMI 2.1 FMC kernel modules provider for aarch64 devices" +SECTION = "PETALINUX/modules" +LICENSE = "GPL-2.0-only" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a" + +inherit module + +SRC_BRANCH = "master" +INHIBIT_PACKAGE_STRIP = "1" + +SRC_URI = "git://github.com/Xilinx/hdmi21-modules.git;protocol=https;branch=${SRC_BRANCH}" + +SRCREV = "26a1d40723c58783f7aedba028a208ab9410df5f" + +S = "${WORKDIR}/git" + +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE:zynqmp = "zynqmp" +COMPATIBLE_MACHINE:versal = "versal" + +# The inherit of module.bbclass will automatically name module packages with +# "kernel-module-" prefix as required by the oe-core build environment. diff --git a/meta-xilinx-core/recipes-kernel/libtraceevent/libtraceevent/meson.patch b/meta-xilinx-core/recipes-kernel/libtraceevent/libtraceevent/meson.patch deleted file mode 100644 index 38b610713..000000000 --- a/meta-xilinx-core/recipes-kernel/libtraceevent/libtraceevent/meson.patch +++ /dev/null @@ -1,74 +0,0 @@ -Fixes for the Meson build of libtraceevent: - -- Make the plugin directory the same as the Makefiles -- Install the plugins as modules not static and versioned shared libraries -- Add an option to disable building the documentation (needs asciidoc and xmlto) - -Upstream-Status: Pending -Signed-off-by: Ross Burton - -diff --git a/meson.build b/meson.build -index b61c873..4bba4d8 100644 ---- a/meson.build -+++ b/meson.build -@@ -25,7 +25,7 @@ htmldir = join_paths(prefixdir, get_option('htmldir')) - libdir = join_paths(prefixdir, get_option('libdir')) - plugindir = get_option('plugindir') - if plugindir == '' -- plugindir = join_paths(libdir, 'libtraceevent/plugins') -+ plugindir = join_paths(libdir, 'traceevent/plugins') - endif - - add_project_arguments( -@@ -45,10 +45,13 @@ if cunit_dep.found() - subdir('utest') - endif - subdir('samples') --subdir('Documentation') - --custom_target( -- 'docs', -- output: 'docs', -- depends: [html, man], -- command: ['echo']) -+if get_option('docs') -+ subdir('Documentation') -+ -+ custom_target( -+ 'docs', -+ output: 'docs', -+ depends: [html, man], -+ command: ['echo']) -+endif -diff --git a/meson_options.txt b/meson_options.txt -index b2294f6..0611216 100644 ---- a/meson_options.txt -+++ b/meson_options.txt -@@ -4,6 +4,10 @@ - - option('plugindir', type : 'string', - description : 'set the plugin dir') -+ -+option('docs', type : 'boolean', value: true, -+ description : 'build documentation') -+ - option('htmldir', type : 'string', value : 'share/doc/libtraceevent-doc', - description : 'directory for HTML documentation') - option('asciidoctor', type : 'boolean', value: false, -diff --git a/plugins/meson.build b/plugins/meson.build -index 74ad664..4919be4 100644 ---- a/plugins/meson.build -+++ b/plugins/meson.build -@@ -19,11 +19,10 @@ plugins = [ - - pdeps = [] - foreach plugin : plugins -- pdeps += library( -+ pdeps += shared_module( - plugin.replace('.c', ''), - plugin, - name_prefix: '', -- version: library_version, - dependencies: [libtraceevent_dep], - include_directories: [incdir], - install: true, diff --git a/meta-xilinx-core/recipes-kernel/libtraceevent/libtraceevent_1.7.3.bb b/meta-xilinx-core/recipes-kernel/libtraceevent/libtraceevent_1.7.3.bb deleted file mode 100644 index 7b083252b..000000000 --- a/meta-xilinx-core/recipes-kernel/libtraceevent/libtraceevent_1.7.3.bb +++ /dev/null @@ -1,23 +0,0 @@ -# Copyright (C) 2022 Khem Raj -# Released under the MIT license (see COPYING.MIT for the terms) - -SUMMARY = "API to access the kernel tracefs directory" -HOMEPAGE = "https://git.kernel.org/pub/scm/libs/libtrace/libtracefs.git/" -LICENSE = "GPL-2.0-or-later & LGPL-2.1-or-later" -LIC_FILES_CHKSUM = "file://LICENSES/GPL-2.0;md5=e6a75371ba4d16749254a51215d13f97 \ - file://LICENSES/LGPL-2.1;md5=b370887980db5dd40659b50909238dbd" -SECTION = "libs" - -SRCREV = "dd148189b74da3e2f45c7e536319fec97cb71213" -SRC_URI = "git://git.kernel.org/pub/scm/libs/libtrace/libtraceevent.git;branch=${BPN};protocol=https \ - file://meson.patch" - -S = "${UNPACKDIR}/git" - -inherit meson pkgconfig - -EXTRA_OEMESON = "-Ddocs=false" - -PACKAGES += "${PN}-plugins" - -FILES:${PN}-plugins += "${libdir}/traceevent/plugins" diff --git a/meta-xilinx-core/recipes-kernel/linux-firmware/linux-firmware-ti-bt.bb b/meta-xilinx-core/recipes-kernel/linux-firmware/linux-firmware-ti-bt.bb index 76002cb39..977406713 100644 --- a/meta-xilinx-core/recipes-kernel/linux-firmware/linux-firmware-ti-bt.bb +++ b/meta-xilinx-core/recipes-kernel/linux-firmware/linux-firmware-ti-bt.bb @@ -14,7 +14,7 @@ NO_GENERIC_LICENSE[Firmware-ti-bt] = "LICENSE.ti-bt" SRC_URI = "git://git.ti.com/ti-bt/service-packs.git;protocol=https;branch=master" SRCREV = "c290f8af9e388f37e509ecb111a1b64572b7c225" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit allarch diff --git a/meta-xilinx-core/recipes-kernel/linux-xlnx-udev-rules/linux-xlnx-udev-rules.bb b/meta-xilinx-core/recipes-kernel/linux-xlnx-udev-rules/linux-xlnx-udev-rules.bb index 8eb742c97..966aaaf5e 100644 --- a/meta-xilinx-core/recipes-kernel/linux-xlnx-udev-rules/linux-xlnx-udev-rules.bb +++ b/meta-xilinx-core/recipes-kernel/linux-xlnx-udev-rules/linux-xlnx-udev-rules.bb @@ -7,7 +7,7 @@ SRC_URI = "\ file://99-aie-device.rules \ " -S = "${UNPACKDIR}" +S = "${WORKDIR}" inherit useradd @@ -23,7 +23,7 @@ do_compile[noexec] = '1' do_install () { install -d ${D}${sysconfdir}/udev/rules.d - for rule in $(find ${UNPACKDIR} -maxdepth 1 -type f -name "*.rules"); do + for rule in $(find ${WORKDIR} -maxdepth 1 -type f -name "*.rules"); do install -m 0644 $rule ${D}${sysconfdir}/udev/rules.d/ done } diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx.inc b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx.inc index 3133c4856..329ae03bc 100644 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx.inc +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx.inc @@ -27,14 +27,14 @@ LIC_FILES_CHKSUM = "file://COPYING;md5=6bc538ed5bd9a7fc9398086aedcd7e46" EXTKERNELSRC = "${@'1' if d.getVar('EXTERNALSRC') else ''}" -# Force the use of the KBUILD_DEFCONFIG even if some other defconfig was generated in the ${UNPACKDIR} +# Force the use of the KBUILD_DEFCONFIG even if some other defconfig was generated in the ${WORKDIR} do_kernel_metadata:prepend () { - [ -n "${KBUILD_DEFCONFIG}" ] && [ -e ${UNPACKDIR}/defconfig ] && rm ${UNPACKDIR}/defconfig + [ -n "${KBUILD_DEFCONFIG}" ] && [ -e ${WORKDIR}/defconfig ] && rm ${WORKDIR}/defconfig } do_configure:prepend () { if [ -n "${KBUILD_DEFCONFIG}" ] && [ -n "${EXTKERNELSRC}" ]; then - cp ${S}/arch/${ARCH}/configs/${KBUILD_DEFCONFIG} ${UNPACKDIR}/defconfig + cp ${S}/arch/${ARCH}/configs/${KBUILD_DEFCONFIG} ${WORKDIR}/defconfig fi } diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/linux-xlnx-kmeta/features/hwmon/hwmon_modules.cfg b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/linux-xlnx-kmeta/features/hwmon/hwmon_modules.cfg new file mode 100644 index 000000000..b6db5f90f --- /dev/null +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/linux-xlnx-kmeta/features/hwmon/hwmon_modules.cfg @@ -0,0 +1,2 @@ +CONFIG_SENSORS_TPS53679=m + diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/linux-xlnx-kmeta/features/hwmon/hwmon_modules.scc b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/linux-xlnx-kmeta/features/hwmon/hwmon_modules.scc new file mode 100644 index 000000000..25ef4034d --- /dev/null +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx/linux-xlnx-kmeta/features/hwmon/hwmon_modules.scc @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: MIT +kconf hardware hwmon_modules.cfg diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6-v2024.1.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6-v2024.1.bb deleted file mode 100644 index 71ac690ef..000000000 --- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6-v2024.1.bb +++ /dev/null @@ -1,19 +0,0 @@ -LINUX_VERSION = "6.6.10" -YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.6;destsuffix=yocto-kmeta" -KBRANCH="xlnx_rebase_v6.6_LTS" -SRCREV = "3af4295e00efdced3e8c6973606a7de55f6bf7dc" -SRCREV_meta = "5d0809d0d939c7738cb6e5391126c73fd0e4e865" - -KCONF_AUDIT_LEVEL="0" - -include linux-xlnx.inc - -FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" - -# Workaround for: -# rm: cannot remove '.../tmp/work/zynqmp_generic-xilinx-linux/linux-xlnx/6.6.0-xilinx-v2024.1+gitAUTOINC+340eed5001-r0/image/lib/modules/6.6.0-xilinx-v2024.1-g340eed500130/source': No such file or directory -# This will not be required Scarthgap -kernel_do_install:prepend () { - mkdir -p "${D}${nonarch_base_libdir}/modules/${KERNEL_VERSION}" - touch "${D}${nonarch_base_libdir}/modules/${KERNEL_VERSION}/source" -} diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6.10-v2024.1.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6.10-v2024.1.bb new file mode 100644 index 000000000..4558101a8 --- /dev/null +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6.10-v2024.1.bb @@ -0,0 +1,11 @@ +LINUX_VERSION = "6.6.10" +YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.6;destsuffix=yocto-kmeta" +KBRANCH="xlnx_rebase_v6.6_LTS" +SRCREV = "3af4295e00efdced3e8c6973606a7de55f6bf7dc" +SRCREV_meta = "5d0809d0d939c7738cb6e5391126c73fd0e4e865" + +KCONF_AUDIT_LEVEL="0" + +include linux-xlnx.inc + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6.40-v2024.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6.40-v2024.2.bb new file mode 100644 index 000000000..e862f747a --- /dev/null +++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_6.6.40-v2024.2.bb @@ -0,0 +1,11 @@ +LINUX_VERSION = "6.6.40" +YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.6;destsuffix=yocto-kmeta" +KBRANCH="xlnx_rebase_v6.6_LTS" +SRCREV = "2b7f6f70a62a52a467bed030a27c2ada879106e9" +SRCREV_meta = "5d0809d0d939c7738cb6e5391126c73fd0e4e865" + +KCONF_AUDIT_LEVEL="0" + +include linux-xlnx.inc + +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" diff --git a/meta-xilinx-core/recipes-kernel/lopper/xilinx-lops.bb b/meta-xilinx-core/recipes-kernel/lopper/xilinx-lops.bb index c44e8ab10..2648c3724 100644 --- a/meta-xilinx-core/recipes-kernel/lopper/xilinx-lops.bb +++ b/meta-xilinx-core/recipes-kernel/lopper/xilinx-lops.bb @@ -13,7 +13,7 @@ SRC_URI = " \ LIC_FILES_CHKSUM = "file://lop-microblaze-yocto.dts;endline=10;md5=27139f9b862dc6fe466c7157aba7ed9c" -S = "${UNPACKDIR}" +S = "${WORKDIR}" inherit python3-dir diff --git a/meta-xilinx-core/recipes-support/freeipmi/freeipmi_1.6.10.bb b/meta-xilinx-core/recipes-support/freeipmi/freeipmi_1.6.10.bb index 5ac2f4a67..0da7b6f6e 100644 --- a/meta-xilinx-core/recipes-support/freeipmi/freeipmi_1.6.10.bb +++ b/meta-xilinx-core/recipes-support/freeipmi/freeipmi_1.6.10.bb @@ -34,7 +34,7 @@ SRC_URI = " \ " SRCREV ?= "816a69eb15a9034351381211d9cd15de81da10c7" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit autotools-brokensep pkgconfig systemd diff --git a/meta-xilinx-core/recipes-support/libgpg-error/libgpg-error_%.bbappend b/meta-xilinx-core/recipes-support/libgpg-error/libgpg-error_%.bbappend index d7d2cb6cb..f3e920c2a 100644 --- a/meta-xilinx-core/recipes-support/libgpg-error/libgpg-error_%.bbappend +++ b/meta-xilinx-core/recipes-support/libgpg-error/libgpg-error_%.bbappend @@ -3,6 +3,6 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files:" SRC_URI:append:microblaze = " file://lock-obj-pub.microblazeel-unknown-linux-gnu.h" do_configure:append:microblaze () { - cp ${UNPACKDIR}/lock-obj-pub.microblazeel-unknown-linux-gnu.h ${S}/src/syscfg/ + cp ${WORKDIR}/lock-obj-pub.microblazeel-unknown-linux-gnu.h ${S}/src/syscfg/ } diff --git a/meta-xilinx-core/recipes-utils/mb-realoc/files/mb-realoc b/meta-xilinx-core/recipes-utils/mb-realoc/files/mb-realoc new file mode 100755 index 000000000..158560f17 --- /dev/null +++ b/meta-xilinx-core/recipes-utils/mb-realoc/files/mb-realoc @@ -0,0 +1,239 @@ +#!/bin/bash +# +# FILE: +# mb-realoc +# +# DESCRIPTION: +# Takes a fully linked and relocated ELF file, and turns it into an +# executable blob that can be run from any valid memory. The ELF image +# (loadable segments only) is converted to a payload. The blob copies +# the payload to the correct address in memory, and then launches it. +# +# MODIFICATION: +# +# LICENSING: +# Copyright (c) 2013 Xilinx Inc. All rights reserved. +# + + +# Default values for main variables +BLOB_LOAD_ADDR=0x0 +INFILE="" +BLOBNAME="" +JUMP_OFFSET= + +# OTher useful vars +TMP_BINFILE=$$.bin +PAYLOAD_SECTION=.payload +BLOBSTUB=/tmp/blobstub-$$ + +function usage { + + echo "Generate a PIC executable blob that copies the payload to its linked address and executes it." +# echo "Generate a PIC executable blob that copies the payload to its" +# echo "linked address and executes it. The blob itself may be loaded" +# echo "to any physical address and executed, provided that" +# echo " 1) The payload's linked address is writeable" +# echo " 2) The blob's and payload's addresses don't overlap" +# echo "tGenerates blobname.[srec|elf|bin] files into the working directory" + echo "" + echo "Usage:" + echo " mb-realoc [OPTIONS] -i PAYLOAD.elf -o BLOB_NAME" + echo "" + echo "Required:" + echo " -i, --input PAYLOAD[.elf] the fully relocated ELF file that will be the" + echo " payload." + echo " -o, --output BLOB_NAME basename of the resulting blob files." + echo "" + echo "Optional:" + echo " -h, --help show function usage" + echo " -j, --jump-offset OFFS Offset from load address to jump (auto-detect)" + echo " -l, --load LOAD_ADDR address at which FS-boot will load the stub+payload" + echo "" +} + +function parse_args { + + args=$(getopt -o "j:hi:l:o:" --long "jump-offset:,help,input:,load:,output" -- "$@") + + [ $? -ne 0 ] && usage && exit -1 + + eval set -- "${args}" + + while true; do + case $1 in + -h | --help) usage; exit 0; ;; + -l | --load) BLOB_LOAD_ADDR=$2; + shift; shift; + ;; + -i | --input) INFILE=$2; + shift; shift; + ;; + -j | --jump-offset) JUMP_OFFSET=$2; + shift; shift; + ;; + -o | --output) BLOBNAME=$2; + shift; shift; + ;; + --) shift; break; ;; + *) usage; exit -1; + ;; + esac + done + + [ ! -z "$@" ] && echo "ERROR: Extra parameters: $@" && usage && exit -1 + + if [ "${INFILE}" == "" -o "${BLOBNAME}" == "" ]; then + echo "Error: Required parameters not provided" + usage && exit -1 + fi +} + +function get_elf_addr_and_size { + + # Get load address of payload ELF file + ELF_LMA=0x$(${CROSS_COMPILE}objdump --headers $INFILE | grep -w "\.data" | awk '{print $5}') + + # Generate binary image of payload + ${CROSS_COMPILE}objcopy -R .note -R .comment -R .note.gnu.build-id -O binary $INFILE $TMP_BINFILE + + # Work out its size + ELF_SIZE=$(${CROSS_COMPILE}size --target binary ${TMP_BINFILE} | grep "${TMP_BINFILE}" | cut -f 4) + +} + +function get_elf_jump_offset { + entry_point=$(${CROSS_COMPILE}readelf -h ${INFILE} | awk '/Entry point/ {print $4}') + JUMP_OFFSET=$(printf "0x%08x" $((${entry_point} - ${ELF_LMA}))) +} + +function create_blobstub:microblaze { + +cat > ${BLOBSTUB}.s.in << __eof +/* +// blobstub.s.in +// template for relocatable code blob mechanism +// +// LICENSING: +// Copyright (c) 2013 Xilinx Inc. All rights reserved. +*/ + .section .text + + .org 0x0 + + .globl bootstub + .global _start + .func bootstub + +_start: +bootstub: + brlid r5, locator; /* r5 gets address of bootstub */ + nop; +locator: + addi r5, r5, 0x100; /* Shift up to start of payload */ + lwi r6, r5, 0; /* Destination of payload */ + lwi r7, r5, 4; /* Length of payload */ + lwi r9, r5, 8; /* boot offset */ + addi r5, r5, 0xc; /* Start of payload */ + add r4, r6, r0; /* Save payload destination (for jump) */ + + addi r7, r7, 0x3; /* Convert length to words */ + srl r7, r7; /* Rounded up */ + srl r7, r7; + + or r10, r0, r0; /* Setup r10 for incrementing address offset */ +copyloop: + beqi r7, copy_done; /* Finished copying? */ + lw r8, r5, r10; /* Read word from payload */ + sw r8, r6, r10; /* Write to destination */ + addi r10, r10, 4; /* Increment ptr offset */ + brid copyloop; /* Loop with delay slot */ + addi r7, r7, -1; /* Decrement copy count */ + +copy_done: + add r4, r4, r9; /* Apply any boot offset */ + bra r4; /* Launch payload */ + + .align 2 + .org 0x100 +payload: + .int @destination@ + .int @bytecount@ + .int @jump_offset@ + + .end bootstub + +__eof + +} + +function build_blobstub { + # Substitute address and size of payload into blobstub + # source file + sed -e "s/@destination@/${ELF_LMA}/" \ + -e "s/@bytecount@/${ELF_SIZE}/" \ + -e "s/@jump_offset@/${JUMP_OFFSET}/" ${BLOBSTUB}.s.in > ${BLOBSTUB}.s + + # Build the blobstub + ${CROSS_COMPILE}as -o ${BLOBSTUB}.o ${BLOBSTUB}.s + + # Remove blobstub assembly file and template + rm ${BLOBSTUB}.s.in + rm ${BLOBSTUB}.s +} + +function insert_payload { + + # Add the payload in a new section + ${CROSS_COMPILE}objcopy --add-section=${PAYLOAD_SECTION}=${TMP_BINFILE}\ + --adjust-section-vma=${PAYLOAD_SECTION}=0x10C \ + --set-section-flags=${PAYLOAD_SECTION}=alloc,load,data \ + ${BLOBSTUB}.o ${BLOBNAME}.elf + + # Remove temporary binary image and blobstub object file + rm ${TMP_BINFILE} + rm ${BLOBSTUB}.o +} + +function relocate_blob { + # Relocate the entire package to the desired FS-boot load address + ${CROSS_COMPILE}objcopy --change-addresses=${BLOB_LOAD_ADDR} ${BLOBNAME}.elf +} + +function generate_output_files { + ${CROSS_COMPILE}objcopy -O srec ${BLOBNAME}.elf ${BLOBNAME}.srec + ${CROSS_COMPILE}objcopy -O binary ${BLOBNAME}.elf ${BLOBNAME}.bin +} + +function xlnx_readelf { + ${CROSS_COMPILE}readelf $@ +} + +parse_args "$@" + +if [ ! -f $INFILE ]; then + echo "Error: ${INFILE} does not exist" + exit -1; +fi + +get_elf_addr_and_size +[ -z "${JUMP_OFFSET}" ] && get_elf_jump_offset + +echo "INFO: Payload load address:$ELF_LMA" +echo "INFO: Payload size:$ELF_SIZE" +echo "INFO: Jump offset:$JUMP_OFFSET" + +PETALINUX_ARCH=$(xlnx_readelf -e ${INFILE} | grep "Machine:" | awk '{print $2}') +echo "ELF ARCH is ${PETALINUX_ARCH}" + +if [ "${PETALINUX_ARCH}" == "Xilinx" ]; then + create_blobstub:microblaze + build_blobstub + insert_payload + relocate_blob +else + echo "Architecture is not Microblaze" + rm ${TMP_BINFILE} + ${CROSS_COMPILE}objcopy $INFILE ${BLOBNAME}.elf +fi +generate_output_files diff --git a/meta-xilinx-core/recipes-utils/mb-realoc/mb-realoc.bb b/meta-xilinx-core/recipes-utils/mb-realoc/mb-realoc.bb new file mode 100644 index 000000000..f3b53c25f --- /dev/null +++ b/meta-xilinx-core/recipes-utils/mb-realoc/mb-realoc.bb @@ -0,0 +1,36 @@ +DESCRIPTION = "mb-realoc" + +LICENSE = "CLOSED" + +PROVIDES = "virtual/elfrealloc" + +inherit deploy + +SRC_URI:append = " file://mb-realoc" + +PV = "0.1" + +ELF_LOAD_ADDR ?= "0" +ELF_JUMP_OFFSET ?= "" +ELF_INFILE ?= "${DEPLOY_DIR_IMAGE}/u-boot.elf" +OUTFILE_NAME ?= "u-boot-s" +B = "${WORKDIR}" + +PARALLEL_MAKE="" + +do_configure[noexec]="1" +do_compile[depends] = "virtual/bootloader:do_deploy" + +do_compile() { + export CROSS_COMPILE="${TARGET_PREFIX}" + ${WORKDIR}/mb-realoc -l ${ELF_LOAD_ADDR} -i ${ELF_INFILE} -o ${OUTFILE_NAME} +} + +do_install[noexec] = "1" + +do_deploy() { + install -d ${DEPLOYDIR} + install -m 0644 ${WORKDIR}/${OUTFILE_NAME}.bin ${DEPLOYDIR}/${OUTFILE_NAME}.bin +} + +addtask deploy after do_compile diff --git a/meta-xilinx-core/recipes-xrt/xrt/xclbinutil-native_202320.2.16.0.bb b/meta-xilinx-core/recipes-xrt/xrt/xclbinutil-native_202320.2.16.0.bb index 60df24e33..6cf10817e 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xclbinutil-native_202320.2.16.0.bb +++ b/meta-xilinx-core/recipes-xrt/xrt/xclbinutil-native_202320.2.16.0.bb @@ -15,7 +15,7 @@ LIC_FILES_CHKSUM = " \ file://runtime_src/core/common/elf/LICENSE.txt;md5=b996e8b74af169e7e72e22d9e7d05b06 \ " -S = "${UNPACKDIR}/git/src" +S = "${WORKDIR}/git/src" inherit cmake pkgconfig native @@ -25,5 +25,5 @@ EXTRA_OECMAKE += " -DCMAKE_BUILD_TYPE=Release -DCMAKE_EXPORT_COMPILE_COMANDS=ON" do_install() { install -d ${D}${bindir} - install -Dm 0755 ${UNPACKDIR}/build/runtime_src/tools/xclbinutil/xclbinutil ${D}${bindir} + install -Dm 0755 ${WORKDIR}/build/runtime_src/tools/xclbinutil/xclbinutil ${D}${bindir} } diff --git a/meta-xilinx-core/recipes-xrt/xrt/xclbinutil-native_202410.2.17.319.bb b/meta-xilinx-core/recipes-xrt/xrt/xclbinutil-native_202410.2.17.319.bb index 212919251..37f32a235 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xclbinutil-native_202410.2.17.319.bb +++ b/meta-xilinx-core/recipes-xrt/xrt/xclbinutil-native_202410.2.17.319.bb @@ -15,7 +15,7 @@ LIC_FILES_CHKSUM = " \ file://runtime_src/core/common/elf/LICENSE.txt;md5=b996e8b74af169e7e72e22d9e7d05b06 \ " -S = "${UNPACKDIR}/git/src" +S = "${WORKDIR}/git/src" inherit cmake pkgconfig native @@ -25,5 +25,5 @@ EXTRA_OECMAKE += " -DCMAKE_BUILD_TYPE=Release -DCMAKE_EXPORT_COMPILE_COMANDS=ON" do_install() { install -d ${D}${bindir} - install -Dm 0755 ${UNPACKDIR}/build/runtime_src/tools/xclbinutil/xclbinutil ${D}${bindir} + install -Dm 0755 ${WORKDIR}/build/runtime_src/tools/xclbinutil/xclbinutil ${D}${bindir} } diff --git a/meta-xilinx-core/recipes-xrt/xrt/xclbinutil-native_202420.2.18.0.bb b/meta-xilinx-core/recipes-xrt/xrt/xclbinutil-native_202420.2.18.0.bb new file mode 100644 index 000000000..6e2800092 --- /dev/null +++ b/meta-xilinx-core/recipes-xrt/xrt/xclbinutil-native_202420.2.18.0.bb @@ -0,0 +1,29 @@ +SUMMARY = "Xilinx Runtime(XRT) - minimal native build for xclbinutil" +DESCRIPTION = "Native build of xclbinutil using XRT codebase" + +require xrt-${PV}.inc + +FILESEXTRAPATHS:append := ":${THISDIR}/xrt" + +LICENSE = "GPL-2.0-or-later & Apache-2.0 & MIT" +LIC_FILES_CHKSUM = " \ + file://../LICENSE;md5=de2c993ac479f02575bcbfb14ef9b485 \ + file://runtime_src/core/edge/drm/zocl/LICENSE;md5=7d040f51aae6ac6208de74e88a3795f8 \ + file://runtime_src/core/pcie/driver/linux/xocl/LICENSE;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ + file://runtime_src/core/pcie/linux/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 \ + file://runtime_src/core/tools/xbutil2/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 \ + file://runtime_src/core/common/elf/LICENSE.txt;md5=b996e8b74af169e7e72e22d9e7d05b06 \ +" + +S = "${WORKDIR}/git/src" + +inherit cmake pkgconfig native + +DEPENDS = "libdrm-native opencl-headers-native ocl-icd-native boost-native rapidjson-native protobuf-native python3-pybind11-native systemtap-native" + +EXTRA_OECMAKE += " -DCMAKE_BUILD_TYPE=Release -DCMAKE_EXPORT_COMPILE_COMANDS=ON" + +do_install() { + install -d ${D}${bindir} + install -Dm 0755 ${WORKDIR}/build/runtime_src/tools/xclbinutil/xclbinutil ${D}${bindir} +} diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt-202420.2.18.0.inc b/meta-xilinx-core/recipes-xrt/xrt/xrt-202420.2.18.0.inc new file mode 100644 index 000000000..27522dd8b --- /dev/null +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt-202420.2.18.0.inc @@ -0,0 +1,6 @@ +REPO ?= "gitsm://github.com/Xilinx/XRT.git;protocol=https" +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG};name=xrt" + +BRANCH = "2024.2" +SRCREV_xrt = "d05b18dc38cc6804ecb4b3dbe6de23f158319567" diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt_202210.2.13.479.bb b/meta-xilinx-core/recipes-xrt/xrt/xrt_202210.2.13.479.bb index 49cfa2284..0e9dd3dbd 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt_202210.2.13.479.bb +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt_202210.2.13.479.bb @@ -13,7 +13,7 @@ LIC_FILES_CHKSUM = "file://../LICENSE;md5=da5408f748bce8a9851dac18e66f4bcf \ file://runtime_src/core/pcie/tools/xbutil/LICENSE;md5=d273d63619c9aeaf15cdaf76422c4f87 \ file://runtime_src/core/edge/tools/xbutil/LICENSE;md5=d273d63619c9aeaf15cdaf76422c4f87 " -S = "${UNPACKDIR}/git/src" +S = "${WORKDIR}/git/src" inherit cmake pkgconfig diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt_202220.2.14.0.bb b/meta-xilinx-core/recipes-xrt/xrt/xrt_202220.2.14.0.bb index f686a7467..7107c3dfb 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt_202220.2.14.0.bb +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt_202220.2.14.0.bb @@ -12,7 +12,7 @@ LIC_FILES_CHKSUM = "file://../LICENSE;md5=da5408f748bce8a9851dac18e66f4bcf \ file://runtime_src/core/pcie/linux/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 \ file://runtime_src/core/tools/xbutil2/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 " -S = "${UNPACKDIR}/git/src" +S = "${WORKDIR}/git/src" inherit cmake pkgconfig diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt_202310.2.15.0.bb b/meta-xilinx-core/recipes-xrt/xrt/xrt_202310.2.15.0.bb index 8a78d2f99..0ee4d137a 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt_202310.2.15.0.bb +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt_202310.2.15.0.bb @@ -17,7 +17,7 @@ COMPATIBLE_MACHINE:zynqmp = ".*" COMPATIBLE_MACHINE:versal = ".*" COMPATIBLE_MACHINE:versal-net = ".*" -S = "${UNPACKDIR}/git/src" +S = "${WORKDIR}/git/src" inherit cmake pkgconfig diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt_202320.2.16.0.bb b/meta-xilinx-core/recipes-xrt/xrt/xrt_202320.2.16.0.bb index abb0190d9..946b65518 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt_202320.2.16.0.bb +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt_202320.2.16.0.bb @@ -18,7 +18,7 @@ COMPATIBLE_MACHINE:zynqmp = ".*" COMPATIBLE_MACHINE:versal = ".*" COMPATIBLE_MACHINE:versal-net = ".*" -S = "${UNPACKDIR}/git/src" +S = "${WORKDIR}/git/src" inherit cmake pkgconfig diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt_202410.2.17.319.bb b/meta-xilinx-core/recipes-xrt/xrt/xrt_202410.2.17.319.bb index c88450c28..ff058db35 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt_202410.2.17.319.bb +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt_202410.2.17.319.bb @@ -18,7 +18,7 @@ COMPATIBLE_MACHINE:zynqmp = ".*" COMPATIBLE_MACHINE:versal = ".*" COMPATIBLE_MACHINE:versal-net = ".*" -S = "${UNPACKDIR}/git/src" +S = "${WORKDIR}/git/src" inherit cmake pkgconfig diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt_202420.2.18.0.bb b/meta-xilinx-core/recipes-xrt/xrt/xrt_202420.2.18.0.bb new file mode 100644 index 000000000..d538f947c --- /dev/null +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt_202420.2.18.0.bb @@ -0,0 +1,60 @@ +SUMMARY = "Xilinx Runtime(XRT) libraries" +DESCRIPTION = "Xilinx Runtime User Space Libraries and headers" + +require xrt-${PV}.inc + +LICENSE = "GPL-2.0-or-later & Apache-2.0 & MIT" +LIC_FILES_CHKSUM = "file://../LICENSE;md5=de2c993ac479f02575bcbfb14ef9b485 \ + file://runtime_src/core/edge/drm/zocl/LICENSE;md5=7d040f51aae6ac6208de74e88a3795f8 \ + file://runtime_src/core/pcie/driver/linux/xocl/LICENSE;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ + file://runtime_src/core/pcie/linux/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 \ + file://runtime_src/core/tools/xbutil2/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 \ + file://runtime_src/core/common/elf/LICENSE.txt;md5=b996e8b74af169e7e72e22d9e7d05b06 " + +COMPATIBLE_HOST = "^$" +COMPATIBLE_HOST:aarch64 = ".*" + +S = "${WORKDIR}/git/src" + +inherit cmake pkgconfig + +BBCLASSEXTEND = "native nativesdk" + +PACKAGECONFIG ??= "aie" +PACKAGECONFIG[aie] = ",,libxaiengine aiefal,libxaiengine aiefal" + +# util-linux is for libuuid-dev. +DEPENDS = "libdrm opencl-headers ocl-icd opencl-clhpp boost util-linux git-replacement-native protobuf-native protobuf elfutils libffi rapidjson systemtap libdfx" +RDEPENDS:${PN} = "bash ocl-icd boost-system boost-filesystem zocl (= ${PV})" + +EXTRA_OECMAKE += " \ + -DCMAKE_BUILD_TYPE=Release \ + -DCMAKE_EXPORT_COMPILE_COMANDS=ON \ + -DXRT_LIBDFX=true \ + " + +EXTRA_OECMAKE .= "${@bb.utils.contains('PACKAGECONFIG', 'aie', ' -DXRT_AIE_BUILD=true', '', d)}" +TARGET_CXXFLAGS .= "${@bb.utils.contains('PACKAGECONFIG', 'aie', ' -DXRT_ENABLE_AIE -DFAL_LINUX=on', '', d)}" + +# Systems with AIE also require libmetal, this is implemented in the dynamic-layers +# See: meta-xilinx-core/dynamic-layers/openamp-layer/recipes-xrt/xrt_gt.bbappend +# Note: If meta-openamp is not available, AIE will not be enabled. + +FILES_SOLIBSDEV = "" +FILES:${PN} += "\ + ${libdir}/lib*.so \ + ${libdir}/lib*.so.* \ + ${libdir}/ps_kernels_lib \ + /lib/*.so* \ + ${datadir}" +INSANE_SKIP:${PN} += "dev-so" + +pkg_postinst_ontarget:${PN}() { + #!/bin/sh + if [ ! -e /etc/OpenCL/vendors/xilinx.icd ]; then + echo "INFO: Creating ICD entry for Xilinx Platform" + mkdir -p /etc/OpenCL/vendors + echo "libxilinxopencl.so" > /etc/OpenCL/vendors/xilinx.icd + chmod -R 755 /etc/OpenCL + fi +} diff --git a/meta-xilinx-core/recipes-xrt/zocl/zocl_202210.2.13.479.bb b/meta-xilinx-core/recipes-xrt/zocl/zocl_202210.2.13.479.bb index 464b96fd7..7063178a1 100644 --- a/meta-xilinx-core/recipes-xrt/zocl/zocl_202210.2.13.479.bb +++ b/meta-xilinx-core/recipes-xrt/zocl/zocl_202210.2.13.479.bb @@ -11,7 +11,7 @@ LICENSE = "GPLv2 & Apache-2.0" # Patch is applied as -p 4 to the src/runtime_src/core/edge directory SRC_URI += "file://0001-Fixed-ZOCL-dtbo-path-len-issue-6966.patch;striplevel=5;patchdir=./../../" -S = "${UNPACKDIR}/git/src/runtime_src/core/edge/drm/zocl" +S = "${WORKDIR}/git/src/runtime_src/core/edge/drm/zocl" inherit module diff --git a/meta-xilinx-core/recipes-xrt/zocl/zocl_202220.2.14.0.bb b/meta-xilinx-core/recipes-xrt/zocl/zocl_202220.2.14.0.bb index 7643b42ab..39e9f9fbd 100644 --- a/meta-xilinx-core/recipes-xrt/zocl/zocl_202220.2.14.0.bb +++ b/meta-xilinx-core/recipes-xrt/zocl/zocl_202220.2.14.0.bb @@ -8,7 +8,7 @@ require recipes-xrt/xrt/xrt-${PV}.inc LIC_FILES_CHKSUM = "file://LICENSE;md5=7d040f51aae6ac6208de74e88a3795f8" LICENSE = "GPL-2.0-or-later & Apache-2.0" -S = "${UNPACKDIR}/git/src/runtime_src/core/edge/drm/zocl" +S = "${WORKDIR}/git/src/runtime_src/core/edge/drm/zocl" inherit module diff --git a/meta-xilinx-core/recipes-xrt/zocl/zocl_202310.2.15.0.bb b/meta-xilinx-core/recipes-xrt/zocl/zocl_202310.2.15.0.bb index 998ff99c8..47efc58a2 100644 --- a/meta-xilinx-core/recipes-xrt/zocl/zocl_202310.2.15.0.bb +++ b/meta-xilinx-core/recipes-xrt/zocl/zocl_202310.2.15.0.bb @@ -13,7 +13,7 @@ COMPATIBLE_MACHINE:zynqmp = ".*" COMPATIBLE_MACHINE:versal = ".*" COMPATIBLE_MACHINE:versal-net = ".*" -S = "${UNPACKDIR}/git/src/runtime_src/core/edge/drm/zocl" +S = "${WORKDIR}/git/src/runtime_src/core/edge/drm/zocl" inherit module diff --git a/meta-xilinx-core/recipes-xrt/zocl/zocl_202320.2.16.0.bb b/meta-xilinx-core/recipes-xrt/zocl/zocl_202320.2.16.0.bb index 998ff99c8..47efc58a2 100644 --- a/meta-xilinx-core/recipes-xrt/zocl/zocl_202320.2.16.0.bb +++ b/meta-xilinx-core/recipes-xrt/zocl/zocl_202320.2.16.0.bb @@ -13,7 +13,7 @@ COMPATIBLE_MACHINE:zynqmp = ".*" COMPATIBLE_MACHINE:versal = ".*" COMPATIBLE_MACHINE:versal-net = ".*" -S = "${UNPACKDIR}/git/src/runtime_src/core/edge/drm/zocl" +S = "${WORKDIR}/git/src/runtime_src/core/edge/drm/zocl" inherit module diff --git a/meta-xilinx-core/recipes-xrt/zocl/zocl_202410.2.17.319.bb b/meta-xilinx-core/recipes-xrt/zocl/zocl_202410.2.17.319.bb index 998ff99c8..47efc58a2 100644 --- a/meta-xilinx-core/recipes-xrt/zocl/zocl_202410.2.17.319.bb +++ b/meta-xilinx-core/recipes-xrt/zocl/zocl_202410.2.17.319.bb @@ -13,7 +13,7 @@ COMPATIBLE_MACHINE:zynqmp = ".*" COMPATIBLE_MACHINE:versal = ".*" COMPATIBLE_MACHINE:versal-net = ".*" -S = "${UNPACKDIR}/git/src/runtime_src/core/edge/drm/zocl" +S = "${WORKDIR}/git/src/runtime_src/core/edge/drm/zocl" inherit module diff --git a/meta-xilinx-core/recipes-xrt/zocl/zocl_202420.2.18.0.bb b/meta-xilinx-core/recipes-xrt/zocl/zocl_202420.2.18.0.bb new file mode 100644 index 000000000..e5efd89cb --- /dev/null +++ b/meta-xilinx-core/recipes-xrt/zocl/zocl_202420.2.18.0.bb @@ -0,0 +1,28 @@ +SUMMARY = "Xilinx Runtime(XRT) driver module" +DESCRIPTION = "Xilinx Runtime driver module provides memory management and compute unit schedule" + +COMPATIBLE_MACHINE:microblaze = "none" + +PROVIDES += "zocl" + +require recipes-xrt/xrt/xrt-${PV}.inc + +LIC_FILES_CHKSUM = "file://LICENSE;md5=7d040f51aae6ac6208de74e88a3795f8" +LICENSE = "GPL-2.0-or-later & Apache-2.0" + +COMPATIBLE_MACHINE ?= "^$" +COMPATIBLE_MACHINE:zynqmp = ".*" +COMPATIBLE_MACHINE:versal = ".*" +COMPATIBLE_MACHINE:versal-net = ".*" + +S = "${WORKDIR}/git/src/runtime_src/core/edge/drm/zocl" + +inherit module + +pkg_postinst_ontarget:${PN}() { + #!/bin/sh + echo "Unloading old XRT Linux kernel modules" + ( rmmod zocl || true ) > /dev/null 2>&1 + echo "Loading new XRT Linux kernel modules" + modprobe zocl +} diff --git a/meta-xilinx-demos/README.md b/meta-xilinx-demos/README.md new file mode 100644 index 000000000..1bbe744a8 --- /dev/null +++ b/meta-xilinx-demos/README.md @@ -0,0 +1,64 @@ +# meta-xilinx-demos + +This layer contains demos recipes and packagegroup for PL firmware, openamp, +jupyter notebook, ros, qt5, multimedia, sdfec etc for AMD Adaptive SoC's and +FPGA's target images. + +> **Note:** Some of the demos recipes and packagegroup are moved from meta-petalinux +> layer to meta-xilinx-demos layer and these packagegroup are renamed. + +## How to enable demos for target image + +1. Follow [Building Instructions](../README.building.md) upto step 4. + +2. Add meta-xilinx-demos to bblayers.conf as shown below. +``` +$ bitbake-layers add-layer .//meta-xilinx/meta-xilinx-demos +``` + +3. Add required demos recipes or packagegroup to target image using IMAGE_INSTALL + variable to the end of the conf/local.conf file as shown below. For example + include gpio-demo application. +``` +IMAGE_INSTALL:append = " gpio-demo" +``` + +4. Continue [Building Instructions](../README.building.md) from step 5. + +## Dependencies + +This layer depends on: + + URI: https://git.yoctoproject.org/poky + layers: meta, meta-poky + branch: scarthgap + + URI: https://git.openembedded.org/meta-openembedded + layers: meta-oe, meta-perl, meta-python, meta-filesystems, meta-gnome, + meta-multimedia, meta-networking, meta-webserver, meta-xfce, + meta-initramfs. + branch: scarthgap + + URI: + https://git.yoctoproject.org/meta-xilinx (official version) + https://github.com/Xilinx/meta-xilinx (development and AMD release) + layers: meta-xilinx-core, meta-xilinx-microblaze, meta-xilinx-bsp, + meta-xilinx-standalone. + branch: scarthgap or AMD release version (e.g. rel-v2024.2) + + URI: https://github.com/Xilinx/meta-jupyter + branch: scarthgap or AMD release version (e.g. rel-v2024.2) + + URI: https://github.com/OpenAMP/meta-openamp + branch: scarthgap + + URI: https://github.com/meta-qt5/meta-qt5 + branch: scarthgap + + URI: https://github.com/Xilinx/meta-ros + layers: meta-ros-common, meta-ros2, meta-ros2-jazzy + branch: AMD release version (e.g. rel-v2024.2) + + URI: https://git.yoctoproject.org/meta-arm + layers: meta-arm, meta-arm-toolchain + branch: scarthgap diff --git a/meta-xilinx-demos/classes/jupyter-examples.bbclass b/meta-xilinx-demos/classes/jupyter-examples.bbclass new file mode 100644 index 000000000..962f45b2d --- /dev/null +++ b/meta-xilinx-demos/classes/jupyter-examples.bbclass @@ -0,0 +1,17 @@ +S = "${WORKDIR}" + +FILES:${PN} += "${JUPYTER_DIR}" + +RDEPENDS:${PN} ?= "packagegroup-xilinx-jupyter" + +JUPYTER_DIR ?= "${datadir}/example-notebooks" + +do_install() { + install -d ${D}/${JUPYTER_DIR}/${PN} + install -m 0755 ${S}/*.ipynb ${D}/${JUPYTER_DIR}/${PN}/ +} + +EXCLUDE_FROM_WORLD = "1" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + diff --git a/meta-xilinx-demos/conf/layer.conf b/meta-xilinx-demos/conf/layer.conf index eb667304b..1f4b6b645 100644 --- a/meta-xilinx-demos/conf/layer.conf +++ b/meta-xilinx-demos/conf/layer.conf @@ -13,3 +13,15 @@ LAYERDEPENDS_xilinx-demos = "core" LAYERRECOMMENDS_xilinx-demos = "openembedded-layer" LAYERSERIES_COMPAT_xilinx-demos = "scarthgap" + +# Define dynamic layers +BBFILES_DYNAMIC += " \ +jupyter-layer:${LAYERDIR}/dynamic-layers/meta-jupyter/recipes-*/*/*.bb \ +jupyter-layer:${LAYERDIR}/dynamic-layers/meta-jupyter/recipes-*/*/*.bbappend \ +openamp-layer:${LAYERDIR}/dynamic-layers/meta-openamp/recipes-*/*/*.bb \ +openamp-layer:${LAYERDIR}/dynamic-layers/meta-openamp/recipes-*/*/*.bbappend \ +ros-common-layer:${LAYERDIR}/dynamic-layers/meta-ros/meta-ros-common/recipes-*/*/*.bb \ +ros-common-layer:${LAYERDIR}/dynamic-layers/meta-ros/meta-ros-common/recipes-*/*/*.bbappend \ +ros-common-layer:${LAYERDIR}/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-*/*/*.bb \ +ros-common-layer:${LAYERDIR}/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-*/*/*.bbappend \ +" diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-core/packagegroups/packagegroup-xilinx-jupyter.bb b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-core/packagegroups/packagegroup-xilinx-jupyter.bb new file mode 100644 index 000000000..efc1b543e --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-core/packagegroups/packagegroup-xilinx-jupyter.bb @@ -0,0 +1,15 @@ +DESCRIPTION = "Required packges for running jupyter notebook with python3 " + +inherit packagegroup + +JUPYTER_NOTEBOOK_PACKAGES = " \ + packagegroup-python3-jupyter \ + python3-core \ + python3-ipywidgets \ + python3-pydot \ + liberation-fonts \ + ttf-bitstream-vera \ + start-jupyter \ + " + +RDEPENDS:${PN} = "${JUPYTER_NOTEBOOK_PACKAGES}" diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-example/pm-notebooks/files/LICENSE b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-example/pm-notebooks/files/LICENSE new file mode 100644 index 000000000..e09f3af7a --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-example/pm-notebooks/files/LICENSE @@ -0,0 +1,27 @@ +Copyright (c) 2019, Xilinx +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + +* Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + +* Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + +* Neither the name of the copyright holder nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-example/pm-notebooks/pm-notebooks_1.0.bb b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-example/pm-notebooks/pm-notebooks_1.0.bb new file mode 100644 index 000000000..2c00c3169 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-example/pm-notebooks/pm-notebooks_1.0.bb @@ -0,0 +1,36 @@ +DESCRIPTION = "Jupyter notebook examples for Platform Management (PM) in Versal devices" +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://../../LICENSE;md5=268f2517fdae6d70f4ea4c55c4090aa8" + +inherit jupyter-examples + +SRC_URI = "git://github.com/Xilinx/platform-management-notebooks.git;branch=xlnx_rel_v2023.2;protocol=https \ + file://LICENSE \ + " + +SRCREV = "c502be361b6857e21ab903f31c9ead69e3a0d9ba" + +S = "${WORKDIR}/git/pm-notebooks" + +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE:versal = "versal" +COMPATIBLE_MACHINE:versal-net = "versal-net" + +RDEPENDS:${PN} = " \ + packagegroup-xilinx-jupyter \ + python3-ipywidgets \ + python3-pydot \ + graphviz \ + " + +do_install() { + install -d ${D}/${JUPYTER_DIR}/pm-notebooks + install -d ${D}/${JUPYTER_DIR}/pm-notebooks/pmutil + install -d ${D}/${JUPYTER_DIR}/pm-notebooks/pmutil/data + + install -m 0644 ${S}/README ${D}/${JUPYTER_DIR}/pm-notebooks + install -m 0755 ${S}/*.ipynb ${D}/${JUPYTER_DIR}/pm-notebooks + install -m 0755 ${S}/pmutil/*.py ${D}/${JUPYTER_DIR}/pm-notebooks/pmutil + install -m 0755 ${S}/pmutil/data/*.png ${D}/${JUPYTER_DIR}/pm-notebooks/pmutil/data +} + diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/jupyter-setup.service b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/jupyter-setup.service new file mode 100644 index 000000000..8f5c25e65 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/jupyter-setup.service @@ -0,0 +1,10 @@ +[Unit] +Description=jupyter setup scripts +Requires=network-online.target +After=network-online.target + +[Service] +ExecStart=/sbin/start-jupyter.sh + +[Install] +WantedBy=default.target diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/jupyter-setup.sh b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/jupyter-setup.sh new file mode 100755 index 000000000..f712c8ed6 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/jupyter-setup.sh @@ -0,0 +1,119 @@ +#!/bin/sh +#/etc/init.d/jupyterlab-start: start jupyterlab daemon + +### BEGIN INIT INFO +# Provides: jupyter-lab +# Default-Start: 3 5 +# Default-Stop: 0 1 2 6 +# Short-Description: Start Jupyter Lab server as petalinux user +### END INIT INFO + +OWNER="petalinux" +GROUP="petalinux" +HOME=`(cd ~petalinux && pwd) || echo 'none'` +NBDIR="${HOME}/notebooks" + +DAEMON_PATH="/sbin/start-jupyter.sh" +DAEMON_NAME=`basename $DAEMON_PATH` +PIDFILE="/var/run/${DAEMON_NAME}.pid" + +PATH=/bin:/usr/bin:/sbin:/usr/sbin + +. /etc/init.d/functions + +wait_for_ip() { + echo -n "Waiting for IP address..." + + for i in {1..20} + do + echo -n "." + ip=$(ip -4 addr show eth0 | grep -oE "inet ([0-9]{1,3}[\.]){3}[0-9]{1,3}" | cut -d ' ' -f2) + [ -n "$ip" ] && break + if [ -d /sys/class/net/eth1 ]; then + ip=$(ip -4 addr show eth1 | grep -oE "inet ([0-9]{1,3}[\.]){3}[0-9]{1,3}" | cut -d ' ' -f2) + [ -n "$ip" ] && break + fi + sleep 2 + done + + if [ -z $ip ]; then + echo " TIMEOUT" + else + echo " SUCCESS" + fi +} + +log_begin_msg() { + echo -n $* +} + +log_end_msg() { + if [ "$1" = "0" ]; then + echo ' OK' + else + echo ' ERROR' + fi +} + +log_daemon_msg() { + echo $* +} + +log_progress_msg() { + echo $* +} + +test -x $DAEMON_PATH || exit 0 + +case "$1" in + start) + log_begin_msg "Starting jupyter-lab server daemon... " + + # Various jupter paths are incorrect if this daemon is run as part of the + # init process. Override the directories with these environment variables. + export JUPYTER_CONFIG_DIR="${HOME}/.jupyter" + export JUPYTER_DATA_DIR="${HOME}/.local/share/jupyter" + export JUPYTER_RUNTIME_DIR="${HOME}/.local/share/jupyter/runtime" + export HOME="${HOME}" + + # check owner and group are valid + id $OWNER > /dev/null 2>&1 + if [ "$?" = "1" ]; then echo "'$OWNER': no such owner... ERROR" ; exit 1 ; fi + grep $GROUP /etc/group > /dev/null + if [ "$?" = "1" ]; then echo "'$GROUP': no such group... ERROR" ; exit 1 ; fi + + # create nb dir if it doesn't exist + if [ ! -d "$NBDIR" ] ; then install -o $OWNER -g $GROUP -d $NBDIR ; fi + + # start the daemon + wait_for_ip + start-stop-daemon -S -c $OWNER:$GROUP -m -p $PIDFILE -x $DAEMON_NAME & + log_end_msg $? + ;; + + stop) + log_begin_msg "Stopping jupyter-lab server daemon..." + start-stop-daemon -K -q -p $PIDFILE + log_end_msg $? + ;; + + restart) + $0 force-reload + ;; + + force-reload) + log_daemon_msg "Restarting jupyter-lab server daemon" + $0 stop + $0 start + ;; + + status) + status $DAEMON_PATH + ;; + + *) + echo "usage: $0 {start|stop|restart|force-reload|status}" + exit 1 +esac + +exit 0 diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/jupyter_server_config.py b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/jupyter_server_config.py new file mode 100644 index 000000000..7cca31e7c --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/jupyter_server_config.py @@ -0,0 +1,5 @@ +c.ServerApp.port = 8888 +c.ServerApp.iopub_data_rate_limit = 100000000 +c.ServerApp.allow_root=True +c.ServerApp.open_browser=False + diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/overrides.json b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/overrides.json new file mode 100644 index 000000000..3d39e80ef --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/overrides.json @@ -0,0 +1,5 @@ +{ + "@jupyterlab/apputils-extension:themes": { + "theme": "JupyterLab Dark" + } +} diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/start-jupyter.sh b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/start-jupyter.sh new file mode 100755 index 000000000..0a8d737ae --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab/start-jupyter.sh @@ -0,0 +1,37 @@ +#!/bin/bash +#******************************************************************************* +# +# Copyright (C) 2019 Xilinx, Inc. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining +# a copy of this software and associated documentation files (the +# "Software"), to deal in the Software without restriction, including +# without limitation the rights to use, copy, modify, merge, publish, +# distribute, sublicense, and/or sell copies of the Software, and to +# permit persons to whom the Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be +# included in all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS +# BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN +# ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +# +#********************************************************************** + +ip=$(ip -4 addr show eth0 | grep -oE "inet ([0-9]{1,3}[\.]){3}[0-9]{1,3}" | cut -d ' ' -f2) + +if [ -z "$ip" ] && [ -d /sys/class/net/eth1 ] ; then + ip=$(ip -4 addr show eth1 | grep -oE "inet ([0-9]{1,3}[\.]){3}[0-9]{1,3}" | cut -d ' ' -f2) +fi + +if [ -z $ip ]; then + echo "ERROR: Invalid IP address" + exit 1 +fi + +jupyter-lab --no-browser --allow-root --ip=$ip diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab_1.0.bb b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab_1.0.bb new file mode 100644 index 000000000..240e82670 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyterlab/start-jupyterlab_1.0.bb @@ -0,0 +1,66 @@ +# +# This is the jupyter-lab startup daemon +# + +SUMMARY = "Start Jupyter-lab server at system boot" + +SRC_URI = " \ + file://jupyter_server_config.py \ + file://jupyter-setup.sh \ + file://jupyter-setup.service \ + file://overrides.json \ + file://start-jupyter.sh \ + " + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +JUPYTER_STARTUP_PACKAGES += " \ + python3-jupyterlab \ + bash \ + procps \ + " + +RDEPENDS:${PN} = " ${JUPYTER_STARTUP_PACKAGES}" + +PROVIDES = "start-jupyter" +RPROVIDES:${PN} = "start-jupyter" + +inherit update-rc.d systemd + +INITSCRIPT_NAME = "jupyter-setup.sh" +INITSCRIPT_PARAMS = "start 99 3 5 . stop 20 0 1 2 6 ." + +SYSTEMD_PACKAGES="${PN}" +SYSTEMD_SERVICE:${PN}="jupyter-setup.service" +SYSTEMD_AUTO_ENABLE:${PN}="disable" + +S = "${WORKDIR}" + +do_install() { + install -d ${D}${datadir}/jupyter/lab/settings + install -m 0644 ${WORKDIR}/overrides.json ${D}${datadir}/jupyter/lab/settings/ + + if ${@bb.utils.contains('DISTRO_FEATURES', 'sysvinit', 'true', 'false', d)}; then + install -d ${D}${sysconfdir}/init.d/ + install -m 0755 ${WORKDIR}/jupyter-setup.sh ${D}${sysconfdir}/init.d/jupyter-setup.sh + fi + + install -d ${D}${systemd_system_unitdir} + install -m 0644 ${WORKDIR}/jupyter-setup.service ${D}${systemd_system_unitdir} + + install -d ${D}${systemd_user_unitdir} + install -m 0644 ${WORKDIR}/jupyter-setup.service ${D}${systemd_user_unitdir} + + install -d ${D}${base_sbindir} + install -m 0755 ${WORKDIR}/start-jupyter.sh ${D}${base_sbindir}/start-jupyter.sh + + install -d ${D}${sysconfdir}/jupyter/ + install -m 0644 ${WORKDIR}/jupyter_server_config.py ${D}${sysconfdir}/jupyter +} + +FILES:${PN} += " \ + ${base_sbindir} \ + ${datadir}/jupyter/lab/settings \ + ${systemd_user_unitdir} \ + " diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/jupyter-setup.service b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/jupyter-setup.service new file mode 100644 index 000000000..8f5c25e65 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/jupyter-setup.service @@ -0,0 +1,10 @@ +[Unit] +Description=jupyter setup scripts +Requires=network-online.target +After=network-online.target + +[Service] +ExecStart=/sbin/start-jupyter.sh + +[Install] +WantedBy=default.target diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/jupyter-setup.sh b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/jupyter-setup.sh new file mode 100755 index 000000000..7084f8a28 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/jupyter-setup.sh @@ -0,0 +1,119 @@ +#!/bin/sh +### BEGIN INIT INFO +# Provides: +# Required-Start: $remote_fs $syslog +# Required-Stop: $remote_fs $syslog +# Default-Start: 2 3 4 5 +# Default-Stop: 0 1 6 +# Short-Description: Start daemon at boot time +# Description: Enable service provided by daemon. +### END INIT INFO + +dir="" +cmd="start-jupyter.sh" +user="" + +name="jupyter-setup" +pid_file="/var/run/$name.pid" +stdout_log="/var/log/$name.log" +stderr_log="/var/log/$name.err" + +wait_for_ip() { + echo -n "Waiting for IP address..." + + for i in {1..20} + do + echo -n "." + ip=$(ip -4 addr show eth0 | grep -oE "inet ([0-9]{1,3}[\.]){3}[0-9]{1,3}" | cut -d ' ' -f2) + [ -n "$ip" ] && break + if [ -d /sys/class/net/eth1 ]; then + ip=$(ip -4 addr show eth1 | grep -oE "inet ([0-9]{1,3}[\.]){3}[0-9]{1,3}" | cut -d ' ' -f2) + [ -n "$ip" ] && break + fi + sleep 2 + done + + if [ -z $ip ]; then + echo " TIMEOUT" + else + echo " SUCCESS" + fi +} + +get_pid() { + cat "$pid_file" +} + +is_running() { + [ -f "$pid_file" ] && (ps -o"pid" | grep '^ '`get_pid`'$') > /dev/null 2>&1 +} + +case "$1" in + start) + if is_running; then + echo "Already started" + else + echo "Starting $name" + cd "$dir" + wait_for_ip + $cmd & + echo $! > "$pid_file" + if ! is_running; then + echo "Unable to start, see $stdout_log and $stderr_log" + exit 1 + fi + fi + ;; + stop) + if is_running; then + echo -n "Stopping $name.." + kill `get_pid` + for i in 1 2 3 4 5 6 7 8 9 10 + # for i in `seq 10` + do + if ! is_running; then + break + fi + + echo -n "." + sleep 1 + done + echo + + if is_running; then + echo "Not stopped; may still be shutting down or shutdown may have failed" + exit 1 + else + echo "Stopped" + if [ -f "$pid_file" ]; then + rm "$pid_file" + fi + fi + else + echo "Not running" + fi + ;; + restart) + $0 stop + if is_running; then + echo "Unable to stop, will not attempt to start" + exit 1 + fi + $0 start + ;; + status) + if is_running; then + echo "Running" + else + echo "Stopped" + exit 1 + fi + ;; + *) + echo "Usage: $0 {start|stop|restart|status}" + exit 1 + ;; +esac + +exit 0 + diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/jupyter-variables.sh b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/jupyter-variables.sh new file mode 100644 index 000000000..0ab9dc6bd --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/jupyter-variables.sh @@ -0,0 +1,2 @@ +#!/bin/bash +export BOARD="PLACEHOLDER" diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/jupyter_notebook_config.py b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/jupyter_notebook_config.py new file mode 100644 index 000000000..1a7a69618 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/jupyter_notebook_config.py @@ -0,0 +1,5 @@ +c.NotebookApp.notebook_dir = '/usr/share/example-notebooks' +c.NotebookApp.allow_root=True +c.NotebookApp.open_browser=False + + diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/start-jupyter.sh b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/start-jupyter.sh new file mode 100755 index 000000000..3db0ca13b --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb/start-jupyter.sh @@ -0,0 +1,40 @@ +#!/bin/bash +#******************************************************************************* +# +# Copyright (C) 2019 Xilinx, Inc. All rights reserved. +# +# Permission is hereby granted, free of charge, to any person obtaining +# a copy of this software and associated documentation files (the +# "Software"), to deal in the Software without restriction, including +# without limitation the rights to use, copy, modify, merge, publish, +# distribute, sublicense, and/or sell copies of the Software, and to +# permit persons to whom the Software is furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be +# included in all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS +# BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN +# ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +# +#********************************************************************** + + +ip=$(ip -4 addr show eth0 | grep -oE "inet ([0-9]{1,3}[\.]){3}[0-9]{1,3}" | cut -d ' ' -f2) + +if [ -z "$ip" ] && [ -d /sys/class/net/eth1 ] ; then + ip=$(ip -4 addr show eth1 | grep -oE "inet ([0-9]{1,3}[\.]){3}[0-9]{1,3}" | cut -d ' ' -f2) +fi + +if [ -z $ip ]; then + echo "ERROR: Invalid IP address" + exit 1 +fi + +jupyter nbextension enable --py widgetsnbextension +jupyter notebook --no-browser --allow-root --ip=$ip + diff --git a/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb_1.0.bb b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb_1.0.bb new file mode 100644 index 000000000..42cae9c54 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-jupyter/recipes-utils/start-jupyternb/start-jupyternb_1.0.bb @@ -0,0 +1,54 @@ +SUMMARY = "Start Jupyter at system boot" + +SRC_URI = " file://start-jupyter.sh \ + file://jupyter-setup.sh \ + file://jupyter_notebook_config.py \ + file://jupyter-setup.service \ + " + +LICENSE = "Proprietary" +LIC_FILES_CHKSUM = "file://start-jupyter.sh;beginline=2;endline=24;md5=f29b6e59838b939312f578e77087ada3" + +JUPYTER_STARTUP_PACKAGES += " \ + python3-jupyter-core \ + bash \ + " + +inherit update-rc.d systemd +PROVIDES = "start-jupyter" +RPROVIDES:${PN} = "start-jupyter" + +RDEPENDS:${PN} = " ${JUPYTER_STARTUP_PACKAGES}" + +INITSCRIPT_NAME = "jupyter-setup.sh" +INITSCRIPT_PARAMS = "start 99 S ." + +SYSTEMD_PACKAGES="${PN}" +SYSTEMD_SERVICE:${PN}="jupyter-setup.service" +SYSTEMD_AUTO_ENABLE:${PN}="disable" + +S = "${WORKDIR}" + +FILES:${PN} += "${base_sbindir} ${systemd_user_unitdir} ${datadir}" + +do_install() { + + if ${@bb.utils.contains('DISTRO_FEATURES', 'sysvinit', 'true', 'false', d)}; then + install -d ${D}${sysconfdir}/init.d/ + install -m 0755 ${WORKDIR}/jupyter-setup.sh ${D}${sysconfdir}/init.d/jupyter-setup.sh + fi + + install -d ${D}${systemd_system_unitdir} + install -m 0644 ${WORKDIR}/jupyter-setup.service ${D}${systemd_system_unitdir} + + install -d ${D}${systemd_user_unitdir} + install -m 0644 ${WORKDIR}/jupyter-setup.service ${D}${systemd_user_unitdir} + + install -d ${D}${base_sbindir} + install -m 0755 ${WORKDIR}/start-jupyter.sh ${D}${base_sbindir}/start-jupyter.sh + + install -d ${D}${sysconfdir}/jupyter/ + install -m 0644 ${WORKDIR}/jupyter_notebook_config.py ${D}${sysconfdir}/jupyter + + install -d ${D}${datadir}/example-notebooks +} diff --git a/meta-xilinx-demos/dynamic-layers/meta-openamp/recipes-example/openamp/openamp-demo-notebooks_0.1.bb b/meta-xilinx-demos/dynamic-layers/meta-openamp/recipes-example/openamp/openamp-demo-notebooks_0.1.bb new file mode 100644 index 000000000..4c4ff2d80 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-openamp/recipes-example/openamp/openamp-demo-notebooks_0.1.bb @@ -0,0 +1,32 @@ +DESCRIPTION = "Jupyter notebooks for openAMP" +LICENSE = "BSD-3-Clause" +LIC_FILES_CHKSUM = "file://LICENSE;md5=268f2517fdae6d70f4ea4c55c4090aa8" + +inherit jupyter-examples + +REPO ?= "git://github.com/Xilinx/OpenAMP-notebooks.git;protocol=https" +SRCREV ?= "30b76d864261e5dd321fadfaf74b933b7cd88892" +BRANCH ?= "main" +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" +SRC_URI = "${REPO};${BRANCHARG}" +PV .= "+git" +S = "${WORKDIR}/git/openamp" + +COMPATIBLE_MACHINE = "^$" +COMPATIBLE_MACHINE:zynqmp = "zynqmp" +COMPATIBLE_MACHINE:versal = "versal" +COMPATIBLE_MACHINE:versal-net = "versal-net" + +DEPENDS += " packagegroup-xilinx-jupyter \ + packagegroup-openamp" + +RDEPENDS:${PN} = " packagegroup-xilinx-jupyter \ + packagegroup-openamp" + +do_install() { + install -d ${D}/${JUPYTER_DIR}/openamp-notebooks + install -d ${D}/${JUPYTER_DIR}/openamp-notebooks/pics + + install -m 0755 ${S}/*.ipynb ${D}/${JUPYTER_DIR}/openamp-notebooks + install -m 0755 ${S}/pics/*.png ${D}/${JUPYTER_DIR}/openamp-notebooks/pics +} diff --git a/meta-xilinx-demos/recipes-core/packagegroups/packagegroup-xilinx-ros.bb b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros-common/recipes-core/packagegroups/packagegroup-xilinx-ros.bb similarity index 91% rename from meta-xilinx-demos/recipes-core/packagegroups/packagegroup-xilinx-ros.bb rename to meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros-common/recipes-core/packagegroups/packagegroup-xilinx-ros.bb index d9db94efa..302375995 100644 --- a/meta-xilinx-demos/recipes-core/packagegroups/packagegroup-xilinx-ros.bb +++ b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros-common/recipes-core/packagegroups/packagegroup-xilinx-ros.bb @@ -137,29 +137,31 @@ ROS_CONTROL_PACKAGES = "\ transmission-interface \ " -#RDEPENDS:${PN}-base:aarch64 = "\ -# ${ROS_BASE_PACKAGES} \ -#" +RDEPENDS:${PN}-base:aarch64 = "\ + ${ROS_BASE_PACKAGES} \ +" -#RDEPENDS:${PN}-demo:aarch64 = "\ -# ${ROS_BASE_PACKAGES} \ -# ${ROS_DEMO_PACKAGES} \ -#" +RDEPENDS:${PN}-demo:aarch64 = "\ + ${ROS_BASE_PACKAGES} \ + ${ROS_DEMO_PACKAGES} \ +" #RDEPENDS:${PN}-control:aarch64 = "\ # ${ROS_BASE_PACKAGES} \ # ${ROS_CONTROL_PACKAGES} \ #" -#RDEPENDS:${PN}-dev:aarch64 = "\ -# ${ROS_BUILDESSENTIAL_PACKAGES} \ -#" +RDEPENDS:${PN}-dev:aarch64 = "\ + ${ROS_BUILDESSENTIAL_PACKAGES} \ +" -#RDEPENDS:${PN}:aarch64 = "\ -# ${PN}-demo \ -# ${PN}-control \ -# rqt-runtime-monitor \ -#" +# TODO +# 1. Due to failing hardware-interfaces disable ${PN}-control + +RDEPENDS:${PN}:aarch64 = "\ + ${PN}-demo \ + rqt-runtime-monitor \ +" IMAGE_LINGUAS = "en-us" GLIBC_GENERATE_LOCALES = "en_US.UTF-8" diff --git a/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/ament-lint/ament-flake8_0.17.0-2.bbappend b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/ament-lint/ament-flake8_0.17.0-2.bbappend new file mode 100644 index 000000000..c22346faf --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/ament-lint/ament-flake8_0.17.0-2.bbappend @@ -0,0 +1,9 @@ +# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved. + +ROS_EXEC_DEPENDS:remove = " \ + python3-flake8-builtins \ + python3-flake8-comprehensions \ + python3-flake8-docstrings \ + python3-flake8-import-order \ + python3-flake8-quotes \ +" \ No newline at end of file diff --git a/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/common-interfaces/sensor-msgs-py_%.bbappend b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/common-interfaces/sensor-msgs-py_%.bbappend new file mode 100644 index 000000000..5c360dbe2 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/common-interfaces/sensor-msgs-py_%.bbappend @@ -0,0 +1 @@ +LICENSE = "BSD-3-Clause" diff --git a/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/orocos-kdl-vendor/orocos-kdl-vendor_%.bbappend b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/orocos-kdl-vendor/orocos-kdl-vendor_%.bbappend new file mode 100644 index 000000000..35f4207f2 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/orocos-kdl-vendor/orocos-kdl-vendor_%.bbappend @@ -0,0 +1,2 @@ +SRC_URI:remove = "file://0001-CMakeLists.txt-fetch-orocos-kdl-with-bitbake-fetcher.patch" +SRCREV_release:forcevariable = "adca6201616af928533d70faea6042fe0239e898" diff --git a/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/liblz4-vendor_%.bbappend b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/liblz4-vendor_%.bbappend new file mode 100644 index 000000000..f5378ca66 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/liblz4-vendor_%.bbappend @@ -0,0 +1,4 @@ +LICENSE = "Apache-2.0 & BSD-3-Clause & GPL-2.0-only" +ROS_EXEC_DEPENDS:remove = "${ROS_UNRESOLVED_DEP-liblz4}" +DEPENDS:remove = "${ROS_UNRESOLVED_DEP-liblz4-dev}" +INSANE_SKIP:${PN} += "dev-so" diff --git a/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/mcap-vendor/0001-fix-include-dir.patch b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/mcap-vendor/0001-fix-include-dir.patch new file mode 100644 index 000000000..35650c23f --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/mcap-vendor/0001-fix-include-dir.patch @@ -0,0 +1,27 @@ +From f15236807f0b5ac96979840a12cd0be0c115f055 Mon Sep 17 00:00:00 2001 +From: Trevor Woerner +Date: Thu, 12 Sep 2024 15:21:33 -0400 +Subject: [PATCH] fix include dir + +Upstream-Status: inappropriate +Signed-off-by: Trevor Woerner +--- + CMakeLists.txt | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/CMakeLists.txt b/CMakeLists.txt +index d5789b292025..e5e97fa9fa0f 100644 +--- a/CMakeLists.txt ++++ b/CMakeLists.txt +@@ -43,7 +43,7 @@ macro(build_mcap_vendor) + src/main.cpp + ) + +- set(_mcap_include_dir ${mcap_SOURCE_DIR}/cpp/mcap/include) ++ set(_mcap_include_dir ${mcap_vendor_SOURCE_DIR}/mcap/cpp/mcap/include) + file(GLOB _mcap_installed_headers ${_mcap_include_dir}/mcap/*.hpp) + + target_include_directories(mcap PUBLIC +-- +2.44.0.478.g7774cfed6261 + diff --git a/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/mcap-vendor_%.bbappend b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/mcap-vendor_%.bbappend new file mode 100644 index 000000000..dc63cf76c --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/mcap-vendor_%.bbappend @@ -0,0 +1,6 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" + +B = "${S}" +SRC_URI:remove = "file://0001-CMakeLists.txt-fetch-dependencies-with-bitbake-fetch.patch" +SRC_URI:append = " file://0001-fix-include-dir.patch" +SRCREV_release:forcevariable = "6884e7ba7d29d8db98ad2bbf09a6875bf5141e19" diff --git a/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/rosbag2-compression-zstd_%.bbappend b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/rosbag2-compression-zstd_%.bbappend new file mode 100644 index 000000000..b99de4478 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/rosbag2-compression-zstd_%.bbappend @@ -0,0 +1,2 @@ +SRC_URI:remove = "file://0001-CMakeLists.txt-drop-dependency-on-zstd_vendor.patch" +SRCREV = "3f3c01609c3bef74cfc3f3229b0d57964c6bd465" diff --git a/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/shared-queues-vendor_%.bbappend b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/shared-queues-vendor_%.bbappend new file mode 100644 index 000000000..69b503863 --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/rosbag2/shared-queues-vendor_%.bbappend @@ -0,0 +1,2 @@ +SRC_URI:remove = "file://0001-CMakeLists.txt-fetch-readerwriterqueue-and-concurren.patch" +SRCREV_release:forcevariable = "fea3a738733673c927d77631a735157993ff6395" diff --git a/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/yaml-cpp-vendor/yaml-cpp-vendor_%.bbappend b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/yaml-cpp-vendor/yaml-cpp-vendor_%.bbappend new file mode 100644 index 000000000..33e2a0c7f --- /dev/null +++ b/meta-xilinx-demos/dynamic-layers/meta-ros/meta-ros2-jazzy/recipes-bbappends/yaml-cpp-vendor/yaml-cpp-vendor_%.bbappend @@ -0,0 +1 @@ +INSANE_SKIP:${PN} += "dev-so" diff --git a/meta-xilinx-demos/recipes-apps/sdfec/sdfec_1.1.bb b/meta-xilinx-demos/recipes-apps/sdfec/sdfec_1.1.bb new file mode 100644 index 000000000..ac8303aa2 --- /dev/null +++ b/meta-xilinx-demos/recipes-apps/sdfec/sdfec_1.1.bb @@ -0,0 +1,36 @@ +# +# This file is the sdfec recipe. +# + +SUMMARY = "sdfec applications" + +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +SRC_URI = "git://github.com/Xilinx/linux-examples.git;protocol=https;branch=xlnx_rel_v2024.1" +SRCREV = "84b31cb194325640a631380ed8bfc1db21bab883" + +inherit features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +S = "${WORKDIR}/git/sd-fec-1.1" + +DEPENDS += "libgpiod" + +TARGETS_APPS ?= "sdfec-demo sdfec-interrupts sdfec-multi-ldpc-codes" + +do_compile() { + for app_name in ${TARGETS_APPS}; do + oe_runmake -C ${S}/$app_name/files + done +} + +do_install() { + install -d ${D}${bindir} + for app_name in ${TARGETS_APPS}; do + install -m 0755 ${S}/$app_name/files/$app_name ${D}${bindir} + done +} diff --git a/meta-xilinx-demos/recipes-examples/gpio-demo/files/Makefile b/meta-xilinx-demos/recipes-examples/gpio-demo/files/Makefile new file mode 100644 index 000000000..9106be1bd --- /dev/null +++ b/meta-xilinx-demos/recipes-examples/gpio-demo/files/Makefile @@ -0,0 +1,14 @@ +APP = gpio-demo + +# Add any other object files to this list below +APP_OBJS = gpio-demo.o + +all: $(APP) + +$(APP): $(APP_OBJS) + $(CC) $(LDFLAGS) -o $@ $(APP_OBJS) $(LDLIBS) + +clean: + -rm -f $(APP) *.elf *.gdb *.o + + diff --git a/meta-xilinx-demos/recipes-examples/gpio-demo/files/gpio-demo.c b/meta-xilinx-demos/recipes-examples/gpio-demo/files/gpio-demo.c new file mode 100644 index 000000000..4e17779da --- /dev/null +++ b/meta-xilinx-demos/recipes-examples/gpio-demo/files/gpio-demo.c @@ -0,0 +1,355 @@ +/* +* +* gpio-demo app +* +* Copyright (C) 2013 - 2016 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person +* obtaining a copy of this software and associated documentation +* files (the "Software"), to deal in the Software without restriction, +* including without limitation the rights to use, copy, modify, merge, +* publish, distribute, sublicense, and/or sell copies of the Software, +* and to permit persons to whom the Software is furnished to do so, +* subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included +* in all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +* IN NO EVENT SHALL XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in this +* Software without prior written authorization from Xilinx. +* +*/ + +#include +#include +#include +#include +#include +#include +#include + +#define GPIO_ROOT "/sys/class/gpio" +#define ARRAY_SIZE(a) (sizeof(a)/sizeof(a[0])) + +static enum {NONE, IN, OUT, CYLON, KIT} gpio_opt = NONE; + +static const unsigned long cylon[] = { + 0x00000080, 0x00000040, 0x00000020, 0x00000010, + 0x00000008, 0x00000004, 0x00000002, 0x00000001, + 0x00000002, 0x00000004, 0x00000008, + 0x00000010, 0x00000020, 0x00000040, 0x00000080, +}; + +static const unsigned long kit[] = { + 0x000000e0, 0x00000070, 0x00000038, 0x0000001c, + 0x0000000e, 0x00000007, 0x00000003, 0x00000001, + 0x00000003, 0x00000007, 0x0000000e, + 0x0000001c, 0x00000038, 0x00000070, 0x000000e0, +}; + +static int gl_gpio_base = 0; + +static void usage (char *argv0) +{ + char *basename = strrchr(argv0, '/'); + if (!basename) + basename = argv0; + + fprintf(stderr, + "Usage: %s [-g GPIO_BASE] COMMAND\n" + "\twhere COMMAND is one of:\n" + "\t\t-i\t\tInput value from GPIO and print it\n" + "\t\t-o\tVALUE\tOutput value to GPIO\n" + "\t\t-c\t\tCylon test pattern\n" + "\t\t-k\t\t KIT test pattern\n" + "\tGPIO_BASE indicates which GPIO chip to talk to (The number can be \n" + "\tfound at /sys/class/gpio/gpiochipN).\n" + "\tThe highest gpiochipN is the first gpio listed in the dts file, \n" + "\tand the lowest gpiochipN is the last gpio listed in the dts file.\n" + "\tE.g.If the gpiochip240 is the LED_8bit gpio, and I want to output '1' \n" + "\tto the LED_8bit gpio, the command should be:\n" + "\t\tgpio-demo -g 240 -o 1\n" + "\n" + "\tgpio-demo written by Xilinx Inc.\n" + "\n" + , basename); + exit(-2); +} + +static int open_gpio_channel(int gpio_base) +{ + char gpio_nchan_file[128]; + int gpio_nchan_fd; + int gpio_max; + int nchannel; + char nchannel_str[5]; + char *cptr; + int c; + char channel_str[5]; + + char *gpio_export_file = "/sys/class/gpio/export"; + int export_fd=0; + + /* Check how many channels the GPIO chip has */ + sprintf(gpio_nchan_file, "%s/gpiochip%d/ngpio", GPIO_ROOT, gpio_base); + gpio_nchan_fd = open(gpio_nchan_file, O_RDONLY); + if (gpio_nchan_fd < 0) { + fprintf(stderr, "Failed to open %s: %s\n", gpio_nchan_file, strerror(errno)); + return -1; + } + read(gpio_nchan_fd, nchannel_str, sizeof(nchannel_str)); + close(gpio_nchan_fd); + nchannel=(int)strtoul(nchannel_str, &cptr, 0); + if (cptr == nchannel_str) { + fprintf(stderr, "Failed to change %s into GPIO channel number\n", nchannel_str); + exit(1); + } + + /* Open files for each GPIO channel */ + export_fd=open(gpio_export_file, O_WRONLY); + if (export_fd < 0) { + fprintf(stderr, "Cannot open GPIO to export %d\n", gpio_base); + return -1; + } + + gpio_max = gpio_base + nchannel; + for(c = gpio_base; c < gpio_max; c++) { + sprintf(channel_str, "%d", c); + write(export_fd, channel_str, (strlen(channel_str)+1)); + } + close(export_fd); + return nchannel; +} + +static int close_gpio_channel(int gpio_base) +{ + char gpio_nchan_file[128]; + int gpio_nchan_fd; + int gpio_max; + int nchannel; + char nchannel_str[5]; + char *cptr; + int c; + char channel_str[5]; + + char *gpio_unexport_file = "/sys/class/gpio/unexport"; + int unexport_fd=0; + + /* Check how many channels the GPIO chip has */ + sprintf(gpio_nchan_file, "%s/gpiochip%d/ngpio", GPIO_ROOT, gpio_base); + gpio_nchan_fd = open(gpio_nchan_file, O_RDONLY); + if (gpio_nchan_fd < 0) { + fprintf(stderr, "Failed to open %s: %s\n", gpio_nchan_file, strerror(errno)); + return -1; + } + read(gpio_nchan_fd, nchannel_str, sizeof(nchannel_str)); + close(gpio_nchan_fd); + nchannel=(int)strtoul(nchannel_str, &cptr, 0); + if (cptr == nchannel_str) { + fprintf(stderr, "Failed to change %s into GPIO channel number\n", nchannel_str); + exit(1); + } + + /* Close opened files for each GPIO channel */ + unexport_fd=open(gpio_unexport_file, O_WRONLY); + if (unexport_fd < 0) { + fprintf(stderr, "Cannot close GPIO by writing unexport %d\n", gpio_base); + return -1; + } + + gpio_max = gpio_base + nchannel; + for(c = gpio_base; c < gpio_max; c++) { + sprintf(channel_str, "%d", c); + write(unexport_fd, channel_str, (strlen(channel_str)+1)); + } + close(unexport_fd); + return 0; +} + +static int set_gpio_direction(int gpio_base, int nchannel, char *direction) +{ + char gpio_dir_file[128]; + int direction_fd=0; + int gpio_max; + int c; + + gpio_max = gpio_base + nchannel; + for(c = gpio_base; c < gpio_max; c++) { + sprintf(gpio_dir_file, "/sys/class/gpio/gpio%d/direction",c); + direction_fd=open(gpio_dir_file, O_RDWR); + if (direction_fd < 0) { + fprintf(stderr, "Cannot open the direction file for GPIO %d\n", c); + return 1; + } + write(direction_fd, direction, (strlen(direction)+1)); + close(direction_fd); + } + return 0; +} + +static int set_gpio_value(int gpio_base, int nchannel, int value) +{ + char gpio_val_file[128]; + int val_fd=0; + int gpio_max; + char val_str[2]; + int c; + + gpio_max = gpio_base + nchannel; + + for(c = gpio_base; c < gpio_max; c++) { + sprintf(gpio_val_file, "/sys/class/gpio/gpio%d/value",c); + val_fd=open(gpio_val_file, O_RDWR); + if (val_fd < 0) { + fprintf(stderr, "Cannot open the value file of GPIO %d\n", c); + return -1; + } + sprintf(val_str,"%d", (value & 1)); + write(val_fd, val_str, sizeof(val_str)); + close(val_fd); + value >>= 1; + } + return 0; +} + +static int get_gpio_value(int gpio_base, int nchannel) +{ + char gpio_val_file[128]; + int val_fd=0; + int gpio_max; + char val_str[2]; + char *cptr; + int value = 0; + int c; + + gpio_max = gpio_base + nchannel; + + for(c = gpio_max-1; c >= gpio_base; c--) { + sprintf(gpio_val_file, "/sys/class/gpio/gpio%d/value",c); + val_fd=open(gpio_val_file, O_RDWR); + if (val_fd < 0) { + fprintf(stderr, "Cannot open GPIO to export %d\n", c); + return -1; + } + read(val_fd, val_str, sizeof(val_str)); + value <<= 1; + value += (int)strtoul(val_str, &cptr, 0); + if (cptr == optarg) { + fprintf(stderr, "Failed to change %s into integer", val_str); + } + close(val_fd); + } + return value; +} + +void signal_handler(int sig) +{ + switch (sig) { + case SIGTERM: + case SIGHUP: + case SIGQUIT: + case SIGINT: + close_gpio_channel(gl_gpio_base); + exit(0) ; + default: + break; + } +} + +int main(int argc, char *argv[]) +{ + extern char *optarg; + char *cptr; + int gpio_value = 0; + int nchannel = 0; + + int c; + int i; + + opterr = 0; + + while ((c = getopt(argc, argv, "g:io:ck")) != -1) { + switch (c) { + case 'g': + gl_gpio_base = (int)strtoul(optarg, &cptr, 0); + if (cptr == optarg) + usage(argv[0]); + break; + case 'i': + gpio_opt = IN; + break; + case 'o': + gpio_opt = OUT; + gpio_value = (int)strtoul(optarg, &cptr, 0); + if (cptr == optarg) + usage(argv[0]); + break; + case 'c': + gpio_opt = CYLON; + break; + case 'k': + gpio_opt = KIT; + break; + case '?': + usage(argv[0]); + default: + usage(argv[0]); + + } + } + + if (gl_gpio_base == 0) { + usage(argv[0]); + } + + nchannel = open_gpio_channel(gl_gpio_base); + signal(SIGTERM, signal_handler); /* catch kill signal */ + signal(SIGHUP, signal_handler); /* catch hang up signal */ + signal(SIGQUIT, signal_handler); /* catch quit signal */ + signal(SIGINT, signal_handler); /* catch a CTRL-c signal */ + switch (gpio_opt) { + case IN: + set_gpio_direction(gl_gpio_base, nchannel, "in"); + gpio_value=get_gpio_value(gl_gpio_base, nchannel); + fprintf(stdout,"0x%08X\n", gpio_value); + break; + case OUT: + set_gpio_direction(gl_gpio_base, nchannel, "out"); + set_gpio_value(gl_gpio_base, nchannel, gpio_value); + break; + case CYLON: +#define CYLON_DELAY_USECS (10000) + set_gpio_direction(gl_gpio_base, nchannel, "out"); + for (;;) { + for(i=0; i < ARRAY_SIZE(cylon); i++) { + gpio_value=(int)cylon[i]; + set_gpio_value(gl_gpio_base, nchannel, gpio_value); + } + usleep(CYLON_DELAY_USECS); + } + case KIT: +#define KIT_DELAY_USECS (10000) + set_gpio_direction(gl_gpio_base, nchannel, "out"); + for (;;) { + for (i=0; i +#include +#include +#include +#include +#include + +void usage(char *prog) +{ + printf("usage: %s ADDR\n",prog); + printf("\n"); + printf("ADDR may be specified as hex values\n"); +} + + +int main(int argc, char *argv[]) +{ + int fd; + void *ptr; + uint64_t addr, page_addr, page_offset; + uint64_t page_size=sysconf(_SC_PAGESIZE); + + if(argc!=2) { + usage(argv[0]); + exit(-1); + } + + fd=open("/dev/mem",O_RDONLY); + if(fd<1) { + perror(argv[0]); + exit(-1); + } + + addr=strtoul(argv[1],NULL,0); + page_addr=(addr & ~(page_size-1)); + page_offset=addr-page_addr; + + ptr=mmap(NULL,page_size,PROT_READ,MAP_SHARED,fd,(addr & ~(page_size-1))); + if((int64_t)ptr==-1) { + perror(argv[0]); + exit(-1); + } + + printf("0x%08lx\n",*((uint64_t *)(ptr+page_offset))); + return 0; +} diff --git a/meta-xilinx-demos/recipes-examples/peekpoke/files/poke.c b/meta-xilinx-demos/recipes-examples/peekpoke/files/poke.c new file mode 100644 index 000000000..6948bca7a --- /dev/null +++ b/meta-xilinx-demos/recipes-examples/peekpoke/files/poke.c @@ -0,0 +1,79 @@ +/* +* poke utility - for those who remember the good old days! +* Fixed by Pascal Bos from Nikhef, to be able to use this +* in 64 bit registers. +* +* Copyright (C) 2013 - 2016 Xilinx, Inc. All rights reserved. +* +* Permission is hereby granted, free of charge, to any person +* obtaining a copy of this software and associated documentation +* files (the "Software"), to deal in the Software without restriction, +* including without limitation the rights to use, copy, modify, merge, +* publish, distribute, sublicense, and/or sell copies of the Software, +* and to permit persons to whom the Software is furnished to do so, +* subject to the following conditions: +* +* The above copyright notice and this permission notice shall be included +* in all copies or substantial portions of the Software. +* +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +* IN NO EVENT SHALL XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +* +* Except as contained in this notice, the name of the Xilinx shall not be used +* in advertising or otherwise to promote the sale, use or other dealings in this +* Software without prior written authorization from Xilinx. +* +*/ + +#include +#include +#include +#include +#include +#include + +void usage(char *prog) +{ + printf("usage: %s ADDR VAL\n",prog); + printf("\n"); + printf("ADDR and VAL may be specified as hex values\n"); +} + +int main(int argc, char *argv[]) +{ + int fd; + void *ptr; + uint64_t val; + uint64_t addr, page_addr, page_offset; + uint64_t page_size=sysconf(_SC_PAGESIZE); + + fd=open("/dev/mem",O_RDWR); + if(fd<1) { + perror(argv[0]); + exit(-1); + } + + if(argc!=3) { + usage(argv[0]); + exit(-1); + } + + addr=strtoul(argv[1],NULL,0); + val=strtoul(argv[2],NULL,0); + + page_addr=(addr & ~(page_size-1)); + page_offset=addr-page_addr; + + ptr=mmap(NULL,page_size,PROT_READ|PROT_WRITE,MAP_SHARED,fd,(addr & ~(page_size-1))); + if((int64_t)ptr==-1) { + perror(argv[0]); + exit(-1); + } + + *((uint64_t *)(ptr+page_offset))=val; + return 0; +} diff --git a/meta-xilinx-demos/recipes-examples/peekpoke/peekpoke.bb b/meta-xilinx-demos/recipes-examples/peekpoke/peekpoke.bb new file mode 100644 index 000000000..3949598e0 --- /dev/null +++ b/meta-xilinx-demos/recipes-examples/peekpoke/peekpoke.bb @@ -0,0 +1,25 @@ +# +# This is the peekpoke apllication recipe +# +# + +SUMMARY = "peekpoke application" +SECTION = "PETALINUX/apps" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" +SRC_URI = "file://peek.c \ + file://poke.c \ + file://Makefile \ + " +S = "${WORKDIR}" +CFLAGS:prepend = "-I ${S}/include" +do_compile() { + oe_runmake +} +do_install() { + install -d ${D}${bindir} + install -m 0755 ${S}/peek ${D}${bindir} + install -m 0755 ${S}/poke ${D}${bindir} + +} + diff --git a/meta-xilinx-demos/recipes-firmware/vek280-pl-bram-uart-gpio-fw/vek280-pl-bram-uart-gpio-fw_1.0-2024.2.bb b/meta-xilinx-demos/recipes-firmware/vek280-pl-bram-uart-gpio-fw/vek280-pl-bram-uart-gpio-fw_1.0-2024.2.bb new file mode 100644 index 000000000..045b88d56 --- /dev/null +++ b/meta-xilinx-demos/recipes-firmware/vek280-pl-bram-uart-gpio-fw/vek280-pl-bram-uart-gpio-fw_1.0-2024.2.bb @@ -0,0 +1,29 @@ +SUMMARY = "VEK280 Segemented Configuration(DFx Full) firmware using dfx_user_dts bbclass" +DESCRIPTION = "VEK280 Segemented Configuration(DFx Full) PL AXI BRAM, AXI GPIO and AXI UART firmware application" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +inherit dfx_user_dts + +SRC_URI = "https://petalinux.xilinx.com/sswreleases/rel-v2024.2/sdt/2024.2/2024.2_1106_1_11061206/external/vek280-pl-bram-gpio-fw/vek280-pl-bram-gpio-fw_2024.2_1106_1.tar.gz" + +SRC_URI[sha256sum] = "bf7688694a27a0f81e7d59d16c2b819994aa5fb8adfb0d94656da4040e4bc279" + +COMPATIBLE_MACHINE:versal-vek280-sdt-seg = "${MACHINE}" +COMPATIBLE_MACHINE:versal-vek280-sdt-seg-ospi = "${MACHINE}" + +# When do_upack is exectuted it will extract tar file with original directory +# name so set the FW_DIR pointing to pdi and dtsi files. +FW_DIR = "vek280-pl-bram-gpio-fw" + +# fw files doesn't install on rootfs using dfx_user_dts bbclass using artifactory +# method. To workaround this issue we are using copy_fw_files pre-functions. +# copy_fw_files prefuncs needs to be called before find_firmware_file to update +# the firmware-name to ${PN}. +do_configure[prefuncs] =+ "copy_fw_files" +python copy_fw_files () { + import shutil + fw_file_src = d.getVar('WORKDIR') + '/' + d.getVar("FW_DIR") + fw_file_dest = d.getVar('S') + shutil.copytree(fw_file_src, fw_file_dest, dirs_exist_ok=True) +} diff --git a/meta-xilinx-demos/recipes-firmware/zcu104-pl-vcu-fw/zcu104-pl-vcu-fw_1.0-2024.2.bb b/meta-xilinx-demos/recipes-firmware/zcu104-pl-vcu-fw/zcu104-pl-vcu-fw_1.0-2024.2.bb new file mode 100644 index 000000000..0dcb2be29 --- /dev/null +++ b/meta-xilinx-demos/recipes-firmware/zcu104-pl-vcu-fw/zcu104-pl-vcu-fw_1.0-2024.2.bb @@ -0,0 +1,29 @@ +SUMMARY = "ZCU104 full pl firmware using dfx_user_dts bbclass" +DESCRIPTION = "ZCU104 full PL VCU firmware application" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +inherit dfx_user_dts + +SRC_URI = "https://petalinux.xilinx.com/sswreleases/rel-v2024.2/sdt/2024.2/2024.2_1106_1_11061206/external/zcu104-pl-vcu-fw/zcu104-pl-vcu-fw_2024.2_1106_1.tar.gz" + +SRC_URI[sha256sum] = "1eef872153d2373c944c20752bc374e371159395a42d8353bd1a397fadc59231" + + +COMPATIBLE_MACHINE:zynqmp-zcu104-sdt-full = "${MACHINE}" + +# When do_upack is exectuted it will extract tar file with original directory +# name so set the FW_DIR pointing to pdi and dtsi files. +FW_DIR = "zcu104-pl-vcu-fw" + +# fw files doesn't install on rootfs using dfx_user_dts bbclass using artifactory +# method. To workaround this issue we are using copy_fw_files pre-functions. +# copy_fw_files prefuncs needs to be called before find_firmware_file to update +# the firmware-name to ${PN}. +do_configure[prefuncs] =+ "copy_fw_files" +python copy_fw_files () { + import shutil + fw_file_src = d.getVar('WORKDIR') + '/' + d.getVar("FW_DIR") + fw_file_dest = d.getVar('S') + shutil.copytree(fw_file_src, fw_file_dest, dirs_exist_ok=True) +} diff --git a/meta-xilinx-demos/scripts/generate-machines-sdt.sh b/meta-xilinx-demos/scripts/generate-machines-sdt.sh new file mode 100755 index 000000000..aaeef385e --- /dev/null +++ b/meta-xilinx-demos/scripts/generate-machines-sdt.sh @@ -0,0 +1,79 @@ +#! /bin/bash -e + +### The following table controls the automatic generated of the firmware demos +### Machine Recipe +#M# vek280-pl-bram-gpio-fw recipes-firmware/vek280-pl-bram-uart-gpio-fw/vek280-pl-bram-uart-gpio-fw_1.0-2024.2.bb +#M# zcu104-pl-vcu-fw recipes-firmware/zcu104-pl-vcu-fw/zcu104-pl-vcu-fw_1.0-2024.2.bb + +this=$(realpath $0) + +if [ $# -lt 2 ]; then + echo "$0: [machine]" >&2 + exit 1 +fi + +conf_path=$(realpath $1) +if [ ! -d ${conf_path} ]; then + mkdir -p ${conf_path} +fi + + +mach_index=$(realpath $2) +count=0 +while read mach_id mach_url; do + if [ ${mach_id} = '#' ]; then + continue + fi + + MACHINE_ID[$count]=${mach_id} + MACHINE_URL[$count]=${mach_url} + + count=$(expr $count + 1) +done < ${mach_index} + + +# Load in the arrays from this script +count=0 +while read marker machine recipe ; do + if [ "${marker}" != "#M#" ]; then + continue + fi + + MACHINES[$count]=${machine} + RECIPES[$count]=${recipe} + for mach in ${!MACHINE_ID[@]}; do + if [ ${MACHINE_ID[${mach}]} = ${machine} ]; then + URLS[$count]=${MACHINE_URL[${mach}]} + break + fi + done + if [ -z "${URLS[$count]}" ]; then + echo "ERROR: Unable to find ${machine} in ${mach_index}" >&2 + exit 1 + fi + + count=$(expr $count + 1) +done < ${this} + + +for mach in ${!MACHINES[@]}; do + if [ -n "$3" -a "$3" != "${MACHINES[${mach}]}" ]; then + continue + fi + + echo "Machine: ${MACHINES[${mach}]}" + echo "Recipe: ${RECIPES[${mach}]}" + echo "URL: ${URLS[${mach}]}" + echo + + url=${URLS[${mach}]} + url=$(echo $url | sed 's,https://petalinux.xilinx.com/sswreleases/.*/sdt,https://artifactory.xilinx.com/artifactory/petalinux-hwproj-dev/sdt,') + + wget $url -O ${conf_path}/output.sdt + sha=$(sha256sum ${conf_path}/output.sdt | cut -d ' ' -f 1) + rm -f ${conf_path}/output.sdt + + sed -e 's,SRC_URI = .*,SRC_URI = "'${URLS[${mach}]}'",' \ + -e 's,SRC_URI\[sha256sum\] = .*,SRC_URI\[sha256sum\] = "'${sha}'",' \ + -i $(dirname $0)/../${RECIPES[${mach}]} +done diff --git a/meta-xilinx-mali400/README.md b/meta-xilinx-mali400/README.md new file mode 100644 index 000000000..988248894 --- /dev/null +++ b/meta-xilinx-mali400/README.md @@ -0,0 +1,59 @@ +# meta-xilinx-mali400 + +This layer contains recipes for MALI-400 GPU drivers and user space libraries for +AMD Zynq UltraScale+ MPSoC EG/EV devices which has MALI-400 GPU. It also includes +support for open source DRM LIMA drivers. + +> **Note:** +> 1. `MACHINE_FEATURES += "mali400"` is included in machine conf files for EG/EV +> devices by gen-machineconf tools. If user is not using gen-machineconf to +> generate the machine conf files then add it manually. +> 2. MALI-400 and DRM LIMA driver are mutually exclusive. + +## How to enable MALI-400 drivers + +1. Follow [Building Instructions](../README.building.md) upto step 4. + +2. Enable libmali DISTRO_FEATURE and mali400 MACHINE_FEATURES by adding these + variables to the end of the conf/local.conf file as shown below. +``` +DISTRO_FEATURES:append = " libmali" +MACHINE_FEATURES += "mali400" +``` + +3. Continue [Building Instructions](../README.building.md) from step 5. + +## How to enable DRM LIMA drivers + +1. Follow [Building Instructions](../README.building.md) upto step 4. + +2. Remove libmali DISTRO_FEATURE and enable mali400 MACHINE_FEATURES by adding + these variables to the end of the conf/local.conf file as shown below. +``` +DISTRO_FEATURES:remove = " libmali" +MACHINE_FEATURES += "mali400" +``` + +3. Continue [Building Instructions](../README.building.md) from step 5. + +## Dependencies + +This layer depends on: + + URI: https://git.yoctoproject.org/poky + layers: meta, meta-poky + branch: scarthgap + + URI: https://git.openembedded.org/meta-openembedded + layers: meta-oe + branch: scarthgap + + URI: https://git.yoctoproject.org/meta-arm + layers: meta-arm, meta-arm-toolchain + branch: scarthgap + + URI: + https://git.yoctoproject.org/meta-xilinx (official version) + https://github.com/Xilinx/meta-xilinx (development and AMD release) + layers: meta-xilinx-microblaze, meta-xilinx-core, meta-xilinx-standalone + branch: scarthgap or AMD release version (e.g. rel-v2024.2) diff --git a/meta-xilinx-mali400/recipes-benchmarks/files/0001-Make-RGB565-as-default-EGLconfig.patch b/meta-xilinx-mali400/recipes-benchmarks/glmark2/files/0001-Make-RGB565-as-default-EGLconfig.patch similarity index 100% rename from meta-xilinx-mali400/recipes-benchmarks/files/0001-Make-RGB565-as-default-EGLconfig.patch rename to meta-xilinx-mali400/recipes-benchmarks/glmark2/files/0001-Make-RGB565-as-default-EGLconfig.patch diff --git a/meta-xilinx-mali400/recipes-benchmarks/files/0001-src-gl-state-egl-Use-native_display-to-load-EGL-func.patch b/meta-xilinx-mali400/recipes-benchmarks/glmark2/files/0001-src-gl-state-egl-Use-native_display-to-load-EGL-func.patch similarity index 100% rename from meta-xilinx-mali400/recipes-benchmarks/files/0001-src-gl-state-egl-Use-native_display-to-load-EGL-func.patch rename to meta-xilinx-mali400/recipes-benchmarks/glmark2/files/0001-src-gl-state-egl-Use-native_display-to-load-EGL-func.patch diff --git a/meta-xilinx-mali400/recipes-benchmarks/files/0001-src-options.cpp-Add-options-to-configure-bpp-and-dep.patch b/meta-xilinx-mali400/recipes-benchmarks/glmark2/files/0001-src-options.cpp-Add-options-to-configure-bpp-and-dep.patch similarity index 100% rename from meta-xilinx-mali400/recipes-benchmarks/files/0001-src-options.cpp-Add-options-to-configure-bpp-and-dep.patch rename to meta-xilinx-mali400/recipes-benchmarks/glmark2/files/0001-src-options.cpp-Add-options-to-configure-bpp-and-dep.patch diff --git a/meta-xilinx-mali400/recipes-benchmarks/glmark2_%.bbappend b/meta-xilinx-mali400/recipes-benchmarks/glmark2/glmark2_%.bbappend similarity index 100% rename from meta-xilinx-mali400/recipes-benchmarks/glmark2_%.bbappend rename to meta-xilinx-mali400/recipes-benchmarks/glmark2/glmark2_%.bbappend diff --git a/meta-xilinx-mali400/recipes-graphics/libgles/libmali-xlnx_r9p0-01rel0.bb b/meta-xilinx-mali400/recipes-graphics/libgles/libmali-xlnx_r9p0-01rel0.bb index 2d01cf7b0..b0fe3c79b 100644 --- a/meta-xilinx-mali400/recipes-graphics/libgles/libmali-xlnx_r9p0-01rel0.bb +++ b/meta-xilinx-mali400/recipes-graphics/libgles/libmali-xlnx_r9p0-01rel0.bb @@ -13,8 +13,8 @@ PROVIDES += "virtual/libgles1 virtual/libgles2 virtual/egl virtual/libgbm" FILESEXTRAPATHS:prepend := "${THISDIR}/files:" REPO ?= "git://github.com/Xilinx/mali-userspace-binaries.git;protocol=https" -BRANCH ?= "xlnx_rel_v2024.1" -SRCREV ?= "b3a772aad859cdadc8513b11c3e995546c20e75e" +BRANCH ?= "xlnx_rel_v2024.2" +SRCREV ?= "644dc96597172e3cf15aea63b4ee947d421810aa" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = " \ @@ -28,7 +28,7 @@ SRC_URI = " \ PACKAGE_ARCH = "${MACHINE_ARCH}" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" # If were switching at runtime, we would need all RDEPENDS needed for all backends available X11RDEPENDS = "libxdamage libxext libx11 libdrm libxfixes" @@ -55,6 +55,7 @@ USE_FB = "${@bb.utils.contains("DISTRO_FEATURES", "fbdev", "yes", "no", d)}" USE_WL = "${@bb.utils.contains("DISTRO_FEATURES", "wayland", "yes", "no", d)}" MONOLITHIC_LIBMALI = "libMali.so.9.0" +MONOLITHIC_LIBMALI_MVL = "libMali.so.9" do_install() { #Identify the ARCH type @@ -76,10 +77,10 @@ do_install() { install -m 0644 ${S}/${PV}/glesHeaders/KHR/*.h ${D}${includedir}/KHR/ install -d ${D}${libdir}/pkgconfig - install -m 0644 ${UNPACKDIR}/egl.pc ${D}${libdir}/pkgconfig/egl.pc - install -m 0644 ${UNPACKDIR}/glesv2.pc ${D}${libdir}/pkgconfig/glesv2.pc - install -m 0644 ${UNPACKDIR}/glesv1.pc ${D}${libdir}/pkgconfig/glesv1.pc - install -m 0644 ${UNPACKDIR}/glesv1_cm.pc ${D}${libdir}/pkgconfig/glesv1_cm.pc + install -m 0644 ${WORKDIR}/egl.pc ${D}${libdir}/pkgconfig/egl.pc + install -m 0644 ${WORKDIR}/glesv2.pc ${D}${libdir}/pkgconfig/glesv2.pc + install -m 0644 ${WORKDIR}/glesv1.pc ${D}${libdir}/pkgconfig/glesv1.pc + install -m 0644 ${WORKDIR}/glesv1_cm.pc ${D}${libdir}/pkgconfig/glesv1_cm.pc install -d ${D}${libdir} install -d ${D}${includedir} @@ -88,10 +89,11 @@ do_install() { install -Dm 0644 ${S}/${PV}/${ARCH_PLATFORM_DIR}/headless/${MONOLITHIC_LIBMALI} ${D}${libdir}/headless/${MONOLITHIC_LIBMALI} ln -snf headless/${MONOLITHIC_LIBMALI} ${D}${libdir}/${MONOLITHIC_LIBMALI} + ln -snf ${MONOLITHIC_LIBMALI} ${D}${libdir}/headless/${MONOLITHIC_LIBMALI_MVL} # install gbm install -m 0644 ${S}/${PV}/glesHeaders/GBM/gbm.h ${D}${includedir}/ - install -m 0644 ${UNPACKDIR}/gbm.pc ${D}${libdir}/pkgconfig/gbm.pc + install -m 0644 ${WORKDIR}/gbm.pc ${D}${libdir}/pkgconfig/gbm.pc if [ "${USE_FB}" = "yes" ]; then install -Dm 0644 ${S}/${PV}/${ARCH_PLATFORM_DIR}/fbdev/${MONOLITHIC_LIBMALI} ${D}${libdir}/fbdev/${MONOLITHIC_LIBMALI} diff --git a/meta-xilinx-mali400/recipes-graphics/mali/kernel-module-mali_r9p0-01rel0.bb b/meta-xilinx-mali400/recipes-graphics/mali/kernel-module-mali_r9p0-01rel0.bb index 12b117d4c..c25970e78 100644 --- a/meta-xilinx-mali400/recipes-graphics/mali/kernel-module-mali_r9p0-01rel0.bb +++ b/meta-xilinx-mali400/recipes-graphics/mali/kernel-module-mali_r9p0-01rel0.bb @@ -42,7 +42,7 @@ inherit features_check module PARALLEL_MAKE = "-j 1" -S = "${UNPACKDIR}/DX910-SW-99002-${PV}/driver/src/devicedrv/mali" +S = "${WORKDIR}/DX910-SW-99002-${PV}/driver/src/devicedrv/mali" REQUIRED_MACHINE_FEATURES = "mali400" diff --git a/meta-xilinx-mali400/recipes-graphics/wayland/weston_9.0.0.bb b/meta-xilinx-mali400/recipes-graphics/wayland/weston_9.0.0.bb index af329e30c..a534b1b71 100644 --- a/meta-xilinx-mali400/recipes-graphics/wayland/weston_9.0.0.bb +++ b/meta-xilinx-mali400/recipes-graphics/wayland/weston_9.0.0.bb @@ -107,18 +107,18 @@ do_install:append() { # If X11, ship a desktop file to launch it if [ "${@bb.utils.filter('DISTRO_FEATURES', 'x11', d)}" ]; then install -d ${D}${datadir}/applications - install ${UNPACKDIR}/weston.desktop ${D}${datadir}/applications + install ${WORKDIR}/weston.desktop ${D}${datadir}/applications install -d ${D}${datadir}/icons/hicolor/48x48/apps - install ${UNPACKDIR}/weston.png ${D}${datadir}/icons/hicolor/48x48/apps + install ${WORKDIR}/weston.png ${D}${datadir}/icons/hicolor/48x48/apps fi if [ "${@bb.utils.contains('PACKAGECONFIG', 'xwayland', 'yes', 'no', d)}" = "yes" ]; then - install -Dm 644 ${UNPACKDIR}/xwayland.weston-start ${D}${datadir}/weston-start/xwayland + install -Dm 644 ${WORKDIR}/xwayland.weston-start ${D}${datadir}/weston-start/xwayland fi if [ "${@bb.utils.contains('PACKAGECONFIG', 'systemd', 'yes', 'no', d)}" = "yes" ]; then - install -Dm 644 ${UNPACKDIR}/systemd-notify.weston-start ${D}${datadir}/weston-start/systemd-notify + install -Dm 644 ${WORKDIR}/systemd-notify.weston-start ${D}${datadir}/weston-start/systemd-notify fi if [ "${@bb.utils.contains('PACKAGECONFIG', 'launch', 'yes', 'no', d)}" = "yes" ]; then diff --git a/meta-xilinx-mali400/recipes-kernel/linux-xlnx-udev-rules/linux-xlnx-udev-rules.bbappend b/meta-xilinx-mali400/recipes-kernel/linux-xlnx-udev-rules/linux-xlnx-udev-rules.bbappend index 81c660a52..b4950a6d1 100644 --- a/meta-xilinx-mali400/recipes-kernel/linux-xlnx-udev-rules/linux-xlnx-udev-rules.bbappend +++ b/meta-xilinx-mali400/recipes-kernel/linux-xlnx-udev-rules/linux-xlnx-udev-rules.bbappend @@ -1,3 +1,3 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:" -SRC_URI:append = "${@bb.utils.contains('MACHINE_FEATURES', 'mali400', ' file://99-mali-device.rules', '', d)}" +SRC_URI += "file://99-mali-device.rules" diff --git a/meta-xilinx-multimedia/conf/layer.conf b/meta-xilinx-multimedia/conf/layer.conf index 1ae4676be..ccc5800e5 100644 --- a/meta-xilinx-multimedia/conf/layer.conf +++ b/meta-xilinx-multimedia/conf/layer.conf @@ -13,3 +13,9 @@ LAYERDEPENDS_xilinx-multimedia = "core" LAYERRECOMMENDS_xilinx-multimedia = "openembedded-layer" LAYERSERIES_COMPAT_xilinx-multimedia = "scarthgap" + +# Define dynamic layers +BBFILES_DYNAMIC += " \ +jupyter-layer:${LAYERDIR}/dynamic-layers/meta-jupyter/recipes-*/*/*.bb \ +jupyter-layer:${LAYERDIR}/dynamic-layers/meta-jupyter/recipes-*/*/*.bbappend \ +" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-multimedia-notebooks_0.1.inc b/meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-multimedia-notebooks_0.1.inc similarity index 89% rename from meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-multimedia-notebooks_0.1.inc rename to meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-multimedia-notebooks_0.1.inc index 38e233714..1142391df 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-multimedia-notebooks_0.1.inc +++ b/meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-multimedia-notebooks_0.1.inc @@ -1,4 +1,4 @@ -BRANCH ?= "xlnx_rel_v2024.1" +BRANCH ?= "xlnx_rel_v2024.2" REPO ?= "git://github.com/Xilinx/multimedia-notebooks.git;protocol=https" SRCREV ?= "ef7a7236144a04977cb5bb800d6d7cf319e52b58" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-vcu-examples_0.1.bb b/meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-vcu-examples_0.1.bb similarity index 96% rename from meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-vcu-examples_0.1.bb rename to meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-vcu-examples_0.1.bb index 4729c0aac..3741c4d44 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-vcu-examples_0.1.bb +++ b/meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-vcu-examples_0.1.bb @@ -4,7 +4,7 @@ LIC_FILES_CHKSUM = "file://LICENSE.md;md5=17e31b2e971eed6471a361c7dc4faa18" require gstreamer-multimedia-notebooks_0.1.inc -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit features_check diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-vcu-notebooks_0.1.bb b/meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-vcu-notebooks_0.1.bb similarity index 76% rename from meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-vcu-notebooks_0.1.bb rename to meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-vcu-notebooks_0.1.bb index 578f8ea8b..2d39f34e5 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-vcu-notebooks_0.1.bb +++ b/meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-vcu-notebooks_0.1.bb @@ -6,14 +6,14 @@ inherit jupyter-examples require gstreamer-multimedia-notebooks_0.1.inc -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit features_check REQUIRED_MACHINE_FEATURES = "vcu" PACKAGE_ARCH = "${MACHINE_ARCH}" -RDEPENDS:${PN} = "packagegroup-petalinux-jupyter packagegroup-xilinx-gstreamer gstreamer-vcu-examples start-jupyter" +RDEPENDS:${PN} = "packagegroup-xilinx-jupyter packagegroup-xilinx-gstreamer gstreamer-vcu-examples start-jupyter" EXTRA_OEMAKE = 'D=${D} JUPYTER_DIR=${JUPYTER_DIR}' diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-vdu-examples_0.1.bb b/meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-vdu-examples_0.1.bb similarity index 96% rename from meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-vdu-examples_0.1.bb rename to meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-vdu-examples_0.1.bb index 4100f4888..8469412ea 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-vdu-examples_0.1.bb +++ b/meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-vdu-examples_0.1.bb @@ -4,7 +4,7 @@ LIC_FILES_CHKSUM = "file://LICENSE.md;md5=17e31b2e971eed6471a361c7dc4faa18" require gstreamer-multimedia-notebooks_0.1.inc -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit features_check diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-vdu-notebooks_0.1.bb b/meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-vdu-notebooks_0.1.bb similarity index 76% rename from meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-vdu-notebooks_0.1.bb rename to meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-vdu-notebooks_0.1.bb index a055d7b7e..28bbca903 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-vdu-notebooks_0.1.bb +++ b/meta-xilinx-multimedia/dynamic-layers/meta-jupyter/recipes-multimedia/gstreamer/gstreamer-vdu-notebooks_0.1.bb @@ -6,14 +6,14 @@ inherit jupyter-examples require gstreamer-multimedia-notebooks_0.1.inc -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit features_check REQUIRED_MACHINE_FEATURES = "vdu" PACKAGE_ARCH = "${MACHINE_ARCH}" -RDEPENDS:${PN} = "packagegroup-petalinux-jupyter packagegroup-xilinx-gstreamer gstreamer-vdu-examples start-jupyter" +RDEPENDS:${PN} = "packagegroup-xilinx-jupyter packagegroup-xilinx-gstreamer gstreamer-vdu-examples start-jupyter" EXTRA_OEMAKE = 'D=${D} JUPYTER_DIR=${JUPYTER_DIR}' diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-libav_1.20.5.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-libav_1.20.5.bbappend deleted file mode 100644 index 12b44dbb2..000000000 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-libav_1.20.5.bbappend +++ /dev/null @@ -1,3 +0,0 @@ -require gstreamer-xilinx-1.20.5.inc - -S = "${UNPACKDIR}/git/subprojects/gst-libav" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-plugins-good_1.20.5.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-plugins-good_1.20.5.bbappend deleted file mode 100644 index ecfb328da..000000000 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-plugins-good_1.20.5.bbappend +++ /dev/null @@ -1,9 +0,0 @@ -PACKAGECONFIG:append = " vpx" - -require gstreamer-xilinx-1.20.5.inc - -SRC_URI:append = " \ - file://0001-qt-include-ext-qt-gstqtgl.h-instead-of-gst-gl-gstglf.patch \ - " - -S = "${UNPACKDIR}/git/subprojects/gst-plugins-good" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-plugins-ugly_1.20.5.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-plugins-ugly_1.20.5.bbappend deleted file mode 100644 index a0d12b2e1..000000000 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-plugins-ugly_1.20.5.bbappend +++ /dev/null @@ -1,3 +0,0 @@ -require gstreamer-xilinx-1.20.5.inc - -S = "${UNPACKDIR}/git/subprojects/gst-plugins-ugly" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-python_1.20.5.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-python_1.20.5.bbappend deleted file mode 100644 index 4eddb2739..000000000 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-python_1.20.5.bbappend +++ /dev/null @@ -1,4 +0,0 @@ -require gstreamer-xilinx-1.20.5.inc - -S = "${UNPACKDIR}/git/subprojects/gst-python" - diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-rtsp-server_1.20.5.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-rtsp-server_1.20.5.bbappend deleted file mode 100644 index 1426accb4..000000000 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-rtsp-server_1.20.5.bbappend +++ /dev/null @@ -1,3 +0,0 @@ -require gstreamer-xilinx-1.20.5.inc - -S = "${UNPACKDIR}/git/subprojects/gst-rtsp-server" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-vaapi_1.20.5.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-vaapi_1.20.5.bbappend deleted file mode 100644 index 9cb6fddf4..000000000 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-vaapi_1.20.5.bbappend +++ /dev/null @@ -1,3 +0,0 @@ -require gstreamer-xilinx-1.20.5.inc - -S = "${UNPACKDIR}/git/subprojects/gstreamer-vaapi" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gst-devtools_1.20.5.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gst-devtools_1.22.%.bbappend similarity index 52% rename from meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gst-devtools_1.20.5.bbappend rename to meta-xilinx-multimedia/recipes-multimedia/gstreamer/gst-devtools_1.22.%.bbappend index 6b6ab9170..a73b2c89d 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gst-devtools_1.20.5.bbappend +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gst-devtools_1.22.%.bbappend @@ -1,7 +1,7 @@ -require gstreamer-xilinx-1.20.5.inc +require gstreamer-xilinx-1.22.%.inc SRC_URI:append = " \ file://0001-connect-has-a-different-signature-on-musl.patch \ " -S = "${UNPACKDIR}/git/subprojects/gst-devtools" +S = "${WORKDIR}/git/subprojects/gst-devtools" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gst-interpipes_v1.1.8.bb b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gst-interpipes_v1.1.8.bb index aeeab259c..e1ee3328f 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gst-interpipes_v1.1.8.bb +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gst-interpipes_v1.1.8.bb @@ -13,7 +13,7 @@ SRCBRANCH ?= "master" SRCREV = "814982ecd735e42ff2d14ce7c43039c259ec928b" SRC_URI = "gitsm://github.com/RidgeRun/gst-interpipe.git;protocol=https;branch=${SRCBRANCH}" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" FILES:${PN} += "${libdir}/gstreamer-1.0/libgstinterpipe.so" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gst-perf_1.0.bb b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gst-perf_1.0.bb index 9dee616d9..2e0aae648 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gst-perf_1.0.bb +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gst-perf_1.0.bb @@ -14,7 +14,7 @@ SRCBRANCH ?= "master" SRCREV ?= "d50ddc4a8c0dedd4f2de77d7f3f570548a1a0d76" SRC_URI = "git://github.com/RidgeRun/gst-perf.git;protocol=https;branch=${SRCBRANCH}" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" FILES:${PN} += "${libdir}/gstreamer-1.0/libgstperf.so" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-xilinx-1.20.5.inc b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-xilinx-1.22.%.inc similarity index 66% rename from meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-xilinx-1.20.5.inc rename to meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-xilinx-1.22.%.inc index 6bf2a99f1..25409d1e0 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-xilinx-1.20.5.inc +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer-xilinx-1.22.%.inc @@ -1,19 +1,19 @@ -BRANCH ?= "xlnx-rebase-v1.20.5" +BRANCH ?= "xlnx-rebase-v1.22.12" REPO ?= "git://github.com/Xilinx/gstreamer.git;protocol=https" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" -PV = "1.20.5+git" +PV = "1.22.12+git" # We need a common PRSERV_PV_AUTOINC for all variations of gstreamer packages # Need to inject a custom setting, so based on package.bbclass version PACKAGE_ARCH:task-packagedata = "all" -# However, if we change PACKAGE_ARCH in a task, it changes the UNPACKDIR and breaks things -# restore the UNPACKDIR's arch directory (MULTIMACH_TARGET_SYS) to the previous setting! +# However, if we change PACKAGE_ARCH in a task, it changes the WORKDIR and breaks things +# restore the WORKDIR's arch directory (MULTIMACH_TARGET_SYS) to the previous setting! python() { # Anonymous python runs before the task override is evaluated, so set the - # MULTIMACH_TARGET_SYS (used by UNPACKDIR) + # MULTIMACH_TARGET_SYS (used by WORKDIR) d.setVar('MULTIMACH_TARGET_SYS', d.getVar('MULTIMACH_TARGET_SYS')) } @@ -24,5 +24,5 @@ SRC_URI = " \ ${REPO};${BRANCHARG};name=gstreamer-xlnx \ " -SRCREV_gstreamer-xlnx = "5126254d77401b9673602ddcb617ff9e958dd295" +SRCREV_gstreamer-xlnx = "d036bef6c66d7e2351e0f7252d653bca137efe90" SRCREV_FORMAT = "gstreamer-xlnx" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-libav_1.22.%.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-libav_1.22.%.bbappend new file mode 100644 index 000000000..f157a7cb5 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-libav_1.22.%.bbappend @@ -0,0 +1,3 @@ +require gstreamer-xilinx-1.22.%.inc + +S = "${WORKDIR}/git/subprojects/gst-libav" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-omx_1.20.5.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-omx_1.22.%.bbappend similarity index 62% rename from meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-omx_1.20.5.bbappend rename to meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-omx_1.22.%.bbappend index 1db9616ce..25ffe106b 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-omx_1.20.5.bbappend +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-omx_1.22.%.bbappend @@ -1,6 +1,6 @@ -require gstreamer-xilinx-1.20.5.inc +require gstreamer-xilinx-1.22.%.inc -S = "${UNPACKDIR}/git/subprojects/gst-omx" +S = "${WORKDIR}/git/subprojects/gst-omx" RDEPENDS:${PN} .= "${@bb.utils.contains('MACHINE_FEATURES', 'vcu', ' libvcu-omxil', '', d)}" DEPENDS .= "${@bb.utils.contains('MACHINE_FEATURES', 'vcu', ' libvcu-omxil', '', d)}" @@ -8,20 +8,27 @@ DEPENDS .= "${@bb.utils.contains('MACHINE_FEATURES', 'vcu', ' libvcu-omxil', '', RDEPENDS:${PN} .= "${@bb.utils.contains('MACHINE_FEATURES', 'vdu', ' libvdu-omxil', '', d)}" DEPENDS .= "${@bb.utils.contains('MACHINE_FEATURES', 'vdu', ' libvdu-omxil', '', d)}" +RDEPENDS:${PN} .= "${@bb.utils.contains('MACHINE_FEATURES', 'vcu2', ' libvcu2-omxil', '', d)}" +DEPENDS .= "${@bb.utils.contains('MACHINE_FEATURES', 'vcu2', ' libvcu2-omxil', '', d)}" + EXTRA_OECONF .= "${@bb.utils.contains('MACHINE_FEATURES', 'vcu', ' --with-omx-header-path=${STAGING_INCDIR}/vcu-omx-il', '', d)}" EXTRA_OEMESON .= "${@bb.utils.contains('MACHINE_FEATURES', 'vcu', ' -Dheader_path=${STAGING_INCDIR}/vcu-omx-il', '', d)}" EXTRA_OECONF .= "${@bb.utils.contains('MACHINE_FEATURES', 'vdu', ' --with-omx-header-path=${STAGING_INCDIR}/vdu-omx-il', '', d)}" EXTRA_OEMESON .= "${@bb.utils.contains('MACHINE_FEATURES', 'vdu', ' -Dheader_path=${STAGING_INCDIR}/vdu-omx-il', '', d)}" +EXTRA_OECONF .= "${@bb.utils.contains('MACHINE_FEATURES', 'vcu2', ' --with-omx-header-path=${STAGING_INCDIR}/vcu2-omx-il', '', d)}" +EXTRA_OEMESON .= "${@bb.utils.contains('MACHINE_FEATURES', 'vcu2', ' -Dheader_path=${STAGING_INCDIR}/vcu2-omx-il', '', d)}" + DEFAULT_GSTREAMER_1_0_OMX_TARGET := "${GSTREAMER_1_0_OMX_TARGET}" VCU_GSTREAMER_1_0_OMX_TARGET = "${@bb.utils.contains('MACHINE_FEATURES', 'vcu', 'zynqultrascaleplus', '${DEFAULT_GSTREAMER_1_0_OMX_TARGET}', d)}" VDU_GSTREAMER_1_0_OMX_TARGET = "${@bb.utils.contains('MACHINE_FEATURES', 'vdu', 'versal', '${VCU_GSTREAMER_1_0_OMX_TARGET}', d)}" -GSTREAMER_1_0_OMX_TARGET = "${VDU_GSTREAMER_1_0_OMX_TARGET}" +VCU2_GSTREAMER_1_0_OMX_TARGET = "${@bb.utils.contains('MACHINE_FEATURES', 'vcu2', 'versalgen2', '${VDU_GSTREAMER_1_0_OMX_TARGET}', d)}" +GSTREAMER_1_0_OMX_TARGET = "${VCU2_GSTREAMER_1_0_OMX_TARGET}" DEFAULT_GSTREAMER_1_0_OMX_CORE_NAME := "${GSTREAMER_1_0_OMX_CORE_NAME}" -GSTREAMER_1_0_OMX_CORE_NAME = "${@bb.utils.contains_any('MACHINE_FEATURES', 'vcu vdu', '${libdir}/libOMX.allegro.core.so.1', '${DEFAULT_GSTREAMER_1_0_OMX_CORE_NAME}', d)}" +GSTREAMER_1_0_OMX_CORE_NAME = "${@bb.utils.contains_any('MACHINE_FEATURES', 'vcu vdu vcu2', '${libdir}/libOMX.allegro.core.so.1', '${DEFAULT_GSTREAMER_1_0_OMX_CORE_NAME}', d)}" DEFAULT_PACKAGE_ARCH := "${PACKAGE_ARCH}" PACKAGE_ARCH[vardepsexclude] = "MACHINE_ARCH" -PACKAGE_ARCH = "${@bb.utils.contains_any('MACHINE_FEATURES', 'vcu vdu', '${MACHINE_ARCH}', '${DEFAULT_PACKAGE_ARCH}', d)}" +PACKAGE_ARCH = "${@bb.utils.contains_any('MACHINE_FEATURES', 'vcu vdu vcu2', '${MACHINE_ARCH}', '${DEFAULT_PACKAGE_ARCH}', d)}" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-plugins-bad_1.20.5.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-plugins-bad_1.22.%.bbappend similarity index 82% rename from meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-plugins-bad_1.20.5.bbappend rename to meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-plugins-bad_1.22.%.bbappend index 3c083fc21..2775d0f83 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-plugins-bad_1.20.5.bbappend +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-plugins-bad_1.22.%.bbappend @@ -1,4 +1,4 @@ -require gstreamer-xilinx-1.20.5.inc +require gstreamer-xilinx-1.22.%.inc SRC_URI:append = " \ file://0001-fix-maybe-uninitialized-warnings-when-compiling-with.patch \ @@ -9,4 +9,4 @@ SRC_URI:append = " \ PACKAGECONFIG[mediasrcbin] = "-Dmediasrcbin=enabled,-Dmediasrcbin=disabled,media-ctl" PACKAGECONFIG:append = " faac kms faad opusparse mediasrcbin" -S = "${UNPACKDIR}/git/subprojects/gst-plugins-bad" +S = "${WORKDIR}/git/subprojects/gst-plugins-bad" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-plugins-base_1.20.5.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base_1.22.%.bbappend similarity index 76% rename from meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-plugins-base_1.20.5.bbappend rename to meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base_1.22.%.bbappend index 4b3e5eb68..f709b204d 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0-plugins-base_1.20.5.bbappend +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-plugins-base_1.22.%.bbappend @@ -1,4 +1,4 @@ -require gstreamer-xilinx-1.20.5.inc +require gstreamer-xilinx-1.22.%.inc SRC_URI:append = " \ file://0001-ENGR00312515-get-caps-from-src-pad-when-query-caps.patch \ @@ -8,4 +8,4 @@ SRC_URI:append = " \ PACKAGECONFIG:append = " opus" -S = "${UNPACKDIR}/git/subprojects/gst-plugins-base" +S = "${WORKDIR}/git/subprojects/gst-plugins-base" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-plugins-good_1.22.%.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-plugins-good_1.22.%.bbappend new file mode 100644 index 000000000..2d86bffb7 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-plugins-good_1.22.%.bbappend @@ -0,0 +1,10 @@ +require gstreamer-xilinx-1.22.%.inc + +SRC_URI:append = " \ + file://0001-qt-include-ext-qt-gstqtgl.h-instead-of-gst-gl-gstglf.patch \ + file://0001-v4l2-Define-ioctl_req_t-for-posix-linux-case.patch \ + " + +PACKAGECONFIG:append = " vpx" + +S = "${WORKDIR}/git/subprojects/gst-plugins-good" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-plugins-ugly_1.22.%.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-plugins-ugly_1.22.%.bbappend new file mode 100644 index 000000000..575086f48 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-plugins-ugly_1.22.%.bbappend @@ -0,0 +1,3 @@ +require gstreamer-xilinx-1.22.%.inc + +S = "${WORKDIR}/git/subprojects/gst-plugins-ugly" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-python_1.22.%.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-python_1.22.%.bbappend new file mode 100644 index 000000000..cae172370 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-python_1.22.%.bbappend @@ -0,0 +1,4 @@ +require gstreamer-xilinx-1.22.%.inc + +S = "${WORKDIR}/git/subprojects/gst-python" + diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-rtsp-server_1.22.%.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-rtsp-server_1.22.%.bbappend new file mode 100644 index 000000000..dfa5635c8 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-rtsp-server_1.22.%.bbappend @@ -0,0 +1,3 @@ +require gstreamer-xilinx-1.22.%.inc + +S = "${WORKDIR}/git/subprojects/gst-rtsp-server" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-vaapi_1.22.%.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-vaapi_1.22.%.bbappend new file mode 100644 index 000000000..28427eac3 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0-vaapi_1.22.%.bbappend @@ -0,0 +1,3 @@ +require gstreamer-xilinx-1.22.%.inc + +S = "${WORKDIR}/git/subprojects/gstreamer-vaapi" diff --git a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0_1.20.5.bbappend b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0_1.22.%.bbappend similarity index 59% rename from meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0_1.20.5.bbappend rename to meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0_1.22.%.bbappend index d96e92a6b..6f2f79a47 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/gstreamer/FIXME/gstreamer1.0_1.20.5.bbappend +++ b/meta-xilinx-multimedia/recipes-multimedia/gstreamer/gstreamer1.0_1.22.%.bbappend @@ -1,14 +1,13 @@ -require gstreamer-xilinx-1.20.5.inc +require gstreamer-xilinx-1.22.%.inc SRC_URI:append = " \ file://run-ptest \ - file://0001-tests-respect-the-idententaion-used-in-meson.patch;striplevel=3 \ - file://0002-tests-add-support-for-install-the-tests.patch;striplevel=3 \ - file://0003-tests-use-a-dictionaries-for-environment.patch;striplevel=3 \ - file://0004-tests-add-helper-script-to-run-the-installed_tests.patch;striplevel=3 \ - file://0005-bin-Fix-race-conditions-in-tests.patch;striplevel=3 \ + file://0001-tests-respect-the-idententaion-used-in-meson.patch \ + file://0002-tests-add-support-for-install-the-tests.patch \ + file://0003-tests-use-a-dictionaries-for-environment.patch \ + file://0004-tests-add-helper-script-to-run-the-installed_tests.patch \ " PACKAGECONFIG:append = " tracer-hooks coretracers" -S = "${UNPACKDIR}/git/subprojects/gstreamer" +S = "${WORKDIR}/git/subprojects/gstreamer" diff --git a/meta-xilinx-multimedia/recipes-multimedia/sample-content/bigbuckbunny-2160p30.bb b/meta-xilinx-multimedia/recipes-multimedia/sample-content/bigbuckbunny-2160p30.bb index 2681bda46..4729ea430 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/sample-content/bigbuckbunny-2160p30.bb +++ b/meta-xilinx-multimedia/recipes-multimedia/sample-content/bigbuckbunny-2160p30.bb @@ -10,7 +10,7 @@ inherit allarch do_install() { install -d ${D}${datadir}/movies - install -m 0644 ${UNPACKDIR}/bbb_sunflower_2160p_30fps_normal.mp4 ${D}${datadir}/movies/ + install -m 0644 ${WORKDIR}/bbb_sunflower_2160p_30fps_normal.mp4 ${D}${datadir}/movies/ } FILES:${PN} += "${datadir}/movies" diff --git a/meta-xilinx-multimedia/recipes-multimedia/sample-content/bigbuckbunny-2160p60.bb b/meta-xilinx-multimedia/recipes-multimedia/sample-content/bigbuckbunny-2160p60.bb index b0c0a796b..c045e714d 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/sample-content/bigbuckbunny-2160p60.bb +++ b/meta-xilinx-multimedia/recipes-multimedia/sample-content/bigbuckbunny-2160p60.bb @@ -10,7 +10,7 @@ inherit allarch do_install() { install -d ${D}${datadir}/movies - install -m 0644 ${UNPACKDIR}/bbb_sunflower_2160p_60fps_normal.mp4 ${D}${datadir}/movies/ + install -m 0644 ${WORKDIR}/bbb_sunflower_2160p_60fps_normal.mp4 ${D}${datadir}/movies/ } FILES:${PN} += "${datadir}/movies" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu/kernel-module-vcu_2024.1.bb b/meta-xilinx-multimedia/recipes-multimedia/vcu/kernel-module-vcu_2024.1.bb index ba2060f5e..2d3c3a89e 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/vcu/kernel-module-vcu_2024.1.bb +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu/kernel-module-vcu_2024.1.bb @@ -6,7 +6,7 @@ LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a" PV .= "+git" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" FILESEXTRAPATHS:prepend := "${THISDIR}/files:" @@ -32,7 +32,7 @@ KERNEL_MODULE_AUTOLOAD += "dmaproxy" do_install:append() { install -d ${D}${sysconfdir}/udev/rules.d - install -m 0644 ${UNPACKDIR}/99-vcu-enc-dec.rules ${D}${sysconfdir}/udev/rules.d/ + install -m 0644 ${WORKDIR}/99-vcu-enc-dec.rules ${D}${sysconfdir}/udev/rules.d/ } FILES:${PN} = "${sysconfdir}/udev/rules.d/*" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu/kernel-module-vcu_2024.2.bb b/meta-xilinx-multimedia/recipes-multimedia/vcu/kernel-module-vcu_2024.2.bb new file mode 100644 index 000000000..91b1d1be0 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu/kernel-module-vcu_2024.2.bb @@ -0,0 +1,38 @@ +SUMMARY = "Linux kernel module for Video Code Unit" +DESCRIPTION = "Out-of-tree VCU decoder, encoder and common kernel modules provider for MPSoC EV devices" +SECTION = "kernel/modules" +LICENSE = "GPL-2.0-or-later" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a" + +PV .= "+git" + +S = "${WORKDIR}/git" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +BRANCH = "xlnx_rel_v2024.2" +REPO = "git://github.com/Xilinx/vcu-modules.git;protocol=https" +SRCREV = "91d19a16308a438596138d30d8174e148fc45584" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = " \ + ${REPO};${BRANCHARG} \ + file://99-vcu-enc-dec.rules \ + " + +inherit module features_check + +REQUIRED_MACHINE_FEATURES = "vcu" + +EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}" + +RDEPENDS:${PN} = "vcu-firmware" + +KERNEL_MODULE_AUTOLOAD += "dmaproxy" + +do_install:append() { + install -d ${D}${sysconfdir}/udev/rules.d + install -m 0644 ${WORKDIR}/99-vcu-enc-dec.rules ${D}${sysconfdir}/udev/rules.d/ +} + +FILES:${PN} = "${sysconfdir}/udev/rules.d/*" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu/libvcu-omxil_1.1.2-xilinx-v2024.1.bb b/meta-xilinx-multimedia/recipes-multimedia/vcu/libvcu-omxil_1.1.2-xilinx-v2024.1.bb index 1e6900580..d03151851 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/vcu/libvcu-omxil_1.1.2-xilinx-v2024.1.bb +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu/libvcu-omxil_1.1.2-xilinx-v2024.1.bb @@ -16,7 +16,7 @@ SRCREV = "dc34204543b89997577bd2c9757b3c218e6caccc" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit features_check diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu/libvcu-omxil_1.1.2-xilinx-v2024.2.bb b/meta-xilinx-multimedia/recipes-multimedia/vcu/libvcu-omxil_1.1.2-xilinx-v2024.2.bb new file mode 100644 index 000000000..6137f9e34 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu/libvcu-omxil_1.1.2-xilinx-v2024.2.bb @@ -0,0 +1,53 @@ +SUMMARY = "OpenMAX Integration layer for VCU" +DESCRIPTION = "OMX IL Libraries,test applications and headers for VCU" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=002a0a92906100955ea6ed02dcd2c2cd" + +# Recipe has been renamed +PROVIDES += "libomxil-xlnx" + +# Version from core/core_version.mk +PV .= "+git" + +BRANCH ?= "xlnx_rel_v2024.2" +REPO ?= "git://github.com/Xilinx/vcu-omx-il.git;protocol=https" +SRCREV = "b259cf0b3eaa1b0b17d2e807f233bfef5b9dbddd" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +S = "${WORKDIR}/git" + +inherit features_check + +REQUIRED_MACHINE_FEATURES = "vcu" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "vcu-ctrlsw" +RDEPENDS:${PN} = "libvcu-ctrlsw" + +EXTERNAL_INCLUDE="${STAGING_INCDIR}/vcu-ctrl-sw/include" + +EXTRA_OEMAKE = " \ + CC='${CC}' CXX='${CXX} ${CXXFLAGS}' \ + EXTERNAL_INCLUDE='${EXTERNAL_INCLUDE}' \ + " + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir}/vcu-omx-il + + install -m 0644 ${S}/omx_header/*.h ${D}${includedir}/vcu-omx-il + + oe_runmake install INSTALL_PATH=${D}${bindir} + + oe_libinstall -C ${S}/bin/ -so libOMX.allegro.core ${D}/${libdir}/ + oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_decoder ${D}/${libdir}/ + oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_encoder ${D}/${libdir}/ +} + +# These libraries shouldn't get installed in world builds unless something +# explicitly depends upon them. + +EXCLUDE_FROM_WORLD = "1" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-ctrlsw_1.0.79-xilinx-v2024.1.bb b/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-ctrlsw_1.0.79-xilinx-v2024.1.bb index c6b54b51e..6854d73a1 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-ctrlsw_1.0.79-xilinx-v2024.1.bb +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-ctrlsw_1.0.79-xilinx-v2024.1.bb @@ -15,7 +15,7 @@ SRCREV = "940f9fa933402de6f959911c236f36add5dd3a40" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" inherit features_check diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-ctrlsw_1.0.80-xilinx-v2024.2.bb b/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-ctrlsw_1.0.80-xilinx-v2024.2.bb new file mode 100644 index 000000000..7e4f209a7 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-ctrlsw_1.0.80-xilinx-v2024.2.bb @@ -0,0 +1,49 @@ +SUMMARY = "Control Software for VCU" +DESCRIPTION = "Control software libraries, test applications and headers provider for VCU encoder/decoded software API" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=002a0a92906100955ea6ed02dcd2c2cd" + +# Recipe has been renamed +PROVIDES += "libvcu-xlnx" + +PV .= "+git" + +BRANCH ?= "xlnx_rel_v2024.2" +REPO ?= "git://github.com/Xilinx/vcu-ctrl-sw.git;protocol=https" +SRCREV = "bcb5ff5f77f2a8ea8222eb64b69c1f9f730cc6b1" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +S = "${WORKDIR}/git" + +inherit features_check + +REQUIRED_MACHINE_FEATURES = "vcu" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +RDEPENDS:${PN} = "kernel-module-vcu" +RDEPENDS:libvcu-ctrlsw = "kernel-module-vcu" + +EXTRA_OEMAKE = "CC='${CC}' CXX='${CXX} ${CXXFLAGS}'" + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir}/vcu-ctrl-sw/include + + oe_runmake install_headers INSTALL_HDR_PATH=${D}${includedir}/vcu-ctrl-sw/include INSTALL_PATH=${D}/${bindir} + oe_libinstall -C ${S}/bin/ -so liballegro_decode ${D}/${libdir}/ + oe_libinstall -C ${S}/bin/ -so liballegro_encode ${D}/${libdir}/ +} + +PACKAGES =+ "libvcu-ctrlsw" +FILES:libvcu-ctrlsw += "${libdir}/liballegro*.so.*" + +# These libraries shouldn't get installed in world builds unless something +# explicitly depends upon them. + +EXCLUDE_FROM_WORLD = "1" + +# Disable buildpaths QA check warnings. +INSANE_SKIP:${PN} += "buildpaths" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-firmware_20240216-xilinx-v2024.1.bb b/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-firmware_20240216-xilinx-v2024.1.bb index 02aa0b8eb..f500ec361 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-firmware_20240216-xilinx-v2024.1.bb +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-firmware_20240216-xilinx-v2024.1.bb @@ -5,7 +5,7 @@ LIC_FILES_CHKSUM = "file://LICENSE.md;md5=9bef8aa9d1eba8aca1b7dffdef500262" PV .= "+git" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" BRANCH ?= "xlnx_rel_v2024.1" REPO ?= "git://github.com/Xilinx/vcu-firmware.git;protocol=https" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-firmware_20240325-xilinx-v2024.2.bb b/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-firmware_20240325-xilinx-v2024.2.bb new file mode 100644 index 000000000..4eb810e4c --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu/vcu-firmware_20240325-xilinx-v2024.2.bb @@ -0,0 +1,41 @@ +SUMMARY = "Firmware for VCU" +DESCRIPTION = "Firmware binaries provider for VCU" +LICENSE = "Proprietary" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=9bef8aa9d1eba8aca1b7dffdef500262" + +PV .= "+git" + +S = "${WORKDIR}/git" + +BRANCH ?= "xlnx_rel_v2024.2" +REPO ?= "git://github.com/Xilinx/vcu-firmware.git;protocol=https" +SRCREV = "83d64885c681e835dd7d54064c6c2f66c46071d3" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +inherit features_check + +REQUIRED_MACHINE_FEATURES = "vcu" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +do_compile[noexec] = "1" + +do_install() { + install -Dm 0644 ${S}/1.0.0/lib/firmware/al5d_b.fw ${D}${nonarch_base_libdir}/firmware/al5d_b.fw + install -Dm 0644 ${S}/1.0.0/lib/firmware/al5d.fw ${D}${nonarch_base_libdir}/firmware/al5d.fw + install -Dm 0644 ${S}/1.0.0/lib/firmware/al5e_b.fw ${D}${nonarch_base_libdir}/firmware/al5e_b.fw + install -Dm 0644 ${S}/1.0.0/lib/firmware/al5e.fw ${D}${nonarch_base_libdir}/firmware/al5e.fw +} + +# Inhibit warnings about files being stripped +INHIBIT_PACKAGE_DEBUG_SPLIT = "1" +INHIBIT_PACKAGE_STRIP = "1" +FILES:${PN} = "${nonarch_base_libdir}/firmware/*" + +# These libraries shouldn't get installed in world builds unless something +# explicitly depends upon them. +EXCLUDE_FROM_WORLD = "1" + +INSANE_SKIP:${PN} = "ldflags" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu2/files/99-vcu2-codec.rules b/meta-xilinx-multimedia/recipes-multimedia/vcu2/files/99-vcu2-codec.rules new file mode 100644 index 000000000..54ae765d9 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu2/files/99-vcu2-codec.rules @@ -0,0 +1,4 @@ +# Allegro VCU2 Encode, Decoder module drivers +SUBSYSTEM=="allegro_encode_class", KERNEL=="al_e2xx", MODE="0660", GROUP="video" +SUBSYSTEM=="allegro_decode_class", KERNEL=="al_d3xx", MODE="0660", GROUP="video" + diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu2/kernel-module-vcu2_2024.2.bb b/meta-xilinx-multimedia/recipes-multimedia/vcu2/kernel-module-vcu2_2024.2.bb new file mode 100644 index 000000000..a8e336a83 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu2/kernel-module-vcu2_2024.2.bb @@ -0,0 +1,36 @@ +SUMMARY = "Linux kernel module for Video Code Unit" +DESCRIPTION = "Out-of-tree VCU decoder, encoder and common kernel modules provider for MPSoC EV devices" +SECTION = "kernel/modules" +LICENSE = "GPL-2.0-only" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a" + +PV .= "+git" + +S = "${WORKDIR}/git" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +BRANCH = "xlnx_rel_v2024.2" +REPO = "git://github.com/Xilinx/vcu2-modules.git;protocol=https" +SRCREV = "a0b6bd20dfd986a0877e75ff86effe422be26d42" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = " \ + ${REPO};${BRANCHARG} \ + file://99-vcu2-codec.rules \ + " + +inherit module features_check + +REQUIRED_MACHINE_FEATURES = "vcu2" + +EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR} KDIR=${STAGING_KERNEL_BUILDDIR}" + +RDEPENDS:${PN} = "vcu2-firmware" + +do_install:append() { + install -d ${D}${sysconfdir}/udev/rules.d + install -m 0644 ${WORKDIR}/99-vcu2-codec.rules ${D}${sysconfdir}/udev/rules.d/ +} + +FILES:${PN} = "${sysconfdir}/udev/rules.d/*" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu2/libvcu2-omxil_1.1.2-xilinx-v2024.2.bb b/meta-xilinx-multimedia/recipes-multimedia/vcu2/libvcu2-omxil_1.1.2-xilinx-v2024.2.bb new file mode 100644 index 000000000..bf1813455 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu2/libvcu2-omxil_1.1.2-xilinx-v2024.2.bb @@ -0,0 +1,51 @@ +SUMMARY = "OpenMAX Integration layer for VCU2" +DESCRIPTION = "OMX IL Libraries,test applications and headers for VCU2" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=002a0a92906100955ea6ed02dcd2c2cd" + +# Version from core/core_version.mk +PV .= "+git" + +BRANCH ?= "xlnx_rel_v2024.2" +REPO ?= "git://github.com/Xilinx/vcu2-omx-il.git;protocol=https" +SRCREV = "130d56172f768e5d2f8c8a3aa75fcbad581ab2d9" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +S = "${WORKDIR}/git" + +inherit features_check + +REQUIRED_MACHINE_FEATURES = "vcu2" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "vcu2-ctrlsw" +RDEPENDS:${PN} = "libvcu2-ctrlsw" + +EXTERNAL_INCLUDE="${STAGING_INCDIR}/vcu2-ctrl-sw/include" + +EXTRA_OEMAKE = " \ + CC='${CC}' CXX='${CXX} ${CXXFLAGS}' \ + EXTERNAL_INCLUDE='${EXTERNAL_INCLUDE}' \ + " + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir}/vcu2-omx-il + + install -m 0644 ${S}/omx_header/*.h ${D}${includedir}/vcu2-omx-il + + install -Dm 0755 ${S}/bin/omx_decoder.exe ${D}/${bindir}/omx_decoder + install -Dm 0755 ${S}/bin/omx_encoder.exe ${D}/${bindir}/omx_encoder + + oe_libinstall -C ${S}/bin/ -so libOMX.allegro.core ${D}/${libdir}/ + oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_decoder ${D}/${libdir}/ + oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_encoder ${D}/${libdir}/ +} + +# These libraries shouldn't get installed in world builds unless something +# explicitly depends upon them. + +EXCLUDE_FROM_WORLD = "1" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu2/vcu2-ctrlsw_1.0.62-xilinx-v2024.2.bb b/meta-xilinx-multimedia/recipes-multimedia/vcu2/vcu2-ctrlsw_1.0.62-xilinx-v2024.2.bb new file mode 100644 index 000000000..fbc33d88a --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu2/vcu2-ctrlsw_1.0.62-xilinx-v2024.2.bb @@ -0,0 +1,49 @@ +SUMMARY = "Control Software for VCU2" +DESCRIPTION = "Control software libraries, test applications and headers provider for VCU2 encoder/decoder software API" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=003bf8ee942bb6256905b58e9b1b19c2" + +PV .= "+git" + +BRANCH ?= "xlnx_rel_v2024.2" +REPO ?= "git://github.com/Xilinx/vcu2-ctrl-sw.git;protocol=https" +SRCREV = "95b5e23881359964e7fbbf97fd754a91b6975a9b" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +S = "${WORKDIR}/git" + +inherit features_check + +REQUIRED_MACHINE_FEATURES = "vcu2" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +#RDEPENDS:${PN} = "kernel-module-vcu2" +#RDEPENDS:libvcu2-ctrlsw = "kernel-module-vcu2" + +EXTRA_OEMAKE = "CC='${CC}' CXX='${CXX} ${CXXFLAGS}'" + +do_install() { + install -Dm 0755 ${S}/bin/AL_Encoder.exe ${D}/${bindir}/ctrlsw_encoder + install -Dm 0755 ${S}/bin/AL_Decoder.exe ${D}/${bindir}/ctrlsw_decoder + oe_libinstall -C ${S}/bin/ -so liballegro_decode ${D}/${libdir}/ + oe_libinstall -C ${S}/bin/ -so liballegro_encode ${D}/${libdir}/ + oe_libinstall -C ${S}/bin/ -so liballegro_app ${D}/${libdir}/ + oe_libinstall -C ${S}/bin/ -so liballegro_conv_yuv ${D}/${libdir}/ + + install -d ${D}${includedir}/vcu2-ctrl-sw/include + oe_runmake install_headers INSTALL_HDR_PATH=${D}${includedir}/vcu2-ctrl-sw/include +} + +PACKAGES =+ "libvcu2-ctrlsw" +FILES:libvcu2-ctrlsw += "${libdir}/liballegro*.so.*" + +# These libraries shouldn't get installed in world builds unless something +# explicitly depends upon them. + +EXCLUDE_FROM_WORLD = "1" + +# Disable buildpaths QA check warnings. +INSANE_SKIP:${PN} += "buildpaths" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vcu2/vcu2-firmware_20240329-xilinx-v2024.2.bb b/meta-xilinx-multimedia/recipes-multimedia/vcu2/vcu2-firmware_20240329-xilinx-v2024.2.bb new file mode 100644 index 000000000..de6998fe4 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vcu2/vcu2-firmware_20240329-xilinx-v2024.2.bb @@ -0,0 +1,39 @@ +SUMMARY = "Firmware for VCU2" +DESCRIPTION = "Firmware binaries provider for VCU2" +LICENSE = "Proprietary" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=19975964707b2e6e3baf7acf31d2bef0" + +PV .= "+git" + +S = "${WORKDIR}/git" + +BRANCH ?="xlnx_rel_v2024.2" +REPO ?= "git://github.com/Xilinx/vcu2-firmware.git;protocol=https" +SRCREV = "83190f880978648c981d06778317985fc893eac4" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +inherit features_check + +REQUIRED_MACHINE_FEATURES = "vcu2" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +do_compile[noexec] = "1" + +do_install() { + install -Dm 0644 ${S}/decoder_firmware.bin ${D}${nonarch_base_libdir}/firmware/ald3xx.fw + install -Dm 0644 ${S}/encoder_firmware.bin ${D}${nonarch_base_libdir}/firmware/ale2xx.fw +} + +# Inhibit warnings about files being stripped +INHIBIT_PACKAGE_DEBUG_SPLIT = "1" +INHIBIT_PACKAGE_STRIP = "1" +FILES:${PN} = "${nonarch_base_libdir}/firmware/*" + +# These libraries shouldn't get installed in world builds unless something +# explicitly depends upon them. +EXCLUDE_FROM_WORLD = "1" + +INSANE_SKIP:${PN} = "ldflags" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vdu/kernel-module-vdu_2024.1.bb b/meta-xilinx-multimedia/recipes-multimedia/vdu/kernel-module-vdu_2024.1.bb index 39df15457..7f5fc3671 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/vdu/kernel-module-vdu_2024.1.bb +++ b/meta-xilinx-multimedia/recipes-multimedia/vdu/kernel-module-vdu_2024.1.bb @@ -6,7 +6,7 @@ LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a" PV .= "+git" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" FILESEXTRAPATHS:prepend := "${THISDIR}/files:" BRANCH ?= "xlnx_rel_v2024.1" @@ -28,7 +28,7 @@ RDEPENDS:${PN} = "vdu-firmware" do_install:append() { install -d ${D}${sysconfdir}/udev/rules.d - install -m 0644 ${UNPACKDIR}/99-vdu-enc-dec.rules ${D}${sysconfdir}/udev/rules.d/ + install -m 0644 ${WORKDIR}/99-vdu-enc-dec.rules ${D}${sysconfdir}/udev/rules.d/ } FILES:${PN} = "${sysconfdir}/udev/rules.d/*" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vdu/kernel-module-vdu_2024.2.bb b/meta-xilinx-multimedia/recipes-multimedia/vdu/kernel-module-vdu_2024.2.bb new file mode 100644 index 000000000..2e784e3c7 --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vdu/kernel-module-vdu_2024.2.bb @@ -0,0 +1,34 @@ +SUMMARY = "Linux kernel module for Video Decode Unit" +DESCRIPTION = "Out-of-tree VDU decoder common kernel modules" +SECTION = "kernel/modules" +LICENSE = "GPL-2.0-or-later" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a" + +PV .= "+git" + +S = "${WORKDIR}/git" +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +BRANCH ?= "xlnx_rel_v2024.2" +REPO ?= "git://github.com/Xilinx/vdu-modules.git;protocol=https" +SRCREV ?= "25773344ce1e539e7136c5a30cdee98a6cf490a8" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG} \ + file://99-vdu-enc-dec.rules \ +" + +inherit module features_check + +REQUIRED_MACHINE_FEATURES = "vdu" + +EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}" + +RDEPENDS:${PN} = "vdu-firmware" + +do_install:append() { + install -d ${D}${sysconfdir}/udev/rules.d + install -m 0644 ${WORKDIR}/99-vdu-enc-dec.rules ${D}${sysconfdir}/udev/rules.d/ +} + +FILES:${PN} = "${sysconfdir}/udev/rules.d/*" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vdu/libvdu-omxil_1.1.2-xilinx-v2024.1.bb b/meta-xilinx-multimedia/recipes-multimedia/vdu/libvdu-omxil_1.1.2-xilinx-v2024.1.bb index bc60b0ac5..e9ed03763 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/vdu/libvdu-omxil_1.1.2-xilinx-v2024.1.bb +++ b/meta-xilinx-multimedia/recipes-multimedia/vdu/libvdu-omxil_1.1.2-xilinx-v2024.1.bb @@ -12,8 +12,8 @@ SRCREV ?= "af9c6e8935799f4dcd579b0164dd05eb039b569d" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" -S = "${UNPACKDIR}/git" -B = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" +B = "${WORKDIR}/git" inherit autotools features_check diff --git a/meta-xilinx-multimedia/recipes-multimedia/vdu/libvdu-omxil_1.1.2-xilinx-v2024.2.bb b/meta-xilinx-multimedia/recipes-multimedia/vdu/libvdu-omxil_1.1.2-xilinx-v2024.2.bb new file mode 100644 index 000000000..0fb0d1eac --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vdu/libvdu-omxil_1.1.2-xilinx-v2024.2.bb @@ -0,0 +1,49 @@ +SUMMARY = "OpenMAX Integration layer for VDU" +DESCRIPTION = "OMX IL Libraries,test application and headers for VDU" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=002a0a92906100955ea6ed02dcd2c2cd" + +PV .= "+git" + +BRANCH ?= "xlnx_rel_v2024.2" +REPO ?= "git://github.com/Xilinx/vdu-omx-il.git;protocol=https" +SRCREV ?= "af9c6e8935799f4dcd579b0164dd05eb039b569d" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +S = "${WORKDIR}/git" +B = "${WORKDIR}/git" + +inherit autotools features_check + +REQUIRED_MACHINE_FEATURES = "vdu" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "vdu-ctrlsw" +RDEPENDS:${PN} = "libvdu-ctrlsw" + +EXTERNAL_INCLUDE="${STAGING_INCDIR}/vdu-ctrl-sw/include" + +do_compile[dirs] = "${S}" +do_install[dirs] = "${S}" + +EXTRA_OEMAKE = " \ + CC='${CC}' CXX='${CXX} ${CXXFLAGS}' \ + EXTERNAL_INCLUDE='${EXTERNAL_INCLUDE}' \ + INSTALL_PATH=${D}${bindir} \ + INCLUDE_INST_PATH=${D}${includedir} \ + " + +do_install:append() { + install -d ${D}${libdir} + + oe_libinstall -C ${S}/bin/ -so libOMX.allegro.core ${D}/${libdir}/ + oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_decoder ${D}/${libdir}/ +} + +# These libraries shouldn't get installed in world builds unless something +# explicitly depends upon them. + +EXCLUDE_FROM_WORLD = "1" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-ctrlsw_1.0.79-xilinx-v2024.1.bb b/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-ctrlsw_1.0.79-xilinx-v2024.1.bb index 2cacf832f..6b7a4f6a5 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-ctrlsw_1.0.79-xilinx-v2024.1.bb +++ b/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-ctrlsw_1.0.79-xilinx-v2024.1.bb @@ -15,7 +15,7 @@ SRCREV ?= "fb8730a808b707bfb86d3d64881899214a951ff6" BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" SRC_URI = "${REPO};${BRANCHARG}" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" B = "${S}" inherit autotools features_check diff --git a/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-ctrlsw_1.0.79-xilinx-v2024.2.bb b/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-ctrlsw_1.0.79-xilinx-v2024.2.bb new file mode 100644 index 000000000..7134e7e0c --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-ctrlsw_1.0.79-xilinx-v2024.2.bb @@ -0,0 +1,50 @@ +SUMMARY = "Control Software for VDU" +DESCRIPTION = "Control software libraries, test applications and headers provider for VDU deconder software API" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=002a0a92906100955ea6ed02dcd2c2cd" + +# Recipe has been renamed +PROVIDES += "libvdu-ctrlsw" + +PV .= "+git" + +BRANCH ?= "xlnx_rel_v2024.2" +REPO ?= "git://github.com/Xilinx/vdu-ctrl-sw.git;protocol=https" +SRCREV ?= "361a822a223dc430ca44641be148fe1cbc13dd10" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +S = "${WORKDIR}/git" +B = "${S}" + +inherit autotools features_check + +REQUIRED_MACHINE_FEATURES = "vdu" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +RDEPENDS:${PN} = "kernel-module-vdu" +RDEPENDS:libvdu-ctrlsw = "kernel-module-vdu" + +do_compile[dirs] = "${S}" +do_install[dirs] = "${S}" + +EXTRA_OEMAKE = "CC='${CC}' CXX='${CXX} ${CXXFLAGS}'" +EXTRA_OEMAKE +=" INSTALL_HDR_PATH=${D}${includedir}/vdu-ctrl-sw/include INSTALL_PATH=${D}${bindir}" + +do_install:append() { + + oe_libinstall -C ${S}/bin/ -so liballegro_decode ${D}/${libdir}/ +} + +PACKAGES =+ "libvdu-ctrlsw" +FILES:libvdu-ctrlsw += "${libdir}/liballegro*.so.*" + +# These libraries shouldn't get installed in world builds unless something +# explicitly depends upon them. + +EXCLUDE_FROM_WORLD = "1" + +# Disable buildpaths QA check warnings. +INSANE_SKIP:${PN} += "buildpaths" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-firmware_20240216-xilinx-v2024.1.bb b/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-firmware_20240216-xilinx-v2024.1.bb index 79a528ad8..c4330a3c4 100644 --- a/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-firmware_20240216-xilinx-v2024.1.bb +++ b/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-firmware_20240216-xilinx-v2024.1.bb @@ -5,7 +5,7 @@ LIC_FILES_CHKSUM = "file://LICENSE.md;md5=722a9d20bf58ac06585a6d91ee36e60e" PV .= "+git" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" B = "${S}" BRANCH ?= "xlnx_rel_v2024.1" diff --git a/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-firmware_20240216-xilinx-v2024.2.bb b/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-firmware_20240216-xilinx-v2024.2.bb new file mode 100644 index 000000000..75bc21d9d --- /dev/null +++ b/meta-xilinx-multimedia/recipes-multimedia/vdu/vdu-firmware_20240216-xilinx-v2024.2.bb @@ -0,0 +1,38 @@ +SUMMARY = "Firmware for VDU" +DESCRIPTION = "Firmware binaries provider for VDU" +LICENSE = "Proprietary" +LIC_FILES_CHKSUM = "file://LICENSE.md;md5=722a9d20bf58ac06585a6d91ee36e60e" + +PV .= "+git" + +S = "${WORKDIR}/git" +B = "${S}" + +BRANCH ?= "xlnx_rel_v2024.2" +REPO ?= "git://github.com/Xilinx/vdu-firmware.git;protocol=https" +SRCREV ?= "724de80630edcb87d865d69f1a6c0dc61c3f9f12" + +BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" +SRC_URI = "${REPO};${BRANCHARG}" + +inherit autotools features_check + +REQUIRED_MACHINE_FEATURES = "vdu" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +EXTRA_OEMAKE +="INSTALL_PATH=${D}/${nonarch_base_libdir}/firmware" + +do_compile[noexec] = "1" +do_install[dirs] = "${S}" + +# Inhibit warnings about files being stripped +INHIBIT_PACKAGE_DEBUG_SPLIT = "1" +INHIBIT_PACKAGE_STRIP = "1" +FILES:${PN} = "${nonarch_base_libdir}/firmware/*" + +# These libraries shouldn't get installed in world builds unless something +# explicitly depends upon them. +EXCLUDE_FROM_WORLD = "1" + +INSANE_SKIP:${PN} = "ldflags" diff --git a/meta-xilinx-standalone-experimental b/meta-xilinx-standalone-experimental deleted file mode 120000 index 57cd8cff8..000000000 --- a/meta-xilinx-standalone-experimental +++ /dev/null @@ -1 +0,0 @@ -meta-xilinx-standalone-sdt \ No newline at end of file diff --git a/meta-xilinx-standalone-sdt/README.md b/meta-xilinx-standalone-sdt/README.md index d2d54c2e3..97141332e 100644 --- a/meta-xilinx-standalone-sdt/README.md +++ b/meta-xilinx-standalone-sdt/README.md @@ -1,155 +1,10 @@ # meta-xilinx-standalone-sdt -This layer contains System Device Tree items that are related to the -meta-xilinx-standalone layer. +This layer contains System Device Tree build metadata such as multiconfig operating +environment(baremetal, freertos etc) boot firmware drivers, libraries and +applications recipes. -## Build Instructions - -The Yocto Project setup for the System Device Tree (SDT) workflow is as follows. -Be sure to read everything below. - -> **Pre-requisites:** -> * To use this layer you must REMOVE meta-xilinx-tools from your project. -meta-xilinx-tools is not compatible with this SDT approach. You may -also have to remove other layers that depend on meta-xilinx-tools, such as -meta-kria and meta-system-controller. -> * Follow [System Device Tree Instructions](https://github.com/Xilinx/system-device-tree-xlnx/blob/master/README.md) -> to generate the SDT output. -> * To use the SDT version of the embedded software (firmware) as well -as system configuration, you must build through gen-machineconf tool. This tool -is passed a output of system device tree directory. - -1. Follow [Building Instructions](../README.building.md) upto step 2. - -2. Clone the meta-openamp repository. - -``` -$ git clone -b https://github.com/Xilinx/meta-openamp -``` -3. Continue [Building Instructions](https://github.com/Xilinx/meta-xilinx/blob/master/README.building.md) - from step 3 to step 4. - -4. Remove meta-xilinx-tools and meta-xilinx-tools dependency layers(such as - meta-kria and meta-system-controller if included in bblayers.conf), then add - the meta-xilinx-standalone-sdt and meta-openamp layer. - -> **Note:** SDT builds for following devices are not supported in 2024.1 release. -> * Zynq 7000 -> * MicoBlaze -> * Kria -> * System Controller - -``` -$ bitbake-layers remove-layer meta-xilinx-tools -$ bitbake-layers remove-layer meta-kria -$ bitbake-layers remove-layer meta-system-controller -$ bitbake-layers add-layer .//meta-xilinx/meta-xilinx-standalone-sdt -$ bitbake-layers add-layer .//meta-openamp -``` - -5. Export gen-machineconf tool. -``` -$ export PATH=$PATH:/gen-machine-conf -``` - -6. Run the script from the build or ${TOPDIR} directory. This step describes - System Device Tree (SDT) with and without pl overlays. Configruations are same - for both SDT with and without pl overlays except for linux dts content. - -> **Note:** -> 1. The -l option will automatically add the necessary parameters to the - local.conf file. If you need to re-run this comment, you just clear the - parameters from the end of the file. Without the -l option the items are - printed to the screen and must be manually added to your conf/local.conf -> 2. The --soc-family argument is an optional argument and user can skip this. -> 3. By default minimal set of multiconfigs are generated by gen-machineconf tool. -> To enable full multiconfig(APU/RPU baremetal or FreeRTOS) then use -> `--multiconfigfull` option. - - a. Without SDT pl overlay: -``` - $ gen-machineconf --hw-description -c -l conf/local.conf -``` - - b. With SDT pl overlay: - To generate SDT pl overlay run gen-machineconf command with - `-g {full|dfx}` option. Once SDT pl overlay command is executed successfully - pl.dtsi will be generated under /dts/${MACHINE}/pl-overlay-{full|dfx} - directory. User can use this pl.dtsi as input to full or dfx static firmware - recipes. - -> **Note:** DFx partial dtsi is not processed by gen-machineconf(lopper) tool, User -> needs to use the *_partial.dtsi and *_partial.pdi/bit from sdtgen output -> artifacts to DFx partial firmware recipes. - - * ZynqMP Full bitstream or Versal Segmented Configuration: -``` - $ gen-machineconf parse-sdt --hw-description -c -l conf/local.conf -g full -``` - - * ZynqMP or Versal DFx: -``` - $ gen-machineconf parse-sdt --hw-description -c -l conf/local.conf -g dfx -``` - -For example, zynqmp: -``` -$ gen-machineconf --soc-family zynqmp --hw-description -c conf/ -l conf/local.conf -``` -The following will be written to the end of the conf/local.conf file: - -``` -# Use the newly generated MACHINE -MACHINE = "xlnx-zynqmp-zcu102-rev1-0" - -# Avoid errors in some baremetal configs as these layers may be present -# but are not used. Note the following lines are optional and can be -# safetly disabled. -SKIP_META_VIRT_SANITY_CHECK = "1" -SKIP_META_SECURITY_SANITY_CHECK = "1" -SKIP_META_TPM_SANITY_CHECK = "1" - -# Each generated multiconfig defines it's own TMPDIR, either edit the -# multiconfig files, or uncomment and adjust MC_TMPDIR_PREFIX below -#MC_TMPDIR_PREFIX = "${TOPDIR}/tmp" -``` - -For example, versal: -``` -$ gen-machineconf --soc-family versal --hw-description -c conf/ -l conf/local.conf -``` - -The following will be written to the end of the conf/local.conf file: - -``` -# Use the newly generated MACHINE -MACHINE = "xlnx-versal-vmk180-rev1-1-x-ebm-01-reva" - -# Avoid errors in some baremetal configs as these layers may be present -# but are not used. Note the following lines are optional and can be -# safetly disabled. -SKIP_META_VIRT_SANITY_CHECK = "1" -SKIP_META_SECURITY_SANITY_CHECK = "1" -SKIP_META_TPM_SANITY_CHECK = "1" - -# Each generated multiconfig defines it's own TMPDIR, either edit the -# multiconfig files, or uncomment and adjust MC_TMPDIR_PREFIX below -#MC_TMPDIR_PREFIX = "${TOPDIR}/tmp" -``` -> **Bitbake Performance Note:** -Each BBMULTICONFIG value requires all of the recipes to be parsed for that -configuration. Thus each multiconfig will add more parsing time. A long list -can lead to a very slow parse (many minutes). To speed up parsing, it is -suggested that you trim this down to only the configurations you require. -A minimum configuration is included with the generated configuration. - - -7. Build your project, You should now be able to build your project normally. - See the Yocto Project documentation if you have questions on how to work with - the multiconfig recipes. The following is a simple build for testing. - -8. Continue [Building Instructions](https://github.com/Xilinx/meta-xilinx/blob/master/README.building.md) - from step 6. +See [SDT Build Instructions](README.sdt.bsp.md) for SDT build workflows. ## Dependencies @@ -163,18 +18,22 @@ This layer depends on: layers: meta-oe branch: scarthgap + URI: https://git.yoctoproject.org/meta-arm + layers: meta-arm, meta-arm-toolchain + branch: scarthgap + URI: https://git.yoctoproject.org/meta-xilinx (official version) - https://github.com/Xilinx/meta-xilinx (development and amd xilinx release) + https://github.com/Xilinx/meta-xilinx (development and AMD release) layers: meta-xilinx-core, meta-xilinx-bsp, meta-xilinx-standalone - branch: scarthgap or amd xilinx release version (e.g. rel-v2024.2) + branch: scarthgap or AMD release version (e.g. rel-v2024.2) URI: https://git.yoctoproject.org/meta-virtualization (official version) - https://github.com/Xilinx/meta-virtualization (development and amd xilinx release) - branch: scarthgap or amd xilinx release version (e.g. rel-v2024.2) + https://github.com/Xilinx/meta-virtualization (development and AMD release) + branch: scarthgap or AMD release version (e.g. rel-v2024.2) URI: https://github.com/OpenAMP/meta-openamp (official version) - https://github.com/Xilinx/meta-openamp (development and amd xilinx release) - branch: scarthgap or amd xilinx release version (e.g. rel-v2024.2) + https://github.com/Xilinx/meta-openamp (development and AMD release) + branch: scarthgap or AMD release version (e.g. rel-v2024.2) diff --git a/meta-xilinx-standalone-sdt/README.sdt.bsp.md b/meta-xilinx-standalone-sdt/README.sdt.bsp.md index 2b2ce4b03..db9bac0a3 100644 --- a/meta-xilinx-standalone-sdt/README.sdt.bsp.md +++ b/meta-xilinx-standalone-sdt/README.sdt.bsp.md @@ -1,46 +1,163 @@ -# SDT BSP +# AMD SDT BSP Machines files -This section describes the SDT BSP settings which must be added to the generated -machine configuration file, following [Build Instructions](README.md) step 4, in -order to use the runqemu command. +This section describes the SDT BSP machine files generation. -## SDT BSP settings +## SDT Build Instructions -The following board settings need to be added in sdt machine configuration file -to define which QEMU device trees should be used. +The Yocto Project setup for the System Device Tree (SDT) workflow is as follows. +Be sure to read everything below. -> **Variable usage examples:** +> **Pre-requisites:** +> * Follow [System Device Tree Instructions](https://github.com/Xilinx/system-device-tree-xlnx/blob/master/README.md) +> to generate the SDT output. +> * To use the SDT version of the embedded software (firmware) as well as system +> configuration, you must build through gen-machineconf tool. This tool is passed +> a output of system device tree directory. +> * meta-xilinx-standalone-sdt layer depends on meta-openamp layer make sure +> meta-openamp is cloned and add using `bitbake-layers` command. + +> **Note:** SDT builds for following devices are not supported in 2024.2 release. +> * MicroBlaze + +1. Follow [Building Instructions](../README.building.md) upto step 6. + +2. Export gen-machineconf tool. +``` +$ export PATH=$PATH:/gen-machine-conf +``` + +3. Run the script from the build or ${TOPDIR} directory. This step describes + System Device Tree (SDT) with and without pl overlays. Configruations are same + for both SDT with and without pl overlays except for linux dts content. + +> **Note:** +> 1. The -c option should point either /conf or /build/conf +> directory. +> 2. The -l option will automatically add the necessary parameters to the + local.conf file. If you need to re-run this comment, you just clear the + parameters from the end of the file. Without the -l option the items are + printed to the screen and must be manually added to your conf/local.conf +> 3. The --soc-family argument is an optional argument and user can skip this. +> 4. By default minimal set of multiconfigs are generated by gen-machineconf tool. +> To enable full multiconfig(APU/RPU baremetal or FreeRTOS) then use +> `--multiconfigfull` option. + +> **Recommended SDT Machine nomenclature:** +> +> 1. Machine Configuration file nomenclature: `--sdt-` +> * Example: `MACHINE = "versal-vek280-sdt-seg"` > -> QEMU Device tree deploy directory: `QEMU_HW_DTB_PATH = "${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch"` -> -> QEMU PMU Device tree: `QEMU_HW_DTB_PMU = "${QEMU_HW_DTB_PATH}/zynqmp-pmu.dtb"` -> -> QEMU PS Device tree: `QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/board-versal-ps-vck190.dtb"` +> 2. BSP Reference design name: +> * `full` - Zynq-7000/ZynqMP full bitstream loading Vivado design. +> * `dfx` - ZynqMP/Versal full bitstream loading Vivado design. +> * `seg` - Versal Segmented Configuration Vivado design. > -> QEMU PMC Board Device tree: `QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb"` +> **Note:** In machine file nomencalutre `--sdt-` +> If design-name suffix is not set or defined then it is treated as flat design +> without dynamic PL configuration. + + a. Without SDT pl overlay: +``` + $ gen-machineconf parse-sdt --hw-description -c -l /build/conf/local.conf --machine-name --sdt- +``` + + b. With SDT pl overlay: + To generate SDT pl overlay run gen-machineconf command with + `-g {full|dfx}` option. Once SDT pl overlay command is executed successfully + pl.dtsi will be generated under /dts/${MACHINE}/pl-overlay-{full|dfx} + directory. User can use this pl.dtsi as input to full or dfx static firmware + recipes. See https://github.com/Xilinx/meta-xilinx/blob/master/docs/README.dfx.user.dts.md + for more details. + +> **Note:** DFx partial dtsi is not processed by gen-machineconf(lopper) tool, User +> needs to use the *_partial.dtsi and *_partial.pdi/bit from sdtgen output +> artifacts to DFx partial firmware recipes. + + * Zynq-700 or ZynqMP Full bitstream or Versal Segmented Configuration: +``` + $ gen-machineconf parse-sdt --hw-description -c -l /build/conf/local.conf --machine-name --sdt- -g full +``` + + * ZynqMP or Versal DFx: +``` + $ gen-machineconf parse-sdt --hw-description -c -l /build/conf/local.conf --machine-name --sdt- -g dfx +``` + +For example, Zynq-7000: +``` +$ gen-machineconf parse-sdt --hw-description -c -l /build/conf/local.conf --machine-name --sdt- +``` +The following will be written to the end of the /build/conf/local.conf file: + +``` +# Use the newly generated MACHINE +MACHINE = "zynq-zc702-sdt" + +# Avoid errors in some baremetal configs as these layers may be present +# but are not used. Note the following lines are optional and can be +# safetly disabled. +SKIP_META_VIRT_SANITY_CHECK = "1" +SKIP_META_SECURITY_SANITY_CHECK = "1" +SKIP_META_TPM_SANITY_CHECK = "1" +``` + +For example, ZynqMP: +``` +$ gen-machineconf parse-sdt --hw-description -c -l /build/conf/local.conf --machine-name --sdt- +``` +The following will be written to the end of the /conf/local.conf file: + +``` +# Use the newly generated MACHINE +MACHINE = "zynqmp-zcu102-sdt" + +# Avoid errors in some baremetal configs as these layers may be present +# but are not used. Note the following lines are optional and can be +# safetly disabled. +SKIP_META_VIRT_SANITY_CHECK = "1" +SKIP_META_SECURITY_SANITY_CHECK = "1" +SKIP_META_TPM_SANITY_CHECK = "1" +``` + +For example, Versal: +``` +$ gen-machineconf parse-sdt --hw-description -c -l /build/conf/local.conf --machine-name --sdt- +``` + +The following will be written to the end of the /conf/local.conf file: + +``` +# Use the newly generated MACHINE +MACHINE = "versal-vmk180-sdt" + +# Avoid errors in some baremetal configs as these layers may be present +# but are not used. Note the following lines are optional and can be +# safetly disabled. +SKIP_META_VIRT_SANITY_CHECK = "1" +SKIP_META_SECURITY_SANITY_CHECK = "1" +SKIP_META_TPM_SANITY_CHECK = "1" +``` + +> **Bitbake Performance Note:** +Each BBMULTICONFIG value requires all of the recipes to be parsed for that +configuration. Thus each multiconfig will add more parsing time. A long list +can lead to a very slow parse (many minutes). To speed up parsing, it is +suggested that you trim this down to only the configurations you require. +A minimum configuration is included with the generated configuration. + +4. Build your project, You should now be able to build your project normally. + See the Yocto Project documentation if you have questions on how to work with + the multiconfig recipes. The following is a simple build for testing. + +5. Continue [Building Instructions](https://github.com/Xilinx/meta-xilinx/blob/master/README.building.md) + from step 8. + +>**Note:** Only AMD eval boards have the dtsi in System Device Tree repo, for custom +> board user has to follow one of the following methods. +> 1. Patch System Device Tree to include the custom board dtsi and include the +> custom board dtsi during sdtgen build step. +> `% sdtgen set_dt_param -board_dts ` > -> QEMU Memory: Some boards for example VEK280 and VH158 memory configurations are -> different, Hence we need to adjust the same in QB_MEM to match board dtsi files. -> Below are some examples. -> * ZynqMP `QB_MEM = "-m 4096"` -> * Versal VEK280 `QB_MEM = "-m 12G"` - - -| Devices | Evaluation Board | QEMU PMC or PMU DTB file | QEMU PS DTB file | QB Mem | -|---------|-------------------------------------------------------------------------------|-----------------------------|-------------------------------|--------| -| ZynqMP | [ZCU102](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | -| | [ZCU104](https://www.xilinx.com/products/boards-and-kits/zcu104.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | -| | [ZCU106](https://www.xilinx.com/products/boards-and-kits/zcu106.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | -| | [ZCU111](https://www.xilinx.com/products/boards-and-kits/zcu111.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | -| | [ZCU208](https://www.xilinx.com/products/boards-and-kits/zcu208.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | -| | [ZCU216](https://www.xilinx.com/products/boards-and-kits/zcu216.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | -| | [ZCU670](https://www.xilinx.com/products/boards-and-kits/zcu670.html) | `zynqmp-pmu.dtb` | `zcu102-arm.dtb` | 4096 | -| Versal | [VCK190](https://www.xilinx.com/products/boards-and-kits/vck190.html) | `board-versal-pmc-virt.dtb` | `board-versal-ps-vck190.dtb` | 8G | -| | [VMK180](https://www.xilinx.com/products/boards-and-kits/vmk180.html) | `board-versal-pmc-virt.dtb` | `board-versal-ps-vmk180.dtb` | 8G | -| | [VPK120](https://www.xilinx.com/products/boards-and-kits/vpk120.html) | `board-versal-pmc-virt.dtb` | `board-versal-ps-vpk120.dtb` | 8G | -| | [VPK180](https://www.xilinx.com/products/boards-and-kits/vpk180.html) | `board-versal-pmc-virt.dtb` | `board-versal-ps-vpk180.dtb` | 8G | -| | [VEK280](https://www.xilinx.com/products/boards-and-kits/vek280.html) | `board-versal-pmc-virt.dtb` | `board-versal-ps-vek280.dtb` | 12G | -| | [VHK158](https://www.xilinx.com/products/boards-and-kits/vhk158.html) | `board-versal-pmc-virt.dtb` | `board-versal-ps-vhk158.dtb` | 32G | - -> **Note:** Additional information on Xilinx architectures can be found at: - https://www.xilinx.com/products/silicon-devices.html +> 2. Create a custom board dtsi file and use EXTRA_DT_INCLUDE_FILES variable to +> include the custom board dtsi to final dtb. Here is the example usage. +> `EXTRA_DT_INCLUDE_FILES:append = " /.dtsi"` diff --git a/meta-xilinx-standalone-sdt/README.sdt.mc.build.md b/meta-xilinx-standalone-sdt/README.sdt.mc.build.md new file mode 100644 index 000000000..33283577b --- /dev/null +++ b/meta-xilinx-standalone-sdt/README.sdt.mc.build.md @@ -0,0 +1,40 @@ +# AMD SDT Multiconfig Build Instructions + +This readme describes how to build multiconfig baremetal baremetal or freertos +applications. Once the applications are built it can be package and deploy baremetal +or freertos application elf or bin files to linux root filesystem under /lib/firmware +directory. + +## How to configure and build multiconfig baremetal or freertos applications + +1. Follow [SDT Building Instructions](README.sdt.bsp.md) upto step 3. + +2. By default minimal set of multiconfigs are generated by gen-machineconf tool. + To build multiconfig(APU/RPU baremetal or FreeRTOS) use `--multiconfigfull` + option to enable full multiconfig(avaiable all APU/RPU cores). +> **Note:** +> 1. To enable multiconfigs for selected APU/PRU cores then use `--meunuconfig` +> options from gen-machineconf tool to generate the Kconfig menu and go to +> `Multiconfig Targets` to make the selection. +> 2. Example usage: +> ``` +> $ gen-machineconf parse-sdt --hw-description -c -l /build/conf/local.conf --machine-name --sdt- --multiconfig --menuconfig +> ``` + +3. Run following command to build multiconfig baremetal baremetal or freertos applications. +> **Note:** See [recipes-applications](./recipes-applications/) directory for +> list of available multiconfig applications. + +* Usage: +``` +$ bitbake mc:--sdt----: +``` +* Example: +``` +$ bitbake mc:versal-vek280-sdt-cortexr5-0-freertos:freertos-hello-world +``` + +4. Follow [Firware Packaging Instructions](../docs/README.fw.package.md) if you + need to package the multiconfig applications to linux rootfs or Follow + [SDT Building Instructions](README.sdt.bsp.md) and continue from step 5 to build + target images. diff --git a/meta-xilinx-standalone-sdt/classes-recipe/esw.bbclass b/meta-xilinx-standalone-sdt/classes-recipe/esw.bbclass index 17d8b159b..76245cf73 100644 --- a/meta-xilinx-standalone-sdt/classes-recipe/esw.bbclass +++ b/meta-xilinx-standalone-sdt/classes-recipe/esw.bbclass @@ -8,8 +8,8 @@ OECMAKE_ARGS:remove = "-DCMAKE_EXPORT_COMPILE_COMMANDS:BOOL=ON" SRCREV_FORMAT = "src_decouple" -S = "${UNPACKDIR}/git" -B = "${UNPACKDIR}/build" +S = "${WORKDIR}/git" +B = "${WORKDIR}/build" OECMAKE_SOURCEPATH = "${S}/${ESW_COMPONENT_SRC}" LICFILENAME = "license.txt" @@ -70,7 +70,7 @@ XLNX_CMAKE_SYSTEM_NAME ?= "Generic" XLNX_CMAKE_BSP_VARS ?= "" cmake_do_generate_toolchain_file:append() { - cat >> ${UNPACKDIR}/toolchain.cmake <> ${WORKDIR}/toolchain.cmake < ${WORKDIR}/${PN}.bif << EOF + the_ROM_image: + { + [bootloader,destination_cpu=a53-0] ${B}/${ESW_EXECUTABLE_NAME}.elf + } +EOF + + bootgen -image ${WORKDIR}/${PN}.bif -arch ${SOC_FAMILY} -w -o ${B}/${PN}.bin + + printf "* ${PN}\nSRCREV: ${SRCREV}\nBRANCH: ${BRANCH}\n\n" > ${S}/${PN}.manifest +} + +do_install[noexec] = "1" + +do_deploy() { + install -Dm 0644 ${B}/${ESW_EXECUTABLE_NAME}.elf ${DEPLOYDIR}/${PN}.elf + ln -sf ${PN}.elf ${DEPLOYDIR}/${PN}-${MACHINE}.elf + install -Dm 0644 ${B}/${PN}.bin ${DEPLOYDIR}/${PN}.bin + ln -sf ${PN}.bin ${DEPLOYDIR}/${PN}-${MACHINE}.bin + + install -Dm 0644 ${S}/${PN}.manifest ${DEPLOYDIR}/${PN}-${MACHINE}.manifest +} + +addtask deploy before do_build after do_install diff --git a/meta-xilinx-standalone-sdt/recipes-bsp/sdt-artifacts/sdt-artifacts.bb b/meta-xilinx-standalone-sdt/recipes-bsp/sdt-artifacts/sdt-artifacts.bb new file mode 100644 index 000000000..9c45c3eff --- /dev/null +++ b/meta-xilinx-standalone-sdt/recipes-bsp/sdt-artifacts/sdt-artifacts.bb @@ -0,0 +1,81 @@ +SUMMARY = "Recipe to download SDT artifacts and extract to directory" +LICENSE = "MIT" +LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302" + +PROVIDES = "virtual/sdt" + +INHIBIT_DEFAULT_DEPS = "1" + +inherit deploy image-artifact-names + +# The user is expected to define SDT_URI, and SDT_URI[sha256sum]. Optionally +# they may also define SDT_URI[S] to define the unpacking path. +SDT_URI[doc] = "URI for the System Device Tree file(s), usually a tarball bundle of files" + +# Add compatibility with previous gen-machine-conf output +SYSTEM_DTFILE_DIR ??= "" + +SDT_URI ??= "${@'file://${SYSTEM_DTFILE_DIR}' if d.getVar('SYSTEM_DTFILE_DIR') else ''}" + +SRC_URI = "${SDT_URI}" +SRC_URI[sha256sum] = "${@d.getVarFlag('SDT_URI', 'sha256sum') or 'undefined'}" + +COMPATIBLE_HOST:xilinx-standalone = "${HOST_SYS}" +PACKAGE_ARCH ?= "${MACHINE_ARCH}" + +# Don't set S = "${WORKDIR}/git" as we need this to work for other protocols +S = "${@d.getVarFlag('SDT_URI', 'S') or '${WORKDIR}'}" + +do_configure[noexec] = "1" +do_compile[noexec] = "1" + +python () { + if not d.getVar('SDT_URI'): + raise bb.parse.SkipRecipe("SDT_URI must be specified. See recipe for instructions.") +} + +do_install() { + install -d ${D}${datadir}/sdt/${MACHINE} + if [ "${S}" = "${WORKDIR}" ]; then + # If we just copying everything, then we'll copy build components. + # This fallback is for the case where the user provides each of the + # files instead of a tarball. It shouldn't be used, but is here just + # in case. + for files in ${S}/* ; do + if [ -f $files ]; then + cp --preserve=mode,timestamps $files ${D}${datadir}/sdt/${MACHINE}/. + fi + done + else + cp --preserve=mode,timestamps -R ${S}/* ${D}${datadir}/sdt/${MACHINE}/. + fi +} + +# Artifacts has plm.elf, psm.elf or other aie elf hence we need to strip and skip +# the packages. +INSANE_SKIP += "arch" +INHIBIT_SYSROOT_STRIP = "1" +INHIBIT_PACKAGE_STRIP = "1" +INHIBIT_PACKAGE_DEBUG_SPLIT = "1" + +FILES:${PN} = "${datadir}/sdt/${MACHINE}" + +do_deploy() { + install -d ${DEPLOYDIR}/system-dt${IMAGE_VERSION_SUFFIX} + if [ "${S}" = "${WORKDIR}" ]; then + # If we just copying everything, then we'll copy build components. + # This fallback is for the case where the user provides each of the + # files instead of a tarball. It shouldn't be used, but is here just + # in case. + for files in ${S}/* ; do + if [ -f $files ]; then + cp --preserve=mode,timestamps $files ${DEPLOYDIR}/system-dt${IMAGE_VERSION_SUFFIX}/. + fi + done + else + cp --preserve=mode,timestamps -R ${S}/* ${DEPLOYDIR}/system-dt${IMAGE_VERSION_SUFFIX}/. + fi + ln -s system-dt${IMAGE_VERSION_SUFFIX} ${DEPLOYDIR}/system-dt +} + +addtask deploy after do_install before do_build diff --git a/meta-xilinx-standalone-sdt/recipes-drivers/aiefal_2024.2.bb b/meta-xilinx-standalone-sdt/recipes-drivers/aiefal_2024.2.bb new file mode 100644 index 000000000..7d7b76ac8 --- /dev/null +++ b/meta-xilinx-standalone-sdt/recipes-drivers/aiefal_2024.2.bb @@ -0,0 +1,35 @@ +inherit cmake ccmake + +COMPATIBLE_HOST = "aarch64-xilinx-elf" + +require ../../meta-xilinx-core/recipes-bsp/ai-engine/aie-rt-2024.2.inc + +S = "${WORKDIR}/git" +B = "${WORKDIR}/build" + +EXTRA_OECMAKE += "-DYOCTO=ON" +DEPENDS += "xilstandalone xiltimer aienginev2" + +ESW_COMPONENT_SRC = "/fal/src/" + +OECMAKE_SOURCEPATH = "${S}/${ESW_COMPONENT_SRC}" +XLNX_CMAKE_SYSTEM_NAME ?= "Generic" +XLNX_CMAKE_BSP_VARS ?= "" + +cmake_do_generate_toolchain_file:append() { + cat >> ${WORKDIR}/toolchain.cmake <> ${WORKDIR}/toolchain.cmake < libxil.mri + for each in ${REQUIRED_MACHINE_FEATURES}; do + each=$(echo $each | sed 's/-/_/g') + if [ -e lib$each.a ]; then + echo addlib lib$each.a >> libxil.mri + fi + done + echo “save” >> libxil.mri + echo “end” >> libxil.mri + ${AR} -M +Date: Wed, 7 Dec 2022 15:42:15 -0800 +Subject: [PATCH] versal_fw: Fixup core makefiles + +The Yocto Project build environment needs to be able to override a few +additional variables that may not be appropriate to do on the regular +command line build version. This patch preserves the default while +allowing it to be overriden as necessary. + +Signed-off-by: Mark Hatle +--- + lib/sw_apps/versal_plm/misc/versal/Makefile | 6 ++++-- + lib/sw_apps/versal_plm/misc/versal_net/Makefile | 6 ++++-- + lib/sw_apps/versal_psmfw/misc/Makefile | 6 ++++-- + 3 files changed, 12 insertions(+), 6 deletions(-) + +diff --git a/lib/sw_apps/versal_plm/misc/versal/Makefile b/lib/sw_apps/versal_plm/misc/versal/Makefile +index d735f64530..dbd363447d 100644 +--- a/lib/sw_apps/versal_plm/misc/versal/Makefile ++++ b/lib/sw_apps/versal_plm/misc/versal/Makefile +@@ -2,6 +2,8 @@ + COMPILER := mb-gcc + ARCHIVER := mb-gcc-ar + ASSEMBLER := mb-as ++COMPILER_FLAGS := -O2 -c -mcpu=v10.0 -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare ++EXTRA_COMPILER_FLAGS := -g -ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects + DRIVER_LIB_VERSION = 1.0 + PROCESSOR = psv_pmc_0 + LIBRARIES = ${PROCESSOR}/lib/libxil.a +@@ -50,11 +52,11 @@ $(PROCESSOR)/lib/libxil.a: $(PROCESSOR)/lib/libxil_init.a + + %/make.include: $(if $(wildcard $(PROCESSOR)/lib/libxil_init.a),$(PROCESSOR)/lib/libxil.a,) + @echo "Running Make include in $(subst /make.include,,$@)" +- $(MAKE) -C $(subst /make.include,,$@) -s include "SHELL=$(SHELL)" "COMPILER=$(COMPILER)" "ASSEMBLER=$(ASSEMBLER)" "ARCHIVER=$(ARCHIVER)" "COMPILER_FLAGS= -O2 -c -mcpu=v10.0 -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects" ++ $(MAKE) -C $(subst /make.include,,$@) -s include "SHELL=$(SHELL)" "COMPILER=$(COMPILER)" "ASSEMBLER=$(ASSEMBLER)" "ARCHIVER=$(ARCHIVER)" "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" + + %/make.libs: include + @echo "Running Make libs in $(subst /make.libs,,$@)" +- $(MAKE) -C $(subst /make.libs,,$@) -s libs "SHELL=$(SHELL)" "COMPILER=$(COMPILER)" "ASSEMBLER=$(ASSEMBLER)" "ARCHIVER=$(ARCHIVER)" "COMPILER_FLAGS= -O2 -c -mcpu=v10.0 -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects" ++ $(MAKE) -C $(subst /make.libs,,$@) -s libs "SHELL=$(SHELL)" "COMPILER=$(COMPILER)" "ASSEMBLER=$(ASSEMBLER)" "ARCHIVER=$(ARCHIVER)" "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" + + %/make.clean: + $(MAKE) -C $(subst /make.clean,,$@) -s clean +diff --git a/lib/sw_apps/versal_plm/misc/versal_net/Makefile b/lib/sw_apps/versal_plm/misc/versal_net/Makefile +index 284e2fa5fc..be1df32525 100644 +--- a/lib/sw_apps/versal_plm/misc/versal_net/Makefile ++++ b/lib/sw_apps/versal_plm/misc/versal_net/Makefile +@@ -8,6 +8,8 @@ + COMPILER := mb-gcc + ARCHIVER := mb-gcc-ar + ASSEMBLER := mb-as ++COMPILER_FLAGS := -O2 -c -mcpu=v10.0 -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare ++EXTRA_COMPILER_FLAGS := -g -ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects + DRIVER_LIB_VERSION = 1.0 + PROCESSOR = psx_pmc_0 + LIBRARIES = ${PROCESSOR}/lib/libxil.a +@@ -58,11 +60,11 @@ $(PROCESSOR)/lib/libxil.a: $(PROCESSOR)/lib/libxil_init.a + + %/make.include: $(if $(wildcard $(PROCESSOR)/lib/libxil_init.a),$(PROCESSOR)/lib/libxil.a,) + @echo "Running Make include in $(subst /make.include,,$@)" +- $(MAKE) -C $(subst /make.include,,$@) -s include "SHELL=$(SHELL)" "COMPILER=$(COMPILER)" "ASSEMBLER=$(ASSEMBLER)" "ARCHIVER=$(ARCHIVER)" "COMPILER_FLAGS= -O2 -c -mcpu=v11.0 -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects" ++ $(MAKE) -C $(subst /make.include,,$@) -s include "SHELL=$(SHELL)" "COMPILER=$(COMPILER)" "ASSEMBLER=$(ASSEMBLER)" "ARCHIVER=$(ARCHIVER)" "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" + + %/make.libs: include + @echo "Running Make libs in $(subst /make.libs,,$@)" +- $(MAKE) -C $(subst /make.libs,,$@) -s libs "SHELL=$(SHELL)" "COMPILER=$(COMPILER)" "ASSEMBLER=$(ASSEMBLER)" "ARCHIVER=$(ARCHIVER)" "COMPILER_FLAGS= -O2 -c -mcpu=v11.0 -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects" ++ $(MAKE) -C $(subst /make.libs,,$@) -s libs "SHELL=$(SHELL)" "COMPILER=$(COMPILER)" "ASSEMBLER=$(ASSEMBLER)" "ARCHIVER=$(ARCHIVER)" "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" + + %/make.clean: + $(MAKE) -C $(subst /make.clean,,$@) -s clean +diff --git a/lib/sw_apps/versal_psmfw/misc/Makefile b/lib/sw_apps/versal_psmfw/misc/Makefile +index 92d95d0896..acc20bcccf 100644 +--- a/lib/sw_apps/versal_psmfw/misc/Makefile ++++ b/lib/sw_apps/versal_psmfw/misc/Makefile +@@ -11,6 +11,8 @@ PAR_SUBDIRS := $(patsubst %/Makefile, %, $(BSP_PARALLEL_MAKEFILES)) + COMPILER := mb-gcc + ARCHIVER := mb-ar + ASSEMBLER := mb-as ++COMPILER_FLAGS := -O2 -c -mcpu=v10.0 -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare ++EXTRA_COMPILER_FLAGS := -g -ffunction-sections -fdata-sections -Wall -Wextra + + ifneq (,$(findstring win,$(RDI_PLATFORM))) + SHELL = CMD +@@ -41,11 +43,11 @@ $(PROCESSOR)/lib/libxil.a: $(PROCESSOR)/lib/libxil_init.a + + %/make.include: $(if $(wildcard $(PROCESSOR)/lib/libxil_init.a),$(PROCESSOR)/lib/libxil.a,) + @echo "Running Make include in $(subst /make.include,,$@)" +- $(MAKE) -C $(subst /make.include,,$@) -s include "SHELL=$(SHELL)" "COMPILER=$(COMPILER)" "ASSEMBLER=$(ASSEMBLER)" "ARCHIVER=$(ARCHIVER)" "COMPILER_FLAGS= -O2 -c -mcpu=v10.0 -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra" ++ $(MAKE) -C $(subst /make.include,,$@) -s include "SHELL=$(SHELL)" "COMPILER=$(COMPILER)" "ASSEMBLER=$(ASSEMBLER)" "ARCHIVER=$(ARCHIVER)" "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" + + %/make.libs: include + @echo "Running Make libs in $(subst /make.libs,,$@)" +- $(MAKE) -C $(subst /make.libs,,$@) -s libs "SHELL=$(SHELL)" "COMPILER=$(COMPILER)" "ASSEMBLER=$(ASSEMBLER)" "ARCHIVER=$(ARCHIVER)" "COMPILER_FLAGS= -O2 -c -mcpu=v10.0 -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare" "EXTRA_COMPILER_FLAGS=-g -ffunction-sections -fdata-sections -Wall -Wextra" ++ $(MAKE) -C $(subst /make.libs,,$@) -s libs "SHELL=$(SHELL)" "COMPILER=$(COMPILER)" "ASSEMBLER=$(ASSEMBLER)" "ARCHIVER=$(ARCHIVER)" "COMPILER_FLAGS=$(COMPILER_FLAGS)" "EXTRA_COMPILER_FLAGS=$(EXTRA_COMPILER_FLAGS)" + + %/make.clean: + $(MAKE) -C $(subst /make.clean,,$@) -s clean +-- +2.34.1 + diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/embeddedsw/2024.2+git/makefile-skip-copy_bsp.sh.patch b/meta-xilinx-standalone/recipes-bsp/embeddedsw/embeddedsw/2024.2+git/makefile-skip-copy_bsp.sh.patch new file mode 100644 index 000000000..4ce521cd5 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/embeddedsw/2024.2+git/makefile-skip-copy_bsp.sh.patch @@ -0,0 +1,99 @@ +From d703670357546d9aab66baea1f6751ba1cbdf7ad Mon Sep 17 00:00:00 2001 +From: Mark Hatle +Date: Wed, 7 Dec 2022 15:30:23 -0800 +Subject: [PATCH] Prevent makefile from calling copy_bsp.sh + +If we call copy_bsp.sh we will undo any manual compliation steps we +have already done. Avoid this. + +YP integration specific + +Signed-off-by: Mark Hatle +--- + lib/sw_apps/versal_plm/src/versal/Makefile | 4 ++-- + lib/sw_apps/versal_plm/src/versal_net/Makefile | 4 ++-- + lib/sw_apps/versal_psmfw/src/versal/Makefile | 4 ++-- + lib/sw_apps/versal_psmfw/src/versal_net/Makefile | 6 +++--- + lib/sw_apps/zynqmp_pmufw/src/Makefile | 4 ++-- + 5 files changed, 11 insertions(+), 11 deletions(-) + +Index: git/lib/sw_apps/versal_plm/src/versal/Makefile +=================================================================== +--- git.orig/lib/sw_apps/versal_plm/src/versal/Makefile ++++ git/lib/sw_apps/versal_plm/src/versal/Makefile +@@ -35,8 +35,8 @@ $(EXEC): $(LIBS) $(OBJS) $(INCLUDES) + $(OBJS): $(LIBS) + + $(LIBS): +- echo "Copying BSP files" +- ../../misc/versal/copy_bsp.sh ++ #echo "Copying BSP files" ++ #../../misc/versal/copy_bsp.sh + echo "Compiling bsp" + $(MAKE) -C ../../misc/versal/versal_plm_bsp + +Index: git/lib/sw_apps/versal_plm/src/versal_net/Makefile +=================================================================== +--- git.orig/lib/sw_apps/versal_plm/src/versal_net/Makefile ++++ git/lib/sw_apps/versal_plm/src/versal_net/Makefile +@@ -35,8 +35,8 @@ $(EXEC): $(LIBS) $(OBJS) $(INCLUDES) + $(OBJS): $(LIBS) + + $(LIBS): +- echo "Copying BSP files" +- ../../misc/versal_net/copy_bsp.sh ++ #echo "Copying BSP files" ++ #../../misc/versal_net/copy_bsp.sh + echo "Compiling bsp" + $(MAKE) -C ../../misc/versal_net/versal_plm_bsp + +Index: git/lib/sw_apps/versal_psmfw/src/versal/Makefile +=================================================================== +--- git.orig/lib/sw_apps/versal_psmfw/src/versal/Makefile ++++ git/lib/sw_apps/versal_psmfw/src/versal/Makefile +@@ -37,8 +37,8 @@ $(EXEC): $(LIBS) $(OBJS) $(INCLUDES) + $(OBJS): $(LIBS) + + $(LIBS): +- echo "Copying BSP files" +- ../../misc/copy_bsp.sh ++ #echo "Copying BSP files" ++ #../../misc/copy_bsp.sh + echo "Compiling bsp" + $(MAKE) -C ../../misc/versal_psmfw_bsp + +Index: git/lib/sw_apps/versal_psmfw/src/versal_net/Makefile +=================================================================== +--- git.orig/lib/sw_apps/versal_psmfw/src/versal_net/Makefile ++++ git/lib/sw_apps/versal_psmfw/src/versal_net/Makefile +@@ -37,8 +37,8 @@ $(EXEC): $(LIBS) $(OBJS) $(INCLUDES) + $(OBJS): $(LIBS) + + $(LIBS): +- echo "Copying BSP files" +- ../../misc/versal_net/copy_bsp.sh ++ #echo "Copying BSP files" ++ #../../misc/versal_net/copy_bsp.sh + echo "Compiling bsp" + $(MAKE) -C ../../misc/versal_net/versal_psmfw_bsp + +@@ -47,4 +47,3 @@ $(LIBS): + + clean: + rm -rf $(OBJS) $(LIBS) $(EXEC) *.o *.d ../common/*.o ../common/*.d +- rm -rf ../../misc/versal_net/versal_psmfw_bsp +Index: git/lib/sw_apps/zynqmp_pmufw/src/Makefile +=================================================================== +--- git.orig/lib/sw_apps/zynqmp_pmufw/src/Makefile ++++ git/lib/sw_apps/zynqmp_pmufw/src/Makefile +@@ -30,8 +30,8 @@ $(EXEC): $(LIBS) $(OBJS) $(INCLUDES) + $(OBJS): $(LIBS) + + $(LIBS): +- echo "Copying BSP files" +- ../misc/copy_bsp.sh ++ #echo "Copying BSP files" ++ #../misc/copy_bsp.sh + echo "Compiling bsp" + $(MAKE) -C ../misc/zynqmp_pmufw_bsp + diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware.inc b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware.inc index 5b2e123f6..6c5816708 100644 --- a/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware.inc +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware.inc @@ -9,7 +9,7 @@ COMPATIBLE_MACHINE:zynqmp = ".*" PACKAGE_ARCH = "${MACHINE_ARCH}" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" # This is the default in most BSPs. A MACHINE.conf can override this! FSBL_IMAGE_NAME ??= "fsbl-${MACHINE}" diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2024.2+git-generic.inc b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2024.2+git-generic.inc new file mode 100644 index 000000000..7a0a35da5 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2024.2+git-generic.inc @@ -0,0 +1,10 @@ +SKIP_MSG = "" +SKIP_MSG:zynq = "Generic support for zynq is not available" +SKIP_RECIPE[fsbl-firmware] = "${SKIP_MSG}" + +FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/${PV}:${FILE_DIRNAME}/embeddedsw" + +SRC_URI += " \ + file://makefile-skip-copy_bsp.sh.patch \ + file://fsbl-fixups.patch \ + " diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2024.2.bb new file mode 100644 index 000000000..3c57ee8cd --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2024.2.bb @@ -0,0 +1,3 @@ +require fsbl-firmware.inc +require ${@'fsbl-firmware_generic.inc' if d.getVar('XILINX_WITH_ESW') == 'generic' else ''} +require ${@'fsbl-firmware_${PV}-generic.inc' if d.getVar('XILINX_WITH_ESW') == 'generic' else ''} diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/imgrcry-meta-xilinx-standalone.inc b/meta-xilinx-standalone/recipes-bsp/embeddedsw/imgrcry-meta-xilinx-standalone.inc new file mode 100644 index 000000000..9ea520377 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/imgrcry-meta-xilinx-standalone.inc @@ -0,0 +1,19 @@ +# Default imgrcry configuration, using fsbl multiconfig +IMGRCRY_DEPENDS ?= "" +IMGRCRY_MCDEPENDS ?= "mc::${MACHINE}-cortexa53-fsbl:image-recovery:do_deploy" +IMGRCRY_DEPLOY_DIR ?= "${TOPDIR}/tmp-${MACHINE}-cortexa53-fsbl/deploy/images/${MACHINE}/" +IMGRCRY_IMAGE_NAME ?= "image-recovery-${MACHINE}" + +def check_imgrcry_variables(d): + # If both are blank, the user MUST pass in the path to the firmware! + if not d.getVar('IMGRCRY_DEPENDS') and not d.getVar('IMGRCRY_MCDEPENDS'): + # Don't cache this, as the items on disk can change! + d.setVar('BB_DONT_CACHE', '1') + + if not os.path.exists(d.getVar('IMGRCRY_FILE') + ".bin"): + raise bb.parse.SkipRecipe("Could not open image recovery file: %s.bin" % d.getVar('IMGRCRY_FILE')) + else: + # We found the file, so be sure to track it + d.setVar('SRC_URI', 'file://${IMGRCRY_FILE}.bin') + d.setVarFlag('do_install', 'file-checksums', '${IMGRCRY_FILE}.bin:True') + d.setVarFlag('do_deploy', 'file-checksums', '${IMGRCRY_FILE}.bin:True') diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/imgrcry.bbappend b/meta-xilinx-standalone/recipes-bsp/embeddedsw/imgrcry.bbappend new file mode 100644 index 000000000..62bd70d75 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/imgrcry.bbappend @@ -0,0 +1 @@ +require ${@'imgrcry-meta-xilinx-standalone.inc' if d.getVar('XILINX_WITH_ESW') == 'sdt' else ''} diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/imgsel-meta-xilinx-standalone.inc b/meta-xilinx-standalone/recipes-bsp/embeddedsw/imgsel-meta-xilinx-standalone.inc new file mode 100644 index 000000000..fdc252d16 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/imgsel-meta-xilinx-standalone.inc @@ -0,0 +1,19 @@ +# Default imgsel configuration, using fsbl multiconfig +IMGSEL_DEPENDS ?= "" +IMGSEL_MCDEPENDS ?= "mc::${MACHINE}-cortexa53-fsbl:image-selector:do_deploy" +IMGSEL_DEPLOY_DIR ?= "${TOPDIR}/tmp-${MACHINE}-cortexa53-fsbl/deploy/images/${MACHINE}/" +IMGSEL_IMAGE_NAME ?= "image-selector-${MACHINE}" + +def check_imgsel_variables(d): + # If both are blank, the user MUST pass in the path to the firmware! + if not d.getVar('IMGSEL_DEPENDS') and not d.getVar('IMGSEL_MCDEPENDS'): + # Don't cache this, as the items on disk can change! + d.setVar('BB_DONT_CACHE', '1') + + if not os.path.exists(d.getVar('IMGSEL_FILE') + ".bin"): + raise bb.parse.SkipRecipe("Could not open image selector file: %s.bin" % d.getVar('IMGSEL_FILE')) + else: + # We found the file, so be sure to track it + d.setVar('SRC_URI', 'file://${IMGSEL_FILE}.bin') + d.setVarFlag('do_install', 'file-checksums', '${IMGSEL_FILE}.bin:True') + d.setVarFlag('do_deploy', 'file-checksums', '${IMGSEL_FILE}.bin:True') diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/imgsel.bbappend b/meta-xilinx-standalone/recipes-bsp/embeddedsw/imgsel.bbappend new file mode 100644 index 000000000..540a39638 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/imgsel.bbappend @@ -0,0 +1 @@ +require ${@'imgsel-meta-xilinx-standalone.inc' if d.getVar('XILINX_WITH_ESW') == 'sdt' else ''} diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware.inc b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware.inc index 2a00afacb..99451c3be 100644 --- a/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware.inc +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware.inc @@ -10,7 +10,7 @@ COMPATIBLE_MACHINE:versal-net = ".*" PACKAGE_ARCH = "${MACHINE_ARCH}" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" # This is the default in most BSPs. A MACHINE.conf can override this! PLM_IMAGE_NAME ??= "plm-${MACHINE}" diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2024.2+git-generic.inc b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2024.2+git-generic.inc new file mode 100644 index 000000000..7416dfb53 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2024.2+git-generic.inc @@ -0,0 +1,27 @@ +# Separate build directories for versal and versal-net +SOC_DIR = "versal" +SOC_DIR:versal-net = "versal_net" +B = "${S}/lib/sw_apps/versal_plm/src/${SOC_DIR}" + +BSP_DIR ?= "${B}/../../misc/versal_plm_bsp" + +FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/${PV}:${FILE_DIRNAME}/embeddedsw" + +SRC_URI += " \ + file://makefile-skip-copy_bsp.sh.patch \ + file://0001-versal_fw-Fixup-core-makefiles.patch \ + " + +EXTRA_COMPILER_FLAGS = "-g -ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects" + +do_configure() { + # manually do the copy_bsp step first, so as to be able to fix up use of + # mb-* commands + ${B}/../../misc/${SOC_DIR}/copy_bsp.sh +} + +do_compile() { + oe_runmake + + ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin +} diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2024.2.bb new file mode 100644 index 000000000..d945aa26d --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2024.2.bb @@ -0,0 +1,3 @@ +require plm-firmware.inc +require ${@'plm-firmware_generic.inc' if d.getVar('XILINX_WITH_ESW') == 'generic' else ''} +require ${@'plm-firmware_${PV}-generic.inc' if d.getVar('XILINX_WITH_ESW') == 'generic' else ''} diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware.inc b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware.inc index e821c05d3..d371da4db 100644 --- a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware.inc +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware.inc @@ -8,7 +8,7 @@ COMPATIBLE_MACHINE:zynqmp = ".*" PACKAGE_ARCH = "${MACHINE_ARCH}" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" # This is the default in most BSPs. A MACHINE.conf can override this! PMU_FIRMWARE_IMAGE_NAME ??= "pmu-firmware-${MACHINE}" diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2+git-generic.inc b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2+git-generic.inc new file mode 100644 index 000000000..935f6e32b --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2+git-generic.inc @@ -0,0 +1,8 @@ +FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/${PV}:${FILE_DIRNAME}/embeddedsw" + +SRC_URI += " \ + file://makefile-skip-copy_bsp.sh.patch \ + file://0001-zynqmp_pmufw-Fixup-core-makefiles.patch \ + " + +EXTRA_COMPILER_FLAGS = "-ffunction-sections -fdata-sections -Wall -Wextra ${ESW_CFLAGS}" diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2.bb new file mode 100644 index 000000000..3ec0c10f7 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2024.2.bb @@ -0,0 +1,3 @@ +require pmu-firmware.inc +require ${@'pmu-firmware_generic.inc' if d.getVar('XILINX_WITH_ESW') == 'generic' else ''} +require ${@'pmu-firmware_${PV}-generic.inc' if d.getVar('XILINX_WITH_ESW') == 'generic' else ''} diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware.inc b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware.inc index 2bdb17eda..6c3782706 100644 --- a/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware.inc +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware.inc @@ -10,7 +10,7 @@ COMPATIBLE_MACHINE:versal-net = ".*" PACKAGE_ARCH = "${MACHINE_ARCH}" -S = "${UNPACKDIR}/git" +S = "${WORKDIR}/git" # This is the default in most BSPs. A MACHINE.conf can override this! PSM_FIRMWARE_IMAGE_NAME ??= "psm-firmware-${MACHINE}" diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2024.2+git-generic.inc b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2024.2+git-generic.inc new file mode 100644 index 000000000..7ba3707e2 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2024.2+git-generic.inc @@ -0,0 +1,32 @@ +# Separate build directories for versal and versal-net +SOC_DIR = "versal" +SOC_DIR:versal-net = "versal_net" +B = "${S}/lib/sw_apps/versal_psmfw/src/${SOC_DIR}" + +BSP_DIR ?= "${B}/../../misc/versal_psmfw_bsp" + +FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/${PV}:${FILE_DIRNAME}/embeddedsw" + +SRC_URI += " \ + file://makefile-skip-copy_bsp.sh.patch \ + file://0001-versal_fw-Fixup-core-makefiles.patch \ + " + +EXTRA_COMPILER_FLAGS = "-g -ffunction-sections -fdata-sections -Wall -Wextra" + +# Override default since we're in a subdirectory deeper now... +do_configure() { + # manually do the copy_bsp step first, so as to be able to fix up use of + # mb-* commands + if [ ${SOC_DIR} != "versal" ]; then + ${B}/../../misc/${SOC_DIR}/copy_bsp.sh + else + ${B}/../../misc/copy_bsp.sh + fi +} + +do_compile() { + oe_runmake + + ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin +} diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2024.2.bb new file mode 100644 index 000000000..ffa0a5967 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2024.2.bb @@ -0,0 +1,3 @@ +require psm-firmware.inc +require ${@'psm-firmware_generic.inc' if d.getVar('XILINX_WITH_ESW') == 'generic' else ''} +require ${@'psm-firmware_${PV}-generic.inc' if d.getVar('XILINX_WITH_ESW') == 'generic' else ''} diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeccf/libdfeccf_2023.1.bb b/meta-xilinx-standalone/recipes-bsp/libdfeccf/libdfeccf_2023.1.bb new file mode 100644 index 000000000..04415f5ed --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeccf/libdfeccf_2023.1.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeccf library" +SECTION = "libdfeccf" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeccf" + +DFECCF_SUBDIR = "XilinxProcessorIPLib/drivers/dfeccf/src" + +do_compile:prepend() { + cd ${S}/${DFECCF_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFECCF_SUBDIR} + oe_libinstall -so libdfeccf ${D}${libdir} + install -m 0644 xdfeccf_hw.h ${D}${includedir}/xdfeccf_hw.h + install -m 0644 xdfeccf.h ${D}${includedir}/xdfeccf.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeccf/libdfeccf_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/libdfeccf/libdfeccf_2023.2.bb new file mode 100644 index 000000000..04415f5ed --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeccf/libdfeccf_2023.2.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeccf library" +SECTION = "libdfeccf" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeccf" + +DFECCF_SUBDIR = "XilinxProcessorIPLib/drivers/dfeccf/src" + +do_compile:prepend() { + cd ${S}/${DFECCF_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFECCF_SUBDIR} + oe_libinstall -so libdfeccf ${D}${libdir} + install -m 0644 xdfeccf_hw.h ${D}${includedir}/xdfeccf_hw.h + install -m 0644 xdfeccf.h ${D}${includedir}/xdfeccf.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeccf/libdfeccf_2024.1.bb b/meta-xilinx-standalone/recipes-bsp/libdfeccf/libdfeccf_2024.1.bb new file mode 100644 index 000000000..04415f5ed --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeccf/libdfeccf_2024.1.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeccf library" +SECTION = "libdfeccf" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeccf" + +DFECCF_SUBDIR = "XilinxProcessorIPLib/drivers/dfeccf/src" + +do_compile:prepend() { + cd ${S}/${DFECCF_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFECCF_SUBDIR} + oe_libinstall -so libdfeccf ${D}${libdir} + install -m 0644 xdfeccf_hw.h ${D}${includedir}/xdfeccf_hw.h + install -m 0644 xdfeccf.h ${D}${includedir}/xdfeccf.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeccf/libdfeccf_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/libdfeccf/libdfeccf_2024.2.bb new file mode 100644 index 000000000..04415f5ed --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeccf/libdfeccf_2024.2.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeccf library" +SECTION = "libdfeccf" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeccf" + +DFECCF_SUBDIR = "XilinxProcessorIPLib/drivers/dfeccf/src" + +do_compile:prepend() { + cd ${S}/${DFECCF_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFECCF_SUBDIR} + oe_libinstall -so libdfeccf ${D}${libdir} + install -m 0644 xdfeccf_hw.h ${D}${includedir}/xdfeccf_hw.h + install -m 0644 xdfeccf.h ${D}${includedir}/xdfeccf.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeequ/libdfeequ_2023.1.bb b/meta-xilinx-standalone/recipes-bsp/libdfeequ/libdfeequ_2023.1.bb new file mode 100644 index 000000000..298621faa --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeequ/libdfeequ_2023.1.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeequ library" +SECTION = "libdfeequ" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeequ" + +DFEEQU_SUBDIR = "XilinxProcessorIPLib/drivers/dfeequ/src" + +do_compile:prepend() { + cd ${S}/${DFEEQU_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEEQU_SUBDIR} + oe_libinstall -so libdfeequ ${D}${libdir} + install -m 0644 xdfeequ_hw.h ${D}${includedir}/xdfeequ_hw.h + install -m 0644 xdfeequ.h ${D}${includedir}/xdfeequ.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeequ/libdfeequ_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/libdfeequ/libdfeequ_2023.2.bb new file mode 100644 index 000000000..298621faa --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeequ/libdfeequ_2023.2.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeequ library" +SECTION = "libdfeequ" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeequ" + +DFEEQU_SUBDIR = "XilinxProcessorIPLib/drivers/dfeequ/src" + +do_compile:prepend() { + cd ${S}/${DFEEQU_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEEQU_SUBDIR} + oe_libinstall -so libdfeequ ${D}${libdir} + install -m 0644 xdfeequ_hw.h ${D}${includedir}/xdfeequ_hw.h + install -m 0644 xdfeequ.h ${D}${includedir}/xdfeequ.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeequ/libdfeequ_2024.1.bb b/meta-xilinx-standalone/recipes-bsp/libdfeequ/libdfeequ_2024.1.bb new file mode 100644 index 000000000..298621faa --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeequ/libdfeequ_2024.1.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeequ library" +SECTION = "libdfeequ" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeequ" + +DFEEQU_SUBDIR = "XilinxProcessorIPLib/drivers/dfeequ/src" + +do_compile:prepend() { + cd ${S}/${DFEEQU_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEEQU_SUBDIR} + oe_libinstall -so libdfeequ ${D}${libdir} + install -m 0644 xdfeequ_hw.h ${D}${includedir}/xdfeequ_hw.h + install -m 0644 xdfeequ.h ${D}${includedir}/xdfeequ.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeequ/libdfeequ_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/libdfeequ/libdfeequ_2024.2.bb new file mode 100644 index 000000000..298621faa --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeequ/libdfeequ_2024.2.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeequ library" +SECTION = "libdfeequ" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeequ" + +DFEEQU_SUBDIR = "XilinxProcessorIPLib/drivers/dfeequ/src" + +do_compile:prepend() { + cd ${S}/${DFEEQU_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEEQU_SUBDIR} + oe_libinstall -so libdfeequ ${D}${libdir} + install -m 0644 xdfeequ_hw.h ${D}${includedir}/xdfeequ_hw.h + install -m 0644 xdfeequ.h ${D}${includedir}/xdfeequ.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfemix/libdfemix_2023.1.bb b/meta-xilinx-standalone/recipes-bsp/libdfemix/libdfemix_2023.1.bb new file mode 100644 index 000000000..cac04c140 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfemix/libdfemix_2023.1.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfemix library" +SECTION = "libdfemix" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfemix" + +DFEMIX_SUBDIR = "XilinxProcessorIPLib/drivers/dfemix/src" + +do_compile:prepend() { + cd ${S}/${DFEMIX_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEMIX_SUBDIR} + oe_libinstall -so libdfemix ${D}${libdir} + install -m 0644 xdfemix_hw.h ${D}${includedir}/xdfemix_hw.h + install -m 0644 xdfemix.h ${D}${includedir}/xdfemix.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfemix/libdfemix_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/libdfemix/libdfemix_2023.2.bb new file mode 100644 index 000000000..cac04c140 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfemix/libdfemix_2023.2.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfemix library" +SECTION = "libdfemix" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfemix" + +DFEMIX_SUBDIR = "XilinxProcessorIPLib/drivers/dfemix/src" + +do_compile:prepend() { + cd ${S}/${DFEMIX_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEMIX_SUBDIR} + oe_libinstall -so libdfemix ${D}${libdir} + install -m 0644 xdfemix_hw.h ${D}${includedir}/xdfemix_hw.h + install -m 0644 xdfemix.h ${D}${includedir}/xdfemix.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfemix/libdfemix_2024.1.bb b/meta-xilinx-standalone/recipes-bsp/libdfemix/libdfemix_2024.1.bb new file mode 100644 index 000000000..cac04c140 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfemix/libdfemix_2024.1.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfemix library" +SECTION = "libdfemix" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfemix" + +DFEMIX_SUBDIR = "XilinxProcessorIPLib/drivers/dfemix/src" + +do_compile:prepend() { + cd ${S}/${DFEMIX_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEMIX_SUBDIR} + oe_libinstall -so libdfemix ${D}${libdir} + install -m 0644 xdfemix_hw.h ${D}${includedir}/xdfemix_hw.h + install -m 0644 xdfemix.h ${D}${includedir}/xdfemix.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfemix/libdfemix_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/libdfemix/libdfemix_2024.2.bb new file mode 100644 index 000000000..cac04c140 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfemix/libdfemix_2024.2.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfemix library" +SECTION = "libdfemix" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfemix" + +DFEMIX_SUBDIR = "XilinxProcessorIPLib/drivers/dfemix/src" + +do_compile:prepend() { + cd ${S}/${DFEMIX_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEMIX_SUBDIR} + oe_libinstall -so libdfemix ${D}${libdir} + install -m 0644 xdfemix_hw.h ${D}${includedir}/xdfemix_hw.h + install -m 0644 xdfemix.h ${D}${includedir}/xdfemix.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeofdm/libdfeofdm_2023.1.bb b/meta-xilinx-standalone/recipes-bsp/libdfeofdm/libdfeofdm_2023.1.bb new file mode 100644 index 000000000..e183b8530 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeofdm/libdfeofdm_2023.1.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeofdm library" +SECTION = "libdfeofdm" +LICENSE = "BSD-3-Clause" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeofdm" + +DFEOFDM_SUBDIR = "XilinxProcessorIPLib/drivers/dfeofdm/src" + +do_compile:prepend() { + cd ${S}/${DFEOFDM_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEOFDM_SUBDIR} + oe_libinstall -so libdfeofdm ${D}${libdir} + install -m 0644 xdfeofdm_hw.h ${D}${includedir}/xdfeofdm_hw.h + install -m 0644 xdfeofdm.h ${D}${includedir}/xdfeofdm.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeofdm/libdfeofdm_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/libdfeofdm/libdfeofdm_2023.2.bb new file mode 100644 index 000000000..e183b8530 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeofdm/libdfeofdm_2023.2.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeofdm library" +SECTION = "libdfeofdm" +LICENSE = "BSD-3-Clause" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeofdm" + +DFEOFDM_SUBDIR = "XilinxProcessorIPLib/drivers/dfeofdm/src" + +do_compile:prepend() { + cd ${S}/${DFEOFDM_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEOFDM_SUBDIR} + oe_libinstall -so libdfeofdm ${D}${libdir} + install -m 0644 xdfeofdm_hw.h ${D}${includedir}/xdfeofdm_hw.h + install -m 0644 xdfeofdm.h ${D}${includedir}/xdfeofdm.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeofdm/libdfeofdm_2024.1.bb b/meta-xilinx-standalone/recipes-bsp/libdfeofdm/libdfeofdm_2024.1.bb new file mode 100644 index 000000000..e183b8530 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeofdm/libdfeofdm_2024.1.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeofdm library" +SECTION = "libdfeofdm" +LICENSE = "BSD-3-Clause" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeofdm" + +DFEOFDM_SUBDIR = "XilinxProcessorIPLib/drivers/dfeofdm/src" + +do_compile:prepend() { + cd ${S}/${DFEOFDM_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEOFDM_SUBDIR} + oe_libinstall -so libdfeofdm ${D}${libdir} + install -m 0644 xdfeofdm_hw.h ${D}${includedir}/xdfeofdm_hw.h + install -m 0644 xdfeofdm.h ${D}${includedir}/xdfeofdm.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeofdm/libdfeofdm_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/libdfeofdm/libdfeofdm_2024.2.bb new file mode 100644 index 000000000..e183b8530 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeofdm/libdfeofdm_2024.2.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeofdm library" +SECTION = "libdfeofdm" +LICENSE = "BSD-3-Clause" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeofdm" + +DFEOFDM_SUBDIR = "XilinxProcessorIPLib/drivers/dfeofdm/src" + +do_compile:prepend() { + cd ${S}/${DFEOFDM_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEOFDM_SUBDIR} + oe_libinstall -so libdfeofdm ${D}${libdir} + install -m 0644 xdfeofdm_hw.h ${D}${includedir}/xdfeofdm_hw.h + install -m 0644 xdfeofdm.h ${D}${includedir}/xdfeofdm.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeprach/libdfeprach_2023.1.bb b/meta-xilinx-standalone/recipes-bsp/libdfeprach/libdfeprach_2023.1.bb new file mode 100644 index 000000000..570dc6f16 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeprach/libdfeprach_2023.1.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeprach library" +SECTION = "libdfeprach" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeprach" + +DFEMIX_SUBDIR = "XilinxProcessorIPLib/drivers/dfeprach/src" + +do_compile:prepend() { + cd ${S}/${DFEMIX_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEMIX_SUBDIR} + oe_libinstall -so libdfeprach ${D}${libdir} + install -m 0644 xdfeprach_hw.h ${D}${includedir}/xdfeprach_hw.h + install -m 0644 xdfeprach.h ${D}${includedir}/xdfeprach.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeprach/libdfeprach_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/libdfeprach/libdfeprach_2023.2.bb new file mode 100644 index 000000000..570dc6f16 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeprach/libdfeprach_2023.2.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeprach library" +SECTION = "libdfeprach" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeprach" + +DFEMIX_SUBDIR = "XilinxProcessorIPLib/drivers/dfeprach/src" + +do_compile:prepend() { + cd ${S}/${DFEMIX_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEMIX_SUBDIR} + oe_libinstall -so libdfeprach ${D}${libdir} + install -m 0644 xdfeprach_hw.h ${D}${includedir}/xdfeprach_hw.h + install -m 0644 xdfeprach.h ${D}${includedir}/xdfeprach.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeprach/libdfeprach_2024.1.bb b/meta-xilinx-standalone/recipes-bsp/libdfeprach/libdfeprach_2024.1.bb new file mode 100644 index 000000000..570dc6f16 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeprach/libdfeprach_2024.1.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeprach library" +SECTION = "libdfeprach" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeprach" + +DFEMIX_SUBDIR = "XilinxProcessorIPLib/drivers/dfeprach/src" + +do_compile:prepend() { + cd ${S}/${DFEMIX_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEMIX_SUBDIR} + oe_libinstall -so libdfeprach ${D}${libdir} + install -m 0644 xdfeprach_hw.h ${D}${includedir}/xdfeprach_hw.h + install -m 0644 xdfeprach.h ${D}${includedir}/xdfeprach.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/libdfeprach/libdfeprach_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/libdfeprach/libdfeprach_2024.2.bb new file mode 100644 index 000000000..570dc6f16 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/libdfeprach/libdfeprach_2024.2.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux dfeprach library" +SECTION = "libdfeprach" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "libdfeprach" + +DFEMIX_SUBDIR = "XilinxProcessorIPLib/drivers/dfeprach/src" + +do_compile:prepend() { + cd ${S}/${DFEMIX_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${DFEMIX_SUBDIR} + oe_libinstall -so libdfeprach ${D}${libdir} + install -m 0644 xdfeprach_hw.h ${D}${includedir}/xdfeprach_hw.h + install -m 0644 xdfeprach.h ${D}${includedir}/xdfeprach.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/librfclk/librfclk_2023.1.bb b/meta-xilinx-standalone/recipes-bsp/librfclk/librfclk_2023.1.bb new file mode 100644 index 000000000..04ae540d8 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/librfclk/librfclk_2023.1.bb @@ -0,0 +1,35 @@ +SUMMARY = "Linux rfclk library" +SECTION = "librfclk" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +PROVIDES = "librfclk" + +RFCLK_SUBDIR = "XilinxProcessorIPLib/drivers/board_common/src/rfclk/src" + +do_compile:prepend() { + cd ${S}/${RFCLK_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${RFCLK_SUBDIR} + oe_libinstall -so librfclk ${D}${libdir} + install -m 0644 xrfclk.h ${D}${includedir}/xrfclk.h + install -m 0644 xrfclk_LMK_conf.h ${D}${includedir}/xrfclk_LMK_conf.h + install -m 0644 xrfclk_LMX_conf.h ${D}${includedir}/xrfclk_LMX_conf.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/librfclk/librfclk_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/librfclk/librfclk_2023.2.bb new file mode 100644 index 000000000..04ae540d8 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/librfclk/librfclk_2023.2.bb @@ -0,0 +1,35 @@ +SUMMARY = "Linux rfclk library" +SECTION = "librfclk" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +PROVIDES = "librfclk" + +RFCLK_SUBDIR = "XilinxProcessorIPLib/drivers/board_common/src/rfclk/src" + +do_compile:prepend() { + cd ${S}/${RFCLK_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${RFCLK_SUBDIR} + oe_libinstall -so librfclk ${D}${libdir} + install -m 0644 xrfclk.h ${D}${includedir}/xrfclk.h + install -m 0644 xrfclk_LMK_conf.h ${D}${includedir}/xrfclk_LMK_conf.h + install -m 0644 xrfclk_LMX_conf.h ${D}${includedir}/xrfclk_LMX_conf.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/librfclk/librfclk_2024.1.bb b/meta-xilinx-standalone/recipes-bsp/librfclk/librfclk_2024.1.bb new file mode 100644 index 000000000..04ae540d8 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/librfclk/librfclk_2024.1.bb @@ -0,0 +1,35 @@ +SUMMARY = "Linux rfclk library" +SECTION = "librfclk" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +PROVIDES = "librfclk" + +RFCLK_SUBDIR = "XilinxProcessorIPLib/drivers/board_common/src/rfclk/src" + +do_compile:prepend() { + cd ${S}/${RFCLK_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${RFCLK_SUBDIR} + oe_libinstall -so librfclk ${D}${libdir} + install -m 0644 xrfclk.h ${D}${includedir}/xrfclk.h + install -m 0644 xrfclk_LMK_conf.h ${D}${includedir}/xrfclk_LMK_conf.h + install -m 0644 xrfclk_LMX_conf.h ${D}${includedir}/xrfclk_LMX_conf.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/librfclk/librfclk_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/librfclk/librfclk_2024.2.bb new file mode 100644 index 000000000..04ae540d8 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/librfclk/librfclk_2024.2.bb @@ -0,0 +1,35 @@ +SUMMARY = "Linux rfclk library" +SECTION = "librfclk" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +PROVIDES = "librfclk" + +RFCLK_SUBDIR = "XilinxProcessorIPLib/drivers/board_common/src/rfclk/src" + +do_compile:prepend() { + cd ${S}/${RFCLK_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${RFCLK_SUBDIR} + oe_libinstall -so librfclk ${D}${libdir} + install -m 0644 xrfclk.h ${D}${includedir}/xrfclk.h + install -m 0644 xrfclk_LMK_conf.h ${D}${includedir}/xrfclk_LMK_conf.h + install -m 0644 xrfclk_LMX_conf.h ${D}${includedir}/xrfclk_LMX_conf.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/librfdc/librfdc_2023.1.bb b/meta-xilinx-standalone/recipes-bsp/librfdc/librfdc_2023.1.bb new file mode 100644 index 000000000..35cd2a1a3 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/librfdc/librfdc_2023.1.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux rfdc library" +SECTION = "librfdc" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "librfdc" + +RFDC_SUBDIR = "XilinxProcessorIPLib/drivers/rfdc/src" + +do_compile:prepend() { + cd ${S}/${RFDC_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${RFDC_SUBDIR} + oe_libinstall -so librfdc ${D}${libdir} + install -m 0644 xrfdc_hw.h ${D}${includedir}/xrfdc_hw.h + install -m 0644 xrfdc.h ${D}${includedir}/xrfdc.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/librfdc/librfdc_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/librfdc/librfdc_2023.2.bb new file mode 100644 index 000000000..35cd2a1a3 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/librfdc/librfdc_2023.2.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux rfdc library" +SECTION = "librfdc" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "librfdc" + +RFDC_SUBDIR = "XilinxProcessorIPLib/drivers/rfdc/src" + +do_compile:prepend() { + cd ${S}/${RFDC_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${RFDC_SUBDIR} + oe_libinstall -so librfdc ${D}${libdir} + install -m 0644 xrfdc_hw.h ${D}${includedir}/xrfdc_hw.h + install -m 0644 xrfdc.h ${D}${includedir}/xrfdc.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/librfdc/librfdc_2024.1.bb b/meta-xilinx-standalone/recipes-bsp/librfdc/librfdc_2024.1.bb new file mode 100644 index 000000000..35cd2a1a3 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/librfdc/librfdc_2024.1.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux rfdc library" +SECTION = "librfdc" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "librfdc" + +RFDC_SUBDIR = "XilinxProcessorIPLib/drivers/rfdc/src" + +do_compile:prepend() { + cd ${S}/${RFDC_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${RFDC_SUBDIR} + oe_libinstall -so librfdc ${D}${libdir} + install -m 0644 xrfdc_hw.h ${D}${includedir}/xrfdc_hw.h + install -m 0644 xrfdc.h ${D}${includedir}/xrfdc.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-bsp/librfdc/librfdc_2024.2.bb b/meta-xilinx-standalone/recipes-bsp/librfdc/librfdc_2024.2.bb new file mode 100644 index 000000000..35cd2a1a3 --- /dev/null +++ b/meta-xilinx-standalone/recipes-bsp/librfdc/librfdc_2024.2.bb @@ -0,0 +1,37 @@ +SUMMARY = "Linux rfdc library" +SECTION = "librfdc" +LICENSE = "BSD" + +inherit pkgconfig xlnx-embeddedsw features_check + +REQUIRED_MACHINE_FEATURES = "rfsoc" + +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +S = "${WORKDIR}/git" + +PACKAGE_ARCH = "${MACHINE_ARCH}" + +DEPENDS = "libmetal" + +PROVIDES = "librfdc" + +RFDC_SUBDIR = "XilinxProcessorIPLib/drivers/rfdc/src" + +do_compile:prepend() { + cd ${S}/${RFDC_SUBDIR} + cp Makefile.Linux Makefile +} + +do_install() { + install -d ${D}${libdir} + install -d ${D}${includedir} + + cd ${S}/${RFDC_SUBDIR} + oe_libinstall -so librfdc ${D}${libdir} + install -m 0644 xrfdc_hw.h ${D}${includedir}/xrfdc_hw.h + install -m 0644 xrfdc.h ${D}${includedir}/xrfdc.h +} + +FILES:${PN} = "${libdir}/*.so.*" +FILES:${PN}-dev = "${libdir}/*.so ${includedir}/*" diff --git a/meta-xilinx-standalone/recipes-devtools/gcc/gcc-runtime_%.bbappend b/meta-xilinx-standalone/recipes-devtools/gcc/gcc-runtime_%.bbappend index d9c4ad183..282d22c8f 100644 --- a/meta-xilinx-standalone/recipes-devtools/gcc/gcc-runtime_%.bbappend +++ b/meta-xilinx-standalone/recipes-devtools/gcc/gcc-runtime_%.bbappend @@ -9,6 +9,7 @@ EXTRA_OECONF:append:class-target:xilinx-standalone = " \ --enable-plugins \ --with-gnu-as \ --disable-libitm \ + --disable-tm-clone-registry \ " EXTRA_OECONF:append:aarch64:class-target:xilinx-standalone = " \ @@ -28,7 +29,6 @@ EXTRA_OECONF:append:armv8r:class-target:xilinx-standalone = " \ EXTRA_OECONF:append:microblaze:class-target:xilinx-standalone = " \ --without-long-double-128 \ - --disable-tm-clone-registry \ " # Changes local to gcc-runtime... diff --git a/meta-xilinx-standalone/recipes-devtools/gcc/gcc-xilinx-standalone.inc b/meta-xilinx-standalone/recipes-devtools/gcc/gcc-xilinx-standalone.inc index 956bb4191..173d47f74 100644 --- a/meta-xilinx-standalone/recipes-devtools/gcc/gcc-xilinx-standalone.inc +++ b/meta-xilinx-standalone/recipes-devtools/gcc/gcc-xilinx-standalone.inc @@ -5,6 +5,7 @@ EXTRA_OECONF:append:xilinx-standalone = " \ --enable-plugins \ --with-gnu-as \ --disable-libitm \ + --disable-tm-clone-registry \ " EXTRA_OECONF:append:aarch64:xilinx-standalone = " \ @@ -24,5 +25,4 @@ EXTRA_OECONF:append:armv8r:xilinx-standalone = " \ EXTRA_OECONF:append:microblaze:xilinx-standalone = " \ --without-long-double-128 \ - --disable-tm-clone-registry \ " diff --git a/meta-xilinx-standalone/recipes-devtools/gcc/libgcc_%.bbappend b/meta-xilinx-standalone/recipes-devtools/gcc/libgcc_%.bbappend index be68197e3..fe295243a 100644 --- a/meta-xilinx-standalone/recipes-devtools/gcc/libgcc_%.bbappend +++ b/meta-xilinx-standalone/recipes-devtools/gcc/libgcc_%.bbappend @@ -2,7 +2,7 @@ require gcc-configure-xilinx-standalone.inc COMPATIBLE_HOST:xilinx-standalone = "${HOST_SYS}" -EXTRA_OECONF:append:xilinx-standalone:microblaze:class-target = " \ +EXTRA_OECONF:append:xilinx-standalone:class-target = " \ --disable-tm-clone-registry \ " diff --git a/meta-xilinx-vendor/README.md b/meta-xilinx-vendor/README.md index 1903df177..b6b82d629 100644 --- a/meta-xilinx-vendor/README.md +++ b/meta-xilinx-vendor/README.md @@ -1,7 +1,7 @@ # meta-xilinx-vendor -This layer enables third party vendor boards for AMD Xilinx MicroBlaze, Zynq, -ZynqMP and Versal devices and provides related metadata. +This layer enables third party vendor boards for AMD MicroBlaze, Zynq, ZynqMP and +Versal devices and provides related metadata. ## Supported Boards/Machines @@ -9,11 +9,8 @@ ZynqMP and Versal devices and provides related metadata. > **Variable usage examples:** > -> Machine Configuration file: `MACHINE = "ultra96-zynqmp"` +> Machine Configuration file: `MACHINE = "microzed-zynq7"` > -> Reference XSA: `HDF_MACHINE = "ultra96-zynqmp"` -> -> HW Board Device tree: `YAML_DT_BOARD_FLAGS = "{BOARD avnet-ultra96-rev1}"` | Devices | Vendor Evaluation Board | Machine Configuration file | Reference XSA | HW Board Device tree | QEMU tested | HW tested | |------------|-------------------------------------------------------------------------------------------------------------------|--------------------------------------------------------------|------------------|----------------------|-------------|-----------| @@ -24,29 +21,36 @@ ZynqMP and Versal devices and provides related metadata. | | [Avnet/Digilent ZedBoard](https://www.xilinx.com/products/boards-and-kits/1-8dyf-11.html) | [zedboard-zynq7](conf/machine/zedboard-zynq7.conf) | NA | NA | No | No | | | [Digilent Zybo](https://www.xilinx.com/support/university/boards-portfolio/xup-boards/DigilentZYBO.html) | [zybo-zynq7](conf/machine/zybo-zynq7.conf) | NA | `zynq-zybo.dtb` | No | No | | | [Digilent Zybo Linux BD](https://www.xilinx.com/support/university/boards-portfolio/xup-boards/DigilentZYBO.html) | [zybo-linux-bd-zynq7](conf/machine/zybo-linux-bd-zynq7.conf) | NA | NA | No | No | -| ZynqMP | [Avent Ultra96 v1](https://www.xilinx.com/products/boards-and-kits/1-vad4rl.html) | [ultra96-zynqmp](conf/machine/ultra96-zynqmp.conf) | `ultra96-zynqmp` | `avnet-ultra96-rev1` | Yes | Yes | | Versal | NA | NA | NA | NA | NA | NA | > **Note:** ``` 1. For Zybo Linux BD reference design refer meta-xilinx-contrib layer. -2. Ultra96 Machine configuration file is unsupported and is compatible with v1 board only. Refer to meta-avnet for v2 board. +2. Ultra96 v1 is no longer supported. Refer to https://github.com/Avnet/meta-avnet for v2 board. ``` +## AMD Vendor board XSCT Build Instructions + +Follow [XSCT Build Instructions](https://github.com/Xilinx/meta-xilinx-tools/blob/master/README.xsct.bsp.md) + ## Dependencies This layer depends on: URI: https://git.yoctoproject.org/poky layers: meta, meta-poky - branch: langdale + branch: scarthgap URI: https://git.openembedded.org/meta-openembedded layers: meta-oe - branch: langdale + branch: scarthgap + + URI: https://git.yoctoproject.org/meta-arm + layers: meta-arm, meta-arm-toolchain + branch: scarthgap URI: https://git.yoctoproject.org/meta-xilinx (official version) - https://github.com/Xilinx/meta-xilinx (development and amd xilinx release) + https://github.com/Xilinx/meta-xilinx (development and AMD release) layers: meta-xilinx-microblaze, meta-xilinx-core - branch: langdale or amd xilinx release version (e.g. rel-v2023.1) + branch: scarthgap or AMD release version (e.g. rel-v2024.2) diff --git a/meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf b/meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf deleted file mode 100644 index d0b95cac8..000000000 --- a/meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf +++ /dev/null @@ -1,80 +0,0 @@ -#@TYPE: Machine -#@NAME: ultra96-zynqmp -#@DESCRIPTION: Machine support for Ultra96 Evaluation Board. - -#### Preamble -MACHINEOVERRIDES =. "${@['', 'ultra96-zynqmp:']['ultra96-zynqmp' !='${MACHINE}']}" -#### Regular settings follow - -# Variables that changes based on hw design or board specific requirement must be -# defined before calling the required inclusion file else pre-expansion value -# defined in zynqmp-generic.conf will be set. - -# Yocto device-tree variables -YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "psu_uart_1" -YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "PSU_DDR_0" -YAML_DT_BOARD_FLAGS ?= "{BOARD avnet-ultra96-rev1}" - -# Yocto arm-trusted-firmware(TF-A) variables -ATF_CONSOLE ?= "cadence1" -TFA_BL33_LOAD ?= "0x8000000" - -# Yocto PMUFW variables -YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware ?= "psu_uart_1" -YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware ?= "psu_uart_1" - -# Yocto FSBL variables -YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware ?= "psu_uart_1" -YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "psu_uart_1" - -# Yocto KERNEL Variables -UBOOT_ENTRYPOINT ?= "0x200000" -UBOOT_LOADADDRESS ?= "0x200000" - -# ultra96-zynqmp Serial Console -# In Ultra96 uart1 is the primary uart device but DTG set the serial0 alias -# to uart1, hence we are using ttyPS0 for Ultra96. -SERIAL_CONSOLES ?= "115200;ttyPS1 115200;ttyPS0" -YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200" - -# Required generic machine inclusion -# Ultra96 board uses ZynqMP EG device hence use soc variant based generic machine -# inclusion -require conf/machine/zynqmp-eg-generic.conf - -# This eval board machine conf file uses ultra96-zynqmp xsa as reference input. -# User can override with ultra96 custom xsa using HDF_BASE and HDF_PATH variables -# from local.conf. -HDF_MACHINE = "ultra96-zynqmp" - -# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match -# the xsa. User can enable explicitly if required from local.conf. -# KERNEL_DEVICETREE = "xilinx/zynqmp-zcu100-revC.dtb" - -# Ultra96 has 2GB memory only but default zynqmp-generic has QB_MEM set to 4G, -# Hence set QB_MEM to 2GB. -QB_MEM = "-m 2G" - -# Ultra96 board uses ultra96-arm.dtb as QEMU HW PS DTB. -QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/ultra96-arm.dtb" - -# Both psu_uart_0 and psu_uart_1 are defined, but 1 is the primary uart. -# -# hw ps7_uart_0 (0xFF000000) - linux serial1 (ttyPS1) -# hw ps7_uart_1 (0xFF010000) - linux serial0 (ttyPS0) -# ? dcc / axi_uart16550_0 ? - linux serial2 -QB_XILINX_SERIAL = "-serial null -serial mon:stdio" - -# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match -# the xsa. User can enable explicitly if required from local.conf. -# KERNEL_DEVICETREE = "xilinx/zynqmp-zcu100-revC.dtb" - -# Enable bluetooth and wifi module -MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \ - linux-firmware-wl18xx \ - linux-firmware-ti-bt-wl180x \ - " - -#### No additional settings should be after the Postamble -#### Postamble -PACKAGE_EXTRA_ARCHS:append = "${@['', ' ultra96_zynqmp']['ultra96-zynqmp' != '${MACHINE}']}" diff --git a/meta-xilinx-vendor/dynamic-layers/meta-xilinx-tools/recipes-bsp/embeddedsw/pmu-firmware_%.bbappend b/meta-xilinx-vendor/dynamic-layers/meta-xilinx-tools/recipes-bsp/embeddedsw/pmu-firmware_%.bbappend deleted file mode 100644 index f2c2c09f1..000000000 --- a/meta-xilinx-vendor/dynamic-layers/meta-xilinx-tools/recipes-bsp/embeddedsw/pmu-firmware_%.bbappend +++ /dev/null @@ -1,8 +0,0 @@ -# Ultra96 Compiler Flags -ULTRA96_VERSION ?= "1" -YAML_COMPILER_FLAGS:append:ultra96-zynqmp = " \ - -DBOARD_SHUTDOWN_PIN=2 \ - -DBOARD_SHUTDOWN_PIN_STATE=0 \ - -DENABLE_MOD_ULTRA96 \ - ${@bb.utils.contains('ULTRA96_VERSION', '2', ' -DULTRA96_VERSION=2 ', ' -DULTRA96_VERSION=1 ', d)} \ - " diff --git a/meta-xilinx-vendor/recipes-core/init-ifupdown/files/interfaces b/meta-xilinx-vendor/recipes-core/init-ifupdown/files/interfaces deleted file mode 100644 index 8daba016f..000000000 --- a/meta-xilinx-vendor/recipes-core/init-ifupdown/files/interfaces +++ /dev/null @@ -1,32 +0,0 @@ -# /etc/network/interfaces -- configuration file for ifup(8), ifdown(8) - -# The loopback interface -auto lo -iface lo inet loopback - -# Wireless interfaces -auto wlan0 -iface wlan0 inet dhcp - wireless_mode managed - wireless_essid any - wpa-driver wext - wpa-conf /etc/wpa_supplicant.conf - -iface atml0 inet dhcp - -# Wired or wireless interfaces -auto eth0 -iface eth0 inet dhcp -iface eth1 inet dhcp - -# Ethernet/RNDIS gadget (g_ether) -# ... or on host side, usbnet and random hwaddr -iface usb0 inet static - address 192.168.7.2 - netmask 255.255.255.0 - network 192.168.7.0 - gateway 192.168.7.1 - -# Bluetooth networking -iface bnep0 inet dhcp - diff --git a/meta-xilinx-vendor/recipes-core/init-ifupdown/init-ifupdown_%.bbappend b/meta-xilinx-vendor/recipes-core/init-ifupdown/init-ifupdown_%.bbappend deleted file mode 100644 index 2638026cf..000000000 --- a/meta-xilinx-vendor/recipes-core/init-ifupdown/init-ifupdown_%.bbappend +++ /dev/null @@ -1 +0,0 @@ -FILESEXTRAPATHS:prepend:ultra96 := "${THISDIR}/files:" diff --git a/meta-xilinx-virtualization/README.build.xen.md b/meta-xilinx-virtualization/README.build.xen.md new file mode 100644 index 000000000..2176f8db6 --- /dev/null +++ b/meta-xilinx-virtualization/README.build.xen.md @@ -0,0 +1,120 @@ +# Xen Build Instructions + +The Yocto Project setup for AMD Xen configurations workflow is as follows. Be sure +to read everything below. + +1. Follow [Building Instructions](../README.building.md) upto step 4. + +2. Clone the meta-security repository. +``` +$ cd ../sources +$ git clone -b https://git.yoctoproject.org/meta-security +$ cd - +``` + +3. Add xilinx-virtualization, security and tpm layer to bblayers.conf as shown below. +``` +$ bitbake-layers add-layer .//meta-security +$ bitbake-layers add-layer .//meta-security/meta-tpm +$ bitbake-layers add-layer .//meta-xilinx/meta-xilinx-virtualization +``` + +4. The following variables needs to be added to the end of the conf/local.conf file. +``` +# Xen variables +BOOTMODE = "xen" +ENABLE_XEN_UBOOT_SCR = "1" +ENABLE_XEN_DTSI = "1" +ENABLE_XEN_QEMU_DTSI = "1" + +# Default Xen Serial Console is serial0, if you are using serial1 then set as show below. +XEN_SERIAL_CONSOLES = "serial1" + +# Variables for Xen JTAG or SD INITRD boot modes but this is not required for SD WIC image. +IMAGE_FSTYPES += "cpio.gz" +RAMDISK_IMAGE = "rootfs.cpio.gz" + +# Variables for Xen SD WIC image boot flow. +IMAGE_FSTYPES += "wic" +WKS_FILES = "xilinx-default-sd.wks" + +DISTRO_FEATURES:append = " multiarch security tpm virtualization vmsep xen" + +IMAGE_FEATURES += "ssh-server-openssh" + +DISTRO_FEATURES:append = " systemd" +VIRTUAL-RUNTIME_init_manager = "systemd" +DISTRO_FEATURES_BACKFILL_CONSIDERED = "sysvinit" + +IMAGE_INSTALL:append = " \ + kernel-module-xen-blkback \ + kernel-module-xen-gntalloc \ + kernel-module-xen-gntdev \ + kernel-module-xen-netback \ + kernel-module-xen-wdt \ + xen \ + xen-tools \ + xen-tools-xenstat \ + ${@bb.utils.contains('DISTRO_FEATURES', 'vmsep', 'qemu-aarch64 qemu-keymaps', 'qemu', d)} \ + " +``` + +5. Continue [Building Instructions](../README.building.md) from step 5. + +## Xen Boot Instructions + +> **Note:** +> * This README provides instructions for Xen Dom0 only. + +1. Follow [Booting Instructions](../README.booting.md) upto step 2. + +2. Verify Xen Dom0 is up and running on QEMU or target as shown below. + +``` +Poky (Yocto Project Reference Distro) 4.1.4 zynqmp-generic hvc0 + +zynqmp-generic login: root +root@zynqmp-generic:~# xl list +Name ID Mem VCPUs State Time(s) +Domain-0 0 1500 1 r----- 123.5 +root@zynqmp-generic:~# xl info +host : zynqmp-generic +release : 6.1.0-xilinx-v2024.1 +version : #1 SMP Thu Dec 21 07:00:11 UTC 2023 +machine : aarch64 +nr_cpus : 4 +max_cpu_id : 3 +nr_nodes : 1 +cores_per_socket : 1 +threads_per_core : 1 +cpu_mhz : 99.990 +hw_caps : 00000000:00000000:00000000:00000000:00000000:00000000:00000000:00000000 +virt_caps : hvm hvm_directio hap iommu_hap_pt_share vpmu gnttab-v1 +total_memory : 4095 +free_memory : 2529 +sharing_freed_memory : 0 +sharing_used_memory : 0 +outstanding_claims : 0 +free_cpus : 0 +xen_major : 4 +xen_minor : 17 +xen_extra : .0 +xen_version : 4.17.0 +xen_caps : xen-3.0-aarch64 xen-3.0-armv7l +xen_scheduler : credit2 +xen_pagesize : 4096 +platform_params : virt_start=0x200000 +xen_changeset : Tue Dec 12 10:08:40 2023 +0100 git:38eebc6e5c-dirty +xen_commandline : console=dtuart dtuart=serial0 dom0_mem=1500M dom0_max_vcpus=1 bootscrub=0 vwfi=native +cc_compiler : aarch64-poky-linux-gcc (GCC) 12.2.0 +cc_compile_by : santraju +cc_compile_domain : +cc_compile_date : 2023-12-12 +build_id : 5e2952e1dd06c52a2a09ada7476333c48d88a285 +xend_config_format : 4 +root@zynqmp-generic:~# +``` + +## References + +* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842530/Xen+Hypervisor diff --git a/meta-xilinx-virtualization/README.md b/meta-xilinx-virtualization/README.md index 5b66ea387..ad019fee5 100644 --- a/meta-xilinx-virtualization/README.md +++ b/meta-xilinx-virtualization/README.md @@ -1,128 +1,10 @@ -# meta-xilinx-vendor +# meta-xilinx-virtualization -This layer enables AMD Xilinx Xen configurations and features for ZynqMP and +This layer enables AMD Xen configurations and features for ZynqMP and Versal devices and also provides related metadata. -## Xen Build Instructions - -The Yocto Project setup for AMD Xilinx Xen configurations workflow is as follows. -Be sure to read everything below. - -1. Follow [Building Instructions](../README.building.md) upto step 2. - -2. Clone the meta-security repository. - -``` -$ git clone -b https://git.yoctoproject.org/meta-security -``` - -3. Continue [Building Instructions](../README.building.md) from step 4. - -> **Note:** -> * For System Device Tree(SDT) workflow see [SDT Building Instructions](../meta-xilinx-standalone-experimental/README.md) - -4. Add meta-xilinx-virtualization layer to bblayers.conf as shown below. - -``` -$ bitbake-layers add-layer .//meta-xilinx/meta-xilinx-virtualization -``` - -5. The following variables needs to be added to the end of the conf/local.conf file. - -``` -# Xen variables -BOOTMODE = "xen" -ENABLE_XEN_UBOOT_SCR = "1" -ENABLE_XEN_DTSI = "1" -ENABLE_XEN_QEMU_DTSI = "1" - -# Default Xen Serial Console is serial0, if you are using serial1 then set as show below. -XEN_SERIAL_CONSOLES = "serial1" - -# Variables for Xen JTAG or SD INITRD boot modes but this is not required for SD WIC image. -IMAGE_FSTYPES += "cpio.gz" -RAMDISK_IMAGE = "rootfs.cpio.gz" - -# Variables for Xen SD WIC image boot flow. -IMAGE_FSTYPES += "wic" -WKS_FILES = "xilinx-default-sd.wks" - -DISTRO_FEATURES:append = " multiarch security tpm virtualization vmsep xen" - -IMAGE_FEATURES += "ssh-server-openssh" - -DISTRO_FEATURES:append = " systemd" -VIRTUAL-RUNTIME_init_manager = "systemd" -DISTRO_FEATURES_BACKFILL_CONSIDERED = "sysvinit" - -IMAGE_INSTALL:append = " \ - kernel-module-xen-blkback \ - kernel-module-xen-gntalloc \ - kernel-module-xen-gntdev \ - kernel-module-xen-netback \ - kernel-module-xen-wdt \ - xen \ - xen-tools \ - xen-tools-xenstat \ - ${@bb.utils.contains('DISTRO_FEATURES', 'vmsep', 'qemu-aarch64 qemu-keymaps', 'qemu', d)} \ - " -``` - -6. Continue [Building Instructions](../README.building.md) from step 5. - -## Xen Boot Instructions - -> **Note:** -> * This README provides instructions for Xen Dom0 only. - -1. Follow [Booting Instructions](../README.booting.md) upto step 2. - -2. Verify Xen Dom0 is up and running on QEMU or target as shown below. - -``` -Poky (Yocto Project Reference Distro) 4.1.4 zynqmp-generic hvc0 - -zynqmp-generic login: root -root@zynqmp-generic:~# xl list -Name ID Mem VCPUs State Time(s) -Domain-0 0 1500 1 r----- 123.5 -root@zynqmp-generic:~# xl info -host : zynqmp-generic -release : 6.1.0-xilinx-v2024.1 -version : #1 SMP Thu Dec 21 07:00:11 UTC 2023 -machine : aarch64 -nr_cpus : 4 -max_cpu_id : 3 -nr_nodes : 1 -cores_per_socket : 1 -threads_per_core : 1 -cpu_mhz : 99.990 -hw_caps : 00000000:00000000:00000000:00000000:00000000:00000000:00000000:00000000 -virt_caps : hvm hvm_directio hap iommu_hap_pt_share vpmu gnttab-v1 -total_memory : 4095 -free_memory : 2529 -sharing_freed_memory : 0 -sharing_used_memory : 0 -outstanding_claims : 0 -free_cpus : 0 -xen_major : 4 -xen_minor : 17 -xen_extra : .0 -xen_version : 4.17.0 -xen_caps : xen-3.0-aarch64 xen-3.0-armv7l -xen_scheduler : credit2 -xen_pagesize : 4096 -platform_params : virt_start=0x200000 -xen_changeset : Tue Dec 12 10:08:40 2023 +0100 git:38eebc6e5c-dirty -xen_commandline : console=dtuart dtuart=serial0 dom0_mem=1500M dom0_max_vcpus=1 bootscrub=0 vwfi=native -cc_compiler : aarch64-poky-linux-gcc (GCC) 12.2.0 -cc_compile_by : santraju -cc_compile_domain : -cc_compile_date : 2023-12-12 -build_id : 5e2952e1dd06c52a2a09ada7476333c48d88a285 -xend_config_format : 4 -root@zynqmp-generic:~# -``` +See [Xen Build Instructions](README.build.xen.md) to configure and build xen +images. ## Dependencies @@ -130,25 +12,25 @@ This layer depends on: URI: https://git.yoctoproject.org/poky layers: meta, meta-poky - branch: langdale + branch: scarthgap URI: https://git.openembedded.org/meta-openembedded layers: meta-oe, meta-python, meta-filesystems, meta-networking. - branch: langdale + branch: scarthgap URI: https://git.yoctoproject.org/meta-xilinx (official version) - https://github.com/Xilinx/meta-xilinx (development and amd xilinx release) + https://github.com/Xilinx/meta-xilinx (development and AMD release) layers: meta-xilinx-core, meta-xilinx-standalone - branch: langdale or amd xilinx release version (e.g. rel-v2024.1) + branch: scarthgap or AMD release version (e.g. rel-v2024.2) URI: https://git.yoctoproject.org/meta-virtualization - branch: langdale + branch: scarthgap URI: https://git.yoctoproject.org/meta-security layers: meta-tpm - branch: langdale - -## References + branch: scarthgap -* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842530/Xen+Hypervisor + URI: https://git.yoctoproject.org/meta-arm + layers: meta-arm, meta-arm-toolchain + branch: scarthgap diff --git a/meta-xilinx-virtualization/conf/layer.conf b/meta-xilinx-virtualization/conf/layer.conf index 29506eabf..1ce8ccfe7 100644 --- a/meta-xilinx-virtualization/conf/layer.conf +++ b/meta-xilinx-virtualization/conf/layer.conf @@ -19,5 +19,6 @@ LAYERDEPENDS_xilinx-virtualization = "\ LAYERSERIES_COMPAT_xilinx-virtualization = "scarthgap" XILINX_XEN_VERSION[v2024.1] = "4.18+stable-xilinx+git%" +XILINX_XEN_VERSION[v2024.2] = "4.18+stable-xilinx+git%" PREFERRED_VERSION_xen ?= "${@d.getVarFlag('XILINX_XEN_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or '4.18+stable-xilinx+git%'}" PREFERRED_VERSION_xen-tools ?= "${@d.getVarFlag('XILINX_XEN_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or '4.18+stable-xilinx+git%'}" diff --git a/meta-xilinx-virtualization/recipes-bsp/u-boot/mxv-xen-boot-cmd.inc b/meta-xilinx-virtualization/recipes-bsp/u-boot/mxv-xen-boot-cmd.inc new file mode 100644 index 000000000..81f9c5f25 --- /dev/null +++ b/meta-xilinx-virtualization/recipes-bsp/u-boot/mxv-xen-boot-cmd.inc @@ -0,0 +1,11 @@ +# Add xen variables as addendum. +# Variable SCRIPT_SED_ADDENDUM id defined in meta-xilinx and set to null by +# default and enable only for xen builds. +SCRIPT_SED_ADDENDUM += "-e 's/@@XEN_IMAGE_NAME@@/${XEN_IMAGE_NAME}/' \ + -e 's/@@XEN_OFFSET@@/${XEN_OFFSET}/' \ + -e 's/@@XEN_LOAD_ADDRESS@@/${XEN_LOAD_ADDRESS}/' \ + -e 's/@@DOM0_MEM@@/${DOM0_MEM}/' \ + -e 's/@@DOM0_MAX_VCPUS@@/${DOM0_MAX_VCPUS}/' \ + -e 's:@@XEN_SERIAL_CONSOLES@@:${XEN_SERIAL_CONSOLES}:' \ + -e 's:@@XEN_CMDLINE_APPEND@@:${XEN_CMDLINE_APPEND}:' \ +" diff --git a/meta-xilinx-virtualization/recipes-bsp/u-boot/u-boot-xlnx-scr.bbappend b/meta-xilinx-virtualization/recipes-bsp/u-boot/u-boot-xlnx-scr.bbappend new file mode 100644 index 000000000..c8a21b3b3 --- /dev/null +++ b/meta-xilinx-virtualization/recipes-bsp/u-boot/u-boot-xlnx-scr.bbappend @@ -0,0 +1,5 @@ +# Include xen-boot-cmd.inc only if ENABLE_XEN_UBOOT_SCR is set from configuration +# file and xen enabled in DISTRO_FEATURES. +ENABLE_XEN_UBOOT_SCR ?= "" +include ${@'mxv-xen-boot-cmd.inc' if d.getVar('ENABLE_XEN_UBOOT_SCR') == '1' and bb.utils.contains('DISTRO_FEATURES', 'xen', True, False, d) else ''} + diff --git a/meta-xilinx-virtualization/recipes-extended/xen/xen-tools-xilinx.inc b/meta-xilinx-virtualization/recipes-extended/xen/xen-tools-xilinx.inc index e7bc8d7e2..aa308f417 100644 --- a/meta-xilinx-virtualization/recipes-extended/xen/xen-tools-xilinx.inc +++ b/meta-xilinx-virtualization/recipes-extended/xen/xen-tools-xilinx.inc @@ -1,3 +1,5 @@ +QEMU_SYSTEM:aarch64 = "qemu-system-aarch64" + # Only include the sysvinit scripts if sysvinit is enabled. do_install:append () { if [ -e ${D}/usr/lib/xen/bin/pygrub ]; then diff --git a/meta-xilinx-virtualization/recipes-extended/xen/xen-xilinx_4.18.inc b/meta-xilinx-virtualization/recipes-extended/xen/xen-xilinx_4.18.inc index 4d4b1588f..7c563d320 100644 --- a/meta-xilinx-virtualization/recipes-extended/xen/xen-xilinx_4.18.inc +++ b/meta-xilinx-virtualization/recipes-extended/xen/xen-xilinx_4.18.inc @@ -1,4 +1,4 @@ -SRCREV = "c4ff3360900b7428ca31de2425763acfe7ad9c21" +SRCREV = "c9de96c0cbe9b2f2aa5e55a0e1e645ca72865102" XEN_URI = "git://github.com/Xilinx/xen.git;protocol=https" XEN_BRANCH = "xlnx_rebase_4.18"