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Hi everyone, I have implemented a Chisel version of this project in https://github.com/Max-astro/tiny-gpu-chisel
This Chisel version of hardware modules is almost identical to the original Verilog implementation.
I also added more testing code to each module.
However, a more formal testing framework is still under development.
If anyone is interested in Chisel, check the README file and run make Verilog to see the RTL output.
Since the tiny-gpu project seems to have not been maintained anymore.
Feel free to create tiny-gpu related issues on the tiny-gpu-chisel project.
The text was updated successfully, but these errors were encountered:
Hi everyone, I have implemented a Chisel version of this project in
https://github.com/Max-astro/tiny-gpu-chisel
This Chisel version of hardware modules is almost identical to the original Verilog implementation.
I also added more testing code to each module.
However, a more formal testing framework is still under development.
If anyone is interested in Chisel, check the README file and run
make Verilog
to see the RTL output.Since the
tiny-gpu
project seems to have not been maintained anymore.Feel free to create
tiny-gpu
related issues on thetiny-gpu-chisel
project.The text was updated successfully, but these errors were encountered: