springbok.resc

mach create "springbok"

EnsureTypeIsLoaded "Antmicro.Renode.Peripherals.CPU.RiscV32"
include $springbokriscv32_cs

machine LoadPlatformDescription $springbok_repl

sysbus.cpu EnableRiscvOpcodesCounting

# Enable UART connection
emulation CreateUartPtyTerminal "term" "/tmp/uart"
connector Connect sysbus.uart0 term

macro reset
"""
    sysbus LoadELF $bin
    # Start the vector core at address 0 of its instruction TCM.
    sysbus.cpu IsHalted true
    sysbus.cpu PC 0x32000000
"""
runMacro $reset