fix

771-8bit · 771-8bit · commit 01e231676105 · 2024-11-13T15:22:11.000+09:00
diff --git a/examples/mobc/src/src_user/test/src_core/system/watchdog_timer/test_watchdog_timer.py b/examples/mobc/src/src_user/test/src_core/system/watchdog_timer/test_watchdog_timer.py
@@ -56,7 +56,7 @@ def test_wdt_at_sils():
     assert tlm_HK["HK.WDT.IS_CLEAR_ENABLE"] == "ENA"
 
     wings.util.send_cmd_and_confirm(
-        ope, c2a_enum.Cmd_CODE_WDT_SET_TIMER, (1000, ), c2a_enum.Tlm_CODE_HK
+        ope, c2a_enum.Cmd_CODE_WDT_SET_TIMER, (1000,), c2a_enum.Tlm_CODE_HK
     )
     tlm_HK = wings.util.generate_and_receive_tlm(
         ope, c2a_enum.Cmd_CODE_TG_GENERATE_RT_TLM, c2a_enum.Tlm_CODE_HK

Original file line number	Diff line number	Diff line change
`@@ -56,7 +56,7 @@ def test_wdt_at_sils():`
`56`	`56`	`assert tlm_HK["HK.WDT.IS_CLEAR_ENABLE"] == "ENA"`
`57`	`57`
`58`	`58`	`wings.util.send_cmd_and_confirm(`
`59`		`- ope, c2a_enum.Cmd_CODE_WDT_SET_TIMER, (1000, ), c2a_enum.Tlm_CODE_HK`
	`59`	`+ ope, c2a_enum.Cmd_CODE_WDT_SET_TIMER, (1000,), c2a_enum.Tlm_CODE_HK`
`60`	`60`	`)`
`61`	`61`	`tlm_HK = wings.util.generate_and_receive_tlm(`
`62`	`62`	`ope, c2a_enum.Cmd_CODE_TG_GENERATE_RT_TLM, c2a_enum.Tlm_CODE_HK`