INDEX.md

Index of BitsAndBytes

Access Patterns

• Address Calculation - Memory address calculation implementations
• CPU Data Processing - CPU data processing optimizations
• DRAM Timing - DRAM timing simulations
• Memory Controller - Memory controller implementations
• Prefetching - Memory prefetching techniques

Concurrency

Scheduling

• Adaptive Thread-Aware Scheduling
• Parallelism-Aware Batch Scheduling

Synchronization

• Preemptible Critical Sections
• Priority Inheritance
• RT Mutex

Threads

• Multi-Threading Examples
• Read-Write Locks
• Semaphores

Memory

Allocation

• Custom Allocator
• Smart Pointer
• Unique Pointer

Cache

• Two-Level Cache System

Virtual Memory

• Page Table
• TLB Implementation

Operating System

Filesystem

• Custom Buffer Management
• MMAP Operations

Kernel

• Kernel Interaction
• Kernel Memory Management

Process

• CPU Affinity
• Chroot Example

Security

Exploits

• Heap Vulnerabilities
• Stack Canaries

Protection

• ASLR Implementation
• Heap ASLR

Utils

• Matrix Multiplication - Optimized matrix multiplication implementations
• Shell Implementation - Simple shell implementation