This full adder takes 3-bits for the input (A, B and carry in) and outputs a 2-bit Sum and its corresponding Carry Out. The Sum will be the lowest value output and the Carry Out is the highest value output as well as where other full adders could be joined together.
Simulation results from the Verilog representation of this Full Adder
- Full Adder Module - full_adder.v
- Full Adder Test Bench - full_adder_test.v