diff --git a/drivers/fpga_ip/CorePWM/core_pwm.c b/drivers/fpga_ip/CorePWM/core_pwm.c deleted file mode 100644 index 91f987b..0000000 --- a/drivers/fpga_ip/CorePWM/core_pwm.c +++ /dev/null @@ -1,1136 +0,0 @@ -/******************************************************************************* - * (c) Copyright 2008-2018 Microsemi SoC Products Group. All rights reserved. - * - * CorePWM driver implementation. - * - * SVN $Revision$ - * SVN $Date$ - */ -#include "core_pwm.h" -#include "corepwm_regs.h" -#include "hal.h" -#include "hal_assert.h" - -#ifdef __cplusplus -extern "C" { -#endif -/*-------------------------------------------------------------------------*//** - * Default definitions for TACH Interface - */ -#define COREPWM_TACHMODE_DEFAULT 0x0000u -#define COREPWM_TACHIRQMASK_DEFAULT 0x0000u -#define COREPWM_TACHSTATUS_DEFAULT 0xFFFFu - -/*-------------------------------------------------------------------------*//** - * Lookup table containing the bit mask used to enable/disable PWMs by writing - * the PWM_ENABLE_1 and PWM_ENABLE_2 registers. - */ -static const uint8_t g_pwm_id_mask_lut[] = -{ - 0x00u, - 0x01u, /* PWM_1 */ - 0x02u, /* PWM_2 */ - 0x04u, /* PWM_3 */ - 0x08u, /* PWM_4 */ - 0x10u, /* PWM_5 */ - 0x20u, /* PWM_6 */ - 0x40u, /* PWM_7 */ - 0x80u, /* PWM_8 */ - 0x01u, /* PWM_9 */ - 0x02u, /* PWM_10 */ - 0x04u, /* PWM_11 */ - 0x08u, /* PWM_12 */ - 0x10u, /* PWM_13 */ - 0x20u, /* PWM_14 */ - 0x40u, /* PWM_15 */ - 0x80u, /* PWM_16 */ -}; - -/*-------------------------------------------------------------------------*//** - * Lookup table containing the bit mask used to find out the TachInput number - * for TachInterface - */ -static const uint16_t g_pwm_tach_id_mask_lut[] = -{ - 0x0000u, - 0x0001u, /* PWM_TACH_1 */ - 0x0002u, /* PWM_TACH_2 */ - 0x0004u, /* PWM_TACH_3 */ - 0x0008u, /* PWM_TACH_4 */ - 0x0010u, /* PWM_TACH_5 */ - 0x0020u, /* PWM_TACH_6 */ - 0x0040u, /* PWM_TACH_7 */ - 0x0080u, /* PWM_TACH_8 */ - 0x0100u, /* PWM_TACH_9 */ - 0x0200u, /* PWM_TACH_10 */ - 0x0400u, /* PWM_TACH_11 */ - 0x0800u, /* PWM_TACH_12 */ - 0x1000u, /* PWM_TACH_13 */ - 0x2000u, /* PWM_TACH_14 */ - 0x4000u, /* PWM_TACH_15 */ - 0x8000u, /* PWM_TACH_16 */ -}; - -/*-------------------------------------------------------------------------*//** - * Lookup table containing the offset of the registers used to control the - * positive edge of a PWM. The LUT is indexed on the PWM number from 1 to 16. - */ -static const addr_t g_pwm_posedge_offset_lut[] = -{ - 0x0000u, - PWM1_POSEDGE_REG_OFFSET, /* PWM_1 */ - PWM2_POSEDGE_REG_OFFSET, /* PWM_2 */ - PWM3_POSEDGE_REG_OFFSET, /* PWM_3 */ - PWM4_POSEDGE_REG_OFFSET, /* PWM_4 */ - PWM5_POSEDGE_REG_OFFSET, /* PWM_5 */ - PWM6_POSEDGE_REG_OFFSET, /* PWM_6 */ - PWM7_POSEDGE_REG_OFFSET, /* PWM_7 */ - PWM8_POSEDGE_REG_OFFSET, /* PWM_8 */ - PWM9_POSEDGE_REG_OFFSET, /* PWM_9 */ - PWM10_POSEDGE_REG_OFFSET, /* PWM_10 */ - PWM11_POSEDGE_REG_OFFSET, /* PWM_11 */ - PWM12_POSEDGE_REG_OFFSET, /* PWM_12 */ - PWM13_POSEDGE_REG_OFFSET, /* PWM_13 */ - PWM14_POSEDGE_REG_OFFSET, /* PWM_14 */ - PWM15_POSEDGE_REG_OFFSET, /* PWM_15 */ - PWM16_POSEDGE_REG_OFFSET, /* PWM_16 */ -}; - -/*-------------------------------------------------------------------------*//** - * Lookup table containing the offset of the registers used to control the - * negative edge of a PWM. The LUT is indexed on the PWM number from 1 to 16. - */ -static const addr_t g_pwm_negedge_offset_lut[] = -{ - 0x0000u, - PWM1_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_1 */ - PWM2_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_2 */ - PWM3_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_3 */ - PWM4_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_4 */ - PWM5_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_5 */ - PWM6_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_6 */ - PWM7_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_7 */ - PWM8_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_8 */ - PWM9_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_9 */ - PWM10_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_10 */ - PWM11_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_11 */ - PWM12_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_12 */ - PWM13_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_13 */ - PWM14_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_14 */ - PWM15_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_15 */ - PWM16_NEGEDGE_DACLEV_REG_OFFSET, /* PWM_16 */ -}; - -/*-------------------------------------------------------------------------*//** - * Lookup table containing the offset of the registers used to stores the - * number of timer ticks between two successive positive (or negative) edges - * from the TACHIN[i] The LUT is indexed on the Tachometer Input number from - * 1 to 16. - */ -static const addr_t g_tachpulsedur_offset_lut[] = -{ - 0x0000u, - TACHPULSEDUR_0_REG_OFFSET, /* PWM_TACH_1 */ - TACHPULSEDUR_1_REG_OFFSET, /* PWM_TACH_2 */ - TACHPULSEDUR_2_REG_OFFSET, /* PWM_TACH_3 */ - TACHPULSEDUR_3_REG_OFFSET, /* PWM_TACH_4 */ - TACHPULSEDUR_4_REG_OFFSET, /* PWM_TACH_5 */ - TACHPULSEDUR_5_REG_OFFSET, /* PWM_TACH_6 */ - TACHPULSEDUR_6_REG_OFFSET, /* PWM_TACH_7 */ - TACHPULSEDUR_7_REG_OFFSET, /* PWM_TACH_8 */ - TACHPULSEDUR_8_REG_OFFSET, /* PWM_TACH_9 */ - TACHPULSEDUR_9_REG_OFFSET, /* PWM_TACH_10 */ - TACHPULSEDUR_10_REG_OFFSET, /* PWM_TACH_11 */ - TACHPULSEDUR_11_REG_OFFSET, /* PWM_TACH_12 */ - TACHPULSEDUR_12_REG_OFFSET, /* PWM_TACH_13 */ - TACHPULSEDUR_13_REG_OFFSET, /* PWM_TACH_14 */ - TACHPULSEDUR_14_REG_OFFSET, /* PWM_TACH_15 */ - TACHPULSEDUR_15_REG_OFFSET, /* PWM_TACH_16 */ -}; - -/*-------------------------------------------------------------------------*//** - * PWM_init() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_init -( - pwm_instance_t * pwm_inst, - addr_t base_addr, - uint32_t prescale, - uint32_t period -) -{ - pwm_inst->address = base_addr; - - HAL_set_8bit_reg( pwm_inst->address, PWM_ENABLE_1, 0u ); - HAL_set_8bit_reg( pwm_inst->address, PWM_ENABLE_2, 0u ); - - HAL_set_32bit_reg( pwm_inst->address, PRESCALE, (uint_fast32_t)prescale ); - - /* - * The minimum allowed period parameter value is 1. - * This simplifies the duty cycle and edge value calculations for the driver. - */ - HAL_ASSERT( period >= 1 ) - - HAL_set_32bit_reg( pwm_inst->address, PERIOD, (uint_fast32_t)period ); - - /* Set positive edge to 0 for all PWMs. */ - HAL_set_32bit_reg( pwm_inst->address, PWM1_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM2_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM3_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM4_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM5_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM6_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM7_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM8_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM9_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM10_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM11_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM12_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM13_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM14_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM15_POSEDGE, 0u ); - HAL_set_32bit_reg( pwm_inst->address, PWM16_POSEDGE, 0u ); -} - -/*-------------------------------------------------------------------------*//** - * PWM_enable() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_enable -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id -) -{ - uint8_t pwm_enables; - uint8_t pwm_id_mask; - - /* Assertion will ensure correct PWM output has been selected. */ - HAL_ASSERT( pwm_id >= PWM_1 ) - HAL_ASSERT( pwm_id <= PWM_16 ) - - if ( (pwm_id >= PWM_1) && (pwm_id <= PWM_16 )) - { - pwm_id_mask = g_pwm_id_mask_lut[pwm_id]; - - if ( pwm_id < PWM_9 ) - { - pwm_enables = HAL_get_8bit_reg( pwm_inst->address, PWM_ENABLE_1 ); - pwm_enables |= pwm_id_mask; - HAL_set_8bit_reg - ( - pwm_inst->address, - PWM_ENABLE_1, - (uint_fast8_t)pwm_enables - ); - } - else - { - pwm_enables = HAL_get_8bit_reg( pwm_inst->address, PWM_ENABLE_2 ); - pwm_enables |= pwm_id_mask; - HAL_set_8bit_reg - ( - pwm_inst->address, - PWM_ENABLE_2, - (uint_fast8_t)pwm_enables - ); - } - } -} - -/*-------------------------------------------------------------------------*//** - * PWM_disable() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_disable -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id -) -{ - uint8_t pwm_enables; - uint8_t pwm_id_mask; - - /* Assertion will ensure correct PWM output has been selected. */ - HAL_ASSERT( pwm_id >= PWM_1 ) - HAL_ASSERT( pwm_id <= PWM_16 ) - - if ( (pwm_id >= PWM_1) && (pwm_id <= PWM_16 )) - { - pwm_id_mask = g_pwm_id_mask_lut[pwm_id]; - - if ( pwm_id < PWM_9 ) - { - pwm_enables = HAL_get_8bit_reg( pwm_inst->address, PWM_ENABLE_1 ); - pwm_enables &= (uint8_t)~pwm_id_mask; - HAL_set_8bit_reg - ( - pwm_inst->address, - PWM_ENABLE_1, - (uint_fast8_t)pwm_enables - ); - } - else - { - pwm_enables = HAL_get_8bit_reg( pwm_inst->address, PWM_ENABLE_2 ); - pwm_enables &= (uint8_t)~pwm_id_mask; - HAL_set_8bit_reg - ( - pwm_inst->address, - PWM_ENABLE_2, - (uint_fast8_t)pwm_enables - ); - } - } -} - -/*-------------------------------------------------------------------------*//** - * PWM_enable_synch_update() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_enable_synch_update -( - pwm_instance_t * pwm_inst -) -{ - HAL_set_16bit_reg( pwm_inst->address, SYNC_UPDATE, 1u ); - - /* - * Assertion will ensure PWM feature has been enabled for CorePWM - * hardware instance. - */ - HAL_ASSERT( HAL_get_16bit_reg( pwm_inst->address, SYNC_UPDATE ) == 1u) -} - -/*-------------------------------------------------------------------------*//** - * PWM_disable_synch_update() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_disable_synch_update -( - pwm_instance_t * pwm_inst -) -{ - HAL_set_16bit_reg( pwm_inst->address, SYNC_UPDATE, 0u ); - - /* - * Assertion will ensure PWM feature has been enabled for CorePWM - * hardware instance. - */ - HAL_ASSERT( HAL_get_16bit_reg( pwm_inst->address, SYNC_UPDATE ) == 0u) -} - -/*-------------------------------------------------------------------------*//** - * PWM_set_duty_cycle() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_set_duty_cycle -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id, - uint32_t duty_cycle -) -{ - - /* Assertion will ensure correct PWM output has been selected. */ - HAL_ASSERT( pwm_id >= PWM_1 ) - HAL_ASSERT( pwm_id <= PWM_16 ) - - if ( (pwm_id >= PWM_1) && (pwm_id <= PWM_16 )) - { - if ( duty_cycle == 0u ) - { - PWM_disable( pwm_inst, pwm_id ); - } - else - { - HW_set_32bit_reg - ( - pwm_inst->address + g_pwm_posedge_offset_lut[pwm_id], - 0u - ); - - HW_set_32bit_reg - ( - pwm_inst->address + g_pwm_negedge_offset_lut[pwm_id], - (uint_fast32_t)duty_cycle - ); - - /* - * Assertion will ensure PWM feature has been enabled for CorePWM - * hardware instance. - */ -#ifndef NDEBUG - { - uint8_t edge_value ; - addr_t neg_addr; - - neg_addr = g_pwm_negedge_offset_lut[pwm_id] ; - edge_value = HW_get_8bit_reg(pwm_inst->address + neg_addr ); - HAL_ASSERT( edge_value == (uint8_t)duty_cycle ) - } -#endif - PWM_enable( pwm_inst, pwm_id ); - } - } -} - -/*-------------------------------------------------------------------------*//** - * PWM_set_edges() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_set_edges -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id, - uint32_t pos_edge, - uint32_t neg_edge -) -{ - /* Assertion will ensure correct PWM output has been selected. */ - HAL_ASSERT( pwm_id >= PWM_1 ) - HAL_ASSERT( pwm_id <= PWM_16 ) - - /* - * Assertion will ensure pos_edge & neg_edge is less than or equal to - * period value. - */ -#ifndef NDEBUG - { - uint32_t period ; - period = HAL_get_32bit_reg( pwm_inst->address, PERIOD ); - HAL_ASSERT( pos_edge <= period ); - HAL_ASSERT( neg_edge <= period ); - } -#endif - - if ( (pwm_id >= PWM_1) && (pwm_id <= PWM_16 )) - { - HW_set_32bit_reg - ( - pwm_inst->address + g_pwm_posedge_offset_lut[pwm_id], - (uint_fast32_t)pos_edge - ); - - /* - * Assertion will ensure PWM feature has been enabled for CorePWM - * hardware instance. - */ -#ifndef NDEBUG - { - uint8_t edge_value ; - addr_t pos_addr; - - pos_addr = g_pwm_posedge_offset_lut[pwm_id]; - edge_value = HW_get_8bit_reg(pwm_inst->address + pos_addr ); - HAL_ASSERT( edge_value == (uint8_t)pos_edge ) - } -#endif - - HW_set_32bit_reg - ( - pwm_inst->address + g_pwm_negedge_offset_lut[pwm_id], - (uint_fast32_t)neg_edge - ); - - /* - * Assertion will ensure PWM feature has been enabled for CorePWM - * hardware instance. - */ -#ifndef NDEBUG - { - uint8_t edge_value ; - addr_t neg_addr; - - neg_addr = g_pwm_negedge_offset_lut[pwm_id]; - edge_value = HW_get_8bit_reg(pwm_inst->address + neg_addr ); - HAL_ASSERT( edge_value == (uint8_t)neg_edge ) - } -#endif - } -} - -/*-------------------------------------------------------------------------*//** - * PWM_get_duty_cycle() - * See "core_pwm.h" for details of how to use this function. - */ -uint32_t PWM_get_duty_cycle -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id -) -{ - uint32_t pos_edge ; - uint32_t neg_edge ; - uint32_t duty_cycle = 0u; - uint32_t period ; - uint8_t pwm_enables; - uint8_t pwm_id_mask; - - /* Assertion will ensure correct PWM output has been selected. */ - HAL_ASSERT( pwm_id >= PWM_1 ) - HAL_ASSERT( pwm_id <= PWM_16 ) - - if ((pwm_id >= PWM_1) && (pwm_id <= PWM_16 )) - { - pwm_id_mask = g_pwm_id_mask_lut[pwm_id]; - - /* Find out if the PWM output is enabled or disabled */ - if (pwm_id < PWM_9) - { - pwm_enables = HAL_get_8bit_reg( pwm_inst->address, PWM_ENABLE_1 ); - pwm_enables &= pwm_id_mask; - } - else - { - pwm_enables = HAL_get_8bit_reg( pwm_inst->address, PWM_ENABLE_2 ); - pwm_enables &= pwm_id_mask; - } - - /* - * If the PWM output is disabled, the duty cycle is implicitly 0, - * so allow the initial duty_cycle = 0u assignment fall through to - * the return() statement. - * NOTE: The PWM_set_duty_cycle() and PWM_generate_aligned_wave() - * functions disable the PWM output when a duty cycle = 0 is - * requested. - * - * Otherwise the PWM output is enabled, so read the positive and - * negative edge and period registers and calculate the duty cycle. - */ - if (pwm_enables) - { - pos_edge = HW_get_32bit_reg - ( - pwm_inst->address + g_pwm_posedge_offset_lut[pwm_id] - ); - - neg_edge = HW_get_32bit_reg - ( - pwm_inst->address + g_pwm_negedge_offset_lut[pwm_id] - ); - - period = HAL_get_32bit_reg( pwm_inst->address, PERIOD ); - - /* - * Calculate the duty cycle from the edge and period values. - * - * If pos_edge = neg_edge, this is the setting for PWM output - * toggle mode (50% duty cycle). For a description of toggle mode, - * see CorePWM Handbook, Fig1-3, PWM4. - * NOTE: The PWM_set_edges() function can set pos_edge = neg_edge - * and this is also the reset state for the edge registers. The - * PWM_set_duty_cycle() and PWM_generate_aligned_wave() functions - * cannot set pos_edge = neg_edge, instead they simply disable - * the PWM output when duty_cycle = 0 is requested. - */ - if (pos_edge <= neg_edge) - { - duty_cycle = neg_edge - pos_edge ; - } - else - { - duty_cycle = (period - (pos_edge - neg_edge))+1u ; - } - } - } - - return(duty_cycle); -} - -/*-------------------------------------------------------------------------*//** - PWM_generate_aligned_wave() - Algorithm for each Aligned wave type follows as below: - Parameters used in algorithm - - pos_edge: Specifies the value of the period counter at which the - PWM output identified by pwm_id will rise from low to high. - neg_edge: Specifies the value of the period counter at which the - PWM output identified by pwm_id will fall from high to low. - - Left Aligned Waveform - pos_edge 0 - neg_edge Duty_cycle - - Right Aligned Waveform - pos_edge PWM_Period+1- Duty_cycle - neg_edge 0 - - Central Aligned Waveform - - There are two cases : - Case 1: When Period + Duty_cycle = mathematical odd number - pos_edge (PWM_Period +1 - duty_cycle)/2 - neg_edge (PWM_Period +1 + duty_cycle)/2 - - Case 2: When Period + Duty_cycle = mathematical even number - In this scenario, there cannot be exact central waveform, - however, if pwm period is larger then the difference will - not be visible. - There can be two possible type of central waveform. - a) Left Centered Waveform - b) Right Centered Waveform - Basically, these will be central waveforms only but - slightly shifted towards left or right side. Formulae - for the same are below: - - a) Left Centered Aligned Waveform: - pos_edge (PWM_PERIOD -Duty_cycle)/2+1 - neg_edge (PWM_PERIOD +Duty_cycle)/2+1 - b) Right Centered Aligned Waveform: - pos_edge (PWM_PERIOD -Duty_cycle)/2 - neg_edge (PWM_PERIOD +Duty_cycle)/2 - - See "core_pwm.h" for more details of how to use this function. - */ -void PWM_generate_aligned_wave -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id, - uint32_t duty_cycle, - pwm_wave_align_t alignment_type -) -{ - uint32_t period; - uint32_t pos_edge = 0u; - uint32_t neg_edge = 0u; - - /* Assertion will ensure correct PWM output has been selected. */ - HAL_ASSERT( pwm_id >= PWM_1 ) - HAL_ASSERT( pwm_id <= PWM_16 ) - - if( (pwm_id >= PWM_1) && (pwm_id <= PWM_16) ) - { - period = HAL_get_32bit_reg( pwm_inst->address, PERIOD ); - - /* - * Assertion will ensure duty cycle is less than or equal to - * period value. - */ - HAL_ASSERT( duty_cycle <= period ); - - if( 0u == duty_cycle) - { - /* - * For a duty cycle of 0, we cannot set pos_edge = neg_edge because - * this is the setting for PWM output toggle mode (50% duty cycle). - * See CorePWM Handbook, Fig1-3, PWM4, for a description of toggle - * mode. - * Instead, for a duty cycle of 0, disable the PWM output. - */ - PWM_disable( pwm_inst, pwm_id ); - } - else - { - switch(alignment_type) - { - case PWM_LEFT_ALIGN : - pos_edge = 0u; - neg_edge = duty_cycle; - break; - - case PWM_CENTER_ALIGN : - if( (uint32_t)0x1 & (period ^ duty_cycle)) - { - /* - * If the sum of period + duty_cycle is - * an odd number, then the duty cycle can - * be exactly centered in the period. The - * test for an "odd sum" may be expressed as, - * (lsb of period) XOR (lsb of duty_cycle) = 1 - */ - pos_edge = ((period - duty_cycle) +1u) >> 1 ; - neg_edge = pos_edge + duty_cycle ; - } - /* - * Else the sum of period + duty_cycle is an - * even number - */ - else - { -#ifdef ALTERNATE_CENTRAL_ALIGNED_WAVE - - /* case 1 -- right Shift */ - pos_edge = ((period - duty_cycle)>>1) +1u ; - - if ( period != duty_cycle ) - { - neg_edge = pos_edge + duty_cycle ; - } - else - { - /* - * When period = duty_cycle, we’ve reached the - * right shift limit for the neg_edge - */ - neg_edge = 0u; - } -#else - /* case 2 -- left Shift */ - pos_edge = (period - duty_cycle) >> 1 ; - neg_edge = pos_edge + duty_cycle ; -#endif - } - break; - - case PWM_RIGHT_ALIGN : - pos_edge = (period-duty_cycle) + 1u; - neg_edge = 0u ; - break; - - default : - break ; - } - - HW_set_32bit_reg - ( - pwm_inst->address + g_pwm_posedge_offset_lut[pwm_id], - (uint_fast32_t)pos_edge - ); - - HW_set_32bit_reg - ( - pwm_inst->address + g_pwm_negedge_offset_lut[pwm_id], - (uint_fast32_t)neg_edge - ); - - /* - * Assertion will ensure PWM feature has been enabled for CorePWM - * hardware instance. - */ -#ifndef NDEBUG - { - uint8_t edge_value ; - addr_t edge_addr; - - edge_addr = g_pwm_posedge_offset_lut[pwm_id]; - edge_value = HW_get_8bit_reg(pwm_inst->address + edge_addr ); - HAL_ASSERT( edge_value == (uint8_t)pos_edge ) - - edge_addr = g_pwm_negedge_offset_lut[pwm_id]; - edge_value = HW_get_8bit_reg(pwm_inst->address + edge_addr ); - HAL_ASSERT( edge_value == (uint8_t)neg_edge ) - } -#endif - PWM_enable( pwm_inst, pwm_id ); - } - } -} - -/*-------------------------------------------------------------------------*//** - * PWM_enable_stretch_pulse() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_enable_stretch_pulse -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id -) -{ - uint16_t stretch_value ; - uint16_t pwm_id_mask ; - - /* Assertion will ensure correct PWM output has been selected. */ - HAL_ASSERT( pwm_id >= PWM_1 ) - HAL_ASSERT( pwm_id <= PWM_16 ) - - if ( (pwm_id >= PWM_1) && (pwm_id <= PWM_16 )) - { - pwm_id_mask = g_pwm_tach_id_mask_lut[pwm_id]; - - stretch_value = HAL_get_16bit_reg( pwm_inst->address,PWM_STRETCH ); - stretch_value |= pwm_id_mask; - - HAL_set_16bit_reg - ( - pwm_inst->address, - PWM_STRETCH, - (uint_fast16_t)stretch_value - ); - - /* - * Assertion will ensure Tachometer feature has been enabled - * for CorePWM hardware instance. - */ -#ifndef NDEBUG - { - uint16_t pwm_stretch ; - pwm_stretch = HAL_get_16bit_reg( pwm_inst->address, PWM_STRETCH ); - HAL_ASSERT( pwm_stretch == stretch_value ) - } -#endif - } -} - -/*-------------------------------------------------------------------------*//** - * PWM_disable_stretch_pulse() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_disable_stretch_pulse -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id -) -{ - uint16_t stretch_value ; - uint16_t pwm_id_mask ; - - /* Assertion will ensure correct PWM output has been selected. */ - HAL_ASSERT( pwm_id >= PWM_1 ) - HAL_ASSERT( pwm_id <= PWM_16 ) - - if ( (pwm_id >= PWM_1) && (pwm_id <= PWM_16 )) - { - pwm_id_mask = g_pwm_tach_id_mask_lut[pwm_id]; - - stretch_value = HAL_get_16bit_reg( pwm_inst->address,PWM_STRETCH ); - stretch_value &= (uint16_t)~pwm_id_mask; - - HAL_set_16bit_reg - ( - pwm_inst->address, - PWM_STRETCH, - (uint_fast16_t)stretch_value - ); - - /* - * Assertion will ensure Tachometer feature has been enabled - * for CorePWM hardware instance. - */ -#ifndef NDEBUG - { - uint16_t pwm_stretch ; - pwm_stretch = HAL_get_16bit_reg( pwm_inst->address, PWM_STRETCH ); - HAL_ASSERT( pwm_stretch == stretch_value ) - } -#endif - } -} - -/*-------------------------------------------------------------------------*//** - * PWM_tach_init() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_tach_init -( - pwm_instance_t * pwm_inst, - pwm_tach_prescale_t tach_prescale -) -{ - HAL_set_16bit_reg - ( - pwm_inst->address, - TACHPRESCALE, - (uint_fast16_t)tach_prescale - ); - - /* - * Assertion will ensure Tachometer feature has been enabled - * for CorePWM hardware instance. - */ -#ifndef NDEBUG -{ - uint16_t prescale ; - prescale = HAL_get_16bit_reg(pwm_inst->address,TACHPRESCALE); - HAL_ASSERT( (pwm_tach_prescale_t)prescale == tach_prescale ) -} -#endif - - /* - * Tachometer mode and IRQ mask registers are updated with default value. - * So no need to check assertion. - */ - HAL_set_16bit_reg(pwm_inst->address,TACHMODE,COREPWM_TACHMODE_DEFAULT ); - HAL_set_16bit_reg(pwm_inst->address,TACHIRQMASK,COREPWM_TACHIRQMASK_DEFAULT); - - /* Clear any pending interrupts for all the tachometer inputs.*/ - HAL_set_16bit_reg(pwm_inst->address,TACHSTATUS,COREPWM_TACHSTATUS_DEFAULT ); - -} - -/*-------------------------------------------------------------------------*//** - * PWM_tach_set_mode() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_tach_set_mode -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id, - uint16_t pwm_tachmode -) -{ - uint16_t pwm_tach_config; - uint16_t pwm_tach_id_mask; - - /* Assertion will ensure correct tachometer input has been selected. */ - HAL_ASSERT( pwm_tach_id >= PWM_TACH_1 ) - HAL_ASSERT( pwm_tach_id <= PWM_TACH_16 ) - - if ( (pwm_tach_id >= PWM_TACH_1) && (pwm_tach_id <= PWM_TACH_16 )) - { - pwm_tach_id_mask = g_pwm_tach_id_mask_lut[pwm_tach_id]; - - pwm_tach_config = HAL_get_16bit_reg( pwm_inst->address, TACHMODE ); - if (pwm_tachmode) - { - pwm_tach_config |= pwm_tach_id_mask; - } - else - { - pwm_tach_config &= (uint16_t)~pwm_tach_id_mask; - } - - HAL_set_16bit_reg(pwm_inst->address,TACHMODE,(uint_fast16_t)pwm_tach_config); - - /* - * Assertion will ensure Tachometer feature has been enabled - * for CorePWM hardware instance. - */ -#ifndef NDEBUG - { - uint16_t tach_mode; - tach_mode = HAL_get_16bit_reg( pwm_inst->address, TACHMODE); - HAL_ASSERT( tach_mode == pwm_tach_config ) - } -#endif - } -} - -/*-------------------------------------------------------------------------*//** - * PWM_tach_read_value() - * See "core_pwm.h" for details of how to use this function. - */ - -uint16_t PWM_tach_read_value -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id -) -{ - uint16_t tach_value = 0u; - - /* Assertion will ensure correct tachometer input has been selected. */ - HAL_ASSERT( pwm_tach_id >= PWM_TACH_1 ) - HAL_ASSERT( pwm_tach_id <= PWM_TACH_16 ) - - if ((pwm_tach_id >= PWM_TACH_1) && (pwm_tach_id <= PWM_TACH_16 )) - { - tach_value = HW_get_16bit_reg - ( - pwm_inst->address + g_tachpulsedur_offset_lut[pwm_tach_id] - ); - } - return( tach_value ); -} - -/*-------------------------------------------------------------------------*//** - * PWM_tach_clear_status() - * See "core_pwm.h" for details of how to use this function. - */ - -void PWM_tach_clear_status -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id -) -{ - uint16_t pwm_tach_id_mask; - - /* Assertion will ensure correct tachometer input has been selected. */ - HAL_ASSERT( pwm_tach_id >= PWM_TACH_1 ) - HAL_ASSERT( pwm_tach_id <= PWM_TACH_16 ) - - if ( (pwm_tach_id >= PWM_TACH_1) && (pwm_tach_id <= PWM_TACH_16 )) - { - pwm_tach_id_mask = g_pwm_tach_id_mask_lut[pwm_tach_id]; - - /* 0 does not have any effect. So, write 1 to the right one */ - HAL_set_16bit_reg - ( - pwm_inst->address , - TACHSTATUS, - (uint_fast16_t) pwm_tach_id_mask - ); - } -} - -/***************************************************************************//** - * PWM_tach_read_status () - * See "core_pwm.h" for details of how to use this function. - */ - -uint16_t PWM_tach_read_status -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id -) -{ - uint16_t pwm_tach_id_mask ; - uint16_t pwm_tach_status = 0u; - - /* Assertion will ensure correct tachometer input has been selected. */ - HAL_ASSERT( pwm_tach_id >= PWM_TACH_1 ) - HAL_ASSERT( pwm_tach_id <= PWM_TACH_16 ) - - if((pwm_tach_id >= PWM_TACH_1) && (pwm_tach_id <= PWM_TACH_16 )) - { - pwm_tach_id_mask = g_pwm_tach_id_mask_lut[pwm_tach_id]; - pwm_tach_status = HAL_get_16bit_reg( pwm_inst->address , TACHSTATUS); - pwm_tach_status = ( pwm_tach_status & pwm_tach_id_mask); - } - return ( pwm_tach_status ); -} - -/*-------------------------------------------------------------------------*//** - * PWM_tach_get_irq_source() - * See "core_pwm.h" for details of how to use this function. - */ -pwm_tach_id_t PWM_tach_get_irq_source -( - pwm_instance_t * pwm_inst -) -{ - uint16_t status; - uint16_t irq_mask; - pwm_tach_id_t tach_id; - uint16_t n; - - irq_mask = HAL_get_16bit_reg( pwm_inst->address , TACHIRQMASK ); - status = HAL_get_16bit_reg( pwm_inst->address , TACHSTATUS ); - status = status & irq_mask; - - if(0u == status) - { - tach_id = PWM_TACH_INVALID; - } - else - { - n = 1u; - if((status & 0x00FFu) == 0u) {n = n + 8u; status = status >> 8;} - if((status & 0x000Fu) == 0u) {n = n + 4u; status = status >> 4;} - if((status & 0x0003u) == 0u) {n = n + 2u; status = status >> 2;} - if((status & 0x0001u) == 0u) {n = n + 1u;} - tach_id = (pwm_tach_id_t)n ; - } - - return tach_id; -} - -/*-------------------------------------------------------------------------*//** - * PWM_tach_enable_irq() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_tach_enable_irq -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id -) -{ - uint16_t pwm_tach_irq; - uint16_t pwm_tach_id_mask; - - /* Assertion will ensure correct tachometer input has been selected. */ - HAL_ASSERT( pwm_tach_id >= PWM_TACH_1 ) - HAL_ASSERT( pwm_tach_id <= PWM_TACH_16 ) - - if ( (pwm_tach_id >= PWM_TACH_1) && (pwm_tach_id <= PWM_TACH_16 )) - { - pwm_tach_id_mask = g_pwm_tach_id_mask_lut[pwm_tach_id]; - pwm_tach_irq = HAL_get_16bit_reg( pwm_inst->address, TACHIRQMASK ); - pwm_tach_irq |= pwm_tach_id_mask; - HAL_set_16bit_reg - ( - pwm_inst->address , - TACHIRQMASK, - (uint_fast16_t)pwm_tach_irq - ); - - /* - * Assertion will ensure Tachometer feature has been enabled - * for CorePWM hardware instance. - */ -#ifndef NDEBUG - { - uint16_t tach_irq ; - tach_irq = HAL_get_16bit_reg( pwm_inst->address, TACHIRQMASK) ; - HAL_ASSERT( tach_irq == pwm_tach_irq ) - } -#endif - } -} - -/*-------------------------------------------------------------------------*//** - * PWM_tach_disable_irq() - * See "core_pwm.h" for details of how to use this function. - */ -void PWM_tach_disable_irq -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id -) -{ - uint16_t pwm_tach_irq; - uint16_t pwm_tach_id_mask; - - /* Assertion will ensure correct tachometer input has been selected. */ - HAL_ASSERT( pwm_tach_id >= PWM_TACH_1 ) - HAL_ASSERT( pwm_tach_id <= PWM_TACH_16 ) - - if ( (pwm_tach_id >= PWM_TACH_1) && (pwm_tach_id <= PWM_TACH_16 )) - { - pwm_tach_id_mask = g_pwm_tach_id_mask_lut[pwm_tach_id]; - pwm_tach_irq = HAL_get_16bit_reg( pwm_inst->address, TACHIRQMASK ); - pwm_tach_irq &= (uint16_t)~pwm_tach_id_mask; - HAL_set_16bit_reg - ( - pwm_inst->address , - TACHIRQMASK, - (uint_fast16_t)pwm_tach_irq - ); - - /* - * Assertion will ensure Tachometer feature has been enabled - * for CorePWM hardware instance. - */ -#ifndef NDEBUG - { - uint16_t tach_irq ; - tach_irq = HAL_get_16bit_reg( pwm_inst->address, TACHIRQMASK) ; - HAL_ASSERT( tach_irq == pwm_tach_irq ) - } -#endif - } -} - -/*-------------------------------------------------------------------------*//** - * PWM_tach_clear_irq() - * See "core_pwm.h" for details of how to use this function. - */ - -void PWM_tach_clear_irq -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id -) -{ - uint16_t pwm_tach_id_mask; - - /* Assertion will ensure correct tachometer input has been selected. */ - HAL_ASSERT( pwm_tach_id >= PWM_TACH_1 ) - HAL_ASSERT( pwm_tach_id <= PWM_TACH_16 ) - - if ( (pwm_tach_id >= PWM_TACH_1) && (pwm_tach_id <= PWM_TACH_16 )) - { - pwm_tach_id_mask = g_pwm_tach_id_mask_lut[pwm_tach_id]; - - /* 0 does not have any effect. So, write 1 to the right one. */ - HAL_set_16bit_reg - ( - pwm_inst->address , - TACHSTATUS, - (uint_fast16_t)pwm_tach_id_mask - ); - } -} - -#ifdef __cplusplus -} -#endif diff --git a/drivers/fpga_ip/CorePWM/core_pwm.h b/drivers/fpga_ip/CorePWM/core_pwm.h deleted file mode 100644 index 5ab2141..0000000 --- a/drivers/fpga_ip/CorePWM/core_pwm.h +++ /dev/null @@ -1,1145 +0,0 @@ -/******************************************************************************* - * (c) Copyright 2008-2018 Microsemi SoC Products Group. All rights reserved. - * - * CorePWM driver API. - * - * SVN $Revision$ - * SVN $Date$ - */ -/*=========================================================================*//** - @mainpage CorePWM Bare Metal Driver. - - @section intro_sec Introduction - The CorePWM hardware IP which includes up to 16 pulse width modulated (PWM) - outputs and up to 16 tachometer inputs. The CorePWM bare metal software - driver is designed for use in systems with no operating system. - - The CorePWM driver provides: - - Functions to control the duty cycle of each independent PWM output. The - duty cycle control functions are identical for both the General Purpose - PWM and Low Ripple DAC modes of CorePWM. - - A function to control the positive and negative edges of each independent - PWM output. This function can only be used for CorePWM outputs configured - as General Purpose PWM. This function is useful for controlling the phase - between different PWM outputs. - - A function to generate left, centre or right aligned PWM output waveforms. - - Functions to enable and disable synchronous update of the PWM output - waveforms. - - Functions to enable and disable pulse stretching of the PWM output waveforms. - - Functions to configure and control the tachometer and measure the period of - tachometer input signals. - - Functions to control tachometer interrupts. - - @section driver_configuration Driver Configuration - The CorePWM driver is configured through calls to the PWM_init() function for - each CorePWM instance in the hardware design. The configuration parameters - include the CorePWM hardware instance base address and other runtime - parameters, such as the PWM clock prescale and period. - No CorePWM hardware configuration parameters are used by the driver, apart - from the CorePWM hardware instance base address. Hence, no additional - configuration files are required to use the driver. - - Configured PWM Register Widths - Each CorePWM instance in the hardware design is configured for the width of the - APB data bus, by the APB_DWIDTH configuration parameter. This parameter also - configures the width of CorePWM’s PRESCALE, PERIOD, PWMx_POSEDGE, PWMx_NEGEDGE - and DACx_LEVELOUT registers. The CorePWM driver’s PWM_init(), - PWM_set_duty_cycle(), PWM_set_edges() and PWM_generate_aligned_wave() functions - write values to these registers via one or more of the parameters prescale, - period, duty_cycle, pos_edge or neg_edge – all of type uint32_t. It is your - responsibility to ensure that the values passed by these parameters are within - the range 0 to (2^APB_DWIDTH - 1), where APB_DWIDTH is 8, 16 or 32 dependent - upon your CorePWM hardware configuration, The return value from the - PWM_get_duty_cycle() function is also within the range 0 to (2^APB_DWIDTH - 1). - - Note: Failure to keep the prescale, period, duty_cycle, pos_edge and neg_edge - parameter values within the range 0 to (2^APB_DWIDTH - 1) will result - in unintended CorePWM register settings. - - Fixed PWM Period or Prescale Register Values - The prescale and period parameter values passed to the PWM_init() function may - not have any effect if fixed values were selected for the PRESCALE and PERIOD - registers in the hardware configuration of CorePWM. When fixed values are - selected for these registers, the driver cannot overwrite the fixed values. - - Fixed PWM Positive or Negative Edge Register Values - The pos_edge and neg_edge parameter values passed to the PWM_set_edges() - function, and the duty_cycle parameter value passed to the PWM_set_duty_cycle() - and PWM_generate_aligned_wave() functions, may not have the desired effect if - fixed values were selected for the PWMx_POSEDGE (positive edge) or - PWMx_NEGEDGE (negative edge) registers in the hardware configuration of - CorePWM. When fixed values are selected for these registers, the driver cannot - overwrite the fixed values. - - Synchronized Update of PWM Output Waveforms - The configuration of the CorePWM instance in the hardware design must enable - the shadow update register for each PWM channel that requires synchronous output - waveform updates. The PWM_enable_synch_update() and PWM_disable_synch_update() - functions will only affect PWM channels that have their shadow update registers - enabled in hardware. - - @section theory_op Theory of Operation - The CorePWM software driver is designed to allow the control of multiple - instances of CorePWM. Each instance of CorePWM in the hardware design is - associated with a single instance of the pwm_instance_t structure in the - software. - You need to allocate memory for one unique pwm_instance_t structure instance - for each CorePWM hardware instance.The contents of these data structures are - initialized during calls to function PWM_init(). A pointer to the structure - is passed to subsequent driver functions in order to identify the CorePWM - hardware instance you wish to perform the requested operation on. - - Note: Do not attempt to directly manipulate the content of pwm_instance_t - structures. This structure is only intended to be modified by the driver - function. - - Initialization - The PWM granularity is configured through the PWM_init() function prescale - parameter. The PWM granularity specifies the resolution of the PWM output - waveforms for the targeted CorePWM instance. It is also sometimes called the - PWM period count time base. It is defined by the following equation: - PWM_GRANULARITY = SYS_CLOCK_PERIOD * ( prescale + 1 ) - Where SYS_CLOCK_PERIOD is the period of the system clock used to clock the - CorePWM hardware instance and prescale is the value of the prescale parameter - passed to function PWM_init(). - The PWM period is configured through the PWM_init() function period parameter. - It specifies the period of the PWM output waveforms for the targeted CorePWM - instance. The PWM period is defined by the following equation: - PWM_PERIOD = PWM_GRANULARITY * ( period + 1 ) - - Note: The prescale and period values passed to the PWM_init() function may not - have any effect if fixed values were selected for the prescale and period - in the hardware configuration of CorePWM. - - Note: The prescale and period parameters are not relevant to any PWM outputs - that were configured for Low Ripple DAC mode in the hardware configuration - of CorePWM. In this mode, their only role is in setting the interval between - synchronized register updates when the shadow register is enabled for the - PWM output. - - PWM Output Control - The waveform for each PWM output is specified through calls to the - PWM_set_duty_cycle() or PWM_set_edges() functions. Each PWM output is configured - as either a General Purpose PWM output or a Low Ripple DAC output in the hardware - configuration of CorePWM. In General Purpose PWM mode, either of the - PWM_set_duty_cycle() or PWM_set_edges() functions may be used to specify the PWM - output waveform. In Low Ripple DAC mode, only the PWM_set_duty_cycle() function - may be used to specify the PWM output waveform. The duty cycle of the PWM can be - read by calling PWM_get_duty_cyle(). - The waveform alignment of General Purpose PWM outputs can be set by calling - PWM_generate_aligned_wave(). - The PWM_enable_synch_update() function is used to enable the synchronous update - of a selected group of PWM channels. The PWM_disable_synch_update() is used to - terminate the synchronous update cycle after at least one PWM period has elapsed. - In synchronous mode the channel output waveforms are updated at the beginning of - the PWM period, which is useful for motor control and can be used to keep a - constant dead band space between channel waveforms. The configuration of the - CorePWM instance in the hardware design must enable the shadow update register - for each PWM channel that requires synchronous output waveform updates. When the - shadow register is enabled, the PWM_set_duty_cycle(), PWM_set_edges() and - PWM_generate_aligned_wave() functions set the new output waveform edge values in - the channel’s shadow register instead of directly in the edge registers. Then, a - call to the PWM_enable_synch_update() function updates the PWM channel’s output - waveform at the beginning of the next PWM period. Finally, a call to the - PWM_disable_synch_update() function completes the update cycle. - - Note: The PWM_enable_synch_update() and PWM_disable_synch_update() functions have - no affect on any PWM channels that do not have their shadow update registers - configured in hardware; these channels are always updated immediately, - asynchronous to the PWM period. - - Note: The pos_edge and neg_edge values passed to the PWM_set_edges() function, - and the duty_cycle value passed to the PWM_set_duty_cycle() and - PWM_generate_aligned_wave() functions, may not have the desired effect if - fixed values were selected for the positive or negative edge registers in - the hardware configuration of CorePWM. - - A typical sequence of function calls for PWM outputs is: - a call to function PWM_init() to initialize the CorePWM instance and pass it - values for the prescale and period; a call to either PWM_set_duty_cycle() or - PWM_set_edges() , or PWM_generate_aligned_wave() for each PWM output to specify - the output waveform; a call to PWM_enable() to enable a PWM output; and a call to - PWM_disable() to disable a PWM output.The function PWM_set_duty_cycle() and - PWM_generate_aligned_wave() will also enable the PWM output if it is not already - enabled. - - Tachometer Control - CorePWM also provides a tachometer interface. During the hardware design, the - CorePWM configuration mode should be set to either 1 - (PWM and TACH mode) or - 2 - (TACH only mode) which enables the tachometer interface. Each CorePWM hardware - instance supports up to 16 tachometer inputs. - The CorePWM tachometer is initialized through a call to the PWM_tach_init() function. - The PWM_tach_init() function should be called before any other CorePWM driver - tachometer functions to set up the tachometer prescale value, initialize the - measurement mode and disable interrupts. - The PWM_tach_set_mode() function is used to configure the tachometer input channels - for continuous or one time measurement of the input signal period. The - PWM_tach_clear_status() and PWM_tach_read_status() functions are used to clear and - read the measurement status bits for the tachometer input channels. When the status - bit indicates that a new input signal period measurement is available, the - PWM_tach_read_value() function is used to read the measured signal period value. - - A typical sequence of function calls for measurement of a tachometer input signal is: - a call to function PWM_init() to initialize the CorePWM instance and pass it values - for the prescale and period; a call to PWM_tach_init() to initialize a tachometer - input and pass it a tachometer prescale value; a call to PWM_tach_set_mode() to set - the tachometer measurement mode; next a call to PWM_tach_enable_irq(), if interrupts - are required; then a call to PWM_enable_stretch_pulse() to enable pulse stretching of - the PWM output; a call to PWM_tach_clear_status() to trigger new measurement of the - tachometer input signal period; a call to PWM_tach_read_status(), if interrupts are - not used, to verify that input period value has been updated in the TACHPULSEDUR - register; now a call to PWM_tach_read_value() to read the measured period of tachometer - input signal; and finally a call to PWM_disable_stretch_pulse() to disable pulse - stretching of the PWM output and resume a previously programmed PWM output waveform - pattern. - - Interrupt Control - Interrupts generated by CorePWM tachometer status changes are controlled using the - following functions: - - PWM_tach_enable_irq() - - PWM_tach_disable_irq() - - PWM_tach_clear_irq() - - PWM_tach_get_irq_source() - The PWM_tach_get_irq_source() function is used identify which CorePWM tachometer - input channel has generated an interrupt, among all the tachometer input channels - that have interrupts enabled. - - *//*=========================================================================*/ -#ifndef CORE_PWM_H_ -#define CORE_PWM_H_ - -#include "cpu_types.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/*-------------------------------------------------------------------------*//** - Definition for tachometer measurement mode. - CorePWM allows the tachometer input measurement mode to be configured. The - following constants are used as an argument to the PWM_tach_set_mode() - function to specify the tachometer input measurement mode. - */ -#define TACH_CONTINUOUS 0 -#define TACH_ONE_SHOT 1 - -/*-------------------------------------------------------------------------*//** - PWM identifiers. The identifiers defined in this enumeration are used to - identify individual PWM outputs. They are used as argument to most CorePWM - driver functions to identify the PWM controlled by a function call. - */ -typedef enum { - PWM_1 = 1, - PWM_2, - PWM_3, - PWM_4, - PWM_5, - PWM_6, - PWM_7, - PWM_8, - PWM_9, - PWM_10, - PWM_11, - PWM_12, - PWM_13, - PWM_14, - PWM_15, - PWM_16 -} pwm_id_t; - -/*-------------------------------------------------------------------------*//** - The pwm_tach_id_t type is used to identify individual CorePWM tachometer - inputs. The inputs are used as an argument to most CorePWM driver functions - to identify the PWM tachometer input controlled by a function call. - */ -typedef enum { - PWM_TACH_INVALID = 0, - PWM_TACH_1, - PWM_TACH_2, - PWM_TACH_3, - PWM_TACH_4, - PWM_TACH_5, - PWM_TACH_6, - PWM_TACH_7, - PWM_TACH_8, - PWM_TACH_9, - PWM_TACH_10, - PWM_TACH_11, - PWM_TACH_12, - PWM_TACH_13, - PWM_TACH_14, - PWM_TACH_15, - PWM_TACH_16 -} pwm_tach_id_t; - -/*-------------------------------------------------------------------------*//** - The pwm_wave_align_t type is used to align the duty cycle of the PWM output - waveform within the period of the PWM output waveform. A value of this type - is used as an argument to the PWM_generate_aligned_wave() function. - - Note: The duty cycle corresponds to the number of period ticks for which - the PWM output will remain high. - */ -typedef enum { - PWM_LEFT_ALIGN, - PWM_CENTER_ALIGN, - PWM_RIGHT_ALIGN -} pwm_wave_align_t; - -/*-------------------------------------------------------------------------*//** - The pwm_tach_prescale_t type is used to select the PCLK prescale divisor for - the CorePWM tachometer. A value of this type is used as an argument to the - PWM_tach_init() function. - */ -typedef enum pwm_tach_prescale { - TACH_PRESCALE_PCLK_DIV_1 = 0x0000, - TACH_PRESCALE_PCLK_DIV_2 = 0x0001, - TACH_PRESCALE_PCLK_DIV_4 = 0x0002, - TACH_PRESCALE_PCLK_DIV_8 = 0x0003, - TACH_PRESCALE_PCLK_DIV_16 = 0x0004, - TACH_PRESCALE_PCLK_DIV_32 = 0x0005, - TACH_PRESCALE_PCLK_DIV_64 = 0x0006, - TACH_PRESCALE_PCLK_DIV_128 = 0x0007, - TACH_PRESCALE_PCLK_DIV_256 = 0x0008, - TACH_PRESCALE_PCLK_DIV_512 = 0x0009, - TACH_PRESCALE_PCLK_DIV_1024 = 0x000A, - TACH_PRESCALE_PCLK_DIV_2048 = 0x000B -} pwm_tach_prescale_t; - -/*-------------------------------------------------------------------------*//** - This structure is used to identify the various CorePWM hardware instances in - your system. Your application software should declare one instance of this - structure for each instance of CorePWM in your system. The function PWM_init() - Initializes this structure. A pointer to an initialized instance of the - structure should be passed as the first parameter to the CorePWM driver - functions, to identify which CorePWM hardware instance should perform the - requested operation. - */ -typedef struct pwm_instance -{ - addr_t address; -} pwm_instance_t; - -/*-------------------------------------------------------------------------*//** - The PWM_init() function initializes a CorePWM hardware instance and the - data structure associated with the CorePWM hardware instance. It disables - all PWM outputs and sets the prescale and period value for the PWM. This - function should be called before any other CorePWM driver functions. - - @param pwm_inst - Pointer to a PWM_instance_t structure holding all relevant data associated - with the target CorePWM hardware instance. This pointer will be used to - identify the target CorePWM hardware instance in subsequent calls to the - CorePWM functions. - - @param base_addr - The base_address parameter is the base address in the processor's memory map - for the registers of the CorePWM hardware instance being initialized. - - @param prescale - The prescale parameter is used to specify the PWM period count time base. - It specifies the PWM granularity. - The value of this parameter should be between 0 and (2^APB_DWIDTH - 1) where - APB_DWIDTH is the value selected for the APB_DWIDTH in the instantiation of - the CorePWM DirectCore hardware instance. - PWM_GRANULARITY = system_clock_period * (prescale + 1) - - @param period - The period parameter specifies the period of the PWM cycles. - The value of this parameter should be between 1 and (2^APB_DWIDTH - 1) where - APB_DWIDTH is the value selected for the APB_DWIDTH in the instantiation of - the CorePWM DirectCore hardware instance. - PWM_PERIOD = PWM_GRANULARITY * (period + 1) - - @return none. - - Example: - @code - #define COREPWM_BASE_ADDR 0xC0000000 - #define PWM_PRESCALE 0 - #define PWM_PERIOD 10 - - pwm_instance_t the_pwm; - - void system_init( void ) - { - PWM_init( &the_pwm, COREPWM_BASE_ADDR, PWM_PRESCALE, PWM_PERIOD ) ; - } - @endcode - */ -void PWM_init -( - pwm_instance_t * pwm_inst, - addr_t base_addr, - uint32_t prescale, - uint32_t period -); -/*-------------------------------------------------------------------------*//** - The PWM_enable() function enables the specified PWM output. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_id - The pwm_id parameter identifies the target PWM output. - - @return - none. - - Example : - The following call will enable PWM 1. - @code - PWM_enable(&the_pwm, PWM_1); - @endcode - */ -void PWM_enable -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id -); - -/*-------------------------------------------------------------------------*//** - The PWM_disable() function disables the specified PWM output. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_id - The pwm_id parameter identifies the target PWM output. - - @return - none. - - Example: - The following call will disable PWM 1. - @code - PWM_disable(&the_pwm, PWM_1); - @endcode - */ -void PWM_disable -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id -); - -/*-------------------------------------------------------------------------*//** - The PWM_enable_synch_update() function enables synchronous update of PWM - outputs. In synchronous mode, a selected group of PWM outputs are updated - at the beginning of the PWM period, which is useful for motor control and - can be used to keep a constant dead band space between output waveforms. - Configuration updates for all of the selected PWM outputs are synchronized - to the beginning of the PWM period, allowing precise updates and maintaining - phase alignments between outputs. - - Note: The configuration of the CorePWM instance in the hardware design must - enable the shadow update register for each PWM channel that requires - synchronous output waveform updates. This function has no affect on any - PWM channel that does not have its shadow update register configured in - hardware. - - Note: The PWM_set_duty_cycle(), PWM_set_edges() or PWM_generate_aligned_wave() - functions must be called to set the new output waveform edge values in - the channel’s shadow register before using a call to the - PWM_enable_synch_update() function to enable the update. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @return - none. - - Example: - Enable synchronous update of the duty cycle for the PWM 1 and PWM 2 outputs. - @code - uint32_t duty_cycle = 2; - PWM_set_duty_cycle( &the_pwm, PWM_1, duty_cycle ); - PWM_set_duty_cycle( &the_pwm, PWM_2, duty_cycle ); - PWM_enable_synch_update( &the_pwm ); - wait_more_than_one_period(); - PWM_disable_synch_update( &the_pwm ); - @endcode - */ -void PWM_enable_synch_update -( - pwm_instance_t * pwm_inst -); - -/*-------------------------------------------------------------------------*//** - The PWM_disable_synch_update() function disables synchronous update of PWM - outputs. The PWM_disable_synch_update() is used to terminate a synchronous - update cycle after at least one PWM period has elapsed. - - Note: The configuration of the CorePWM instance in the hardware design must - enable the shadow update register for each PWM channel that requires - synchronous output waveform updates. This function has no affect on - any PWM channel that does not have its shadow update register - configured in hardware. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @return - none. - - Example: - The call to PWM_disable_synch_update() below will disable synchronous - update of PWM outputs. - @code - PWM_enable_synch_update( &the_pwm ); - wait_more_than_one_period(); - PWM_disable_synch_update(&the_pwm); - @endcode - */ -void PWM_disable_synch_update -( - pwm_instance_t * pwm_inst -); - -/*-------------------------------------------------------------------------*//** - The PWM_set_duty_cycle() function is used for setting the duty cycle of a - PWM output. - - Note: It will also enable the PWM output if it is not already enabled. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_id - The pwm_id parameter identifies the target PWM output. - - @param duty_cycle - The duty_cycle parameter specifies the PWM output duty cycle. - In General Purpose PWM mode: - This parameter corresponds to the number of period ticks for which - the PWM output will remain high. The value of this parameter should be - between 0 and the value of the period selected for the call to PWM_init(). - - In Low Ripple DAC mode: - This parameter corresponds to the average density duty cycle. The value - of this parameter should be between 0 and (2^APB_DWIDTH - 1) where - APB_DWIDTH is the value selected for the APB_DWIDTH in the instantiation - of the CorePWM DirectCore hardware instance. This sets the average - density of the PWM output high pulses to between 0% and 100% in proportion - to the duty_cycle value as a percentage of the (2^APB_DWIDTH - 1) value. - - Note: The only role that prescale and period play in Low Ripple DAC mode is - to set the point when synchronized register updates will take place, - if the shadow register is enabled for a PWM output. - - @return - none. - - Example: - The following example sets the duty cycle of PWM 1 to the value 2. - @code - uint32_t duty_cycle = 2; - PWM_set_duty_cycle( &the_pwm, PWM_1, duty_cycle ); - - @endcode - */ -void PWM_set_duty_cycle -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id, - uint32_t duty_cycle -); - -/*-------------------------------------------------------------------------*//** - The PWM_set_edges() function is used to configure the positive and negative - edge of the specified PWM output. The PWM output waveform is controlled by - specifying the value of period counter at which the output will rise and fall. - - Note: The PWM_set_edges() function does not enable the PWM output. You must - call the PWM_enable() function to enable the PWM output, either before - or after calling the PWM_set_edges() function. - - Note: If you specify the same value for both the positive edge and the - negative edge, this will set the PWM output waveform to toggle mode - (50% duty cycle). The PWM output waveform will toggle high or low in - each succeeding PWM period when the period counter reaches the edge - value set by this function. - - Note: The PWM_get_duty_cycle() function will return the value 0 when it is - called after using the PWM_set_edges() function to set the PWM output - waveform to toggle mode (50% duty cycle). A return value of 0 from the - PWM_get_duty_cycle() function normally means a 0% duty cycle, therefore - you must be alert to this exception if you use the PWM_set_edges() - function to manipulate the PWM output waveform edges. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify - the target CorePWM hardware instance. - - @param pwm_id - The pwm_id parameter identifies the target PWM output. - - @param pos_edge - The pos_edge parameter specifies the value of the period counter at which - the PWM output identified by pwm_id will rise from low to high. The value - of this parameter should be between 0 and the value of the period selected - for the call to PWM_init(). - - @param neg_edge - The neg_edge parameter specifies the value of the period counter at which - the PWM output identified by pwm_id will fall from high to low. The value - of this parameter should be between 0 and the value of the period selected - for the call to PWM_init(). - - @return - none. - - Example: - The following example sets the positive and negative edges of PWM 1 to 0 - and 2 respectively. - @code - uint32_t pos_edge = 0; - uint32_t neg_edge = 2; - PWM_set_edges( &the_pwm, PWM_1, pos_edge, neg_edge ); - - @endcode - */ -void PWM_set_edges -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id, - uint32_t pos_edge, - uint32_t neg_edge -); - -/*-------------------------------------------------------------------------*//** - The PWM_get_duty_cycle() function returns the current duty cycle of the - specified PWM output. The duty cycle corresponds to the number of period - ticks during which the output remains high and should be between 0 and the - value of the period selected for the call to PWM_init(). - - Note: Duty Cycle (in %) can be calculated as follows: - Duty Cycle (%) = ( (returned duty cycle value) / (period +1) )*100 - - Note: The PWM_get_duty_cycle() function is intended to return the duty cycle - previously set through calls to the PWM_set_duty_cycle() or - PWM_generate_aligned_wave() functions. - - Note: A returned duty cycle value of 0 normally means a 0% duty cycle. However, - the PWM_get_duty_cycle() function will also return the value 0 when it - is called after using the PWM_set_edges() function to set the PWM output - waveform to toggle mode. In this case a return value of 0 does not mean - a 0% duty cycle; rather it means that the PWM output waveform is in - toggle mode. Refer to the description of the PWM_set_edges() function - for a description of toggle mode. You must be alert to this exception if - you use the PWM_set_edges() function to manipulate the PWM output - waveform edges. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_id - The pwm_id parameter identifies the target PWM output. - - @return - This function returns the duty cycle of the PWM output as a 32 bit unsigned - integer. The duty cycle is the number of period ticks during which the - output is high. - - Note: A returned duty cycle value of 0 normally means the PWM output is - constantly low, however it may also indicate that the PWM output - waveform is set to toggle mode (50% duty cycle). Refer to the note - in the function description. - - Example: - Read and assigns current duty cycle value to a variable. - @code - uint32_t duty_cycle ; - duty_cycle = PWM_get_duty_cycle( &the_pwm, PWM_1 ); - - @endcode - */ -uint32_t PWM_get_duty_cycle -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id -); - -/*-------------------------------------------------------------------------*//** - The PWM_generate_aligned_wave() function is used to align the duty_cycle of - the PWM output waveform within the period of the PWM output waveform. - Three PWM output waveform alignment options are supported: - Left Aligned Waveform - Center Aligned Waveform - Right Aligned Waveform - The PWM_generate_aligned_wave() function sets the appropriate positive edge - and negative edge values to achieve the specified alignment for the PWM output - waveform. - Note: It will also enable the PWM output if it is not already enabled. - - The diagram below shows the possible waveform alignments: - Assume PWM Prescale = 0, so that PWM Period granularity = clock period. - Each dash & hyphen in this diagram represents one clock period. - PWM Period = 13. Duty_cycle = 4. - - - |<-------- Period ------> | - _ _ _ _ _ _ _ _ - | | | | - _ _ _| |_ _ _ _ _ _ _ _ _ _| |_ _ _ - 0 4 0 - |-- |---| - V - Duty Cycle - _ _ _ _ _ _ _ _ - | | | | --> Left Aligned Waveform - _ _ _| |_ _ _ _ _ _ _ _ _ _| |_ _ _ - 0 4 0 - | _ _ _ _ | - | | | | --> Center Aligned Waveform - _ _ _|_ _ _ _ _ | |_ _ _ _ |_ _ _ _ _ _ _ - 0 5 9 0 - _ _ _ _| - | | --> Right Aligned Waveform - _ _ _ _ _ _ _ _ _ _ _ _ _| |_ _ _ _ _ _ _ - 0 10 0 - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_id - The pwm_id parameter identifies the target PWM output. - - @param duty_cycle - The duty_cycle parameter specifies the PWM output duty cycle. The duty - cycle corresponds to the number of period ticks for which the PWM output - will remain high. The value of this parameter should be between 0 and - the value of the period selected for the call to PWM_init(). - - @param alignment_type - The alignment_type parameter specifies required alignment for the PWM - output waveform. Allowed values of type pwm_wave_align_t are: - PWM_LEFT_ALIGN - PWM_CENTER_ALIGN - PWM_RIGHT_ALIGN - - @return - none. - - Example: - The following example sets up PWM channels 1, 2 and 3 to generate left, center - and right aligned output waveforms respectively. - @code - PWM_generate_aligned_wave(&the_pwm, PWM_1, duty_cycle, LEFT_ALIGN); - PWM_generate_aligned_wave(&the_pwm, PWM_2, duty_cycle, CENTER_ALIGN); - PWM_generate_aligned_wave(&the_pwm, PWM_3, duty_cycle, RIGHT_ALIGN); - @endcode - */ -void PWM_generate_aligned_wave -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id, - uint32_t duty_cycle, - pwm_wave_align_t alignment_type -); - -/*-------------------------------------------------------------------------*//** - The PWM_enable_stretch_pulse() function is used to enable pulse stretching - for the specified PWM output. To accurately measure the speed of 3-wire fans, - it is necessary to turn on the fan periodically for long enough to get a - complete measurement of the tachometer signal from the fan. This stretching - of the PWM output pulse for a long duration is referred as PWM pulse - stretching. When pulse stretching is enabled, the PWM output is set to high - or low, dependent upon the configuration of the CorePWM instance in the - hardware design. The PWM_disable_stretch_pulse() function must be used to - disable PWM pulse stretching once the fan speed measurement is completed. - - Note: The configuration of the CorePWM instance in the hardware design must - select the PWM output level – high or low – that is set when PWM pulse - stretching is enabled. For example, to measure 3- wire fan speed, the - CorePWM hardware configuration should select a high stretch level for - the PWM output. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_id - The pwm_id parameter identifies the target PWM output. - - @return - none. - - Example: - The following function call enables the stretching of PWM output 1 pulse for - tachometer input measurement. - @code - PWM_enable_stretch_pulse(&the_pwm, PWM_1); - @endcode - */ -void PWM_enable_stretch_pulse -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id -); - -/*-------------------------------------------------------------------------*//** - The PWM_disable_stretch_pulse() function is used to disable pulse stretching - for the specified PWM output. This function must be called once your - application has completed the measurement of the tachometer input. When pulse - stretching is disabled, the PWM output resumes generation of its previously - programmed output waveform pattern. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_id - The pwm_id parameter identifies the target PWM output. - - @return - none. - - Example: - The following function call disables the stretching of the PWM 1 output - pulse after completing the tachometer input measurement. - @code - PWM_disable_stretch_pulse(&the_pwm, PWM_1); - @endcode - */ -void PWM_disable_stretch_pulse -( - pwm_instance_t * pwm_inst, - pwm_id_t pwm_id -); - -/*-------------------------------------------------------------------------*//** - The PWM_tach_init() function is used to initialize the configuration of - all of the CorePWM tachometer inputs. It sets the tachometer’s TACHPRESCALE - register to the value specified by the tach_prescale parameter. It sets the - tachometer measurement mode to continuous measurement for all tachometer - inputs. It disables the interrupts for all tachometer inputs and clears any - pending interrupts. - - Note: This function should be called before any other CorePWM driver - tachometer functions. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param tach_prescale - The tach_prescale value is used to select the PCLK prescale divisor for the - CorePWM tachometer. This determines the period counter time base for - tachometer measurements. Allowed values of type pwm_tach_prescale_t are: - TACH_PRESCALE_PCLK_DIV_1 - TACH_PRESCALE_PCLK_DIV_2 - TACH_PRESCALE_PCLK_DIV_4 - TACH_PRESCALE_PCLK_DIV_8 - TACH_PRESCALE_PCLK_DIV_16 - TACH_PRESCALE_PCLK_DIV_32 - TACH_PRESCALE_PCLK_DIV_64 - TACH_PRESCALE_PCLK_DIV_128 - TACH_PRESCALE_PCLK_DIV_256 - TACH_PRESCALE_PCLK_DIV_512 - TACH_PRESCALE_PCLK_DIV_1024 - TACH_PRESCALE_PCLK_DIV_2048 - - @return - none. - - Example: - The following call to PWM_tach_init() initializes the CorePWM tachometer and - sets the PCLK prescale divisor to 8 for tachometer measurements. - @code - pwm_tach_prescale_t tach_prescale = TACH_PRESCALE_PCLK_DIV_8; - PWM_tach_init(&the_pwm, tach_prescale); - @endcode - - */ -void PWM_tach_init -( - pwm_instance_t *pwm_inst, - pwm_tach_prescale_t tach_prescale -); - -/*-------------------------------------------------------------------------*//** - The PWM_tach_set_mode() function sets the measurement mode for the - specified tachometer input. This function selects how frequently the - tachometer input should be measured. There are two options for the measurement - mode: - Continuous measurement of tachometer input - One time measurement of tachometer input - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_tach_id - The pwm_tach_id parameter identifies the target tachometer input. - - @param pwm_tachmode - The pwm_tachmode parameter is used to specify the tachometer input - measurement mode. Allowed values for pwm_tachmode are: - TACH_CONTINUOUS - TACH_ONE_SHOT - - @return - none. - - Example: - The following example sets up tachometer input 1 for one time measurement. - @code - PWM_tach_set_mode(&the_pwm, PWM_TACH_1,TACH_ONE_SHOT); - @endcode - */ -void PWM_tach_set_mode -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id, - uint16_t pwm_tachmode -); - -/*-------------------------------------------------------------------------*//** - The PWM_tach_read_value() function reads the measured period of the - tachometer input signal from the TACHPULSEDUR register corresponding to - the specified tachometer input. The value returned is the number of timer - ticks between two successive positive (or negative) edges of the tachometer - input signal. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_tach_id - The pwm_tach_id parameter identifies the target tachometer input. - - @return - It returns the number of timer ticks between two successive positive - (or negative) edges of the tachometer input signal as a 16 bit unsigned - integer. - - Example: - Read and assign the value of the current period measurement for tachometer - input 1 to a variable. - @code - uint16_t tach_input_value ; - tach_input_value = PWM_tach_read_value(&the_pwm, PWM_TACH_1); - @endcode - */ -uint16_t PWM_tach_read_value -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id -); - -/*-------------------------------------------------------------------------*//** - The PWM_tach_clear_status() function is used to clear the tachometer - status bit for the specified tachometer input. This allows the tachometer - to take a new measurement of the input signal period and store it in the - TACHPULSEDUR register corresponding to the specified tachometer input. This - function is typically called when the user want to take a new reading of - the tachometer input signal period. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_tach_id - The pwm_tach_id parameter identifies the target tachometer input. - - @return - none. - - Example: - The following call clears the status bit for tachometer input 1 to begin - a new input period measurement. - @code - PWM_tach_clear_status(&the_pwm, PWM_TACH_1); - @endcode - */ -void PWM_tach_clear_status -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id -); - -/*-------------------------------------------------------------------------*//** - The PWM_tach_read_status() function returns the current status for the - specified tachometer input. This function returns 1 if the tachometer input - period measurement has been updated at least once since the status bit was - cleared,otherwise it returns 0. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_tach_id - The pwm_tach_id parameter identifies the target tachometer input. - - @return - It returns 1 if the tachometer input period measurement has been updated - at least once since the status bit was cleared, otherwise it returns 0. - - Example: - Read and assign the current status of tachometer input 1 to a variable. - @code - uint16_t tach_input_status ; - tach_input_status = PWM_tach_read_status(&the_pwm, PWM_TACH_1); - @endcode - */ -uint16_t PWM_tach_read_status -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id -); - -/*-------------------------------------------------------------------------*//** - The PWM_tach_get_irq_source() function is used identify which tachometer - input channel has generated an interrupt,among all the tachometer input - channels with interrupts enabled. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @return - It returns the pwm_tach_id_t identifier of the tachometer input generating - the interrupt. It returns 0 if no tachometer input is generating an interrupt. - - Example: - The following example returns the tachometer 1 identifier, PWM_TACH_1, - when PWM_tach_get_irq_source() is called, after the tachometer input 1 - period measurement has been completed by CorePWM. - @code - pwm_tach_id_t tach_input_no ; - PWM_tach_enable_irq( &the_pwm, PWM_TACH_1); - PWM_tach_clear_status( &the_pwm, PWM_TACH_1); - tach_input_no = PWM_tach_get_irq_source( &the_pwm ); - @endcode - */ -pwm_tach_id_t PWM_tach_get_irq_source -( - pwm_instance_t * pwm_inst -); -/*-------------------------------------------------------------------------*//** - The PWM_tach_enable_irq() function is used to enable interrupt generation - for the specified tachometer input channel. - - Note: CorePWM asserts its interrupt output signal, when a tachometer input - channel’s period measurement has been updated at least once since the - channel’s interrupt was last cleared, if the channel is enabled for - interrupt generation. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_tach_id - The pwm_tach_id parameter identifies the target tachometer input. - - @return - none. - - Example: - This call to PWM_tach_enable_irq() allows tachometer input 1 to generate an - interrupt, when its input signal period measurement value is updated. - @code - PWM_tach_enable_irq(&the_pwm, PWM_TACH_1); - @endcode - */ -void PWM_tach_enable_irq -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id -); - -/*-------------------------------------------------------------------------*//** - The PWM_tach_disable_irq() function is used to disable interrupt generation - for the specified tachometer input channel. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_tach_id - The pwm_tach_id parameter identifies the target tachometer input. - - @return - none. - - Example: - This call to PWM_tach_disable_irq() will prevent tachometer input 1 from - generating an interrupt when its input signal period measurement value is - updated. - @code - PWM_tach_disable_irq(&the_pwm, PWM_TACH_1); - @endcode - */ -void PWM_tach_disable_irq -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id -); - -/*-------------------------------------------------------------------------*//** - The PWM_tach_clear_irq() function is used to clear a pending interrupt - generated by the specified tachometer input channel. - - Note: The PWM_tach_clear_irq() function must be called as part of a PWM - tachometer interrupt service routine (ISR) in order to prevent the - same interrupt event retriggering a call to the PWM tachometer ISR. - - Note: Interrupts may also need to be cleared in the processor's interrupt - controller. - - @param pwm_inst - Pointer to a pwm_inst structure holding all relevant data associated with - the target CorePWM hardware instance. This pointer is used to identify the - target CorePWM hardware instance. - - @param pwm_tach_id - The pwm_tach_id parameter identifies the target tachometer input. - - @return - none. - - Example: - This call to PWM_tach_clear_irq() will clear a pending interrupt from tachometer - input 1. - @code - PWM_tach_clear_irq(&the_pwm, PWM_TACH_1); - @endcode - */ -void PWM_tach_clear_irq -( - pwm_instance_t * pwm_inst, - pwm_tach_id_t pwm_tach_id -); - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /*CORE_PWM_H_*/ diff --git a/drivers/fpga_ip/CorePWM/corepwm_regs.h b/drivers/fpga_ip/CorePWM/corepwm_regs.h deleted file mode 100644 index e2a7ec3..0000000 --- a/drivers/fpga_ip/CorePWM/corepwm_regs.h +++ /dev/null @@ -1,494 +0,0 @@ -/******************************************************************************* - * (c) Copyright 2008-2018 Microsemi SoC Products Group. All rights reserved. - * - * IP core registers definitions. This file contains the definitions required - * for accessing the IP core through the hardware abstraction layer (HAL). - * - * SVN $Revision$ - * SVN $Date$ -*******************************************************************************/ -#ifndef COREPWM_REGISTERS_H_ -#define COREPWM_REGISTERS_H_ - -#ifdef __cplusplus -extern "C" { -#endif - -/******************************************************************************* - * PRESCALE register: - *------------------------------------------------------------------------------ - * The system clock cycle is multiplied by the PRESCALE value, resulting in the - * minimum PERIOD count timebase - */ -#define PRESCALE_REG_OFFSET 0x00u - -/******************************************************************************* - * PERIOD register: - *------------------------------------------------------------------------------ - * The PRESCALE value is multiplied by the PERIOD value, yielding the PWM - * waveform cycle. Example: system clock = 40 ns, PRESCALE register = 255, - * PERIOD register = 127. The PWM waveforms will repeat every 40 ns x 256 x - * 128 = 1.31 ms. The resolution of the PWM waveforms will be 1.31ms / 128 = - * 10.23 micros. R/W 0h08 - */ -#define PERIOD_REG_OFFSET 0x04u - -/******************************************************************************* - * PWM_ENABLE_1 register: - *------------------------------------------------------------------------------ - * '1' enables each PWM output. R/W 0h00 - */ -#define PWM_ENABLE_1_REG_OFFSET 0x08u - -/******************************************************************************* - * PWM_ENABLE_2 register: - *------------------------------------------------------------------------------ - * '1' enables each PWM output. R/W 0h00 - */ -#define PWM_ENABLE_2_REG_OFFSET 0x0Cu - - -/******************************************************************************* - * PWM1_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM1 output with respect to the PERIOD resolution - */ -#define PWM1_POSEDGE_REG_OFFSET 0x10u - -/******************************************************************************* - * PWM1_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM1 output with respect to the PERIOD resolution - */ -#define PWM1_NEGEDGE_DACLEV_REG_OFFSET 0x14u - -/******************************************************************************* - * PWM2_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM2 output with respect to the PERIOD resolution - */ -#define PWM2_POSEDGE_REG_OFFSET 0x18u - -/******************************************************************************* - * PWM2_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM2 output with respect to the PERIOD resolution - */ -#define PWM2_NEGEDGE_DACLEV_REG_OFFSET 0x1Cu - -/******************************************************************************* - * PWM3_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM3 output with respect to the PERIOD resolution - */ -#define PWM3_POSEDGE_REG_OFFSET 0x20u - -/******************************************************************************* - * PWM3_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM3 output with respect to the PERIOD resolution - */ -#define PWM3_NEGEDGE_DACLEV_REG_OFFSET 0x24u - -/******************************************************************************* - * PWM4_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM4 output with respect to the PERIOD resolution - */ -#define PWM4_POSEDGE_REG_OFFSET 0x28u - -/******************************************************************************* - * PWM4_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM4 output with respect to the PERIOD resolution - */ -#define PWM4_NEGEDGE_DACLEV_REG_OFFSET 0x2Cu - -/******************************************************************************* - * PWM5_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM5 output with respect to the PERIOD resolution - */ -#define PWM5_POSEDGE_REG_OFFSET 0x30u - -/******************************************************************************* - * PWM5_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM5 output with respect to the PERIOD resolution - */ -#define PWM5_NEGEDGE_DACLEV_REG_OFFSET 0x34u - -/******************************************************************************* - * PWM6_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM6 output with respect to the PERIOD resolution - */ -#define PWM6_POSEDGE_REG_OFFSET 0x38u - -/******************************************************************************* - * PWM6_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM6 output with respect to the PERIOD resolution - */ -#define PWM6_NEGEDGE_DACLEV_REG_OFFSET 0x3Cu - -/******************************************************************************* - * PWM7_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM7 output with respect to the PERIOD resolution - */ -#define PWM7_POSEDGE_REG_OFFSET 0x40u - -/******************************************************************************* - * PWM7_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM7 output with respect to the PERIOD resolution - */ -#define PWM7_NEGEDGE_DACLEV_REG_OFFSET 0x44u - -/******************************************************************************* - * PWM8_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM8 output with respect to the PERIOD resolution - */ -#define PWM8_POSEDGE_REG_OFFSET 0x48u - -/******************************************************************************* - * PWM8_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM8 output with respect to the PERIOD resolution - */ -#define PWM8_NEGEDGE_DACLEV_REG_OFFSET 0x4Cu - -/******************************************************************************* - * PWM9_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM9 output with respect to the PERIOD resolution - */ -#define PWM9_POSEDGE_REG_OFFSET 0x50u - -/******************************************************************************* - * PWM9_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM9 output with respect to the PERIOD resolution - */ -#define PWM9_NEGEDGE_DACLEV_REG_OFFSET 0x54u - -/******************************************************************************* - * PWM10_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM10 output with respect to the PERIOD resolution - */ -#define PWM10_POSEDGE_REG_OFFSET 0x58u - -/******************************************************************************* - * PWM10_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM10 output with respect to the PERIOD resolution - */ -#define PWM10_NEGEDGE_DACLEV_REG_OFFSET 0x5Cu - -/******************************************************************************* - * PWM11_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM11 output with respect to the PERIOD resolution - */ -#define PWM11_POSEDGE_REG_OFFSET 0x60u - -/******************************************************************************* - * PWM11_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM11 output with respect to the PERIOD resolution - */ -#define PWM11_NEGEDGE_DACLEV_REG_OFFSET 0x64u - -/******************************************************************************* - * PWM12_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM12 output with respect to the PERIOD resolution - */ -#define PWM12_POSEDGE_REG_OFFSET 0x68u - -/******************************************************************************* - * PWM12_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM12 output with respect to the PERIOD resolution - */ -#define PWM12_NEGEDGE_DACLEV_REG_OFFSET 0x6Cu - -/******************************************************************************* - * PWM13_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM13 output with respect to the PERIOD resolution - */ -#define PWM13_POSEDGE_REG_OFFSET 0x70u - -/******************************************************************************* - * PWM13_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM13 output with respect to the PERIOD resolution - */ -#define PWM13_NEGEDGE_DACLEV_REG_OFFSET 0x74u - -/******************************************************************************* - * PWM14_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM14 output with respect to the PERIOD resolution - */ -#define PWM14_POSEDGE_REG_OFFSET 0x78u - -/******************************************************************************* - * PWM14_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM14 output with respect to the PERIOD resolution - */ -#define PWM14_NEGEDGE_DACLEV_REG_OFFSET 0x7Cu - -/******************************************************************************* - * PWM15_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM15 output with respect to the PERIOD resolution - */ -#define PWM15_POSEDGE_REG_OFFSET 0x80u - -/******************************************************************************* - * PWM15_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM15 output with respect to the PERIOD resolution - */ -#define PWM15_NEGEDGE_DACLEV_REG_OFFSET 0x84u - -/******************************************************************************* - * PWM16_POSEDGE register: - *------------------------------------------------------------------------------ - * Sets positive edge of PWM16 output with respect to the PERIOD resolution - */ -#define PWM16_POSEDGE_REG_OFFSET 0x88u - -/******************************************************************************* - * PWM16_NEGEDGE_DACLEV register: - *------------------------------------------------------------------------------ - * Sets negative edge of PWM16 output with respect to the PERIOD resolution - */ -#define PWM16_NEGEDGE_DACLEV_REG_OFFSET 0x8Cu - -/******************************************************************************* - * SYNC_UPDATE register: - *------------------------------------------------------------------------------ - * When this bit is set to "1" and SHADOW_REG_EN is selected, all POSEDGE and - * NEGEDGE registers are updated synchronously. Synchronous updates to the PWM - * waveform occur only when SHADOW_REG_EN is asserted and SYNC_UPDATE is set to - * “1”.When this bit is set to "0", all the POSEDGE and NEGEDGE registers are - * updated asynchronously. - */ -#define SYNC_UPDATE_REG_OFFSET 0xE4u - -/******************************************************************************* - * PWM_STRETCH register: - *------------------------------------------------------------------------------ - * When 0, the state of PWMx is determined by PWMx_POSEDGE NEGEDGE register - * settings. - * When 1, PWMx is set to PWM_STRETCH_VALUEx. - */ -#define PWM_STRETCH_REG_OFFSET 0x90u - -/******************************************************************************* - * TACHPRESCALE register: - *------------------------------------------------------------------------------ - * Clock prescale setting. Determines effective clock rate for the counter - * based on PCLK: - * 0000 = divide by 1 (default) - * 0001 = divide by 2 - * 0010 = divide by 4 - * 0011 = divide by 8 - * 0100 = divide by 16 - * 0101 = divide by 32 - * 0110 = divide by 64 - * 0111 = divide by 128 - * 1000 = divide by 256 - * 1001 = divide by 512 - * 1010 = divide by 1,024 - * 1011 = divide by 2,048 - * Others = divide by 2,048 - */ -#define TACHPRESCALE_REG_OFFSET 0x94u - -/******************************************************************************* - * TACHSTATUS register: - *------------------------------------------------------------------------------ - * TACH status register which contains one bit per TACH input, indicating - * whether the respective TACHPULSEDUR register has been updated at - * least once since the bit was cleared. The bits in this register gets cleared - * by writing “1”, “0” does not have any effect. - */ -#define TACHSTATUS_REG_OFFSET 0x98u - -/******************************************************************************* - * TACHIRQMASK register: - *------------------------------------------------------------------------------ - * TACH interrupt mask register with one bit per tachometer signal, - * indicating whether CorePWM needs to assert an interrupt if the respective - * bit in TACHSTATUS register is asserted. - */ -#define TACHIRQMASK_REG_OFFSET 0x9Cu - -/******************************************************************************* - * TACHMODE register: - *------------------------------------------------------------------------------ - * TACH Mode. Sets the measurement mode used for each TACH input. - * When 0: TACH input is continuously measured and stored in the respective - * TACHPULSEDUR register . - * When 1: A one-time measurement is performed only if the respective bit in - * TACHSTATUS register is cleared - */ -#define TACHMODE_REG_OFFSET 0xA0u - -/******************************************************************************* - * TACHPULSEDUR_0 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[0].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_0_REG_OFFSET 0xA4u - -/******************************************************************************* - * TACHPULSEDUR_1 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[1].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_1_REG_OFFSET 0xA8u - -/******************************************************************************* - * TACHPULSEDUR_2 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[2].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_2_REG_OFFSET 0xACu - -/******************************************************************************* - * TACHPULSEDUR_3 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[3].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_3_REG_OFFSET 0xB0u - -/******************************************************************************* - * TACHPULSEDUR_4 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[4].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_4_REG_OFFSET 0xB4u - -/******************************************************************************* - * TACHPULSEDUR_5 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[5].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_5_REG_OFFSET 0xB8u - -/******************************************************************************* - * TACHPULSEDUR_6 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[6].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_6_REG_OFFSET 0xBCu - -/******************************************************************************* - * TACHPULSEDUR_7 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[7].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_7_REG_OFFSET 0xC0u - -/******************************************************************************* - * TACHPULSEDUR_8 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[8].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_8_REG_OFFSET 0xC4u - -/******************************************************************************* - * TACHPULSEDUR_9 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[9].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_9_REG_OFFSET 0xC8u - -/******************************************************************************* - * TACHPULSEDUR_10 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[10].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_10_REG_OFFSET 0xCCu - -/******************************************************************************* - * TACHPULSEDUR_11 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[11].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_11_REG_OFFSET 0xD0u - -/******************************************************************************* - * TACHPULSEDUR_12 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[12].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_12_REG_OFFSET 0xD4u - -/******************************************************************************* - * TACHPULSEDUR_13 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[13].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_13_REG_OFFSET 0xD8u - -/******************************************************************************* - * TACHPULSEDUR_14 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[14].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_14_REG_OFFSET 0xDCu - -/******************************************************************************* - * TACHPULSEDUR_15 register: - *------------------------------------------------------------------------------ - * Stores the number of timer ticks between two successive positive (or - * negative) edges from the TACHIN[15].If the number of timer ticks exceeds - * the maximum register value, the value of 0 shall be stored instead. - */ -#define TACHPULSEDUR_15_REG_OFFSET 0xE0u - -#ifdef __cplusplus -} -#endif - -#endif /* COREPWM_REGISTERS_H_*/