-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathabout.html
156 lines (135 loc) · 7.65 KB
/
about.html
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
<!DOCTYPE HTML>
<html>
<head>
<title>Wafer Defect Classifier - About</title>
<meta charset="utf-8" />
<meta name="viewport" content="width=device-width, initial-scale=1, user-scalable=no" />
<link rel="stylesheet" href="assets/css/main.css" />
<noscript><link rel="stylesheet" href="assets/css/noscript.css" /></noscript>
</head>
<body class="no-sidebar is-preload">
<div id="page-wrapper">
<!-- Header -->
<div id="header">
<!-- Inner -->
<div class="inner">
<header>
<h1><a href="index.html" id="logo">Semiconductor Wafer Automated Defect Classification</a></h1>
</header>
</div>
<!-- Nav -->
<nav id="nav">
<ul>
<li><a href="index.html">Home</a></li>
<li><a href="about.html">About Project</a></li>
<li><a href="yield-value.html">Value Proposition</a></li>
<li><a href="description.html">Model Description</a></li>
<li><a href="demo.html">Demonstration</a></li>
<li><a href="contact-us.html">Contact Us</a></li>
</ul>
</nav>
</div>
<!-- Main -->
<div class="wrapper style1">
<div class="container">
<article id="main" class="special">
<header>
<h2><a href="#">Wafer Defect Classifier</a></h2>
</header>
<section>
<header>
<h3>Project Introduction</h3>
</header>
<p>
Semiconductor chips are used in a variety of applications (mobile phones, data centers, smart homes, security, to name a few) that drive integration of our life into the digital world. It is critical to achieve desired performance levels, high yield, and low cost of such chips to drive broad adoption in the industry. The manufacturing of these chips happens on 300mm silicon wafer and the process is complex with hundreds of steps, equipment, and human interaction. During the manufacturing process, physical defects (particles, scratches) and variability (thickness, uniformity) can significantly affect yield and need to be controlled and eliminated. However, many times such defects might not be visible or detected at the point of occurrence and are only caught with electrical signals at end of line. This can be late in the process but still need to be correlated back to the source of defects so that the source can be fixed to avoid continued occurence of such defects.
</p>
</section>
<section>
<header>
<h3>Project Objectives</h3>
</header>
<p>
There are three primary objectives for the final product from this project. The final product will be a machine learning / artificial intelligence algorithm that will be able to take a wafer as an input with electrical defect signature and perform the following tasks as output.
<ul>
<li>Classify wafers into good (no defect pattern) versus bad (with defect pattern)</li>
<li>Identify defect pattern for the wafer (e.g., edge, center, donut, local, etc.)</li>
<li>Identify if the defect pattern has happened before and the source of the defects</li>
<li>Based on the defects, classify the wafers into quality groups - Tier 1, Tier 2, and Tier 3</li>
</ul>
</p>
</section>
<section>
<header>
<h3>Value Proposition</h3>
</header>
<p>
On wafer electrical signal output is the ultimate source of truth with best resolution for defects at bit level. Our ability to use the on wafer electrical signal at bit level collected at probe (end of processing line), to identify defect patterns on wafer, correlate them to the source of the defect generating step or equipment, isolate and fix the root cause, and eventually be able to correlate the equipment signals with such defects on wafers can be extremely powerful in reducing waste, improving yield, and overall cost. The value proposition of this project can be summarized to the following key points:
<ul>
<li>Improved wafer yield resulting in lower die cost</li>
<li>Faster response to identify and mitigate / fix defect sources</li>
<li>Efficient use of human resources by automating defect classification and wafer disposition</li>
<li>Ability to predict probability of defect sources and addressing them ahead of defect occurrence</li>
</ul>
</p>
</section>
<section>
<header>
<h3>Users</h3>
</header>
<p>
An Artificial Intelligence (AI) / Neural Network based solution that can take electrical wafer maps and classify them into good vs bad wafers, identify defect patterns, and predict potential sources of such defects can be extremely powerful for semiconductor manufacturers. Companies that run thousands of wafers (semicnductor manufacturers) can utilize this solution to quickly identify issue source and fix them, which can be powerful to reduce waste, cost, and increase overall revenue / profitability.
</p>
<p>
In addition to the semiconductor manufacturers as primary users, such solutions can also be useful for semiconductor equipment manufacturers who will be interested in integrating this solution to with their equipment sales to be able to provide it as a service to their customers (semi maufacturers). Modeling comapnies like Synopsys and Cadence will also be interested in such a solution so that they can integrate it as a module with their Design and Lithography package solutions. By integrating the ability to correlate wafer maps with inline defect sources, modeling companies will be able to establish connection between Design, Design rule, process sensitivities, with end of line defect sources and claim to be able to identify and contain the defect sources with higher accuracy and predictability.
</p>
<ul>
<li>Semiconductor Companies - Intel, Micron, Texas Instruments, TSMC, Samsung, Hynix, Kioxia, to name a few</li>
<li>Semiconductor Equipment Manufacturers - Applied Materials, LAM, KLA, TEL, Hitachi, to name a few</li>
<li>Modeling Comapnies - Synopsys, Cadence, Seimens, to name a few</li>
</ul>
</p>
</section>
<section>
<header>
<h3>Model Dataset Used for this Analysis</h3>
</header>
<p>
Say something interesting about our data
<ul>
<li><a href="https://www.kaggle.com/co1d7era/mixedtype-wafer-defect-datasets">Synthetic Defect Maps</a></li>
<li><a href="https://www.kaggle.com/shawon10/wafer-defect-classification-by-deep-learning/data">WM-811K Wafer Map</a></li>
</ul>
</p>
</article>
<header>
<h3>How to use this</h3>
</header>
<p>
Exciting text here....
</p>
</div>
</div>
</div>
<!-- Footer -->
<div id="footer">
<!-- Contact -->
<!-- Contact -->
<section class="contact">
<header>
<h3>Want more information? <a href="contact-us.html">Contact Us.</a> </h3>
</header>
</section>
</div>
</div>
</div>
<!-- Scripts -->
<script src="assets/js/jquery.min.js"></script>
<script src="assets/js/jquery.dropotron.min.js"></script>
<script src="assets/js/jquery.scrolly.min.js"></script>
<script src="assets/js/jquery.scrollex.min.js"></script>
<script src="assets/js/browser.min.js"></script>
<script src="assets/js/breakpoints.min.js"></script>
<script src="assets/js/util.js"></script>
<script src="assets/js/main.js"></script>
</body>
</html>