This repository has been archived by the owner on Jan 10, 2025. It is now read-only.
forked from qmonnet/rbpf
-
Notifications
You must be signed in to change notification settings - Fork 185
/
Copy pathexercise_instructions.rs
546 lines (502 loc) · 20.9 KB
/
exercise_instructions.rs
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
#![allow(clippy::arithmetic_side_effects)]
#![cfg(all(feature = "jit", not(target_os = "windows"), target_arch = "x86_64"))]
// Copyright 2020 Solana Maintainers <maintainers@solana.com>
//
// Licensed under the Apache License, Version 2.0 <http://www.apache.org/licenses/LICENSE-2.0> or
// the MIT license <http://opensource.org/licenses/MIT>, at your option. This file may not be
// copied, modified, or distributed except according to those terms.
extern crate byteorder;
extern crate libc;
extern crate solana_rbpf;
extern crate test_utils;
extern crate thiserror;
use rand::{rngs::SmallRng, RngCore, SeedableRng};
use solana_rbpf::{
assembler::assemble,
ebpf,
memory_region::MemoryRegion,
program::{BuiltinFunction, BuiltinProgram, FunctionRegistry, SBPFVersion},
static_analysis::Analysis,
verifier::RequisiteVerifier,
vm::{Config, ContextObject, TestContextObject},
};
use std::sync::Arc;
use test_utils::create_vm;
macro_rules! test_interpreter_and_jit {
(register, $function_registry:expr, $location:expr => $syscall_function:expr) => {
$function_registry
.register_function_hashed($location.as_bytes(), $syscall_function)
.unwrap();
};
($executable:expr, $mem:tt, $context_object:expr $(,)?) => {
let expected_instruction_count = $context_object.get_remaining();
#[allow(unused_mut)]
let mut context_object = $context_object;
$executable.verify::<RequisiteVerifier>().unwrap();
let (
instruction_count_interpreter,
interpreter_final_pc,
_tracer_interpreter,
interpreter_result,
interpreter_mem,
) = {
let mut mem = $mem.clone();
let mem_region = MemoryRegion::new_writable(&mut mem, ebpf::MM_INPUT_START);
let mut context_object = context_object.clone();
create_vm!(
vm,
&$executable,
&mut context_object,
stack,
heap,
vec![mem_region],
None
);
let (instruction_count_interpreter, result) = vm.execute_program(&$executable, true);
(
instruction_count_interpreter,
vm.registers[11],
vm.context_object_pointer.clone(),
result.unwrap(),
mem,
)
};
#[cfg(all(feature = "jit", not(target_os = "windows"), target_arch = "x86_64"))]
{
#[allow(unused_mut)]
$executable.jit_compile().unwrap();
let mut mem = $mem;
let mem_region = MemoryRegion::new_writable(&mut mem, ebpf::MM_INPUT_START);
create_vm!(
vm,
&$executable,
&mut context_object,
stack,
heap,
vec![mem_region],
None
);
let (instruction_count_jit, result) = vm.execute_program(&$executable, false);
let tracer_jit = &vm.context_object_pointer;
if !TestContextObject::compare_trace_log(&_tracer_interpreter, tracer_jit) {
let analysis = Analysis::from_executable(&$executable).unwrap();
let stdout = std::io::stdout();
analysis
.disassemble_trace_log(&mut stdout.lock(), &_tracer_interpreter.trace_log)
.unwrap();
analysis
.disassemble_trace_log(&mut stdout.lock(), &tracer_jit.trace_log)
.unwrap();
panic!();
}
assert_eq!(
result.unwrap(),
interpreter_result,
"Unexpected result for JIT"
);
assert_eq!(
instruction_count_interpreter, instruction_count_jit,
"Interpreter and JIT instruction meter diverged",
);
assert_eq!(
interpreter_final_pc, vm.registers[11],
"Interpreter and JIT instruction final PC diverged",
);
assert_eq!(interpreter_mem, mem, "Interpreter and JIT memory diverged",);
}
if $executable.get_config().enable_instruction_meter {
assert_eq!(
instruction_count_interpreter, expected_instruction_count,
"Instruction meter did not consume expected amount"
);
}
};
}
macro_rules! test_interpreter_and_jit_asm {
($source:expr, $config:expr, $mem:tt, ($($location:expr => $syscall_function:expr),* $(,)?), $context_object:expr $(,)?) => {
#[allow(unused_mut)]
{
let mut config = $config;
config.enable_instruction_tracing = true;
let mut function_registry = FunctionRegistry::<BuiltinFunction<TestContextObject>>::default();
$(test_interpreter_and_jit!(register, function_registry, $location => $syscall_function);)*
let loader = Arc::new(BuiltinProgram::new_loader(config, function_registry));
let mut executable = assemble($source, loader).unwrap();
test_interpreter_and_jit!(executable, $mem, $context_object);
}
};
}
// BPF_ALU32_LOAD : Arithmetic and Logic
#[test]
fn fuzz_alu() {
let seed = 0xC2DB2F8F282284A0;
let mut prng = SmallRng::seed_from_u64(seed);
for src in 0..10 {
for dst in 0..10 {
for _ in 0..10 {
test_ins(false, format!("mov64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("add64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("sub64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("or64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("xor64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("and64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("lmul64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("uhmul64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("shmul64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("udiv64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("urem64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("srem64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("sdiv64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("udiv64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("lsh64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("rsh64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("arsh64 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("mov32 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("add32 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("sub32 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("or32 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("xor32 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("and32 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("lmul32 r{src}, r{dst}"), &mut prng, 21);
// test_ins(format!("uhmul32 r{src}, r{dst}"), &mut p, 21rng);
// test_ins(format!("shmul32 r{src}, r{dst}"), &mut p, 21rng);
test_ins(false, format!("udiv32 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("sdiv32 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("srem32 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("urem32 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("lsh32 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("rsh32 r{src}, r{dst}"), &mut prng, 21);
test_ins(false, format!("arsh32 r{src}, r{dst}"), &mut prng, 21);
test_ins(true, format!("mul64 r{src}, r{dst}"), &mut prng, 21);
test_ins(true, format!("mod64 r{src}, r{dst}"), &mut prng, 21);
test_ins(true, format!("div64 r{src}, r{dst}"), &mut prng, 21);
test_ins(true, format!("mul32 r{src}, r{dst}"), &mut prng, 21);
test_ins(true, format!("mod32 r{src}, r{dst}"), &mut prng, 21);
test_ins(true, format!("div32 r{src}, r{dst}"), &mut prng, 21);
// test load, store
let rand = prng.next_u32() as i64;
let offset = prng.next_u32() as i16;
let addr = rand % 80 + 0x4_0000_0000i64 - offset as i64;
let mut tmp = (src + 1) % 10;
if dst == tmp {
tmp = (src + 2) % 10;
}
test_ins(
false,
format!(
"mov32 r{tmp},{}
mov64 r{src},{:#x}
lsh64 r{src},32
or64 r{src},r{tmp}
ldxb r{dst}, [r{src}{offset:+}]",
addr as i32,
addr >> 32,
),
&mut prng,
25,
);
test_ins(
false,
format!(
"mov32 r{tmp},{}
mov64 r{src},{:#x}
lsh64 r{src},32
or64 r{src},r{tmp}
stxb [r{src}{offset:+}], r{dst}",
addr as i32,
addr >> 32,
),
&mut prng,
25,
);
let addr = rand % 79 + 0x4_0000_0000i64 - offset as i64;
test_ins(
false,
format!(
"mov32 r{tmp},{}
mov64 r{src},{:#x}
lsh64 r{src},32
or64 r{src},r{tmp}
ldxh r{dst}, [r{src}{offset:+}]",
addr as i32,
addr >> 32,
),
&mut prng,
25,
);
test_ins(
false,
format!(
"mov32 r{tmp},{}
mov64 r{src},{:#x}
lsh64 r{src},32
or64 r{src},r{tmp}
stxh [r{src}{offset:+}], r{dst}",
addr as i32,
addr >> 32,
),
&mut prng,
25,
);
let addr = rand % 77 + 0x4_0000_0000i64 - offset as i64;
test_ins(
false,
format!(
"mov32 r{tmp},{}
mov64 r{src},{:#x}
lsh64 r{src},32
or64 r{src},r{tmp}
ldxw r{dst}, [r{src}{offset:+}]",
addr as i32,
addr >> 32,
),
&mut prng,
25,
);
test_ins(
false,
format!(
"mov32 r{tmp},{}
mov64 r{src},{:#x}
lsh64 r{src},32
or64 r{src},r{tmp}
stxw [r{src}{offset:+}], r{dst}",
addr as i32,
addr >> 32,
),
&mut prng,
25,
);
let addr = rand % 73 + 0x4_0000_0000i64 - offset as i64;
test_ins(
false,
format!(
"mov32 r{tmp},{}
mov64 r{src},{:#x}
lsh64 r{src},32
or64 r{src},r{tmp}
ldxdw r{dst}, [r{src}{offset:+}]",
addr as i32,
addr >> 32,
),
&mut prng,
25,
);
test_ins(
false,
format!(
"mov32 r{tmp},{}
mov64 r{src},{:#x}
lsh64 r{src},32
or64 r{src},r{tmp}
stxdw [r{src}{offset:+}], r{dst}",
addr as i32,
addr >> 32,
),
&mut prng,
25,
);
// test conditionals
for jc in [
"jeq", "jgt", "jge", "jlt", "jle", "jset", "jne", "jsgt", "jsge", "jslt",
"jsle",
] {
test_ins(
false,
format!(
"{jc} r{src}, r{dst}, l1
or64 r{src},0x12345678
ja l2
l1:
and64 r{dst},0x12345678
ja l2
l2:",
),
&mut prng,
23,
);
}
}
}
for _ in 0..10 {
let imm = prng.next_u64() as i64;
test_ins(true, format!("lddw r{src}, {imm}"), &mut prng, 21);
let mut imm = imm as i32;
test_ins(true, format!("neg64 r{src}"), &mut prng, 21);
test_ins(true, format!("neg32 r{src}"), &mut prng, 21);
test_ins(true, format!("mul64 r{src}, {imm}"), &mut prng, 21);
test_ins(true, format!("mod64 r{src}, {imm}"), &mut prng, 21);
test_ins(true, format!("div64 r{src}, {imm}"), &mut prng, 21);
test_ins(true, format!("mul32 r{src}, {imm}"), &mut prng, 21);
test_ins(true, format!("mod32 r{src}, {imm}"), &mut prng, 21);
test_ins(true, format!("div32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("mov64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("add64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("sub64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("or64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("xor64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("and64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("lmul64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("uhmul64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("shmul64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("udiv64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("urem64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("sdiv64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("srem64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("mov32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("add32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("sub32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("or32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("xor32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("and32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("lmul32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("udiv32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("urem32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("sdiv32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("srem32 r{src}, {imm}"), &mut prng, 21);
// test st imm
let rand = prng.next_u32() as i64;
let offset = prng.next_u32() as i16;
let tmp = (src + 1) % 10;
let addr = rand % 80 + 0x4_0000_0000i64 - offset as i64;
test_ins(
false,
format!(
"mov32 r{tmp},{}
mov64 r{src},{:#x}
lsh64 r{src},32
or64 r{src},r{tmp}
stb [r{src}{offset:+}], {}",
addr as i32,
addr >> 32,
imm as i8,
),
&mut prng,
25,
);
let addr = rand % 79 + 0x4_0000_0000i64 - offset as i64;
test_ins(
false,
format!(
"mov32 r{tmp},{}
mov64 r{src},{:#x}
lsh64 r{src},32
or64 r{src},r{tmp}
sth [r{src}{offset:+}], {}",
addr as i32,
addr >> 32,
imm as i16
),
&mut prng,
25,
);
let addr = rand % 77 + 0x4_0000_0000i64 - offset as i64;
test_ins(
false,
format!(
"mov32 r{tmp},{}
mov64 r{src},{:#x}
lsh64 r{src},32
or64 r{src},r{tmp}
stw [r{src}{offset:+}], {imm}",
addr as i32,
addr >> 32,
),
&mut prng,
25,
);
let addr = rand % 73 + 0x4_0000_0000i64 - offset as i64;
test_ins(
false,
format!(
"mov32 r{tmp},{}
mov64 r{src},{:#x}
lsh64 r{src},32
or64 r{src},r{tmp}
stdw [r{src}{offset:+}], {imm}",
addr as i32,
addr >> 32,
),
&mut prng,
25,
);
// unconditional jump
test_ins(
false,
format!(
"ja 1
xor64 r{src},0x12345678
1:",
),
&mut prng,
21,
);
for jc in [
"jeq", "jgt", "jge", "jlt", "jle", "jset", "jne", "jsgt", "jsge", "jslt", "jsle",
] {
test_ins(
false,
format!(
"{jc} r{src}, {imm}, l1
or64 r{src},0x12345678
ja l2
l1:
and64 r{src},0x12345678
ja l2
l2:",
),
&mut prng,
23,
);
}
imm &= 63;
test_ins(false, format!("lsh64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("rsh64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("arsh64 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("hor64 r{src}, {imm}"), &mut prng, 21);
imm &= 31;
test_ins(false, format!("lsh32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("rsh32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("arsh32 r{src}, {imm}"), &mut prng, 21);
test_ins(false, format!("be64 r{src}"), &mut prng, 21);
test_ins(false, format!("be32 r{src}"), &mut prng, 21);
test_ins(false, format!("be16 r{src}"), &mut prng, 21);
test_ins(true, format!("le64 r{src}"), &mut prng, 21);
test_ins(true, format!("le32 r{src}"), &mut prng, 21);
test_ins(true, format!("le16 r{src}"), &mut prng, 21);
}
}
}
fn test_ins(v0: bool, ins: String, prng: &mut SmallRng, cu: u64) {
let mut input = [0u8; 80];
prng.fill_bytes(&mut input);
let asm = format!(
"
ldxdw r9, [r1+72]
ldxdw r8, [r1+64]
ldxdw r7, [r1+56]
ldxdw r6, [r1+48]
ldxdw r5, [r1+40]
ldxdw r4, [r1+32]
ldxdw r3, [r1+24]
ldxdw r2, [r1+16]
ldxdw r0, [r1+0]
ldxdw r1, [r1+8]
{ins}
xor64 r0, r1
xor64 r0, r2
xor64 r0, r3
xor64 r0, r4
xor64 r0, r5
xor64 r0, r6
xor64 r0, r7
xor64 r0, r8
xor64 r0, r9
exit"
);
let mut config = Config::default();
if v0 {
config.enabled_sbpf_versions = SBPFVersion::V0..=SBPFVersion::V0;
}
test_interpreter_and_jit_asm!(asm.as_str(), config, input, (), TestContextObject::new(cu));
}