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bma2x2.h
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/** \mainpage
* Copyright (c) 2020 Bosch Sensortec GmbH. All rights reserved.
*
* BSD-3-Clause
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* @file bma2x2.h
* @date 29/01/2020
* @version 2.0.8
*
*/
/*! \file bma2x2.h
\brief BMA2x2 Sensor Driver Support Header File */
#ifndef __BMA2x2_H__
#define __BMA2x2_H__
/****************************************************************/
/**\name DATA TYPES INCLUDES */
/************************************************************/
/*!
* @brief The following definition uses for define the data types
*
* @note While porting the API please consider the following
* @note Please check the version of C standard
* @note Are you using Linux platform
*/
/*!
* @brief For the Linux platform support
* Please use the types.h for your data types definitions
*/
#ifdef __KERNEL__
#include <linux/types.h>
/* singed integer type*/
typedef int8_t s8;/**< used for signed 8bit */
typedef int16_t s16;/**< used for signed 16bit */
typedef int32_t s32;/**< used for signed 32bit */
typedef int64_t s64;/**< used for signed 64bit */
typedef u_int8_t u8;/**< used for unsigned 8bit */
typedef u_int16_t u16;/**< used for unsigned 16bit */
typedef u_int32_t u32;/**< used for unsigned 32bit */
typedef u_int64_t u64;/**< used for unsigned 64bit */
#else /* ! __KERNEL__ */
/**********************************************************
* These definition uses for define the C
* standard version data types
***********************************************************/
# if !defined(__STDC_VERSION__)
/************************************************
* compiler is C11 C standard
************************************************/
#if (__STDC_VERSION__ == 201112L)
/************************************************/
#include <stdint.h>
/************************************************/
/*unsigned integer types*/
typedef uint8_t u8;/**< used for unsigned 8bit */
typedef uint16_t u16;/**< used for unsigned 16bit */
typedef uint32_t u32;/**< used for unsigned 32bit */
typedef uint64_t u64;/**< used for unsigned 64bit */
/*signed integer types*/
typedef int8_t s8;/**< used for signed 8bit */
typedef int16_t s16;/**< used for signed 16bit */
typedef int32_t s32;/**< used for signed 32bit */
typedef int64_t s64;/**< used for signed 64bit */
/************************************************
* compiler is C99 C standard
************************************************/
#elif (__STDC_VERSION__ == 199901L)
/* stdint.h is a C99 supported c library.
which is used to fixed the integer size*/
/************************************************/
#include <stdint.h>
/************************************************/
/*unsigned integer types*/
typedef uint8_t u8;/**< used for unsigned 8bit */
typedef uint16_t u16;/**< used for unsigned 16bit */
typedef uint32_t u32;/**< used for unsigned 32bit */
typedef uint64_t u64;/**< used for unsigned 64bit */
/*signed integer types*/
typedef int8_t s8;/**< used for signed 8bit */
typedef int16_t s16;/**< used for signed 16bit */
typedef int32_t s32;/**< used for signed 32bit */
typedef int64_t s64;/**< used for signed 64bit */
/************************************************
* compiler is C89 or other C standard
************************************************/
#else /* !defined(__STDC_VERSION__) */
/*!
* @brief By default it is defined as 32 bit machine configuration
* define your data types based on your
* machine/compiler/controller configuration
*/
#define MACHINE_32_BIT
/*! @brief
* If your machine support 16 bit
* define the MACHINE_16_BIT
*/
#ifdef MACHINE_16_BIT
#include <limits.h>
/*signed integer types*/
typedef signed char s8;/**< used for signed 8bit */
typedef signed short int s16;/**< used for signed 16bit */
typedef signed long int s32;/**< used for signed 32bit */
#if defined(LONG_MAX) && LONG_MAX == 0x7fffffffffffffffL
typedef long int s64;/**< used for signed 64bit */
typedef unsigned long int u64;/**< used for unsigned 64bit */
#elif defined(LLONG_MAX) && (LLONG_MAX == 0x7fffffffffffffffLL)
typedef long long int s64;/**< used for signed 64bit */
typedef unsigned long long int u64;/**< used for unsigned 64bit */
#else
#warning Either the correct data type for signed 64 bit integer \
could not be found, or 64 bit integers are not supported in your environment.
#warning If 64 bit integers are supported on your platform, \
please set s64 manually.
#endif
/*unsigned integer types*/
typedef unsigned char u8;/**< used for unsigned 8bit */
typedef unsigned short int u16;/**< used for unsigned 16bit */
typedef unsigned long int u32;/**< used for unsigned 32bit */
/* If your machine support 32 bit
define the MACHINE_32_BIT*/
#elif defined MACHINE_32_BIT
/*signed integer types*/
typedef signed char s8;/**< used for signed 8bit */
typedef signed short int s16;/**< used for signed 16bit */
typedef signed int s32;/**< used for signed 32bit */
typedef signed long long int s64;/**< used for signed 64bit */
/*unsigned integer types*/
typedef unsigned char u8;/**< used for unsigned 8bit */
typedef unsigned short int u16;/**< used for unsigned 16bit */
typedef unsigned int u32;/**< used for unsigned 32bit */
typedef unsigned long long int u64;/**< used for unsigned 64bit */
/* If your machine support 64 bit
define the MACHINE_64_BIT*/
#elif defined MACHINE_64_BIT
/*signed integer types*/
typedef signed char s8;/**< used for signed 8bit */
typedef signed short int s16;/**< used for signed 16bit */
typedef signed int s32;/**< used for signed 32bit */
typedef signed long int s64;/**< used for signed 64bit */
/*unsigned integer types*/
typedef unsigned char u8;/**< used for unsigned 8bit */
typedef unsigned short int u16;/**< used for unsigned 16bit */
typedef unsigned int u32;/**< used for unsigned 32bit */
typedef unsigned long int u64;/**< used for unsigned 64bit */
#else
#warning The data types defined above which not supported \
define the data types manually
#endif
#endif
/*** This else will execute for the compilers
* which are not supported the C standards
* Like C89/C99/C11***/
#else
/*!
* @brief By default it is defined as 32 bit machine configuration
* define your data types based on your
* machine/compiler/controller configuration
*/
#define MACHINE_32_BIT
/* If your machine support 16 bit
define the MACHINE_16_BIT*/
#ifdef MACHINE_16_BIT
#include <limits.h>
/*signed integer types*/
typedef signed char s8;/**< used for signed 8bit */
typedef signed short int s16;/**< used for signed 16bit */
typedef signed long int s32;/**< used for signed 32bit */
#if defined(LONG_MAX) && LONG_MAX == 0x7fffffffffffffffL
typedef long int s64;/**< used for signed 64bit */
typedef unsigned long int u64;/**< used for unsigned 64bit */
#elif defined(LLONG_MAX) && (LLONG_MAX == 0x7fffffffffffffffLL)
typedef long long int s64;/**< used for signed 64bit */
typedef unsigned long long int u64;/**< used for unsigned 64bit */
#else
#warning Either the correct data type for signed 64 bit integer \
could not be found, or 64 bit integers are not supported in your environment.
#warning If 64 bit integers are supported on your platform, \
please set s64 manually.
#endif
/*unsigned integer types*/
typedef unsigned char u8;/**< used for unsigned 8bit */
typedef unsigned short int u16;/**< used for unsigned 16bit */
typedef unsigned long int u32;/**< used for unsigned 32bit */
/*! @brief If your machine support 32 bit
define the MACHINE_32_BIT*/
#elif defined MACHINE_32_BIT
/*signed integer types*/
typedef signed char s8;/**< used for signed 8bit */
typedef signed short int s16;/**< used for signed 16bit */
typedef signed int s32;/**< used for signed 32bit */
typedef signed long long int s64;/**< used for signed 64bit */
/*unsigned integer types*/
typedef unsigned char u8;/**< used for unsigned 8bit */
typedef unsigned short int u16;/**< used for unsigned 16bit */
typedef unsigned int u32;/**< used for unsigned 32bit */
typedef unsigned long long int u64;/**< used for unsigned 64bit */
/* If your machine support 64 bit
define the MACHINE_64_BIT*/
#elif defined MACHINE_64_BIT
/*signed integer types*/
typedef signed char s8;/**< used for signed 8bit */
typedef signed short int s16;/**< used for signed 16bit */
typedef signed int s32;/**< used for signed 32bit */
typedef signed long int s64;/**< used for signed 64bit */
/*unsigned integer types*/
typedef unsigned char u8;/**< used for unsigned 8bit */
typedef unsigned short int u16;/**< used for unsigned 16bit */
typedef unsigned int u32;/**< used for unsigned 32bit */
typedef unsigned long int u64;/**< used for unsigned 64bit */
#else
#warning The data types defined above which not supported \
define the data types manually
#endif
#endif
#endif
/***************************************************************/
/**\name BUS READ AND WRITE FUNCTION POINTERS */
/***************************************************************/
/*!
* @brief Define the calling convention of YOUR bus communication routine.
* @note This includes types of parameters.
* This example shows the configuration for an SPI bus link.
* If your communication function looks like this:
* write_my_bus_xy(u8 device_addr,
* u8 register_addr, u8 * data, u8 length);
* The BMA2x2_WR_FUNC_PTR would equal:
* BMA2x2_WR_FUNC_PTR char
* (* bus_write)(u8, u8, u8 *, u8)
* Parameters can be mixed as needed refer to
* the \ref BMA2x2_BUS_WRITE_FUNC macro.
*/
#define BMA2x2_WR_FUNC_PTR s8(*bus_write)\
(u8, u8, u8 *, u8)
/*!
* @brief link macro between API function calls and bus write function
* @note The bus write function can change since
* this is a system dependant issue.
* If the bus_write parameter calling order is like:
* reg_addr, reg_data, wr_len it would be as it is here.
* If the parameters are differently ordered or your communication function
* like I2C need to know the device address,
* you can change this macro accordingly.
* define BMA2x2_BUS_WRITE_FUNC(dev_addr, reg_addr, reg_data, wr_len)\
* bus_write(dev_addr, reg_addr, reg_data, wr_len)
* This macro lets all API functions call YOUR communication routine in
* a way that equals your definition in the
* ref BMA2x2_WR_FUNC_PTR definition.
*/
#define BMA2x2_BUS_WRITE_FUNC(dev_addr, reg_addr, reg_data, wr_len)\
bus_write(dev_addr, reg_addr, reg_data, wr_len)
/*!
* @brief Define the calling convention of YOUR bus communication routine.
* @note This includes types of parameters. This example
*shows the configuration for an SPI bus link.
*If your communication function looks like this:
*read_my_bus_xy(u8 device_addr,
*u8 register_addr, u8* data, u8 length);
*The BMA2x2_RD_FUNC_PTR would equal:
*BMA2x2_RD_FUNC_PTR s8
*(* bus_read)(u8, u8, u8*, u8)
*Parameters can be mixed as needed refer to the
ref BMA2x2_BUS_READ_FUNC macro.
*/
#define BMA2x2_SPI_RD_MASK 0x80
/* for spi read transactions on SPI the MSB has to be set */
#define BMA2x2_RD_FUNC_PTR s8(*bus_read)\
(u8, u8, u8 *, u8)
#define BMA2x2_BRD_FUNC_PTR s8(*burst_read)\
(u8, u8, u8 *, u32)
/*!
* @brief link macro between API function calls and bus read function
* @note The bus write function can change since
* this is a system dependant issue.
* If the bus_read parameter calling order is like:
* reg_addr, reg_data, wr_len it would be as it is here.
* If the parameters are differently ordered or your
* communication function like I2C need to know the device address,
* you can change this macro accordingly.
* define BMA2x2_BUS_READ_FUNC(dev_addr, reg_addr, reg_data, wr_len)\
* bus_read(dev_addr, reg_addr, reg_data, wr_len)
* This macro lets all API functions call YOUR
* communication routine in a way that equals your definition in the
* ref BMA2x2_WR_FUNC_PTR definition.
* @note: this macro also includes the "MSB='1'" for reading BMA2x2 addresses.
*/
#define BMA2x2_BUS_READ_FUNC(dev_addr, reg_addr, reg_data, r_len)\
bus_read(dev_addr, reg_addr, reg_data, r_len)
#define BMA2x2_BURST_READ_FUNC(device_addr,\
register_addr, register_data, rd_len)\
burst_read(device_addr, register_addr, register_data, rd_len)
/**************************************************************/
/**\name I2C ADDRESS DEFINITIONS */
/**************************************************************/
/**< The following definition of I2C address is used for the following sensors
* BMA255
* BMA253
* BMA355
* BMA280
* BMA282
* BMA223
* BMA254
* BMA284
* BMA250E
* BMA222E
*/
#define BMA2x2_I2C_ADDR1 (0x18)
#define BMA2x2_I2C_ADDR2 (0x19)
/**< The following definition of I2C address is used for the following sensors
* BMC150
* BMC056
* BMC156
*/
#define BMA2x2_I2C_ADDR3 (0x10)
#define BMA2x2_I2C_ADDR4 (0x11)
/**************************************************************/
/**\name CONSTANTS DEFINITION */
/**************************************************************/
#define BMA2x2_INIT_VALUE ((u8)0)
#define BMA2x2_GEN_READ_WRITE_LENGTH ((u8)1)
#define BMA2x2_INTERFACE_IDLE_TIME_DELAY ((u8)1)
#define BMA2x2_LSB_MSB_READ_LENGTH ((u8)2)
/** BIT SHIFT DEFINITIONS */
#define BMA2x2_SHIFT_TWO_BITS ((u8)2)
#define BMA2x2_SHIFT_FOUR_BITS ((u8)4)
#define BMA2x2_SHIFT_FIVE_BITS ((u8)5)
#define BMA2x2_SHIFT_SIX_BITS ((u8)6)
#define BMA2x2_SHIFT_EIGHT_BITS ((u8)8)
/** FIFO DEFINITIONS */
#define BMA2x2_FIFO_MODE_STATUS_RANGE ((u8)2)
#define BMA2x2_FIFO_DATA_SELECT_RANGE ((u8)4)
#define BMA2x2_FIFO_MODE_RANGE ((u8)4)
#define BMA2x2_FIFO_WML_RANGE ((u8)32)
#define BMA2x2_FIFO_XYZ_DATA_ENABLED (0x00)
#define BMA2x2_FIFO_X_DATA_ENABLED (0x01)
#define BMA2x2_FIFO_Y_DATA_ENABLED (0x02)
#define BMA2x2_FIFO_Z_DATA_ENABLED (0x03)
#define BMA2x2_FIFO_DATA_ENABLED_MASK (0x03)
#define BMA2x2_FIFO_XYZ_AXES_FRAME_SIZE ((u8)6)
#define BMA2x2_FIFO_SINGLE_AXIS_FRAME_SIZE ((u8)2)
/** MODE RANGES */
#define BMA2x2_ACCEL_BW_MIN_RANGE ((u8)7)
#define BMA2x2_ACCEL_BW_1000HZ_RANGE ((u8)15)
#define BMA2x2_ACCEL_BW_MAX_RANGE ((u8)16)
#define BMA2x2_SLEEP_DURN_MIN_RANGE ((u8)4)
#define BMA2x2_SLEEP_TIMER_MODE_RANGE ((u8)2)
#define BMA2x2_SLEEP_DURN_MAX_RANGE ((u8)16)
#define BMA2x2_POWER_MODE_RANGE ((u8)6)
#define BMA2x2_SELF_TEST_AXIS_RANGE ((u8)4)
#define BMA2x2_SELF_TEST_SIGN_RANGE ((u8)2)
/**************************************************************/
/**\name ERROR CODE DEFINITIONS */
/**************************************************************/
#define E_OUT_OF_RANGE ((s8)-2)
#define E_BMA2x2_NULL_PTR ((s8)-127)
#define BMA2x2_NULL ((void *)0)
#define ERROR ((s8)-1)
#define SUCCESS ((u8)0)
/**************************************************************/
/**\name RETURN TYPE DEFINITION */
/**************************************************************/
#define BMA2x2_RETURN_FUNCTION_TYPE s8
/**< This refers BMA2x2 return type as char */
/**************************************************************/
/**\name REGISTER ADDRESS DEFINITIONS */
/**************************************************************/
#define BMA2x2_EEP_OFFSET (0x16)
#define BMA2x2_IMAGE_BASE (0x38)
#define BMA2x2_IMAGE_LEN (22)
#define BMA2x2_CHIP_ID_ADDR (0x00)
/** DATA ADDRESS DEFINITIONS */
#define BMA2x2_X_AXIS_LSB_ADDR (0x02)
#define BMA2x2_X_AXIS_MSB_ADDR (0x03)
#define BMA2x2_Y_AXIS_LSB_ADDR (0x04)
#define BMA2x2_Y_AXIS_MSB_ADDR (0x05)
#define BMA2x2_Z_AXIS_LSB_ADDR (0x06)
#define BMA2x2_Z_AXIS_MSB_ADDR (0x07)
#define BMA2x2_TEMP_ADDR (0x08)
/**STATUS ADDRESS DEFINITIONS */
#define BMA2x2_STAT1_ADDR (0x09)
#define BMA2x2_STAT2_ADDR (0x0A)
#define BMA2x2_STAT_TAP_SLOPE_ADDR (0x0B)
#define BMA2x2_STAT_ORIENT_HIGH_ADDR (0x0C)
#define BMA2x2_STAT_FIFO_ADDR (0x0E)
/**STATUS ADDRESS DEFINITIONS */
#define BMA2x2_RANGE_SELECT_ADDR (0x0F)
#define BMA2x2_BW_SELECT_ADDR (0x10)
#define BMA2x2_MODE_CTRL_ADDR (0x11)
#define BMA2x2_LOW_NOISE_CTRL_ADDR (0x12)
#define BMA2x2_DATA_CTRL_ADDR (0x13)
#define BMA2x2_RST_ADDR (0x14)
/**INTERUPT ADDRESS DEFINITIONS */
#define BMA2x2_INTR_ENABLE1_ADDR (0x16)
#define BMA2x2_INTR_ENABLE2_ADDR (0x17)
#define BMA2x2_INTR_SLOW_NO_MOTION_ADDR (0x18)
#define BMA2x2_INTR1_PAD_SELECT_ADDR (0x19)
#define BMA2x2_INTR_DATA_SELECT_ADDR (0x1A)
#define BMA2x2_INTR2_PAD_SELECT_ADDR (0x1B)
#define BMA2x2_INTR_SOURCE_ADDR (0x1E)
#define BMA2x2_INTR_SET_ADDR (0x20)
#define BMA2x2_INTR_CTRL_ADDR (0x21)
/** FEATURE ADDRESS DEFINITIONS */
#define BMA2x2_LOW_DURN_ADDR (0x22)
#define BMA2x2_LOW_THRES_ADDR (0x23)
#define BMA2x2_LOW_HIGH_HYST_ADDR (0x24)
#define BMA2x2_HIGH_DURN_ADDR (0x25)
#define BMA2x2_HIGH_THRES_ADDR (0x26)
#define BMA2x2_SLOPE_DURN_ADDR (0x27)
#define BMA2x2_SLOPE_THRES_ADDR (0x28)
#define BMA2x2_SLOW_NO_MOTION_THRES_ADDR (0x29)
#define BMA2x2_TAP_PARAM_ADDR (0x2A)
#define BMA2x2_TAP_THRES_ADDR (0x2B)
#define BMA2x2_ORIENT_PARAM_ADDR (0x2C)
#define BMA2x2_THETA_BLOCK_ADDR (0x2D)
#define BMA2x2_THETA_FLAT_ADDR (0x2E)
#define BMA2x2_FLAT_HOLD_TIME_ADDR (0x2F)
#define BMA2x2_SELFTEST_ADDR (0x32)
#define BMA2x2_EEPROM_CTRL_ADDR (0x33)
#define BMA2x2_SERIAL_CTRL_ADDR (0x34)
/**OFFSET ADDRESS DEFINITIONS */
#define BMA2x2_OFFSET_CTRL_ADDR (0x36)
#define BMA2x2_OFFSET_PARAMS_ADDR (0x37)
#define BMA2x2_OFFSET_X_AXIS_ADDR (0x38)
#define BMA2x2_OFFSET_Y_AXIS_ADDR (0x39)
#define BMA2x2_OFFSET_Z_AXIS_ADDR (0x3A)
/**GP ADDRESS DEFINITIONS */
#define BMA2x2_GP0_ADDR (0x3B)
#define BMA2x2_GP1_ADDR (0x3C)
/**FIFO ADDRESS DEFINITIONS */
#define BMA2x2_FIFO_MODE_ADDR (0x3E)
#define BMA2x2_FIFO_DATA_OUTPUT_ADDR (0x3F)
#define BMA2x2_FIFO_WML_TRIG (0x30)
/**************************************************************/
/**\name ACCEL RESOLUTION DEFINITION */
/**************************************************************/
#define BMA2x2_12_RESOLUTION (0)
#define BMA2x2_10_RESOLUTION (1)
#define BMA2x2_14_RESOLUTION (2)
/**************************************************************/
/**\name ACCEL DELAY DEFINITION */
/**************************************************************/
/* register write and read delays */
#define BMA2x2_MDELAY_DATA_TYPE u32
#define BMA2x2_EE_W_DELAY (28)
/**************************************************************/
/**\name STRUCTURE DEFINITIONS */
/**************************************************************/
/*!
* @brief read accel xyz data for 10,14 and 12 bit resolution
*/
struct bma2x2_accel_data {
s16 x,/**< accel x data 10,14 and 12 resolution*/
y,/**< accel y data 10,14 and 12 resolution*/
z;/**< accel z data 10,14 and 12 resolution*/
};
/*!
* @brief read accel xyz data for 10,14 and 12 bit resolution
* and temperature output
*/
struct bma2x2_accel_data_temp {
s16 x,/**< accel x data 10,14 and 12 resolution*/
y,/**< accel y data 10,14 and 12 resolution*/
z;/**< accel z data 10,14 and 12 resolution*/
s8 temp;/**< accel temperature data*/
};
/*!
* @brief read accel xyz data for 8 bit resolution
*/
struct bma2x2_accel_eight_resolution {
s8 x,/**< accel x data with eight bit resolution*/
y,/**< accel y data with eight bit resolution*/
z;/**< accel z data with eight bit resolution*/
};
/*!
* @brief read accel xyz data for 8 bit resolution and temperature
*/
struct bma2x2_accel_eight_resolution_temp {
s8 x,/**< accel x data with eight bit resolution*/
y,/**< accel y data with eight bit resolution*/
z;/**< accel z data with eight bit resolution*/
s8 temp;/**< accel temperature data*/
};
/*!
* @brief FIFO data read is parsed and returned to user using this union.
*
* @note Read the respective data fields in the union for corresponding
* accel data axes enabled in FIFO storage( Axes stored in FIFO can be set
* by the data_select_bits in the register FIFO_CONFIG_1 )
*
* data enabled for FIFO storage | Data field to be read from the below union
* ------------------------------|-------------------------------------------
* XYZ axes enabled | struct bma2x2_accel_data
* X axis data enabled | x data
* Y axis data enabled | y data
* Z axis data enabled | z data
*/
union fifo_frame {
/*! FIFO data stored here when XYZ data enabled in
fifo_data_select bits of register 0x3E*/
struct bma2x2_accel_data accel_data;
/*! FIFO data stored here when accel X data enabled in
fifo_data_select bits of register 0x3E*/
s16 x;
/*! FIFO data stored here when accel Y data enabled in
fifo_data_select bits of register 0x3E*/
s16 y;
/*! FIFO data stored here when accel Z data enabled in
fifo_data_select bits of register 0x3E*/
s16 z;
};
/*!
* @brief bma2x2 initialization struct
* struct bma2x2_t is used for assigning the following parameters.
*
* Bus write function pointer: BMA2x2_WR_FUNC_PTR
* Bus read function pointer: BMA2x2_RD_FUNC_PTR
* Burst read function pointer: BMA2x2_BRD_FUNC_PTR
* Delay function pointer: delay_msec
* I2C address: dev_addr
* Chip id of the sensor: chip_id
*/
struct bma2x2_t {
/*! save current bma2x2 operation mode */
u8 power_mode_u8;
/*! chip_id of bma2x2 */
u8 chip_id;
/*! the value of power mode register 0x11*/
u8 ctrl_mode_reg;
/*! the value of power mode register 0x12*/
u8 low_mode_reg;
/*! initializes bma2x2's I2C device address*/
u8 dev_addr;
/*! store the fifo configuration register*/
u8 fifo_config;
/*! function pointer to the SPI/I2C write function */
BMA2x2_WR_FUNC_PTR;
/*! function pointer to the SPI/I2C read function */
BMA2x2_RD_FUNC_PTR;
/*! function pointer to the SPI/I2C burst read function */
BMA2x2_BRD_FUNC_PTR;
/*! delay(in ms) function pointer */
void (*delay_msec)(BMA2x2_MDELAY_DATA_TYPE);
};
/*!
* @brief FIFO configurations are stored in this structure
*
* @note User should map the following before reading the FIFO data
* - buffer for storing the FIFO data should be mapped to the member
* "fifo_data" of this structure
* - Number of bytes to be read from the FIFO should be mapped to the member
* "fifo_length" of this structure
*/
struct fifo_configuration {
/*! Data buffer of user defined length is to be mapped here */
u8 *fifo_data;
/*! Index of accel data stored in FIFO buffer */
u8 accel_byte_start_index;
/*! No of bytes to be read in FIFO as specified by the user */
u8 fifo_length;
};
/*********************************************************************/
/**\name REGISTER BIT MASK, BIT LENGTH, BIT POSITION DEFINITIONS */
/********************************************************************/
/******************************/
/**\name CHIP ID */
/******************************/
#define BMA2x2_CHIP_ID_POS (0)
#define BMA2x2_CHIP_ID_MSK (0xFF)
#define BMA2x2_CHIP_ID_LEN (8)
#define BMA2x2_CHIP_ID_REG BMA2x2_CHIP_ID_ADDR
/******************************/
/**\name DATA REGISTER-X */
/******************************/
#define BMA2x2_NEW_DATA_X_POS (0)
#define BMA2x2_NEW_DATA_X_LEN (1)
#define BMA2x2_NEW_DATA_X_MSK (0x01)
#define BMA2x2_NEW_DATA_X_REG BMA2x2_X_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_X14_LSB_POS (2)
#define BMA2x2_ACCEL_X14_LSB_LEN (6)
#define BMA2x2_ACCEL_X14_LSB_MSK (0xFC)
#define BMA2x2_ACCEL_X14_LSB_REG BMA2x2_X_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_X12_LSB_POS (4)
#define BMA2x2_ACCEL_X12_LSB_LEN (4)
#define BMA2x2_ACCEL_X12_LSB_MSK (0xF0)
#define BMA2x2_ACCEL_X12_LSB_REG BMA2x2_X_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_X10_LSB_POS (6)
#define BMA2x2_ACCEL_X10_LSB_LEN (2)
#define BMA2x2_ACCEL_X10_LSB_MSK (0xC0)
#define BMA2x2_ACCEL_X10_LSB_REG BMA2x2_X_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_X8_LSB_POS (0)
#define BMA2x2_ACCEL_X8_LSB_LEN (0)
#define BMA2x2_ACCEL_X8_LSB_MSK (0x00)
#define BMA2x2_ACCEL_X8_LSB_REG BMA2x2_X_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_X_MSB_POS (0)
#define BMA2x2_ACCEL_X_MSB_LEN (8)
#define BMA2x2_ACCEL_X_MSB_MSK (0xFF)
#define BMA2x2_ACCEL_X_MSB_REG BMA2x2_X_AXIS_MSB_ADDR
/******************************/
/**\name DATA REGISTER-Y */
/******************************/
#define BMA2x2_NEW_DATA_Y_POS (0)
#define BMA2x2_NEW_DATA_Y_LEN (1)
#define BMA2x2_NEW_DATA_Y_MSK (0x01)
#define BMA2x2_NEW_DATA_Y_REG BMA2x2_Y_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_Y14_LSB_POS (2)
#define BMA2x2_ACCEL_Y14_LSB_LEN (6)
#define BMA2x2_ACCEL_Y14_LSB_MSK (0xFC)
#define BMA2x2_ACCEL_Y14_LSB_REG BMA2x2_Y_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_Y12_LSB_POS (4)
#define BMA2x2_ACCEL_Y12_LSB_LEN (4)
#define BMA2x2_ACCEL_Y12_LSB_MSK (0xF0)
#define BMA2x2_ACCEL_Y12_LSB_REG BMA2x2_Y_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_Y10_LSB_POS (6)
#define BMA2x2_ACCEL_Y10_LSB_LEN (2)
#define BMA2x2_ACCEL_Y10_LSB_MSK (0xC0)
#define BMA2x2_ACCEL_Y10_LSB_REG BMA2x2_Y_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_Y8_LSB_POS (0)
#define BMA2x2_ACCEL_Y8_LSB_LEN (0)
#define BMA2x2_ACCEL_Y8_LSB_MSK (0x00)
#define BMA2x2_ACCEL_Y8_LSB_REG BMA2x2_Y_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_Y_MSB_POS (0)
#define BMA2x2_ACCEL_Y_MSB_LEN (8)
#define BMA2x2_ACCEL_Y_MSB_MSK (0xFF)
#define BMA2x2_ACCEL_Y_MSB_REG BMA2x2_Y_AXIS_MSB_ADDR
/******************************/
/**\name DATA REGISTER-Z */
/******************************/
#define BMA2x2_NEW_DATA_Z_POS (0)
#define BMA2x2_NEW_DATA_Z_LEN (1)
#define BMA2x2_NEW_DATA_Z_MSK (0x01)
#define BMA2x2_NEW_DATA_Z_REG BMA2x2_Z_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_Z14_LSB_POS (2)
#define BMA2x2_ACCEL_Z14_LSB_LEN (6)
#define BMA2x2_ACCEL_Z14_LSB_MSK (0xFC)
#define BMA2x2_ACCEL_Z14_LSB_REG BMA2x2_Z_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_Z12_LSB_POS (4)
#define BMA2x2_ACCEL_Z12_LSB_LEN (4)
#define BMA2x2_ACCEL_Z12_LSB_MSK (0xF0)
#define BMA2x2_ACCEL_Z12_LSB_REG BMA2x2_Z_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_Z10_LSB_POS (6)
#define BMA2x2_ACCEL_Z10_LSB_LEN (2)
#define BMA2x2_ACCEL_Z10_LSB_MSK (0xC0)
#define BMA2x2_ACCEL_Z10_LSB_REG BMA2x2_Z_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_Z8_LSB_POS (0)
#define BMA2x2_ACCEL_Z8_LSB_LEN (0)
#define BMA2x2_ACCEL_Z8_LSB_MSK (0x00)
#define BMA2x2_ACCEL_Z8_LSB_REG BMA2x2_Z_AXIS_LSB_ADDR
#define BMA2x2_ACCEL_Z_MSB_POS (0)
#define BMA2x2_ACCEL_Z_MSB_LEN (8)
#define BMA2x2_ACCEL_Z_MSB_MSK (0xFF)
#define BMA2x2_ACCEL_Z_MSB_REG BMA2x2_Z_AXIS_MSB_ADDR
/******************************/
/**\name TEMPERATURE */
/******************************/
#define BMA2x2_ACCEL_TEMP_MSB_POS (0)
#define BMA2x2_ACCEL_TEMP_MSB_LEN (8)
#define BMA2x2_ACCEL_TEMP_MSB_MSK (0xFF)
#define BMA2x2_ACCEL_TEMP_MSB_REG BMA2x2_TEMPERATURE_REG
/***************************************/
/**\name INTERRUPT STATUS OF LOW-G */
/**************************************/
#define BMA2x2_LOW_G_INTR_STAT_POS (0)
#define BMA2x2_LOW_G_INTR_STAT_LEN (1)
#define BMA2x2_LOW_G_INTR_STAT_MSK (0x01)
#define BMA2x2_LOW_G_INTR_STAT_REG BMA2x2_STAT1_ADDR
/***************************************/
/**\name INTERRUPT STATUS OF HIGH-G */
/**************************************/
#define BMA2x2_HIGH_G_INTR_STAT_POS (1)
#define BMA2x2_HIGH_G_INTR_STAT_LEN (1)
#define BMA2x2_HIGH_G_INTR_STAT_MSK (0x02)
#define BMA2x2_HIGH_G_INTR_STAT_REG BMA2x2_STAT1_ADDR
/***************************************/
/**\name INTERRUPT STATUS OF SLOPE */
/**************************************/
#define BMA2x2_SLOPE_INTR_STAT_POS (2)
#define BMA2x2_SLOPE_INTR_STAT_LEN (1)
#define BMA2x2_SLOPE_INTR_STAT_MSK (0x04)
#define BMA2x2_SLOPE_INTR_STAT_REG BMA2x2_STAT1_ADDR
/*******************************************/
/**\name INTERRUPT STATUS OF SLOW NO MOTION*/
/*******************************************/
#define BMA2x2_SLOW_NO_MOTION_INTR_STAT_POS (3)
#define BMA2x2_SLOW_NO_MOTION_INTR_STAT_LEN (1)
#define BMA2x2_SLOW_NO_MOTION_INTR_STAT_MSK (0x08)
#define BMA2x2_SLOW_NO_MOTION_INTR_STAT_REG BMA2x2_STAT1_ADDR
/***************************************/
/**\name INTERRUPT STATUS OF DOUBLE TAP */
/**************************************/
#define BMA2x2_DOUBLE_TAP_INTR_STAT_POS (4)
#define BMA2x2_DOUBLE_TAP_INTR_STAT_LEN (1)
#define BMA2x2_DOUBLE_TAP_INTR_STAT_MSK (0x10)
#define BMA2x2_DOUBLE_TAP_INTR_STAT_REG BMA2x2_STAT1_ADDR
/***************************************/
/**\name INTERRUPT STATUS OF SINGLE TAP */
/**************************************/
#define BMA2x2_SINGLE_TAP_INTR_STAT_POS (5)
#define BMA2x2_SINGLE_TAP_INTR_STAT_LEN (1)
#define BMA2x2_SINGLE_TAP_INTR_STAT_MSK (0x20)
#define BMA2x2_SINGLE_TAP_INTR_STAT_REG BMA2x2_STAT1_ADDR
/***************************************/
/**\name INTERRUPT STATUS OF ORIENT*/
/**************************************/
#define BMA2x2_ORIENT_INTR_STAT_POS (6)
#define BMA2x2_ORIENT_INTR_STAT_LEN (1)
#define BMA2x2_ORIENT_INTR_STAT_MSK (0x40)
#define BMA2x2_ORIENT_INTR_STAT_REG BMA2x2_STAT1_ADDR
/***************************************/
/**\name INTERRUPT STATUS OF FLAT */
/**************************************/
#define BMA2x2_FLAT_INTR_STAT_POS (7)
#define BMA2x2_FLAT_INTR_STAT_LEN (1)
#define BMA2x2_FLAT_INTR_STAT_MSK (0x80)
#define BMA2x2_FLAT_INTR_STAT_REG BMA2x2_STAT1_ADDR
/***************************************/
/**\name INTERRUPT STATUS OF FIFO FULL */
/**************************************/
#define BMA2x2_FIFO_FULL_INTR_STAT_POS (5)
#define BMA2x2_FIFO_FULL_INTR_STAT_LEN (1)
#define BMA2x2_FIFO_FULL_INTR_STAT_MSK (0x20)
#define BMA2x2_FIFO_FULL_INTR_STAT_REG BMA2x2_STAT2_ADDR
/*******************************************/
/**\name INTERRUPT STATUS OF FIFO WATERMARK*/
/******************************************/
#define BMA2x2_FIFO_WM_INTR_STAT_POS (6)
#define BMA2x2_FIFO_WM_INTR_STAT_LEN (1)
#define BMA2x2_FIFO_WM_INTR_STAT_MSK (0x40)
#define BMA2x2_FIFO_WM_INTR_STAT_REG BMA2x2_STAT2_ADDR
/***************************************/
/**\name INTERRUPT STATUS OF DATA */
/**************************************/
#define BMA2x2_DATA_INTR_STAT_POS (7)
#define BMA2x2_DATA_INTR_STAT_LEN (1)
#define BMA2x2_DATA_INTR_STAT_MSK (0x80)
#define BMA2x2_DATA_INTR_STAT_REG BMA2x2_STAT2_ADDR
/*********************************************/
/**\name INTERRUPT STATUS SLOPE XYZ AND SIGN */
/*********************************************/
#define BMA2x2_SLOPE_FIRST_X_POS (0)
#define BMA2x2_SLOPE_FIRST_X_LEN (1)
#define BMA2x2_SLOPE_FIRST_X_MSK (0x01)
#define BMA2x2_SLOPE_FIRST_X_REG BMA2x2_STAT_TAP_SLOPE_ADDR
#define BMA2x2_SLOPE_FIRST_Y_POS (1)
#define BMA2x2_SLOPE_FIRST_Y_LEN (1)
#define BMA2x2_SLOPE_FIRST_Y_MSK (0x02)
#define BMA2x2_SLOPE_FIRST_Y_REG BMA2x2_STAT_TAP_SLOPE_ADDR
#define BMA2x2_SLOPE_FIRST_Z_POS (2)
#define BMA2x2_SLOPE_FIRST_Z_LEN (1)
#define BMA2x2_SLOPE_FIRST_Z_MSK (0x04)
#define BMA2x2_SLOPE_FIRST_Z_REG BMA2x2_STAT_TAP_SLOPE_ADDR
#define BMA2x2_SLOPE_SIGN_STAT_POS (3)
#define BMA2x2_SLOPE_SIGN_STAT_LEN (1)
#define BMA2x2_SLOPE_SIGN_STAT_MSK (0x08)
#define BMA2x2_SLOPE_SIGN_STAT_REG BMA2x2_STAT_TAP_SLOPE_ADDR
/*********************************************/
/**\name INTERRUPT STATUS TAP XYZ AND SIGN */
/*********************************************/
#define BMA2x2_TAP_FIRST_X_POS (4)
#define BMA2x2_TAP_FIRST_X_LEN (1)
#define BMA2x2_TAP_FIRST_X_MSK (0x10)
#define BMA2x2_TAP_FIRST_X_REG BMA2x2_STAT_TAP_SLOPE_ADDR
#define BMA2x2_TAP_FIRST_Y_POS (5)
#define BMA2x2_TAP_FIRST_Y_LEN (1)
#define BMA2x2_TAP_FIRST_Y_MSK (0x20)
#define BMA2x2_TAP_FIRST_Y_REG BMA2x2_STAT_TAP_SLOPE_ADDR
#define BMA2x2_TAP_FIRST_Z_POS (6)
#define BMA2x2_TAP_FIRST_Z_LEN (1)
#define BMA2x2_TAP_FIRST_Z_MSK (0x40)
#define BMA2x2_TAP_FIRST_Z_REG BMA2x2_STAT_TAP_SLOPE_ADDR
#define BMA2x2_TAP_SIGN_STAT_POS (7)
#define BMA2x2_TAP_SIGN_STAT_LEN (1)
#define BMA2x2_TAP_SIGN_STAT_MSK (0x80)
#define BMA2x2_TAP_SIGN_STAT_REG BMA2x2_STAT_TAP_SLOPE_ADDR
/*********************************************/
/**\name INTERRUPT STATUS HIGH_G XYZ AND SIGN */
/*********************************************/
#define BMA2x2_HIGH_G_FIRST_X_POS (0)
#define BMA2x2_HIGH_G_FIRST_X_LEN (1)
#define BMA2x2_HIGH_G_FIRST_X_MSK (0x01)
#define BMA2x2_HIGH_G_FIRST_X_REG BMA2x2_STAT_ORIENT_HIGH_ADDR
#define BMA2x2_HIGH_G_FIRST_Y_POS (1)
#define BMA2x2_HIGH_G_FIRST_Y_LEN (1)
#define BMA2x2_HIGH_G_FIRST_Y_MSK (0x02)
#define BMA2x2_HIGH_G_FIRST_Y_REG BMA2x2_STAT_ORIENT_HIGH_ADDR
#define BMA2x2_HIGH_G_FIRST_Z_POS (2)
#define BMA2x2_HIGH_G_FIRST_Z_LEN (1)
#define BMA2x2_HIGH_G_FIRST_Z_MSK (0x04)
#define BMA2x2_HIGH_G_FIRST_Z_REG BMA2x2_STAT_ORIENT_HIGH_ADDR
#define BMA2x2_HIGH_G_SIGN_STAT_POS (3)
#define BMA2x2_HIGH_G_SIGN_STAT_LEN (1)
#define BMA2x2_HIGH_G_SIGN_STAT_MSK (0x08)
#define BMA2x2_HIGH_G_SIGN_STAT_REG BMA2x2_STAT_ORIENT_HIGH_ADDR
/*********************************************/
/**\name INTERRUPT STATUS ORIENT */
/*********************************************/
#define BMA2x2_ORIENT_STAT_POS (4)
#define BMA2x2_ORIENT_STAT_LEN (3)
#define BMA2x2_ORIENT_STAT_MSK (0x70)
#define BMA2x2_ORIENT_STAT_REG BMA2x2_STAT_ORIENT_HIGH_ADDR
/*********************************************/
/**\name INTERRUPT STATUS FLAT */
/*********************************************/
#define BMA2x2_FLAT_STAT_POS (7)
#define BMA2x2_FLAT_STAT_LEN (1)
#define BMA2x2_FLAT_STAT_MSK (0x80)
#define BMA2x2_FLAT_STAT_REG BMA2x2_STAT_ORIENT_HIGH_ADDR
/*********************************************/
/**\name INTERRUPT STATUS OF FIFO FRAME COUNT */
/*********************************************/
#define BMA2x2_FIFO_FRAME_COUNT_STAT_POS (0)
#define BMA2x2_FIFO_FRAME_COUNT_STAT_LEN (7)
#define BMA2x2_FIFO_FRAME_COUNT_STAT_MSK (0x7F)
#define BMA2x2_FIFO_FRAME_COUNT_STAT_REG BMA2x2_STAT_FIFO_ADDR
/*********************************************/
/**\name INTERRUPT STATUS OF FIFO OVERRUN */
/*********************************************/
#define BMA2x2_FIFO_OVERRUN_STAT_POS (7)
#define BMA2x2_FIFO_OVERRUN_STAT_LEN (1)
#define BMA2x2_FIFO_OVERRUN_STAT_MSK (0x80)
#define BMA2x2_FIFO_OVERRUN_STAT_REG BMA2x2_STAT_FIFO_ADDR
/****************************/
/**\name RANGE */
/****************************/
#define BMA2x2_RANGE_SELECT_POS (0)
#define BMA2x2_RANGE_SELECT_LEN (4)
#define BMA2x2_RANGE_SELECT_MSK (0x0F)
#define BMA2x2_RANGE_SELECT_REG BMA2x2_RANGE_SELECT_ADDR
/****************************/
/**\name BANDWIDTH */
/****************************/
#define BMA2x2_BW_POS (0)
#define BMA2x2_BW_LEN (5)
#define BMA2x2_BW_MSK (0x1F)
#define BMA2x2_BW_REG BMA2x2_BW_SELECT_ADDR
/****************************/
/**\name SLEEP DURATION */
/****************************/
#define BMA2x2_SLEEP_DURN_POS (1)
#define BMA2x2_SLEEP_DURN_LEN (4)
#define BMA2x2_SLEEP_DURN_MSK (0x1E)
#define BMA2x2_SLEEP_DURN_REG BMA2x2_MODE_CTRL_ADDR
/****************************/
/**\name POWER MODEPOWER MODE */
/****************************/
#define BMA2x2_MODE_CTRL_POS (5)
#define BMA2x2_MODE_CTRL_LEN (3)
#define BMA2x2_MODE_CTRL_MSK (0xE0)
#define BMA2x2_MODE_CTRL_REG BMA2x2_MODE_CTRL_ADDR
/****************************/
/**\name SLEEP TIMER */
/****************************/
#define BMA2x2_SLEEP_TIMER_POS (5)
#define BMA2x2_SLEEP_TIMER_LEN (1)
#define BMA2x2_SLEEP_TIMER_MSK (0x20)
#define BMA2x2_SLEEP_TIMER_REG BMA2x2_LOW_NOISE_CTRL_ADDR
/****************************/
/**\name LOWPOWER MODE */
/****************************/
#define BMA2x2_LOW_POWER_MODE_POS (6)
#define BMA2x2_LOW_POWER_MODE_LEN (1)
#define BMA2x2_LOW_POWER_MODE_MSK (0x40)
#define BMA2x2_LOW_POWER_MODE_REG BMA2x2_LOW_NOISE_CTRL_ADDR
/*******************************************/
/**\name DISABLE MSB SHADOWING PROCEDURE */
/*******************************************/
#define BMA2x2_DIS_SHADOW_PROC_POS (6)
#define BMA2x2_DIS_SHADOW_PROC_LEN (1)
#define BMA2x2_DIS_SHADOW_PROC_MSK (0x40)
#define BMA2x2_DIS_SHADOW_PROC_REG BMA2x2_DATA_CTRL_ADDR
/***************************************************/
/**\name FILTERED OR UNFILTERED ACCELERATION DATA */