From 5c7a9f5b944030c59a8c47db0fb5d2b72757bdfe Mon Sep 17 00:00:00 2001 From: "xmc-action-bot[bot]" <121654204+xmc-action-bot[bot]@users.noreply.github.com> Date: Sun, 1 Dec 2024 05:28:30 +0000 Subject: [PATCH] feat: updating from newer svd2rust (#86) Co-authored-by: renovate <29139614+renovate@users.noreply.github.com> --- src/can/clc.rs | 2 - src/can/fdr.rs | 2 - src/can/mcr.rs | 2 - src/can/mitr.rs | 1 - src/can/msimask.rs | 1 - src/can/mspnd.rs | 1 - src/can/panctr.rs | 3 - src/can_mo/mo.rs | 4 +- src/can_mo/mo/moamr.rs | 2 - src/can_mo/mo/moar.rs | 9 +- src/can_mo/mo/moctr.rs | 24 ---- src/can_mo/mo/modatah.rs | 4 - src/can_mo/mo/modatal.rs | 4 - src/can_mo/mo/mofcr.rs | 14 --- src/can_mo/mo/mofgpr.rs | 4 - src/can_mo/mo/moipr.rs | 4 - src/can_node0/nbtr.rs | 5 - src/can_node0/ncr.rs | 8 -- src/can_node0/necnt.rs | 3 - src/can_node0/nfcr.rs | 5 - src/can_node0/nipr.rs | 4 - src/can_node0/npcr.rs | 2 - src/can_node0/nsr.rs | 6 - src/ccu40/gcsc.rs | 16 --- src/ccu40/gcss.rs | 16 --- src/ccu40/gctrl.rs | 8 -- src/ccu40/gidlc.rs | 5 - src/ccu40/gidls.rs | 6 - src/ccu40_cc40/cmc.rs | 12 -- src/ccu40_cc40/crs.rs | 1 - src/ccu40_cc40/dits.rs | 1 - src/ccu40_cc40/fpc.rs | 1 - src/ccu40_cc40/fpcs.rs | 1 - src/ccu40_cc40/ins.rs | 12 -- src/ccu40_cc40/inte.rs | 7 -- src/ccu40_cc40/prs.rs | 1 - src/ccu40_cc40/psc.rs | 1 - src/ccu40_cc40/psl.rs | 1 - src/ccu40_cc40/srs.rs | 5 - src/ccu40_cc40/swr.rs | 8 -- src/ccu40_cc40/sws.rs | 8 -- src/ccu40_cc40/tc.rs | 18 --- src/ccu40_cc40/tcclr.rs | 3 - src/ccu40_cc40/tcset.rs | 1 - src/ccu40_cc40/timer.rs | 1 - src/ccu80/gcsc.rs | 20 ---- src/ccu80/gcss.rs | 20 ---- src/ccu80/gctrl.rs | 8 -- src/ccu80/gidlc.rs | 6 - src/ccu80/gidls.rs | 7 -- src/ccu80/gpchk.rs | 9 -- src/ccu80_cc80/chc.rs | 5 - src/ccu80_cc80/cmc.rs | 12 -- src/ccu80_cc80/cr1s.rs | 1 - src/ccu80_cc80/cr2s.rs | 1 - src/ccu80_cc80/dc1r.rs | 2 - src/ccu80_cc80/dc2r.rs | 2 - src/ccu80_cc80/dits.rs | 1 - src/ccu80_cc80/dtc.rs | 7 -- src/ccu80_cc80/fpc.rs | 1 - src/ccu80_cc80/fpcs.rs | 1 - src/ccu80_cc80/ins.rs | 12 -- src/ccu80_cc80/inte.rs | 9 -- src/ccu80_cc80/prs.rs | 1 - src/ccu80_cc80/psc.rs | 1 - src/ccu80_cc80/psl.rs | 4 - src/ccu80_cc80/srs.rs | 6 - src/ccu80_cc80/stc.rs | 2 - src/ccu80_cc80/swr.rs | 10 -- src/ccu80_cc80/sws.rs | 10 -- src/ccu80_cc80/tc.rs | 25 ---- src/ccu80_cc80/tcclr.rs | 5 - src/ccu80_cc80/tcset.rs | 1 - src/ccu80_cc80/timer.rs | 1 - src/dac/dac01data.rs | 2 - src/dac/dac0cfg0.rs | 6 - src/dac/dac0cfg1.rs | 10 -- src/dac/dac0data.rs | 1 - src/dac/dac0path.rs | 3 - src/dac/dac0patl.rs | 6 - src/dac/dac1cfg0.rs | 6 - src/dac/dac1cfg1.rs | 9 -- src/dac/dac1data.rs | 1 - src/dac/dac1path.rs | 3 - src/dac/dac1patl.rs | 6 - src/dlr/lnen.rs | 12 -- src/dlr/ovrclr.rs | 12 -- src/dlr/srsel0.rs | 8 -- src/dlr/srsel1.rs | 4 - src/dsd/cgcfg.rs | 4 - src/dsd/clc.rs | 2 - src/dsd/evflag.rs | 8 -- src/dsd/evflagclr.rs | 8 -- src/dsd/globcfg.rs | 1 - src/dsd/globrc.rs | 4 - src/dsd/ocs.rs | 2 - src/dsd_ch0/boundsel.rs | 2 - src/dsd_ch0/cgsync.rs | 2 - src/dsd_ch0/dicfg.rs | 9 -- src/dsd_ch0/fcfga.rs | 5 - src/dsd_ch0/fcfgc.rs | 5 - src/dsd_ch0/iwctr.rs | 4 - src/dsd_ch0/modcfg.rs | 2 - src/dsd_ch0/offm.rs | 1 - src/dsd_ch0/rectcfg.rs | 2 - src/ebu/addrsel0.rs | 3 - src/ebu/addrsel1.rs | 3 - src/ebu/addrsel2.rs | 3 - src/ebu/addrsel3.rs | 3 - src/ebu/busrap0.rs | 9 -- src/ebu/busrap1.rs | 9 -- src/ebu/busrap2.rs | 9 -- src/ebu/busrap3.rs | 9 -- src/ebu/busrcon0.rs | 15 --- src/ebu/busrcon1.rs | 15 --- src/ebu/busrcon2.rs | 15 --- src/ebu/busrcon3.rs | 15 --- src/ebu/buswap0.rs | 9 -- src/ebu/buswap1.rs | 9 -- src/ebu/buswap2.rs | 9 -- src/ebu/buswap3.rs | 9 -- src/ebu/buswcon0.rs | 10 -- src/ebu/buswcon1.rs | 10 -- src/ebu/buswcon2.rs | 10 -- src/ebu/buswcon3.rs | 10 -- src/ebu/clc.rs | 4 - src/ebu/modcon.rs | 9 -- src/ebu/sdrmcon.rs | 13 --- src/ebu/sdrmod.rs | 7 -- src/ebu/sdrmref.rs | 9 -- src/ebu/usercon.rs | 3 - src/eru0/exicon.rs | 9 -- src/eru0/exisel.rs | 8 -- src/eru0/exocon.rs | 7 -- src/eth0/bus_mode.rs | 13 --- src/eth0/flow_control.rs | 7 -- src/eth0/gmii_address.rs | 5 - src/eth0/gmii_data.rs | 1 - src/eth0/hash_table_high.rs | 1 - src/eth0/hash_table_low.rs | 1 - src/eth0/hw_feature.rs | 1 - src/eth0/interrupt_enable.rs | 15 --- src/eth0/interrupt_mask.rs | 2 - src/eth0/mac_address0_high.rs | 1 - src/eth0/mac_address0_low.rs | 1 - src/eth0/mac_address1_high.rs | 4 - src/eth0/mac_address1_low.rs | 1 - src/eth0/mac_address2_high.rs | 4 - src/eth0/mac_address2_low.rs | 1 - src/eth0/mac_address3_high.rs | 4 - src/eth0/mac_address3_low.rs | 1 - src/eth0/mac_configuration.rs | 19 --- src/eth0/mac_frame_filter.rs | 12 -- src/eth0/mmc_control.rs | 7 -- src/eth0/mmc_ipc_receive_interrupt_mask.rs | 28 ----- src/eth0/mmc_receive_interrupt_mask.rs | 26 ----- src/eth0/mmc_transmit_interrupt_mask.rs | 26 ----- src/eth0/operation_mode.rs | 12 -- src/eth0/pmt_control_status.rs | 5 - src/eth0/receive_descriptor_list_address.rs | 1 - src/eth0/receive_interrupt_watchdog_timer.rs | 1 - src/eth0/receive_poll_demand.rs | 1 - src/eth0/remote_wake_up_frame_filter.rs | 1 - src/eth0/rx_runt_error_frames.rs | 4 +- src/eth0/status.rs | 15 --- src/eth0/sub_second_increment.rs | 1 - src/eth0/system_time_higher_word_seconds.rs | 1 - src/eth0/system_time_nanoseconds_update.rs | 2 - src/eth0/system_time_seconds_update.rs | 1 - src/eth0/target_time_nanoseconds.rs | 1 - src/eth0/target_time_seconds.rs | 1 - src/eth0/timestamp_addend.rs | 1 - src/eth0/timestamp_control.rs | 16 --- src/eth0/transmit_descriptor_list_address.rs | 1 - src/eth0/transmit_poll_demand.rs | 1 - src/eth0/vlan_tag.rs | 4 - src/eth0_con/eth0_con.rs | 12 -- src/fce/clc.rs | 1 - src/fce_ke0/cfg.rs | 9 -- src/fce_ke0/check.rs | 1 - src/fce_ke0/crc.rs | 1 - src/fce_ke0/ctr.rs | 3 - src/fce_ke0/ir.rs | 1 - src/fce_ke0/length.rs | 1 - src/fce_ke0/sts.rs | 4 - src/flash0/fcon.rs | 13 --- src/flash0/marp.rs | 2 - src/generic.rs | 115 ++++++++++++++++++- src/generic/raw.rs | 2 + src/gpdma0/chenreg.rs | 2 - src/gpdma0/clearblock.rs | 8 -- src/gpdma0/cleardsttran.rs | 8 -- src/gpdma0/clearerr.rs | 8 -- src/gpdma0/clearsrctran.rs | 8 -- src/gpdma0/cleartfr.rs | 8 -- src/gpdma0/dmacfgreg.rs | 1 - src/gpdma0/lstdstreg.rs | 16 --- src/gpdma0/lstsrcreg.rs | 16 --- src/gpdma0/maskblock.rs | 16 --- src/gpdma0/maskdsttran.rs | 16 --- src/gpdma0/maskerr.rs | 16 --- src/gpdma0/masksrctran.rs | 16 --- src/gpdma0/masktfr.rs | 16 --- src/gpdma0/rawblock.rs | 8 -- src/gpdma0/rawdsttran.rs | 8 -- src/gpdma0/rawerr.rs | 8 -- src/gpdma0/rawsrctran.rs | 8 -- src/gpdma0/rawtfr.rs | 8 -- src/gpdma0/reqdstreg.rs | 16 --- src/gpdma0/reqsrcreg.rs | 16 --- src/gpdma0/sglreqdstreg.rs | 16 --- src/gpdma0/sglreqsrcreg.rs | 16 --- src/gpdma0_ch0/cfgh.rs | 7 -- src/gpdma0_ch0/cfgl.rs | 13 --- src/gpdma0_ch0/ctlh.rs | 2 - src/gpdma0_ch0/ctll.rs | 12 -- src/gpdma0_ch0/dar.rs | 1 - src/gpdma0_ch0/dsr.rs | 2 - src/gpdma0_ch0/dstat.rs | 1 - src/gpdma0_ch0/dstatar.rs | 1 - src/gpdma0_ch0/llp.rs | 1 - src/gpdma0_ch0/sar.rs | 1 - src/gpdma0_ch0/sgr.rs | 2 - src/gpdma0_ch0/sstat.rs | 1 - src/gpdma0_ch0/sstatar.rs | 1 - src/gpdma0_ch2/cfgh.rs | 5 - src/gpdma0_ch2/cfgl.rs | 11 -- src/gpdma0_ch2/ctlh.rs | 2 - src/gpdma0_ch2/ctll.rs | 8 -- src/gpdma0_ch2/dar.rs | 1 - src/gpdma0_ch2/sar.rs | 1 - src/gpdma1/chenreg.rs | 2 - src/gpdma1/clearblock.rs | 4 - src/gpdma1/cleardsttran.rs | 4 - src/gpdma1/clearerr.rs | 4 - src/gpdma1/clearsrctran.rs | 4 - src/gpdma1/cleartfr.rs | 4 - src/gpdma1/dmacfgreg.rs | 1 - src/gpdma1/lstdstreg.rs | 8 -- src/gpdma1/lstsrcreg.rs | 8 -- src/gpdma1/maskblock.rs | 8 -- src/gpdma1/maskdsttran.rs | 8 -- src/gpdma1/maskerr.rs | 8 -- src/gpdma1/masksrctran.rs | 8 -- src/gpdma1/masktfr.rs | 8 -- src/gpdma1/rawblock.rs | 4 - src/gpdma1/rawdsttran.rs | 4 - src/gpdma1/rawerr.rs | 4 - src/gpdma1/rawsrctran.rs | 4 - src/gpdma1/rawtfr.rs | 4 - src/gpdma1/reqdstreg.rs | 8 -- src/gpdma1/reqsrcreg.rs | 8 -- src/gpdma1/sglreqdstreg.rs | 8 -- src/gpdma1/sglreqsrcreg.rs | 8 -- src/gpdma1_ch0/cfgh.rs | 5 - src/gpdma1_ch0/cfgl.rs | 11 -- src/gpdma1_ch0/ctlh.rs | 2 - src/gpdma1_ch0/ctll.rs | 8 -- src/gpdma1_ch0/dar.rs | 1 - src/gpdma1_ch0/sar.rs | 1 - src/ledts0/evfr.rs | 3 - src/ledts0/fnctl.rs | 11 -- src/ledts0/globctl.rs | 11 -- src/ledts0/ldcmp0.rs | 4 - src/ledts0/ldcmp1.rs | 4 - src/ledts0/line0.rs | 4 - src/ledts0/line1.rs | 4 - src/ledts0/tscmp0.rs | 4 - src/ledts0/tscmp1.rs | 4 - src/ledts0/tsval.rs | 1 - src/lib.rs | 4 +- src/pba0/sts.rs | 1 - src/port0/hwsel.rs | 16 --- src/port0/iocr0.rs | 4 - src/port0/iocr12.rs | 4 - src/port0/iocr4.rs | 4 - src/port0/iocr8.rs | 4 - src/port0/omr.rs | 32 ------ src/port0/out.rs | 16 --- src/port0/pdr0.rs | 8 -- src/port0/pdr1.rs | 8 -- src/port0/pps.rs | 16 --- src/port1/hwsel.rs | 16 --- src/port1/iocr0.rs | 4 - src/port1/iocr12.rs | 4 - src/port1/iocr4.rs | 4 - src/port1/iocr8.rs | 4 - src/port1/omr.rs | 32 ------ src/port1/out.rs | 16 --- src/port1/pdr0.rs | 8 -- src/port1/pdr1.rs | 8 -- src/port1/pps.rs | 16 --- src/port14/hwsel.rs | 16 --- src/port14/iocr0.rs | 4 - src/port14/iocr12.rs | 4 - src/port14/iocr4.rs | 4 - src/port14/iocr8.rs | 4 - src/port14/omr.rs | 32 ------ src/port14/out.rs | 16 --- src/port14/pdisc.rs | 14 --- src/port14/pps.rs | 16 --- src/port15/hwsel.rs | 16 --- src/port15/iocr0.rs | 4 - src/port15/iocr12.rs | 4 - src/port15/iocr4.rs | 4 - src/port15/iocr8.rs | 4 - src/port15/omr.rs | 32 ------ src/port15/out.rs | 16 --- src/port15/pdisc.rs | 12 -- src/port15/pps.rs | 16 --- src/port2/hwsel.rs | 16 --- src/port2/iocr0.rs | 4 - src/port2/iocr12.rs | 4 - src/port2/iocr4.rs | 4 - src/port2/iocr8.rs | 4 - src/port2/omr.rs | 32 ------ src/port2/out.rs | 16 --- src/port2/pdr0.rs | 8 -- src/port2/pdr1.rs | 8 -- src/port2/pps.rs | 16 --- src/port3/hwsel.rs | 16 --- src/port3/iocr0.rs | 4 - src/port3/iocr12.rs | 4 - src/port3/iocr4.rs | 4 - src/port3/iocr8.rs | 4 - src/port3/omr.rs | 32 ------ src/port3/out.rs | 16 --- src/port3/pdr0.rs | 8 -- src/port3/pdr1.rs | 8 -- src/port3/pps.rs | 16 --- src/port4/hwsel.rs | 16 --- src/port4/iocr0.rs | 4 - src/port4/iocr4.rs | 4 - src/port4/omr.rs | 32 ------ src/port4/out.rs | 16 --- src/port4/pdr0.rs | 8 -- src/port4/pps.rs | 16 --- src/port5/hwsel.rs | 16 --- src/port5/iocr0.rs | 4 - src/port5/iocr4.rs | 4 - src/port5/iocr8.rs | 4 - src/port5/omr.rs | 32 ------ src/port5/out.rs | 16 --- src/port5/pdr0.rs | 8 -- src/port5/pdr1.rs | 8 -- src/port5/pps.rs | 16 --- src/port6/hwsel.rs | 16 --- src/port6/iocr0.rs | 4 - src/port6/iocr4.rs | 4 - src/port6/omr.rs | 32 ------ src/port6/out.rs | 16 --- src/port6/pdr0.rs | 8 -- src/port6/pps.rs | 16 --- src/port7/hwsel.rs | 16 --- src/port7/iocr0.rs | 4 - src/port7/iocr4.rs | 4 - src/port7/iocr8.rs | 4 - src/port7/omr.rs | 32 ------ src/port7/out.rs | 16 --- src/port7/pdr0.rs | 8 -- src/port7/pdr1.rs | 8 -- src/port7/pps.rs | 16 --- src/port8/hwsel.rs | 16 --- src/port8/iocr0.rs | 4 - src/port8/iocr4.rs | 4 - src/port8/iocr8.rs | 4 - src/port8/omr.rs | 32 ------ src/port8/out.rs | 16 --- src/port8/pdr0.rs | 8 -- src/port8/pdr1.rs | 8 -- src/port8/pps.rs | 16 --- src/port9/hwsel.rs | 16 --- src/port9/iocr0.rs | 4 - src/port9/iocr4.rs | 4 - src/port9/iocr8.rs | 4 - src/port9/omr.rs | 32 ------ src/port9/out.rs | 16 --- src/port9/pdr0.rs | 8 -- src/port9/pdr1.rs | 8 -- src/port9/pps.rs | 16 --- src/posif0/halps.rs | 2 - src/posif0/mcmc.rs | 2 - src/posif0/mcms.rs | 3 - src/posif0/mcsm.rs | 1 - src/posif0/pconf.rs | 16 --- src/posif0/pflge.rs | 18 --- src/posif0/prunc.rs | 2 - src/posif0/pruns.rs | 1 - src/posif0/psus.rs | 2 - src/posif0/qdc.rs | 4 - src/posif0/rpflg.rs | 9 -- src/posif0/spflg.rs | 9 -- src/ppb/actlr.rs | 5 - src/ppb/afsr.rs | 1 - src/ppb/aircr.rs | 5 - src/ppb/bfar.rs | 1 - src/ppb/ccr.rs | 6 - src/ppb/cfsr.rs | 19 --- src/ppb/cpacr.rs | 2 - src/ppb/fpcar.rs | 1 - src/ppb/fpccr.rs | 9 -- src/ppb/fpdscr.rs | 4 - src/ppb/hfsr.rs | 3 - src/ppb/icsr.rs | 5 - src/ppb/mmfar.rs | 1 - src/ppb/mpu_ctrl.rs | 3 - src/ppb/mpu_rasr.rs | 9 -- src/ppb/mpu_rasr_a1.rs | 9 -- src/ppb/mpu_rasr_a2.rs | 9 -- src/ppb/mpu_rasr_a3.rs | 9 -- src/ppb/mpu_rbar.rs | 3 - src/ppb/mpu_rbar_a1.rs | 3 - src/ppb/mpu_rbar_a2.rs | 3 - src/ppb/mpu_rbar_a3.rs | 3 - src/ppb/mpu_rnr.rs | 1 - src/ppb/nvic_iabr0.rs | 1 - src/ppb/nvic_iabr1.rs | 1 - src/ppb/nvic_iabr2.rs | 1 - src/ppb/nvic_iabr3.rs | 1 - src/ppb/nvic_icer0.rs | 1 - src/ppb/nvic_icer1.rs | 1 - src/ppb/nvic_icer2.rs | 1 - src/ppb/nvic_icer3.rs | 1 - src/ppb/nvic_icpr0.rs | 1 - src/ppb/nvic_icpr1.rs | 1 - src/ppb/nvic_icpr2.rs | 1 - src/ppb/nvic_icpr3.rs | 1 - src/ppb/nvic_ipr0.rs | 4 - src/ppb/nvic_ipr1.rs | 4 - src/ppb/nvic_ipr10.rs | 4 - src/ppb/nvic_ipr11.rs | 4 - src/ppb/nvic_ipr12.rs | 4 - src/ppb/nvic_ipr13.rs | 4 - src/ppb/nvic_ipr14.rs | 4 - src/ppb/nvic_ipr15.rs | 4 - src/ppb/nvic_ipr16.rs | 4 - src/ppb/nvic_ipr17.rs | 4 - src/ppb/nvic_ipr18.rs | 4 - src/ppb/nvic_ipr19.rs | 4 - src/ppb/nvic_ipr2.rs | 4 - src/ppb/nvic_ipr20.rs | 4 - src/ppb/nvic_ipr21.rs | 4 - src/ppb/nvic_ipr22.rs | 4 - src/ppb/nvic_ipr23.rs | 4 - src/ppb/nvic_ipr24.rs | 4 - src/ppb/nvic_ipr25.rs | 4 - src/ppb/nvic_ipr26.rs | 4 - src/ppb/nvic_ipr27.rs | 4 - src/ppb/nvic_ipr3.rs | 4 - src/ppb/nvic_ipr4.rs | 4 - src/ppb/nvic_ipr5.rs | 4 - src/ppb/nvic_ipr6.rs | 4 - src/ppb/nvic_ipr7.rs | 4 - src/ppb/nvic_ipr8.rs | 4 - src/ppb/nvic_ipr9.rs | 4 - src/ppb/nvic_iser0.rs | 1 - src/ppb/nvic_iser1.rs | 1 - src/ppb/nvic_iser2.rs | 1 - src/ppb/nvic_iser3.rs | 1 - src/ppb/nvic_ispr0.rs | 1 - src/ppb/nvic_ispr1.rs | 1 - src/ppb/nvic_ispr2.rs | 1 - src/ppb/nvic_ispr3.rs | 1 - src/ppb/scr.rs | 3 - src/ppb/shcsr.rs | 14 --- src/ppb/shpr1.rs | 3 - src/ppb/shpr2.rs | 1 - src/ppb/shpr3.rs | 2 - src/ppb/stir.rs | 1 - src/ppb/syst_calib.rs | 3 - src/ppb/syst_csr.rs | 4 - src/ppb/syst_cvr.rs | 1 - src/ppb/syst_rvr.rs | 1 - src/ppb/vtor.rs | 1 - src/pref/pcon.rs | 3 - src/rtc/atim0.rs | 4 - src/rtc/atim1.rs | 2 - src/rtc/clrsr.rs | 7 -- src/rtc/ctr.rs | 9 -- src/rtc/msksr.rs | 7 -- src/rtc/tim0.rs | 4 - src/rtc/tim1.rs | 3 - src/scu_clk/ccuclkcr.rs | 1 - src/scu_clk/cgatclr0.rs | 11 -- src/scu_clk/cgatclr1.rs | 8 -- src/scu_clk/cgatclr2.rs | 6 - src/scu_clk/cgatclr3.rs | 1 - src/scu_clk/cgatset0.rs | 11 -- src/scu_clk/cgatset1.rs | 8 -- src/scu_clk/cgatset2.rs | 6 - src/scu_clk/cgatset3.rs | 1 - src/scu_clk/clkclr.rs | 6 - src/scu_clk/clkset.rs | 6 - src/scu_clk/cpuclkcr.rs | 1 - src/scu_clk/dsleepcr.rs | 10 -- src/scu_clk/ebuclkcr.rs | 1 - src/scu_clk/extclkcr.rs | 2 - src/scu_clk/mlinkclkcr.rs | 8 -- src/scu_clk/pbclkcr.rs | 1 - src/scu_clk/sleepcr.rs | 7 -- src/scu_clk/sysclkcr.rs | 2 - src/scu_clk/usbclkcr.rs | 2 - src/scu_clk/wdtclkcr.rs | 2 - src/scu_general/ccucon.rs | 6 - src/scu_general/dtscon.rs | 6 - src/scu_general/g0orcen.rs | 2 - src/scu_general/g1orcen.rs | 2 - src/scu_general/gpr0.rs | 1 - src/scu_general/gpr1.rs | 1 - src/scu_general/rmacr.rs | 2 - src/scu_general/rmdata.rs | 1 - src/scu_general/sdmmcdel.rs | 2 - src/scu_general/stcon.rs | 1 - src/scu_hibernate/hdclr.rs | 4 - src/scu_hibernate/hdcr.rs | 13 --- src/scu_hibernate/hdset.rs | 4 - src/scu_hibernate/oscsictrl.rs | 1 - src/scu_hibernate/osculctrl.rs | 2 - src/scu_interrupt/nmireqen.rs | 7 -- src/scu_interrupt/srclr.rs | 15 --- src/scu_interrupt/srmsk.rs | 15 --- src/scu_interrupt/srset.rs | 15 --- src/scu_osc/clkcalconst.rs | 1 - src/scu_osc/oschpctrl.rs | 5 - src/scu_parity/mchkcon.rs | 13 --- src/scu_parity/peen.rs | 13 --- src/scu_parity/peflag.rs | 13 --- src/scu_parity/persten.rs | 1 - src/scu_parity/pete.rs | 13 --- src/scu_parity/pmtpr.rs | 1 - src/scu_parity/pmtsr.rs | 13 --- src/scu_pll/pllcon0.rs | 10 -- src/scu_pll/pllcon1.rs | 4 - src/scu_pll/pllcon2.rs | 2 - src/scu_pll/usbpllcon.rs | 9 -- src/scu_power/pwrclr.rs | 4 - src/scu_power/pwrmon.rs | 3 - src/scu_power/pwrset.rs | 4 - src/scu_reset/prclr0.rs | 11 -- src/scu_reset/prclr1.rs | 8 -- src/scu_reset/prclr2.rs | 6 - src/scu_reset/prclr3.rs | 1 - src/scu_reset/prset0.rs | 11 -- src/scu_reset/prset1.rs | 8 -- src/scu_reset/prset2.rs | 6 - src/scu_reset/prset3.rs | 1 - src/scu_reset/rstclr.rs | 4 - src/scu_reset/rstset.rs | 3 - src/scu_trap/trapclr.rs | 8 -- src/scu_trap/trapdis.rs | 8 -- src/scu_trap/trapset.rs | 8 -- src/sdmmc/argument1.rs | 1 - src/sdmmc/block_count.rs | 1 - src/sdmmc/block_gap_ctrl.rs | 4 - src/sdmmc/block_size.rs | 2 - src/sdmmc/clock_ctrl.rs | 3 - src/sdmmc/command.rs | 6 - src/sdmmc/data_buffer.rs | 1 - src/sdmmc/debug_sel.rs | 1 - src/sdmmc/en_int_signal_err.rs | 11 -- src/sdmmc/en_int_signal_norm.rs | 8 -- src/sdmmc/en_int_status_err.rs | 11 -- src/sdmmc/en_int_status_norm.rs | 8 -- src/sdmmc/force_event_acmd_err_status.rs | 6 - src/sdmmc/force_event_err_status.rs | 11 -- src/sdmmc/host_ctrl.rs | 6 - src/sdmmc/int_status_err.rs | 10 -- src/sdmmc/int_status_norm.rs | 7 -- src/sdmmc/power_ctrl.rs | 3 - src/sdmmc/sw_reset.rs | 3 - src/sdmmc/timeout_ctrl.rs | 1 - src/sdmmc/transfer_mode.rs | 5 - src/sdmmc/wakeup_ctrl.rs | 3 - src/sdmmc_con/sdmmc_con.rs | 4 - src/usb0.rs | 20 ++-- src/usb0/daintmsk.rs | 2 - src/usb0/dcfg.rs | 6 - src/usb0/dctl.rs | 10 -- src/usb0/diepempmsk.rs | 1 - src/usb0/diepmsk.rs | 9 -- src/usb0/dieptxf1.rs | 2 - src/usb0/dieptxf2.rs | 2 - src/usb0/dieptxf3.rs | 2 - src/usb0/dieptxf4.rs | 2 - src/usb0/dieptxf5.rs | 2 - src/usb0/dieptxf6.rs | 2 - src/usb0/doepmsk.rs | 11 -- src/usb0/dvbusdis.rs | 1 - src/usb0/dvbuspulse.rs | 1 - src/usb0/gahbcfg.rs | 6 - src/usb0/gdfifocfg.rs | 2 - src/usb0/gintmsk_devicemode.rs | 20 ---- src/usb0/gintmsk_hostmode.rs | 12 -- src/usb0/gintsts_devicemode.rs | 13 --- src/usb0/gintsts_hostmode.rs | 7 -- src/usb0/gnptxfsiz_devicemode.rs | 2 - src/usb0/gnptxfsiz_hostmode.rs | 2 - src/usb0/gotgctl.rs | 11 -- src/usb0/gotgint.rs | 6 - src/usb0/grstctl.rs | 5 - src/usb0/grxfsiz.rs | 1 - src/usb0/guid.rs | 3 - src/usb0/gusbcfg.rs | 9 -- src/usb0/haintmsk.rs | 1 - src/usb0/hcfg.rs | 5 - src/usb0/hfir.rs | 2 - src/usb0/hflbaddr.rs | 1 - src/usb0/hfnum.rs | 1 - src/usb0/hprt.rs | 8 -- src/usb0/hptxfsiz.rs | 2 - src/usb0/hptxsts.rs | 1 - src/usb0/pcgcctl.rs | 2 - src/usb0_ch0.rs | 8 +- src/usb0_ch0/hcchar.rs | 9 -- src/usb0_ch0/hcdma_buffermode.rs | 1 - src/usb0_ch0/hcdma_scatgather.rs | 2 - src/usb0_ch0/hcint.rs | 14 --- src/usb0_ch0/hcintmsk.rs | 13 --- src/usb0_ch0/hctsiz_buffermode.rs | 3 - src/usb0_ch0/hctsiz_scatgather.rs | 3 - src/usb0_ep0/diepctl0.rs | 7 -- src/usb0_ep0/diepdma0.rs | 1 - src/usb0_ep0/diepint0.rs | 7 -- src/usb0_ep0/dieptsiz0.rs | 2 - src/usb0_ep0/doepctl0.rs | 5 - src/usb0_ep0/doepdma0.rs | 1 - src/usb0_ep0/doepint0.rs | 12 -- src/usb0_ep0/doeptsiz0.rs | 3 - src/usb0_ep1.rs | 12 +- src/usb0_ep1/diepctl_intbulk.rs | 12 -- src/usb0_ep1/diepctl_isocont.rs | 12 -- src/usb0_ep1/diepdma.rs | 1 - src/usb0_ep1/diepint.rs | 7 -- src/usb0_ep1/dieptsiz.rs | 2 - src/usb0_ep1/doepctl_intbulk.rs | 12 -- src/usb0_ep1/doepctl_isocont.rs | 12 -- src/usb0_ep1/doepdma.rs | 1 - src/usb0_ep1/doepint.rs | 12 -- src/usb0_ep1/doeptsiz_control.rs | 3 - src/usb0_ep1/doeptsiz_iso.rs | 2 - src/usic0_ch0.rs | 20 ++-- src/usic0_ch0/brg.rs | 10 -- src/usic0_ch0/byp.rs | 1 - src/usic0_ch0/bypcr.rs | 7 -- src/usic0_ch0/ccr.rs | 10 -- src/usic0_ch0/cmtr.rs | 1 - src/usic0_ch0/dx0cr.rs | 7 -- src/usic0_ch0/dx1cr.rs | 8 -- src/usic0_ch0/dx2cr.rs | 7 -- src/usic0_ch0/dx3cr.rs | 7 -- src/usic0_ch0/dx4cr.rs | 7 -- src/usic0_ch0/dx5cr.rs | 7 -- src/usic0_ch0/fdr.rs | 2 - src/usic0_ch0/fmr.rs | 10 -- src/usic0_ch0/in_.rs | 1 - src/usic0_ch0/inpr.rs | 5 - src/usic0_ch0/kscfg.rs | 6 - src/usic0_ch0/pcr.rs | 32 ------ src/usic0_ch0/pcr_ascmode.rs | 13 --- src/usic0_ch0/pcr_iicmode.rs | 14 --- src/usic0_ch0/pcr_iismode.rs | 9 -- src/usic0_ch0/pcr_sscmode.rs | 14 --- src/usic0_ch0/pscr.rs | 17 --- src/usic0_ch0/psr.rs | 17 --- src/usic0_ch0/psr_ascmode.rs | 16 --- src/usic0_ch0/psr_iicmode.rs | 17 --- src/usic0_ch0/psr_iismode.rs | 13 --- src/usic0_ch0/psr_sscmode.rs | 12 -- src/usic0_ch0/rbctr.rs | 13 --- src/usic0_ch0/sctr.rs | 8 -- src/usic0_ch0/tbctr.rs | 10 -- src/usic0_ch0/tbuf.rs | 1 - src/usic0_ch0/tcsr.rs | 11 -- src/usic0_ch0/trbscr.rs | 8 -- src/usic0_ch0/trbsr.rs | 5 - src/vadc/brsctrl.rs | 6 - src/vadc/brsmr.rs | 8 -- src/vadc/brspnd.rs | 8 -- src/vadc/brssel.rs | 8 -- src/vadc/clc.rs | 2 - src/vadc/emuxsel.rs | 2 - src/vadc/globbound.rs | 2 - src/vadc/globcfg.rs | 9 -- src/vadc/globeflag.rs | 4 - src/vadc/globevnp.rs | 2 - src/vadc/globiclass.rs | 4 - src/vadc/globrcr.rs | 3 - src/vadc/globres.rs | 2 - src/vadc/globresd.rs | 2 - src/vadc/globtf.rs | 6 - src/vadc/ocs.rs | 5 - src/vadc_g0.rs | 4 +- src/vadc_g0/alias.rs | 2 - src/vadc_g0/arbcfg.rs | 3 - src/vadc_g0/arbpr.rs | 9 -- src/vadc_g0/asctrl.rs | 8 -- src/vadc_g0/asmr.rs | 8 -- src/vadc_g0/aspnd.rs | 8 -- src/vadc_g0/assel.rs | 8 -- src/vadc_g0/bfl.rs | 8 -- src/vadc_g0/bflc.rs | 4 - src/vadc_g0/bflnp.rs | 4 - src/vadc_g0/bfls.rs | 8 -- src/vadc_g0/bound.rs | 2 - src/vadc_g0/cefclr.rs | 8 -- src/vadc_g0/ceflag.rs | 8 -- src/vadc_g0/cevnp0.rs | 8 -- src/vadc_g0/chass.rs | 8 -- src/vadc_g0/chctr.rs | 11 -- src/vadc_g0/emuxctr.rs | 6 - src/vadc_g0/iclass.rs | 4 - src/vadc_g0/qctrl0.rs | 8 -- src/vadc_g0/qinr0.rs | 4 - src/vadc_g0/qmr0.rs | 7 -- src/vadc_g0/rcr.rs | 5 - src/vadc_g0/refclr.rs | 16 --- src/vadc_g0/reflag.rs | 16 --- src/vadc_g0/res.rs | 1 - src/vadc_g0/revnp0.rs | 8 -- src/vadc_g0/revnp1.rs | 8 -- src/vadc_g0/sefclr.rs | 2 - src/vadc_g0/seflag.rs | 2 - src/vadc_g0/sevnp.rs | 2 - src/vadc_g0/sract.rs | 8 -- src/vadc_g0/synctr.rs | 4 - src/vadc_g0/vfr.rs | 16 --- src/wdt/ctr.rs | 4 - src/wdt/srv.rs | 1 - src/wdt/wdtclr.rs | 1 - src/wdt/wlb.rs | 1 - src/wdt/wub.rs | 1 - 731 files changed, 152 insertions(+), 4874 deletions(-) diff --git a/src/can/clc.rs b/src/can/clc.rs index 8c7fa22a..4550ea68 100644 --- a/src/can/clc.rs +++ b/src/can/clc.rs @@ -32,13 +32,11 @@ impl R { impl W { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] - #[must_use] pub fn disr(&mut self) -> DISR_W { DISR_W::new(self, 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] - #[must_use] pub fn edis(&mut self) -> EDIS_W { EDIS_W::new(self, 3) } diff --git a/src/can/fdr.rs b/src/can/fdr.rs index e71f08c6..c144d2a7 100644 --- a/src/can/fdr.rs +++ b/src/can/fdr.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:9 - Step Value"] #[inline(always)] - #[must_use] pub fn step(&mut self) -> STEP_W { STEP_W::new(self, 0) } #[doc = "Bits 14:15 - Divider Mode"] #[inline(always)] - #[must_use] pub fn dm(&mut self) -> DM_W { DM_W::new(self, 14) } diff --git a/src/can/mcr.rs b/src/can/mcr.rs index 76d011f1..ab5397f6 100644 --- a/src/can/mcr.rs +++ b/src/can/mcr.rs @@ -120,13 +120,11 @@ impl R { impl W { #[doc = "Bits 0:3 - Baud Rate Logic Clock Select"] #[inline(always)] - #[must_use] pub fn clksel(&mut self) -> CLKSEL_W { CLKSEL_W::new(self, 0) } #[doc = "Bits 12:15 - Message Pending Selector"] #[inline(always)] - #[must_use] pub fn mpsel(&mut self) -> MPSEL_W { MPSEL_W::new(self, 12) } diff --git a/src/can/mitr.rs b/src/can/mitr.rs index a93d4063..3a2db121 100644 --- a/src/can/mitr.rs +++ b/src/can/mitr.rs @@ -5,7 +5,6 @@ pub type IT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>; impl W { #[doc = "Bits 0:7 - Interrupt Trigger"] #[inline(always)] - #[must_use] pub fn it(&mut self) -> IT_W { IT_W::new(self, 0) } diff --git a/src/can/msimask.rs b/src/can/msimask.rs index c2af20c6..fe233299 100644 --- a/src/can/msimask.rs +++ b/src/can/msimask.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Message Index Mask"] #[inline(always)] - #[must_use] pub fn im(&mut self) -> IM_W { IM_W::new(self, 0) } diff --git a/src/can/mspnd.rs b/src/can/mspnd.rs index 242d26f3..ec6a5272 100644 --- a/src/can/mspnd.rs +++ b/src/can/mspnd.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Message Pending"] #[inline(always)] - #[must_use] pub fn pnd(&mut self) -> PND_W { PND_W::new(self, 0) } diff --git a/src/can/panctr.rs b/src/can/panctr.rs index eb80f6eb..2dc229e0 100644 --- a/src/can/panctr.rs +++ b/src/can/panctr.rs @@ -116,19 +116,16 @@ impl R { impl W { #[doc = "Bits 0:7 - Panel Command"] #[inline(always)] - #[must_use] pub fn pancmd(&mut self) -> PANCMD_W { PANCMD_W::new(self, 0) } #[doc = "Bits 16:23 - Panel Argument 1"] #[inline(always)] - #[must_use] pub fn panar1(&mut self) -> PANAR1_W { PANAR1_W::new(self, 16) } #[doc = "Bits 24:31 - Panel Argument 2"] #[inline(always)] - #[must_use] pub fn panar2(&mut self) -> PANAR2_W { PANAR2_W::new(self, 24) } diff --git a/src/can_mo/mo.rs b/src/can_mo/mo.rs index 7c09acef..da70b2b0 100644 --- a/src/can_mo/mo.rs +++ b/src/can_mo/mo.rs @@ -49,12 +49,12 @@ impl MO { #[doc = "0x1c - Message Object Status Register"] #[inline(always)] pub const fn mostat(&self) -> &MOSTAT { - unsafe { &*(self as *const Self).cast::().add(28).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(28).cast() } } #[doc = "0x1c - Message Object Control Register"] #[inline(always)] pub const fn moctr(&self) -> &MOCTR { - unsafe { &*(self as *const Self).cast::().add(28).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(28).cast() } } } #[doc = "MOFCR (rw) register accessor: Message Object Function Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`mofcr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mofcr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mofcr`] diff --git a/src/can_mo/mo/moamr.rs b/src/can_mo/mo/moamr.rs index 6f86bc6d..b1917386 100644 --- a/src/can_mo/mo/moamr.rs +++ b/src/can_mo/mo/moamr.rs @@ -74,13 +74,11 @@ impl R { impl W { #[doc = "Bits 0:28 - Acceptance Mask for Message Identifier"] #[inline(always)] - #[must_use] pub fn am(&mut self) -> AM_W { AM_W::new(self, 0) } #[doc = "Bit 29 - Acceptance Mask Bit for Message IDE Bit"] #[inline(always)] - #[must_use] pub fn mide(&mut self) -> MIDE_W { MIDE_W::new(self, 29) } diff --git a/src/can_mo/mo/moar.rs b/src/can_mo/mo/moar.rs index 3e333ae8..3e54af70 100644 --- a/src/can_mo/mo/moar.rs +++ b/src/can_mo/mo/moar.rs @@ -63,7 +63,7 @@ where #[derive(Clone, Copy, Debug, PartialEq, Eq)] #[repr(u8)] pub enum PRI_A { - #[doc = "1: Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."] + #[doc = "1: Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."] VALUE2 = 1, #[doc = "2: Transmit acceptance filtering is based on the CAN identifier. This means, message object n is considered for transmission only if there is no other message object with higher priority identifier + IDE + DIR (with respect to CAN arbitration rules) somewhere in the list (see )."] VALUE3 = 2, @@ -93,7 +93,7 @@ impl PRI_R { _ => None, } } - #[doc = "Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."] + #[doc = "Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."] #[inline(always)] pub fn is_value2(&self) -> bool { *self == PRI_A::VALUE2 @@ -116,7 +116,7 @@ where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From, { - #[doc = "Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."] + #[doc = "Transmit acceptance filtering is based on the list order. This means that message object n is considered for transmission only if there is no other message object with valid transmit request (MSGVAL & TXEN0 & TXEN1 = 1) somewhere before this object in the list."] #[inline(always)] pub fn value2(self) -> &'a mut crate::W { self.variant(PRI_A::VALUE2) @@ -152,19 +152,16 @@ impl R { impl W { #[doc = "Bits 0:28 - CAN Identifier of Message Object n"] #[inline(always)] - #[must_use] pub fn id(&mut self) -> ID_W { ID_W::new(self, 0) } #[doc = "Bit 29 - Identifier Extension Bit of Message Object n"] #[inline(always)] - #[must_use] pub fn ide(&mut self) -> IDE_W { IDE_W::new(self, 29) } #[doc = "Bits 30:31 - Priority Class"] #[inline(always)] - #[must_use] pub fn pri(&mut self) -> PRI_W { PRI_W::new(self, 30) } diff --git a/src/can_mo/mo/moctr.rs b/src/can_mo/mo/moctr.rs index 205ed740..a0d07339 100644 --- a/src/can_mo/mo/moctr.rs +++ b/src/can_mo/mo/moctr.rs @@ -51,145 +51,121 @@ pub type SETDIR_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Reset/Set Receive Pending"] #[inline(always)] - #[must_use] pub fn resrxpnd(&mut self) -> RESRXPND_W { RESRXPND_W::new(self, 0) } #[doc = "Bit 1 - Reset/Set Transmit Pending"] #[inline(always)] - #[must_use] pub fn restxpnd(&mut self) -> RESTXPND_W { RESTXPND_W::new(self, 1) } #[doc = "Bit 2 - Reset/Set Receive Updating"] #[inline(always)] - #[must_use] pub fn resrxupd(&mut self) -> RESRXUPD_W { RESRXUPD_W::new(self, 2) } #[doc = "Bit 3 - Reset/Set New Data"] #[inline(always)] - #[must_use] pub fn resnewdat(&mut self) -> RESNEWDAT_W { RESNEWDAT_W::new(self, 3) } #[doc = "Bit 4 - Reset/Set Message Lost"] #[inline(always)] - #[must_use] pub fn resmsglst(&mut self) -> RESMSGLST_W { RESMSGLST_W::new(self, 4) } #[doc = "Bit 5 - Reset/Set Message Valid"] #[inline(always)] - #[must_use] pub fn resmsgval(&mut self) -> RESMSGVAL_W { RESMSGVAL_W::new(self, 5) } #[doc = "Bit 6 - Reset/Set Receive/Transmit Selected"] #[inline(always)] - #[must_use] pub fn resrtsel(&mut self) -> RESRTSEL_W { RESRTSEL_W::new(self, 6) } #[doc = "Bit 7 - Reset/Set Receive Enable"] #[inline(always)] - #[must_use] pub fn resrxen(&mut self) -> RESRXEN_W { RESRXEN_W::new(self, 7) } #[doc = "Bit 8 - Reset/Set Transmit Request"] #[inline(always)] - #[must_use] pub fn restxrq(&mut self) -> RESTXRQ_W { RESTXRQ_W::new(self, 8) } #[doc = "Bit 9 - Reset/Set Transmit Enable 0"] #[inline(always)] - #[must_use] pub fn restxen0(&mut self) -> RESTXEN0_W { RESTXEN0_W::new(self, 9) } #[doc = "Bit 10 - Reset/Set Transmit Enable 1"] #[inline(always)] - #[must_use] pub fn restxen1(&mut self) -> RESTXEN1_W { RESTXEN1_W::new(self, 10) } #[doc = "Bit 11 - Reset/Set Message Direction"] #[inline(always)] - #[must_use] pub fn resdir(&mut self) -> RESDIR_W { RESDIR_W::new(self, 11) } #[doc = "Bit 16 - Reset/Set Receive Pending"] #[inline(always)] - #[must_use] pub fn setrxpnd(&mut self) -> SETRXPND_W { SETRXPND_W::new(self, 16) } #[doc = "Bit 17 - Reset/Set Transmit Pending"] #[inline(always)] - #[must_use] pub fn settxpnd(&mut self) -> SETTXPND_W { SETTXPND_W::new(self, 17) } #[doc = "Bit 18 - Reset/Set Receive Updating"] #[inline(always)] - #[must_use] pub fn setrxupd(&mut self) -> SETRXUPD_W { SETRXUPD_W::new(self, 18) } #[doc = "Bit 19 - Reset/Set New Data"] #[inline(always)] - #[must_use] pub fn setnewdat(&mut self) -> SETNEWDAT_W { SETNEWDAT_W::new(self, 19) } #[doc = "Bit 20 - Reset/Set Message Lost"] #[inline(always)] - #[must_use] pub fn setmsglst(&mut self) -> SETMSGLST_W { SETMSGLST_W::new(self, 20) } #[doc = "Bit 21 - Reset/Set Message Valid"] #[inline(always)] - #[must_use] pub fn setmsgval(&mut self) -> SETMSGVAL_W { SETMSGVAL_W::new(self, 21) } #[doc = "Bit 22 - Reset/Set Receive/Transmit Selected"] #[inline(always)] - #[must_use] pub fn setrtsel(&mut self) -> SETRTSEL_W { SETRTSEL_W::new(self, 22) } #[doc = "Bit 23 - Reset/Set Receive Enable"] #[inline(always)] - #[must_use] pub fn setrxen(&mut self) -> SETRXEN_W { SETRXEN_W::new(self, 23) } #[doc = "Bit 24 - Reset/Set Transmit Request"] #[inline(always)] - #[must_use] pub fn settxrq(&mut self) -> SETTXRQ_W { SETTXRQ_W::new(self, 24) } #[doc = "Bit 25 - Reset/Set Transmit Enable 0"] #[inline(always)] - #[must_use] pub fn settxen0(&mut self) -> SETTXEN0_W { SETTXEN0_W::new(self, 25) } #[doc = "Bit 26 - Reset/Set Transmit Enable 1"] #[inline(always)] - #[must_use] pub fn settxen1(&mut self) -> SETTXEN1_W { SETTXEN1_W::new(self, 26) } #[doc = "Bit 27 - Reset/Set Message Direction"] #[inline(always)] - #[must_use] pub fn setdir(&mut self) -> SETDIR_W { SETDIR_W::new(self, 27) } diff --git a/src/can_mo/mo/modatah.rs b/src/can_mo/mo/modatah.rs index e29226aa..b73ecae4 100644 --- a/src/can_mo/mo/modatah.rs +++ b/src/can_mo/mo/modatah.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 4 of Message Object n"] #[inline(always)] - #[must_use] pub fn db4(&mut self) -> DB4_W { DB4_W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 5 of Message Object n"] #[inline(always)] - #[must_use] pub fn db5(&mut self) -> DB5_W { DB5_W::new(self, 8) } #[doc = "Bits 16:23 - Data Byte 6 of Message Object n"] #[inline(always)] - #[must_use] pub fn db6(&mut self) -> DB6_W { DB6_W::new(self, 16) } #[doc = "Bits 24:31 - Data Byte 7 of Message Object n"] #[inline(always)] - #[must_use] pub fn db7(&mut self) -> DB7_W { DB7_W::new(self, 24) } diff --git a/src/can_mo/mo/modatal.rs b/src/can_mo/mo/modatal.rs index 9abb2c4e..14de5a2f 100644 --- a/src/can_mo/mo/modatal.rs +++ b/src/can_mo/mo/modatal.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Data Byte 0 of Message Object n"] #[inline(always)] - #[must_use] pub fn db0(&mut self) -> DB0_W { DB0_W::new(self, 0) } #[doc = "Bits 8:15 - Data Byte 1 of Message Object n"] #[inline(always)] - #[must_use] pub fn db1(&mut self) -> DB1_W { DB1_W::new(self, 8) } #[doc = "Bits 16:23 - Data Byte 2 of Message Object n"] #[inline(always)] - #[must_use] pub fn db2(&mut self) -> DB2_W { DB2_W::new(self, 16) } #[doc = "Bits 24:31 - Data Byte 3 of Message Object n"] #[inline(always)] - #[must_use] pub fn db3(&mut self) -> DB3_W { DB3_W::new(self, 24) } diff --git a/src/can_mo/mo/mofcr.rs b/src/can_mo/mo/mofcr.rs index c9b10a37..9642d91f 100644 --- a/src/can_mo/mo/mofcr.rs +++ b/src/can_mo/mo/mofcr.rs @@ -718,85 +718,71 @@ impl R { impl W { #[doc = "Bits 0:3 - Message Mode Control"] #[inline(always)] - #[must_use] pub fn mmc(&mut self) -> MMC_W { MMC_W::new(self, 0) } #[doc = "Bit 4 - Receive Time-Out Enable"] #[inline(always)] - #[must_use] pub fn rxtoe(&mut self) -> RXTOE_W { RXTOE_W::new(self, 4) } #[doc = "Bit 8 - Gateway Data Frame Send"] #[inline(always)] - #[must_use] pub fn gdfs(&mut self) -> GDFS_W { GDFS_W::new(self, 8) } #[doc = "Bit 9 - Identifier Copy"] #[inline(always)] - #[must_use] pub fn idc(&mut self) -> IDC_W { IDC_W::new(self, 9) } #[doc = "Bit 10 - Data Length Code Copy"] #[inline(always)] - #[must_use] pub fn dlcc(&mut self) -> DLCC_W { DLCC_W::new(self, 10) } #[doc = "Bit 11 - Data Copy"] #[inline(always)] - #[must_use] pub fn datc(&mut self) -> DATC_W { DATC_W::new(self, 11) } #[doc = "Bit 16 - Receive Interrupt Enable"] #[inline(always)] - #[must_use] pub fn rxie(&mut self) -> RXIE_W { RXIE_W::new(self, 16) } #[doc = "Bit 17 - Transmit Interrupt Enable"] #[inline(always)] - #[must_use] pub fn txie(&mut self) -> TXIE_W { TXIE_W::new(self, 17) } #[doc = "Bit 18 - Overflow Interrupt Enable"] #[inline(always)] - #[must_use] pub fn ovie(&mut self) -> OVIE_W { OVIE_W::new(self, 18) } #[doc = "Bit 20 - Foreign Remote Request Enable"] #[inline(always)] - #[must_use] pub fn frren(&mut self) -> FRREN_W { FRREN_W::new(self, 20) } #[doc = "Bit 21 - Transmit Object Remote Monitoring"] #[inline(always)] - #[must_use] pub fn rmm(&mut self) -> RMM_W { RMM_W::new(self, 21) } #[doc = "Bit 22 - Single Data Transfer"] #[inline(always)] - #[must_use] pub fn sdt(&mut self) -> SDT_W { SDT_W::new(self, 22) } #[doc = "Bit 23 - Single Transmit Trial"] #[inline(always)] - #[must_use] pub fn stt(&mut self) -> STT_W { STT_W::new(self, 23) } #[doc = "Bits 24:27 - Data Length Code"] #[inline(always)] - #[must_use] pub fn dlc(&mut self) -> DLC_W { DLC_W::new(self, 24) } diff --git a/src/can_mo/mo/mofgpr.rs b/src/can_mo/mo/mofgpr.rs index 8856aaf1..eeb82f62 100644 --- a/src/can_mo/mo/mofgpr.rs +++ b/src/can_mo/mo/mofgpr.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Bottom Pointer"] #[inline(always)] - #[must_use] pub fn bot(&mut self) -> BOT_W { BOT_W::new(self, 0) } #[doc = "Bits 8:15 - Top Pointer"] #[inline(always)] - #[must_use] pub fn top(&mut self) -> TOP_W { TOP_W::new(self, 8) } #[doc = "Bits 16:23 - Current Object Pointer"] #[inline(always)] - #[must_use] pub fn cur(&mut self) -> CUR_W { CUR_W::new(self, 16) } #[doc = "Bits 24:31 - Object Select Pointer"] #[inline(always)] - #[must_use] pub fn sel(&mut self) -> SEL_W { SEL_W::new(self, 24) } diff --git a/src/can_mo/mo/moipr.rs b/src/can_mo/mo/moipr.rs index 326e87b1..7dc65893 100644 --- a/src/can_mo/mo/moipr.rs +++ b/src/can_mo/mo/moipr.rs @@ -207,25 +207,21 @@ impl R { impl W { #[doc = "Bits 0:3 - Receive Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn rxinp(&mut self) -> RXINP_W { RXINP_W::new(self, 0) } #[doc = "Bits 4:7 - Transmit Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn txinp(&mut self) -> TXINP_W { TXINP_W::new(self, 4) } #[doc = "Bits 8:15 - Message Pending Number"] #[inline(always)] - #[must_use] pub fn mpn(&mut self) -> MPN_W { MPN_W::new(self, 8) } #[doc = "Bits 16:31 - CAN Frame Counter Value"] #[inline(always)] - #[must_use] pub fn cfcval(&mut self) -> CFCVAL_W { CFCVAL_W::new(self, 16) } diff --git a/src/can_node0/nbtr.rs b/src/can_node0/nbtr.rs index e4fe6382..7b1c0b00 100644 --- a/src/can_node0/nbtr.rs +++ b/src/can_node0/nbtr.rs @@ -101,31 +101,26 @@ impl R { impl W { #[doc = "Bits 0:5 - Baud Rate Prescaler"] #[inline(always)] - #[must_use] pub fn brp(&mut self) -> BRP_W { BRP_W::new(self, 0) } #[doc = "Bits 6:7 - (Re) Synchronization Jump Width"] #[inline(always)] - #[must_use] pub fn sjw(&mut self) -> SJW_W { SJW_W::new(self, 6) } #[doc = "Bits 8:11 - Time Segment Before Sample Point"] #[inline(always)] - #[must_use] pub fn tseg1(&mut self) -> TSEG1_W { TSEG1_W::new(self, 8) } #[doc = "Bits 12:14 - Time Segment After Sample Point"] #[inline(always)] - #[must_use] pub fn tseg2(&mut self) -> TSEG2_W { TSEG2_W::new(self, 12) } #[doc = "Bit 15 - Divide Prescaler Clock by 8"] #[inline(always)] - #[must_use] pub fn div8(&mut self) -> DIV8_W { DIV8_W::new(self, 15) } diff --git a/src/can_node0/ncr.rs b/src/can_node0/ncr.rs index b5f4ad29..d371ec80 100644 --- a/src/can_node0/ncr.rs +++ b/src/can_node0/ncr.rs @@ -324,49 +324,41 @@ impl R { impl W { #[doc = "Bit 0 - Node Initialization"] #[inline(always)] - #[must_use] pub fn init(&mut self) -> INIT_W { INIT_W::new(self, 0) } #[doc = "Bit 1 - Transfer Interrupt Enable"] #[inline(always)] - #[must_use] pub fn trie(&mut self) -> TRIE_W { TRIE_W::new(self, 1) } #[doc = "Bit 2 - LEC Indicated Error Interrupt Enable"] #[inline(always)] - #[must_use] pub fn lecie(&mut self) -> LECIE_W { LECIE_W::new(self, 2) } #[doc = "Bit 3 - Alert Interrupt Enable"] #[inline(always)] - #[must_use] pub fn alie(&mut self) -> ALIE_W { ALIE_W::new(self, 3) } #[doc = "Bit 4 - CAN Disable"] #[inline(always)] - #[must_use] pub fn candis(&mut self) -> CANDIS_W { CANDIS_W::new(self, 4) } #[doc = "Bit 5 - Transmit Disable"] #[inline(always)] - #[must_use] pub fn txdis(&mut self) -> TXDIS_W { TXDIS_W::new(self, 5) } #[doc = "Bit 6 - Configuration Change Enable"] #[inline(always)] - #[must_use] pub fn cce(&mut self) -> CCE_W { CCE_W::new(self, 6) } #[doc = "Bit 7 - CAN Analyzer Mode"] #[inline(always)] - #[must_use] pub fn calm(&mut self) -> CALM_W { CALM_W::new(self, 7) } diff --git a/src/can_node0/necnt.rs b/src/can_node0/necnt.rs index 34259f28..61129811 100644 --- a/src/can_node0/necnt.rs +++ b/src/can_node0/necnt.rs @@ -116,19 +116,16 @@ impl R { impl W { #[doc = "Bits 0:7 - Receive Error Counter"] #[inline(always)] - #[must_use] pub fn rec(&mut self) -> REC_W { REC_W::new(self, 0) } #[doc = "Bits 8:15 - Transmit Error Counter"] #[inline(always)] - #[must_use] pub fn tec(&mut self) -> TEC_W { TEC_W::new(self, 8) } #[doc = "Bits 16:23 - Error Warning Level"] #[inline(always)] - #[must_use] pub fn ewrnlvl(&mut self) -> EWRNLVL_W { EWRNLVL_W::new(self, 16) } diff --git a/src/can_node0/nfcr.rs b/src/can_node0/nfcr.rs index caf31cbc..16546e6b 100644 --- a/src/can_node0/nfcr.rs +++ b/src/can_node0/nfcr.rs @@ -232,31 +232,26 @@ impl R { impl W { #[doc = "Bits 0:15 - CAN Frame Counter"] #[inline(always)] - #[must_use] pub fn cfc(&mut self) -> CFC_W { CFC_W::new(self, 0) } #[doc = "Bits 16:18 - CAN Frame Count Selection"] #[inline(always)] - #[must_use] pub fn cfsel(&mut self) -> CFSEL_W { CFSEL_W::new(self, 16) } #[doc = "Bits 19:20 - CAN Frame Counter Mode"] #[inline(always)] - #[must_use] pub fn cfmod(&mut self) -> CFMOD_W { CFMOD_W::new(self, 19) } #[doc = "Bit 22 - CAN Frame Count Interrupt Enable"] #[inline(always)] - #[must_use] pub fn cfcie(&mut self) -> CFCIE_W { CFCIE_W::new(self, 22) } #[doc = "Bit 23 - CAN Frame Counter Overflow Flag"] #[inline(always)] - #[must_use] pub fn cfcov(&mut self) -> CFCOV_W { CFCOV_W::new(self, 23) } diff --git a/src/can_node0/nipr.rs b/src/can_node0/nipr.rs index b832dafd..d662a3fb 100644 --- a/src/can_node0/nipr.rs +++ b/src/can_node0/nipr.rs @@ -371,25 +371,21 @@ impl R { impl W { #[doc = "Bits 0:3 - Alert Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn alinp(&mut self) -> ALINP_W { ALINP_W::new(self, 0) } #[doc = "Bits 4:7 - Last Error Code Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn lecinp(&mut self) -> LECINP_W { LECINP_W::new(self, 4) } #[doc = "Bits 8:11 - Transfer OK Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn trinp(&mut self) -> TRINP_W { TRINP_W::new(self, 8) } #[doc = "Bits 12:15 - Frame Counter Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn cfcinp(&mut self) -> CFCINP_W { CFCINP_W::new(self, 12) } diff --git a/src/can_node0/npcr.rs b/src/can_node0/npcr.rs index 3408526d..28716a41 100644 --- a/src/can_node0/npcr.rs +++ b/src/can_node0/npcr.rs @@ -74,13 +74,11 @@ impl R { impl W { #[doc = "Bits 0:2 - Receive Select"] #[inline(always)] - #[must_use] pub fn rxsel(&mut self) -> RXSEL_W { RXSEL_W::new(self, 0) } #[doc = "Bit 8 - Loop-Back Mode"] #[inline(always)] - #[must_use] pub fn lbm(&mut self) -> LBM_W { LBM_W::new(self, 8) } diff --git a/src/can_node0/nsr.rs b/src/can_node0/nsr.rs index 61de067f..f64249c5 100644 --- a/src/can_node0/nsr.rs +++ b/src/can_node0/nsr.rs @@ -339,37 +339,31 @@ impl R { impl W { #[doc = "Bits 0:2 - Last Error Code"] #[inline(always)] - #[must_use] pub fn lec(&mut self) -> LEC_W { LEC_W::new(self, 0) } #[doc = "Bit 3 - Message Transmitted Successfully"] #[inline(always)] - #[must_use] pub fn txok(&mut self) -> TXOK_W { TXOK_W::new(self, 3) } #[doc = "Bit 4 - Message Received Successfully"] #[inline(always)] - #[must_use] pub fn rxok(&mut self) -> RXOK_W { RXOK_W::new(self, 4) } #[doc = "Bit 5 - Alert Warning"] #[inline(always)] - #[must_use] pub fn alert(&mut self) -> ALERT_W { ALERT_W::new(self, 5) } #[doc = "Bit 8 - List Length Error"] #[inline(always)] - #[must_use] pub fn lle(&mut self) -> LLE_W { LLE_W::new(self, 8) } #[doc = "Bit 9 - List Object Error"] #[inline(always)] - #[must_use] pub fn loe(&mut self) -> LOE_W { LOE_W::new(self, 9) } diff --git a/src/ccu40/gcsc.rs b/src/ccu40/gcsc.rs index 09fb22a6..f362d1f7 100644 --- a/src/ccu40/gcsc.rs +++ b/src/ccu40/gcsc.rs @@ -35,97 +35,81 @@ pub type S3STC_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slice 0 shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s0sc(&mut self) -> S0SC_W { S0SC_W::new(self, 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s0dsc(&mut self) -> S0DSC_W { S0DSC_W::new(self, 1) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s0psc(&mut self) -> S0PSC_W { S0PSC_W::new(self, 2) } #[doc = "Bit 4 - Slice 1 shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s1sc(&mut self) -> S1SC_W { S1SC_W::new(self, 4) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s1dsc(&mut self) -> S1DSC_W { S1DSC_W::new(self, 5) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s1psc(&mut self) -> S1PSC_W { S1PSC_W::new(self, 6) } #[doc = "Bit 8 - Slice 2 shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s2sc(&mut self) -> S2SC_W { S2SC_W::new(self, 8) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s2dsc(&mut self) -> S2DSC_W { S2DSC_W::new(self, 9) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s2psc(&mut self) -> S2PSC_W { S2PSC_W::new(self, 10) } #[doc = "Bit 12 - Slice 3 shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s3sc(&mut self) -> S3SC_W { S3SC_W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s3dsc(&mut self) -> S3DSC_W { S3DSC_W::new(self, 13) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s3psc(&mut self) -> S3PSC_W { S3PSC_W::new(self, 14) } #[doc = "Bit 16 - Slice 0 status bit clear"] #[inline(always)] - #[must_use] pub fn s0stc(&mut self) -> S0STC_W { S0STC_W::new(self, 16) } #[doc = "Bit 17 - Slice 1 status bit clear"] #[inline(always)] - #[must_use] pub fn s1stc(&mut self) -> S1STC_W { S1STC_W::new(self, 17) } #[doc = "Bit 18 - Slice 2 status bit clear"] #[inline(always)] - #[must_use] pub fn s2stc(&mut self) -> S2STC_W { S2STC_W::new(self, 18) } #[doc = "Bit 19 - Slice 3 status bit clear"] #[inline(always)] - #[must_use] pub fn s3stc(&mut self) -> S3STC_W { S3STC_W::new(self, 19) } diff --git a/src/ccu40/gcss.rs b/src/ccu40/gcss.rs index 3b1ed572..9c9bfe6c 100644 --- a/src/ccu40/gcss.rs +++ b/src/ccu40/gcss.rs @@ -35,97 +35,81 @@ pub type S3STS_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slice 0 shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s0se(&mut self) -> S0SE_W { S0SE_W::new(self, 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s0dse(&mut self) -> S0DSE_W { S0DSE_W::new(self, 1) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s0pse(&mut self) -> S0PSE_W { S0PSE_W::new(self, 2) } #[doc = "Bit 4 - Slice 1 shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s1se(&mut self) -> S1SE_W { S1SE_W::new(self, 4) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s1dse(&mut self) -> S1DSE_W { S1DSE_W::new(self, 5) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s1pse(&mut self) -> S1PSE_W { S1PSE_W::new(self, 6) } #[doc = "Bit 8 - Slice 2 shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s2se(&mut self) -> S2SE_W { S2SE_W::new(self, 8) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s2dse(&mut self) -> S2DSE_W { S2DSE_W::new(self, 9) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s2pse(&mut self) -> S2PSE_W { S2PSE_W::new(self, 10) } #[doc = "Bit 12 - Slice 3 shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s3se(&mut self) -> S3SE_W { S3SE_W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s3dse(&mut self) -> S3DSE_W { S3DSE_W::new(self, 13) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s3pse(&mut self) -> S3PSE_W { S3PSE_W::new(self, 14) } #[doc = "Bit 16 - Slice 0 status bit set"] #[inline(always)] - #[must_use] pub fn s0sts(&mut self) -> S0STS_W { S0STS_W::new(self, 16) } #[doc = "Bit 17 - Slice 1 status bit set"] #[inline(always)] - #[must_use] pub fn s1sts(&mut self) -> S1STS_W { S1STS_W::new(self, 17) } #[doc = "Bit 18 - Slice 2 status bit set"] #[inline(always)] - #[must_use] pub fn s2sts(&mut self) -> S2STS_W { S2STS_W::new(self, 18) } #[doc = "Bit 19 - Slice 3 status bit set"] #[inline(always)] - #[must_use] pub fn s3sts(&mut self) -> S3STS_W { S3STS_W::new(self, 19) } diff --git a/src/ccu40/gctrl.rs b/src/ccu40/gctrl.rs index d0a62ebd..b2f22ff1 100644 --- a/src/ccu40/gctrl.rs +++ b/src/ccu40/gctrl.rs @@ -603,49 +603,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Prescaler Clear Configuration"] #[inline(always)] - #[must_use] pub fn prbc(&mut self) -> PRBC_W { PRBC_W::new(self, 0) } #[doc = "Bits 4:5 - Prescaler Input Clock Selection"] #[inline(always)] - #[must_use] pub fn pcis(&mut self) -> PCIS_W { PCIS_W::new(self, 4) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] - #[must_use] pub fn suscfg(&mut self) -> SUSCFG_W { SUSCFG_W::new(self, 8) } #[doc = "Bit 10 - Slice 0 Multi Channel shadow transfer enable"] #[inline(always)] - #[must_use] pub fn mse0(&mut self) -> MSE0_W { MSE0_W::new(self, 10) } #[doc = "Bit 11 - Slice 1 Multi Channel shadow transfer enable"] #[inline(always)] - #[must_use] pub fn mse1(&mut self) -> MSE1_W { MSE1_W::new(self, 11) } #[doc = "Bit 12 - Slice 2 Multi Channel shadow transfer enable"] #[inline(always)] - #[must_use] pub fn mse2(&mut self) -> MSE2_W { MSE2_W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Multi Channel shadow transfer enable"] #[inline(always)] - #[must_use] pub fn mse3(&mut self) -> MSE3_W { MSE3_W::new(self, 13) } #[doc = "Bits 14:15 - Multi Channel shadow transfer request configuration"] #[inline(always)] - #[must_use] pub fn msde(&mut self) -> MSDE_W { MSDE_W::new(self, 14) } diff --git a/src/ccu40/gidlc.rs b/src/ccu40/gidlc.rs index 4fdfa4f5..5f419898 100644 --- a/src/ccu40/gidlc.rs +++ b/src/ccu40/gidlc.rs @@ -13,31 +13,26 @@ pub type SPRB_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - CC40 IDLE mode clear"] #[inline(always)] - #[must_use] pub fn cs0i(&mut self) -> CS0I_W { CS0I_W::new(self, 0) } #[doc = "Bit 1 - CC41 IDLE mode clear"] #[inline(always)] - #[must_use] pub fn cs1i(&mut self) -> CS1I_W { CS1I_W::new(self, 1) } #[doc = "Bit 2 - CC42 IDLE mode clear"] #[inline(always)] - #[must_use] pub fn cs2i(&mut self) -> CS2I_W { CS2I_W::new(self, 2) } #[doc = "Bit 3 - CC43 IDLE mode clear"] #[inline(always)] - #[must_use] pub fn cs3i(&mut self) -> CS3I_W { CS3I_W::new(self, 3) } #[doc = "Bit 8 - Prescaler Run Bit Set"] #[inline(always)] - #[must_use] pub fn sprb(&mut self) -> SPRB_W { SPRB_W::new(self, 8) } diff --git a/src/ccu40/gidls.rs b/src/ccu40/gidls.rs index 8461de49..1908ddf9 100644 --- a/src/ccu40/gidls.rs +++ b/src/ccu40/gidls.rs @@ -15,37 +15,31 @@ pub type PSIC_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - CC40 IDLE mode set"] #[inline(always)] - #[must_use] pub fn ss0i(&mut self) -> SS0I_W { SS0I_W::new(self, 0) } #[doc = "Bit 1 - CC41 IDLE mode set"] #[inline(always)] - #[must_use] pub fn ss1i(&mut self) -> SS1I_W { SS1I_W::new(self, 1) } #[doc = "Bit 2 - CC42 IDLE mode set"] #[inline(always)] - #[must_use] pub fn ss2i(&mut self) -> SS2I_W { SS2I_W::new(self, 2) } #[doc = "Bit 3 - CC43 IDLE mode set"] #[inline(always)] - #[must_use] pub fn ss3i(&mut self) -> SS3I_W { SS3I_W::new(self, 3) } #[doc = "Bit 8 - Prescaler Run Bit Clear"] #[inline(always)] - #[must_use] pub fn cprb(&mut self) -> CPRB_W { CPRB_W::new(self, 8) } #[doc = "Bit 9 - Prescaler clear"] #[inline(always)] - #[must_use] pub fn psic(&mut self) -> PSIC_W { PSIC_W::new(self, 9) } diff --git a/src/ccu40_cc40/cmc.rs b/src/ccu40_cc40/cmc.rs index 84109e27..509ca3bf 100644 --- a/src/ccu40_cc40/cmc.rs +++ b/src/ccu40_cc40/cmc.rs @@ -836,73 +836,61 @@ impl R { impl W { #[doc = "Bits 0:1 - External Start Functionality Selector"] #[inline(always)] - #[must_use] pub fn strts(&mut self) -> STRTS_W { STRTS_W::new(self, 0) } #[doc = "Bits 2:3 - External Stop Functionality Selector"] #[inline(always)] - #[must_use] pub fn ends(&mut self) -> ENDS_W { ENDS_W::new(self, 2) } #[doc = "Bits 4:5 - External Capture 0 Functionality Selector"] #[inline(always)] - #[must_use] pub fn cap0s(&mut self) -> CAP0S_W { CAP0S_W::new(self, 4) } #[doc = "Bits 6:7 - External Capture 1 Functionality Selector"] #[inline(always)] - #[must_use] pub fn cap1s(&mut self) -> CAP1S_W { CAP1S_W::new(self, 6) } #[doc = "Bits 8:9 - External Gate Functionality Selector"] #[inline(always)] - #[must_use] pub fn gates(&mut self) -> GATES_W { GATES_W::new(self, 8) } #[doc = "Bits 10:11 - External Up/Down Functionality Selector"] #[inline(always)] - #[must_use] pub fn uds(&mut self) -> UDS_W { UDS_W::new(self, 10) } #[doc = "Bits 12:13 - External Timer Load Functionality Selector"] #[inline(always)] - #[must_use] pub fn lds(&mut self) -> LDS_W { LDS_W::new(self, 12) } #[doc = "Bits 14:15 - External Count Selector"] #[inline(always)] - #[must_use] pub fn cnts(&mut self) -> CNTS_W { CNTS_W::new(self, 14) } #[doc = "Bit 16 - Override Function Selector"] #[inline(always)] - #[must_use] pub fn ofs(&mut self) -> OFS_W { OFS_W::new(self, 16) } #[doc = "Bit 17 - Trap Function Selector"] #[inline(always)] - #[must_use] pub fn ts(&mut self) -> TS_W { TS_W::new(self, 17) } #[doc = "Bits 18:19 - External Modulation Functionality Selector"] #[inline(always)] - #[must_use] pub fn mos(&mut self) -> MOS_W { MOS_W::new(self, 18) } #[doc = "Bit 20 - Timer Concatenation Enable"] #[inline(always)] - #[must_use] pub fn tce(&mut self) -> TCE_W { TCE_W::new(self, 20) } diff --git a/src/ccu40_cc40/crs.rs b/src/ccu40_cc40/crs.rs index ca7ef15b..91d037c4 100644 --- a/src/ccu40_cc40/crs.rs +++ b/src/ccu40_cc40/crs.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Compare Register"] #[inline(always)] - #[must_use] pub fn crs(&mut self) -> CRS_W { CRS_W::new(self, 0) } diff --git a/src/ccu40_cc40/dits.rs b/src/ccu40_cc40/dits.rs index 0457d48f..e01add6a 100644 --- a/src/ccu40_cc40/dits.rs +++ b/src/ccu40_cc40/dits.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:3 - Dither Shadow Compare Value"] #[inline(always)] - #[must_use] pub fn dcvs(&mut self) -> DCVS_W { DCVS_W::new(self, 0) } diff --git a/src/ccu40_cc40/fpc.rs b/src/ccu40_cc40/fpc.rs index 77c4d241..ccab00bd 100644 --- a/src/ccu40_cc40/fpc.rs +++ b/src/ccu40_cc40/fpc.rs @@ -23,7 +23,6 @@ impl R { impl W { #[doc = "Bits 8:11 - Actual Prescaler Value"] #[inline(always)] - #[must_use] pub fn pval(&mut self) -> PVAL_W { PVAL_W::new(self, 8) } diff --git a/src/ccu40_cc40/fpcs.rs b/src/ccu40_cc40/fpcs.rs index 7ebabe62..4e7af348 100644 --- a/src/ccu40_cc40/fpcs.rs +++ b/src/ccu40_cc40/fpcs.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:3 - Floating Prescaler Shadow Compare Value"] #[inline(always)] - #[must_use] pub fn pcmp(&mut self) -> PCMP_W { PCMP_W::new(self, 0) } diff --git a/src/ccu40_cc40/ins.rs b/src/ccu40_cc40/ins.rs index 9e16e3ba..de3f0f44 100644 --- a/src/ccu40_cc40/ins.rs +++ b/src/ccu40_cc40/ins.rs @@ -1468,73 +1468,61 @@ impl R { impl W { #[doc = "Bits 0:3 - Event 0 signal selection"] #[inline(always)] - #[must_use] pub fn ev0is(&mut self) -> EV0IS_W { EV0IS_W::new(self, 0) } #[doc = "Bits 4:7 - Event 1 signal selection"] #[inline(always)] - #[must_use] pub fn ev1is(&mut self) -> EV1IS_W { EV1IS_W::new(self, 4) } #[doc = "Bits 8:11 - Event 2 signal selection"] #[inline(always)] - #[must_use] pub fn ev2is(&mut self) -> EV2IS_W { EV2IS_W::new(self, 8) } #[doc = "Bits 16:17 - Event 0 Edge Selection"] #[inline(always)] - #[must_use] pub fn ev0em(&mut self) -> EV0EM_W { EV0EM_W::new(self, 16) } #[doc = "Bits 18:19 - Event 1 Edge Selection"] #[inline(always)] - #[must_use] pub fn ev1em(&mut self) -> EV1EM_W { EV1EM_W::new(self, 18) } #[doc = "Bits 20:21 - Event 2 Edge Selection"] #[inline(always)] - #[must_use] pub fn ev2em(&mut self) -> EV2EM_W { EV2EM_W::new(self, 20) } #[doc = "Bit 22 - Event 0 Level Selection"] #[inline(always)] - #[must_use] pub fn ev0lm(&mut self) -> EV0LM_W { EV0LM_W::new(self, 22) } #[doc = "Bit 23 - Event 1 Level Selection"] #[inline(always)] - #[must_use] pub fn ev1lm(&mut self) -> EV1LM_W { EV1LM_W::new(self, 23) } #[doc = "Bit 24 - Event 2 Level Selection"] #[inline(always)] - #[must_use] pub fn ev2lm(&mut self) -> EV2LM_W { EV2LM_W::new(self, 24) } #[doc = "Bits 25:26 - Event 0 Low Pass Filter Configuration"] #[inline(always)] - #[must_use] pub fn lpf0m(&mut self) -> LPF0M_W { LPF0M_W::new(self, 25) } #[doc = "Bits 27:28 - Event 1 Low Pass Filter Configuration"] #[inline(always)] - #[must_use] pub fn lpf1m(&mut self) -> LPF1M_W { LPF1M_W::new(self, 27) } #[doc = "Bits 29:30 - Event 2 Low Pass Filter Configuration"] #[inline(always)] - #[must_use] pub fn lpf2m(&mut self) -> LPF2M_W { LPF2M_W::new(self, 29) } diff --git a/src/ccu40_cc40/inte.rs b/src/ccu40_cc40/inte.rs index 3bd17c45..4759bda1 100644 --- a/src/ccu40_cc40/inte.rs +++ b/src/ccu40_cc40/inte.rs @@ -413,43 +413,36 @@ impl R { impl W { #[doc = "Bit 0 - Period match while counting up enable"] #[inline(always)] - #[must_use] pub fn pme(&mut self) -> PME_W { PME_W::new(self, 0) } #[doc = "Bit 1 - One match while counting down enable"] #[inline(always)] - #[must_use] pub fn ome(&mut self) -> OME_W { OME_W::new(self, 1) } #[doc = "Bit 2 - Compare match while counting up enable"] #[inline(always)] - #[must_use] pub fn cmue(&mut self) -> CMUE_W { CMUE_W::new(self, 2) } #[doc = "Bit 3 - Compare match while counting down enable"] #[inline(always)] - #[must_use] pub fn cmde(&mut self) -> CMDE_W { CMDE_W::new(self, 3) } #[doc = "Bit 8 - Event 0 interrupt enable"] #[inline(always)] - #[must_use] pub fn e0ae(&mut self) -> E0AE_W { E0AE_W::new(self, 8) } #[doc = "Bit 9 - Event 1 interrupt enable"] #[inline(always)] - #[must_use] pub fn e1ae(&mut self) -> E1AE_W { E1AE_W::new(self, 9) } #[doc = "Bit 10 - Event 2 interrupt enable"] #[inline(always)] - #[must_use] pub fn e2ae(&mut self) -> E2AE_W { E2AE_W::new(self, 10) } diff --git a/src/ccu40_cc40/prs.rs b/src/ccu40_cc40/prs.rs index 7a8e25be..33023479 100644 --- a/src/ccu40_cc40/prs.rs +++ b/src/ccu40_cc40/prs.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] - #[must_use] pub fn prs(&mut self) -> PRS_W { PRS_W::new(self, 0) } diff --git a/src/ccu40_cc40/psc.rs b/src/ccu40_cc40/psc.rs index 81b915c9..a65ae11b 100644 --- a/src/ccu40_cc40/psc.rs +++ b/src/ccu40_cc40/psc.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:3 - Prescaler Initial Value"] #[inline(always)] - #[must_use] pub fn psiv(&mut self) -> PSIV_W { PSIV_W::new(self, 0) } diff --git a/src/ccu40_cc40/psl.rs b/src/ccu40_cc40/psl.rs index 3e3f8018..d9659b57 100644 --- a/src/ccu40_cc40/psl.rs +++ b/src/ccu40_cc40/psl.rs @@ -65,7 +65,6 @@ impl R { impl W { #[doc = "Bit 0 - Output Passive Level"] #[inline(always)] - #[must_use] pub fn psl(&mut self) -> PSL_W { PSL_W::new(self, 0) } diff --git a/src/ccu40_cc40/srs.rs b/src/ccu40_cc40/srs.rs index c1f900c5..ad6a5eb9 100644 --- a/src/ccu40_cc40/srs.rs +++ b/src/ccu40_cc40/srs.rs @@ -462,31 +462,26 @@ impl R { impl W { #[doc = "Bits 0:1 - Period/One match Service request selector"] #[inline(always)] - #[must_use] pub fn posr(&mut self) -> POSR_W { POSR_W::new(self, 0) } #[doc = "Bits 2:3 - Compare match Service request selector"] #[inline(always)] - #[must_use] pub fn cmsr(&mut self) -> CMSR_W { CMSR_W::new(self, 2) } #[doc = "Bits 8:9 - Event 0 Service request selector"] #[inline(always)] - #[must_use] pub fn e0sr(&mut self) -> E0SR_W { E0SR_W::new(self, 8) } #[doc = "Bits 10:11 - Event 1 Service request selector"] #[inline(always)] - #[must_use] pub fn e1sr(&mut self) -> E1SR_W { E1SR_W::new(self, 10) } #[doc = "Bits 12:13 - Event 2 Service request selector"] #[inline(always)] - #[must_use] pub fn e2sr(&mut self) -> E2SR_W { E2SR_W::new(self, 12) } diff --git a/src/ccu40_cc40/swr.rs b/src/ccu40_cc40/swr.rs index 290356fd..57c8d0a0 100644 --- a/src/ccu40_cc40/swr.rs +++ b/src/ccu40_cc40/swr.rs @@ -19,49 +19,41 @@ pub type RTRPF_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Period match while counting up clear"] #[inline(always)] - #[must_use] pub fn rpm(&mut self) -> RPM_W { RPM_W::new(self, 0) } #[doc = "Bit 1 - One match while counting down clear"] #[inline(always)] - #[must_use] pub fn rom(&mut self) -> ROM_W { ROM_W::new(self, 1) } #[doc = "Bit 2 - Compare match while counting up clear"] #[inline(always)] - #[must_use] pub fn rcmu(&mut self) -> RCMU_W { RCMU_W::new(self, 2) } #[doc = "Bit 3 - Compare match while counting down clear"] #[inline(always)] - #[must_use] pub fn rcmd(&mut self) -> RCMD_W { RCMD_W::new(self, 3) } #[doc = "Bit 8 - Event 0 detection clear"] #[inline(always)] - #[must_use] pub fn re0a(&mut self) -> RE0A_W { RE0A_W::new(self, 8) } #[doc = "Bit 9 - Event 1 detection clear"] #[inline(always)] - #[must_use] pub fn re1a(&mut self) -> RE1A_W { RE1A_W::new(self, 9) } #[doc = "Bit 10 - Event 2 detection clear"] #[inline(always)] - #[must_use] pub fn re2a(&mut self) -> RE2A_W { RE2A_W::new(self, 10) } #[doc = "Bit 11 - Trap Flag status clear"] #[inline(always)] - #[must_use] pub fn rtrpf(&mut self) -> RTRPF_W { RTRPF_W::new(self, 11) } diff --git a/src/ccu40_cc40/sws.rs b/src/ccu40_cc40/sws.rs index 666deb65..15815c56 100644 --- a/src/ccu40_cc40/sws.rs +++ b/src/ccu40_cc40/sws.rs @@ -19,49 +19,41 @@ pub type STRPF_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Period match while counting up set"] #[inline(always)] - #[must_use] pub fn spm(&mut self) -> SPM_W { SPM_W::new(self, 0) } #[doc = "Bit 1 - One match while counting down set"] #[inline(always)] - #[must_use] pub fn som(&mut self) -> SOM_W { SOM_W::new(self, 1) } #[doc = "Bit 2 - Compare match while counting up set"] #[inline(always)] - #[must_use] pub fn scmu(&mut self) -> SCMU_W { SCMU_W::new(self, 2) } #[doc = "Bit 3 - Compare match while counting down set"] #[inline(always)] - #[must_use] pub fn scmd(&mut self) -> SCMD_W { SCMD_W::new(self, 3) } #[doc = "Bit 8 - Event 0 detection set"] #[inline(always)] - #[must_use] pub fn se0a(&mut self) -> SE0A_W { SE0A_W::new(self, 8) } #[doc = "Bit 9 - Event 1 detection set"] #[inline(always)] - #[must_use] pub fn se1a(&mut self) -> SE1A_W { SE1A_W::new(self, 9) } #[doc = "Bit 10 - Event 2 detection set"] #[inline(always)] - #[must_use] pub fn se2a(&mut self) -> SE2A_W { SE2A_W::new(self, 10) } #[doc = "Bit 11 - Trap Flag status set"] #[inline(always)] - #[must_use] pub fn strpf(&mut self) -> STRPF_W { STRPF_W::new(self, 11) } diff --git a/src/ccu40_cc40/tc.rs b/src/ccu40_cc40/tc.rs index afad6951..cd7927e3 100644 --- a/src/ccu40_cc40/tc.rs +++ b/src/ccu40_cc40/tc.rs @@ -1129,109 +1129,91 @@ impl R { impl W { #[doc = "Bit 0 - Timer Counting Mode"] #[inline(always)] - #[must_use] pub fn tcm(&mut self) -> TCM_W { TCM_W::new(self, 0) } #[doc = "Bit 1 - Timer Single Shot Mode"] #[inline(always)] - #[must_use] pub fn tssm(&mut self) -> TSSM_W { TSSM_W::new(self, 1) } #[doc = "Bit 2 - Shadow Transfer on Clear"] #[inline(always)] - #[must_use] pub fn clst(&mut self) -> CLST_W { CLST_W::new(self, 2) } #[doc = "Bit 4 - Extended Capture Mode"] #[inline(always)] - #[must_use] pub fn ecm(&mut self) -> ECM_W { ECM_W::new(self, 4) } #[doc = "Bits 5:6 - Clear on Capture Control"] #[inline(always)] - #[must_use] pub fn capc(&mut self) -> CAPC_W { CAPC_W::new(self, 5) } #[doc = "Bits 8:9 - Extended Stop Function Control"] #[inline(always)] - #[must_use] pub fn endm(&mut self) -> ENDM_W { ENDM_W::new(self, 8) } #[doc = "Bit 10 - Extended Start Function Control"] #[inline(always)] - #[must_use] pub fn strm(&mut self) -> STRM_W { STRM_W::new(self, 10) } #[doc = "Bit 11 - Equal Capture Event enable"] #[inline(always)] - #[must_use] pub fn sce(&mut self) -> SCE_W { SCE_W::new(self, 11) } #[doc = "Bit 12 - Continuous Capture Enable"] #[inline(always)] - #[must_use] pub fn ccs(&mut self) -> CCS_W { CCS_W::new(self, 12) } #[doc = "Bits 13:14 - Dither Enable"] #[inline(always)] - #[must_use] pub fn dithe(&mut self) -> DITHE_W { DITHE_W::new(self, 13) } #[doc = "Bit 15 - Dither input selector"] #[inline(always)] - #[must_use] pub fn dim(&mut self) -> DIM_W { DIM_W::new(self, 15) } #[doc = "Bit 16 - Floating Prescaler enable"] #[inline(always)] - #[must_use] pub fn fpe(&mut self) -> FPE_W { FPE_W::new(self, 16) } #[doc = "Bit 17 - TRAP enable"] #[inline(always)] - #[must_use] pub fn trape(&mut self) -> TRAPE_W { TRAPE_W::new(self, 17) } #[doc = "Bit 21 - TRAP Synchronization Enable"] #[inline(always)] - #[must_use] pub fn trpse(&mut self) -> TRPSE_W { TRPSE_W::new(self, 21) } #[doc = "Bit 22 - TRAP State Clear Control"] #[inline(always)] - #[must_use] pub fn trpsw(&mut self) -> TRPSW_W { TRPSW_W::new(self, 22) } #[doc = "Bit 23 - External Modulation Synchronization"] #[inline(always)] - #[must_use] pub fn ems(&mut self) -> EMS_W { EMS_W::new(self, 23) } #[doc = "Bit 24 - External Modulation Type"] #[inline(always)] - #[must_use] pub fn emt(&mut self) -> EMT_W { EMT_W::new(self, 24) } #[doc = "Bit 25 - Multi Channel Mode Enable"] #[inline(always)] - #[must_use] pub fn mcme(&mut self) -> MCME_W { MCME_W::new(self, 25) } diff --git a/src/ccu40_cc40/tcclr.rs b/src/ccu40_cc40/tcclr.rs index abf7b848..d6bac93c 100644 --- a/src/ccu40_cc40/tcclr.rs +++ b/src/ccu40_cc40/tcclr.rs @@ -9,19 +9,16 @@ pub type DITC_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Timer Run Bit Clear"] #[inline(always)] - #[must_use] pub fn trbc(&mut self) -> TRBC_W { TRBC_W::new(self, 0) } #[doc = "Bit 1 - Timer Clear"] #[inline(always)] - #[must_use] pub fn tcc(&mut self) -> TCC_W { TCC_W::new(self, 1) } #[doc = "Bit 2 - Dither Counter Clear"] #[inline(always)] - #[must_use] pub fn ditc(&mut self) -> DITC_W { DITC_W::new(self, 2) } diff --git a/src/ccu40_cc40/tcset.rs b/src/ccu40_cc40/tcset.rs index 04914af2..2c2ff325 100644 --- a/src/ccu40_cc40/tcset.rs +++ b/src/ccu40_cc40/tcset.rs @@ -5,7 +5,6 @@ pub type TRBS_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Timer Run Bit set"] #[inline(always)] - #[must_use] pub fn trbs(&mut self) -> TRBS_W { TRBS_W::new(self, 0) } diff --git a/src/ccu40_cc40/timer.rs b/src/ccu40_cc40/timer.rs index 222e6bd7..b6c60ec3 100644 --- a/src/ccu40_cc40/timer.rs +++ b/src/ccu40_cc40/timer.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Timer Value"] #[inline(always)] - #[must_use] pub fn tval(&mut self) -> TVAL_W { TVAL_W::new(self, 0) } diff --git a/src/ccu80/gcsc.rs b/src/ccu80/gcsc.rs index 78e835a0..70a11fba 100644 --- a/src/ccu80/gcsc.rs +++ b/src/ccu80/gcsc.rs @@ -43,121 +43,101 @@ pub type S3ST2C_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slice 0 shadow transfer request clear"] #[inline(always)] - #[must_use] pub fn s0sc(&mut self) -> S0SC_W { S0SC_W::new(self, 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s0dsc(&mut self) -> S0DSC_W { S0DSC_W::new(self, 1) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s0psc(&mut self) -> S0PSC_W { S0PSC_W::new(self, 2) } #[doc = "Bit 4 - Slice 1 shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s1sc(&mut self) -> S1SC_W { S1SC_W::new(self, 4) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s1dsc(&mut self) -> S1DSC_W { S1DSC_W::new(self, 5) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s1psc(&mut self) -> S1PSC_W { S1PSC_W::new(self, 6) } #[doc = "Bit 8 - Slice 2 shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s2sc(&mut self) -> S2SC_W { S2SC_W::new(self, 8) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s2dsc(&mut self) -> S2DSC_W { S2DSC_W::new(self, 9) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s2psc(&mut self) -> S2PSC_W { S2PSC_W::new(self, 10) } #[doc = "Bit 12 - Slice 3 shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s3sc(&mut self) -> S3SC_W { S3SC_W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s3dsc(&mut self) -> S3DSC_W { S3DSC_W::new(self, 13) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer clear"] #[inline(always)] - #[must_use] pub fn s3psc(&mut self) -> S3PSC_W { S3PSC_W::new(self, 14) } #[doc = "Bit 16 - Slice 0 status bit 1 clear"] #[inline(always)] - #[must_use] pub fn s0st1c(&mut self) -> S0ST1C_W { S0ST1C_W::new(self, 16) } #[doc = "Bit 17 - Slice 1 status bit 1 clear"] #[inline(always)] - #[must_use] pub fn s1st1c(&mut self) -> S1ST1C_W { S1ST1C_W::new(self, 17) } #[doc = "Bit 18 - Slice 2 status bit 1 clear"] #[inline(always)] - #[must_use] pub fn s2st1c(&mut self) -> S2ST1C_W { S2ST1C_W::new(self, 18) } #[doc = "Bit 19 - Slice 3 status bit 1 clear"] #[inline(always)] - #[must_use] pub fn s3st1c(&mut self) -> S3ST1C_W { S3ST1C_W::new(self, 19) } #[doc = "Bit 20 - Slice 0 status bit 2 clear"] #[inline(always)] - #[must_use] pub fn s0st2c(&mut self) -> S0ST2C_W { S0ST2C_W::new(self, 20) } #[doc = "Bit 21 - Slice 1 status bit 2 clear"] #[inline(always)] - #[must_use] pub fn s1st2c(&mut self) -> S1ST2C_W { S1ST2C_W::new(self, 21) } #[doc = "Bit 22 - Slice 2 status bit 2 clear"] #[inline(always)] - #[must_use] pub fn s2st2c(&mut self) -> S2ST2C_W { S2ST2C_W::new(self, 22) } #[doc = "Bit 23 - Slice 3 status bit 2 clear"] #[inline(always)] - #[must_use] pub fn s3st2c(&mut self) -> S3ST2C_W { S3ST2C_W::new(self, 23) } diff --git a/src/ccu80/gcss.rs b/src/ccu80/gcss.rs index 0c55eb8f..6879cd00 100644 --- a/src/ccu80/gcss.rs +++ b/src/ccu80/gcss.rs @@ -43,121 +43,101 @@ pub type S3ST2S_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Slice 0 shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s0se(&mut self) -> S0SE_W { S0SE_W::new(self, 0) } #[doc = "Bit 1 - Slice 0 Dither shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s0dse(&mut self) -> S0DSE_W { S0DSE_W::new(self, 1) } #[doc = "Bit 2 - Slice 0 Prescaler shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s0pse(&mut self) -> S0PSE_W { S0PSE_W::new(self, 2) } #[doc = "Bit 4 - Slice 1 shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s1se(&mut self) -> S1SE_W { S1SE_W::new(self, 4) } #[doc = "Bit 5 - Slice 1 Dither shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s1dse(&mut self) -> S1DSE_W { S1DSE_W::new(self, 5) } #[doc = "Bit 6 - Slice 1 Prescaler shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s1pse(&mut self) -> S1PSE_W { S1PSE_W::new(self, 6) } #[doc = "Bit 8 - Slice 2 shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s2se(&mut self) -> S2SE_W { S2SE_W::new(self, 8) } #[doc = "Bit 9 - Slice 2 Dither shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s2dse(&mut self) -> S2DSE_W { S2DSE_W::new(self, 9) } #[doc = "Bit 10 - Slice 2 Prescaler shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s2pse(&mut self) -> S2PSE_W { S2PSE_W::new(self, 10) } #[doc = "Bit 12 - Slice 3 shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s3se(&mut self) -> S3SE_W { S3SE_W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Dither shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s3dse(&mut self) -> S3DSE_W { S3DSE_W::new(self, 13) } #[doc = "Bit 14 - Slice 3 Prescaler shadow transfer set enable"] #[inline(always)] - #[must_use] pub fn s3pse(&mut self) -> S3PSE_W { S3PSE_W::new(self, 14) } #[doc = "Bit 16 - Slice 0 status bit 1 set"] #[inline(always)] - #[must_use] pub fn s0st1s(&mut self) -> S0ST1S_W { S0ST1S_W::new(self, 16) } #[doc = "Bit 17 - Slice 1 status bit 1 set"] #[inline(always)] - #[must_use] pub fn s1st1s(&mut self) -> S1ST1S_W { S1ST1S_W::new(self, 17) } #[doc = "Bit 18 - Slice 2 status bit 1 set"] #[inline(always)] - #[must_use] pub fn s2st1s(&mut self) -> S2ST1S_W { S2ST1S_W::new(self, 18) } #[doc = "Bit 19 - Slice 3 status bit 1 set"] #[inline(always)] - #[must_use] pub fn s3st1s(&mut self) -> S3ST1S_W { S3ST1S_W::new(self, 19) } #[doc = "Bit 20 - Slice 0 status bit 2 set"] #[inline(always)] - #[must_use] pub fn s0st2s(&mut self) -> S0ST2S_W { S0ST2S_W::new(self, 20) } #[doc = "Bit 21 - Slice 1 status bit 2 set"] #[inline(always)] - #[must_use] pub fn s1st2s(&mut self) -> S1ST2S_W { S1ST2S_W::new(self, 21) } #[doc = "Bit 22 - Slice 2 status bit 2 set"] #[inline(always)] - #[must_use] pub fn s2st2s(&mut self) -> S2ST2S_W { S2ST2S_W::new(self, 22) } #[doc = "Bit 23 - Slice 3 status bit 2 set"] #[inline(always)] - #[must_use] pub fn s3st2s(&mut self) -> S3ST2S_W { S3ST2S_W::new(self, 23) } diff --git a/src/ccu80/gctrl.rs b/src/ccu80/gctrl.rs index 5a43a147..e1ca4c5d 100644 --- a/src/ccu80/gctrl.rs +++ b/src/ccu80/gctrl.rs @@ -603,49 +603,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Prescaler Clear Configuration"] #[inline(always)] - #[must_use] pub fn prbc(&mut self) -> PRBC_W { PRBC_W::new(self, 0) } #[doc = "Bits 4:5 - Prescaler Input Clock Selection"] #[inline(always)] - #[must_use] pub fn pcis(&mut self) -> PCIS_W { PCIS_W::new(self, 4) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] - #[must_use] pub fn suscfg(&mut self) -> SUSCFG_W { SUSCFG_W::new(self, 8) } #[doc = "Bit 10 - Slice 0 Multi Channel shadow transfer enable"] #[inline(always)] - #[must_use] pub fn mse0(&mut self) -> MSE0_W { MSE0_W::new(self, 10) } #[doc = "Bit 11 - Slice 1 Multi Channel shadow transfer enable"] #[inline(always)] - #[must_use] pub fn mse1(&mut self) -> MSE1_W { MSE1_W::new(self, 11) } #[doc = "Bit 12 - Slice 2 Multi Channel shadow transfer enable"] #[inline(always)] - #[must_use] pub fn mse2(&mut self) -> MSE2_W { MSE2_W::new(self, 12) } #[doc = "Bit 13 - Slice 3 Multi Channel shadow transfer enable"] #[inline(always)] - #[must_use] pub fn mse3(&mut self) -> MSE3_W { MSE3_W::new(self, 13) } #[doc = "Bits 14:15 - Multi Channel shadow transfer request configuration"] #[inline(always)] - #[must_use] pub fn msde(&mut self) -> MSDE_W { MSDE_W::new(self, 14) } diff --git a/src/ccu80/gidlc.rs b/src/ccu80/gidlc.rs index 17077922..c259c651 100644 --- a/src/ccu80/gidlc.rs +++ b/src/ccu80/gidlc.rs @@ -15,37 +15,31 @@ pub type SPCH_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - CC80 IDLE mode clear"] #[inline(always)] - #[must_use] pub fn cs0i(&mut self) -> CS0I_W { CS0I_W::new(self, 0) } #[doc = "Bit 1 - CC81 IDLE mode clear"] #[inline(always)] - #[must_use] pub fn cs1i(&mut self) -> CS1I_W { CS1I_W::new(self, 1) } #[doc = "Bit 2 - CC82 IDLE mode clear"] #[inline(always)] - #[must_use] pub fn cs2i(&mut self) -> CS2I_W { CS2I_W::new(self, 2) } #[doc = "Bit 3 - CC83 IDLE mode clear"] #[inline(always)] - #[must_use] pub fn cs3i(&mut self) -> CS3I_W { CS3I_W::new(self, 3) } #[doc = "Bit 8 - Prescaler Run Bit Set"] #[inline(always)] - #[must_use] pub fn sprb(&mut self) -> SPRB_W { SPRB_W::new(self, 8) } #[doc = "Bit 10 - Parity Checker run bit set"] #[inline(always)] - #[must_use] pub fn spch(&mut self) -> SPCH_W { SPCH_W::new(self, 10) } diff --git a/src/ccu80/gidls.rs b/src/ccu80/gidls.rs index aeea95fc..d2c7e7ff 100644 --- a/src/ccu80/gidls.rs +++ b/src/ccu80/gidls.rs @@ -17,43 +17,36 @@ pub type CPCH_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - CC80 IDLE mode set"] #[inline(always)] - #[must_use] pub fn ss0i(&mut self) -> SS0I_W { SS0I_W::new(self, 0) } #[doc = "Bit 1 - CC81 IDLE mode set"] #[inline(always)] - #[must_use] pub fn ss1i(&mut self) -> SS1I_W { SS1I_W::new(self, 1) } #[doc = "Bit 2 - CC82 IDLE mode set"] #[inline(always)] - #[must_use] pub fn ss2i(&mut self) -> SS2I_W { SS2I_W::new(self, 2) } #[doc = "Bit 3 - CC83 IDLE mode set"] #[inline(always)] - #[must_use] pub fn ss3i(&mut self) -> SS3I_W { SS3I_W::new(self, 3) } #[doc = "Bit 8 - Prescaler# Run Bit Clear"] #[inline(always)] - #[must_use] pub fn cprb(&mut self) -> CPRB_W { CPRB_W::new(self, 8) } #[doc = "Bit 9 - Prescaler clear"] #[inline(always)] - #[must_use] pub fn psic(&mut self) -> PSIC_W { PSIC_W::new(self, 9) } #[doc = "Bit 10 - Parity Checker Run bit clear"] #[inline(always)] - #[must_use] pub fn cpch(&mut self) -> CPCH_W { CPCH_W::new(self, 10) } diff --git a/src/ccu80/gpchk.rs b/src/ccu80/gpchk.rs index 75a356c4..70ee20e1 100644 --- a/src/ccu80/gpchk.rs +++ b/src/ccu80/gpchk.rs @@ -390,55 +390,46 @@ impl R { impl W { #[doc = "Bit 0 - Parity Checker Automatic start/stop"] #[inline(always)] - #[must_use] pub fn pase(&mut self) -> PASE_W { PASE_W::new(self, 0) } #[doc = "Bits 1:2 - Parity Checker Automatic start/stop selector"] #[inline(always)] - #[must_use] pub fn pacs(&mut self) -> PACS_W { PACS_W::new(self, 1) } #[doc = "Bits 3:4 - Driver Input signal selector"] #[inline(always)] - #[must_use] pub fn pisel(&mut self) -> PISEL_W { PISEL_W::new(self, 3) } #[doc = "Bits 5:6 - Parity Checker Delay Input Selector"] #[inline(always)] - #[must_use] pub fn pcds(&mut self) -> PCDS_W { PCDS_W::new(self, 5) } #[doc = "Bit 7 - Parity Checker type selector"] #[inline(always)] - #[must_use] pub fn pcts(&mut self) -> PCTS_W { PCTS_W::new(self, 7) } #[doc = "Bits 16:19 - Parity Checker Slice 0 output selection"] #[inline(always)] - #[must_use] pub fn pcsel0(&mut self) -> PCSEL0_W { PCSEL0_W::new(self, 16) } #[doc = "Bits 20:23 - Parity Checker Slice 1 output selection"] #[inline(always)] - #[must_use] pub fn pcsel1(&mut self) -> PCSEL1_W { PCSEL1_W::new(self, 20) } #[doc = "Bits 24:27 - Parity Checker Slice 2 output selection"] #[inline(always)] - #[must_use] pub fn pcsel2(&mut self) -> PCSEL2_W { PCSEL2_W::new(self, 24) } #[doc = "Bits 28:31 - Parity Checker Slice 3 output selection"] #[inline(always)] - #[must_use] pub fn pcsel3(&mut self) -> PCSEL3_W { PCSEL3_W::new(self, 28) } diff --git a/src/ccu80_cc80/chc.rs b/src/ccu80_cc80/chc.rs index 7892bfb2..fb1dc606 100644 --- a/src/ccu80_cc80/chc.rs +++ b/src/ccu80_cc80/chc.rs @@ -297,31 +297,26 @@ impl R { impl W { #[doc = "Bit 0 - Asymmetric PWM mode Enable"] #[inline(always)] - #[must_use] pub fn ase(&mut self) -> ASE_W { ASE_W::new(self, 0) } #[doc = "Bit 1 - Output selector for CCU8x.OUTy0"] #[inline(always)] - #[must_use] pub fn ocs1(&mut self) -> OCS1_W { OCS1_W::new(self, 1) } #[doc = "Bit 2 - Output selector for CCU8x.OUTy1"] #[inline(always)] - #[must_use] pub fn ocs2(&mut self) -> OCS2_W { OCS2_W::new(self, 2) } #[doc = "Bit 3 - Output selector for CCU8x.OUTy2"] #[inline(always)] - #[must_use] pub fn ocs3(&mut self) -> OCS3_W { OCS3_W::new(self, 3) } #[doc = "Bit 4 - Output selector for CCU8x.OUTy3"] #[inline(always)] - #[must_use] pub fn ocs4(&mut self) -> OCS4_W { OCS4_W::new(self, 4) } diff --git a/src/ccu80_cc80/cmc.rs b/src/ccu80_cc80/cmc.rs index 84109e27..509ca3bf 100644 --- a/src/ccu80_cc80/cmc.rs +++ b/src/ccu80_cc80/cmc.rs @@ -836,73 +836,61 @@ impl R { impl W { #[doc = "Bits 0:1 - External Start Functionality Selector"] #[inline(always)] - #[must_use] pub fn strts(&mut self) -> STRTS_W { STRTS_W::new(self, 0) } #[doc = "Bits 2:3 - External Stop Functionality Selector"] #[inline(always)] - #[must_use] pub fn ends(&mut self) -> ENDS_W { ENDS_W::new(self, 2) } #[doc = "Bits 4:5 - External Capture 0 Functionality Selector"] #[inline(always)] - #[must_use] pub fn cap0s(&mut self) -> CAP0S_W { CAP0S_W::new(self, 4) } #[doc = "Bits 6:7 - External Capture 1 Functionality Selector"] #[inline(always)] - #[must_use] pub fn cap1s(&mut self) -> CAP1S_W { CAP1S_W::new(self, 6) } #[doc = "Bits 8:9 - External Gate Functionality Selector"] #[inline(always)] - #[must_use] pub fn gates(&mut self) -> GATES_W { GATES_W::new(self, 8) } #[doc = "Bits 10:11 - External Up/Down Functionality Selector"] #[inline(always)] - #[must_use] pub fn uds(&mut self) -> UDS_W { UDS_W::new(self, 10) } #[doc = "Bits 12:13 - External Timer Load Functionality Selector"] #[inline(always)] - #[must_use] pub fn lds(&mut self) -> LDS_W { LDS_W::new(self, 12) } #[doc = "Bits 14:15 - External Count Selector"] #[inline(always)] - #[must_use] pub fn cnts(&mut self) -> CNTS_W { CNTS_W::new(self, 14) } #[doc = "Bit 16 - Override Function Selector"] #[inline(always)] - #[must_use] pub fn ofs(&mut self) -> OFS_W { OFS_W::new(self, 16) } #[doc = "Bit 17 - Trap Function Selector"] #[inline(always)] - #[must_use] pub fn ts(&mut self) -> TS_W { TS_W::new(self, 17) } #[doc = "Bits 18:19 - External Modulation Functionality Selector"] #[inline(always)] - #[must_use] pub fn mos(&mut self) -> MOS_W { MOS_W::new(self, 18) } #[doc = "Bit 20 - Timer Concatenation Enable"] #[inline(always)] - #[must_use] pub fn tce(&mut self) -> TCE_W { TCE_W::new(self, 20) } diff --git a/src/ccu80_cc80/cr1s.rs b/src/ccu80_cc80/cr1s.rs index 0714c604..594918d7 100644 --- a/src/ccu80_cc80/cr1s.rs +++ b/src/ccu80_cc80/cr1s.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Shadow Compare Register for Channel 1"] #[inline(always)] - #[must_use] pub fn cr1s(&mut self) -> CR1S_W { CR1S_W::new(self, 0) } diff --git a/src/ccu80_cc80/cr2s.rs b/src/ccu80_cc80/cr2s.rs index 66c34101..0c4f582f 100644 --- a/src/ccu80_cc80/cr2s.rs +++ b/src/ccu80_cc80/cr2s.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Shadow Compare Register for Channel 2"] #[inline(always)] - #[must_use] pub fn cr2s(&mut self) -> CR2S_W { CR2S_W::new(self, 0) } diff --git a/src/ccu80_cc80/dc1r.rs b/src/ccu80_cc80/dc1r.rs index 4ea85b59..a794090e 100644 --- a/src/ccu80_cc80/dc1r.rs +++ b/src/ccu80_cc80/dc1r.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:7 - Rise Value for Dead Time of Channel 1"] #[inline(always)] - #[must_use] pub fn dt1r(&mut self) -> DT1R_W { DT1R_W::new(self, 0) } #[doc = "Bits 8:15 - Fall Value for Dead Time of Channel 1"] #[inline(always)] - #[must_use] pub fn dt1f(&mut self) -> DT1F_W { DT1F_W::new(self, 8) } diff --git a/src/ccu80_cc80/dc2r.rs b/src/ccu80_cc80/dc2r.rs index ee22369d..00c16859 100644 --- a/src/ccu80_cc80/dc2r.rs +++ b/src/ccu80_cc80/dc2r.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:7 - Rise Value for Dead Time of Channel 2"] #[inline(always)] - #[must_use] pub fn dt2r(&mut self) -> DT2R_W { DT2R_W::new(self, 0) } #[doc = "Bits 8:15 - Fall Value for Dead Time of Channel 2"] #[inline(always)] - #[must_use] pub fn dt2f(&mut self) -> DT2F_W { DT2F_W::new(self, 8) } diff --git a/src/ccu80_cc80/dits.rs b/src/ccu80_cc80/dits.rs index 0457d48f..e01add6a 100644 --- a/src/ccu80_cc80/dits.rs +++ b/src/ccu80_cc80/dits.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:3 - Dither Shadow Compare Value"] #[inline(always)] - #[must_use] pub fn dcvs(&mut self) -> DCVS_W { DCVS_W::new(self, 0) } diff --git a/src/ccu80_cc80/dtc.rs b/src/ccu80_cc80/dtc.rs index 7ca7a348..9b2a664d 100644 --- a/src/ccu80_cc80/dtc.rs +++ b/src/ccu80_cc80/dtc.rs @@ -446,43 +446,36 @@ impl R { impl W { #[doc = "Bit 0 - Dead Time Enable for Channel 1"] #[inline(always)] - #[must_use] pub fn dte1(&mut self) -> DTE1_W { DTE1_W::new(self, 0) } #[doc = "Bit 1 - Dead Time Enable for Channel 2"] #[inline(always)] - #[must_use] pub fn dte2(&mut self) -> DTE2_W { DTE2_W::new(self, 1) } #[doc = "Bit 2 - Dead Time Enable for CC8yST1"] #[inline(always)] - #[must_use] pub fn dcen1(&mut self) -> DCEN1_W { DCEN1_W::new(self, 2) } #[doc = "Bit 3 - Dead Time Enable for inverted CC8yST1"] #[inline(always)] - #[must_use] pub fn dcen2(&mut self) -> DCEN2_W { DCEN2_W::new(self, 3) } #[doc = "Bit 4 - Dead Time Enable for CC8yST2"] #[inline(always)] - #[must_use] pub fn dcen3(&mut self) -> DCEN3_W { DCEN3_W::new(self, 4) } #[doc = "Bit 5 - Dead Time Enable for inverted CC8yST2"] #[inline(always)] - #[must_use] pub fn dcen4(&mut self) -> DCEN4_W { DCEN4_W::new(self, 5) } #[doc = "Bits 6:7 - Dead Time clock control"] #[inline(always)] - #[must_use] pub fn dtcc(&mut self) -> DTCC_W { DTCC_W::new(self, 6) } diff --git a/src/ccu80_cc80/fpc.rs b/src/ccu80_cc80/fpc.rs index 77c4d241..ccab00bd 100644 --- a/src/ccu80_cc80/fpc.rs +++ b/src/ccu80_cc80/fpc.rs @@ -23,7 +23,6 @@ impl R { impl W { #[doc = "Bits 8:11 - Actual Prescaler Value"] #[inline(always)] - #[must_use] pub fn pval(&mut self) -> PVAL_W { PVAL_W::new(self, 8) } diff --git a/src/ccu80_cc80/fpcs.rs b/src/ccu80_cc80/fpcs.rs index 7ebabe62..4e7af348 100644 --- a/src/ccu80_cc80/fpcs.rs +++ b/src/ccu80_cc80/fpcs.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:3 - Floating Prescaler Shadow Compare Value"] #[inline(always)] - #[must_use] pub fn pcmp(&mut self) -> PCMP_W { PCMP_W::new(self, 0) } diff --git a/src/ccu80_cc80/ins.rs b/src/ccu80_cc80/ins.rs index bd483a07..c1ba2802 100644 --- a/src/ccu80_cc80/ins.rs +++ b/src/ccu80_cc80/ins.rs @@ -1468,73 +1468,61 @@ impl R { impl W { #[doc = "Bits 0:3 - Event 0 signal selection"] #[inline(always)] - #[must_use] pub fn ev0is(&mut self) -> EV0IS_W { EV0IS_W::new(self, 0) } #[doc = "Bits 4:7 - Event 1 signal selection"] #[inline(always)] - #[must_use] pub fn ev1is(&mut self) -> EV1IS_W { EV1IS_W::new(self, 4) } #[doc = "Bits 8:11 - Event 2 signal selection"] #[inline(always)] - #[must_use] pub fn ev2is(&mut self) -> EV2IS_W { EV2IS_W::new(self, 8) } #[doc = "Bits 16:17 - Event 0 Edge Selection"] #[inline(always)] - #[must_use] pub fn ev0em(&mut self) -> EV0EM_W { EV0EM_W::new(self, 16) } #[doc = "Bits 18:19 - Event 1 Edge Selection"] #[inline(always)] - #[must_use] pub fn ev1em(&mut self) -> EV1EM_W { EV1EM_W::new(self, 18) } #[doc = "Bits 20:21 - Event 2 Edge Selection"] #[inline(always)] - #[must_use] pub fn ev2em(&mut self) -> EV2EM_W { EV2EM_W::new(self, 20) } #[doc = "Bit 22 - Event 0 Level Selection"] #[inline(always)] - #[must_use] pub fn ev0lm(&mut self) -> EV0LM_W { EV0LM_W::new(self, 22) } #[doc = "Bit 23 - Event 1 Level Selection"] #[inline(always)] - #[must_use] pub fn ev1lm(&mut self) -> EV1LM_W { EV1LM_W::new(self, 23) } #[doc = "Bit 24 - Event 2 Level Selection"] #[inline(always)] - #[must_use] pub fn ev2lm(&mut self) -> EV2LM_W { EV2LM_W::new(self, 24) } #[doc = "Bits 25:26 - Event 0 Low Pass Filter Configuration"] #[inline(always)] - #[must_use] pub fn lpf0m(&mut self) -> LPF0M_W { LPF0M_W::new(self, 25) } #[doc = "Bits 27:28 - Event 1 Low Pass Filter Configuration"] #[inline(always)] - #[must_use] pub fn lpf1m(&mut self) -> LPF1M_W { LPF1M_W::new(self, 27) } #[doc = "Bits 29:30 - Event 2 Low Pass Filter Configuration"] #[inline(always)] - #[must_use] pub fn lpf2m(&mut self) -> LPF2M_W { LPF2M_W::new(self, 29) } diff --git a/src/ccu80_cc80/inte.rs b/src/ccu80_cc80/inte.rs index 81cba007..b94d5316 100644 --- a/src/ccu80_cc80/inte.rs +++ b/src/ccu80_cc80/inte.rs @@ -529,55 +529,46 @@ impl R { impl W { #[doc = "Bit 0 - Period match while counting up enable"] #[inline(always)] - #[must_use] pub fn pme(&mut self) -> PME_W { PME_W::new(self, 0) } #[doc = "Bit 1 - One match while counting down enable"] #[inline(always)] - #[must_use] pub fn ome(&mut self) -> OME_W { OME_W::new(self, 1) } #[doc = "Bit 2 - Channel 1 Compare match while counting up enable"] #[inline(always)] - #[must_use] pub fn cmu1e(&mut self) -> CMU1E_W { CMU1E_W::new(self, 2) } #[doc = "Bit 3 - Channel 1 Compare match while counting down enable"] #[inline(always)] - #[must_use] pub fn cmd1e(&mut self) -> CMD1E_W { CMD1E_W::new(self, 3) } #[doc = "Bit 4 - Channel 2 Compare match while counting up enable"] #[inline(always)] - #[must_use] pub fn cmu2e(&mut self) -> CMU2E_W { CMU2E_W::new(self, 4) } #[doc = "Bit 5 - Channel 2 Compare match while counting down enable"] #[inline(always)] - #[must_use] pub fn cmd2e(&mut self) -> CMD2E_W { CMD2E_W::new(self, 5) } #[doc = "Bit 8 - Event 0 interrupt enable"] #[inline(always)] - #[must_use] pub fn e0ae(&mut self) -> E0AE_W { E0AE_W::new(self, 8) } #[doc = "Bit 9 - Event 1 interrupt enable"] #[inline(always)] - #[must_use] pub fn e1ae(&mut self) -> E1AE_W { E1AE_W::new(self, 9) } #[doc = "Bit 10 - Event 2 interrupt enable"] #[inline(always)] - #[must_use] pub fn e2ae(&mut self) -> E2AE_W { E2AE_W::new(self, 10) } diff --git a/src/ccu80_cc80/prs.rs b/src/ccu80_cc80/prs.rs index 7a8e25be..33023479 100644 --- a/src/ccu80_cc80/prs.rs +++ b/src/ccu80_cc80/prs.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Period Register"] #[inline(always)] - #[must_use] pub fn prs(&mut self) -> PRS_W { PRS_W::new(self, 0) } diff --git a/src/ccu80_cc80/psc.rs b/src/ccu80_cc80/psc.rs index 81b915c9..a65ae11b 100644 --- a/src/ccu80_cc80/psc.rs +++ b/src/ccu80_cc80/psc.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:3 - Prescaler Initial Value"] #[inline(always)] - #[must_use] pub fn psiv(&mut self) -> PSIV_W { PSIV_W::new(self, 0) } diff --git a/src/ccu80_cc80/psl.rs b/src/ccu80_cc80/psl.rs index 9566c754..c6e9a4a0 100644 --- a/src/ccu80_cc80/psl.rs +++ b/src/ccu80_cc80/psl.rs @@ -239,25 +239,21 @@ impl R { impl W { #[doc = "Bit 0 - Output Passive Level for CCU8x.OUTy0"] #[inline(always)] - #[must_use] pub fn psl11(&mut self) -> PSL11_W { PSL11_W::new(self, 0) } #[doc = "Bit 1 - Output Passive Level for CCU8x.OUTy1"] #[inline(always)] - #[must_use] pub fn psl12(&mut self) -> PSL12_W { PSL12_W::new(self, 1) } #[doc = "Bit 2 - Output Passive Level for CCU8x.OUTy2"] #[inline(always)] - #[must_use] pub fn psl21(&mut self) -> PSL21_W { PSL21_W::new(self, 2) } #[doc = "Bit 3 - Output Passive Level for CCU8x.OUTy3"] #[inline(always)] - #[must_use] pub fn psl22(&mut self) -> PSL22_W { PSL22_W::new(self, 3) } diff --git a/src/ccu80_cc80/srs.rs b/src/ccu80_cc80/srs.rs index e1492789..cf5e00ab 100644 --- a/src/ccu80_cc80/srs.rs +++ b/src/ccu80_cc80/srs.rs @@ -553,37 +553,31 @@ impl R { impl W { #[doc = "Bits 0:1 - Period/One match Service request selector"] #[inline(always)] - #[must_use] pub fn posr(&mut self) -> POSR_W { POSR_W::new(self, 0) } #[doc = "Bits 2:3 - Channel 1 Compare match Service request selector"] #[inline(always)] - #[must_use] pub fn cm1sr(&mut self) -> CM1SR_W { CM1SR_W::new(self, 2) } #[doc = "Bits 4:5 - Channel 2 Compare match Service request selector"] #[inline(always)] - #[must_use] pub fn cm2sr(&mut self) -> CM2SR_W { CM2SR_W::new(self, 4) } #[doc = "Bits 8:9 - Event 0 Service request selector"] #[inline(always)] - #[must_use] pub fn e0sr(&mut self) -> E0SR_W { E0SR_W::new(self, 8) } #[doc = "Bits 10:11 - Event 1 Service request selector"] #[inline(always)] - #[must_use] pub fn e1sr(&mut self) -> E1SR_W { E1SR_W::new(self, 10) } #[doc = "Bits 12:13 - Event 2 Service request selector"] #[inline(always)] - #[must_use] pub fn e2sr(&mut self) -> E2SR_W { E2SR_W::new(self, 12) } diff --git a/src/ccu80_cc80/stc.rs b/src/ccu80_cc80/stc.rs index 3951b800..f37f7025 100644 --- a/src/ccu80_cc80/stc.rs +++ b/src/ccu80_cc80/stc.rs @@ -143,13 +143,11 @@ impl R { impl W { #[doc = "Bit 0 - Cascaded shadow transfer enable"] #[inline(always)] - #[must_use] pub fn cse(&mut self) -> CSE_W { CSE_W::new(self, 0) } #[doc = "Bits 1:2 - Shadow transfer mode"] #[inline(always)] - #[must_use] pub fn stm(&mut self) -> STM_W { STM_W::new(self, 1) } diff --git a/src/ccu80_cc80/swr.rs b/src/ccu80_cc80/swr.rs index 2a89528e..b613551e 100644 --- a/src/ccu80_cc80/swr.rs +++ b/src/ccu80_cc80/swr.rs @@ -23,61 +23,51 @@ pub type RTRPF_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Period match while counting up clear"] #[inline(always)] - #[must_use] pub fn rpm(&mut self) -> RPM_W { RPM_W::new(self, 0) } #[doc = "Bit 1 - One match while counting down clear"] #[inline(always)] - #[must_use] pub fn rom(&mut self) -> ROM_W { ROM_W::new(self, 1) } #[doc = "Bit 2 - Channel 1 Compare match while counting up clear"] #[inline(always)] - #[must_use] pub fn rcm1u(&mut self) -> RCM1U_W { RCM1U_W::new(self, 2) } #[doc = "Bit 3 - Channel 1 Compare match while counting down clear"] #[inline(always)] - #[must_use] pub fn rcm1d(&mut self) -> RCM1D_W { RCM1D_W::new(self, 3) } #[doc = "Bit 4 - Channel 2 Compare match while counting up clear"] #[inline(always)] - #[must_use] pub fn rcm2u(&mut self) -> RCM2U_W { RCM2U_W::new(self, 4) } #[doc = "Bit 5 - Channel 2 Compare match while counting down clear"] #[inline(always)] - #[must_use] pub fn rcm2d(&mut self) -> RCM2D_W { RCM2D_W::new(self, 5) } #[doc = "Bit 8 - Event 0 detection clear"] #[inline(always)] - #[must_use] pub fn re0a(&mut self) -> RE0A_W { RE0A_W::new(self, 8) } #[doc = "Bit 9 - Event 1 detection clear"] #[inline(always)] - #[must_use] pub fn re1a(&mut self) -> RE1A_W { RE1A_W::new(self, 9) } #[doc = "Bit 10 - Event 2 detection clear"] #[inline(always)] - #[must_use] pub fn re2a(&mut self) -> RE2A_W { RE2A_W::new(self, 10) } #[doc = "Bit 11 - Trap Flag status clear"] #[inline(always)] - #[must_use] pub fn rtrpf(&mut self) -> RTRPF_W { RTRPF_W::new(self, 11) } diff --git a/src/ccu80_cc80/sws.rs b/src/ccu80_cc80/sws.rs index 175754ee..cbf23dd3 100644 --- a/src/ccu80_cc80/sws.rs +++ b/src/ccu80_cc80/sws.rs @@ -23,61 +23,51 @@ pub type STRPF_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Period match while counting up set"] #[inline(always)] - #[must_use] pub fn spm(&mut self) -> SPM_W { SPM_W::new(self, 0) } #[doc = "Bit 1 - One match while counting down set"] #[inline(always)] - #[must_use] pub fn som(&mut self) -> SOM_W { SOM_W::new(self, 1) } #[doc = "Bit 2 - Channel 1 Compare match while counting up set"] #[inline(always)] - #[must_use] pub fn scm1u(&mut self) -> SCM1U_W { SCM1U_W::new(self, 2) } #[doc = "Bit 3 - Channel 1 Compare match while counting down set"] #[inline(always)] - #[must_use] pub fn scm1d(&mut self) -> SCM1D_W { SCM1D_W::new(self, 3) } #[doc = "Bit 4 - Compare match while counting up set"] #[inline(always)] - #[must_use] pub fn scm2u(&mut self) -> SCM2U_W { SCM2U_W::new(self, 4) } #[doc = "Bit 5 - Compare match while counting down set"] #[inline(always)] - #[must_use] pub fn scm2d(&mut self) -> SCM2D_W { SCM2D_W::new(self, 5) } #[doc = "Bit 8 - Event 0 detection set"] #[inline(always)] - #[must_use] pub fn se0a(&mut self) -> SE0A_W { SE0A_W::new(self, 8) } #[doc = "Bit 9 - Event 1 detection set"] #[inline(always)] - #[must_use] pub fn se1a(&mut self) -> SE1A_W { SE1A_W::new(self, 9) } #[doc = "Bit 10 - Event 2 detection set"] #[inline(always)] - #[must_use] pub fn se2a(&mut self) -> SE2A_W { SE2A_W::new(self, 10) } #[doc = "Bit 11 - Trap Flag status set"] #[inline(always)] - #[must_use] pub fn strpf(&mut self) -> STRPF_W { STRPF_W::new(self, 11) } diff --git a/src/ccu80_cc80/tc.rs b/src/ccu80_cc80/tc.rs index 8319e15b..1623886d 100644 --- a/src/ccu80_cc80/tc.rs +++ b/src/ccu80_cc80/tc.rs @@ -1454,151 +1454,126 @@ impl R { impl W { #[doc = "Bit 0 - Timer Counting Mode"] #[inline(always)] - #[must_use] pub fn tcm(&mut self) -> TCM_W { TCM_W::new(self, 0) } #[doc = "Bit 1 - Timer Single Shot Mode"] #[inline(always)] - #[must_use] pub fn tssm(&mut self) -> TSSM_W { TSSM_W::new(self, 1) } #[doc = "Bit 2 - Shadow Transfer on Clear"] #[inline(always)] - #[must_use] pub fn clst(&mut self) -> CLST_W { CLST_W::new(self, 2) } #[doc = "Bit 4 - Extended Capture Mode"] #[inline(always)] - #[must_use] pub fn ecm(&mut self) -> ECM_W { ECM_W::new(self, 4) } #[doc = "Bits 5:6 - Clear on Capture Control"] #[inline(always)] - #[must_use] pub fn capc(&mut self) -> CAPC_W { CAPC_W::new(self, 5) } #[doc = "Bit 7 - Timer Load selector"] #[inline(always)] - #[must_use] pub fn tls(&mut self) -> TLS_W { TLS_W::new(self, 7) } #[doc = "Bits 8:9 - Extended Stop Function Control"] #[inline(always)] - #[must_use] pub fn endm(&mut self) -> ENDM_W { ENDM_W::new(self, 8) } #[doc = "Bit 10 - Extended Start Function Control"] #[inline(always)] - #[must_use] pub fn strm(&mut self) -> STRM_W { STRM_W::new(self, 10) } #[doc = "Bit 11 - Equal Capture Event enable"] #[inline(always)] - #[must_use] pub fn sce(&mut self) -> SCE_W { SCE_W::new(self, 11) } #[doc = "Bit 12 - Continuous Capture Enable"] #[inline(always)] - #[must_use] pub fn ccs(&mut self) -> CCS_W { CCS_W::new(self, 12) } #[doc = "Bits 13:14 - Dither Enable"] #[inline(always)] - #[must_use] pub fn dithe(&mut self) -> DITHE_W { DITHE_W::new(self, 13) } #[doc = "Bit 15 - Dither input selector"] #[inline(always)] - #[must_use] pub fn dim(&mut self) -> DIM_W { DIM_W::new(self, 15) } #[doc = "Bit 16 - Floating Prescaler enable"] #[inline(always)] - #[must_use] pub fn fpe(&mut self) -> FPE_W { FPE_W::new(self, 16) } #[doc = "Bit 17 - TRAP enable for CCU8x.OUTy0"] #[inline(always)] - #[must_use] pub fn trape0(&mut self) -> TRAPE0_W { TRAPE0_W::new(self, 17) } #[doc = "Bit 18 - TRAP enable for CCU8x.OUTy1"] #[inline(always)] - #[must_use] pub fn trape1(&mut self) -> TRAPE1_W { TRAPE1_W::new(self, 18) } #[doc = "Bit 19 - TRAP enable for CCU8x.OUTy2"] #[inline(always)] - #[must_use] pub fn trape2(&mut self) -> TRAPE2_W { TRAPE2_W::new(self, 19) } #[doc = "Bit 20 - TRAP enable for CCU8x.OUTy3"] #[inline(always)] - #[must_use] pub fn trape3(&mut self) -> TRAPE3_W { TRAPE3_W::new(self, 20) } #[doc = "Bit 21 - TRAP Synchronization Enable"] #[inline(always)] - #[must_use] pub fn trpse(&mut self) -> TRPSE_W { TRPSE_W::new(self, 21) } #[doc = "Bit 22 - TRAP State Clear Control"] #[inline(always)] - #[must_use] pub fn trpsw(&mut self) -> TRPSW_W { TRPSW_W::new(self, 22) } #[doc = "Bit 23 - External Modulation Synchronization"] #[inline(always)] - #[must_use] pub fn ems(&mut self) -> EMS_W { EMS_W::new(self, 23) } #[doc = "Bit 24 - External Modulation Type"] #[inline(always)] - #[must_use] pub fn emt(&mut self) -> EMT_W { EMT_W::new(self, 24) } #[doc = "Bit 25 - Multi Channel Mode Enable for Channel 1"] #[inline(always)] - #[must_use] pub fn mcme1(&mut self) -> MCME1_W { MCME1_W::new(self, 25) } #[doc = "Bit 26 - Multi Channel Mode Enable for Channel 2"] #[inline(always)] - #[must_use] pub fn mcme2(&mut self) -> MCME2_W { MCME2_W::new(self, 26) } #[doc = "Bits 27:28 - External Modulation Channel enable"] #[inline(always)] - #[must_use] pub fn eme(&mut self) -> EME_W { EME_W::new(self, 27) } #[doc = "Bits 29:30 - Status bit output selector"] #[inline(always)] - #[must_use] pub fn stos(&mut self) -> STOS_W { STOS_W::new(self, 29) } diff --git a/src/ccu80_cc80/tcclr.rs b/src/ccu80_cc80/tcclr.rs index 3f7deef5..9dd2e441 100644 --- a/src/ccu80_cc80/tcclr.rs +++ b/src/ccu80_cc80/tcclr.rs @@ -13,31 +13,26 @@ pub type DTC2C_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Timer Run Bit Clear"] #[inline(always)] - #[must_use] pub fn trbc(&mut self) -> TRBC_W { TRBC_W::new(self, 0) } #[doc = "Bit 1 - Timer Clear"] #[inline(always)] - #[must_use] pub fn tcc(&mut self) -> TCC_W { TCC_W::new(self, 1) } #[doc = "Bit 2 - Dither Counter Clear"] #[inline(always)] - #[must_use] pub fn ditc(&mut self) -> DITC_W { DITC_W::new(self, 2) } #[doc = "Bit 3 - Dead Time Counter 1 Clear"] #[inline(always)] - #[must_use] pub fn dtc1c(&mut self) -> DTC1C_W { DTC1C_W::new(self, 3) } #[doc = "Bit 4 - Dead Time Counter 2 Clear"] #[inline(always)] - #[must_use] pub fn dtc2c(&mut self) -> DTC2C_W { DTC2C_W::new(self, 4) } diff --git a/src/ccu80_cc80/tcset.rs b/src/ccu80_cc80/tcset.rs index 04914af2..2c2ff325 100644 --- a/src/ccu80_cc80/tcset.rs +++ b/src/ccu80_cc80/tcset.rs @@ -5,7 +5,6 @@ pub type TRBS_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Timer Run Bit set"] #[inline(always)] - #[must_use] pub fn trbs(&mut self) -> TRBS_W { TRBS_W::new(self, 0) } diff --git a/src/ccu80_cc80/timer.rs b/src/ccu80_cc80/timer.rs index 222e6bd7..b6c60ec3 100644 --- a/src/ccu80_cc80/timer.rs +++ b/src/ccu80_cc80/timer.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Timer Value"] #[inline(always)] - #[must_use] pub fn tval(&mut self) -> TVAL_W { TVAL_W::new(self, 0) } diff --git a/src/dac/dac01data.rs b/src/dac/dac01data.rs index 114ba193..b403651e 100644 --- a/src/dac/dac01data.rs +++ b/src/dac/dac01data.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:11 - DAC0 Data Bits"] #[inline(always)] - #[must_use] pub fn data0(&mut self) -> DATA0_W { DATA0_W::new(self, 0) } #[doc = "Bits 16:27 - DAC1 Data Bits"] #[inline(always)] - #[must_use] pub fn data1(&mut self) -> DATA1_W { DATA1_W::new(self, 16) } diff --git a/src/dac/dac0cfg0.rs b/src/dac/dac0cfg0.rs index 13563c55..3c3b8f49 100644 --- a/src/dac/dac0cfg0.rs +++ b/src/dac/dac0cfg0.rs @@ -521,37 +521,31 @@ impl R { impl W { #[doc = "Bits 0:19 - Integer Frequency Divider Value"] #[inline(always)] - #[must_use] pub fn freq(&mut self) -> FREQ_W { FREQ_W::new(self, 0) } #[doc = "Bits 20:22 - Enables and Sets the Mode for DAC0"] #[inline(always)] - #[must_use] pub fn mode(&mut self) -> MODE_W { MODE_W::new(self, 20) } #[doc = "Bit 23 - Selects Between Signed and Unsigned DAC0 Mode"] #[inline(always)] - #[must_use] pub fn sign(&mut self) -> SIGN_W { SIGN_W::new(self, 23) } #[doc = "Bit 28 - Negates the DAC0 output"] #[inline(always)] - #[must_use] pub fn negate(&mut self) -> NEGATE_W { NEGATE_W::new(self, 28) } #[doc = "Bit 29 - Enable Sign Output of DAC0 Pattern Generator"] #[inline(always)] - #[must_use] pub fn signen(&mut self) -> SIGNEN_W { SIGNEN_W::new(self, 29) } #[doc = "Bit 30 - Enable DAC0 service request interrupt generation"] #[inline(always)] - #[must_use] pub fn sren(&mut self) -> SREN_W { SREN_W::new(self, 30) } diff --git a/src/dac/dac0cfg1.rs b/src/dac/dac0cfg1.rs index 78cbe4d6..9efb561e 100644 --- a/src/dac/dac0cfg1.rs +++ b/src/dac/dac0cfg1.rs @@ -447,61 +447,51 @@ impl R { impl W { #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC0 input data in steps by the power of 2 (=shift operation)"] #[inline(always)] - #[must_use] pub fn scale(&mut self) -> SCALE_W { SCALE_W::new(self, 0) } #[doc = "Bit 3 - Switch between up- and downscale of the DAC0 input data values"] #[inline(always)] - #[must_use] pub fn muldiv(&mut self) -> MULDIV_W { MULDIV_W::new(self, 3) } #[doc = "Bits 4:11 - 8-bit offset value addition"] #[inline(always)] - #[must_use] pub fn offs(&mut self) -> OFFS_W { OFFS_W::new(self, 4) } #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC0"] #[inline(always)] - #[must_use] pub fn trigsel(&mut self) -> TRIGSEL_W { TRIGSEL_W::new(self, 12) } #[doc = "Bit 15 - Switch between independent or simultaneous DAC mode and select the input data register for DAC0 and DAC1"] #[inline(always)] - #[must_use] pub fn datmod(&mut self) -> DATMOD_W { DATMOD_W::new(self, 15) } #[doc = "Bit 16 - Software Trigger"] #[inline(always)] - #[must_use] pub fn swtrig(&mut self) -> SWTRIG_W { SWTRIG_W::new(self, 16) } #[doc = "Bits 17:18 - Select the trigger source for channel 0"] #[inline(always)] - #[must_use] pub fn trigmod(&mut self) -> TRIGMOD_W { TRIGMOD_W::new(self, 17) } #[doc = "Bits 19:23 - DAC0 analog configuration/calibration parameters"] #[inline(always)] - #[must_use] pub fn anacfg(&mut self) -> ANACFG_W { ANACFG_W::new(self, 19) } #[doc = "Bit 24 - Enable analog DAC for channel 0"] #[inline(always)] - #[must_use] pub fn anaen(&mut self) -> ANAEN_W { ANAEN_W::new(self, 24) } #[doc = "Bits 28:31 - Lower 4 band-gap configuration/calibration parameters"] #[inline(always)] - #[must_use] pub fn refcfgl(&mut self) -> REFCFGL_W { REFCFGL_W::new(self, 28) } diff --git a/src/dac/dac0data.rs b/src/dac/dac0data.rs index ed05c204..fc0d93c2 100644 --- a/src/dac/dac0data.rs +++ b/src/dac/dac0data.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:11 - DAC0 Data Bits"] #[inline(always)] - #[must_use] pub fn data0(&mut self) -> DATA0_W { DATA0_W::new(self, 0) } diff --git a/src/dac/dac0path.rs b/src/dac/dac0path.rs index 5a00ed26..8eef28a8 100644 --- a/src/dac/dac0path.rs +++ b/src/dac/dac0path.rs @@ -34,19 +34,16 @@ impl R { impl W { #[doc = "Bits 0:4 - Pattern Number 6 for PATGEN of DAC0"] #[inline(always)] - #[must_use] pub fn pat6(&mut self) -> PAT6_W { PAT6_W::new(self, 0) } #[doc = "Bits 5:9 - Pattern Number 7 for PATGEN of DAC0"] #[inline(always)] - #[must_use] pub fn pat7(&mut self) -> PAT7_W { PAT7_W::new(self, 5) } #[doc = "Bits 10:14 - Pattern Number 8 for PATGEN of DAC0"] #[inline(always)] - #[must_use] pub fn pat8(&mut self) -> PAT8_W { PAT8_W::new(self, 10) } diff --git a/src/dac/dac0patl.rs b/src/dac/dac0patl.rs index 1c270a3d..e05d886a 100644 --- a/src/dac/dac0patl.rs +++ b/src/dac/dac0patl.rs @@ -61,37 +61,31 @@ impl R { impl W { #[doc = "Bits 0:4 - Pattern Number 0 for PATGEN of DAC0"] #[inline(always)] - #[must_use] pub fn pat0(&mut self) -> PAT0_W { PAT0_W::new(self, 0) } #[doc = "Bits 5:9 - Pattern Number 1 for PATGEN of DAC0"] #[inline(always)] - #[must_use] pub fn pat1(&mut self) -> PAT1_W { PAT1_W::new(self, 5) } #[doc = "Bits 10:14 - Pattern Number 2 for PATGEN of DAC0"] #[inline(always)] - #[must_use] pub fn pat2(&mut self) -> PAT2_W { PAT2_W::new(self, 10) } #[doc = "Bits 15:19 - Pattern Number 3 for PATGEN of DAC0"] #[inline(always)] - #[must_use] pub fn pat3(&mut self) -> PAT3_W { PAT3_W::new(self, 15) } #[doc = "Bits 20:24 - Pattern Number 4 for PATGEN of DAC0"] #[inline(always)] - #[must_use] pub fn pat4(&mut self) -> PAT4_W { PAT4_W::new(self, 20) } #[doc = "Bits 25:29 - Pattern Number 5 for PATGEN of DAC0"] #[inline(always)] - #[must_use] pub fn pat5(&mut self) -> PAT5_W { PAT5_W::new(self, 25) } diff --git a/src/dac/dac1cfg0.rs b/src/dac/dac1cfg0.rs index d1bb5412..db8a8751 100644 --- a/src/dac/dac1cfg0.rs +++ b/src/dac/dac1cfg0.rs @@ -521,37 +521,31 @@ impl R { impl W { #[doc = "Bits 0:19 - Integer Frequency Divider Value"] #[inline(always)] - #[must_use] pub fn freq(&mut self) -> FREQ_W { FREQ_W::new(self, 0) } #[doc = "Bits 20:22 - Enables and sets the Mode for DAC1"] #[inline(always)] - #[must_use] pub fn mode(&mut self) -> MODE_W { MODE_W::new(self, 20) } #[doc = "Bit 23 - Selects between signed and unsigned DAC1 mode"] #[inline(always)] - #[must_use] pub fn sign(&mut self) -> SIGN_W { SIGN_W::new(self, 23) } #[doc = "Bit 28 - Negates the DAC1 output"] #[inline(always)] - #[must_use] pub fn negate(&mut self) -> NEGATE_W { NEGATE_W::new(self, 28) } #[doc = "Bit 29 - Enable sign output of DAC1 pattern generator"] #[inline(always)] - #[must_use] pub fn signen(&mut self) -> SIGNEN_W { SIGNEN_W::new(self, 29) } #[doc = "Bit 30 - Enable DAC1 service request interrupt generation"] #[inline(always)] - #[must_use] pub fn sren(&mut self) -> SREN_W { SREN_W::new(self, 30) } diff --git a/src/dac/dac1cfg1.rs b/src/dac/dac1cfg1.rs index 87e6bc09..7b74ae49 100644 --- a/src/dac/dac1cfg1.rs +++ b/src/dac/dac1cfg1.rs @@ -389,55 +389,46 @@ impl R { impl W { #[doc = "Bits 0:2 - Scale value for up- or downscale of the DAC1 input data in steps by the power of 2 (=shift operation)"] #[inline(always)] - #[must_use] pub fn scale(&mut self) -> SCALE_W { SCALE_W::new(self, 0) } #[doc = "Bit 3 - Switch between up- and downscale of the DAC1 input data values"] #[inline(always)] - #[must_use] pub fn muldiv(&mut self) -> MULDIV_W { MULDIV_W::new(self, 3) } #[doc = "Bits 4:11 - 8-bit offset value addition"] #[inline(always)] - #[must_use] pub fn offs(&mut self) -> OFFS_W { OFFS_W::new(self, 4) } #[doc = "Bits 12:14 - Selects one of the eight external trigger sources for DAC1"] #[inline(always)] - #[must_use] pub fn trigsel(&mut self) -> TRIGSEL_W { TRIGSEL_W::new(self, 12) } #[doc = "Bit 16 - Software Trigger"] #[inline(always)] - #[must_use] pub fn swtrig(&mut self) -> SWTRIG_W { SWTRIG_W::new(self, 16) } #[doc = "Bits 17:18 - Select the trigger source for channel 1"] #[inline(always)] - #[must_use] pub fn trigmod(&mut self) -> TRIGMOD_W { TRIGMOD_W::new(self, 17) } #[doc = "Bits 19:23 - DAC1 analog configuration/calibration parameters"] #[inline(always)] - #[must_use] pub fn anacfg(&mut self) -> ANACFG_W { ANACFG_W::new(self, 19) } #[doc = "Bit 24 - Enable analog DAC for channel 1"] #[inline(always)] - #[must_use] pub fn anaen(&mut self) -> ANAEN_W { ANAEN_W::new(self, 24) } #[doc = "Bits 28:31 - Higher 4 band-gap configuration/calibration parameters"] #[inline(always)] - #[must_use] pub fn refcfgh(&mut self) -> REFCFGH_W { REFCFGH_W::new(self, 28) } diff --git a/src/dac/dac1data.rs b/src/dac/dac1data.rs index 3acf8765..e031968b 100644 --- a/src/dac/dac1data.rs +++ b/src/dac/dac1data.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:11 - DAC1 Data Bits"] #[inline(always)] - #[must_use] pub fn data1(&mut self) -> DATA1_W { DATA1_W::new(self, 0) } diff --git a/src/dac/dac1path.rs b/src/dac/dac1path.rs index 0f0cc861..88069fbb 100644 --- a/src/dac/dac1path.rs +++ b/src/dac/dac1path.rs @@ -34,19 +34,16 @@ impl R { impl W { #[doc = "Bits 0:4 - Pattern Number 6 for PATGEN of DAC1"] #[inline(always)] - #[must_use] pub fn pat6(&mut self) -> PAT6_W { PAT6_W::new(self, 0) } #[doc = "Bits 5:9 - Pattern Number 7 for PATGEN of DAC1"] #[inline(always)] - #[must_use] pub fn pat7(&mut self) -> PAT7_W { PAT7_W::new(self, 5) } #[doc = "Bits 10:14 - Pattern Number 8 for PATGEN of DAC1"] #[inline(always)] - #[must_use] pub fn pat8(&mut self) -> PAT8_W { PAT8_W::new(self, 10) } diff --git a/src/dac/dac1patl.rs b/src/dac/dac1patl.rs index 245057ab..0834e679 100644 --- a/src/dac/dac1patl.rs +++ b/src/dac/dac1patl.rs @@ -61,37 +61,31 @@ impl R { impl W { #[doc = "Bits 0:4 - Pattern Number 0 for PATGEN of DAC1"] #[inline(always)] - #[must_use] pub fn pat0(&mut self) -> PAT0_W { PAT0_W::new(self, 0) } #[doc = "Bits 5:9 - Pattern Number 1 for PATGEN of DAC1"] #[inline(always)] - #[must_use] pub fn pat1(&mut self) -> PAT1_W { PAT1_W::new(self, 5) } #[doc = "Bits 10:14 - Pattern Number 2 for PATGEN of DAC1"] #[inline(always)] - #[must_use] pub fn pat2(&mut self) -> PAT2_W { PAT2_W::new(self, 10) } #[doc = "Bits 15:19 - Pattern Number 3 for PATGEN of DAC1"] #[inline(always)] - #[must_use] pub fn pat3(&mut self) -> PAT3_W { PAT3_W::new(self, 15) } #[doc = "Bits 20:24 - Pattern Number 4 for PATGEN of DAC1"] #[inline(always)] - #[must_use] pub fn pat4(&mut self) -> PAT4_W { PAT4_W::new(self, 20) } #[doc = "Bits 25:29 - Pattern Number 5 for PATGEN of DAC1"] #[inline(always)] - #[must_use] pub fn pat5(&mut self) -> PAT5_W { PAT5_W::new(self, 25) } diff --git a/src/dlr/lnen.rs b/src/dlr/lnen.rs index 1f2a84c2..e3eaab92 100644 --- a/src/dlr/lnen.rs +++ b/src/dlr/lnen.rs @@ -703,73 +703,61 @@ impl R { impl W { #[doc = "Bit 0 - Line 0 Enable"] #[inline(always)] - #[must_use] pub fn ln0(&mut self) -> LN0_W { LN0_W::new(self, 0) } #[doc = "Bit 1 - Line 1 Enable"] #[inline(always)] - #[must_use] pub fn ln1(&mut self) -> LN1_W { LN1_W::new(self, 1) } #[doc = "Bit 2 - Line 2 Enable"] #[inline(always)] - #[must_use] pub fn ln2(&mut self) -> LN2_W { LN2_W::new(self, 2) } #[doc = "Bit 3 - Line 3 Enable"] #[inline(always)] - #[must_use] pub fn ln3(&mut self) -> LN3_W { LN3_W::new(self, 3) } #[doc = "Bit 4 - Line 4 Enable"] #[inline(always)] - #[must_use] pub fn ln4(&mut self) -> LN4_W { LN4_W::new(self, 4) } #[doc = "Bit 5 - Line 5 Enable"] #[inline(always)] - #[must_use] pub fn ln5(&mut self) -> LN5_W { LN5_W::new(self, 5) } #[doc = "Bit 6 - Line 6 Enable"] #[inline(always)] - #[must_use] pub fn ln6(&mut self) -> LN6_W { LN6_W::new(self, 6) } #[doc = "Bit 7 - Line 7 Enable"] #[inline(always)] - #[must_use] pub fn ln7(&mut self) -> LN7_W { LN7_W::new(self, 7) } #[doc = "Bit 8 - Line 8 Enable"] #[inline(always)] - #[must_use] pub fn ln8(&mut self) -> LN8_W { LN8_W::new(self, 8) } #[doc = "Bit 9 - Line 9 Enable"] #[inline(always)] - #[must_use] pub fn ln9(&mut self) -> LN9_W { LN9_W::new(self, 9) } #[doc = "Bit 10 - Line 10 Enable"] #[inline(always)] - #[must_use] pub fn ln10(&mut self) -> LN10_W { LN10_W::new(self, 10) } #[doc = "Bit 11 - Line 11 Enable"] #[inline(always)] - #[must_use] pub fn ln11(&mut self) -> LN11_W { LN11_W::new(self, 11) } diff --git a/src/dlr/ovrclr.rs b/src/dlr/ovrclr.rs index 37a85b73..4274a96c 100644 --- a/src/dlr/ovrclr.rs +++ b/src/dlr/ovrclr.rs @@ -27,73 +27,61 @@ pub type LN11_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Line 0 Overrun Status Clear"] #[inline(always)] - #[must_use] pub fn ln0(&mut self) -> LN0_W { LN0_W::new(self, 0) } #[doc = "Bit 1 - Line 1 Overrun Status Clear"] #[inline(always)] - #[must_use] pub fn ln1(&mut self) -> LN1_W { LN1_W::new(self, 1) } #[doc = "Bit 2 - Line 2 Overrun Status Clear"] #[inline(always)] - #[must_use] pub fn ln2(&mut self) -> LN2_W { LN2_W::new(self, 2) } #[doc = "Bit 3 - Line 3 Overrun Status Clear"] #[inline(always)] - #[must_use] pub fn ln3(&mut self) -> LN3_W { LN3_W::new(self, 3) } #[doc = "Bit 4 - Line 4 Overrun Status Clear"] #[inline(always)] - #[must_use] pub fn ln4(&mut self) -> LN4_W { LN4_W::new(self, 4) } #[doc = "Bit 5 - Line 5 Overrun Status Clear"] #[inline(always)] - #[must_use] pub fn ln5(&mut self) -> LN5_W { LN5_W::new(self, 5) } #[doc = "Bit 6 - Line 6 Overrun Status Clear"] #[inline(always)] - #[must_use] pub fn ln6(&mut self) -> LN6_W { LN6_W::new(self, 6) } #[doc = "Bit 7 - Line 7 Overrun Status Clear"] #[inline(always)] - #[must_use] pub fn ln7(&mut self) -> LN7_W { LN7_W::new(self, 7) } #[doc = "Bit 8 - Line 8 Overrun Status Clear"] #[inline(always)] - #[must_use] pub fn ln8(&mut self) -> LN8_W { LN8_W::new(self, 8) } #[doc = "Bit 9 - Line 9 Overrun Status Clear"] #[inline(always)] - #[must_use] pub fn ln9(&mut self) -> LN9_W { LN9_W::new(self, 9) } #[doc = "Bit 10 - Line 10 Overrun Status Clear"] #[inline(always)] - #[must_use] pub fn ln10(&mut self) -> LN10_W { LN10_W::new(self, 10) } #[doc = "Bit 11 - Line 11 Overrun Status Clear"] #[inline(always)] - #[must_use] pub fn ln11(&mut self) -> LN11_W { LN11_W::new(self, 11) } diff --git a/src/dlr/srsel0.rs b/src/dlr/srsel0.rs index 7e517870..16280dfd 100644 --- a/src/dlr/srsel0.rs +++ b/src/dlr/srsel0.rs @@ -79,49 +79,41 @@ impl R { impl W { #[doc = "Bits 0:3 - Request Source for Line 0"] #[inline(always)] - #[must_use] pub fn rs0(&mut self) -> RS0_W { RS0_W::new(self, 0) } #[doc = "Bits 4:7 - Request Source for Line 1"] #[inline(always)] - #[must_use] pub fn rs1(&mut self) -> RS1_W { RS1_W::new(self, 4) } #[doc = "Bits 8:11 - Request Source for Line 2"] #[inline(always)] - #[must_use] pub fn rs2(&mut self) -> RS2_W { RS2_W::new(self, 8) } #[doc = "Bits 12:15 - Request Source for Line 3"] #[inline(always)] - #[must_use] pub fn rs3(&mut self) -> RS3_W { RS3_W::new(self, 12) } #[doc = "Bits 16:19 - Request Source for Line 4"] #[inline(always)] - #[must_use] pub fn rs4(&mut self) -> RS4_W { RS4_W::new(self, 16) } #[doc = "Bits 20:23 - Request Source for Line 5"] #[inline(always)] - #[must_use] pub fn rs5(&mut self) -> RS5_W { RS5_W::new(self, 20) } #[doc = "Bits 24:27 - Request Source for Line 6"] #[inline(always)] - #[must_use] pub fn rs6(&mut self) -> RS6_W { RS6_W::new(self, 24) } #[doc = "Bits 28:31 - Request Source for Line 7"] #[inline(always)] - #[must_use] pub fn rs7(&mut self) -> RS7_W { RS7_W::new(self, 28) } diff --git a/src/dlr/srsel1.rs b/src/dlr/srsel1.rs index 0ec9b695..59b096a6 100644 --- a/src/dlr/srsel1.rs +++ b/src/dlr/srsel1.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:3 - Request Source for Line 8"] #[inline(always)] - #[must_use] pub fn rs8(&mut self) -> RS8_W { RS8_W::new(self, 0) } #[doc = "Bits 4:7 - Request Source for Line 9"] #[inline(always)] - #[must_use] pub fn rs9(&mut self) -> RS9_W { RS9_W::new(self, 4) } #[doc = "Bits 8:11 - Request Source for Line 10"] #[inline(always)] - #[must_use] pub fn rs10(&mut self) -> RS10_W { RS10_W::new(self, 8) } #[doc = "Bits 12:15 - Request Source for Line 11"] #[inline(always)] - #[must_use] pub fn rs11(&mut self) -> RS11_W { RS11_W::new(self, 12) } diff --git a/src/dsd/cgcfg.rs b/src/dsd/cgcfg.rs index ef275155..f48da931 100644 --- a/src/dsd/cgcfg.rs +++ b/src/dsd/cgcfg.rs @@ -483,25 +483,21 @@ impl R { impl W { #[doc = "Bits 0:1 - Carrier Generator Operating Mode"] #[inline(always)] - #[must_use] pub fn cgmod(&mut self) -> CGMOD_W { CGMOD_W::new(self, 0) } #[doc = "Bit 2 - Bit-Reverse PWM Generation"] #[inline(always)] - #[must_use] pub fn brev(&mut self) -> BREV_W { BREV_W::new(self, 2) } #[doc = "Bit 3 - Signal Polarity"] #[inline(always)] - #[must_use] pub fn sigpol(&mut self) -> SIGPOL_W { SIGPOL_W::new(self, 3) } #[doc = "Bits 4:7 - Divider Factor for the PWM Pattern Signal Generator"] #[inline(always)] - #[must_use] pub fn divcg(&mut self) -> DIVCG_W { DIVCG_W::new(self, 4) } diff --git a/src/dsd/clc.rs b/src/dsd/clc.rs index e1613540..19cf2cea 100644 --- a/src/dsd/clc.rs +++ b/src/dsd/clc.rs @@ -164,13 +164,11 @@ impl R { impl W { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] - #[must_use] pub fn disr(&mut self) -> DISR_W { DISR_W::new(self, 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] - #[must_use] pub fn edis(&mut self) -> EDIS_W { EDIS_W::new(self, 3) } diff --git a/src/dsd/evflag.rs b/src/dsd/evflag.rs index 774e181d..a860c83f 100644 --- a/src/dsd/evflag.rs +++ b/src/dsd/evflag.rs @@ -471,49 +471,41 @@ impl R { impl W { #[doc = "Bit 0 - Result Event"] #[inline(always)] - #[must_use] pub fn resev0(&mut self) -> RESEV0_W { RESEV0_W::new(self, 0) } #[doc = "Bit 1 - Result Event"] #[inline(always)] - #[must_use] pub fn resev1(&mut self) -> RESEV1_W { RESEV1_W::new(self, 1) } #[doc = "Bit 2 - Result Event"] #[inline(always)] - #[must_use] pub fn resev2(&mut self) -> RESEV2_W { RESEV2_W::new(self, 2) } #[doc = "Bit 3 - Result Event"] #[inline(always)] - #[must_use] pub fn resev3(&mut self) -> RESEV3_W { RESEV3_W::new(self, 3) } #[doc = "Bit 16 - Alarm Event"] #[inline(always)] - #[must_use] pub fn alev0(&mut self) -> ALEV0_W { ALEV0_W::new(self, 16) } #[doc = "Bit 17 - Alarm Event"] #[inline(always)] - #[must_use] pub fn alev1(&mut self) -> ALEV1_W { ALEV1_W::new(self, 17) } #[doc = "Bit 18 - Alarm Event"] #[inline(always)] - #[must_use] pub fn alev2(&mut self) -> ALEV2_W { ALEV2_W::new(self, 18) } #[doc = "Bit 19 - Alarm Event"] #[inline(always)] - #[must_use] pub fn alev3(&mut self) -> ALEV3_W { ALEV3_W::new(self, 19) } diff --git a/src/dsd/evflagclr.rs b/src/dsd/evflagclr.rs index 67d99f95..cfed1d8a 100644 --- a/src/dsd/evflagclr.rs +++ b/src/dsd/evflagclr.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - Result Event Clear"] #[inline(always)] - #[must_use] pub fn resec0(&mut self) -> RESEC0_W { RESEC0_W::new(self, 0) } #[doc = "Bit 1 - Result Event Clear"] #[inline(always)] - #[must_use] pub fn resec1(&mut self) -> RESEC1_W { RESEC1_W::new(self, 1) } #[doc = "Bit 2 - Result Event Clear"] #[inline(always)] - #[must_use] pub fn resec2(&mut self) -> RESEC2_W { RESEC2_W::new(self, 2) } #[doc = "Bit 3 - Result Event Clear"] #[inline(always)] - #[must_use] pub fn resec3(&mut self) -> RESEC3_W { RESEC3_W::new(self, 3) } #[doc = "Bit 16 - Alarm Event Clear"] #[inline(always)] - #[must_use] pub fn alec0(&mut self) -> ALEC0_W { ALEC0_W::new(self, 16) } #[doc = "Bit 17 - Alarm Event Clear"] #[inline(always)] - #[must_use] pub fn alec1(&mut self) -> ALEC1_W { ALEC1_W::new(self, 17) } #[doc = "Bit 18 - Alarm Event Clear"] #[inline(always)] - #[must_use] pub fn alec2(&mut self) -> ALEC2_W { ALEC2_W::new(self, 18) } #[doc = "Bit 19 - Alarm Event Clear"] #[inline(always)] - #[must_use] pub fn alec3(&mut self) -> ALEC3_W { ALEC3_W::new(self, 19) } diff --git a/src/dsd/globcfg.rs b/src/dsd/globcfg.rs index 2626ed4f..5755e01d 100644 --- a/src/dsd/globcfg.rs +++ b/src/dsd/globcfg.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:2 - Modulator Clock Select"] #[inline(always)] - #[must_use] pub fn mcsel(&mut self) -> MCSEL_W { MCSEL_W::new(self, 0) } diff --git a/src/dsd/globrc.rs b/src/dsd/globrc.rs index 15f251db..b99c660d 100644 --- a/src/dsd/globrc.rs +++ b/src/dsd/globrc.rs @@ -239,25 +239,21 @@ impl R { impl W { #[doc = "Bit 0 - Channel 0 Run Control"] #[inline(always)] - #[must_use] pub fn ch0run(&mut self) -> CH0RUN_W { CH0RUN_W::new(self, 0) } #[doc = "Bit 1 - Channel 1 Run Control"] #[inline(always)] - #[must_use] pub fn ch1run(&mut self) -> CH1RUN_W { CH1RUN_W::new(self, 1) } #[doc = "Bit 2 - Channel 2 Run Control"] #[inline(always)] - #[must_use] pub fn ch2run(&mut self) -> CH2RUN_W { CH2RUN_W::new(self, 2) } #[doc = "Bit 3 - Channel 3 Run Control"] #[inline(always)] - #[must_use] pub fn ch3run(&mut self) -> CH3RUN_W { CH3RUN_W::new(self, 3) } diff --git a/src/dsd/ocs.rs b/src/dsd/ocs.rs index b46b35ea..23587afa 100644 --- a/src/dsd/ocs.rs +++ b/src/dsd/ocs.rs @@ -154,13 +154,11 @@ impl R { impl W { #[doc = "Bits 24:27 - OCDS Suspend Control"] #[inline(always)] - #[must_use] pub fn sus(&mut self) -> SUS_W { SUS_W::new(self, 24) } #[doc = "Bit 28 - SUS Write Protection"] #[inline(always)] - #[must_use] pub fn sus_p(&mut self) -> SUS_P_W { SUS_P_W::new(self, 28) } diff --git a/src/dsd_ch0/boundsel.rs b/src/dsd_ch0/boundsel.rs index e13ccd43..cd5e66d5 100644 --- a/src/dsd_ch0/boundsel.rs +++ b/src/dsd_ch0/boundsel.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:15 - Lower Boundary Value for Limit Checking"] #[inline(always)] - #[must_use] pub fn boundaryl(&mut self) -> BOUNDARYL_W { BOUNDARYL_W::new(self, 0) } #[doc = "Bits 16:31 - Upper Boundary Value for Limit Checking"] #[inline(always)] - #[must_use] pub fn boundaryu(&mut self) -> BOUNDARYU_W { BOUNDARYU_W::new(self, 16) } diff --git a/src/dsd_ch0/cgsync.rs b/src/dsd_ch0/cgsync.rs index 4f1ecd9a..66562c35 100644 --- a/src/dsd_ch0/cgsync.rs +++ b/src/dsd_ch0/cgsync.rs @@ -39,13 +39,11 @@ impl R { impl W { #[doc = "Bits 16:23 - Sign Delay Value for Positive Halfwave"] #[inline(always)] - #[must_use] pub fn sdpos(&mut self) -> SDPOS_W { SDPOS_W::new(self, 16) } #[doc = "Bits 24:31 - Sign Delay Value for Negative Halfwave"] #[inline(always)] - #[must_use] pub fn sdneg(&mut self) -> SDNEG_W { SDNEG_W::new(self, 24) } diff --git a/src/dsd_ch0/dicfg.rs b/src/dsd_ch0/dicfg.rs index 002a2da7..a4c978a7 100644 --- a/src/dsd_ch0/dicfg.rs +++ b/src/dsd_ch0/dicfg.rs @@ -616,55 +616,46 @@ impl R { impl W { #[doc = "Bits 0:3 - Input Data Source Select"] #[inline(always)] - #[must_use] pub fn dsrc(&mut self) -> DSRC_W { DSRC_W::new(self, 0) } #[doc = "Bit 7 - Write Control for Data Selection"] #[inline(always)] - #[must_use] pub fn dswc(&mut self) -> DSWC_W { DSWC_W::new(self, 7) } #[doc = "Bits 8:9 - Integrator Trigger Mode"] #[inline(always)] - #[must_use] pub fn itrmode(&mut self) -> ITRMODE_W { ITRMODE_W::new(self, 8) } #[doc = "Bits 10:11 - Timestamp Trigger Mode"] #[inline(always)] - #[must_use] pub fn tstrmode(&mut self) -> TSTRMODE_W { TSTRMODE_W::new(self, 10) } #[doc = "Bits 12:14 - Trigger Select"] #[inline(always)] - #[must_use] pub fn trsel(&mut self) -> TRSEL_W { TRSEL_W::new(self, 12) } #[doc = "Bit 15 - Write Control for Trigger Parameters"] #[inline(always)] - #[must_use] pub fn trwc(&mut self) -> TRWC_W { TRWC_W::new(self, 15) } #[doc = "Bits 16:19 - Sample Clock Source Select"] #[inline(always)] - #[must_use] pub fn csrc(&mut self) -> CSRC_W { CSRC_W::new(self, 16) } #[doc = "Bits 20:23 - Data Strobe Generatoion Mode"] #[inline(always)] - #[must_use] pub fn strobe(&mut self) -> STROBE_W { STROBE_W::new(self, 20) } #[doc = "Bit 31 - Write Control for Strobe/Clock Selection"] #[inline(always)] - #[must_use] pub fn scwc(&mut self) -> SCWC_W { SCWC_W::new(self, 31) } diff --git a/src/dsd_ch0/fcfga.rs b/src/dsd_ch0/fcfga.rs index 6098a562..2f7572a7 100644 --- a/src/dsd_ch0/fcfga.rs +++ b/src/dsd_ch0/fcfga.rs @@ -328,31 +328,26 @@ impl R { impl W { #[doc = "Bits 0:7 - CIC Filter (Auxiliary) Decimation Factor"] #[inline(always)] - #[must_use] pub fn cfadf(&mut self) -> CFADF_W { CFADF_W::new(self, 0) } #[doc = "Bits 8:9 - CIC Filter (Auxiliary) Configuration"] #[inline(always)] - #[must_use] pub fn cfac(&mut self) -> CFAC_W { CFAC_W::new(self, 8) } #[doc = "Bits 10:11 - Service Request Generation Auxiliary Filter"] #[inline(always)] - #[must_use] pub fn srga(&mut self) -> SRGA_W { SRGA_W::new(self, 10) } #[doc = "Bits 12:13 - Event Select"] #[inline(always)] - #[must_use] pub fn esel(&mut self) -> ESEL_W { ESEL_W::new(self, 12) } #[doc = "Bit 14 - Event Gating"] #[inline(always)] - #[must_use] pub fn egt(&mut self) -> EGT_W { EGT_W::new(self, 14) } diff --git a/src/dsd_ch0/fcfgc.rs b/src/dsd_ch0/fcfgc.rs index bb3bab6a..5a484585 100644 --- a/src/dsd_ch0/fcfgc.rs +++ b/src/dsd_ch0/fcfgc.rs @@ -246,31 +246,26 @@ impl R { impl W { #[doc = "Bits 0:7 - CIC Filter (Main Chain) Decimation Factor"] #[inline(always)] - #[must_use] pub fn cfmdf(&mut self) -> CFMDF_W { CFMDF_W::new(self, 0) } #[doc = "Bits 8:9 - CIC Filter (Main Chain) Configuration"] #[inline(always)] - #[must_use] pub fn cfmc(&mut self) -> CFMC_W { CFMC_W::new(self, 8) } #[doc = "Bit 10 - CIC Filter Enable"] #[inline(always)] - #[must_use] pub fn cfen(&mut self) -> CFEN_W { CFEN_W::new(self, 10) } #[doc = "Bits 14:15 - Service Request Generation Main Chain"] #[inline(always)] - #[must_use] pub fn srgm(&mut self) -> SRGM_W { SRGM_W::new(self, 14) } #[doc = "Bits 16:23 - CIC Filter (Main Chain) Start Value"] #[inline(always)] - #[must_use] pub fn cfmsv(&mut self) -> CFMSV_W { CFMSV_W::new(self, 16) } diff --git a/src/dsd_ch0/iwctr.rs b/src/dsd_ch0/iwctr.rs index 2721a5b4..1d67bd9b 100644 --- a/src/dsd_ch0/iwctr.rs +++ b/src/dsd_ch0/iwctr.rs @@ -147,25 +147,21 @@ impl R { impl W { #[doc = "Bits 12:15 - Number of Integration Cycles"] #[inline(always)] - #[must_use] pub fn repval(&mut self) -> REPVAL_W { REPVAL_W::new(self, 12) } #[doc = "Bits 16:21 - Number of Values Discarded"] #[inline(always)] - #[must_use] pub fn nvaldis(&mut self) -> NVALDIS_W { NVALDIS_W::new(self, 16) } #[doc = "Bit 23 - Integration Window SIze"] #[inline(always)] - #[must_use] pub fn iws(&mut self) -> IWS_W { IWS_W::new(self, 23) } #[doc = "Bits 24:29 - Number of Values Integrated"] #[inline(always)] - #[must_use] pub fn nvalint(&mut self) -> NVALINT_W { NVALINT_W::new(self, 24) } diff --git a/src/dsd_ch0/modcfg.rs b/src/dsd_ch0/modcfg.rs index 12e4f6f0..20883255 100644 --- a/src/dsd_ch0/modcfg.rs +++ b/src/dsd_ch0/modcfg.rs @@ -129,13 +129,11 @@ impl R { impl W { #[doc = "Bits 16:19 - Divider Factor for Modulator Clock"] #[inline(always)] - #[must_use] pub fn divm(&mut self) -> DIVM_W { DIVM_W::new(self, 16) } #[doc = "Bit 23 - Write Control for Divider Factor"] #[inline(always)] - #[must_use] pub fn dwc(&mut self) -> DWC_W { DWC_W::new(self, 23) } diff --git a/src/dsd_ch0/offm.rs b/src/dsd_ch0/offm.rs index 3ba5aad4..abef8299 100644 --- a/src/dsd_ch0/offm.rs +++ b/src/dsd_ch0/offm.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Offset Value"] #[inline(always)] - #[must_use] pub fn offset(&mut self) -> OFFSET_W { OFFSET_W::new(self, 0) } diff --git a/src/dsd_ch0/rectcfg.rs b/src/dsd_ch0/rectcfg.rs index 933ea998..a93ba18b 100644 --- a/src/dsd_ch0/rectcfg.rs +++ b/src/dsd_ch0/rectcfg.rs @@ -279,13 +279,11 @@ impl R { impl W { #[doc = "Bit 0 - Rectification Enable"] #[inline(always)] - #[must_use] pub fn rfen(&mut self) -> RFEN_W { RFEN_W::new(self, 0) } #[doc = "Bits 4:5 - Sign Source"] #[inline(always)] - #[must_use] pub fn ssrc(&mut self) -> SSRC_W { SSRC_W::new(self, 4) } diff --git a/src/ebu/addrsel0.rs b/src/ebu/addrsel0.rs index b82e2ff1..e5e685d0 100644 --- a/src/ebu/addrsel0.rs +++ b/src/ebu/addrsel0.rs @@ -181,19 +181,16 @@ impl R { impl W { #[doc = "Bit 0 - Memory Region Enable"] #[inline(always)] - #[must_use] pub fn regenab(&mut self) -> REGENAB_W { REGENAB_W::new(self, 0) } #[doc = "Bit 1 - Alternate Region Enable"] #[inline(always)] - #[must_use] pub fn altenab(&mut self) -> ALTENAB_W { ALTENAB_W::new(self, 1) } #[doc = "Bit 2 - Memory Region Write Protect"] #[inline(always)] - #[must_use] pub fn wprot(&mut self) -> WPROT_W { WPROT_W::new(self, 2) } diff --git a/src/ebu/addrsel1.rs b/src/ebu/addrsel1.rs index b407b348..2e853034 100644 --- a/src/ebu/addrsel1.rs +++ b/src/ebu/addrsel1.rs @@ -181,19 +181,16 @@ impl R { impl W { #[doc = "Bit 0 - Memory Region Enable"] #[inline(always)] - #[must_use] pub fn regenab(&mut self) -> REGENAB_W { REGENAB_W::new(self, 0) } #[doc = "Bit 1 - Alternate Region Enable"] #[inline(always)] - #[must_use] pub fn altenab(&mut self) -> ALTENAB_W { ALTENAB_W::new(self, 1) } #[doc = "Bit 2 - Memory Region Write Protect"] #[inline(always)] - #[must_use] pub fn wprot(&mut self) -> WPROT_W { WPROT_W::new(self, 2) } diff --git a/src/ebu/addrsel2.rs b/src/ebu/addrsel2.rs index d149b4cd..a1c1c218 100644 --- a/src/ebu/addrsel2.rs +++ b/src/ebu/addrsel2.rs @@ -181,19 +181,16 @@ impl R { impl W { #[doc = "Bit 0 - Memory Region Enable"] #[inline(always)] - #[must_use] pub fn regenab(&mut self) -> REGENAB_W { REGENAB_W::new(self, 0) } #[doc = "Bit 1 - Alternate Region Enable"] #[inline(always)] - #[must_use] pub fn altenab(&mut self) -> ALTENAB_W { ALTENAB_W::new(self, 1) } #[doc = "Bit 2 - Memory Region Write Protect"] #[inline(always)] - #[must_use] pub fn wprot(&mut self) -> WPROT_W { WPROT_W::new(self, 2) } diff --git a/src/ebu/addrsel3.rs b/src/ebu/addrsel3.rs index c0ad9ce7..7a8e44f7 100644 --- a/src/ebu/addrsel3.rs +++ b/src/ebu/addrsel3.rs @@ -181,19 +181,16 @@ impl R { impl W { #[doc = "Bit 0 - Memory Region Enable"] #[inline(always)] - #[must_use] pub fn regenab(&mut self) -> REGENAB_W { REGENAB_W::new(self, 0) } #[doc = "Bit 1 - Alternate Region Enable"] #[inline(always)] - #[must_use] pub fn altenab(&mut self) -> ALTENAB_W { ALTENAB_W::new(self, 1) } #[doc = "Bit 2 - Memory Region Write Protect"] #[inline(always)] - #[must_use] pub fn wprot(&mut self) -> WPROT_W { WPROT_W::new(self, 2) } diff --git a/src/ebu/busrap0.rs b/src/ebu/busrap0.rs index 5d7fcc51..b6953467 100644 --- a/src/ebu/busrap0.rs +++ b/src/ebu/busrap0.rs @@ -757,55 +757,46 @@ impl R { impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - #[must_use] pub fn rddtacs(&mut self) -> RDDTACS_W { RDDTACS_W::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"] #[inline(always)] - #[must_use] pub fn rdrecovc(&mut self) -> RDRECOVC_W { RDRECOVC_W::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for read accesses"] #[inline(always)] - #[must_use] pub fn waitrdc(&mut self) -> WAITRDC_W { WAITRDC_W::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"] #[inline(always)] - #[must_use] pub fn datac(&mut self) -> DATAC_W { DATAC_W::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - #[must_use] pub fn extclock(&mut self) -> EXTCLOCK_W { EXTCLOCK_W::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - #[must_use] pub fn extdata(&mut self) -> EXTDATA_W { EXTDATA_W::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - #[must_use] pub fn cmddelay(&mut self) -> CMDDELAY_W { CMDDELAY_W::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - #[must_use] pub fn aholdc(&mut self) -> AHOLDC_W { AHOLDC_W::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - #[must_use] pub fn addrc(&mut self) -> ADDRC_W { ADDRC_W::new(self, 28) } diff --git a/src/ebu/busrap1.rs b/src/ebu/busrap1.rs index 2251e60e..958579fb 100644 --- a/src/ebu/busrap1.rs +++ b/src/ebu/busrap1.rs @@ -757,55 +757,46 @@ impl R { impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - #[must_use] pub fn rddtacs(&mut self) -> RDDTACS_W { RDDTACS_W::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"] #[inline(always)] - #[must_use] pub fn rdrecovc(&mut self) -> RDRECOVC_W { RDRECOVC_W::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for read accesses"] #[inline(always)] - #[must_use] pub fn waitrdc(&mut self) -> WAITRDC_W { WAITRDC_W::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"] #[inline(always)] - #[must_use] pub fn datac(&mut self) -> DATAC_W { DATAC_W::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - #[must_use] pub fn extclock(&mut self) -> EXTCLOCK_W { EXTCLOCK_W::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - #[must_use] pub fn extdata(&mut self) -> EXTDATA_W { EXTDATA_W::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - #[must_use] pub fn cmddelay(&mut self) -> CMDDELAY_W { CMDDELAY_W::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - #[must_use] pub fn aholdc(&mut self) -> AHOLDC_W { AHOLDC_W::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - #[must_use] pub fn addrc(&mut self) -> ADDRC_W { ADDRC_W::new(self, 28) } diff --git a/src/ebu/busrap2.rs b/src/ebu/busrap2.rs index f9316ca5..1569ec24 100644 --- a/src/ebu/busrap2.rs +++ b/src/ebu/busrap2.rs @@ -757,55 +757,46 @@ impl R { impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - #[must_use] pub fn rddtacs(&mut self) -> RDDTACS_W { RDDTACS_W::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"] #[inline(always)] - #[must_use] pub fn rdrecovc(&mut self) -> RDRECOVC_W { RDRECOVC_W::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for read accesses"] #[inline(always)] - #[must_use] pub fn waitrdc(&mut self) -> WAITRDC_W { WAITRDC_W::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"] #[inline(always)] - #[must_use] pub fn datac(&mut self) -> DATAC_W { DATAC_W::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - #[must_use] pub fn extclock(&mut self) -> EXTCLOCK_W { EXTCLOCK_W::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - #[must_use] pub fn extdata(&mut self) -> EXTDATA_W { EXTDATA_W::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - #[must_use] pub fn cmddelay(&mut self) -> CMDDELAY_W { CMDDELAY_W::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - #[must_use] pub fn aholdc(&mut self) -> AHOLDC_W { AHOLDC_W::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - #[must_use] pub fn addrc(&mut self) -> ADDRC_W { ADDRC_W::new(self, 28) } diff --git a/src/ebu/busrap3.rs b/src/ebu/busrap3.rs index 95fc256c..a79a4fe5 100644 --- a/src/ebu/busrap3.rs +++ b/src/ebu/busrap3.rs @@ -757,55 +757,46 @@ impl R { impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - #[must_use] pub fn rddtacs(&mut self) -> RDDTACS_W { RDDTACS_W::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Read Accesses"] #[inline(always)] - #[must_use] pub fn rdrecovc(&mut self) -> RDRECOVC_W { RDRECOVC_W::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for read accesses"] #[inline(always)] - #[must_use] pub fn waitrdc(&mut self) -> WAITRDC_W { WAITRDC_W::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Read Accesses"] #[inline(always)] - #[must_use] pub fn datac(&mut self) -> DATAC_W { DATAC_W::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - #[must_use] pub fn extclock(&mut self) -> EXTCLOCK_W { EXTCLOCK_W::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - #[must_use] pub fn extdata(&mut self) -> EXTDATA_W { EXTDATA_W::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - #[must_use] pub fn cmddelay(&mut self) -> CMDDELAY_W { CMDDELAY_W::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - #[must_use] pub fn aholdc(&mut self) -> AHOLDC_W { AHOLDC_W::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - #[must_use] pub fn addrc(&mut self) -> ADDRC_W { ADDRC_W::new(self, 28) } diff --git a/src/ebu/busrcon0.rs b/src/ebu/busrcon0.rs index e6c359b5..4a828660 100644 --- a/src/ebu/busrcon0.rs +++ b/src/ebu/busrcon0.rs @@ -734,91 +734,76 @@ impl R { impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn fetblen(&mut self) -> FETBLEN_W { FETBLEN_W::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - #[must_use] pub fn fbbmsel(&mut self) -> FBBMSEL_W { FBBMSEL_W::new(self, 3) } #[doc = "Bit 4 - Read Single Stage Synchronization:"] #[inline(always)] - #[must_use] pub fn bfsss(&mut self) -> BFSSS_W { BFSSS_W::new(self, 4) } #[doc = "Bit 5 - Burst FLASH Clock Feedback Enable"] #[inline(always)] - #[must_use] pub fn fdbken(&mut self) -> FDBKEN_W { FDBKEN_W::new(self, 5) } #[doc = "Bit 6 - Burst Flash Clock Mode Select"] #[inline(always)] - #[must_use] pub fn bfcmsel(&mut self) -> BFCMSEL_W { BFCMSEL_W::new(self, 6) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] - #[must_use] pub fn naa(&mut self) -> NAA_W { NAA_W::new(self, 7) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ecse(&mut self) -> ECSE_W { ECSE_W::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ebse(&mut self) -> EBSE_W { EBSE_W::new(self, 17) } #[doc = "Bit 18 - Disable Burst Address Wrapping"] #[inline(always)] - #[must_use] pub fn dba(&mut self) -> DBA_W { DBA_W::new(self, 18) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - #[must_use] pub fn waitinv(&mut self) -> WAITINV_W { WAITINV_W::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - #[must_use] pub fn bcgen(&mut self) -> BCGEN_W { BCGEN_W::new(self, 20) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] - #[must_use] pub fn portw(&mut self) -> PORTW_W { PORTW_W::new(self, 22) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - #[must_use] pub fn wait(&mut self) -> WAIT_W { WAIT_W::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - #[must_use] pub fn aap(&mut self) -> AAP_W { AAP_W::new(self, 26) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - #[must_use] pub fn agen(&mut self) -> AGEN_W { AGEN_W::new(self, 28) } diff --git a/src/ebu/busrcon1.rs b/src/ebu/busrcon1.rs index 47122ec0..fb332241 100644 --- a/src/ebu/busrcon1.rs +++ b/src/ebu/busrcon1.rs @@ -734,91 +734,76 @@ impl R { impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn fetblen(&mut self) -> FETBLEN_W { FETBLEN_W::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - #[must_use] pub fn fbbmsel(&mut self) -> FBBMSEL_W { FBBMSEL_W::new(self, 3) } #[doc = "Bit 4 - Read Single Stage Synchronization:"] #[inline(always)] - #[must_use] pub fn bfsss(&mut self) -> BFSSS_W { BFSSS_W::new(self, 4) } #[doc = "Bit 5 - Burst FLASH Clock Feedback Enable"] #[inline(always)] - #[must_use] pub fn fdbken(&mut self) -> FDBKEN_W { FDBKEN_W::new(self, 5) } #[doc = "Bit 6 - Burst Flash Clock Mode Select"] #[inline(always)] - #[must_use] pub fn bfcmsel(&mut self) -> BFCMSEL_W { BFCMSEL_W::new(self, 6) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] - #[must_use] pub fn naa(&mut self) -> NAA_W { NAA_W::new(self, 7) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ecse(&mut self) -> ECSE_W { ECSE_W::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ebse(&mut self) -> EBSE_W { EBSE_W::new(self, 17) } #[doc = "Bit 18 - Disable Burst Address Wrapping"] #[inline(always)] - #[must_use] pub fn dba(&mut self) -> DBA_W { DBA_W::new(self, 18) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - #[must_use] pub fn waitinv(&mut self) -> WAITINV_W { WAITINV_W::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - #[must_use] pub fn bcgen(&mut self) -> BCGEN_W { BCGEN_W::new(self, 20) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] - #[must_use] pub fn portw(&mut self) -> PORTW_W { PORTW_W::new(self, 22) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - #[must_use] pub fn wait(&mut self) -> WAIT_W { WAIT_W::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - #[must_use] pub fn aap(&mut self) -> AAP_W { AAP_W::new(self, 26) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - #[must_use] pub fn agen(&mut self) -> AGEN_W { AGEN_W::new(self, 28) } diff --git a/src/ebu/busrcon2.rs b/src/ebu/busrcon2.rs index a1693aa2..054b4c9b 100644 --- a/src/ebu/busrcon2.rs +++ b/src/ebu/busrcon2.rs @@ -734,91 +734,76 @@ impl R { impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn fetblen(&mut self) -> FETBLEN_W { FETBLEN_W::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - #[must_use] pub fn fbbmsel(&mut self) -> FBBMSEL_W { FBBMSEL_W::new(self, 3) } #[doc = "Bit 4 - Read Single Stage Synchronization:"] #[inline(always)] - #[must_use] pub fn bfsss(&mut self) -> BFSSS_W { BFSSS_W::new(self, 4) } #[doc = "Bit 5 - Burst FLASH Clock Feedback Enable"] #[inline(always)] - #[must_use] pub fn fdbken(&mut self) -> FDBKEN_W { FDBKEN_W::new(self, 5) } #[doc = "Bit 6 - Burst Flash Clock Mode Select"] #[inline(always)] - #[must_use] pub fn bfcmsel(&mut self) -> BFCMSEL_W { BFCMSEL_W::new(self, 6) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] - #[must_use] pub fn naa(&mut self) -> NAA_W { NAA_W::new(self, 7) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ecse(&mut self) -> ECSE_W { ECSE_W::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ebse(&mut self) -> EBSE_W { EBSE_W::new(self, 17) } #[doc = "Bit 18 - Disable Burst Address Wrapping"] #[inline(always)] - #[must_use] pub fn dba(&mut self) -> DBA_W { DBA_W::new(self, 18) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - #[must_use] pub fn waitinv(&mut self) -> WAITINV_W { WAITINV_W::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - #[must_use] pub fn bcgen(&mut self) -> BCGEN_W { BCGEN_W::new(self, 20) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] - #[must_use] pub fn portw(&mut self) -> PORTW_W { PORTW_W::new(self, 22) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - #[must_use] pub fn wait(&mut self) -> WAIT_W { WAIT_W::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - #[must_use] pub fn aap(&mut self) -> AAP_W { AAP_W::new(self, 26) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - #[must_use] pub fn agen(&mut self) -> AGEN_W { AGEN_W::new(self, 28) } diff --git a/src/ebu/busrcon3.rs b/src/ebu/busrcon3.rs index 9e326c87..87ee9247 100644 --- a/src/ebu/busrcon3.rs +++ b/src/ebu/busrcon3.rs @@ -734,91 +734,76 @@ impl R { impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn fetblen(&mut self) -> FETBLEN_W { FETBLEN_W::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - #[must_use] pub fn fbbmsel(&mut self) -> FBBMSEL_W { FBBMSEL_W::new(self, 3) } #[doc = "Bit 4 - Read Single Stage Synchronization:"] #[inline(always)] - #[must_use] pub fn bfsss(&mut self) -> BFSSS_W { BFSSS_W::new(self, 4) } #[doc = "Bit 5 - Burst FLASH Clock Feedback Enable"] #[inline(always)] - #[must_use] pub fn fdbken(&mut self) -> FDBKEN_W { FDBKEN_W::new(self, 5) } #[doc = "Bit 6 - Burst Flash Clock Mode Select"] #[inline(always)] - #[must_use] pub fn bfcmsel(&mut self) -> BFCMSEL_W { BFCMSEL_W::new(self, 6) } #[doc = "Bit 7 - Enable flash non-array access workaround"] #[inline(always)] - #[must_use] pub fn naa(&mut self) -> NAA_W { NAA_W::new(self, 7) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ecse(&mut self) -> ECSE_W { ECSE_W::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ebse(&mut self) -> EBSE_W { EBSE_W::new(self, 17) } #[doc = "Bit 18 - Disable Burst Address Wrapping"] #[inline(always)] - #[must_use] pub fn dba(&mut self) -> DBA_W { DBA_W::new(self, 18) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - #[must_use] pub fn waitinv(&mut self) -> WAITINV_W { WAITINV_W::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - #[must_use] pub fn bcgen(&mut self) -> BCGEN_W { BCGEN_W::new(self, 20) } #[doc = "Bits 22:23 - Device Addressing Mode"] #[inline(always)] - #[must_use] pub fn portw(&mut self) -> PORTW_W { PORTW_W::new(self, 22) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - #[must_use] pub fn wait(&mut self) -> WAIT_W { WAIT_W::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - #[must_use] pub fn aap(&mut self) -> AAP_W { AAP_W::new(self, 26) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - #[must_use] pub fn agen(&mut self) -> AGEN_W { AGEN_W::new(self, 28) } diff --git a/src/ebu/buswap0.rs b/src/ebu/buswap0.rs index c636b63b..0561662f 100644 --- a/src/ebu/buswap0.rs +++ b/src/ebu/buswap0.rs @@ -839,55 +839,46 @@ impl R { impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - #[must_use] pub fn wrdtacs(&mut self) -> WRDTACS_W { WRDTACS_W::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Write Accesses"] #[inline(always)] - #[must_use] pub fn wrrecovc(&mut self) -> WRRECOVC_W { WRRECOVC_W::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for write accesses"] #[inline(always)] - #[must_use] pub fn waitwrc(&mut self) -> WAITWRC_W { WAITWRC_W::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Write Accesses"] #[inline(always)] - #[must_use] pub fn datac(&mut self) -> DATAC_W { DATAC_W::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - #[must_use] pub fn extclock(&mut self) -> EXTCLOCK_W { EXTCLOCK_W::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - #[must_use] pub fn extdata(&mut self) -> EXTDATA_W { EXTDATA_W::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - #[must_use] pub fn cmddelay(&mut self) -> CMDDELAY_W { CMDDELAY_W::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - #[must_use] pub fn aholdc(&mut self) -> AHOLDC_W { AHOLDC_W::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - #[must_use] pub fn addrc(&mut self) -> ADDRC_W { ADDRC_W::new(self, 28) } diff --git a/src/ebu/buswap1.rs b/src/ebu/buswap1.rs index 07601e2e..7e02e3c6 100644 --- a/src/ebu/buswap1.rs +++ b/src/ebu/buswap1.rs @@ -839,55 +839,46 @@ impl R { impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - #[must_use] pub fn wrdtacs(&mut self) -> WRDTACS_W { WRDTACS_W::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Write Accesses"] #[inline(always)] - #[must_use] pub fn wrrecovc(&mut self) -> WRRECOVC_W { WRRECOVC_W::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for write accesses"] #[inline(always)] - #[must_use] pub fn waitwrc(&mut self) -> WAITWRC_W { WAITWRC_W::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Write Accesses"] #[inline(always)] - #[must_use] pub fn datac(&mut self) -> DATAC_W { DATAC_W::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - #[must_use] pub fn extclock(&mut self) -> EXTCLOCK_W { EXTCLOCK_W::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - #[must_use] pub fn extdata(&mut self) -> EXTDATA_W { EXTDATA_W::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - #[must_use] pub fn cmddelay(&mut self) -> CMDDELAY_W { CMDDELAY_W::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - #[must_use] pub fn aholdc(&mut self) -> AHOLDC_W { AHOLDC_W::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - #[must_use] pub fn addrc(&mut self) -> ADDRC_W { ADDRC_W::new(self, 28) } diff --git a/src/ebu/buswap2.rs b/src/ebu/buswap2.rs index 834ab7b4..ea9f2b14 100644 --- a/src/ebu/buswap2.rs +++ b/src/ebu/buswap2.rs @@ -839,55 +839,46 @@ impl R { impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - #[must_use] pub fn wrdtacs(&mut self) -> WRDTACS_W { WRDTACS_W::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Write Accesses"] #[inline(always)] - #[must_use] pub fn wrrecovc(&mut self) -> WRRECOVC_W { WRRECOVC_W::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for write accesses"] #[inline(always)] - #[must_use] pub fn waitwrc(&mut self) -> WAITWRC_W { WAITWRC_W::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Write Accesses"] #[inline(always)] - #[must_use] pub fn datac(&mut self) -> DATAC_W { DATAC_W::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - #[must_use] pub fn extclock(&mut self) -> EXTCLOCK_W { EXTCLOCK_W::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - #[must_use] pub fn extdata(&mut self) -> EXTDATA_W { EXTDATA_W::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - #[must_use] pub fn cmddelay(&mut self) -> CMDDELAY_W { CMDDELAY_W::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - #[must_use] pub fn aholdc(&mut self) -> AHOLDC_W { AHOLDC_W::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - #[must_use] pub fn addrc(&mut self) -> ADDRC_W { ADDRC_W::new(self, 28) } diff --git a/src/ebu/buswap3.rs b/src/ebu/buswap3.rs index 31cebfea..476c09a5 100644 --- a/src/ebu/buswap3.rs +++ b/src/ebu/buswap3.rs @@ -839,55 +839,46 @@ impl R { impl W { #[doc = "Bits 0:3 - Recovery Cycles between Different Regions"] #[inline(always)] - #[must_use] pub fn wrdtacs(&mut self) -> WRDTACS_W { WRDTACS_W::new(self, 0) } #[doc = "Bits 4:6 - Recovery Cycles after Write Accesses"] #[inline(always)] - #[must_use] pub fn wrrecovc(&mut self) -> WRRECOVC_W { WRRECOVC_W::new(self, 4) } #[doc = "Bits 7:11 - Programmed Wait States for write accesses"] #[inline(always)] - #[must_use] pub fn waitwrc(&mut self) -> WAITWRC_W { WAITWRC_W::new(self, 7) } #[doc = "Bits 12:15 - Data Hold Cycles for Write Accesses"] #[inline(always)] - #[must_use] pub fn datac(&mut self) -> DATAC_W { DATAC_W::new(self, 12) } #[doc = "Bits 16:17 - Frequency of external clock at pin BFCLKO"] #[inline(always)] - #[must_use] pub fn extclock(&mut self) -> EXTCLOCK_W { EXTCLOCK_W::new(self, 16) } #[doc = "Bits 18:19 - Extended data"] #[inline(always)] - #[must_use] pub fn extdata(&mut self) -> EXTDATA_W { EXTDATA_W::new(self, 18) } #[doc = "Bits 20:23 - Command Delay Cycles"] #[inline(always)] - #[must_use] pub fn cmddelay(&mut self) -> CMDDELAY_W { CMDDELAY_W::new(self, 20) } #[doc = "Bits 24:27 - Address Hold Cycles"] #[inline(always)] - #[must_use] pub fn aholdc(&mut self) -> AHOLDC_W { AHOLDC_W::new(self, 24) } #[doc = "Bits 28:31 - Address Cycles"] #[inline(always)] - #[must_use] pub fn addrc(&mut self) -> ADDRC_W { ADDRC_W::new(self, 28) } diff --git a/src/ebu/buswcon0.rs b/src/ebu/buswcon0.rs index 67856e9c..af31056b 100644 --- a/src/ebu/buswcon0.rs +++ b/src/ebu/buswcon0.rs @@ -556,61 +556,51 @@ impl R { impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn fetblen(&mut self) -> FETBLEN_W { FETBLEN_W::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - #[must_use] pub fn fbbmsel(&mut self) -> FBBMSEL_W { FBBMSEL_W::new(self, 3) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ecse(&mut self) -> ECSE_W { ECSE_W::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ebse(&mut self) -> EBSE_W { EBSE_W::new(self, 17) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - #[must_use] pub fn waitinv(&mut self) -> WAITINV_W { WAITINV_W::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - #[must_use] pub fn bcgen(&mut self) -> BCGEN_W { BCGEN_W::new(self, 20) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - #[must_use] pub fn wait(&mut self) -> WAIT_W { WAIT_W::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - #[must_use] pub fn aap(&mut self) -> AAP_W { AAP_W::new(self, 26) } #[doc = "Bit 27 - Lock Chip Select"] #[inline(always)] - #[must_use] pub fn lockcs(&mut self) -> LOCKCS_W { LOCKCS_W::new(self, 27) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - #[must_use] pub fn agen(&mut self) -> AGEN_W { AGEN_W::new(self, 28) } diff --git a/src/ebu/buswcon1.rs b/src/ebu/buswcon1.rs index 498f5ad1..866856b7 100644 --- a/src/ebu/buswcon1.rs +++ b/src/ebu/buswcon1.rs @@ -556,61 +556,51 @@ impl R { impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn fetblen(&mut self) -> FETBLEN_W { FETBLEN_W::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - #[must_use] pub fn fbbmsel(&mut self) -> FBBMSEL_W { FBBMSEL_W::new(self, 3) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ecse(&mut self) -> ECSE_W { ECSE_W::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ebse(&mut self) -> EBSE_W { EBSE_W::new(self, 17) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - #[must_use] pub fn waitinv(&mut self) -> WAITINV_W { WAITINV_W::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - #[must_use] pub fn bcgen(&mut self) -> BCGEN_W { BCGEN_W::new(self, 20) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - #[must_use] pub fn wait(&mut self) -> WAIT_W { WAIT_W::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - #[must_use] pub fn aap(&mut self) -> AAP_W { AAP_W::new(self, 26) } #[doc = "Bit 27 - Lock Chip Select"] #[inline(always)] - #[must_use] pub fn lockcs(&mut self) -> LOCKCS_W { LOCKCS_W::new(self, 27) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - #[must_use] pub fn agen(&mut self) -> AGEN_W { AGEN_W::new(self, 28) } diff --git a/src/ebu/buswcon2.rs b/src/ebu/buswcon2.rs index e0c88c97..2d000928 100644 --- a/src/ebu/buswcon2.rs +++ b/src/ebu/buswcon2.rs @@ -556,61 +556,51 @@ impl R { impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn fetblen(&mut self) -> FETBLEN_W { FETBLEN_W::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - #[must_use] pub fn fbbmsel(&mut self) -> FBBMSEL_W { FBBMSEL_W::new(self, 3) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ecse(&mut self) -> ECSE_W { ECSE_W::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ebse(&mut self) -> EBSE_W { EBSE_W::new(self, 17) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - #[must_use] pub fn waitinv(&mut self) -> WAITINV_W { WAITINV_W::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - #[must_use] pub fn bcgen(&mut self) -> BCGEN_W { BCGEN_W::new(self, 20) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - #[must_use] pub fn wait(&mut self) -> WAIT_W { WAIT_W::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - #[must_use] pub fn aap(&mut self) -> AAP_W { AAP_W::new(self, 26) } #[doc = "Bit 27 - Lock Chip Select"] #[inline(always)] - #[must_use] pub fn lockcs(&mut self) -> LOCKCS_W { LOCKCS_W::new(self, 27) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - #[must_use] pub fn agen(&mut self) -> AGEN_W { AGEN_W::new(self, 28) } diff --git a/src/ebu/buswcon3.rs b/src/ebu/buswcon3.rs index b2cb1207..073ffcce 100644 --- a/src/ebu/buswcon3.rs +++ b/src/ebu/buswcon3.rs @@ -556,61 +556,51 @@ impl R { impl W { #[doc = "Bits 0:2 - Burst Length for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn fetblen(&mut self) -> FETBLEN_W { FETBLEN_W::new(self, 0) } #[doc = "Bit 3 - Synchronous burst buffer mode select"] #[inline(always)] - #[must_use] pub fn fbbmsel(&mut self) -> FBBMSEL_W { FBBMSEL_W::new(self, 3) } #[doc = "Bit 16 - Early Chip Select for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ecse(&mut self) -> ECSE_W { ECSE_W::new(self, 16) } #[doc = "Bit 17 - Early Burst Signal Enable for Synchronous Burst"] #[inline(always)] - #[must_use] pub fn ebse(&mut self) -> EBSE_W { EBSE_W::new(self, 17) } #[doc = "Bit 19 - Reversed polarity at WAIT"] #[inline(always)] - #[must_use] pub fn waitinv(&mut self) -> WAITINV_W { WAITINV_W::new(self, 19) } #[doc = "Bits 20:21 - Byte Control Signal Control"] #[inline(always)] - #[must_use] pub fn bcgen(&mut self) -> BCGEN_W { BCGEN_W::new(self, 20) } #[doc = "Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,"] #[inline(always)] - #[must_use] pub fn wait(&mut self) -> WAIT_W { WAIT_W::new(self, 24) } #[doc = "Bit 26 - Asynchronous Address phase:"] #[inline(always)] - #[must_use] pub fn aap(&mut self) -> AAP_W { AAP_W::new(self, 26) } #[doc = "Bit 27 - Lock Chip Select"] #[inline(always)] - #[must_use] pub fn lockcs(&mut self) -> LOCKCS_W { LOCKCS_W::new(self, 27) } #[doc = "Bits 28:31 - Device Type for Region"] #[inline(always)] - #[must_use] pub fn agen(&mut self) -> AGEN_W { AGEN_W::new(self, 28) } diff --git a/src/ebu/clc.rs b/src/ebu/clc.rs index 5d21412c..ab219af4 100644 --- a/src/ebu/clc.rs +++ b/src/ebu/clc.rs @@ -458,25 +458,21 @@ impl R { impl W { #[doc = "Bit 0 - EBU Disable Request Bit"] #[inline(always)] - #[must_use] pub fn disr(&mut self) -> DISR_W { DISR_W::new(self, 0) } #[doc = "Bit 16 - EBU Clocking Mode"] #[inline(always)] - #[must_use] pub fn sync(&mut self) -> SYNC_W { SYNC_W::new(self, 16) } #[doc = "Bit 17 - DIV2 Clocking Mode"] #[inline(always)] - #[must_use] pub fn div2(&mut self) -> DIV2_W { DIV2_W::new(self, 17) } #[doc = "Bits 18:19 - EBU Clock Divide Ratio"] #[inline(always)] - #[must_use] pub fn ebudiv(&mut self) -> EBUDIV_W { EBUDIV_W::new(self, 18) } diff --git a/src/ebu/modcon.rs b/src/ebu/modcon.rs index d77c9000..13e9a4f4 100644 --- a/src/ebu/modcon.rs +++ b/src/ebu/modcon.rs @@ -456,55 +456,46 @@ impl R { impl W { #[doc = "Bit 2 - SDRAM Tristate"] #[inline(always)] - #[must_use] pub fn sdtri(&mut self) -> SDTRI_W { SDTRI_W::new(self, 2) } #[doc = "Bit 4 - External Bus Lock Control"] #[inline(always)] - #[must_use] pub fn extlock(&mut self) -> EXTLOCK_W { EXTLOCK_W::new(self, 4) } #[doc = "Bit 5 - Arbitration Signal Synchronization Control"] #[inline(always)] - #[must_use] pub fn arbsync(&mut self) -> ARBSYNC_W { ARBSYNC_W::new(self, 5) } #[doc = "Bits 6:7 - Arbitration Mode Selection"] #[inline(always)] - #[must_use] pub fn arbmode(&mut self) -> ARBMODE_W { ARBMODE_W::new(self, 6) } #[doc = "Bits 8:15 - Bus Time-out Control"] #[inline(always)] - #[must_use] pub fn timeoutc(&mut self) -> TIMEOUTC_W { TIMEOUTC_W::new(self, 8) } #[doc = "Bits 16:23 - Lock Timeout Counter Preload"] #[inline(always)] - #[must_use] pub fn locktimeout(&mut self) -> LOCKTIMEOUT_W { LOCKTIMEOUT_W::new(self, 16) } #[doc = "Bits 24:27 - Global Chip Select Enable"] #[inline(always)] - #[must_use] pub fn globalcs(&mut self) -> GLOBALCS_W { GLOBALCS_W::new(self, 24) } #[doc = "Bit 28 - Access Inhibit request"] #[inline(always)] - #[must_use] pub fn accsinh(&mut self) -> ACCSINH_W { ACCSINH_W::new(self, 28) } #[doc = "Bit 31 - ALE Mode"] #[inline(always)] - #[must_use] pub fn ale(&mut self) -> ALE_W { ALE_W::new(self, 31) } diff --git a/src/ebu/sdrmcon.rs b/src/ebu/sdrmcon.rs index 9e3d926e..d28b0f45 100644 --- a/src/ebu/sdrmcon.rs +++ b/src/ebu/sdrmcon.rs @@ -602,79 +602,66 @@ impl R { impl W { #[doc = "Bits 0:3 - Row to precharge delay counter"] #[inline(always)] - #[must_use] pub fn cras(&mut self) -> CRAS_W { CRAS_W::new(self, 0) } #[doc = "Bits 4:7 - Initialization refresh commands counter"] #[inline(always)] - #[must_use] pub fn crfsh(&mut self) -> CRFSH_W { CRFSH_W::new(self, 4) } #[doc = "Bits 8:9 - Mode register set-up time"] #[inline(always)] - #[must_use] pub fn crsc(&mut self) -> CRSC_W { CRSC_W::new(self, 8) } #[doc = "Bits 10:11 - Row precharge time counter"] #[inline(always)] - #[must_use] pub fn crp(&mut self) -> CRP_W { CRP_W::new(self, 10) } #[doc = "Bits 12:13 - Width of column address"] #[inline(always)] - #[must_use] pub fn awidth(&mut self) -> AWIDTH_W { AWIDTH_W::new(self, 12) } #[doc = "Bits 14:15 - Row to column delay counter"] #[inline(always)] - #[must_use] pub fn crcd(&mut self) -> CRCD_W { CRCD_W::new(self, 14) } #[doc = "Bits 16:18 - Row cycle time counter"] #[inline(always)] - #[must_use] pub fn crc(&mut self) -> CRC_W { CRC_W::new(self, 16) } #[doc = "Bits 19:21 - Mask for row tag"] #[inline(always)] - #[must_use] pub fn rowm(&mut self) -> ROWM_W { ROWM_W::new(self, 19) } #[doc = "Bits 22:24 - Mask for bank tag"] #[inline(always)] - #[must_use] pub fn bankm(&mut self) -> BANKM_W { BANKM_W::new(self, 22) } #[doc = "Bits 25:27 - Row cycle time counter extension"] #[inline(always)] - #[must_use] pub fn crce(&mut self) -> CRCE_W { CRCE_W::new(self, 25) } #[doc = "Bit 28 - Disable SDRAM clock output"] #[inline(always)] - #[must_use] pub fn clkdis(&mut self) -> CLKDIS_W { CLKDIS_W::new(self, 28) } #[doc = "Bits 29:30 - Power Save Mode used for gated clock mode"] #[inline(always)] - #[must_use] pub fn pwr_mode(&mut self) -> PWR_MODE_W { PWR_MODE_W::new(self, 29) } #[doc = "Bit 31 - SDRAM clock mode select"] #[inline(always)] - #[must_use] pub fn sdcmsel(&mut self) -> SDCMSEL_W { SDCMSEL_W::new(self, 31) } diff --git a/src/ebu/sdrmod.rs b/src/ebu/sdrmod.rs index 455a99a1..f840a70a 100644 --- a/src/ebu/sdrmod.rs +++ b/src/ebu/sdrmod.rs @@ -294,43 +294,36 @@ impl R { impl W { #[doc = "Bits 0:2 - Burst length"] #[inline(always)] - #[must_use] pub fn burstl(&mut self) -> BURSTL_W { BURSTL_W::new(self, 0) } #[doc = "Bit 3 - Burst type"] #[inline(always)] - #[must_use] pub fn btyp(&mut self) -> BTYP_W { BTYP_W::new(self, 3) } #[doc = "Bits 4:6 - CAS latency"] #[inline(always)] - #[must_use] pub fn caslat(&mut self) -> CASLAT_W { CASLAT_W::new(self, 4) } #[doc = "Bits 7:13 - Operation Mode"] #[inline(always)] - #[must_use] pub fn opmode(&mut self) -> OPMODE_W { OPMODE_W::new(self, 7) } #[doc = "Bit 15 - SDRAM coldstart"] #[inline(always)] - #[must_use] pub fn coldstart(&mut self) -> COLDSTART_W { COLDSTART_W::new(self, 15) } #[doc = "Bits 16:27 - Extended Operation Mode"] #[inline(always)] - #[must_use] pub fn xopm(&mut self) -> XOPM_W { XOPM_W::new(self, 16) } #[doc = "Bits 28:31 - Extended Operation Bank Select"] #[inline(always)] - #[must_use] pub fn xba(&mut self) -> XBA_W { XBA_W::new(self, 28) } diff --git a/src/ebu/sdrmref.rs b/src/ebu/sdrmref.rs index 94091054..82676418 100644 --- a/src/ebu/sdrmref.rs +++ b/src/ebu/sdrmref.rs @@ -102,55 +102,46 @@ impl R { impl W { #[doc = "Bits 0:5 - Refresh counter period"] #[inline(always)] - #[must_use] pub fn refreshc(&mut self) -> REFRESHC_W { REFRESHC_W::new(self, 0) } #[doc = "Bits 6:8 - Number of refresh commands"] #[inline(always)] - #[must_use] pub fn refreshr(&mut self) -> REFRESHR_W { REFRESHR_W::new(self, 6) } #[doc = "Bit 10 - Self Refresh Exit (Power Up)."] #[inline(always)] - #[must_use] pub fn selfrex(&mut self) -> SELFREX_W { SELFREX_W::new(self, 10) } #[doc = "Bit 12 - Self Refresh Entry"] #[inline(always)] - #[must_use] pub fn selfren(&mut self) -> SELFREN_W { SELFREN_W::new(self, 12) } #[doc = "Bit 13 - Automatic Self Refresh"] #[inline(always)] - #[must_use] pub fn autoselfr(&mut self) -> AUTOSELFR_W { AUTOSELFR_W::new(self, 13) } #[doc = "Bits 14:15 - Extended Refresh Counter Period"] #[inline(always)] - #[must_use] pub fn erfshc(&mut self) -> ERFSHC_W { ERFSHC_W::new(self, 14) } #[doc = "Bits 16:23 - Self Refresh Exit Delay"] #[inline(always)] - #[must_use] pub fn selfrex_dly(&mut self) -> SELFREX_DLY_W { SELFREX_DLY_W::new(self, 16) } #[doc = "Bit 24 - Auto Refresh on Self refresh Exit"] #[inline(always)] - #[must_use] pub fn arfsh(&mut self) -> ARFSH_W { ARFSH_W::new(self, 24) } #[doc = "Bits 25:27 - Delay on Power Down Exit"] #[inline(always)] - #[must_use] pub fn res_dly(&mut self) -> RES_DLY_W { RES_DLY_W::new(self, 25) } diff --git a/src/ebu/usercon.rs b/src/ebu/usercon.rs index d40de117..cc1748f7 100644 --- a/src/ebu/usercon.rs +++ b/src/ebu/usercon.rs @@ -139,19 +139,16 @@ impl R { impl W { #[doc = "Bit 0 - Disable Internal Pipelining"] #[inline(always)] - #[must_use] pub fn dip(&mut self) -> DIP_W { DIP_W::new(self, 0) } #[doc = "Bits 16:24 - Address Pins to GPIO Mode"] #[inline(always)] - #[must_use] pub fn addio(&mut self) -> ADDIO_W { ADDIO_W::new(self, 16) } #[doc = "Bit 25 - ADV Pin to GPIO Mode"] #[inline(always)] - #[must_use] pub fn advio(&mut self) -> ADVIO_W { ADVIO_W::new(self, 25) } diff --git a/src/eru0/exicon.rs b/src/eru0/exicon.rs index c40074b5..f089ff22 100644 --- a/src/eru0/exicon.rs +++ b/src/eru0/exicon.rs @@ -595,55 +595,46 @@ impl R { impl W { #[doc = "Bit 0 - Output Trigger Pulse Enable for ETLx"] #[inline(always)] - #[must_use] pub fn pe(&mut self) -> PE_W { PE_W::new(self, 0) } #[doc = "Bit 1 - Rebuild Level Detection for Status Flag for ETLx"] #[inline(always)] - #[must_use] pub fn ld(&mut self) -> LD_W { LD_W::new(self, 1) } #[doc = "Bit 2 - Rising Edge Detection Enable ETLx"] #[inline(always)] - #[must_use] pub fn re(&mut self) -> RE_W { RE_W::new(self, 2) } #[doc = "Bit 3 - Falling Edge Detection Enable ETLx"] #[inline(always)] - #[must_use] pub fn fe(&mut self) -> FE_W { FE_W::new(self, 3) } #[doc = "Bits 4:6 - Output Channel Select for ETLx Output Trigger Pulse"] #[inline(always)] - #[must_use] pub fn ocs(&mut self) -> OCS_W { OCS_W::new(self, 4) } #[doc = "Bit 7 - Status Flag for ETLx"] #[inline(always)] - #[must_use] pub fn fl(&mut self) -> FL_W { FL_W::new(self, 7) } #[doc = "Bits 8:9 - Input Source Select for ERSx"] #[inline(always)] - #[must_use] pub fn ss(&mut self) -> SS_W { SS_W::new(self, 8) } #[doc = "Bit 10 - Input A Negation Select for ERSx"] #[inline(always)] - #[must_use] pub fn na(&mut self) -> NA_W { NA_W::new(self, 10) } #[doc = "Bit 11 - Input B Negation Select for ERSx"] #[inline(always)] - #[must_use] pub fn nb(&mut self) -> NB_W { NB_W::new(self, 11) } diff --git a/src/eru0/exisel.rs b/src/eru0/exisel.rs index 182ff44e..7e2c7dae 100644 --- a/src/eru0/exisel.rs +++ b/src/eru0/exisel.rs @@ -735,49 +735,41 @@ impl R { impl W { #[doc = "Bits 0:1 - Event Source Select for A0 (ERS0)"] #[inline(always)] - #[must_use] pub fn exs0a(&mut self) -> EXS0A_W { EXS0A_W::new(self, 0) } #[doc = "Bits 2:3 - Event Source Select for B0 (ERS0)"] #[inline(always)] - #[must_use] pub fn exs0b(&mut self) -> EXS0B_W { EXS0B_W::new(self, 2) } #[doc = "Bits 4:5 - Event Source Select for A1 (ERS1)"] #[inline(always)] - #[must_use] pub fn exs1a(&mut self) -> EXS1A_W { EXS1A_W::new(self, 4) } #[doc = "Bits 6:7 - Event Source Select for B1 (ERS1)"] #[inline(always)] - #[must_use] pub fn exs1b(&mut self) -> EXS1B_W { EXS1B_W::new(self, 6) } #[doc = "Bits 8:9 - Event Source Select for A2 (ERS2)"] #[inline(always)] - #[must_use] pub fn exs2a(&mut self) -> EXS2A_W { EXS2A_W::new(self, 8) } #[doc = "Bits 10:11 - Event Source Select for B2 (ERS2)"] #[inline(always)] - #[must_use] pub fn exs2b(&mut self) -> EXS2B_W { EXS2B_W::new(self, 10) } #[doc = "Bits 12:13 - Event Source Select for A3 (ERS3)"] #[inline(always)] - #[must_use] pub fn exs3a(&mut self) -> EXS3A_W { EXS3A_W::new(self, 12) } #[doc = "Bits 14:15 - Event Source Select for B3 (ERS3)"] #[inline(always)] - #[must_use] pub fn exs3b(&mut self) -> EXS3B_W { EXS3B_W::new(self, 14) } diff --git a/src/eru0/exocon.rs b/src/eru0/exocon.rs index 1a1523f5..619167c5 100644 --- a/src/eru0/exocon.rs +++ b/src/eru0/exocon.rs @@ -520,43 +520,36 @@ impl R { impl W { #[doc = "Bits 0:1 - Internal Trigger Source Selection"] #[inline(always)] - #[must_use] pub fn iss(&mut self) -> ISS_W { ISS_W::new(self, 0) } #[doc = "Bit 2 - Gating Event Enable"] #[inline(always)] - #[must_use] pub fn geen(&mut self) -> GEEN_W { GEEN_W::new(self, 2) } #[doc = "Bits 4:5 - Gating Selection for Pattern Detection Result"] #[inline(always)] - #[must_use] pub fn gp(&mut self) -> GP_W { GP_W::new(self, 4) } #[doc = "Bit 12 - Pattern Detection Enable for ETL0"] #[inline(always)] - #[must_use] pub fn ipen0(&mut self) -> IPEN0_W { IPEN0_W::new(self, 12) } #[doc = "Bit 13 - Pattern Detection Enable for ETL1"] #[inline(always)] - #[must_use] pub fn ipen1(&mut self) -> IPEN1_W { IPEN1_W::new(self, 13) } #[doc = "Bit 14 - Pattern Detection Enable for ETL2"] #[inline(always)] - #[must_use] pub fn ipen2(&mut self) -> IPEN2_W { IPEN2_W::new(self, 14) } #[doc = "Bit 15 - Pattern Detection Enable for ETL3"] #[inline(always)] - #[must_use] pub fn ipen3(&mut self) -> IPEN3_W { IPEN3_W::new(self, 15) } diff --git a/src/eth0/bus_mode.rs b/src/eth0/bus_mode.rs index 70feae6c..4ac1f623 100644 --- a/src/eth0/bus_mode.rs +++ b/src/eth0/bus_mode.rs @@ -131,79 +131,66 @@ impl R { impl W { #[doc = "Bit 0 - Software Reset"] #[inline(always)] - #[must_use] pub fn swr(&mut self) -> SWR_W { SWR_W::new(self, 0) } #[doc = "Bit 1 - DMA Arbitration Scheme"] #[inline(always)] - #[must_use] pub fn da(&mut self) -> DA_W { DA_W::new(self, 1) } #[doc = "Bits 2:6 - Descriptor Skip Length"] #[inline(always)] - #[must_use] pub fn dsl(&mut self) -> DSL_W { DSL_W::new(self, 2) } #[doc = "Bit 7 - Alternate Descriptor Size"] #[inline(always)] - #[must_use] pub fn atds(&mut self) -> ATDS_W { ATDS_W::new(self, 7) } #[doc = "Bits 8:13 - Programmable Burst Length"] #[inline(always)] - #[must_use] pub fn pbl(&mut self) -> PBL_W { PBL_W::new(self, 8) } #[doc = "Bits 14:15 - Priority Ratio"] #[inline(always)] - #[must_use] pub fn pr(&mut self) -> PR_W { PR_W::new(self, 14) } #[doc = "Bit 16 - Fixed Burst"] #[inline(always)] - #[must_use] pub fn fb(&mut self) -> FB_W { FB_W::new(self, 16) } #[doc = "Bits 17:22 - Rx DMA PBL"] #[inline(always)] - #[must_use] pub fn rpbl(&mut self) -> RPBL_W { RPBL_W::new(self, 17) } #[doc = "Bit 23 - Use Seperate PBL"] #[inline(always)] - #[must_use] pub fn usp(&mut self) -> USP_W { USP_W::new(self, 23) } #[doc = "Bit 24 - 8xPBL Mode"] #[inline(always)] - #[must_use] pub fn pblx8(&mut self) -> PBLX8_W { PBLX8_W::new(self, 24) } #[doc = "Bit 25 - Address Aligned Beats"] #[inline(always)] - #[must_use] pub fn aal(&mut self) -> AAL_W { AAL_W::new(self, 25) } #[doc = "Bit 26 - Mixed Burst"] #[inline(always)] - #[must_use] pub fn mb(&mut self) -> MB_W { MB_W::new(self, 26) } #[doc = "Bit 27 - Transmit Priority"] #[inline(always)] - #[must_use] pub fn txpr(&mut self) -> TXPR_W { TXPR_W::new(self, 27) } diff --git a/src/eth0/flow_control.rs b/src/eth0/flow_control.rs index 82a812e1..f8c774a9 100644 --- a/src/eth0/flow_control.rs +++ b/src/eth0/flow_control.rs @@ -70,43 +70,36 @@ impl R { impl W { #[doc = "Bit 0 - Flow Control Busy or Backpressure Activate"] #[inline(always)] - #[must_use] pub fn fca_bpa(&mut self) -> FCA_BPA_W { FCA_BPA_W::new(self, 0) } #[doc = "Bit 1 - Transmit Flow Control Enable"] #[inline(always)] - #[must_use] pub fn tfe(&mut self) -> TFE_W { TFE_W::new(self, 1) } #[doc = "Bit 2 - Receive Flow Control Enable"] #[inline(always)] - #[must_use] pub fn rfe(&mut self) -> RFE_W { RFE_W::new(self, 2) } #[doc = "Bit 3 - Unicast Pause Frame Detect"] #[inline(always)] - #[must_use] pub fn up(&mut self) -> UP_W { UP_W::new(self, 3) } #[doc = "Bits 4:5 - Pause Low Threshold"] #[inline(always)] - #[must_use] pub fn plt(&mut self) -> PLT_W { PLT_W::new(self, 4) } #[doc = "Bit 7 - Disable Zero-Quanta Pause"] #[inline(always)] - #[must_use] pub fn dzpq(&mut self) -> DZPQ_W { DZPQ_W::new(self, 7) } #[doc = "Bits 16:31 - Pause Time"] #[inline(always)] - #[must_use] pub fn pt(&mut self) -> PT_W { PT_W::new(self, 16) } diff --git a/src/eth0/gmii_address.rs b/src/eth0/gmii_address.rs index b3e5532d..e6702ae0 100644 --- a/src/eth0/gmii_address.rs +++ b/src/eth0/gmii_address.rs @@ -52,31 +52,26 @@ impl R { impl W { #[doc = "Bit 0 - MII Busy"] #[inline(always)] - #[must_use] pub fn mb(&mut self) -> MB_W { MB_W::new(self, 0) } #[doc = "Bit 1 - MII Write"] #[inline(always)] - #[must_use] pub fn mw(&mut self) -> MW_W { MW_W::new(self, 1) } #[doc = "Bits 2:5 - CSR Clock Range"] #[inline(always)] - #[must_use] pub fn cr(&mut self) -> CR_W { CR_W::new(self, 2) } #[doc = "Bits 6:10 - MII Register"] #[inline(always)] - #[must_use] pub fn mr(&mut self) -> MR_W { MR_W::new(self, 6) } #[doc = "Bits 11:15 - Physical Layer Address"] #[inline(always)] - #[must_use] pub fn pa(&mut self) -> PA_W { PA_W::new(self, 11) } diff --git a/src/eth0/gmii_data.rs b/src/eth0/gmii_data.rs index 4978d79d..0574fa33 100644 --- a/src/eth0/gmii_data.rs +++ b/src/eth0/gmii_data.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - MII Data"] #[inline(always)] - #[must_use] pub fn md(&mut self) -> MD_W { MD_W::new(self, 0) } diff --git a/src/eth0/hash_table_high.rs b/src/eth0/hash_table_high.rs index 63469feb..ee52d9b1 100644 --- a/src/eth0/hash_table_high.rs +++ b/src/eth0/hash_table_high.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Hash Table High"] #[inline(always)] - #[must_use] pub fn hth(&mut self) -> HTH_W { HTH_W::new(self, 0) } diff --git a/src/eth0/hash_table_low.rs b/src/eth0/hash_table_low.rs index 370e5cbb..e09c2786 100644 --- a/src/eth0/hash_table_low.rs +++ b/src/eth0/hash_table_low.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Hash Table Low"] #[inline(always)] - #[must_use] pub fn htl(&mut self) -> HTL_W { HTL_W::new(self, 0) } diff --git a/src/eth0/hw_feature.rs b/src/eth0/hw_feature.rs index 0526d8d3..bea221b1 100644 --- a/src/eth0/hw_feature.rs +++ b/src/eth0/hw_feature.rs @@ -198,7 +198,6 @@ impl R { impl W { #[doc = "Bit 19 - Rx FIFO > 2,048 Bytes"] #[inline(always)] - #[must_use] pub fn rxfifosize(&mut self) -> RXFIFOSIZE_W { RXFIFOSIZE_W::new(self, 19) } diff --git a/src/eth0/interrupt_enable.rs b/src/eth0/interrupt_enable.rs index cea359e1..b046993f 100644 --- a/src/eth0/interrupt_enable.rs +++ b/src/eth0/interrupt_enable.rs @@ -142,91 +142,76 @@ impl R { impl W { #[doc = "Bit 0 - Transmit Interrupt Enable"] #[inline(always)] - #[must_use] pub fn tie(&mut self) -> TIE_W { TIE_W::new(self, 0) } #[doc = "Bit 1 - Transmit Stopped Enable"] #[inline(always)] - #[must_use] pub fn tse(&mut self) -> TSE_W { TSE_W::new(self, 1) } #[doc = "Bit 2 - Transmit Buffer Unvailable Enable"] #[inline(always)] - #[must_use] pub fn tue(&mut self) -> TUE_W { TUE_W::new(self, 2) } #[doc = "Bit 3 - Transmit Jabber Timeout Enable"] #[inline(always)] - #[must_use] pub fn tje(&mut self) -> TJE_W { TJE_W::new(self, 3) } #[doc = "Bit 4 - Overflow Interrupt Enable"] #[inline(always)] - #[must_use] pub fn ove(&mut self) -> OVE_W { OVE_W::new(self, 4) } #[doc = "Bit 5 - Underflow Interrupt Enable"] #[inline(always)] - #[must_use] pub fn une(&mut self) -> UNE_W { UNE_W::new(self, 5) } #[doc = "Bit 6 - Receive Interrupt Enable"] #[inline(always)] - #[must_use] pub fn rie(&mut self) -> RIE_W { RIE_W::new(self, 6) } #[doc = "Bit 7 - Receive Buffer Unavailable Enable"] #[inline(always)] - #[must_use] pub fn rue(&mut self) -> RUE_W { RUE_W::new(self, 7) } #[doc = "Bit 8 - Receive Stopped Enable"] #[inline(always)] - #[must_use] pub fn rse(&mut self) -> RSE_W { RSE_W::new(self, 8) } #[doc = "Bit 9 - Receive Watchdog Timeout Enable"] #[inline(always)] - #[must_use] pub fn rwe(&mut self) -> RWE_W { RWE_W::new(self, 9) } #[doc = "Bit 10 - Early Transmit Interrupt Enable"] #[inline(always)] - #[must_use] pub fn ete(&mut self) -> ETE_W { ETE_W::new(self, 10) } #[doc = "Bit 13 - Fatal Bus Error Enable"] #[inline(always)] - #[must_use] pub fn fbe(&mut self) -> FBE_W { FBE_W::new(self, 13) } #[doc = "Bit 14 - Early Receive Interrupt Enable"] #[inline(always)] - #[must_use] pub fn ere(&mut self) -> ERE_W { ERE_W::new(self, 14) } #[doc = "Bit 15 - Abnormal Interrupt Summary Enable"] #[inline(always)] - #[must_use] pub fn aie(&mut self) -> AIE_W { AIE_W::new(self, 15) } #[doc = "Bit 16 - Normal Interrupt Summary Enable"] #[inline(always)] - #[must_use] pub fn nie(&mut self) -> NIE_W { NIE_W::new(self, 16) } diff --git a/src/eth0/interrupt_mask.rs b/src/eth0/interrupt_mask.rs index f43c88e5..a870b205 100644 --- a/src/eth0/interrupt_mask.rs +++ b/src/eth0/interrupt_mask.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bit 3 - PMT Interrupt Mask"] #[inline(always)] - #[must_use] pub fn pmtim(&mut self) -> PMTIM_W { PMTIM_W::new(self, 3) } #[doc = "Bit 9 - Timestamp Interrupt Mask"] #[inline(always)] - #[must_use] pub fn tsim(&mut self) -> TSIM_W { TSIM_W::new(self, 9) } diff --git a/src/eth0/mac_address0_high.rs b/src/eth0/mac_address0_high.rs index 7b1f63e1..31210008 100644 --- a/src/eth0/mac_address0_high.rs +++ b/src/eth0/mac_address0_high.rs @@ -23,7 +23,6 @@ impl R { impl W { #[doc = "Bits 0:15 - MAC Address0 \\[47:32\\]"] #[inline(always)] - #[must_use] pub fn addrhi(&mut self) -> ADDRHI_W { ADDRHI_W::new(self, 0) } diff --git a/src/eth0/mac_address0_low.rs b/src/eth0/mac_address0_low.rs index ef322e45..cadfd17d 100644 --- a/src/eth0/mac_address0_low.rs +++ b/src/eth0/mac_address0_low.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - MAC Address0 \\[31:0\\]"] #[inline(always)] - #[must_use] pub fn addrlo(&mut self) -> ADDRLO_W { ADDRLO_W::new(self, 0) } diff --git a/src/eth0/mac_address1_high.rs b/src/eth0/mac_address1_high.rs index ec21bc0f..7f01cfb0 100644 --- a/src/eth0/mac_address1_high.rs +++ b/src/eth0/mac_address1_high.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:15 - MAC Address1 \\[47:32\\]"] #[inline(always)] - #[must_use] pub fn addrhi(&mut self) -> ADDRHI_W { ADDRHI_W::new(self, 0) } #[doc = "Bits 24:29 - Mask Byte Control"] #[inline(always)] - #[must_use] pub fn mbc(&mut self) -> MBC_W { MBC_W::new(self, 24) } #[doc = "Bit 30 - Source Address"] #[inline(always)] - #[must_use] pub fn sa(&mut self) -> SA_W { SA_W::new(self, 30) } #[doc = "Bit 31 - Address Enable"] #[inline(always)] - #[must_use] pub fn ae(&mut self) -> AE_W { AE_W::new(self, 31) } diff --git a/src/eth0/mac_address1_low.rs b/src/eth0/mac_address1_low.rs index b8ad12d5..d0fc7f72 100644 --- a/src/eth0/mac_address1_low.rs +++ b/src/eth0/mac_address1_low.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - MAC Address1 \\[31:0\\]"] #[inline(always)] - #[must_use] pub fn addrlo(&mut self) -> ADDRLO_W { ADDRLO_W::new(self, 0) } diff --git a/src/eth0/mac_address2_high.rs b/src/eth0/mac_address2_high.rs index 3d82f358..9ea1972e 100644 --- a/src/eth0/mac_address2_high.rs +++ b/src/eth0/mac_address2_high.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:15 - MAC Address2 \\[47:32\\]"] #[inline(always)] - #[must_use] pub fn addrhi(&mut self) -> ADDRHI_W { ADDRHI_W::new(self, 0) } #[doc = "Bits 24:29 - Mask Byte Control"] #[inline(always)] - #[must_use] pub fn mbc(&mut self) -> MBC_W { MBC_W::new(self, 24) } #[doc = "Bit 30 - Source Address"] #[inline(always)] - #[must_use] pub fn sa(&mut self) -> SA_W { SA_W::new(self, 30) } #[doc = "Bit 31 - Address Enable"] #[inline(always)] - #[must_use] pub fn ae(&mut self) -> AE_W { AE_W::new(self, 31) } diff --git a/src/eth0/mac_address2_low.rs b/src/eth0/mac_address2_low.rs index 7916c916..91ebe89d 100644 --- a/src/eth0/mac_address2_low.rs +++ b/src/eth0/mac_address2_low.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - MAC Address2 \\[31:0\\]"] #[inline(always)] - #[must_use] pub fn addrlo(&mut self) -> ADDRLO_W { ADDRLO_W::new(self, 0) } diff --git a/src/eth0/mac_address3_high.rs b/src/eth0/mac_address3_high.rs index dd880f80..6e11ed1a 100644 --- a/src/eth0/mac_address3_high.rs +++ b/src/eth0/mac_address3_high.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:15 - MAC Address3 \\[47:32\\]"] #[inline(always)] - #[must_use] pub fn addrhi(&mut self) -> ADDRHI_W { ADDRHI_W::new(self, 0) } #[doc = "Bits 24:29 - Mask Byte Control"] #[inline(always)] - #[must_use] pub fn mbc(&mut self) -> MBC_W { MBC_W::new(self, 24) } #[doc = "Bit 30 - Source Address"] #[inline(always)] - #[must_use] pub fn sa(&mut self) -> SA_W { SA_W::new(self, 30) } #[doc = "Bit 31 - Address Enable"] #[inline(always)] - #[must_use] pub fn ae(&mut self) -> AE_W { AE_W::new(self, 31) } diff --git a/src/eth0/mac_address3_low.rs b/src/eth0/mac_address3_low.rs index c06db478..f6867d03 100644 --- a/src/eth0/mac_address3_low.rs +++ b/src/eth0/mac_address3_low.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - MAC Address3 \\[31:0\\]"] #[inline(always)] - #[must_use] pub fn addrlo(&mut self) -> ADDRLO_W { ADDRLO_W::new(self, 0) } diff --git a/src/eth0/mac_configuration.rs b/src/eth0/mac_configuration.rs index bce41ed2..5fe49415 100644 --- a/src/eth0/mac_configuration.rs +++ b/src/eth0/mac_configuration.rs @@ -199,115 +199,96 @@ impl R { impl W { #[doc = "Bits 0:1 - Preamble Length for Transmit Frames"] #[inline(always)] - #[must_use] pub fn prelen(&mut self) -> PRELEN_W { PRELEN_W::new(self, 0) } #[doc = "Bit 2 - Receiver Enable"] #[inline(always)] - #[must_use] pub fn re(&mut self) -> RE_W { RE_W::new(self, 2) } #[doc = "Bit 3 - Transmitter Enable"] #[inline(always)] - #[must_use] pub fn te(&mut self) -> TE_W { TE_W::new(self, 3) } #[doc = "Bit 4 - Deferral Check"] #[inline(always)] - #[must_use] pub fn dc(&mut self) -> DC_W { DC_W::new(self, 4) } #[doc = "Bits 5:6 - Back-Off Limit"] #[inline(always)] - #[must_use] pub fn bl(&mut self) -> BL_W { BL_W::new(self, 5) } #[doc = "Bit 7 - Automatic Pad or CRC Stripping"] #[inline(always)] - #[must_use] pub fn acs(&mut self) -> ACS_W { ACS_W::new(self, 7) } #[doc = "Bit 9 - Disable Retry"] #[inline(always)] - #[must_use] pub fn dr(&mut self) -> DR_W { DR_W::new(self, 9) } #[doc = "Bit 10 - Checksum Offload"] #[inline(always)] - #[must_use] pub fn ipc(&mut self) -> IPC_W { IPC_W::new(self, 10) } #[doc = "Bit 11 - Duplex Mode"] #[inline(always)] - #[must_use] pub fn dm(&mut self) -> DM_W { DM_W::new(self, 11) } #[doc = "Bit 12 - Loopback Mode"] #[inline(always)] - #[must_use] pub fn lm(&mut self) -> LM_W { LM_W::new(self, 12) } #[doc = "Bit 13 - Disable Receive Own"] #[inline(always)] - #[must_use] pub fn do_(&mut self) -> DO_W { DO_W::new(self, 13) } #[doc = "Bit 14 - Speed"] #[inline(always)] - #[must_use] pub fn fes(&mut self) -> FES_W { FES_W::new(self, 14) } #[doc = "Bit 16 - Disable Carrier Sense During Transmission"] #[inline(always)] - #[must_use] pub fn dcrs(&mut self) -> DCRS_W { DCRS_W::new(self, 16) } #[doc = "Bits 17:19 - Inter-Frame Gap"] #[inline(always)] - #[must_use] pub fn ifg(&mut self) -> IFG_W { IFG_W::new(self, 17) } #[doc = "Bit 20 - Jumbo Frame Enable"] #[inline(always)] - #[must_use] pub fn je(&mut self) -> JE_W { JE_W::new(self, 20) } #[doc = "Bit 22 - Jabber Disable"] #[inline(always)] - #[must_use] pub fn jd(&mut self) -> JD_W { JD_W::new(self, 22) } #[doc = "Bit 23 - Watchdog Disable"] #[inline(always)] - #[must_use] pub fn wd(&mut self) -> WD_W { WD_W::new(self, 23) } #[doc = "Bit 25 - CRC Stripping of Type Frames"] #[inline(always)] - #[must_use] pub fn cst(&mut self) -> CST_W { CST_W::new(self, 25) } #[doc = "Bit 27 - IEEE 802.3as support for 2K packets Enable"] #[inline(always)] - #[must_use] pub fn twokpe(&mut self) -> TWOKPE_W { TWOKPE_W::new(self, 27) } diff --git a/src/eth0/mac_frame_filter.rs b/src/eth0/mac_frame_filter.rs index 585d08ac..5a4cbf8b 100644 --- a/src/eth0/mac_frame_filter.rs +++ b/src/eth0/mac_frame_filter.rs @@ -129,73 +129,61 @@ impl R { impl W { #[doc = "Bit 0 - Promiscuous Mode"] #[inline(always)] - #[must_use] pub fn pr(&mut self) -> PR_W { PR_W::new(self, 0) } #[doc = "Bit 1 - Hash Unicast"] #[inline(always)] - #[must_use] pub fn huc(&mut self) -> HUC_W { HUC_W::new(self, 1) } #[doc = "Bit 2 - Hash Multicast"] #[inline(always)] - #[must_use] pub fn hmc(&mut self) -> HMC_W { HMC_W::new(self, 2) } #[doc = "Bit 3 - DA Inverse Filtering"] #[inline(always)] - #[must_use] pub fn daif(&mut self) -> DAIF_W { DAIF_W::new(self, 3) } #[doc = "Bit 4 - Pass All Multicast"] #[inline(always)] - #[must_use] pub fn pm(&mut self) -> PM_W { PM_W::new(self, 4) } #[doc = "Bit 5 - Disable Broadcast Frames"] #[inline(always)] - #[must_use] pub fn dbf(&mut self) -> DBF_W { DBF_W::new(self, 5) } #[doc = "Bits 6:7 - Pass Control Frames"] #[inline(always)] - #[must_use] pub fn pcf(&mut self) -> PCF_W { PCF_W::new(self, 6) } #[doc = "Bit 8 - SA Inverse Filtering"] #[inline(always)] - #[must_use] pub fn saif(&mut self) -> SAIF_W { SAIF_W::new(self, 8) } #[doc = "Bit 9 - Source Address Filter Enable"] #[inline(always)] - #[must_use] pub fn saf(&mut self) -> SAF_W { SAF_W::new(self, 9) } #[doc = "Bit 10 - Hash or Perfect Filter"] #[inline(always)] - #[must_use] pub fn hpf(&mut self) -> HPF_W { HPF_W::new(self, 10) } #[doc = "Bit 16 - VLAN Tag Filter Enable"] #[inline(always)] - #[must_use] pub fn vtfe(&mut self) -> VTFE_W { VTFE_W::new(self, 16) } #[doc = "Bit 31 - Receive All"] #[inline(always)] - #[must_use] pub fn ra(&mut self) -> RA_W { RA_W::new(self, 31) } diff --git a/src/eth0/mmc_control.rs b/src/eth0/mmc_control.rs index d8237f91..9bfaf430 100644 --- a/src/eth0/mmc_control.rs +++ b/src/eth0/mmc_control.rs @@ -70,43 +70,36 @@ impl R { impl W { #[doc = "Bit 0 - Counters Reset"] #[inline(always)] - #[must_use] pub fn cntrst(&mut self) -> CNTRST_W { CNTRST_W::new(self, 0) } #[doc = "Bit 1 - Counters Stop Rollover"] #[inline(always)] - #[must_use] pub fn cntstopro(&mut self) -> CNTSTOPRO_W { CNTSTOPRO_W::new(self, 1) } #[doc = "Bit 2 - Reset on Read"] #[inline(always)] - #[must_use] pub fn rstonrd(&mut self) -> RSTONRD_W { RSTONRD_W::new(self, 2) } #[doc = "Bit 3 - MMC Counter Freeze"] #[inline(always)] - #[must_use] pub fn cntfreez(&mut self) -> CNTFREEZ_W { CNTFREEZ_W::new(self, 3) } #[doc = "Bit 4 - Counters Preset"] #[inline(always)] - #[must_use] pub fn cntprst(&mut self) -> CNTPRST_W { CNTPRST_W::new(self, 4) } #[doc = "Bit 5 - Full-Half Preset"] #[inline(always)] - #[must_use] pub fn cntprstlvl(&mut self) -> CNTPRSTLVL_W { CNTPRSTLVL_W::new(self, 5) } #[doc = "Bit 8 - Update MMC Counters for Dropped Broadcast Frames"] #[inline(always)] - #[must_use] pub fn ucdbc(&mut self) -> UCDBC_W { UCDBC_W::new(self, 8) } diff --git a/src/eth0/mmc_ipc_receive_interrupt_mask.rs b/src/eth0/mmc_ipc_receive_interrupt_mask.rs index ea8cd9bc..e0cae8a1 100644 --- a/src/eth0/mmc_ipc_receive_interrupt_mask.rs +++ b/src/eth0/mmc_ipc_receive_interrupt_mask.rs @@ -259,169 +259,141 @@ impl R { impl W { #[doc = "Bit 0 - MMC Receive IPV4 Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv4gfim(&mut self) -> RXIPV4GFIM_W { RXIPV4GFIM_W::new(self, 0) } #[doc = "Bit 1 - MMC Receive IPV4 Header Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv4herfim(&mut self) -> RXIPV4HERFIM_W { RXIPV4HERFIM_W::new(self, 1) } #[doc = "Bit 2 - MMC Receive IPV4 No Payload Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv4nopayfim(&mut self) -> RXIPV4NOPAYFIM_W { RXIPV4NOPAYFIM_W::new(self, 2) } #[doc = "Bit 3 - MMC Receive IPV4 Fragmented Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv4fragfim(&mut self) -> RXIPV4FRAGFIM_W { RXIPV4FRAGFIM_W::new(self, 3) } #[doc = "Bit 4 - MMC Receive IPV4 UDP Checksum Disabled Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv4udsblfim(&mut self) -> RXIPV4UDSBLFIM_W { RXIPV4UDSBLFIM_W::new(self, 4) } #[doc = "Bit 5 - MMC Receive IPV6 Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv6gfim(&mut self) -> RXIPV6GFIM_W { RXIPV6GFIM_W::new(self, 5) } #[doc = "Bit 6 - MMC Receive IPV6 Header Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv6herfim(&mut self) -> RXIPV6HERFIM_W { RXIPV6HERFIM_W::new(self, 6) } #[doc = "Bit 7 - MMC Receive IPV6 No Payload Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv6nopayfim(&mut self) -> RXIPV6NOPAYFIM_W { RXIPV6NOPAYFIM_W::new(self, 7) } #[doc = "Bit 8 - MMC Receive UDP Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxudpgfim(&mut self) -> RXUDPGFIM_W { RXUDPGFIM_W::new(self, 8) } #[doc = "Bit 9 - MMC Receive UDP Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxudperfim(&mut self) -> RXUDPERFIM_W { RXUDPERFIM_W::new(self, 9) } #[doc = "Bit 10 - MMC Receive TCP Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxtcpgfim(&mut self) -> RXTCPGFIM_W { RXTCPGFIM_W::new(self, 10) } #[doc = "Bit 11 - MMC Receive TCP Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxtcperfim(&mut self) -> RXTCPERFIM_W { RXTCPERFIM_W::new(self, 11) } #[doc = "Bit 12 - MMC Receive ICMP Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxicmpgfim(&mut self) -> RXICMPGFIM_W { RXICMPGFIM_W::new(self, 12) } #[doc = "Bit 13 - MMC Receive ICMP Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxicmperfim(&mut self) -> RXICMPERFIM_W { RXICMPERFIM_W::new(self, 13) } #[doc = "Bit 16 - MMC Receive IPV4 Good Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv4goim(&mut self) -> RXIPV4GOIM_W { RXIPV4GOIM_W::new(self, 16) } #[doc = "Bit 17 - MMC Receive IPV4 Header Error Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv4heroim(&mut self) -> RXIPV4HEROIM_W { RXIPV4HEROIM_W::new(self, 17) } #[doc = "Bit 18 - MMC Receive IPV4 No Payload Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv4nopayoim(&mut self) -> RXIPV4NOPAYOIM_W { RXIPV4NOPAYOIM_W::new(self, 18) } #[doc = "Bit 19 - MMC Receive IPV4 Fragmented Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv4fragoim(&mut self) -> RXIPV4FRAGOIM_W { RXIPV4FRAGOIM_W::new(self, 19) } #[doc = "Bit 20 - MMC Receive IPV4 UDP Checksum Disabled Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv4udsbloim(&mut self) -> RXIPV4UDSBLOIM_W { RXIPV4UDSBLOIM_W::new(self, 20) } #[doc = "Bit 21 - MMC Receive IPV6 Good Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv6goim(&mut self) -> RXIPV6GOIM_W { RXIPV6GOIM_W::new(self, 21) } #[doc = "Bit 22 - MMC Receive IPV6 Header Error Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv6heroim(&mut self) -> RXIPV6HEROIM_W { RXIPV6HEROIM_W::new(self, 22) } #[doc = "Bit 23 - MMC Receive IPV6 No Payload Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxipv6nopayoim(&mut self) -> RXIPV6NOPAYOIM_W { RXIPV6NOPAYOIM_W::new(self, 23) } #[doc = "Bit 24 - MMC Receive UDP Good Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxudpgoim(&mut self) -> RXUDPGOIM_W { RXUDPGOIM_W::new(self, 24) } #[doc = "Bit 25 - MMC Receive UDP Error Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxudperoim(&mut self) -> RXUDPEROIM_W { RXUDPEROIM_W::new(self, 25) } #[doc = "Bit 26 - MMC Receive TCP Good Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxtcpgoim(&mut self) -> RXTCPGOIM_W { RXTCPGOIM_W::new(self, 26) } #[doc = "Bit 27 - MMC Receive TCP Error Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxtcperoim(&mut self) -> RXTCPEROIM_W { RXTCPEROIM_W::new(self, 27) } #[doc = "Bit 28 - MMC Receive ICMP Good Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxicmpgoim(&mut self) -> RXICMPGOIM_W { RXICMPGOIM_W::new(self, 28) } #[doc = "Bit 29 - MMC Receive ICMP Error Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxicmperoim(&mut self) -> RXICMPEROIM_W { RXICMPEROIM_W::new(self, 29) } diff --git a/src/eth0/mmc_receive_interrupt_mask.rs b/src/eth0/mmc_receive_interrupt_mask.rs index 8984b996..e7ca1443 100644 --- a/src/eth0/mmc_receive_interrupt_mask.rs +++ b/src/eth0/mmc_receive_interrupt_mask.rs @@ -241,157 +241,131 @@ impl R { impl W { #[doc = "Bit 0 - MMC Receive Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxgbfrmim(&mut self) -> RXGBFRMIM_W { RXGBFRMIM_W::new(self, 0) } #[doc = "Bit 1 - MMC Receive Good Bad Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxgboctim(&mut self) -> RXGBOCTIM_W { RXGBOCTIM_W::new(self, 1) } #[doc = "Bit 2 - MMC Receive Good Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxgoctim(&mut self) -> RXGOCTIM_W { RXGOCTIM_W::new(self, 2) } #[doc = "Bit 3 - MMC Receive Broadcast Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxbcgfim(&mut self) -> RXBCGFIM_W { RXBCGFIM_W::new(self, 3) } #[doc = "Bit 4 - MMC Receive Multicast Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxmcgfim(&mut self) -> RXMCGFIM_W { RXMCGFIM_W::new(self, 4) } #[doc = "Bit 5 - MMC Receive CRC Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxcrcerfim(&mut self) -> RXCRCERFIM_W { RXCRCERFIM_W::new(self, 5) } #[doc = "Bit 6 - MMC Receive Alignment Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxalgnerfim(&mut self) -> RXALGNERFIM_W { RXALGNERFIM_W::new(self, 6) } #[doc = "Bit 7 - MMC Receive Runt Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxruntfim(&mut self) -> RXRUNTFIM_W { RXRUNTFIM_W::new(self, 7) } #[doc = "Bit 8 - MMC Receive Jabber Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxjaberfim(&mut self) -> RXJABERFIM_W { RXJABERFIM_W::new(self, 8) } #[doc = "Bit 9 - MMC Receive Undersize Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxusizegfim(&mut self) -> RXUSIZEGFIM_W { RXUSIZEGFIM_W::new(self, 9) } #[doc = "Bit 10 - MMC Receive Oversize Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxosizegfim(&mut self) -> RXOSIZEGFIM_W { RXOSIZEGFIM_W::new(self, 10) } #[doc = "Bit 11 - MMC Receive 64 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rx64octgbfim(&mut self) -> RX64OCTGBFIM_W { RX64OCTGBFIM_W::new(self, 11) } #[doc = "Bit 12 - MMC Receive 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rx65t127octgbfim(&mut self) -> RX65T127OCTGBFIM_W { RX65T127OCTGBFIM_W::new(self, 12) } #[doc = "Bit 13 - MMC Receive 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rx128t255octgbfim(&mut self) -> RX128T255OCTGBFIM_W { RX128T255OCTGBFIM_W::new(self, 13) } #[doc = "Bit 14 - MMC Receive 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rx256t511octgbfim(&mut self) -> RX256T511OCTGBFIM_W { RX256T511OCTGBFIM_W::new(self, 14) } #[doc = "Bit 15 - MMC Receive 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rx512t1023octgbfim(&mut self) -> RX512T1023OCTGBFIM_W { RX512T1023OCTGBFIM_W::new(self, 15) } #[doc = "Bit 16 - MMC Receive 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rx1024tmaxoctgbfim(&mut self) -> RX1024TMAXOCTGBFIM_W { RX1024TMAXOCTGBFIM_W::new(self, 16) } #[doc = "Bit 17 - MMC Receive Unicast Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxucgfim(&mut self) -> RXUCGFIM_W { RXUCGFIM_W::new(self, 17) } #[doc = "Bit 18 - MMC Receive Length Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxlenerfim(&mut self) -> RXLENERFIM_W { RXLENERFIM_W::new(self, 18) } #[doc = "Bit 19 - MMC Receive Out Of Range Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxorangefim(&mut self) -> RXORANGEFIM_W { RXORANGEFIM_W::new(self, 19) } #[doc = "Bit 20 - MMC Receive Pause Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxpausfim(&mut self) -> RXPAUSFIM_W { RXPAUSFIM_W::new(self, 20) } #[doc = "Bit 21 - MMC Receive FIFO Overflow Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxfovfim(&mut self) -> RXFOVFIM_W { RXFOVFIM_W::new(self, 21) } #[doc = "Bit 22 - MMC Receive VLAN Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxvlangbfim(&mut self) -> RXVLANGBFIM_W { RXVLANGBFIM_W::new(self, 22) } #[doc = "Bit 23 - MMC Receive Watchdog Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxwdogfim(&mut self) -> RXWDOGFIM_W { RXWDOGFIM_W::new(self, 23) } #[doc = "Bit 24 - MMC Receive Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxrcverrfim(&mut self) -> RXRCVERRFIM_W { RXRCVERRFIM_W::new(self, 24) } #[doc = "Bit 25 - MMC Receive Control Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn rxctrlfim(&mut self) -> RXCTRLFIM_W { RXCTRLFIM_W::new(self, 25) } diff --git a/src/eth0/mmc_transmit_interrupt_mask.rs b/src/eth0/mmc_transmit_interrupt_mask.rs index e1cba983..72f1e4f6 100644 --- a/src/eth0/mmc_transmit_interrupt_mask.rs +++ b/src/eth0/mmc_transmit_interrupt_mask.rs @@ -241,157 +241,131 @@ impl R { impl W { #[doc = "Bit 0 - MMC Transmit Good Bad Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txgboctim(&mut self) -> TXGBOCTIM_W { TXGBOCTIM_W::new(self, 0) } #[doc = "Bit 1 - MMC Transmit Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txgbfrmim(&mut self) -> TXGBFRMIM_W { TXGBFRMIM_W::new(self, 1) } #[doc = "Bit 2 - MMC Transmit Broadcast Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txbcgfim(&mut self) -> TXBCGFIM_W { TXBCGFIM_W::new(self, 2) } #[doc = "Bit 3 - MMC Transmit Multicast Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txmcgfim(&mut self) -> TXMCGFIM_W { TXMCGFIM_W::new(self, 3) } #[doc = "Bit 4 - MMC Transmit 64 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn tx64octgbfim(&mut self) -> TX64OCTGBFIM_W { TX64OCTGBFIM_W::new(self, 4) } #[doc = "Bit 5 - MMC Transmit 65 to 127 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn tx65t127octgbfim(&mut self) -> TX65T127OCTGBFIM_W { TX65T127OCTGBFIM_W::new(self, 5) } #[doc = "Bit 6 - MMC Transmit 128 to 255 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn tx128t255octgbfim(&mut self) -> TX128T255OCTGBFIM_W { TX128T255OCTGBFIM_W::new(self, 6) } #[doc = "Bit 7 - MMC Transmit 256 to 511 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn tx256t511octgbfim(&mut self) -> TX256T511OCTGBFIM_W { TX256T511OCTGBFIM_W::new(self, 7) } #[doc = "Bit 8 - MMC Transmit 512 to 1023 Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn tx512t1023octgbfim(&mut self) -> TX512T1023OCTGBFIM_W { TX512T1023OCTGBFIM_W::new(self, 8) } #[doc = "Bit 9 - MMC Transmit 1024 to Maximum Octet Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn tx1024tmaxoctgbfim(&mut self) -> TX1024TMAXOCTGBFIM_W { TX1024TMAXOCTGBFIM_W::new(self, 9) } #[doc = "Bit 10 - MMC Transmit Unicast Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txucgbfim(&mut self) -> TXUCGBFIM_W { TXUCGBFIM_W::new(self, 10) } #[doc = "Bit 11 - MMC Transmit Multicast Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txmcgbfim(&mut self) -> TXMCGBFIM_W { TXMCGBFIM_W::new(self, 11) } #[doc = "Bit 12 - MMC Transmit Broadcast Good Bad Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txbcgbfim(&mut self) -> TXBCGBFIM_W { TXBCGBFIM_W::new(self, 12) } #[doc = "Bit 13 - MMC Transmit Underflow Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txuflowerfim(&mut self) -> TXUFLOWERFIM_W { TXUFLOWERFIM_W::new(self, 13) } #[doc = "Bit 14 - MMC Transmit Single Collision Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txscolgfim(&mut self) -> TXSCOLGFIM_W { TXSCOLGFIM_W::new(self, 14) } #[doc = "Bit 15 - MMC Transmit Multiple Collision Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txmcolgfim(&mut self) -> TXMCOLGFIM_W { TXMCOLGFIM_W::new(self, 15) } #[doc = "Bit 16 - MMC Transmit Deferred Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txdeffim(&mut self) -> TXDEFFIM_W { TXDEFFIM_W::new(self, 16) } #[doc = "Bit 17 - MMC Transmit Late Collision Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txlatcolfim(&mut self) -> TXLATCOLFIM_W { TXLATCOLFIM_W::new(self, 17) } #[doc = "Bit 18 - MMC Transmit Excessive Collision Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txexcolfim(&mut self) -> TXEXCOLFIM_W { TXEXCOLFIM_W::new(self, 18) } #[doc = "Bit 19 - MMC Transmit Carrier Error Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txcarerfim(&mut self) -> TXCARERFIM_W { TXCARERFIM_W::new(self, 19) } #[doc = "Bit 20 - MMC Transmit Good Octet Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txgoctim(&mut self) -> TXGOCTIM_W { TXGOCTIM_W::new(self, 20) } #[doc = "Bit 21 - MMC Transmit Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txgfrmim(&mut self) -> TXGFRMIM_W { TXGFRMIM_W::new(self, 21) } #[doc = "Bit 22 - MMC Transmit Excessive Deferral Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txexdeffim(&mut self) -> TXEXDEFFIM_W { TXEXDEFFIM_W::new(self, 22) } #[doc = "Bit 23 - MMC Transmit Pause Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txpausfim(&mut self) -> TXPAUSFIM_W { TXPAUSFIM_W::new(self, 23) } #[doc = "Bit 24 - MMC Transmit VLAN Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txvlangfim(&mut self) -> TXVLANGFIM_W { TXVLANGFIM_W::new(self, 24) } #[doc = "Bit 25 - MMC Transmit Oversize Good Frame Counter Interrupt Mask"] #[inline(always)] - #[must_use] pub fn txosizegfim(&mut self) -> TXOSIZEGFIM_W { TXOSIZEGFIM_W::new(self, 25) } diff --git a/src/eth0/operation_mode.rs b/src/eth0/operation_mode.rs index 9e1f476d..f6437b50 100644 --- a/src/eth0/operation_mode.rs +++ b/src/eth0/operation_mode.rs @@ -115,73 +115,61 @@ impl R { impl W { #[doc = "Bit 1 - Start or Stop Receive"] #[inline(always)] - #[must_use] pub fn sr(&mut self) -> SR_W { SR_W::new(self, 1) } #[doc = "Bit 2 - Operate on Second Frame"] #[inline(always)] - #[must_use] pub fn osf(&mut self) -> OSF_W { OSF_W::new(self, 2) } #[doc = "Bits 3:4 - Receive Threshold Control"] #[inline(always)] - #[must_use] pub fn rtc(&mut self) -> RTC_W { RTC_W::new(self, 3) } #[doc = "Bit 6 - Forward Undersized Good Frames"] #[inline(always)] - #[must_use] pub fn fuf(&mut self) -> FUF_W { FUF_W::new(self, 6) } #[doc = "Bit 7 - Forward Error Frames"] #[inline(always)] - #[must_use] pub fn fef(&mut self) -> FEF_W { FEF_W::new(self, 7) } #[doc = "Bit 13 - Start or Stop Transmission Command"] #[inline(always)] - #[must_use] pub fn st(&mut self) -> ST_W { ST_W::new(self, 13) } #[doc = "Bits 14:16 - Transmit Threshold Control"] #[inline(always)] - #[must_use] pub fn ttc(&mut self) -> TTC_W { TTC_W::new(self, 14) } #[doc = "Bit 20 - Flush Transmit FIFO"] #[inline(always)] - #[must_use] pub fn ftf(&mut self) -> FTF_W { FTF_W::new(self, 20) } #[doc = "Bit 21 - Transmit Store and Forward"] #[inline(always)] - #[must_use] pub fn tsf(&mut self) -> TSF_W { TSF_W::new(self, 21) } #[doc = "Bit 24 - Disable Flushing of Received Frames"] #[inline(always)] - #[must_use] pub fn dff(&mut self) -> DFF_W { DFF_W::new(self, 24) } #[doc = "Bit 25 - Receive Store and Forward"] #[inline(always)] - #[must_use] pub fn rsf(&mut self) -> RSF_W { RSF_W::new(self, 25) } #[doc = "Bit 26 - Disable Dropping of TCP/IP Checksum Error Frames"] #[inline(always)] - #[must_use] pub fn dt(&mut self) -> DT_W { DT_W::new(self, 26) } diff --git a/src/eth0/pmt_control_status.rs b/src/eth0/pmt_control_status.rs index 6cbf5660..367c3ad5 100644 --- a/src/eth0/pmt_control_status.rs +++ b/src/eth0/pmt_control_status.rs @@ -66,31 +66,26 @@ impl R { impl W { #[doc = "Bit 0 - Power Down"] #[inline(always)] - #[must_use] pub fn pwrdwn(&mut self) -> PWRDWN_W { PWRDWN_W::new(self, 0) } #[doc = "Bit 1 - Magic Packet Enable"] #[inline(always)] - #[must_use] pub fn mgkpkten(&mut self) -> MGKPKTEN_W { MGKPKTEN_W::new(self, 1) } #[doc = "Bit 2 - Wake-Up Frame Enable"] #[inline(always)] - #[must_use] pub fn rwkpkten(&mut self) -> RWKPKTEN_W { RWKPKTEN_W::new(self, 2) } #[doc = "Bit 9 - Global Unicast"] #[inline(always)] - #[must_use] pub fn glblucast(&mut self) -> GLBLUCAST_W { GLBLUCAST_W::new(self, 9) } #[doc = "Bit 31 - Wake-Up Frame Filter Register Pointer Reset"] #[inline(always)] - #[must_use] pub fn rwkfiltrst(&mut self) -> RWKFILTRST_W { RWKFILTRST_W::new(self, 31) } diff --git a/src/eth0/receive_descriptor_list_address.rs b/src/eth0/receive_descriptor_list_address.rs index a7f5224e..70d29892 100644 --- a/src/eth0/receive_descriptor_list_address.rs +++ b/src/eth0/receive_descriptor_list_address.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 2:31 - Start of Receive List"] #[inline(always)] - #[must_use] pub fn rdesla_32bit(&mut self) -> RDESLA_32BIT_W { RDESLA_32BIT_W::new(self, 2) } diff --git a/src/eth0/receive_interrupt_watchdog_timer.rs b/src/eth0/receive_interrupt_watchdog_timer.rs index 6b8d1574..f89a1964 100644 --- a/src/eth0/receive_interrupt_watchdog_timer.rs +++ b/src/eth0/receive_interrupt_watchdog_timer.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:7 - RI Watchdog Timer Count"] #[inline(always)] - #[must_use] pub fn riwt(&mut self) -> RIWT_W { RIWT_W::new(self, 0) } diff --git a/src/eth0/receive_poll_demand.rs b/src/eth0/receive_poll_demand.rs index 35e774d6..b50dd3ca 100644 --- a/src/eth0/receive_poll_demand.rs +++ b/src/eth0/receive_poll_demand.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Receive Poll Demand"] #[inline(always)] - #[must_use] pub fn rpd(&mut self) -> RPD_W { RPD_W::new(self, 0) } diff --git a/src/eth0/remote_wake_up_frame_filter.rs b/src/eth0/remote_wake_up_frame_filter.rs index 94f5af18..3f1e618f 100644 --- a/src/eth0/remote_wake_up_frame_filter.rs +++ b/src/eth0/remote_wake_up_frame_filter.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Remote Wake-Up Frame Filter"] #[inline(always)] - #[must_use] pub fn wkupfrmftr(&mut self) -> WKUPFRMFTR_W { WKUPFRMFTR_W::new(self, 0) } diff --git a/src/eth0/rx_runt_error_frames.rs b/src/eth0/rx_runt_error_frames.rs index 762f5ff9..f53d59c5 100644 --- a/src/eth0/rx_runt_error_frames.rs +++ b/src/eth0/rx_runt_error_frames.rs @@ -1,9 +1,9 @@ #[doc = "Register `RX_RUNT_ERROR_FRAMES` reader"] pub type R = crate::R; -#[doc = "Field `RXRUNTERR` reader - This field indicates the number of frames received with runt error(<64 bytes and CRC error)."] +#[doc = "Field `RXRUNTERR` reader - This field indicates the number of frames received with runt error(<64 bytes and CRC error)."] pub type RXRUNTERR_R = crate::FieldReader; impl R { - #[doc = "Bits 0:31 - This field indicates the number of frames received with runt error(<64 bytes and CRC error)."] + #[doc = "Bits 0:31 - This field indicates the number of frames received with runt error(<64 bytes and CRC error)."] #[inline(always)] pub fn rxrunterr(&self) -> RXRUNTERR_R { RXRUNTERR_R::new(self.bits) diff --git a/src/eth0/status.rs b/src/eth0/status.rs index f4e25529..a9e99a43 100644 --- a/src/eth0/status.rs +++ b/src/eth0/status.rs @@ -184,91 +184,76 @@ impl R { impl W { #[doc = "Bit 0 - Transmit Interrupt"] #[inline(always)] - #[must_use] pub fn ti(&mut self) -> TI_W { TI_W::new(self, 0) } #[doc = "Bit 1 - Transmit Process Stopped"] #[inline(always)] - #[must_use] pub fn tps(&mut self) -> TPS_W { TPS_W::new(self, 1) } #[doc = "Bit 2 - Transmit Buffer Unavailable"] #[inline(always)] - #[must_use] pub fn tu(&mut self) -> TU_W { TU_W::new(self, 2) } #[doc = "Bit 3 - Transmit Jabber Timeout"] #[inline(always)] - #[must_use] pub fn tjt(&mut self) -> TJT_W { TJT_W::new(self, 3) } #[doc = "Bit 4 - Receive Overflow"] #[inline(always)] - #[must_use] pub fn ovf(&mut self) -> OVF_W { OVF_W::new(self, 4) } #[doc = "Bit 5 - Transmit Underflow"] #[inline(always)] - #[must_use] pub fn unf(&mut self) -> UNF_W { UNF_W::new(self, 5) } #[doc = "Bit 6 - Receive Interrupt"] #[inline(always)] - #[must_use] pub fn ri(&mut self) -> RI_W { RI_W::new(self, 6) } #[doc = "Bit 7 - Receive Buffer Unavailable"] #[inline(always)] - #[must_use] pub fn ru(&mut self) -> RU_W { RU_W::new(self, 7) } #[doc = "Bit 8 - Receive Process Stopped"] #[inline(always)] - #[must_use] pub fn rps(&mut self) -> RPS_W { RPS_W::new(self, 8) } #[doc = "Bit 9 - Receive Watchdog Timeout"] #[inline(always)] - #[must_use] pub fn rwt(&mut self) -> RWT_W { RWT_W::new(self, 9) } #[doc = "Bit 10 - Early Transmit Interrupt"] #[inline(always)] - #[must_use] pub fn eti(&mut self) -> ETI_W { ETI_W::new(self, 10) } #[doc = "Bit 13 - Fatal Bus Error Interrupt"] #[inline(always)] - #[must_use] pub fn fbi(&mut self) -> FBI_W { FBI_W::new(self, 13) } #[doc = "Bit 14 - Early Receive Interrupt"] #[inline(always)] - #[must_use] pub fn eri(&mut self) -> ERI_W { ERI_W::new(self, 14) } #[doc = "Bit 15 - Abnormal Interrupt Summary"] #[inline(always)] - #[must_use] pub fn ais(&mut self) -> AIS_W { AIS_W::new(self, 15) } #[doc = "Bit 16 - Normal Interrupt Summary"] #[inline(always)] - #[must_use] pub fn nis(&mut self) -> NIS_W { NIS_W::new(self, 16) } diff --git a/src/eth0/sub_second_increment.rs b/src/eth0/sub_second_increment.rs index cf303662..6cc83015 100644 --- a/src/eth0/sub_second_increment.rs +++ b/src/eth0/sub_second_increment.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:7 - Sub-second Increment Value"] #[inline(always)] - #[must_use] pub fn ssinc(&mut self) -> SSINC_W { SSINC_W::new(self, 0) } diff --git a/src/eth0/system_time_higher_word_seconds.rs b/src/eth0/system_time_higher_word_seconds.rs index c9ba350a..ca4e2577 100644 --- a/src/eth0/system_time_higher_word_seconds.rs +++ b/src/eth0/system_time_higher_word_seconds.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Timestamp Higher Word Register"] #[inline(always)] - #[must_use] pub fn tshwr(&mut self) -> TSHWR_W { TSHWR_W::new(self, 0) } diff --git a/src/eth0/system_time_nanoseconds_update.rs b/src/eth0/system_time_nanoseconds_update.rs index 94e91cfe..1068f199 100644 --- a/src/eth0/system_time_nanoseconds_update.rs +++ b/src/eth0/system_time_nanoseconds_update.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:30 - Timestamp Sub Second"] #[inline(always)] - #[must_use] pub fn tsss(&mut self) -> TSSS_W { TSSS_W::new(self, 0) } #[doc = "Bit 31 - Add or subtract time"] #[inline(always)] - #[must_use] pub fn addsub(&mut self) -> ADDSUB_W { ADDSUB_W::new(self, 31) } diff --git a/src/eth0/system_time_seconds_update.rs b/src/eth0/system_time_seconds_update.rs index bc6b2787..585f8dad 100644 --- a/src/eth0/system_time_seconds_update.rs +++ b/src/eth0/system_time_seconds_update.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Timestamp Second"] #[inline(always)] - #[must_use] pub fn tss(&mut self) -> TSS_W { TSS_W::new(self, 0) } diff --git a/src/eth0/target_time_nanoseconds.rs b/src/eth0/target_time_nanoseconds.rs index 4ba53bbb..6291139a 100644 --- a/src/eth0/target_time_nanoseconds.rs +++ b/src/eth0/target_time_nanoseconds.rs @@ -23,7 +23,6 @@ impl R { impl W { #[doc = "Bits 0:30 - Target Timestamp Low Register"] #[inline(always)] - #[must_use] pub fn ttslo(&mut self) -> TTSLO_W { TTSLO_W::new(self, 0) } diff --git a/src/eth0/target_time_seconds.rs b/src/eth0/target_time_seconds.rs index 9587b437..c2d45935 100644 --- a/src/eth0/target_time_seconds.rs +++ b/src/eth0/target_time_seconds.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Target Time Seconds Register"] #[inline(always)] - #[must_use] pub fn tstr(&mut self) -> TSTR_W { TSTR_W::new(self, 0) } diff --git a/src/eth0/timestamp_addend.rs b/src/eth0/timestamp_addend.rs index dd352763..6fb9b182 100644 --- a/src/eth0/timestamp_addend.rs +++ b/src/eth0/timestamp_addend.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Timestamp Addend Register"] #[inline(always)] - #[must_use] pub fn tsar(&mut self) -> TSAR_W { TSAR_W::new(self, 0) } diff --git a/src/eth0/timestamp_control.rs b/src/eth0/timestamp_control.rs index a6deaefa..a75f2483 100644 --- a/src/eth0/timestamp_control.rs +++ b/src/eth0/timestamp_control.rs @@ -151,97 +151,81 @@ impl R { impl W { #[doc = "Bit 0 - Timestamp Enable"] #[inline(always)] - #[must_use] pub fn tsena(&mut self) -> TSENA_W { TSENA_W::new(self, 0) } #[doc = "Bit 1 - Timestamp Fine or Coarse Update"] #[inline(always)] - #[must_use] pub fn tscfupdt(&mut self) -> TSCFUPDT_W { TSCFUPDT_W::new(self, 1) } #[doc = "Bit 2 - Timestamp Initialize"] #[inline(always)] - #[must_use] pub fn tsinit(&mut self) -> TSINIT_W { TSINIT_W::new(self, 2) } #[doc = "Bit 3 - Timestamp Update"] #[inline(always)] - #[must_use] pub fn tsupdt(&mut self) -> TSUPDT_W { TSUPDT_W::new(self, 3) } #[doc = "Bit 4 - Timestamp Interrupt Trigger Enable"] #[inline(always)] - #[must_use] pub fn tstrig(&mut self) -> TSTRIG_W { TSTRIG_W::new(self, 4) } #[doc = "Bit 5 - Addend Reg Update"] #[inline(always)] - #[must_use] pub fn tsaddreg(&mut self) -> TSADDREG_W { TSADDREG_W::new(self, 5) } #[doc = "Bit 8 - Enable Timestamp for All Frames"] #[inline(always)] - #[must_use] pub fn tsenall(&mut self) -> TSENALL_W { TSENALL_W::new(self, 8) } #[doc = "Bit 9 - Timestamp Digital or Binary Rollover Control"] #[inline(always)] - #[must_use] pub fn tsctrlssr(&mut self) -> TSCTRLSSR_W { TSCTRLSSR_W::new(self, 9) } #[doc = "Bit 10 - Enable PTP packet Processing for Version 2 Format"] #[inline(always)] - #[must_use] pub fn tsver2ena(&mut self) -> TSVER2ENA_W { TSVER2ENA_W::new(self, 10) } #[doc = "Bit 11 - Enable Processing of PTP over Ethernet Frames"] #[inline(always)] - #[must_use] pub fn tsipena(&mut self) -> TSIPENA_W { TSIPENA_W::new(self, 11) } #[doc = "Bit 12 - Enable Processing of PTP Frames Sent Over IPv6-UDP"] #[inline(always)] - #[must_use] pub fn tsipv6ena(&mut self) -> TSIPV6ENA_W { TSIPV6ENA_W::new(self, 12) } #[doc = "Bit 13 - Enable Processing of PTP Frames Sent over IPv4-UDP"] #[inline(always)] - #[must_use] pub fn tsipv4ena(&mut self) -> TSIPV4ENA_W { TSIPV4ENA_W::new(self, 13) } #[doc = "Bit 14 - Enable Timestamp Snapshot for Event Messages"] #[inline(always)] - #[must_use] pub fn tsevntena(&mut self) -> TSEVNTENA_W { TSEVNTENA_W::new(self, 14) } #[doc = "Bit 15 - Enable Snapshot for Messages Relevant to Master"] #[inline(always)] - #[must_use] pub fn tsmstrena(&mut self) -> TSMSTRENA_W { TSMSTRENA_W::new(self, 15) } #[doc = "Bits 16:17 - Select PTP packets for Taking Snapshots"] #[inline(always)] - #[must_use] pub fn snaptypsel(&mut self) -> SNAPTYPSEL_W { SNAPTYPSEL_W::new(self, 16) } #[doc = "Bit 18 - Enable MAC address for PTP Frame Filtering"] #[inline(always)] - #[must_use] pub fn tsenmacaddr(&mut self) -> TSENMACADDR_W { TSENMACADDR_W::new(self, 18) } diff --git a/src/eth0/transmit_descriptor_list_address.rs b/src/eth0/transmit_descriptor_list_address.rs index eb6676ce..f95104ca 100644 --- a/src/eth0/transmit_descriptor_list_address.rs +++ b/src/eth0/transmit_descriptor_list_address.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 2:31 - Start of Transmit List"] #[inline(always)] - #[must_use] pub fn tdesla_32bit(&mut self) -> TDESLA_32BIT_W { TDESLA_32BIT_W::new(self, 2) } diff --git a/src/eth0/transmit_poll_demand.rs b/src/eth0/transmit_poll_demand.rs index d8a0684f..54535296 100644 --- a/src/eth0/transmit_poll_demand.rs +++ b/src/eth0/transmit_poll_demand.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Transmit Poll Demand"] #[inline(always)] - #[must_use] pub fn tpd(&mut self) -> TPD_W { TPD_W::new(self, 0) } diff --git a/src/eth0/vlan_tag.rs b/src/eth0/vlan_tag.rs index 0e738037..ab904c63 100644 --- a/src/eth0/vlan_tag.rs +++ b/src/eth0/vlan_tag.rs @@ -50,25 +50,21 @@ impl R { impl W { #[doc = "Bits 0:15 - VLAN Tag Identifier for Receive Frames"] #[inline(always)] - #[must_use] pub fn vl(&mut self) -> VL_W { VL_W::new(self, 0) } #[doc = "Bit 16 - Enable 12-Bit VLAN Tag Comparison"] #[inline(always)] - #[must_use] pub fn etv(&mut self) -> ETV_W { ETV_W::new(self, 16) } #[doc = "Bit 17 - VLAN Tag Inverse Match Enable"] #[inline(always)] - #[must_use] pub fn vtim(&mut self) -> VTIM_W { VTIM_W::new(self, 17) } #[doc = "Bit 18 - Enable S-VLAN"] #[inline(always)] - #[must_use] pub fn esvl(&mut self) -> ESVL_W { ESVL_W::new(self, 18) } diff --git a/src/eth0_con/eth0_con.rs b/src/eth0_con/eth0_con.rs index 7014dc8c..981e9623 100644 --- a/src/eth0_con/eth0_con.rs +++ b/src/eth0_con/eth0_con.rs @@ -1066,73 +1066,61 @@ impl R { impl W { #[doc = "Bits 0:1 - MAC Receive Input 0"] #[inline(always)] - #[must_use] pub fn rxd0(&mut self) -> RXD0_W { RXD0_W::new(self, 0) } #[doc = "Bits 2:3 - MAC Receive Input 1"] #[inline(always)] - #[must_use] pub fn rxd1(&mut self) -> RXD1_W { RXD1_W::new(self, 2) } #[doc = "Bits 4:5 - MAC Receive Input 2"] #[inline(always)] - #[must_use] pub fn rxd2(&mut self) -> RXD2_W { RXD2_W::new(self, 4) } #[doc = "Bits 6:7 - MAC Receive Input 3"] #[inline(always)] - #[must_use] pub fn rxd3(&mut self) -> RXD3_W { RXD3_W::new(self, 6) } #[doc = "Bits 8:9 - RMII clock input"] #[inline(always)] - #[must_use] pub fn clk_rmii(&mut self) -> CLK_RMII_W { CLK_RMII_W::new(self, 8) } #[doc = "Bits 10:11 - CRS_DV input"] #[inline(always)] - #[must_use] pub fn crs_dv(&mut self) -> CRS_DV_W { CRS_DV_W::new(self, 10) } #[doc = "Bits 12:13 - CRS input"] #[inline(always)] - #[must_use] pub fn crs(&mut self) -> CRS_W { CRS_W::new(self, 12) } #[doc = "Bits 14:15 - RXER Input"] #[inline(always)] - #[must_use] pub fn rxer(&mut self) -> RXER_W { RXER_W::new(self, 14) } #[doc = "Bits 16:17 - COL input"] #[inline(always)] - #[must_use] pub fn col(&mut self) -> COL_W { COL_W::new(self, 16) } #[doc = "Bits 18:19 - CLK_TX input"] #[inline(always)] - #[must_use] pub fn clk_tx(&mut self) -> CLK_TX_W { CLK_TX_W::new(self, 18) } #[doc = "Bits 22:23 - MDIO Input Select"] #[inline(always)] - #[must_use] pub fn mdio(&mut self) -> MDIO_W { MDIO_W::new(self, 22) } #[doc = "Bit 26 - Ethernet MAC Interface Selection"] #[inline(always)] - #[must_use] pub fn infsel(&mut self) -> INFSEL_W { INFSEL_W::new(self, 26) } diff --git a/src/fce/clc.rs b/src/fce/clc.rs index 9cdb8ac7..03caff79 100644 --- a/src/fce/clc.rs +++ b/src/fce/clc.rs @@ -23,7 +23,6 @@ impl R { impl W { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] - #[must_use] pub fn disr(&mut self) -> DISR_W { DISR_W::new(self, 0) } diff --git a/src/fce_ke0/cfg.rs b/src/fce_ke0/cfg.rs index e2778c60..049b3a28 100644 --- a/src/fce_ke0/cfg.rs +++ b/src/fce_ke0/cfg.rs @@ -529,55 +529,46 @@ impl R { impl W { #[doc = "Bit 0 - CRC Mismatch Interrupt"] #[inline(always)] - #[must_use] pub fn cmi(&mut self) -> CMI_W { CMI_W::new(self, 0) } #[doc = "Bit 1 - Configuration Error Interrupt"] #[inline(always)] - #[must_use] pub fn cei(&mut self) -> CEI_W { CEI_W::new(self, 1) } #[doc = "Bit 2 - Length Error Interrupt"] #[inline(always)] - #[must_use] pub fn lei(&mut self) -> LEI_W { LEI_W::new(self, 2) } #[doc = "Bit 3 - Bus Error Interrupt"] #[inline(always)] - #[must_use] pub fn bei(&mut self) -> BEI_W { BEI_W::new(self, 3) } #[doc = "Bit 4 - CRC Check Comparison"] #[inline(always)] - #[must_use] pub fn cce(&mut self) -> CCE_W { CCE_W::new(self, 4) } #[doc = "Bit 5 - Automatic Length Reload"] #[inline(always)] - #[must_use] pub fn alr(&mut self) -> ALR_W { ALR_W::new(self, 5) } #[doc = "Bit 8 - IR Byte Wise Reflection"] #[inline(always)] - #[must_use] pub fn refin(&mut self) -> REFIN_W { REFIN_W::new(self, 8) } #[doc = "Bit 9 - CRC 32-Bit Wise Reflection"] #[inline(always)] - #[must_use] pub fn refout(&mut self) -> REFOUT_W { REFOUT_W::new(self, 9) } #[doc = "Bit 10 - Selects the value to be xored with the final CRC"] #[inline(always)] - #[must_use] pub fn xsel(&mut self) -> XSEL_W { XSEL_W::new(self, 10) } diff --git a/src/fce_ke0/check.rs b/src/fce_ke0/check.rs index c25f786f..8a7b4f70 100644 --- a/src/fce_ke0/check.rs +++ b/src/fce_ke0/check.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - CHECK Register"] #[inline(always)] - #[must_use] pub fn check(&mut self) -> CHECK_W { CHECK_W::new(self, 0) } diff --git a/src/fce_ke0/crc.rs b/src/fce_ke0/crc.rs index 5480390a..cca73a82 100644 --- a/src/fce_ke0/crc.rs +++ b/src/fce_ke0/crc.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - CRC Register"] #[inline(always)] - #[must_use] pub fn crc(&mut self) -> CRC_W { CRC_W::new(self, 0) } diff --git a/src/fce_ke0/ctr.rs b/src/fce_ke0/ctr.rs index a7bbcb73..a2bcb399 100644 --- a/src/fce_ke0/ctr.rs +++ b/src/fce_ke0/ctr.rs @@ -34,19 +34,16 @@ impl R { impl W { #[doc = "Bit 0 - Force CRC Mismatch"] #[inline(always)] - #[must_use] pub fn fcm(&mut self) -> FCM_W { FCM_W::new(self, 0) } #[doc = "Bit 1 - Force CFG Register Mismatch"] #[inline(always)] - #[must_use] pub fn frm_cfg(&mut self) -> FRM_CFG_W { FRM_CFG_W::new(self, 1) } #[doc = "Bit 2 - Force Check Register Mismatch"] #[inline(always)] - #[must_use] pub fn frm_check(&mut self) -> FRM_CHECK_W { FRM_CHECK_W::new(self, 2) } diff --git a/src/fce_ke0/ir.rs b/src/fce_ke0/ir.rs index 2fb540aa..9cbf1696 100644 --- a/src/fce_ke0/ir.rs +++ b/src/fce_ke0/ir.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Input Register"] #[inline(always)] - #[must_use] pub fn ir(&mut self) -> IR_W { IR_W::new(self, 0) } diff --git a/src/fce_ke0/length.rs b/src/fce_ke0/length.rs index 636ee919..73a5f682 100644 --- a/src/fce_ke0/length.rs +++ b/src/fce_ke0/length.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Message Length Register"] #[inline(always)] - #[must_use] pub fn length(&mut self) -> LENGTH_W { LENGTH_W::new(self, 0) } diff --git a/src/fce_ke0/sts.rs b/src/fce_ke0/sts.rs index 08894209..01161303 100644 --- a/src/fce_ke0/sts.rs +++ b/src/fce_ke0/sts.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bit 0 - CRC Mismatch Flag"] #[inline(always)] - #[must_use] pub fn cmf(&mut self) -> CMF_W { CMF_W::new(self, 0) } #[doc = "Bit 1 - Configuration Error Flag"] #[inline(always)] - #[must_use] pub fn cef(&mut self) -> CEF_W { CEF_W::new(self, 1) } #[doc = "Bit 2 - Length Error Flag"] #[inline(always)] - #[must_use] pub fn lef(&mut self) -> LEF_W { LEF_W::new(self, 2) } #[doc = "Bit 3 - Bus Error Flag"] #[inline(always)] - #[must_use] pub fn bef(&mut self) -> BEF_W { BEF_W::new(self, 3) } diff --git a/src/flash0/fcon.rs b/src/flash0/fcon.rs index ced6d3ff..43ef765c 100644 --- a/src/flash0/fcon.rs +++ b/src/flash0/fcon.rs @@ -848,79 +848,66 @@ impl R { impl W { #[doc = "Bits 0:3 - Wait States for read access to PFLASH"] #[inline(always)] - #[must_use] pub fn wspflash(&mut self) -> WSPFLASH_W { WSPFLASH_W::new(self, 0) } #[doc = "Bit 4 - Wait State for Error Correction of PFLASH"] #[inline(always)] - #[must_use] pub fn wsecpf(&mut self) -> WSECPF_W { WSECPF_W::new(self, 4) } #[doc = "Bit 13 - Dynamic Flash Idle"] #[inline(always)] - #[must_use] pub fn idle(&mut self) -> IDLE_W { IDLE_W::new(self, 13) } #[doc = "Bit 14 - External Sleep Request Disable"] #[inline(always)] - #[must_use] pub fn esldis(&mut self) -> ESLDIS_W { ESLDIS_W::new(self, 14) } #[doc = "Bit 15 - Flash SLEEP"] #[inline(always)] - #[must_use] pub fn sleep(&mut self) -> SLEEP_W { SLEEP_W::new(self, 15) } #[doc = "Bit 17 - Disable Code Fetch from Flash Memory"] #[inline(always)] - #[must_use] pub fn dcf(&mut self) -> DCF_W { DCF_W::new(self, 17) } #[doc = "Bit 18 - Disable Any Data Fetch from Flash"] #[inline(always)] - #[must_use] pub fn ddf(&mut self) -> DDF_W { DDF_W::new(self, 18) } #[doc = "Bit 24 - Verify and Operation Error Interrupt Mask"] #[inline(always)] - #[must_use] pub fn voperm(&mut self) -> VOPERM_W { VOPERM_W::new(self, 24) } #[doc = "Bit 25 - Command Sequence Error Interrupt Mask"] #[inline(always)] - #[must_use] pub fn sqerm(&mut self) -> SQERM_W { SQERM_W::new(self, 25) } #[doc = "Bit 26 - Protection Error Interrupt Mask"] #[inline(always)] - #[must_use] pub fn proerm(&mut self) -> PROERM_W { PROERM_W::new(self, 26) } #[doc = "Bit 27 - PFLASH Single-Bit Error Interrupt Mask"] #[inline(always)] - #[must_use] pub fn pfsberm(&mut self) -> PFSBERM_W { PFSBERM_W::new(self, 27) } #[doc = "Bit 29 - PFLASH Double-Bit Error Interrupt Mask"] #[inline(always)] - #[must_use] pub fn pfdberm(&mut self) -> PFDBERM_W { PFDBERM_W::new(self, 29) } #[doc = "Bit 31 - End of Busy Interrupt Mask"] #[inline(always)] - #[must_use] pub fn eobm(&mut self) -> EOBM_W { EOBM_W::new(self, 31) } diff --git a/src/flash0/marp.rs b/src/flash0/marp.rs index 40a6dc40..84105fea 100644 --- a/src/flash0/marp.rs +++ b/src/flash0/marp.rs @@ -143,13 +143,11 @@ impl R { impl W { #[doc = "Bits 0:3 - PFLASH Margin Selection"] #[inline(always)] - #[must_use] pub fn margin(&mut self) -> MARGIN_W { MARGIN_W::new(self, 0) } #[doc = "Bit 15 - PFLASH Double-Bit Error Trap Disable"] #[inline(always)] - #[must_use] pub fn trapdis(&mut self) -> TRAPDIS_W { TRAPDIS_W::new(self, 15) } diff --git a/src/generic.rs b/src/generic.rs index b25072d8..c71a767b 100644 --- a/src/generic.rs +++ b/src/generic.rs @@ -509,11 +509,51 @@ impl Reg { #[doc = " ```"] #[doc = " In the latter case, other fields will be set to their reset value."] #[inline(always)] - pub fn write(&self, f: F) + pub fn write(&self, f: F) -> REG::Ux where F: FnOnce(&mut W) -> &mut W, { - self.register.set(f(&mut W { bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }).bits); + let value = f(&mut W { bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }).bits; + self.register.set(value); + value + } + #[doc = " Writes bits to a `Writable` register and produce a value."] + #[doc = ""] + #[doc = " You can write raw bits into a register:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.write_and(|w| unsafe { w.bits(rawbits); });"] + #[doc = " ```"] + #[doc = " or write only the fields you need:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.write_and(|w| {"] + #[doc = " w.field1().bits(newfield1bits)"] + #[doc = " .field2().set_bit()"] + #[doc = " .field3().variant(VARIANT);"] + #[doc = " });"] + #[doc = " ```"] + #[doc = " or an alternative way of saying the same:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.write_and(|w| {"] + #[doc = " w.field1().bits(newfield1bits);"] + #[doc = " w.field2().set_bit();"] + #[doc = " w.field3().variant(VARIANT);"] + #[doc = " });"] + #[doc = " ```"] + #[doc = " In the latter case, other fields will be set to their reset value."] + #[doc = ""] + #[doc = " Values can be returned from the closure:"] + #[doc = " ```ignore"] + #[doc = " let state = periph.reg.write_and(|w| State::set(w.field1()));"] + #[doc = " ```"] + #[inline(always)] + pub fn from_write(&self, f: F) -> T + where + F: FnOnce(&mut W) -> T, + { + let mut writer = W { bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }; + let result = f(&mut writer); + self.register.set(writer.bits); + result } } impl Reg { @@ -525,11 +565,30 @@ impl Reg { #[doc = ""] #[doc = " Unsafe to use with registers which don't allow to write 0."] #[inline(always)] - pub unsafe fn write_with_zero(&self, f: F) + pub unsafe fn write_with_zero(&self, f: F) -> REG::Ux where F: FnOnce(&mut W) -> &mut W, { - self.register.set(f(&mut W { bits: REG::Ux::default(), _reg: marker::PhantomData }).bits); + let value = f(&mut W { bits: REG::Ux::default(), _reg: marker::PhantomData }).bits; + self.register.set(value); + value + } + #[doc = " Writes 0 to a `Writable` register and produces a value."] + #[doc = ""] + #[doc = " Similar to `write`, but unused bits will contain 0."] + #[doc = ""] + #[doc = " # Safety"] + #[doc = ""] + #[doc = " Unsafe to use with registers which don't allow to write 0."] + #[inline(always)] + pub unsafe fn from_write_with_zero(&self, f: F) -> T + where + F: FnOnce(&mut W) -> T, + { + let mut writer = W { bits: REG::Ux::default(), _reg: marker::PhantomData }; + let result = f(&mut writer); + self.register.set(writer.bits); + result } } impl Reg { @@ -559,12 +618,56 @@ impl Reg { #[doc = " ```"] #[doc = " Other fields will have the value they had before the call to `modify`."] #[inline(always)] - pub fn modify(&self, f: F) + pub fn modify(&self, f: F) -> REG::Ux where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); - self.register.set(f(&R { bits, _reg: marker::PhantomData }, &mut W { bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }).bits); + let value = f(&R { bits, _reg: marker::PhantomData }, &mut W { bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }).bits; + self.register.set(value); + value + } + #[doc = " Modifies the contents of the register by reading and then writing it"] + #[doc = " and produces a value."] + #[doc = ""] + #[doc = " E.g. to do a read-modify-write sequence to change parts of a register:"] + #[doc = " ```ignore"] + #[doc = " let bits = periph.reg.modify(|r, w| {"] + #[doc = " let new_bits = r.bits() | 3;"] + #[doc = " unsafe {"] + #[doc = " w.bits(new_bits);"] + #[doc = " }"] + #[doc = ""] + #[doc = " new_bits"] + #[doc = " });"] + #[doc = " ```"] + #[doc = " or"] + #[doc = " ```ignore"] + #[doc = " periph.reg.modify(|_, w| {"] + #[doc = " w.field1().bits(newfield1bits)"] + #[doc = " .field2().set_bit()"] + #[doc = " .field3().variant(VARIANT);"] + #[doc = " });"] + #[doc = " ```"] + #[doc = " or an alternative way of saying the same:"] + #[doc = " ```ignore"] + #[doc = " periph.reg.modify(|_, w| {"] + #[doc = " w.field1().bits(newfield1bits);"] + #[doc = " w.field2().set_bit();"] + #[doc = " w.field3().variant(VARIANT);"] + #[doc = " });"] + #[doc = " ```"] + #[doc = " Other fields will have the value they had before the call to `modify`."] + #[inline(always)] + pub fn from_modify(&self, f: F) -> T + where + for<'w> F: FnOnce(&R, &'w mut W) -> T, + { + let bits = self.register.get(); + let mut writer = W { bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData }; + let result = f(&R { bits, _reg: marker::PhantomData }, &mut writer); + self.register.set(writer.bits); + result } } impl core::fmt::Debug for crate::generic::Reg diff --git a/src/generic/raw.rs b/src/generic/raw.rs index a38c3ce2..c379f871 100644 --- a/src/generic/raw.rs +++ b/src/generic/raw.rs @@ -35,6 +35,7 @@ impl BitReader { Self { bits, _reg: marker::PhantomData } } } +#[must_use = "after creating `FieldWriter` you need to call field value setting method"] pub struct FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> where REG: Writable + RegisterSpec, @@ -56,6 +57,7 @@ where Self { w, o, _field: marker::PhantomData } } } +#[must_use = "after creating `BitWriter` you need to call bit setting method"] pub struct BitWriter<'a, REG, FI = bool, M = BitM> where REG: Writable + RegisterSpec, diff --git a/src/gpdma0/chenreg.rs b/src/gpdma0/chenreg.rs index 7ded0541..c36d0223 100644 --- a/src/gpdma0/chenreg.rs +++ b/src/gpdma0/chenreg.rs @@ -74,13 +74,11 @@ impl R { impl W { #[doc = "Bits 0:7 - Enables/Disables the channel"] #[inline(always)] - #[must_use] pub fn ch(&mut self) -> CH_W { CH_W::new(self, 0) } #[doc = "Bits 8:15 - Channel enable write enable"] #[inline(always)] - #[must_use] pub fn we_ch(&mut self) -> WE_CH_W { WE_CH_W::new(self, 8) } diff --git a/src/gpdma0/clearblock.rs b/src/gpdma0/clearblock.rs index bfbfb6ae..72f2fa42 100644 --- a/src/gpdma0/clearblock.rs +++ b/src/gpdma0/clearblock.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } diff --git a/src/gpdma0/cleardsttran.rs b/src/gpdma0/cleardsttran.rs index 3dfd9a11..693b1372 100644 --- a/src/gpdma0/cleardsttran.rs +++ b/src/gpdma0/cleardsttran.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } diff --git a/src/gpdma0/clearerr.rs b/src/gpdma0/clearerr.rs index 291719fa..86f9c398 100644 --- a/src/gpdma0/clearerr.rs +++ b/src/gpdma0/clearerr.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } diff --git a/src/gpdma0/clearsrctran.rs b/src/gpdma0/clearsrctran.rs index 2f65eeec..538d2b1c 100644 --- a/src/gpdma0/clearsrctran.rs +++ b/src/gpdma0/clearsrctran.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } diff --git a/src/gpdma0/cleartfr.rs b/src/gpdma0/cleartfr.rs index 4b42e8d6..c8d8f212 100644 --- a/src/gpdma0/cleartfr.rs +++ b/src/gpdma0/cleartfr.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Clear Interrupt Status and Raw Status for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Clear Interrupt Status and Raw Status for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Clear Interrupt Status and Raw Status for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Clear Interrupt Status and Raw Status for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } diff --git a/src/gpdma0/dmacfgreg.rs b/src/gpdma0/dmacfgreg.rs index d1ab2132..4d6376b6 100644 --- a/src/gpdma0/dmacfgreg.rs +++ b/src/gpdma0/dmacfgreg.rs @@ -65,7 +65,6 @@ impl R { impl W { #[doc = "Bit 0 - GPDMA Enable bit."] #[inline(always)] - #[must_use] pub fn dma_en(&mut self) -> DMA_EN_W { DMA_EN_W::new(self, 0) } diff --git a/src/gpdma0/lstdstreg.rs b/src/gpdma0/lstdstreg.rs index dc6e398f..eff71ad3 100644 --- a/src/gpdma0/lstdstreg.rs +++ b/src/gpdma0/lstdstreg.rs @@ -719,97 +719,81 @@ impl R { impl W { #[doc = "Bit 0 - Destination last request for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Destination last request for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Destination last request for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Destination last request for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Destination last request for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Destination last request for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Destination last request for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Destination last request for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } #[doc = "Bit 8 - Destination last transaction request write enable for channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Destination last transaction request write enable for channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Destination last transaction request write enable for channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Destination last transaction request write enable for channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Destination last transaction request write enable for channel 4"] #[inline(always)] - #[must_use] pub fn we_ch4(&mut self) -> WE_CH4_W { WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Destination last transaction request write enable for channel 5"] #[inline(always)] - #[must_use] pub fn we_ch5(&mut self) -> WE_CH5_W { WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Destination last transaction request write enable for channel 6"] #[inline(always)] - #[must_use] pub fn we_ch6(&mut self) -> WE_CH6_W { WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Destination last transaction request write enable for channel 7"] #[inline(always)] - #[must_use] pub fn we_ch7(&mut self) -> WE_CH7_W { WE_CH7_W::new(self, 15) } diff --git a/src/gpdma0/lstsrcreg.rs b/src/gpdma0/lstsrcreg.rs index 35d048f3..9e44c037 100644 --- a/src/gpdma0/lstsrcreg.rs +++ b/src/gpdma0/lstsrcreg.rs @@ -719,97 +719,81 @@ impl R { impl W { #[doc = "Bit 0 - Source last request for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Source last request for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Source last request for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Source last request for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Source last request for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Source last request for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Source last request for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Source last request for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } #[doc = "Bit 8 - Source last transaction request write enable for channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source last transaction request write enable for channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source last transaction request write enable for channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source last transaction request write enable for channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Source last transaction request write enable for channel 4"] #[inline(always)] - #[must_use] pub fn we_ch4(&mut self) -> WE_CH4_W { WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Source last transaction request write enable for channel 5"] #[inline(always)] - #[must_use] pub fn we_ch5(&mut self) -> WE_CH5_W { WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Source last transaction request write enable for channel 6"] #[inline(always)] - #[must_use] pub fn we_ch6(&mut self) -> WE_CH6_W { WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Source last transaction request write enable for channel 7"] #[inline(always)] - #[must_use] pub fn we_ch7(&mut self) -> WE_CH7_W { WE_CH7_W::new(self, 15) } diff --git a/src/gpdma0/maskblock.rs b/src/gpdma0/maskblock.rs index f071f88f..2044355c 100644 --- a/src/gpdma0/maskblock.rs +++ b/src/gpdma0/maskblock.rs @@ -719,97 +719,81 @@ impl R { impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] - #[must_use] pub fn we_ch4(&mut self) -> WE_CH4_W { WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] - #[must_use] pub fn we_ch5(&mut self) -> WE_CH5_W { WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] - #[must_use] pub fn we_ch6(&mut self) -> WE_CH6_W { WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] - #[must_use] pub fn we_ch7(&mut self) -> WE_CH7_W { WE_CH7_W::new(self, 15) } diff --git a/src/gpdma0/maskdsttran.rs b/src/gpdma0/maskdsttran.rs index 2f3af5eb..ad229e31 100644 --- a/src/gpdma0/maskdsttran.rs +++ b/src/gpdma0/maskdsttran.rs @@ -719,97 +719,81 @@ impl R { impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] - #[must_use] pub fn we_ch4(&mut self) -> WE_CH4_W { WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] - #[must_use] pub fn we_ch5(&mut self) -> WE_CH5_W { WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] - #[must_use] pub fn we_ch6(&mut self) -> WE_CH6_W { WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] - #[must_use] pub fn we_ch7(&mut self) -> WE_CH7_W { WE_CH7_W::new(self, 15) } diff --git a/src/gpdma0/maskerr.rs b/src/gpdma0/maskerr.rs index 1fb515c5..b1726f47 100644 --- a/src/gpdma0/maskerr.rs +++ b/src/gpdma0/maskerr.rs @@ -719,97 +719,81 @@ impl R { impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] - #[must_use] pub fn we_ch4(&mut self) -> WE_CH4_W { WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] - #[must_use] pub fn we_ch5(&mut self) -> WE_CH5_W { WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] - #[must_use] pub fn we_ch6(&mut self) -> WE_CH6_W { WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] - #[must_use] pub fn we_ch7(&mut self) -> WE_CH7_W { WE_CH7_W::new(self, 15) } diff --git a/src/gpdma0/masksrctran.rs b/src/gpdma0/masksrctran.rs index 04b9d9c1..d1bd1c00 100644 --- a/src/gpdma0/masksrctran.rs +++ b/src/gpdma0/masksrctran.rs @@ -719,97 +719,81 @@ impl R { impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] - #[must_use] pub fn we_ch4(&mut self) -> WE_CH4_W { WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] - #[must_use] pub fn we_ch5(&mut self) -> WE_CH5_W { WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] - #[must_use] pub fn we_ch6(&mut self) -> WE_CH6_W { WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] - #[must_use] pub fn we_ch7(&mut self) -> WE_CH7_W { WE_CH7_W::new(self, 15) } diff --git a/src/gpdma0/masktfr.rs b/src/gpdma0/masktfr.rs index a5c3842b..05ede0c3 100644 --- a/src/gpdma0/masktfr.rs +++ b/src/gpdma0/masktfr.rs @@ -719,97 +719,81 @@ impl R { impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Mask bit for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Mask bit for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Mask bit for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Mask bit for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Write enable for mask bit of channel 4"] #[inline(always)] - #[must_use] pub fn we_ch4(&mut self) -> WE_CH4_W { WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Write enable for mask bit of channel 5"] #[inline(always)] - #[must_use] pub fn we_ch5(&mut self) -> WE_CH5_W { WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Write enable for mask bit of channel 6"] #[inline(always)] - #[must_use] pub fn we_ch6(&mut self) -> WE_CH6_W { WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Write enable for mask bit of channel 7"] #[inline(always)] - #[must_use] pub fn we_ch7(&mut self) -> WE_CH7_W { WE_CH7_W::new(self, 15) } diff --git a/src/gpdma0/rawblock.rs b/src/gpdma0/rawblock.rs index b54478a3..0925ac07 100644 --- a/src/gpdma0/rawblock.rs +++ b/src/gpdma0/rawblock.rs @@ -79,49 +79,41 @@ impl R { impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } diff --git a/src/gpdma0/rawdsttran.rs b/src/gpdma0/rawdsttran.rs index c3634201..e813016e 100644 --- a/src/gpdma0/rawdsttran.rs +++ b/src/gpdma0/rawdsttran.rs @@ -79,49 +79,41 @@ impl R { impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } diff --git a/src/gpdma0/rawerr.rs b/src/gpdma0/rawerr.rs index b281e2e6..8297efcc 100644 --- a/src/gpdma0/rawerr.rs +++ b/src/gpdma0/rawerr.rs @@ -79,49 +79,41 @@ impl R { impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } diff --git a/src/gpdma0/rawsrctran.rs b/src/gpdma0/rawsrctran.rs index 8519037d..40a86155 100644 --- a/src/gpdma0/rawsrctran.rs +++ b/src/gpdma0/rawsrctran.rs @@ -79,49 +79,41 @@ impl R { impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } diff --git a/src/gpdma0/rawtfr.rs b/src/gpdma0/rawtfr.rs index 6371ebb5..86619c4b 100644 --- a/src/gpdma0/rawtfr.rs +++ b/src/gpdma0/rawtfr.rs @@ -79,49 +79,41 @@ impl R { impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Raw Interrupt Status for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Raw Interrupt Status for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Raw Interrupt Status for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Raw Interrupt Status for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } diff --git a/src/gpdma0/reqdstreg.rs b/src/gpdma0/reqdstreg.rs index c721b3dd..6a4a149f 100644 --- a/src/gpdma0/reqdstreg.rs +++ b/src/gpdma0/reqdstreg.rs @@ -327,97 +327,81 @@ impl R { impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Source request write enable for channel 4"] #[inline(always)] - #[must_use] pub fn we_ch4(&mut self) -> WE_CH4_W { WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Source request write enable for channel 5"] #[inline(always)] - #[must_use] pub fn we_ch5(&mut self) -> WE_CH5_W { WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Source request write enable for channel 6"] #[inline(always)] - #[must_use] pub fn we_ch6(&mut self) -> WE_CH6_W { WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Source request write enable for channel 7"] #[inline(always)] - #[must_use] pub fn we_ch7(&mut self) -> WE_CH7_W { WE_CH7_W::new(self, 15) } diff --git a/src/gpdma0/reqsrcreg.rs b/src/gpdma0/reqsrcreg.rs index f0bbf157..1be2fe6c 100644 --- a/src/gpdma0/reqsrcreg.rs +++ b/src/gpdma0/reqsrcreg.rs @@ -327,97 +327,81 @@ impl R { impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Source request write enable for channel 4"] #[inline(always)] - #[must_use] pub fn we_ch4(&mut self) -> WE_CH4_W { WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Source request write enable for channel 5"] #[inline(always)] - #[must_use] pub fn we_ch5(&mut self) -> WE_CH5_W { WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Source request write enable for channel 6"] #[inline(always)] - #[must_use] pub fn we_ch6(&mut self) -> WE_CH6_W { WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Source request write enable for channel 7"] #[inline(always)] - #[must_use] pub fn we_ch7(&mut self) -> WE_CH7_W { WE_CH7_W::new(self, 15) } diff --git a/src/gpdma0/sglreqdstreg.rs b/src/gpdma0/sglreqdstreg.rs index 674f2e69..fef7f70e 100644 --- a/src/gpdma0/sglreqdstreg.rs +++ b/src/gpdma0/sglreqdstreg.rs @@ -327,97 +327,81 @@ impl R { impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Source request write enable for channel 4"] #[inline(always)] - #[must_use] pub fn we_ch4(&mut self) -> WE_CH4_W { WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Source request write enable for channel 5"] #[inline(always)] - #[must_use] pub fn we_ch5(&mut self) -> WE_CH5_W { WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Source request write enable for channel 6"] #[inline(always)] - #[must_use] pub fn we_ch6(&mut self) -> WE_CH6_W { WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Source request write enable for channel 7"] #[inline(always)] - #[must_use] pub fn we_ch7(&mut self) -> WE_CH7_W { WE_CH7_W::new(self, 15) } diff --git a/src/gpdma0/sglreqsrcreg.rs b/src/gpdma0/sglreqsrcreg.rs index ef731c5c..ca4d00b3 100644 --- a/src/gpdma0/sglreqsrcreg.rs +++ b/src/gpdma0/sglreqsrcreg.rs @@ -327,97 +327,81 @@ impl R { impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 4 - Source request for channel 4"] #[inline(always)] - #[must_use] pub fn ch4(&mut self) -> CH4_W { CH4_W::new(self, 4) } #[doc = "Bit 5 - Source request for channel 5"] #[inline(always)] - #[must_use] pub fn ch5(&mut self) -> CH5_W { CH5_W::new(self, 5) } #[doc = "Bit 6 - Source request for channel 6"] #[inline(always)] - #[must_use] pub fn ch6(&mut self) -> CH6_W { CH6_W::new(self, 6) } #[doc = "Bit 7 - Source request for channel 7"] #[inline(always)] - #[must_use] pub fn ch7(&mut self) -> CH7_W { CH7_W::new(self, 7) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } #[doc = "Bit 12 - Source request write enable for channel 4"] #[inline(always)] - #[must_use] pub fn we_ch4(&mut self) -> WE_CH4_W { WE_CH4_W::new(self, 12) } #[doc = "Bit 13 - Source request write enable for channel 5"] #[inline(always)] - #[must_use] pub fn we_ch5(&mut self) -> WE_CH5_W { WE_CH5_W::new(self, 13) } #[doc = "Bit 14 - Source request write enable for channel 6"] #[inline(always)] - #[must_use] pub fn we_ch6(&mut self) -> WE_CH6_W { WE_CH6_W::new(self, 14) } #[doc = "Bit 15 - Source request write enable for channel 7"] #[inline(always)] - #[must_use] pub fn we_ch7(&mut self) -> WE_CH7_W { WE_CH7_W::new(self, 15) } diff --git a/src/gpdma0_ch0/cfgh.rs b/src/gpdma0_ch0/cfgh.rs index 8de6142d..542ddfcc 100644 --- a/src/gpdma0_ch0/cfgh.rs +++ b/src/gpdma0_ch0/cfgh.rs @@ -168,43 +168,36 @@ impl R { impl W { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] - #[must_use] pub fn fcmode(&mut self) -> FCMODE_W { FCMODE_W::new(self, 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] - #[must_use] pub fn fifo_mode(&mut self) -> FIFO_MODE_W { FIFO_MODE_W::new(self, 1) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] - #[must_use] pub fn protctl(&mut self) -> PROTCTL_W { PROTCTL_W::new(self, 2) } #[doc = "Bit 5 - Destination Status Update Enable"] #[inline(always)] - #[must_use] pub fn ds_upd_en(&mut self) -> DS_UPD_EN_W { DS_UPD_EN_W::new(self, 5) } #[doc = "Bit 6 - Source Status Update Enable"] #[inline(always)] - #[must_use] pub fn ss_upd_en(&mut self) -> SS_UPD_EN_W { SS_UPD_EN_W::new(self, 6) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] - #[must_use] pub fn src_per(&mut self) -> SRC_PER_W { SRC_PER_W::new(self, 7) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] - #[must_use] pub fn dest_per(&mut self) -> DEST_PER_W { DEST_PER_W::new(self, 11) } diff --git a/src/gpdma0_ch0/cfgl.rs b/src/gpdma0_ch0/cfgl.rs index 4fbe0d80..aa4bb3aa 100644 --- a/src/gpdma0_ch0/cfgl.rs +++ b/src/gpdma0_ch0/cfgl.rs @@ -548,79 +548,66 @@ impl R { impl W { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] - #[must_use] pub fn ch_prior(&mut self) -> CH_PRIOR_W { CH_PRIOR_W::new(self, 5) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] - #[must_use] pub fn ch_susp(&mut self) -> CH_SUSP_W { CH_SUSP_W::new(self, 8) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] - #[must_use] pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W { HS_SEL_DST_W::new(self, 10) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] - #[must_use] pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W { HS_SEL_SRC_W::new(self, 11) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] - #[must_use] pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W { LOCK_CH_L_W::new(self, 12) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] - #[must_use] pub fn lock_b_l(&mut self) -> LOCK_B_L_W { LOCK_B_L_W::new(self, 14) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] - #[must_use] pub fn lock_ch(&mut self) -> LOCK_CH_W { LOCK_CH_W::new(self, 16) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] - #[must_use] pub fn lock_b(&mut self) -> LOCK_B_W { LOCK_B_W::new(self, 17) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] - #[must_use] pub fn dst_hs_pol(&mut self) -> DST_HS_POL_W { DST_HS_POL_W::new(self, 18) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] - #[must_use] pub fn src_hs_pol(&mut self) -> SRC_HS_POL_W { SRC_HS_POL_W::new(self, 19) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] - #[must_use] pub fn max_abrst(&mut self) -> MAX_ABRST_W { MAX_ABRST_W::new(self, 20) } #[doc = "Bit 30 - Automatic Source Reload"] #[inline(always)] - #[must_use] pub fn reload_src(&mut self) -> RELOAD_SRC_W { RELOAD_SRC_W::new(self, 30) } #[doc = "Bit 31 - Automatic Destination Reload"] #[inline(always)] - #[must_use] pub fn reload_dst(&mut self) -> RELOAD_DST_W { RELOAD_DST_W::new(self, 31) } diff --git a/src/gpdma0_ch0/ctlh.rs b/src/gpdma0_ch0/ctlh.rs index b458bd15..c743ee96 100644 --- a/src/gpdma0_ch0/ctlh.rs +++ b/src/gpdma0_ch0/ctlh.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] - #[must_use] pub fn block_ts(&mut self) -> BLOCK_TS_W { BLOCK_TS_W::new(self, 0) } #[doc = "Bit 12 - Done bit"] #[inline(always)] - #[must_use] pub fn done(&mut self) -> DONE_W { DONE_W::new(self, 12) } diff --git a/src/gpdma0_ch0/ctll.rs b/src/gpdma0_ch0/ctll.rs index de26965e..72dac3b8 100644 --- a/src/gpdma0_ch0/ctll.rs +++ b/src/gpdma0_ch0/ctll.rs @@ -351,73 +351,61 @@ impl R { impl W { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] - #[must_use] pub fn int_en(&mut self) -> INT_EN_W { INT_EN_W::new(self, 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] - #[must_use] pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W { DST_TR_WIDTH_W::new(self, 1) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] - #[must_use] pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W { SRC_TR_WIDTH_W::new(self, 4) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] - #[must_use] pub fn dinc(&mut self) -> DINC_W { DINC_W::new(self, 7) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] - #[must_use] pub fn sinc(&mut self) -> SINC_W { SINC_W::new(self, 9) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] - #[must_use] pub fn dest_msize(&mut self) -> DEST_MSIZE_W { DEST_MSIZE_W::new(self, 11) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] - #[must_use] pub fn src_msize(&mut self) -> SRC_MSIZE_W { SRC_MSIZE_W::new(self, 14) } #[doc = "Bit 17 - Source gather enable"] #[inline(always)] - #[must_use] pub fn src_gather_en(&mut self) -> SRC_GATHER_EN_W { SRC_GATHER_EN_W::new(self, 17) } #[doc = "Bit 18 - Destination scatter enable"] #[inline(always)] - #[must_use] pub fn dst_scatter_en(&mut self) -> DST_SCATTER_EN_W { DST_SCATTER_EN_W::new(self, 18) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] - #[must_use] pub fn tt_fc(&mut self) -> TT_FC_W { TT_FC_W::new(self, 20) } #[doc = "Bit 27 - Linked List Pointer for Destination Enable"] #[inline(always)] - #[must_use] pub fn llp_dst_en(&mut self) -> LLP_DST_EN_W { LLP_DST_EN_W::new(self, 27) } #[doc = "Bit 28 - Linked List Pointer for Source Enable"] #[inline(always)] - #[must_use] pub fn llp_src_en(&mut self) -> LLP_SRC_EN_W { LLP_SRC_EN_W::new(self, 28) } diff --git a/src/gpdma0_ch0/dar.rs b/src/gpdma0_ch0/dar.rs index 31720911..3b0869d6 100644 --- a/src/gpdma0_ch0/dar.rs +++ b/src/gpdma0_ch0/dar.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] - #[must_use] pub fn dar(&mut self) -> DAR_W { DAR_W::new(self, 0) } diff --git a/src/gpdma0_ch0/dsr.rs b/src/gpdma0_ch0/dsr.rs index 83029db0..d1e6c4f4 100644 --- a/src/gpdma0_ch0/dsr.rs +++ b/src/gpdma0_ch0/dsr.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:19 - Destination scatter interval"] #[inline(always)] - #[must_use] pub fn dsi(&mut self) -> DSI_W { DSI_W::new(self, 0) } #[doc = "Bits 20:31 - Destination scatter count"] #[inline(always)] - #[must_use] pub fn dsc(&mut self) -> DSC_W { DSC_W::new(self, 20) } diff --git a/src/gpdma0_ch0/dstat.rs b/src/gpdma0_ch0/dstat.rs index 60769385..c75d5dc9 100644 --- a/src/gpdma0_ch0/dstat.rs +++ b/src/gpdma0_ch0/dstat.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Destination Status"] #[inline(always)] - #[must_use] pub fn dstat(&mut self) -> DSTAT_W { DSTAT_W::new(self, 0) } diff --git a/src/gpdma0_ch0/dstatar.rs b/src/gpdma0_ch0/dstatar.rs index 8bd34d67..afac1c84 100644 --- a/src/gpdma0_ch0/dstatar.rs +++ b/src/gpdma0_ch0/dstatar.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Destination Status Address"] #[inline(always)] - #[must_use] pub fn dstatar(&mut self) -> DSTATAR_W { DSTATAR_W::new(self, 0) } diff --git a/src/gpdma0_ch0/llp.rs b/src/gpdma0_ch0/llp.rs index 421ae8ab..e64969b4 100644 --- a/src/gpdma0_ch0/llp.rs +++ b/src/gpdma0_ch0/llp.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 2:31 - Starting Address In Memory"] #[inline(always)] - #[must_use] pub fn loc(&mut self) -> LOC_W { LOC_W::new(self, 2) } diff --git a/src/gpdma0_ch0/sar.rs b/src/gpdma0_ch0/sar.rs index c932fdd2..ae33a3e6 100644 --- a/src/gpdma0_ch0/sar.rs +++ b/src/gpdma0_ch0/sar.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] - #[must_use] pub fn sar(&mut self) -> SAR_W { SAR_W::new(self, 0) } diff --git a/src/gpdma0_ch0/sgr.rs b/src/gpdma0_ch0/sgr.rs index f1c1179a..7116a510 100644 --- a/src/gpdma0_ch0/sgr.rs +++ b/src/gpdma0_ch0/sgr.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:19 - Source gather interval"] #[inline(always)] - #[must_use] pub fn sgi(&mut self) -> SGI_W { SGI_W::new(self, 0) } #[doc = "Bits 20:31 - Source gather count"] #[inline(always)] - #[must_use] pub fn sgc(&mut self) -> SGC_W { SGC_W::new(self, 20) } diff --git a/src/gpdma0_ch0/sstat.rs b/src/gpdma0_ch0/sstat.rs index 34527e7c..9a5f5eb6 100644 --- a/src/gpdma0_ch0/sstat.rs +++ b/src/gpdma0_ch0/sstat.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Source Status"] #[inline(always)] - #[must_use] pub fn sstat(&mut self) -> SSTAT_W { SSTAT_W::new(self, 0) } diff --git a/src/gpdma0_ch0/sstatar.rs b/src/gpdma0_ch0/sstatar.rs index 0b5e1a48..ab1efca8 100644 --- a/src/gpdma0_ch0/sstatar.rs +++ b/src/gpdma0_ch0/sstatar.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Source Status Address"] #[inline(always)] - #[must_use] pub fn sstatar(&mut self) -> SSTATAR_W { SSTATAR_W::new(self, 0) } diff --git a/src/gpdma0_ch2/cfgh.rs b/src/gpdma0_ch2/cfgh.rs index df3ebf0c..a11bf0dc 100644 --- a/src/gpdma0_ch2/cfgh.rs +++ b/src/gpdma0_ch2/cfgh.rs @@ -150,31 +150,26 @@ impl R { impl W { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] - #[must_use] pub fn fcmode(&mut self) -> FCMODE_W { FCMODE_W::new(self, 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] - #[must_use] pub fn fifo_mode(&mut self) -> FIFO_MODE_W { FIFO_MODE_W::new(self, 1) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] - #[must_use] pub fn protctl(&mut self) -> PROTCTL_W { PROTCTL_W::new(self, 2) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] - #[must_use] pub fn src_per(&mut self) -> SRC_PER_W { SRC_PER_W::new(self, 7) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] - #[must_use] pub fn dest_per(&mut self) -> DEST_PER_W { DEST_PER_W::new(self, 11) } diff --git a/src/gpdma0_ch2/cfgl.rs b/src/gpdma0_ch2/cfgl.rs index 1dd2d4e2..95c31393 100644 --- a/src/gpdma0_ch2/cfgl.rs +++ b/src/gpdma0_ch2/cfgl.rs @@ -530,67 +530,56 @@ impl R { impl W { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] - #[must_use] pub fn ch_prior(&mut self) -> CH_PRIOR_W { CH_PRIOR_W::new(self, 5) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] - #[must_use] pub fn ch_susp(&mut self) -> CH_SUSP_W { CH_SUSP_W::new(self, 8) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] - #[must_use] pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W { HS_SEL_DST_W::new(self, 10) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] - #[must_use] pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W { HS_SEL_SRC_W::new(self, 11) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] - #[must_use] pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W { LOCK_CH_L_W::new(self, 12) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] - #[must_use] pub fn lock_b_l(&mut self) -> LOCK_B_L_W { LOCK_B_L_W::new(self, 14) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] - #[must_use] pub fn lock_ch(&mut self) -> LOCK_CH_W { LOCK_CH_W::new(self, 16) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] - #[must_use] pub fn lock_b(&mut self) -> LOCK_B_W { LOCK_B_W::new(self, 17) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] - #[must_use] pub fn dst_hs_pol(&mut self) -> DST_HS_POL_W { DST_HS_POL_W::new(self, 18) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] - #[must_use] pub fn src_hs_pol(&mut self) -> SRC_HS_POL_W { SRC_HS_POL_W::new(self, 19) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] - #[must_use] pub fn max_abrst(&mut self) -> MAX_ABRST_W { MAX_ABRST_W::new(self, 20) } diff --git a/src/gpdma0_ch2/ctlh.rs b/src/gpdma0_ch2/ctlh.rs index b458bd15..c743ee96 100644 --- a/src/gpdma0_ch2/ctlh.rs +++ b/src/gpdma0_ch2/ctlh.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] - #[must_use] pub fn block_ts(&mut self) -> BLOCK_TS_W { BLOCK_TS_W::new(self, 0) } #[doc = "Bit 12 - Done bit"] #[inline(always)] - #[must_use] pub fn done(&mut self) -> DONE_W { DONE_W::new(self, 12) } diff --git a/src/gpdma0_ch2/ctll.rs b/src/gpdma0_ch2/ctll.rs index b33e26ae..e08d6467 100644 --- a/src/gpdma0_ch2/ctll.rs +++ b/src/gpdma0_ch2/ctll.rs @@ -217,49 +217,41 @@ impl R { impl W { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] - #[must_use] pub fn int_en(&mut self) -> INT_EN_W { INT_EN_W::new(self, 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] - #[must_use] pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W { DST_TR_WIDTH_W::new(self, 1) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] - #[must_use] pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W { SRC_TR_WIDTH_W::new(self, 4) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] - #[must_use] pub fn dinc(&mut self) -> DINC_W { DINC_W::new(self, 7) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] - #[must_use] pub fn sinc(&mut self) -> SINC_W { SINC_W::new(self, 9) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] - #[must_use] pub fn dest_msize(&mut self) -> DEST_MSIZE_W { DEST_MSIZE_W::new(self, 11) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] - #[must_use] pub fn src_msize(&mut self) -> SRC_MSIZE_W { SRC_MSIZE_W::new(self, 14) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] - #[must_use] pub fn tt_fc(&mut self) -> TT_FC_W { TT_FC_W::new(self, 20) } diff --git a/src/gpdma0_ch2/dar.rs b/src/gpdma0_ch2/dar.rs index 31720911..3b0869d6 100644 --- a/src/gpdma0_ch2/dar.rs +++ b/src/gpdma0_ch2/dar.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] - #[must_use] pub fn dar(&mut self) -> DAR_W { DAR_W::new(self, 0) } diff --git a/src/gpdma0_ch2/sar.rs b/src/gpdma0_ch2/sar.rs index c932fdd2..ae33a3e6 100644 --- a/src/gpdma0_ch2/sar.rs +++ b/src/gpdma0_ch2/sar.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] - #[must_use] pub fn sar(&mut self) -> SAR_W { SAR_W::new(self, 0) } diff --git a/src/gpdma1/chenreg.rs b/src/gpdma1/chenreg.rs index 5b5f5ad0..c0acb74b 100644 --- a/src/gpdma1/chenreg.rs +++ b/src/gpdma1/chenreg.rs @@ -74,13 +74,11 @@ impl R { impl W { #[doc = "Bits 0:3 - Enables/Disables the channel"] #[inline(always)] - #[must_use] pub fn ch(&mut self) -> CH_W { CH_W::new(self, 0) } #[doc = "Bits 8:11 - Channel enable write enable"] #[inline(always)] - #[must_use] pub fn we_ch(&mut self) -> WE_CH_W { WE_CH_W::new(self, 8) } diff --git a/src/gpdma1/clearblock.rs b/src/gpdma1/clearblock.rs index 3ced7189..8b088948 100644 --- a/src/gpdma1/clearblock.rs +++ b/src/gpdma1/clearblock.rs @@ -127,25 +127,21 @@ where impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } diff --git a/src/gpdma1/cleardsttran.rs b/src/gpdma1/cleardsttran.rs index 67cc62db..48548205 100644 --- a/src/gpdma1/cleardsttran.rs +++ b/src/gpdma1/cleardsttran.rs @@ -127,25 +127,21 @@ where impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } diff --git a/src/gpdma1/clearerr.rs b/src/gpdma1/clearerr.rs index eb21e370..a8c97902 100644 --- a/src/gpdma1/clearerr.rs +++ b/src/gpdma1/clearerr.rs @@ -127,25 +127,21 @@ where impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } diff --git a/src/gpdma1/clearsrctran.rs b/src/gpdma1/clearsrctran.rs index 9ad9ebe7..c3e31750 100644 --- a/src/gpdma1/clearsrctran.rs +++ b/src/gpdma1/clearsrctran.rs @@ -127,25 +127,21 @@ where impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } diff --git a/src/gpdma1/cleartfr.rs b/src/gpdma1/cleartfr.rs index cd2ab7cd..4f7a82c1 100644 --- a/src/gpdma1/cleartfr.rs +++ b/src/gpdma1/cleartfr.rs @@ -127,25 +127,21 @@ where impl W { #[doc = "Bit 0 - Clear Interrupt Status and Raw Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Clear Interrupt Status and Raw Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Clear Interrupt Status and Raw Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Clear Interrupt Status and Raw Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } diff --git a/src/gpdma1/dmacfgreg.rs b/src/gpdma1/dmacfgreg.rs index d1ab2132..4d6376b6 100644 --- a/src/gpdma1/dmacfgreg.rs +++ b/src/gpdma1/dmacfgreg.rs @@ -65,7 +65,6 @@ impl R { impl W { #[doc = "Bit 0 - GPDMA Enable bit."] #[inline(always)] - #[must_use] pub fn dma_en(&mut self) -> DMA_EN_W { DMA_EN_W::new(self, 0) } diff --git a/src/gpdma1/lstdstreg.rs b/src/gpdma1/lstdstreg.rs index 88ad2d8d..22290657 100644 --- a/src/gpdma1/lstdstreg.rs +++ b/src/gpdma1/lstdstreg.rs @@ -363,49 +363,41 @@ impl R { impl W { #[doc = "Bit 0 - Destination last request for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Destination last request for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Destination last request for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Destination last request for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 8 - Destination last transaction request write enable for channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Destination last transaction request write enable for channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Destination last transaction request write enable for channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Destination last transaction request write enable for channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } diff --git a/src/gpdma1/lstsrcreg.rs b/src/gpdma1/lstsrcreg.rs index 4f305fe6..99146e70 100644 --- a/src/gpdma1/lstsrcreg.rs +++ b/src/gpdma1/lstsrcreg.rs @@ -363,49 +363,41 @@ impl R { impl W { #[doc = "Bit 0 - Source last request for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Source last request for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Source last request for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Source last request for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 8 - Source last transaction request write enable for channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source last transaction request write enable for channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source last transaction request write enable for channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source last transaction request write enable for channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } diff --git a/src/gpdma1/maskblock.rs b/src/gpdma1/maskblock.rs index a42c7044..81c0e269 100644 --- a/src/gpdma1/maskblock.rs +++ b/src/gpdma1/maskblock.rs @@ -363,49 +363,41 @@ impl R { impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } diff --git a/src/gpdma1/maskdsttran.rs b/src/gpdma1/maskdsttran.rs index 82ca59c5..85e5f891 100644 --- a/src/gpdma1/maskdsttran.rs +++ b/src/gpdma1/maskdsttran.rs @@ -363,49 +363,41 @@ impl R { impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } diff --git a/src/gpdma1/maskerr.rs b/src/gpdma1/maskerr.rs index 697eed15..bb33b9fa 100644 --- a/src/gpdma1/maskerr.rs +++ b/src/gpdma1/maskerr.rs @@ -363,49 +363,41 @@ impl R { impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } diff --git a/src/gpdma1/masksrctran.rs b/src/gpdma1/masksrctran.rs index 435b8cc6..29537fc2 100644 --- a/src/gpdma1/masksrctran.rs +++ b/src/gpdma1/masksrctran.rs @@ -363,49 +363,41 @@ impl R { impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } diff --git a/src/gpdma1/masktfr.rs b/src/gpdma1/masktfr.rs index 44b42326..f090b3d9 100644 --- a/src/gpdma1/masktfr.rs +++ b/src/gpdma1/masktfr.rs @@ -363,49 +363,41 @@ impl R { impl W { #[doc = "Bit 0 - Mask bit for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Mask bit for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Mask bit for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Mask bit for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 8 - Write enable for mask bit of channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Write enable for mask bit of channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Write enable for mask bit of channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Write enable for mask bit of channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } diff --git a/src/gpdma1/rawblock.rs b/src/gpdma1/rawblock.rs index b0064038..34eddbfa 100644 --- a/src/gpdma1/rawblock.rs +++ b/src/gpdma1/rawblock.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } diff --git a/src/gpdma1/rawdsttran.rs b/src/gpdma1/rawdsttran.rs index 5f855ff3..ecec441d 100644 --- a/src/gpdma1/rawdsttran.rs +++ b/src/gpdma1/rawdsttran.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } diff --git a/src/gpdma1/rawerr.rs b/src/gpdma1/rawerr.rs index d03853e4..3ead41b7 100644 --- a/src/gpdma1/rawerr.rs +++ b/src/gpdma1/rawerr.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } diff --git a/src/gpdma1/rawsrctran.rs b/src/gpdma1/rawsrctran.rs index cb967b28..92955ab0 100644 --- a/src/gpdma1/rawsrctran.rs +++ b/src/gpdma1/rawsrctran.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } diff --git a/src/gpdma1/rawtfr.rs b/src/gpdma1/rawtfr.rs index cda1bd39..6bde762a 100644 --- a/src/gpdma1/rawtfr.rs +++ b/src/gpdma1/rawtfr.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bit 0 - Raw Interrupt Status for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Raw Interrupt Status for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Raw Interrupt Status for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Raw Interrupt Status for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } diff --git a/src/gpdma1/reqdstreg.rs b/src/gpdma1/reqdstreg.rs index 6f88fb97..a0bad53d 100644 --- a/src/gpdma1/reqdstreg.rs +++ b/src/gpdma1/reqdstreg.rs @@ -167,49 +167,41 @@ impl R { impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } diff --git a/src/gpdma1/reqsrcreg.rs b/src/gpdma1/reqsrcreg.rs index 552d2e54..599b66b2 100644 --- a/src/gpdma1/reqsrcreg.rs +++ b/src/gpdma1/reqsrcreg.rs @@ -167,49 +167,41 @@ impl R { impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } diff --git a/src/gpdma1/sglreqdstreg.rs b/src/gpdma1/sglreqdstreg.rs index 1920a017..cc35269d 100644 --- a/src/gpdma1/sglreqdstreg.rs +++ b/src/gpdma1/sglreqdstreg.rs @@ -167,49 +167,41 @@ impl R { impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } diff --git a/src/gpdma1/sglreqsrcreg.rs b/src/gpdma1/sglreqsrcreg.rs index 108316d3..fa9cd68c 100644 --- a/src/gpdma1/sglreqsrcreg.rs +++ b/src/gpdma1/sglreqsrcreg.rs @@ -167,49 +167,41 @@ impl R { impl W { #[doc = "Bit 0 - Source request for channel 0"] #[inline(always)] - #[must_use] pub fn ch0(&mut self) -> CH0_W { CH0_W::new(self, 0) } #[doc = "Bit 1 - Source request for channel 1"] #[inline(always)] - #[must_use] pub fn ch1(&mut self) -> CH1_W { CH1_W::new(self, 1) } #[doc = "Bit 2 - Source request for channel 2"] #[inline(always)] - #[must_use] pub fn ch2(&mut self) -> CH2_W { CH2_W::new(self, 2) } #[doc = "Bit 3 - Source request for channel 3"] #[inline(always)] - #[must_use] pub fn ch3(&mut self) -> CH3_W { CH3_W::new(self, 3) } #[doc = "Bit 8 - Source request write enable for channel 0"] #[inline(always)] - #[must_use] pub fn we_ch0(&mut self) -> WE_CH0_W { WE_CH0_W::new(self, 8) } #[doc = "Bit 9 - Source request write enable for channel 1"] #[inline(always)] - #[must_use] pub fn we_ch1(&mut self) -> WE_CH1_W { WE_CH1_W::new(self, 9) } #[doc = "Bit 10 - Source request write enable for channel 2"] #[inline(always)] - #[must_use] pub fn we_ch2(&mut self) -> WE_CH2_W { WE_CH2_W::new(self, 10) } #[doc = "Bit 11 - Source request write enable for channel 3"] #[inline(always)] - #[must_use] pub fn we_ch3(&mut self) -> WE_CH3_W { WE_CH3_W::new(self, 11) } diff --git a/src/gpdma1_ch0/cfgh.rs b/src/gpdma1_ch0/cfgh.rs index df3ebf0c..a11bf0dc 100644 --- a/src/gpdma1_ch0/cfgh.rs +++ b/src/gpdma1_ch0/cfgh.rs @@ -150,31 +150,26 @@ impl R { impl W { #[doc = "Bit 0 - Flow Control Mode"] #[inline(always)] - #[must_use] pub fn fcmode(&mut self) -> FCMODE_W { FCMODE_W::new(self, 0) } #[doc = "Bit 1 - FIFO Mode Select"] #[inline(always)] - #[must_use] pub fn fifo_mode(&mut self) -> FIFO_MODE_W { FIFO_MODE_W::new(self, 1) } #[doc = "Bits 2:4 - Protection Control"] #[inline(always)] - #[must_use] pub fn protctl(&mut self) -> PROTCTL_W { PROTCTL_W::new(self, 2) } #[doc = "Bits 7:10 - Source Peripheral"] #[inline(always)] - #[must_use] pub fn src_per(&mut self) -> SRC_PER_W { SRC_PER_W::new(self, 7) } #[doc = "Bits 11:14 - Destination Peripheral"] #[inline(always)] - #[must_use] pub fn dest_per(&mut self) -> DEST_PER_W { DEST_PER_W::new(self, 11) } diff --git a/src/gpdma1_ch0/cfgl.rs b/src/gpdma1_ch0/cfgl.rs index 1dd2d4e2..95c31393 100644 --- a/src/gpdma1_ch0/cfgl.rs +++ b/src/gpdma1_ch0/cfgl.rs @@ -530,67 +530,56 @@ impl R { impl W { #[doc = "Bits 5:7 - Channel priority"] #[inline(always)] - #[must_use] pub fn ch_prior(&mut self) -> CH_PRIOR_W { CH_PRIOR_W::new(self, 5) } #[doc = "Bit 8 - Channel Suspend"] #[inline(always)] - #[must_use] pub fn ch_susp(&mut self) -> CH_SUSP_W { CH_SUSP_W::new(self, 8) } #[doc = "Bit 10 - Destination Software or Hardware Handshaking Select"] #[inline(always)] - #[must_use] pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W { HS_SEL_DST_W::new(self, 10) } #[doc = "Bit 11 - Source Software or Hardware Handshaking Select"] #[inline(always)] - #[must_use] pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W { HS_SEL_SRC_W::new(self, 11) } #[doc = "Bits 12:13 - Channel Lock Level"] #[inline(always)] - #[must_use] pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W { LOCK_CH_L_W::new(self, 12) } #[doc = "Bits 14:15 - Bus Lock Level"] #[inline(always)] - #[must_use] pub fn lock_b_l(&mut self) -> LOCK_B_L_W { LOCK_B_L_W::new(self, 14) } #[doc = "Bit 16 - Channel Lock Bit"] #[inline(always)] - #[must_use] pub fn lock_ch(&mut self) -> LOCK_CH_W { LOCK_CH_W::new(self, 16) } #[doc = "Bit 17 - Bus Lock Bit"] #[inline(always)] - #[must_use] pub fn lock_b(&mut self) -> LOCK_B_W { LOCK_B_W::new(self, 17) } #[doc = "Bit 18 - Destination Handshaking Interface Polarity"] #[inline(always)] - #[must_use] pub fn dst_hs_pol(&mut self) -> DST_HS_POL_W { DST_HS_POL_W::new(self, 18) } #[doc = "Bit 19 - Source Handshaking Interface Polarity"] #[inline(always)] - #[must_use] pub fn src_hs_pol(&mut self) -> SRC_HS_POL_W { SRC_HS_POL_W::new(self, 19) } #[doc = "Bits 20:29 - Maximum AMBA Burst Length"] #[inline(always)] - #[must_use] pub fn max_abrst(&mut self) -> MAX_ABRST_W { MAX_ABRST_W::new(self, 20) } diff --git a/src/gpdma1_ch0/ctlh.rs b/src/gpdma1_ch0/ctlh.rs index b458bd15..c743ee96 100644 --- a/src/gpdma1_ch0/ctlh.rs +++ b/src/gpdma1_ch0/ctlh.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:11 - Block Transfer Size"] #[inline(always)] - #[must_use] pub fn block_ts(&mut self) -> BLOCK_TS_W { BLOCK_TS_W::new(self, 0) } #[doc = "Bit 12 - Done bit"] #[inline(always)] - #[must_use] pub fn done(&mut self) -> DONE_W { DONE_W::new(self, 12) } diff --git a/src/gpdma1_ch0/ctll.rs b/src/gpdma1_ch0/ctll.rs index b33e26ae..e08d6467 100644 --- a/src/gpdma1_ch0/ctll.rs +++ b/src/gpdma1_ch0/ctll.rs @@ -217,49 +217,41 @@ impl R { impl W { #[doc = "Bit 0 - Interrupt Enable Bit"] #[inline(always)] - #[must_use] pub fn int_en(&mut self) -> INT_EN_W { INT_EN_W::new(self, 0) } #[doc = "Bits 1:3 - Destination Transfer Width"] #[inline(always)] - #[must_use] pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W { DST_TR_WIDTH_W::new(self, 1) } #[doc = "Bits 4:6 - Source Transfer Width"] #[inline(always)] - #[must_use] pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W { SRC_TR_WIDTH_W::new(self, 4) } #[doc = "Bits 7:8 - Destination Address Increment"] #[inline(always)] - #[must_use] pub fn dinc(&mut self) -> DINC_W { DINC_W::new(self, 7) } #[doc = "Bits 9:10 - Source Address Increment"] #[inline(always)] - #[must_use] pub fn sinc(&mut self) -> SINC_W { SINC_W::new(self, 9) } #[doc = "Bits 11:13 - Destination Burst Transaction Length"] #[inline(always)] - #[must_use] pub fn dest_msize(&mut self) -> DEST_MSIZE_W { DEST_MSIZE_W::new(self, 11) } #[doc = "Bits 14:16 - Source Burst Transaction Length"] #[inline(always)] - #[must_use] pub fn src_msize(&mut self) -> SRC_MSIZE_W { SRC_MSIZE_W::new(self, 14) } #[doc = "Bits 20:22 - Transfer Type and Flow Control"] #[inline(always)] - #[must_use] pub fn tt_fc(&mut self) -> TT_FC_W { TT_FC_W::new(self, 20) } diff --git a/src/gpdma1_ch0/dar.rs b/src/gpdma1_ch0/dar.rs index 31720911..3b0869d6 100644 --- a/src/gpdma1_ch0/dar.rs +++ b/src/gpdma1_ch0/dar.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Current Destination address of DMA transfer"] #[inline(always)] - #[must_use] pub fn dar(&mut self) -> DAR_W { DAR_W::new(self, 0) } diff --git a/src/gpdma1_ch0/sar.rs b/src/gpdma1_ch0/sar.rs index c932fdd2..ae33a3e6 100644 --- a/src/gpdma1_ch0/sar.rs +++ b/src/gpdma1_ch0/sar.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Current Source Address of DMA transfer"] #[inline(always)] - #[must_use] pub fn sar(&mut self) -> SAR_W { SAR_W::new(self, 0) } diff --git a/src/ledts0/evfr.rs b/src/ledts0/evfr.rs index 9bcaafb7..7ac6a6dd 100644 --- a/src/ledts0/evfr.rs +++ b/src/ledts0/evfr.rs @@ -162,19 +162,16 @@ impl R { impl W { #[doc = "Bit 16 - Clear Time Slice Interrupt Flag"] #[inline(always)] - #[must_use] pub fn ctsf(&mut self) -> CTSF_W { CTSF_W::new(self, 16) } #[doc = "Bit 17 - Clear (Extended) Time Frame Interrupt Flag"] #[inline(always)] - #[must_use] pub fn ctff(&mut self) -> CTFF_W { CTFF_W::new(self, 17) } #[doc = "Bit 18 - Clear Autoscan Time Period Interrupt Flag"] #[inline(always)] - #[must_use] pub fn ctpf(&mut self) -> CTPF_W { CTPF_W::new(self, 18) } diff --git a/src/ledts0/fnctl.rs b/src/ledts0/fnctl.rs index 978704a3..a5ef6a34 100644 --- a/src/ledts0/fnctl.rs +++ b/src/ledts0/fnctl.rs @@ -807,67 +807,56 @@ impl R { impl W { #[doc = "Bits 0:2 - Touch-Sense TSIN Pad Turn"] #[inline(always)] - #[must_use] pub fn padt(&mut self) -> PADT_W { PADT_W::new(self, 0) } #[doc = "Bit 3 - Software Control for Touch-Sense Pad Turn"] #[inline(always)] - #[must_use] pub fn padtsw(&mut self) -> PADTSW_W { PADTSW_W::new(self, 3) } #[doc = "Bit 4 - Enable External Pull-up Configuration on Pin COLA"] #[inline(always)] - #[must_use] pub fn epull(&mut self) -> EPULL_W { EPULL_W::new(self, 4) } #[doc = "Bits 16:19 - Accumulate Count on Touch-Sense Input"] #[inline(always)] - #[must_use] pub fn acccnt(&mut self) -> ACCCNT_W { ACCCNT_W::new(self, 16) } #[doc = "Bit 20 - Common Compare Enable for Touch-Sense"] #[inline(always)] - #[must_use] pub fn tsccmp(&mut self) -> TSCCMP_W { TSCCMP_W::new(self, 20) } #[doc = "Bits 21:22 - Extension for Touch-Sense Output for Pin-Low-Level"] #[inline(always)] - #[must_use] pub fn tsoext(&mut self) -> TSOEXT_W { TSOEXT_W::new(self, 21) } #[doc = "Bit 23 - TS-Counter Auto Reset"] #[inline(always)] - #[must_use] pub fn tsctrr(&mut self) -> TSCTRR_W { TSCTRR_W::new(self, 23) } #[doc = "Bit 24 - Saturation of TS-Counter"] #[inline(always)] - #[must_use] pub fn tsctrsat(&mut self) -> TSCTRSAT_W { TSCTRSAT_W::new(self, 24) } #[doc = "Bits 25:27 - Number of Touch-Sense Input"] #[inline(always)] - #[must_use] pub fn nr_tsin(&mut self) -> NR_TSIN_W { NR_TSIN_W::new(self, 25) } #[doc = "Bit 28 - Active Level of LED Column"] #[inline(always)] - #[must_use] pub fn collev(&mut self) -> COLLEV_W { COLLEV_W::new(self, 28) } #[doc = "Bits 29:31 - Number of LED Columns"] #[inline(always)] - #[must_use] pub fn nr_ledcol(&mut self) -> NR_LEDCOL_W { NR_LEDCOL_W::new(self, 29) } diff --git a/src/ledts0/globctl.rs b/src/ledts0/globctl.rs index b9892caa..f7f743fb 100644 --- a/src/ledts0/globctl.rs +++ b/src/ledts0/globctl.rs @@ -518,67 +518,56 @@ impl R { impl W { #[doc = "Bit 0 - Touch-Sense Function Enable"] #[inline(always)] - #[must_use] pub fn ts_en(&mut self) -> TS_EN_W { TS_EN_W::new(self, 0) } #[doc = "Bit 1 - LED Function Enable"] #[inline(always)] - #[must_use] pub fn ld_en(&mut self) -> LD_EN_W { LD_EN_W::new(self, 1) } #[doc = "Bit 2 - Clock Master Disable"] #[inline(always)] - #[must_use] pub fn cmtr(&mut self) -> CMTR_W { CMTR_W::new(self, 2) } #[doc = "Bit 3 - Enable Autoscan Time Period Synchronization"] #[inline(always)] - #[must_use] pub fn ensync(&mut self) -> ENSYNC_W { ENSYNC_W::new(self, 3) } #[doc = "Bit 8 - Suspend Request Configuration"] #[inline(always)] - #[must_use] pub fn suscfg(&mut self) -> SUSCFG_W { SUSCFG_W::new(self, 8) } #[doc = "Bits 9:11 - Mask Number of LSB Bits for Event Validation"] #[inline(always)] - #[must_use] pub fn maskval(&mut self) -> MASKVAL_W { MASKVAL_W::new(self, 9) } #[doc = "Bit 12 - Enable (Extended) Time Frame Validation"] #[inline(always)] - #[must_use] pub fn fenval(&mut self) -> FENVAL_W { FENVAL_W::new(self, 12) } #[doc = "Bit 13 - Enable Time Slice Interrupt"] #[inline(always)] - #[must_use] pub fn its_en(&mut self) -> ITS_EN_W { ITS_EN_W::new(self, 13) } #[doc = "Bit 14 - Enable (Extended) Time Frame Interrupt"] #[inline(always)] - #[must_use] pub fn itf_en(&mut self) -> ITF_EN_W { ITF_EN_W::new(self, 14) } #[doc = "Bit 15 - Enable Autoscan Time Period Interrupt"] #[inline(always)] - #[must_use] pub fn itp_en(&mut self) -> ITP_EN_W { ITP_EN_W::new(self, 15) } #[doc = "Bits 16:31 - LEDTS-Counter Clock Pre-Scale Factor"] #[inline(always)] - #[must_use] pub fn clk_ps(&mut self) -> CLK_PS_W { CLK_PS_W::new(self, 16) } diff --git a/src/ledts0/ldcmp0.rs b/src/ledts0/ldcmp0.rs index aba89e1e..15a6150a 100644 --- a/src/ledts0/ldcmp0.rs +++ b/src/ledts0/ldcmp0.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ld0(&mut self) -> CMP_LD0_W { CMP_LD0_W::new(self, 0) } #[doc = "Bits 8:15 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ld1(&mut self) -> CMP_LD1_W { CMP_LD1_W::new(self, 8) } #[doc = "Bits 16:23 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ld2(&mut self) -> CMP_LD2_W { CMP_LD2_W::new(self, 16) } #[doc = "Bits 24:31 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ld3(&mut self) -> CMP_LD3_W { CMP_LD3_W::new(self, 24) } diff --git a/src/ledts0/ldcmp1.rs b/src/ledts0/ldcmp1.rs index d50855cc..65bdf19a 100644 --- a/src/ledts0/ldcmp1.rs +++ b/src/ledts0/ldcmp1.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ld4(&mut self) -> CMP_LD4_W { CMP_LD4_W::new(self, 0) } #[doc = "Bits 8:15 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ld5(&mut self) -> CMP_LD5_W { CMP_LD5_W::new(self, 8) } #[doc = "Bits 16:23 - Compare Value for LED COL\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ld6(&mut self) -> CMP_LD6_W { CMP_LD6_W::new(self, 16) } #[doc = "Bits 24:31 - Compare Value for LED COLA / Common Compare Value for Touch-sense Pad Turns"] #[inline(always)] - #[must_use] pub fn cmp_lda_tscom(&mut self) -> CMP_LDA_TSCOM_W { CMP_LDA_TSCOM_W::new(self, 24) } diff --git a/src/ledts0/line0.rs b/src/ledts0/line0.rs index 1bf75dc1..1c1fdf62 100644 --- a/src/ledts0/line0.rs +++ b/src/ledts0/line0.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Output on LINE\\[x\\]"] #[inline(always)] - #[must_use] pub fn line_0(&mut self) -> LINE_0_W { LINE_0_W::new(self, 0) } #[doc = "Bits 8:15 - Output on LINE\\[x\\]"] #[inline(always)] - #[must_use] pub fn line_1(&mut self) -> LINE_1_W { LINE_1_W::new(self, 8) } #[doc = "Bits 16:23 - Output on LINE\\[x\\]"] #[inline(always)] - #[must_use] pub fn line_2(&mut self) -> LINE_2_W { LINE_2_W::new(self, 16) } #[doc = "Bits 24:31 - Output on LINE\\[x\\]"] #[inline(always)] - #[must_use] pub fn line_3(&mut self) -> LINE_3_W { LINE_3_W::new(self, 24) } diff --git a/src/ledts0/line1.rs b/src/ledts0/line1.rs index 1c0af34c..0eb19ba7 100644 --- a/src/ledts0/line1.rs +++ b/src/ledts0/line1.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Output on LINE\\[x\\]"] #[inline(always)] - #[must_use] pub fn line_4(&mut self) -> LINE_4_W { LINE_4_W::new(self, 0) } #[doc = "Bits 8:15 - Output on LINE\\[x\\]"] #[inline(always)] - #[must_use] pub fn line_5(&mut self) -> LINE_5_W { LINE_5_W::new(self, 8) } #[doc = "Bits 16:23 - Output on LINE\\[x\\]"] #[inline(always)] - #[must_use] pub fn line_6(&mut self) -> LINE_6_W { LINE_6_W::new(self, 16) } #[doc = "Bits 24:31 - Output on LINE\\[x\\]"] #[inline(always)] - #[must_use] pub fn line_a(&mut self) -> LINE_A_W { LINE_A_W::new(self, 24) } diff --git a/src/ledts0/tscmp0.rs b/src/ledts0/tscmp0.rs index fac583bc..5fc62dc2 100644 --- a/src/ledts0/tscmp0.rs +++ b/src/ledts0/tscmp0.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ts0(&mut self) -> CMP_TS0_W { CMP_TS0_W::new(self, 0) } #[doc = "Bits 8:15 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ts1(&mut self) -> CMP_TS1_W { CMP_TS1_W::new(self, 8) } #[doc = "Bits 16:23 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ts2(&mut self) -> CMP_TS2_W { CMP_TS2_W::new(self, 16) } #[doc = "Bits 24:31 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ts3(&mut self) -> CMP_TS3_W { CMP_TS3_W::new(self, 24) } diff --git a/src/ledts0/tscmp1.rs b/src/ledts0/tscmp1.rs index da99af1d..11d0e491 100644 --- a/src/ledts0/tscmp1.rs +++ b/src/ledts0/tscmp1.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ts4(&mut self) -> CMP_TS4_W { CMP_TS4_W::new(self, 0) } #[doc = "Bits 8:15 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ts5(&mut self) -> CMP_TS5_W { CMP_TS5_W::new(self, 8) } #[doc = "Bits 16:23 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ts6(&mut self) -> CMP_TS6_W { CMP_TS6_W::new(self, 16) } #[doc = "Bits 24:31 - Compare Value for Touch-Sense TSIN\\[x\\]"] #[inline(always)] - #[must_use] pub fn cmp_ts7(&mut self) -> CMP_TS7_W { CMP_TS7_W::new(self, 24) } diff --git a/src/ledts0/tsval.rs b/src/ledts0/tsval.rs index c50a90f3..851e39b9 100644 --- a/src/ledts0/tsval.rs +++ b/src/ledts0/tsval.rs @@ -23,7 +23,6 @@ impl R { impl W { #[doc = "Bits 16:31 - TS-Counter Value"] #[inline(always)] - #[must_use] pub fn tsctrval(&mut self) -> TSCTRVAL_W { TSCTRVAL_W::new(self, 16) } diff --git a/src/lib.rs b/src/lib.rs index 8cdb0063..446647ea 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,5 +1,5 @@ -#![doc = "Peripheral access API for XMC4700 microcontrollers (generated using svd2rust v0.33.5 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] -svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.33.5/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for XMC4700 microcontrollers (generated using svd2rust v0.35.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] +svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.35.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![no_std] diff --git a/src/pba0/sts.rs b/src/pba0/sts.rs index b968864a..fea33611 100644 --- a/src/pba0/sts.rs +++ b/src/pba0/sts.rs @@ -65,7 +65,6 @@ impl R { impl W { #[doc = "Bit 0 - Bufferable Write Access Error"] #[inline(always)] - #[must_use] pub fn werr(&mut self) -> WERR_W { WERR_W::new(self, 0) } diff --git a/src/port0/hwsel.rs b/src/port0/hwsel.rs index 5cfcc8ba..cb909e2e 100644 --- a/src/port0/hwsel.rs +++ b/src/port0/hwsel.rs @@ -1255,97 +1255,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - #[must_use] pub fn hw0(&mut self) -> HW0_W { HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - #[must_use] pub fn hw1(&mut self) -> HW1_W { HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - #[must_use] pub fn hw2(&mut self) -> HW2_W { HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - #[must_use] pub fn hw3(&mut self) -> HW3_W { HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - #[must_use] pub fn hw4(&mut self) -> HW4_W { HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - #[must_use] pub fn hw5(&mut self) -> HW5_W { HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - #[must_use] pub fn hw6(&mut self) -> HW6_W { HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - #[must_use] pub fn hw7(&mut self) -> HW7_W { HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - #[must_use] pub fn hw8(&mut self) -> HW8_W { HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - #[must_use] pub fn hw9(&mut self) -> HW9_W { HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - #[must_use] pub fn hw10(&mut self) -> HW10_W { HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - #[must_use] pub fn hw11(&mut self) -> HW11_W { HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - #[must_use] pub fn hw12(&mut self) -> HW12_W { HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - #[must_use] pub fn hw13(&mut self) -> HW13_W { HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - #[must_use] pub fn hw14(&mut self) -> HW14_W { HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - #[must_use] pub fn hw15(&mut self) -> HW15_W { HW15_W::new(self, 30) } diff --git a/src/port0/iocr0.rs b/src/port0/iocr0.rs index a979a70d..4382ff85 100644 --- a/src/port0/iocr0.rs +++ b/src/port0/iocr0.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc0(&mut self) -> PC0_W { PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc1(&mut self) -> PC1_W { PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc2(&mut self) -> PC2_W { PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc3(&mut self) -> PC3_W { PC3_W::new(self, 27) } diff --git a/src/port0/iocr12.rs b/src/port0/iocr12.rs index 4c7ff187..24367d7b 100644 --- a/src/port0/iocr12.rs +++ b/src/port0/iocr12.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc12(&mut self) -> PC12_W { PC12_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc13(&mut self) -> PC13_W { PC13_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc14(&mut self) -> PC14_W { PC14_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc15(&mut self) -> PC15_W { PC15_W::new(self, 27) } diff --git a/src/port0/iocr4.rs b/src/port0/iocr4.rs index 3b8acd10..01793aa4 100644 --- a/src/port0/iocr4.rs +++ b/src/port0/iocr4.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc4(&mut self) -> PC4_W { PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc5(&mut self) -> PC5_W { PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc6(&mut self) -> PC6_W { PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc7(&mut self) -> PC7_W { PC7_W::new(self, 27) } diff --git a/src/port0/iocr8.rs b/src/port0/iocr8.rs index 24c0b59c..e8b106f3 100644 --- a/src/port0/iocr8.rs +++ b/src/port0/iocr8.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc8(&mut self) -> PC8_W { PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc9(&mut self) -> PC9_W { PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc10(&mut self) -> PC10_W { PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc11(&mut self) -> PC11_W { PC11_W::new(self, 27) } diff --git a/src/port0/omr.rs b/src/port0/omr.rs index 583993ec..d805f284 100644 --- a/src/port0/omr.rs +++ b/src/port0/omr.rs @@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] - #[must_use] pub fn ps0(&mut self) -> PS0_W { PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] - #[must_use] pub fn ps1(&mut self) -> PS1_W { PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] - #[must_use] pub fn ps2(&mut self) -> PS2_W { PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] - #[must_use] pub fn ps3(&mut self) -> PS3_W { PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] - #[must_use] pub fn ps4(&mut self) -> PS4_W { PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] - #[must_use] pub fn ps5(&mut self) -> PS5_W { PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] - #[must_use] pub fn ps6(&mut self) -> PS6_W { PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] - #[must_use] pub fn ps7(&mut self) -> PS7_W { PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] - #[must_use] pub fn ps8(&mut self) -> PS8_W { PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] - #[must_use] pub fn ps9(&mut self) -> PS9_W { PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] - #[must_use] pub fn ps10(&mut self) -> PS10_W { PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] - #[must_use] pub fn ps11(&mut self) -> PS11_W { PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] - #[must_use] pub fn ps12(&mut self) -> PS12_W { PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] - #[must_use] pub fn ps13(&mut self) -> PS13_W { PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] - #[must_use] pub fn ps14(&mut self) -> PS14_W { PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] - #[must_use] pub fn ps15(&mut self) -> PS15_W { PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] - #[must_use] pub fn pr0(&mut self) -> PR0_W { PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] - #[must_use] pub fn pr1(&mut self) -> PR1_W { PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] - #[must_use] pub fn pr2(&mut self) -> PR2_W { PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] - #[must_use] pub fn pr3(&mut self) -> PR3_W { PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] - #[must_use] pub fn pr4(&mut self) -> PR4_W { PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] - #[must_use] pub fn pr5(&mut self) -> PR5_W { PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] - #[must_use] pub fn pr6(&mut self) -> PR6_W { PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] - #[must_use] pub fn pr7(&mut self) -> PR7_W { PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] - #[must_use] pub fn pr8(&mut self) -> PR8_W { PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] - #[must_use] pub fn pr9(&mut self) -> PR9_W { PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] - #[must_use] pub fn pr10(&mut self) -> PR10_W { PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] - #[must_use] pub fn pr11(&mut self) -> PR11_W { PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] - #[must_use] pub fn pr12(&mut self) -> PR12_W { PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] - #[must_use] pub fn pr13(&mut self) -> PR13_W { PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] - #[must_use] pub fn pr14(&mut self) -> PR14_W { PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] - #[must_use] pub fn pr15(&mut self) -> PR15_W { PR15_W::new(self, 31) } diff --git a/src/port0/out.rs b/src/port0/out.rs index 9c557f64..bde57cd7 100644 --- a/src/port0/out.rs +++ b/src/port0/out.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - #[must_use] pub fn p0(&mut self) -> P0_W { P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - #[must_use] pub fn p1(&mut self) -> P1_W { P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - #[must_use] pub fn p2(&mut self) -> P2_W { P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - #[must_use] pub fn p3(&mut self) -> P3_W { P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - #[must_use] pub fn p4(&mut self) -> P4_W { P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - #[must_use] pub fn p5(&mut self) -> P5_W { P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - #[must_use] pub fn p6(&mut self) -> P6_W { P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - #[must_use] pub fn p7(&mut self) -> P7_W { P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - #[must_use] pub fn p8(&mut self) -> P8_W { P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - #[must_use] pub fn p9(&mut self) -> P9_W { P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - #[must_use] pub fn p10(&mut self) -> P10_W { P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - #[must_use] pub fn p11(&mut self) -> P11_W { P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - #[must_use] pub fn p12(&mut self) -> P12_W { P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - #[must_use] pub fn p13(&mut self) -> P13_W { P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - #[must_use] pub fn p14(&mut self) -> P14_W { P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - #[must_use] pub fn p15(&mut self) -> P15_W { P15_W::new(self, 15) } diff --git a/src/port0/pdr0.rs b/src/port0/pdr0.rs index 67871f4a..0f43ec83 100644 --- a/src/port0/pdr0.rs +++ b/src/port0/pdr0.rs @@ -917,49 +917,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - #[must_use] pub fn pd0(&mut self) -> PD0_W { PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - #[must_use] pub fn pd1(&mut self) -> PD1_W { PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - #[must_use] pub fn pd2(&mut self) -> PD2_W { PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - #[must_use] pub fn pd3(&mut self) -> PD3_W { PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - #[must_use] pub fn pd4(&mut self) -> PD4_W { PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - #[must_use] pub fn pd5(&mut self) -> PD5_W { PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - #[must_use] pub fn pd6(&mut self) -> PD6_W { PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - #[must_use] pub fn pd7(&mut self) -> PD7_W { PD7_W::new(self, 28) } diff --git a/src/port0/pdr1.rs b/src/port0/pdr1.rs index 22667c3c..1490688c 100644 --- a/src/port0/pdr1.rs +++ b/src/port0/pdr1.rs @@ -1073,49 +1073,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - #[must_use] pub fn pd8(&mut self) -> PD8_W { PD8_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - #[must_use] pub fn pd9(&mut self) -> PD9_W { PD9_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - #[must_use] pub fn pd10(&mut self) -> PD10_W { PD10_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - #[must_use] pub fn pd11(&mut self) -> PD11_W { PD11_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - #[must_use] pub fn pd12(&mut self) -> PD12_W { PD12_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - #[must_use] pub fn pd13(&mut self) -> PD13_W { PD13_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - #[must_use] pub fn pd14(&mut self) -> PD14_W { PD14_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - #[must_use] pub fn pd15(&mut self) -> PD15_W { PD15_W::new(self, 28) } diff --git a/src/port0/pps.rs b/src/port0/pps.rs index 84439952..549244c2 100644 --- a/src/port0/pps.rs +++ b/src/port0/pps.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - #[must_use] pub fn pps0(&mut self) -> PPS0_W { PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - #[must_use] pub fn pps1(&mut self) -> PPS1_W { PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - #[must_use] pub fn pps2(&mut self) -> PPS2_W { PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - #[must_use] pub fn pps3(&mut self) -> PPS3_W { PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - #[must_use] pub fn pps4(&mut self) -> PPS4_W { PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - #[must_use] pub fn pps5(&mut self) -> PPS5_W { PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - #[must_use] pub fn pps6(&mut self) -> PPS6_W { PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - #[must_use] pub fn pps7(&mut self) -> PPS7_W { PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - #[must_use] pub fn pps8(&mut self) -> PPS8_W { PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - #[must_use] pub fn pps9(&mut self) -> PPS9_W { PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - #[must_use] pub fn pps10(&mut self) -> PPS10_W { PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - #[must_use] pub fn pps11(&mut self) -> PPS11_W { PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - #[must_use] pub fn pps12(&mut self) -> PPS12_W { PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - #[must_use] pub fn pps13(&mut self) -> PPS13_W { PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - #[must_use] pub fn pps14(&mut self) -> PPS14_W { PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - #[must_use] pub fn pps15(&mut self) -> PPS15_W { PPS15_W::new(self, 15) } diff --git a/src/port1/hwsel.rs b/src/port1/hwsel.rs index ab5157e6..705c72ce 100644 --- a/src/port1/hwsel.rs +++ b/src/port1/hwsel.rs @@ -1255,97 +1255,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - #[must_use] pub fn hw0(&mut self) -> HW0_W { HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - #[must_use] pub fn hw1(&mut self) -> HW1_W { HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - #[must_use] pub fn hw2(&mut self) -> HW2_W { HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - #[must_use] pub fn hw3(&mut self) -> HW3_W { HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - #[must_use] pub fn hw4(&mut self) -> HW4_W { HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - #[must_use] pub fn hw5(&mut self) -> HW5_W { HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - #[must_use] pub fn hw6(&mut self) -> HW6_W { HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - #[must_use] pub fn hw7(&mut self) -> HW7_W { HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - #[must_use] pub fn hw8(&mut self) -> HW8_W { HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - #[must_use] pub fn hw9(&mut self) -> HW9_W { HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - #[must_use] pub fn hw10(&mut self) -> HW10_W { HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - #[must_use] pub fn hw11(&mut self) -> HW11_W { HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - #[must_use] pub fn hw12(&mut self) -> HW12_W { HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - #[must_use] pub fn hw13(&mut self) -> HW13_W { HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - #[must_use] pub fn hw14(&mut self) -> HW14_W { HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - #[must_use] pub fn hw15(&mut self) -> HW15_W { HW15_W::new(self, 30) } diff --git a/src/port1/iocr0.rs b/src/port1/iocr0.rs index 56713514..fa1b28de 100644 --- a/src/port1/iocr0.rs +++ b/src/port1/iocr0.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc0(&mut self) -> PC0_W { PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc1(&mut self) -> PC1_W { PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc2(&mut self) -> PC2_W { PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc3(&mut self) -> PC3_W { PC3_W::new(self, 27) } diff --git a/src/port1/iocr12.rs b/src/port1/iocr12.rs index ca619f3a..419b39c6 100644 --- a/src/port1/iocr12.rs +++ b/src/port1/iocr12.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc12(&mut self) -> PC12_W { PC12_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc13(&mut self) -> PC13_W { PC13_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc14(&mut self) -> PC14_W { PC14_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc15(&mut self) -> PC15_W { PC15_W::new(self, 27) } diff --git a/src/port1/iocr4.rs b/src/port1/iocr4.rs index f8d058da..55cc0977 100644 --- a/src/port1/iocr4.rs +++ b/src/port1/iocr4.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc4(&mut self) -> PC4_W { PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc5(&mut self) -> PC5_W { PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc6(&mut self) -> PC6_W { PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc7(&mut self) -> PC7_W { PC7_W::new(self, 27) } diff --git a/src/port1/iocr8.rs b/src/port1/iocr8.rs index 20b818bb..0a4920ec 100644 --- a/src/port1/iocr8.rs +++ b/src/port1/iocr8.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc8(&mut self) -> PC8_W { PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc9(&mut self) -> PC9_W { PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc10(&mut self) -> PC10_W { PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc11(&mut self) -> PC11_W { PC11_W::new(self, 27) } diff --git a/src/port1/omr.rs b/src/port1/omr.rs index f6583148..415628ea 100644 --- a/src/port1/omr.rs +++ b/src/port1/omr.rs @@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] - #[must_use] pub fn ps0(&mut self) -> PS0_W { PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] - #[must_use] pub fn ps1(&mut self) -> PS1_W { PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] - #[must_use] pub fn ps2(&mut self) -> PS2_W { PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] - #[must_use] pub fn ps3(&mut self) -> PS3_W { PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] - #[must_use] pub fn ps4(&mut self) -> PS4_W { PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] - #[must_use] pub fn ps5(&mut self) -> PS5_W { PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] - #[must_use] pub fn ps6(&mut self) -> PS6_W { PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] - #[must_use] pub fn ps7(&mut self) -> PS7_W { PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] - #[must_use] pub fn ps8(&mut self) -> PS8_W { PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] - #[must_use] pub fn ps9(&mut self) -> PS9_W { PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] - #[must_use] pub fn ps10(&mut self) -> PS10_W { PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] - #[must_use] pub fn ps11(&mut self) -> PS11_W { PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] - #[must_use] pub fn ps12(&mut self) -> PS12_W { PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] - #[must_use] pub fn ps13(&mut self) -> PS13_W { PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] - #[must_use] pub fn ps14(&mut self) -> PS14_W { PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] - #[must_use] pub fn ps15(&mut self) -> PS15_W { PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] - #[must_use] pub fn pr0(&mut self) -> PR0_W { PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] - #[must_use] pub fn pr1(&mut self) -> PR1_W { PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] - #[must_use] pub fn pr2(&mut self) -> PR2_W { PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] - #[must_use] pub fn pr3(&mut self) -> PR3_W { PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] - #[must_use] pub fn pr4(&mut self) -> PR4_W { PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] - #[must_use] pub fn pr5(&mut self) -> PR5_W { PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] - #[must_use] pub fn pr6(&mut self) -> PR6_W { PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] - #[must_use] pub fn pr7(&mut self) -> PR7_W { PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] - #[must_use] pub fn pr8(&mut self) -> PR8_W { PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] - #[must_use] pub fn pr9(&mut self) -> PR9_W { PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] - #[must_use] pub fn pr10(&mut self) -> PR10_W { PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] - #[must_use] pub fn pr11(&mut self) -> PR11_W { PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] - #[must_use] pub fn pr12(&mut self) -> PR12_W { PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] - #[must_use] pub fn pr13(&mut self) -> PR13_W { PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] - #[must_use] pub fn pr14(&mut self) -> PR14_W { PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] - #[must_use] pub fn pr15(&mut self) -> PR15_W { PR15_W::new(self, 31) } diff --git a/src/port1/out.rs b/src/port1/out.rs index 1ecdc3ca..ac3c575a 100644 --- a/src/port1/out.rs +++ b/src/port1/out.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - #[must_use] pub fn p0(&mut self) -> P0_W { P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - #[must_use] pub fn p1(&mut self) -> P1_W { P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - #[must_use] pub fn p2(&mut self) -> P2_W { P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - #[must_use] pub fn p3(&mut self) -> P3_W { P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - #[must_use] pub fn p4(&mut self) -> P4_W { P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - #[must_use] pub fn p5(&mut self) -> P5_W { P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - #[must_use] pub fn p6(&mut self) -> P6_W { P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - #[must_use] pub fn p7(&mut self) -> P7_W { P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - #[must_use] pub fn p8(&mut self) -> P8_W { P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - #[must_use] pub fn p9(&mut self) -> P9_W { P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - #[must_use] pub fn p10(&mut self) -> P10_W { P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - #[must_use] pub fn p11(&mut self) -> P11_W { P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - #[must_use] pub fn p12(&mut self) -> P12_W { P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - #[must_use] pub fn p13(&mut self) -> P13_W { P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - #[must_use] pub fn p14(&mut self) -> P14_W { P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - #[must_use] pub fn p15(&mut self) -> P15_W { P15_W::new(self, 15) } diff --git a/src/port1/pdr0.rs b/src/port1/pdr0.rs index 6feb6b99..46d96ab6 100644 --- a/src/port1/pdr0.rs +++ b/src/port1/pdr0.rs @@ -995,49 +995,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - #[must_use] pub fn pd0(&mut self) -> PD0_W { PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - #[must_use] pub fn pd1(&mut self) -> PD1_W { PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - #[must_use] pub fn pd2(&mut self) -> PD2_W { PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - #[must_use] pub fn pd3(&mut self) -> PD3_W { PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - #[must_use] pub fn pd4(&mut self) -> PD4_W { PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - #[must_use] pub fn pd5(&mut self) -> PD5_W { PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - #[must_use] pub fn pd6(&mut self) -> PD6_W { PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - #[must_use] pub fn pd7(&mut self) -> PD7_W { PD7_W::new(self, 28) } diff --git a/src/port1/pdr1.rs b/src/port1/pdr1.rs index 6bfd4815..f12d583f 100644 --- a/src/port1/pdr1.rs +++ b/src/port1/pdr1.rs @@ -917,49 +917,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - #[must_use] pub fn pd8(&mut self) -> PD8_W { PD8_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - #[must_use] pub fn pd9(&mut self) -> PD9_W { PD9_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - #[must_use] pub fn pd10(&mut self) -> PD10_W { PD10_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - #[must_use] pub fn pd11(&mut self) -> PD11_W { PD11_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - #[must_use] pub fn pd12(&mut self) -> PD12_W { PD12_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - #[must_use] pub fn pd13(&mut self) -> PD13_W { PD13_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - #[must_use] pub fn pd14(&mut self) -> PD14_W { PD14_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - #[must_use] pub fn pd15(&mut self) -> PD15_W { PD15_W::new(self, 28) } diff --git a/src/port1/pps.rs b/src/port1/pps.rs index b204d790..da357cb7 100644 --- a/src/port1/pps.rs +++ b/src/port1/pps.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - #[must_use] pub fn pps0(&mut self) -> PPS0_W { PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - #[must_use] pub fn pps1(&mut self) -> PPS1_W { PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - #[must_use] pub fn pps2(&mut self) -> PPS2_W { PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - #[must_use] pub fn pps3(&mut self) -> PPS3_W { PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - #[must_use] pub fn pps4(&mut self) -> PPS4_W { PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - #[must_use] pub fn pps5(&mut self) -> PPS5_W { PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - #[must_use] pub fn pps6(&mut self) -> PPS6_W { PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - #[must_use] pub fn pps7(&mut self) -> PPS7_W { PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - #[must_use] pub fn pps8(&mut self) -> PPS8_W { PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - #[must_use] pub fn pps9(&mut self) -> PPS9_W { PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - #[must_use] pub fn pps10(&mut self) -> PPS10_W { PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - #[must_use] pub fn pps11(&mut self) -> PPS11_W { PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - #[must_use] pub fn pps12(&mut self) -> PPS12_W { PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - #[must_use] pub fn pps13(&mut self) -> PPS13_W { PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - #[must_use] pub fn pps14(&mut self) -> PPS14_W { PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - #[must_use] pub fn pps15(&mut self) -> PPS15_W { PPS15_W::new(self, 15) } diff --git a/src/port14/hwsel.rs b/src/port14/hwsel.rs index b3ef0e79..ea164828 100644 --- a/src/port14/hwsel.rs +++ b/src/port14/hwsel.rs @@ -1255,97 +1255,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - #[must_use] pub fn hw0(&mut self) -> HW0_W { HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - #[must_use] pub fn hw1(&mut self) -> HW1_W { HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - #[must_use] pub fn hw2(&mut self) -> HW2_W { HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - #[must_use] pub fn hw3(&mut self) -> HW3_W { HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - #[must_use] pub fn hw4(&mut self) -> HW4_W { HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - #[must_use] pub fn hw5(&mut self) -> HW5_W { HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - #[must_use] pub fn hw6(&mut self) -> HW6_W { HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - #[must_use] pub fn hw7(&mut self) -> HW7_W { HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - #[must_use] pub fn hw8(&mut self) -> HW8_W { HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - #[must_use] pub fn hw9(&mut self) -> HW9_W { HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - #[must_use] pub fn hw10(&mut self) -> HW10_W { HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - #[must_use] pub fn hw11(&mut self) -> HW11_W { HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - #[must_use] pub fn hw12(&mut self) -> HW12_W { HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - #[must_use] pub fn hw13(&mut self) -> HW13_W { HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - #[must_use] pub fn hw14(&mut self) -> HW14_W { HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - #[must_use] pub fn hw15(&mut self) -> HW15_W { HW15_W::new(self, 30) } diff --git a/src/port14/iocr0.rs b/src/port14/iocr0.rs index 8f6da63d..3b0eb38b 100644 --- a/src/port14/iocr0.rs +++ b/src/port14/iocr0.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc0(&mut self) -> PC0_W { PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc1(&mut self) -> PC1_W { PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc2(&mut self) -> PC2_W { PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc3(&mut self) -> PC3_W { PC3_W::new(self, 27) } diff --git a/src/port14/iocr12.rs b/src/port14/iocr12.rs index 625be6f4..474c6772 100644 --- a/src/port14/iocr12.rs +++ b/src/port14/iocr12.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc12(&mut self) -> PC12_W { PC12_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc13(&mut self) -> PC13_W { PC13_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc14(&mut self) -> PC14_W { PC14_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc15(&mut self) -> PC15_W { PC15_W::new(self, 27) } diff --git a/src/port14/iocr4.rs b/src/port14/iocr4.rs index cbf8f808..d29641fe 100644 --- a/src/port14/iocr4.rs +++ b/src/port14/iocr4.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc4(&mut self) -> PC4_W { PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc5(&mut self) -> PC5_W { PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc6(&mut self) -> PC6_W { PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc7(&mut self) -> PC7_W { PC7_W::new(self, 27) } diff --git a/src/port14/iocr8.rs b/src/port14/iocr8.rs index f0261686..06f04dda 100644 --- a/src/port14/iocr8.rs +++ b/src/port14/iocr8.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc8(&mut self) -> PC8_W { PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc9(&mut self) -> PC9_W { PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc10(&mut self) -> PC10_W { PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc11(&mut self) -> PC11_W { PC11_W::new(self, 27) } diff --git a/src/port14/omr.rs b/src/port14/omr.rs index 3a804c69..e46ed812 100644 --- a/src/port14/omr.rs +++ b/src/port14/omr.rs @@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] - #[must_use] pub fn ps0(&mut self) -> PS0_W { PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] - #[must_use] pub fn ps1(&mut self) -> PS1_W { PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] - #[must_use] pub fn ps2(&mut self) -> PS2_W { PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] - #[must_use] pub fn ps3(&mut self) -> PS3_W { PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] - #[must_use] pub fn ps4(&mut self) -> PS4_W { PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] - #[must_use] pub fn ps5(&mut self) -> PS5_W { PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] - #[must_use] pub fn ps6(&mut self) -> PS6_W { PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] - #[must_use] pub fn ps7(&mut self) -> PS7_W { PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] - #[must_use] pub fn ps8(&mut self) -> PS8_W { PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] - #[must_use] pub fn ps9(&mut self) -> PS9_W { PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] - #[must_use] pub fn ps10(&mut self) -> PS10_W { PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] - #[must_use] pub fn ps11(&mut self) -> PS11_W { PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] - #[must_use] pub fn ps12(&mut self) -> PS12_W { PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] - #[must_use] pub fn ps13(&mut self) -> PS13_W { PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] - #[must_use] pub fn ps14(&mut self) -> PS14_W { PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] - #[must_use] pub fn ps15(&mut self) -> PS15_W { PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] - #[must_use] pub fn pr0(&mut self) -> PR0_W { PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] - #[must_use] pub fn pr1(&mut self) -> PR1_W { PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] - #[must_use] pub fn pr2(&mut self) -> PR2_W { PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] - #[must_use] pub fn pr3(&mut self) -> PR3_W { PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] - #[must_use] pub fn pr4(&mut self) -> PR4_W { PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] - #[must_use] pub fn pr5(&mut self) -> PR5_W { PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] - #[must_use] pub fn pr6(&mut self) -> PR6_W { PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] - #[must_use] pub fn pr7(&mut self) -> PR7_W { PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] - #[must_use] pub fn pr8(&mut self) -> PR8_W { PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] - #[must_use] pub fn pr9(&mut self) -> PR9_W { PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] - #[must_use] pub fn pr10(&mut self) -> PR10_W { PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] - #[must_use] pub fn pr11(&mut self) -> PR11_W { PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] - #[must_use] pub fn pr12(&mut self) -> PR12_W { PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] - #[must_use] pub fn pr13(&mut self) -> PR13_W { PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] - #[must_use] pub fn pr14(&mut self) -> PR14_W { PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] - #[must_use] pub fn pr15(&mut self) -> PR15_W { PR15_W::new(self, 31) } diff --git a/src/port14/out.rs b/src/port14/out.rs index a16ae658..f15cd07f 100644 --- a/src/port14/out.rs +++ b/src/port14/out.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - #[must_use] pub fn p0(&mut self) -> P0_W { P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - #[must_use] pub fn p1(&mut self) -> P1_W { P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - #[must_use] pub fn p2(&mut self) -> P2_W { P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - #[must_use] pub fn p3(&mut self) -> P3_W { P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - #[must_use] pub fn p4(&mut self) -> P4_W { P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - #[must_use] pub fn p5(&mut self) -> P5_W { P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - #[must_use] pub fn p6(&mut self) -> P6_W { P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - #[must_use] pub fn p7(&mut self) -> P7_W { P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - #[must_use] pub fn p8(&mut self) -> P8_W { P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - #[must_use] pub fn p9(&mut self) -> P9_W { P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - #[must_use] pub fn p10(&mut self) -> P10_W { P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - #[must_use] pub fn p11(&mut self) -> P11_W { P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - #[must_use] pub fn p12(&mut self) -> P12_W { P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - #[must_use] pub fn p13(&mut self) -> P13_W { P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - #[must_use] pub fn p14(&mut self) -> P14_W { P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - #[must_use] pub fn p15(&mut self) -> P15_W { P15_W::new(self, 15) } diff --git a/src/port14/pdisc.rs b/src/port14/pdisc.rs index 55f809e6..eabab9f0 100644 --- a/src/port14/pdisc.rs +++ b/src/port14/pdisc.rs @@ -819,85 +819,71 @@ impl R { impl W { #[doc = "Bit 0 - Pad Disable for Port 14 Pin 0"] #[inline(always)] - #[must_use] pub fn pdis0(&mut self) -> PDIS0_W { PDIS0_W::new(self, 0) } #[doc = "Bit 1 - Pad Disable for Port 14 Pin 1"] #[inline(always)] - #[must_use] pub fn pdis1(&mut self) -> PDIS1_W { PDIS1_W::new(self, 1) } #[doc = "Bit 2 - Pad Disable for Port 14 Pin 2"] #[inline(always)] - #[must_use] pub fn pdis2(&mut self) -> PDIS2_W { PDIS2_W::new(self, 2) } #[doc = "Bit 3 - Pad Disable for Port 14 Pin 3"] #[inline(always)] - #[must_use] pub fn pdis3(&mut self) -> PDIS3_W { PDIS3_W::new(self, 3) } #[doc = "Bit 4 - Pad Disable for Port 14 Pin 4"] #[inline(always)] - #[must_use] pub fn pdis4(&mut self) -> PDIS4_W { PDIS4_W::new(self, 4) } #[doc = "Bit 5 - Pad Disable for Port 14 Pin 5"] #[inline(always)] - #[must_use] pub fn pdis5(&mut self) -> PDIS5_W { PDIS5_W::new(self, 5) } #[doc = "Bit 6 - Pad Disable for Port 14 Pin 6"] #[inline(always)] - #[must_use] pub fn pdis6(&mut self) -> PDIS6_W { PDIS6_W::new(self, 6) } #[doc = "Bit 7 - Pad Disable for Port 14 Pin 7"] #[inline(always)] - #[must_use] pub fn pdis7(&mut self) -> PDIS7_W { PDIS7_W::new(self, 7) } #[doc = "Bit 8 - Pad Disable for Port 14 Pin 8"] #[inline(always)] - #[must_use] pub fn pdis8(&mut self) -> PDIS8_W { PDIS8_W::new(self, 8) } #[doc = "Bit 9 - Pad Disable for Port 14 Pin 9"] #[inline(always)] - #[must_use] pub fn pdis9(&mut self) -> PDIS9_W { PDIS9_W::new(self, 9) } #[doc = "Bit 12 - Pad Disable for Port 14 Pin 12"] #[inline(always)] - #[must_use] pub fn pdis12(&mut self) -> PDIS12_W { PDIS12_W::new(self, 12) } #[doc = "Bit 13 - Pad Disable for Port 14 Pin 13"] #[inline(always)] - #[must_use] pub fn pdis13(&mut self) -> PDIS13_W { PDIS13_W::new(self, 13) } #[doc = "Bit 14 - Pad Disable for Port 14 Pin 14"] #[inline(always)] - #[must_use] pub fn pdis14(&mut self) -> PDIS14_W { PDIS14_W::new(self, 14) } #[doc = "Bit 15 - Pad Disable for Port 14 Pin 15"] #[inline(always)] - #[must_use] pub fn pdis15(&mut self) -> PDIS15_W { PDIS15_W::new(self, 15) } diff --git a/src/port14/pps.rs b/src/port14/pps.rs index 2d39eb8c..0b400f40 100644 --- a/src/port14/pps.rs +++ b/src/port14/pps.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - #[must_use] pub fn pps0(&mut self) -> PPS0_W { PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - #[must_use] pub fn pps1(&mut self) -> PPS1_W { PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - #[must_use] pub fn pps2(&mut self) -> PPS2_W { PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - #[must_use] pub fn pps3(&mut self) -> PPS3_W { PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - #[must_use] pub fn pps4(&mut self) -> PPS4_W { PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - #[must_use] pub fn pps5(&mut self) -> PPS5_W { PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - #[must_use] pub fn pps6(&mut self) -> PPS6_W { PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - #[must_use] pub fn pps7(&mut self) -> PPS7_W { PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - #[must_use] pub fn pps8(&mut self) -> PPS8_W { PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - #[must_use] pub fn pps9(&mut self) -> PPS9_W { PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - #[must_use] pub fn pps10(&mut self) -> PPS10_W { PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - #[must_use] pub fn pps11(&mut self) -> PPS11_W { PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - #[must_use] pub fn pps12(&mut self) -> PPS12_W { PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - #[must_use] pub fn pps13(&mut self) -> PPS13_W { PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - #[must_use] pub fn pps14(&mut self) -> PPS14_W { PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - #[must_use] pub fn pps15(&mut self) -> PPS15_W { PPS15_W::new(self, 15) } diff --git a/src/port15/hwsel.rs b/src/port15/hwsel.rs index 4018e41b..90a44924 100644 --- a/src/port15/hwsel.rs +++ b/src/port15/hwsel.rs @@ -1255,97 +1255,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - #[must_use] pub fn hw0(&mut self) -> HW0_W { HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - #[must_use] pub fn hw1(&mut self) -> HW1_W { HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - #[must_use] pub fn hw2(&mut self) -> HW2_W { HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - #[must_use] pub fn hw3(&mut self) -> HW3_W { HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - #[must_use] pub fn hw4(&mut self) -> HW4_W { HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - #[must_use] pub fn hw5(&mut self) -> HW5_W { HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - #[must_use] pub fn hw6(&mut self) -> HW6_W { HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - #[must_use] pub fn hw7(&mut self) -> HW7_W { HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - #[must_use] pub fn hw8(&mut self) -> HW8_W { HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - #[must_use] pub fn hw9(&mut self) -> HW9_W { HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - #[must_use] pub fn hw10(&mut self) -> HW10_W { HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - #[must_use] pub fn hw11(&mut self) -> HW11_W { HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - #[must_use] pub fn hw12(&mut self) -> HW12_W { HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - #[must_use] pub fn hw13(&mut self) -> HW13_W { HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - #[must_use] pub fn hw14(&mut self) -> HW14_W { HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - #[must_use] pub fn hw15(&mut self) -> HW15_W { HW15_W::new(self, 30) } diff --git a/src/port15/iocr0.rs b/src/port15/iocr0.rs index 31bd6e40..a9141748 100644 --- a/src/port15/iocr0.rs +++ b/src/port15/iocr0.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc0(&mut self) -> PC0_W { PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc1(&mut self) -> PC1_W { PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc2(&mut self) -> PC2_W { PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc3(&mut self) -> PC3_W { PC3_W::new(self, 27) } diff --git a/src/port15/iocr12.rs b/src/port15/iocr12.rs index bf9ed25d..00070341 100644 --- a/src/port15/iocr12.rs +++ b/src/port15/iocr12.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc12(&mut self) -> PC12_W { PC12_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc13(&mut self) -> PC13_W { PC13_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc14(&mut self) -> PC14_W { PC14_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc15(&mut self) -> PC15_W { PC15_W::new(self, 27) } diff --git a/src/port15/iocr4.rs b/src/port15/iocr4.rs index 73f3b958..cdcfef33 100644 --- a/src/port15/iocr4.rs +++ b/src/port15/iocr4.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc4(&mut self) -> PC4_W { PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc5(&mut self) -> PC5_W { PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc6(&mut self) -> PC6_W { PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc7(&mut self) -> PC7_W { PC7_W::new(self, 27) } diff --git a/src/port15/iocr8.rs b/src/port15/iocr8.rs index 86c8311a..9c46a711 100644 --- a/src/port15/iocr8.rs +++ b/src/port15/iocr8.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc8(&mut self) -> PC8_W { PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc9(&mut self) -> PC9_W { PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc10(&mut self) -> PC10_W { PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc11(&mut self) -> PC11_W { PC11_W::new(self, 27) } diff --git a/src/port15/omr.rs b/src/port15/omr.rs index 10b3e273..98ec1c91 100644 --- a/src/port15/omr.rs +++ b/src/port15/omr.rs @@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] - #[must_use] pub fn ps0(&mut self) -> PS0_W { PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] - #[must_use] pub fn ps1(&mut self) -> PS1_W { PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] - #[must_use] pub fn ps2(&mut self) -> PS2_W { PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] - #[must_use] pub fn ps3(&mut self) -> PS3_W { PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] - #[must_use] pub fn ps4(&mut self) -> PS4_W { PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] - #[must_use] pub fn ps5(&mut self) -> PS5_W { PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] - #[must_use] pub fn ps6(&mut self) -> PS6_W { PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] - #[must_use] pub fn ps7(&mut self) -> PS7_W { PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] - #[must_use] pub fn ps8(&mut self) -> PS8_W { PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] - #[must_use] pub fn ps9(&mut self) -> PS9_W { PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] - #[must_use] pub fn ps10(&mut self) -> PS10_W { PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] - #[must_use] pub fn ps11(&mut self) -> PS11_W { PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] - #[must_use] pub fn ps12(&mut self) -> PS12_W { PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] - #[must_use] pub fn ps13(&mut self) -> PS13_W { PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] - #[must_use] pub fn ps14(&mut self) -> PS14_W { PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] - #[must_use] pub fn ps15(&mut self) -> PS15_W { PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] - #[must_use] pub fn pr0(&mut self) -> PR0_W { PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] - #[must_use] pub fn pr1(&mut self) -> PR1_W { PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] - #[must_use] pub fn pr2(&mut self) -> PR2_W { PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] - #[must_use] pub fn pr3(&mut self) -> PR3_W { PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] - #[must_use] pub fn pr4(&mut self) -> PR4_W { PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] - #[must_use] pub fn pr5(&mut self) -> PR5_W { PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] - #[must_use] pub fn pr6(&mut self) -> PR6_W { PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] - #[must_use] pub fn pr7(&mut self) -> PR7_W { PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] - #[must_use] pub fn pr8(&mut self) -> PR8_W { PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] - #[must_use] pub fn pr9(&mut self) -> PR9_W { PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] - #[must_use] pub fn pr10(&mut self) -> PR10_W { PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] - #[must_use] pub fn pr11(&mut self) -> PR11_W { PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] - #[must_use] pub fn pr12(&mut self) -> PR12_W { PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] - #[must_use] pub fn pr13(&mut self) -> PR13_W { PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] - #[must_use] pub fn pr14(&mut self) -> PR14_W { PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] - #[must_use] pub fn pr15(&mut self) -> PR15_W { PR15_W::new(self, 31) } diff --git a/src/port15/out.rs b/src/port15/out.rs index 3c4999f1..59a41322 100644 --- a/src/port15/out.rs +++ b/src/port15/out.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - #[must_use] pub fn p0(&mut self) -> P0_W { P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - #[must_use] pub fn p1(&mut self) -> P1_W { P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - #[must_use] pub fn p2(&mut self) -> P2_W { P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - #[must_use] pub fn p3(&mut self) -> P3_W { P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - #[must_use] pub fn p4(&mut self) -> P4_W { P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - #[must_use] pub fn p5(&mut self) -> P5_W { P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - #[must_use] pub fn p6(&mut self) -> P6_W { P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - #[must_use] pub fn p7(&mut self) -> P7_W { P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - #[must_use] pub fn p8(&mut self) -> P8_W { P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - #[must_use] pub fn p9(&mut self) -> P9_W { P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - #[must_use] pub fn p10(&mut self) -> P10_W { P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - #[must_use] pub fn p11(&mut self) -> P11_W { P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - #[must_use] pub fn p12(&mut self) -> P12_W { P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - #[must_use] pub fn p13(&mut self) -> P13_W { P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - #[must_use] pub fn p14(&mut self) -> P14_W { P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - #[must_use] pub fn p15(&mut self) -> P15_W { P15_W::new(self, 15) } diff --git a/src/port15/pdisc.rs b/src/port15/pdisc.rs index e70c354a..c385f43d 100644 --- a/src/port15/pdisc.rs +++ b/src/port15/pdisc.rs @@ -703,73 +703,61 @@ impl R { impl W { #[doc = "Bit 2 - Pad Disable for Port 15 Pin 2"] #[inline(always)] - #[must_use] pub fn pdis2(&mut self) -> PDIS2_W { PDIS2_W::new(self, 2) } #[doc = "Bit 3 - Pad Disable for Port 15 Pin 3"] #[inline(always)] - #[must_use] pub fn pdis3(&mut self) -> PDIS3_W { PDIS3_W::new(self, 3) } #[doc = "Bit 4 - Pad Disable for Port 15 Pin 4"] #[inline(always)] - #[must_use] pub fn pdis4(&mut self) -> PDIS4_W { PDIS4_W::new(self, 4) } #[doc = "Bit 5 - Pad Disable for Port 15 Pin 5"] #[inline(always)] - #[must_use] pub fn pdis5(&mut self) -> PDIS5_W { PDIS5_W::new(self, 5) } #[doc = "Bit 6 - Pad Disable for Port 15 Pin 6"] #[inline(always)] - #[must_use] pub fn pdis6(&mut self) -> PDIS6_W { PDIS6_W::new(self, 6) } #[doc = "Bit 7 - Pad Disable for Port 15 Pin 7"] #[inline(always)] - #[must_use] pub fn pdis7(&mut self) -> PDIS7_W { PDIS7_W::new(self, 7) } #[doc = "Bit 8 - Pad Disable for Port 15 Pin 8"] #[inline(always)] - #[must_use] pub fn pdis8(&mut self) -> PDIS8_W { PDIS8_W::new(self, 8) } #[doc = "Bit 9 - Pad Disable for Port 15 Pin 9"] #[inline(always)] - #[must_use] pub fn pdis9(&mut self) -> PDIS9_W { PDIS9_W::new(self, 9) } #[doc = "Bit 12 - Pad Disable for Port 15 Pin 12"] #[inline(always)] - #[must_use] pub fn pdis12(&mut self) -> PDIS12_W { PDIS12_W::new(self, 12) } #[doc = "Bit 13 - Pad Disable for Port 15 Pin 13"] #[inline(always)] - #[must_use] pub fn pdis13(&mut self) -> PDIS13_W { PDIS13_W::new(self, 13) } #[doc = "Bit 14 - Pad Disable for Port 15 Pin 14"] #[inline(always)] - #[must_use] pub fn pdis14(&mut self) -> PDIS14_W { PDIS14_W::new(self, 14) } #[doc = "Bit 15 - Pad Disable for Port 15 Pin 15"] #[inline(always)] - #[must_use] pub fn pdis15(&mut self) -> PDIS15_W { PDIS15_W::new(self, 15) } diff --git a/src/port15/pps.rs b/src/port15/pps.rs index 95abfdd1..9fec88a7 100644 --- a/src/port15/pps.rs +++ b/src/port15/pps.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - #[must_use] pub fn pps0(&mut self) -> PPS0_W { PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - #[must_use] pub fn pps1(&mut self) -> PPS1_W { PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - #[must_use] pub fn pps2(&mut self) -> PPS2_W { PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - #[must_use] pub fn pps3(&mut self) -> PPS3_W { PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - #[must_use] pub fn pps4(&mut self) -> PPS4_W { PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - #[must_use] pub fn pps5(&mut self) -> PPS5_W { PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - #[must_use] pub fn pps6(&mut self) -> PPS6_W { PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - #[must_use] pub fn pps7(&mut self) -> PPS7_W { PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - #[must_use] pub fn pps8(&mut self) -> PPS8_W { PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - #[must_use] pub fn pps9(&mut self) -> PPS9_W { PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - #[must_use] pub fn pps10(&mut self) -> PPS10_W { PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - #[must_use] pub fn pps11(&mut self) -> PPS11_W { PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - #[must_use] pub fn pps12(&mut self) -> PPS12_W { PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - #[must_use] pub fn pps13(&mut self) -> PPS13_W { PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - #[must_use] pub fn pps14(&mut self) -> PPS14_W { PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - #[must_use] pub fn pps15(&mut self) -> PPS15_W { PPS15_W::new(self, 15) } diff --git a/src/port2/hwsel.rs b/src/port2/hwsel.rs index 9986fc21..1e4434f9 100644 --- a/src/port2/hwsel.rs +++ b/src/port2/hwsel.rs @@ -1255,97 +1255,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - #[must_use] pub fn hw0(&mut self) -> HW0_W { HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - #[must_use] pub fn hw1(&mut self) -> HW1_W { HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - #[must_use] pub fn hw2(&mut self) -> HW2_W { HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - #[must_use] pub fn hw3(&mut self) -> HW3_W { HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - #[must_use] pub fn hw4(&mut self) -> HW4_W { HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - #[must_use] pub fn hw5(&mut self) -> HW5_W { HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - #[must_use] pub fn hw6(&mut self) -> HW6_W { HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - #[must_use] pub fn hw7(&mut self) -> HW7_W { HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - #[must_use] pub fn hw8(&mut self) -> HW8_W { HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - #[must_use] pub fn hw9(&mut self) -> HW9_W { HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - #[must_use] pub fn hw10(&mut self) -> HW10_W { HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - #[must_use] pub fn hw11(&mut self) -> HW11_W { HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - #[must_use] pub fn hw12(&mut self) -> HW12_W { HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - #[must_use] pub fn hw13(&mut self) -> HW13_W { HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - #[must_use] pub fn hw14(&mut self) -> HW14_W { HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - #[must_use] pub fn hw15(&mut self) -> HW15_W { HW15_W::new(self, 30) } diff --git a/src/port2/iocr0.rs b/src/port2/iocr0.rs index 90b88b3d..17c2e828 100644 --- a/src/port2/iocr0.rs +++ b/src/port2/iocr0.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc0(&mut self) -> PC0_W { PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc1(&mut self) -> PC1_W { PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc2(&mut self) -> PC2_W { PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc3(&mut self) -> PC3_W { PC3_W::new(self, 27) } diff --git a/src/port2/iocr12.rs b/src/port2/iocr12.rs index 4f8b652e..6ffdc8ac 100644 --- a/src/port2/iocr12.rs +++ b/src/port2/iocr12.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc12(&mut self) -> PC12_W { PC12_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc13(&mut self) -> PC13_W { PC13_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc14(&mut self) -> PC14_W { PC14_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc15(&mut self) -> PC15_W { PC15_W::new(self, 27) } diff --git a/src/port2/iocr4.rs b/src/port2/iocr4.rs index 27fbc929..9f5444fa 100644 --- a/src/port2/iocr4.rs +++ b/src/port2/iocr4.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc4(&mut self) -> PC4_W { PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc5(&mut self) -> PC5_W { PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc6(&mut self) -> PC6_W { PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc7(&mut self) -> PC7_W { PC7_W::new(self, 27) } diff --git a/src/port2/iocr8.rs b/src/port2/iocr8.rs index d8b10679..b9f118ab 100644 --- a/src/port2/iocr8.rs +++ b/src/port2/iocr8.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc8(&mut self) -> PC8_W { PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc9(&mut self) -> PC9_W { PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc10(&mut self) -> PC10_W { PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc11(&mut self) -> PC11_W { PC11_W::new(self, 27) } diff --git a/src/port2/omr.rs b/src/port2/omr.rs index 5fd03cd0..9ceb3860 100644 --- a/src/port2/omr.rs +++ b/src/port2/omr.rs @@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] - #[must_use] pub fn ps0(&mut self) -> PS0_W { PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] - #[must_use] pub fn ps1(&mut self) -> PS1_W { PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] - #[must_use] pub fn ps2(&mut self) -> PS2_W { PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] - #[must_use] pub fn ps3(&mut self) -> PS3_W { PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] - #[must_use] pub fn ps4(&mut self) -> PS4_W { PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] - #[must_use] pub fn ps5(&mut self) -> PS5_W { PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] - #[must_use] pub fn ps6(&mut self) -> PS6_W { PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] - #[must_use] pub fn ps7(&mut self) -> PS7_W { PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] - #[must_use] pub fn ps8(&mut self) -> PS8_W { PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] - #[must_use] pub fn ps9(&mut self) -> PS9_W { PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] - #[must_use] pub fn ps10(&mut self) -> PS10_W { PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] - #[must_use] pub fn ps11(&mut self) -> PS11_W { PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] - #[must_use] pub fn ps12(&mut self) -> PS12_W { PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] - #[must_use] pub fn ps13(&mut self) -> PS13_W { PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] - #[must_use] pub fn ps14(&mut self) -> PS14_W { PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] - #[must_use] pub fn ps15(&mut self) -> PS15_W { PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] - #[must_use] pub fn pr0(&mut self) -> PR0_W { PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] - #[must_use] pub fn pr1(&mut self) -> PR1_W { PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] - #[must_use] pub fn pr2(&mut self) -> PR2_W { PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] - #[must_use] pub fn pr3(&mut self) -> PR3_W { PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] - #[must_use] pub fn pr4(&mut self) -> PR4_W { PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] - #[must_use] pub fn pr5(&mut self) -> PR5_W { PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] - #[must_use] pub fn pr6(&mut self) -> PR6_W { PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] - #[must_use] pub fn pr7(&mut self) -> PR7_W { PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] - #[must_use] pub fn pr8(&mut self) -> PR8_W { PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] - #[must_use] pub fn pr9(&mut self) -> PR9_W { PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] - #[must_use] pub fn pr10(&mut self) -> PR10_W { PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] - #[must_use] pub fn pr11(&mut self) -> PR11_W { PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] - #[must_use] pub fn pr12(&mut self) -> PR12_W { PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] - #[must_use] pub fn pr13(&mut self) -> PR13_W { PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] - #[must_use] pub fn pr14(&mut self) -> PR14_W { PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] - #[must_use] pub fn pr15(&mut self) -> PR15_W { PR15_W::new(self, 31) } diff --git a/src/port2/out.rs b/src/port2/out.rs index ff800299..258d5b2f 100644 --- a/src/port2/out.rs +++ b/src/port2/out.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - #[must_use] pub fn p0(&mut self) -> P0_W { P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - #[must_use] pub fn p1(&mut self) -> P1_W { P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - #[must_use] pub fn p2(&mut self) -> P2_W { P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - #[must_use] pub fn p3(&mut self) -> P3_W { P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - #[must_use] pub fn p4(&mut self) -> P4_W { P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - #[must_use] pub fn p5(&mut self) -> P5_W { P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - #[must_use] pub fn p6(&mut self) -> P6_W { P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - #[must_use] pub fn p7(&mut self) -> P7_W { P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - #[must_use] pub fn p8(&mut self) -> P8_W { P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - #[must_use] pub fn p9(&mut self) -> P9_W { P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - #[must_use] pub fn p10(&mut self) -> P10_W { P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - #[must_use] pub fn p11(&mut self) -> P11_W { P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - #[must_use] pub fn p12(&mut self) -> P12_W { P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - #[must_use] pub fn p13(&mut self) -> P13_W { P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - #[must_use] pub fn p14(&mut self) -> P14_W { P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - #[must_use] pub fn p15(&mut self) -> P15_W { P15_W::new(self, 15) } diff --git a/src/port2/pdr0.rs b/src/port2/pdr0.rs index 653e8d85..9faa0f27 100644 --- a/src/port2/pdr0.rs +++ b/src/port2/pdr0.rs @@ -917,49 +917,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - #[must_use] pub fn pd0(&mut self) -> PD0_W { PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - #[must_use] pub fn pd1(&mut self) -> PD1_W { PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - #[must_use] pub fn pd2(&mut self) -> PD2_W { PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - #[must_use] pub fn pd3(&mut self) -> PD3_W { PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - #[must_use] pub fn pd4(&mut self) -> PD4_W { PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - #[must_use] pub fn pd5(&mut self) -> PD5_W { PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - #[must_use] pub fn pd6(&mut self) -> PD6_W { PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - #[must_use] pub fn pd7(&mut self) -> PD7_W { PD7_W::new(self, 28) } diff --git a/src/port2/pdr1.rs b/src/port2/pdr1.rs index c933e55c..cd0001bb 100644 --- a/src/port2/pdr1.rs +++ b/src/port2/pdr1.rs @@ -839,49 +839,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - #[must_use] pub fn pd8(&mut self) -> PD8_W { PD8_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - #[must_use] pub fn pd9(&mut self) -> PD9_W { PD9_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - #[must_use] pub fn pd10(&mut self) -> PD10_W { PD10_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - #[must_use] pub fn pd11(&mut self) -> PD11_W { PD11_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - #[must_use] pub fn pd12(&mut self) -> PD12_W { PD12_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - #[must_use] pub fn pd13(&mut self) -> PD13_W { PD13_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - #[must_use] pub fn pd14(&mut self) -> PD14_W { PD14_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - #[must_use] pub fn pd15(&mut self) -> PD15_W { PD15_W::new(self, 28) } diff --git a/src/port2/pps.rs b/src/port2/pps.rs index a5cf9d2b..79dcd256 100644 --- a/src/port2/pps.rs +++ b/src/port2/pps.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - #[must_use] pub fn pps0(&mut self) -> PPS0_W { PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - #[must_use] pub fn pps1(&mut self) -> PPS1_W { PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - #[must_use] pub fn pps2(&mut self) -> PPS2_W { PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - #[must_use] pub fn pps3(&mut self) -> PPS3_W { PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - #[must_use] pub fn pps4(&mut self) -> PPS4_W { PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - #[must_use] pub fn pps5(&mut self) -> PPS5_W { PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - #[must_use] pub fn pps6(&mut self) -> PPS6_W { PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - #[must_use] pub fn pps7(&mut self) -> PPS7_W { PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - #[must_use] pub fn pps8(&mut self) -> PPS8_W { PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - #[must_use] pub fn pps9(&mut self) -> PPS9_W { PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - #[must_use] pub fn pps10(&mut self) -> PPS10_W { PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - #[must_use] pub fn pps11(&mut self) -> PPS11_W { PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - #[must_use] pub fn pps12(&mut self) -> PPS12_W { PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - #[must_use] pub fn pps13(&mut self) -> PPS13_W { PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - #[must_use] pub fn pps14(&mut self) -> PPS14_W { PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - #[must_use] pub fn pps15(&mut self) -> PPS15_W { PPS15_W::new(self, 15) } diff --git a/src/port3/hwsel.rs b/src/port3/hwsel.rs index 5b742f6a..16afbec6 100644 --- a/src/port3/hwsel.rs +++ b/src/port3/hwsel.rs @@ -1255,97 +1255,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - #[must_use] pub fn hw0(&mut self) -> HW0_W { HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - #[must_use] pub fn hw1(&mut self) -> HW1_W { HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - #[must_use] pub fn hw2(&mut self) -> HW2_W { HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - #[must_use] pub fn hw3(&mut self) -> HW3_W { HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - #[must_use] pub fn hw4(&mut self) -> HW4_W { HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - #[must_use] pub fn hw5(&mut self) -> HW5_W { HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - #[must_use] pub fn hw6(&mut self) -> HW6_W { HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - #[must_use] pub fn hw7(&mut self) -> HW7_W { HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - #[must_use] pub fn hw8(&mut self) -> HW8_W { HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - #[must_use] pub fn hw9(&mut self) -> HW9_W { HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - #[must_use] pub fn hw10(&mut self) -> HW10_W { HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - #[must_use] pub fn hw11(&mut self) -> HW11_W { HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - #[must_use] pub fn hw12(&mut self) -> HW12_W { HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - #[must_use] pub fn hw13(&mut self) -> HW13_W { HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - #[must_use] pub fn hw14(&mut self) -> HW14_W { HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - #[must_use] pub fn hw15(&mut self) -> HW15_W { HW15_W::new(self, 30) } diff --git a/src/port3/iocr0.rs b/src/port3/iocr0.rs index 10777565..d9af1afb 100644 --- a/src/port3/iocr0.rs +++ b/src/port3/iocr0.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc0(&mut self) -> PC0_W { PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc1(&mut self) -> PC1_W { PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc2(&mut self) -> PC2_W { PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc3(&mut self) -> PC3_W { PC3_W::new(self, 27) } diff --git a/src/port3/iocr12.rs b/src/port3/iocr12.rs index a2b444c3..f33c896b 100644 --- a/src/port3/iocr12.rs +++ b/src/port3/iocr12.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc12(&mut self) -> PC12_W { PC12_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc13(&mut self) -> PC13_W { PC13_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc14(&mut self) -> PC14_W { PC14_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 12 to 15"] #[inline(always)] - #[must_use] pub fn pc15(&mut self) -> PC15_W { PC15_W::new(self, 27) } diff --git a/src/port3/iocr4.rs b/src/port3/iocr4.rs index f478ab38..8ceb8370 100644 --- a/src/port3/iocr4.rs +++ b/src/port3/iocr4.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc4(&mut self) -> PC4_W { PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc5(&mut self) -> PC5_W { PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc6(&mut self) -> PC6_W { PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc7(&mut self) -> PC7_W { PC7_W::new(self, 27) } diff --git a/src/port3/iocr8.rs b/src/port3/iocr8.rs index b1983eeb..2beabb5d 100644 --- a/src/port3/iocr8.rs +++ b/src/port3/iocr8.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc8(&mut self) -> PC8_W { PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc9(&mut self) -> PC9_W { PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc10(&mut self) -> PC10_W { PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc11(&mut self) -> PC11_W { PC11_W::new(self, 27) } diff --git a/src/port3/omr.rs b/src/port3/omr.rs index c45e0548..f79eb7d0 100644 --- a/src/port3/omr.rs +++ b/src/port3/omr.rs @@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] - #[must_use] pub fn ps0(&mut self) -> PS0_W { PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] - #[must_use] pub fn ps1(&mut self) -> PS1_W { PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] - #[must_use] pub fn ps2(&mut self) -> PS2_W { PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] - #[must_use] pub fn ps3(&mut self) -> PS3_W { PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] - #[must_use] pub fn ps4(&mut self) -> PS4_W { PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] - #[must_use] pub fn ps5(&mut self) -> PS5_W { PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] - #[must_use] pub fn ps6(&mut self) -> PS6_W { PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] - #[must_use] pub fn ps7(&mut self) -> PS7_W { PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] - #[must_use] pub fn ps8(&mut self) -> PS8_W { PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] - #[must_use] pub fn ps9(&mut self) -> PS9_W { PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] - #[must_use] pub fn ps10(&mut self) -> PS10_W { PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] - #[must_use] pub fn ps11(&mut self) -> PS11_W { PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] - #[must_use] pub fn ps12(&mut self) -> PS12_W { PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] - #[must_use] pub fn ps13(&mut self) -> PS13_W { PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] - #[must_use] pub fn ps14(&mut self) -> PS14_W { PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] - #[must_use] pub fn ps15(&mut self) -> PS15_W { PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] - #[must_use] pub fn pr0(&mut self) -> PR0_W { PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] - #[must_use] pub fn pr1(&mut self) -> PR1_W { PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] - #[must_use] pub fn pr2(&mut self) -> PR2_W { PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] - #[must_use] pub fn pr3(&mut self) -> PR3_W { PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] - #[must_use] pub fn pr4(&mut self) -> PR4_W { PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] - #[must_use] pub fn pr5(&mut self) -> PR5_W { PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] - #[must_use] pub fn pr6(&mut self) -> PR6_W { PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] - #[must_use] pub fn pr7(&mut self) -> PR7_W { PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] - #[must_use] pub fn pr8(&mut self) -> PR8_W { PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] - #[must_use] pub fn pr9(&mut self) -> PR9_W { PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] - #[must_use] pub fn pr10(&mut self) -> PR10_W { PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] - #[must_use] pub fn pr11(&mut self) -> PR11_W { PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] - #[must_use] pub fn pr12(&mut self) -> PR12_W { PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] - #[must_use] pub fn pr13(&mut self) -> PR13_W { PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] - #[must_use] pub fn pr14(&mut self) -> PR14_W { PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] - #[must_use] pub fn pr15(&mut self) -> PR15_W { PR15_W::new(self, 31) } diff --git a/src/port3/out.rs b/src/port3/out.rs index 5c53eb03..6cc2c8cf 100644 --- a/src/port3/out.rs +++ b/src/port3/out.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - #[must_use] pub fn p0(&mut self) -> P0_W { P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - #[must_use] pub fn p1(&mut self) -> P1_W { P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - #[must_use] pub fn p2(&mut self) -> P2_W { P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - #[must_use] pub fn p3(&mut self) -> P3_W { P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - #[must_use] pub fn p4(&mut self) -> P4_W { P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - #[must_use] pub fn p5(&mut self) -> P5_W { P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - #[must_use] pub fn p6(&mut self) -> P6_W { P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - #[must_use] pub fn p7(&mut self) -> P7_W { P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - #[must_use] pub fn p8(&mut self) -> P8_W { P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - #[must_use] pub fn p9(&mut self) -> P9_W { P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - #[must_use] pub fn p10(&mut self) -> P10_W { P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - #[must_use] pub fn p11(&mut self) -> P11_W { P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - #[must_use] pub fn p12(&mut self) -> P12_W { P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - #[must_use] pub fn p13(&mut self) -> P13_W { P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - #[must_use] pub fn p14(&mut self) -> P14_W { P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - #[must_use] pub fn p15(&mut self) -> P15_W { P15_W::new(self, 15) } diff --git a/src/port3/pdr0.rs b/src/port3/pdr0.rs index 6a4c2513..90fa9c6c 100644 --- a/src/port3/pdr0.rs +++ b/src/port3/pdr0.rs @@ -956,49 +956,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - #[must_use] pub fn pd0(&mut self) -> PD0_W { PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - #[must_use] pub fn pd1(&mut self) -> PD1_W { PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - #[must_use] pub fn pd2(&mut self) -> PD2_W { PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - #[must_use] pub fn pd3(&mut self) -> PD3_W { PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - #[must_use] pub fn pd4(&mut self) -> PD4_W { PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - #[must_use] pub fn pd5(&mut self) -> PD5_W { PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - #[must_use] pub fn pd6(&mut self) -> PD6_W { PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - #[must_use] pub fn pd7(&mut self) -> PD7_W { PD7_W::new(self, 28) } diff --git a/src/port3/pdr1.rs b/src/port3/pdr1.rs index e793877b..3282f9fa 100644 --- a/src/port3/pdr1.rs +++ b/src/port3/pdr1.rs @@ -1073,49 +1073,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - #[must_use] pub fn pd8(&mut self) -> PD8_W { PD8_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - #[must_use] pub fn pd9(&mut self) -> PD9_W { PD9_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - #[must_use] pub fn pd10(&mut self) -> PD10_W { PD10_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - #[must_use] pub fn pd11(&mut self) -> PD11_W { PD11_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - #[must_use] pub fn pd12(&mut self) -> PD12_W { PD12_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - #[must_use] pub fn pd13(&mut self) -> PD13_W { PD13_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - #[must_use] pub fn pd14(&mut self) -> PD14_W { PD14_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - #[must_use] pub fn pd15(&mut self) -> PD15_W { PD15_W::new(self, 28) } diff --git a/src/port3/pps.rs b/src/port3/pps.rs index 539e527d..79b7cd0b 100644 --- a/src/port3/pps.rs +++ b/src/port3/pps.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - #[must_use] pub fn pps0(&mut self) -> PPS0_W { PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - #[must_use] pub fn pps1(&mut self) -> PPS1_W { PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - #[must_use] pub fn pps2(&mut self) -> PPS2_W { PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - #[must_use] pub fn pps3(&mut self) -> PPS3_W { PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - #[must_use] pub fn pps4(&mut self) -> PPS4_W { PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - #[must_use] pub fn pps5(&mut self) -> PPS5_W { PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - #[must_use] pub fn pps6(&mut self) -> PPS6_W { PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - #[must_use] pub fn pps7(&mut self) -> PPS7_W { PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - #[must_use] pub fn pps8(&mut self) -> PPS8_W { PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - #[must_use] pub fn pps9(&mut self) -> PPS9_W { PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - #[must_use] pub fn pps10(&mut self) -> PPS10_W { PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - #[must_use] pub fn pps11(&mut self) -> PPS11_W { PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - #[must_use] pub fn pps12(&mut self) -> PPS12_W { PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - #[must_use] pub fn pps13(&mut self) -> PPS13_W { PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - #[must_use] pub fn pps14(&mut self) -> PPS14_W { PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - #[must_use] pub fn pps15(&mut self) -> PPS15_W { PPS15_W::new(self, 15) } diff --git a/src/port4/hwsel.rs b/src/port4/hwsel.rs index 319b9400..bf4bcdc3 100644 --- a/src/port4/hwsel.rs +++ b/src/port4/hwsel.rs @@ -1255,97 +1255,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - #[must_use] pub fn hw0(&mut self) -> HW0_W { HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - #[must_use] pub fn hw1(&mut self) -> HW1_W { HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - #[must_use] pub fn hw2(&mut self) -> HW2_W { HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - #[must_use] pub fn hw3(&mut self) -> HW3_W { HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - #[must_use] pub fn hw4(&mut self) -> HW4_W { HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - #[must_use] pub fn hw5(&mut self) -> HW5_W { HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - #[must_use] pub fn hw6(&mut self) -> HW6_W { HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - #[must_use] pub fn hw7(&mut self) -> HW7_W { HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - #[must_use] pub fn hw8(&mut self) -> HW8_W { HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - #[must_use] pub fn hw9(&mut self) -> HW9_W { HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - #[must_use] pub fn hw10(&mut self) -> HW10_W { HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - #[must_use] pub fn hw11(&mut self) -> HW11_W { HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - #[must_use] pub fn hw12(&mut self) -> HW12_W { HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - #[must_use] pub fn hw13(&mut self) -> HW13_W { HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - #[must_use] pub fn hw14(&mut self) -> HW14_W { HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - #[must_use] pub fn hw15(&mut self) -> HW15_W { HW15_W::new(self, 30) } diff --git a/src/port4/iocr0.rs b/src/port4/iocr0.rs index 40f3268a..2c968589 100644 --- a/src/port4/iocr0.rs +++ b/src/port4/iocr0.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc0(&mut self) -> PC0_W { PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc1(&mut self) -> PC1_W { PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc2(&mut self) -> PC2_W { PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc3(&mut self) -> PC3_W { PC3_W::new(self, 27) } diff --git a/src/port4/iocr4.rs b/src/port4/iocr4.rs index 87941a23..076924e7 100644 --- a/src/port4/iocr4.rs +++ b/src/port4/iocr4.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc4(&mut self) -> PC4_W { PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc5(&mut self) -> PC5_W { PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc6(&mut self) -> PC6_W { PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc7(&mut self) -> PC7_W { PC7_W::new(self, 27) } diff --git a/src/port4/omr.rs b/src/port4/omr.rs index e36e0a76..70fefc94 100644 --- a/src/port4/omr.rs +++ b/src/port4/omr.rs @@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] - #[must_use] pub fn ps0(&mut self) -> PS0_W { PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] - #[must_use] pub fn ps1(&mut self) -> PS1_W { PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] - #[must_use] pub fn ps2(&mut self) -> PS2_W { PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] - #[must_use] pub fn ps3(&mut self) -> PS3_W { PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] - #[must_use] pub fn ps4(&mut self) -> PS4_W { PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] - #[must_use] pub fn ps5(&mut self) -> PS5_W { PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] - #[must_use] pub fn ps6(&mut self) -> PS6_W { PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] - #[must_use] pub fn ps7(&mut self) -> PS7_W { PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] - #[must_use] pub fn ps8(&mut self) -> PS8_W { PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] - #[must_use] pub fn ps9(&mut self) -> PS9_W { PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] - #[must_use] pub fn ps10(&mut self) -> PS10_W { PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] - #[must_use] pub fn ps11(&mut self) -> PS11_W { PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] - #[must_use] pub fn ps12(&mut self) -> PS12_W { PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] - #[must_use] pub fn ps13(&mut self) -> PS13_W { PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] - #[must_use] pub fn ps14(&mut self) -> PS14_W { PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] - #[must_use] pub fn ps15(&mut self) -> PS15_W { PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] - #[must_use] pub fn pr0(&mut self) -> PR0_W { PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] - #[must_use] pub fn pr1(&mut self) -> PR1_W { PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] - #[must_use] pub fn pr2(&mut self) -> PR2_W { PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] - #[must_use] pub fn pr3(&mut self) -> PR3_W { PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] - #[must_use] pub fn pr4(&mut self) -> PR4_W { PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] - #[must_use] pub fn pr5(&mut self) -> PR5_W { PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] - #[must_use] pub fn pr6(&mut self) -> PR6_W { PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] - #[must_use] pub fn pr7(&mut self) -> PR7_W { PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] - #[must_use] pub fn pr8(&mut self) -> PR8_W { PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] - #[must_use] pub fn pr9(&mut self) -> PR9_W { PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] - #[must_use] pub fn pr10(&mut self) -> PR10_W { PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] - #[must_use] pub fn pr11(&mut self) -> PR11_W { PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] - #[must_use] pub fn pr12(&mut self) -> PR12_W { PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] - #[must_use] pub fn pr13(&mut self) -> PR13_W { PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] - #[must_use] pub fn pr14(&mut self) -> PR14_W { PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] - #[must_use] pub fn pr15(&mut self) -> PR15_W { PR15_W::new(self, 31) } diff --git a/src/port4/out.rs b/src/port4/out.rs index 59b6c602..baa45fed 100644 --- a/src/port4/out.rs +++ b/src/port4/out.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - #[must_use] pub fn p0(&mut self) -> P0_W { P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - #[must_use] pub fn p1(&mut self) -> P1_W { P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - #[must_use] pub fn p2(&mut self) -> P2_W { P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - #[must_use] pub fn p3(&mut self) -> P3_W { P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - #[must_use] pub fn p4(&mut self) -> P4_W { P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - #[must_use] pub fn p5(&mut self) -> P5_W { P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - #[must_use] pub fn p6(&mut self) -> P6_W { P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - #[must_use] pub fn p7(&mut self) -> P7_W { P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - #[must_use] pub fn p8(&mut self) -> P8_W { P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - #[must_use] pub fn p9(&mut self) -> P9_W { P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - #[must_use] pub fn p10(&mut self) -> P10_W { P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - #[must_use] pub fn p11(&mut self) -> P11_W { P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - #[must_use] pub fn p12(&mut self) -> P12_W { P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - #[must_use] pub fn p13(&mut self) -> P13_W { P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - #[must_use] pub fn p14(&mut self) -> P14_W { P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - #[must_use] pub fn p15(&mut self) -> P15_W { P15_W::new(self, 15) } diff --git a/src/port4/pdr0.rs b/src/port4/pdr0.rs index 8960be3e..2c7f6121 100644 --- a/src/port4/pdr0.rs +++ b/src/port4/pdr0.rs @@ -1073,49 +1073,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - #[must_use] pub fn pd0(&mut self) -> PD0_W { PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - #[must_use] pub fn pd1(&mut self) -> PD1_W { PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - #[must_use] pub fn pd2(&mut self) -> PD2_W { PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - #[must_use] pub fn pd3(&mut self) -> PD3_W { PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - #[must_use] pub fn pd4(&mut self) -> PD4_W { PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - #[must_use] pub fn pd5(&mut self) -> PD5_W { PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - #[must_use] pub fn pd6(&mut self) -> PD6_W { PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - #[must_use] pub fn pd7(&mut self) -> PD7_W { PD7_W::new(self, 28) } diff --git a/src/port4/pps.rs b/src/port4/pps.rs index 201ad4ba..dc0c5895 100644 --- a/src/port4/pps.rs +++ b/src/port4/pps.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - #[must_use] pub fn pps0(&mut self) -> PPS0_W { PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - #[must_use] pub fn pps1(&mut self) -> PPS1_W { PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - #[must_use] pub fn pps2(&mut self) -> PPS2_W { PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - #[must_use] pub fn pps3(&mut self) -> PPS3_W { PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - #[must_use] pub fn pps4(&mut self) -> PPS4_W { PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - #[must_use] pub fn pps5(&mut self) -> PPS5_W { PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - #[must_use] pub fn pps6(&mut self) -> PPS6_W { PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - #[must_use] pub fn pps7(&mut self) -> PPS7_W { PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - #[must_use] pub fn pps8(&mut self) -> PPS8_W { PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - #[must_use] pub fn pps9(&mut self) -> PPS9_W { PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - #[must_use] pub fn pps10(&mut self) -> PPS10_W { PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - #[must_use] pub fn pps11(&mut self) -> PPS11_W { PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - #[must_use] pub fn pps12(&mut self) -> PPS12_W { PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - #[must_use] pub fn pps13(&mut self) -> PPS13_W { PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - #[must_use] pub fn pps14(&mut self) -> PPS14_W { PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - #[must_use] pub fn pps15(&mut self) -> PPS15_W { PPS15_W::new(self, 15) } diff --git a/src/port5/hwsel.rs b/src/port5/hwsel.rs index 1408bb69..802b0a37 100644 --- a/src/port5/hwsel.rs +++ b/src/port5/hwsel.rs @@ -1255,97 +1255,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - #[must_use] pub fn hw0(&mut self) -> HW0_W { HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - #[must_use] pub fn hw1(&mut self) -> HW1_W { HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - #[must_use] pub fn hw2(&mut self) -> HW2_W { HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - #[must_use] pub fn hw3(&mut self) -> HW3_W { HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - #[must_use] pub fn hw4(&mut self) -> HW4_W { HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - #[must_use] pub fn hw5(&mut self) -> HW5_W { HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - #[must_use] pub fn hw6(&mut self) -> HW6_W { HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - #[must_use] pub fn hw7(&mut self) -> HW7_W { HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - #[must_use] pub fn hw8(&mut self) -> HW8_W { HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - #[must_use] pub fn hw9(&mut self) -> HW9_W { HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - #[must_use] pub fn hw10(&mut self) -> HW10_W { HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - #[must_use] pub fn hw11(&mut self) -> HW11_W { HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - #[must_use] pub fn hw12(&mut self) -> HW12_W { HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - #[must_use] pub fn hw13(&mut self) -> HW13_W { HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - #[must_use] pub fn hw14(&mut self) -> HW14_W { HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - #[must_use] pub fn hw15(&mut self) -> HW15_W { HW15_W::new(self, 30) } diff --git a/src/port5/iocr0.rs b/src/port5/iocr0.rs index 57e54934..d041a62a 100644 --- a/src/port5/iocr0.rs +++ b/src/port5/iocr0.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc0(&mut self) -> PC0_W { PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc1(&mut self) -> PC1_W { PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc2(&mut self) -> PC2_W { PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc3(&mut self) -> PC3_W { PC3_W::new(self, 27) } diff --git a/src/port5/iocr4.rs b/src/port5/iocr4.rs index e27d11eb..c665fa4e 100644 --- a/src/port5/iocr4.rs +++ b/src/port5/iocr4.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc4(&mut self) -> PC4_W { PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc5(&mut self) -> PC5_W { PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc6(&mut self) -> PC6_W { PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc7(&mut self) -> PC7_W { PC7_W::new(self, 27) } diff --git a/src/port5/iocr8.rs b/src/port5/iocr8.rs index b840ebcd..22d40fc7 100644 --- a/src/port5/iocr8.rs +++ b/src/port5/iocr8.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc8(&mut self) -> PC8_W { PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc9(&mut self) -> PC9_W { PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc10(&mut self) -> PC10_W { PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc11(&mut self) -> PC11_W { PC11_W::new(self, 27) } diff --git a/src/port5/omr.rs b/src/port5/omr.rs index 22c7e453..a3cb9e09 100644 --- a/src/port5/omr.rs +++ b/src/port5/omr.rs @@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] - #[must_use] pub fn ps0(&mut self) -> PS0_W { PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] - #[must_use] pub fn ps1(&mut self) -> PS1_W { PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] - #[must_use] pub fn ps2(&mut self) -> PS2_W { PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] - #[must_use] pub fn ps3(&mut self) -> PS3_W { PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] - #[must_use] pub fn ps4(&mut self) -> PS4_W { PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] - #[must_use] pub fn ps5(&mut self) -> PS5_W { PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] - #[must_use] pub fn ps6(&mut self) -> PS6_W { PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] - #[must_use] pub fn ps7(&mut self) -> PS7_W { PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] - #[must_use] pub fn ps8(&mut self) -> PS8_W { PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] - #[must_use] pub fn ps9(&mut self) -> PS9_W { PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] - #[must_use] pub fn ps10(&mut self) -> PS10_W { PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] - #[must_use] pub fn ps11(&mut self) -> PS11_W { PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] - #[must_use] pub fn ps12(&mut self) -> PS12_W { PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] - #[must_use] pub fn ps13(&mut self) -> PS13_W { PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] - #[must_use] pub fn ps14(&mut self) -> PS14_W { PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] - #[must_use] pub fn ps15(&mut self) -> PS15_W { PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] - #[must_use] pub fn pr0(&mut self) -> PR0_W { PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] - #[must_use] pub fn pr1(&mut self) -> PR1_W { PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] - #[must_use] pub fn pr2(&mut self) -> PR2_W { PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] - #[must_use] pub fn pr3(&mut self) -> PR3_W { PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] - #[must_use] pub fn pr4(&mut self) -> PR4_W { PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] - #[must_use] pub fn pr5(&mut self) -> PR5_W { PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] - #[must_use] pub fn pr6(&mut self) -> PR6_W { PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] - #[must_use] pub fn pr7(&mut self) -> PR7_W { PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] - #[must_use] pub fn pr8(&mut self) -> PR8_W { PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] - #[must_use] pub fn pr9(&mut self) -> PR9_W { PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] - #[must_use] pub fn pr10(&mut self) -> PR10_W { PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] - #[must_use] pub fn pr11(&mut self) -> PR11_W { PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] - #[must_use] pub fn pr12(&mut self) -> PR12_W { PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] - #[must_use] pub fn pr13(&mut self) -> PR13_W { PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] - #[must_use] pub fn pr14(&mut self) -> PR14_W { PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] - #[must_use] pub fn pr15(&mut self) -> PR15_W { PR15_W::new(self, 31) } diff --git a/src/port5/out.rs b/src/port5/out.rs index b8560e41..6d81e51e 100644 --- a/src/port5/out.rs +++ b/src/port5/out.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - #[must_use] pub fn p0(&mut self) -> P0_W { P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - #[must_use] pub fn p1(&mut self) -> P1_W { P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - #[must_use] pub fn p2(&mut self) -> P2_W { P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - #[must_use] pub fn p3(&mut self) -> P3_W { P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - #[must_use] pub fn p4(&mut self) -> P4_W { P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - #[must_use] pub fn p5(&mut self) -> P5_W { P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - #[must_use] pub fn p6(&mut self) -> P6_W { P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - #[must_use] pub fn p7(&mut self) -> P7_W { P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - #[must_use] pub fn p8(&mut self) -> P8_W { P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - #[must_use] pub fn p9(&mut self) -> P9_W { P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - #[must_use] pub fn p10(&mut self) -> P10_W { P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - #[must_use] pub fn p11(&mut self) -> P11_W { P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - #[must_use] pub fn p12(&mut self) -> P12_W { P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - #[must_use] pub fn p13(&mut self) -> P13_W { P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - #[must_use] pub fn p14(&mut self) -> P14_W { P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - #[must_use] pub fn p15(&mut self) -> P15_W { P15_W::new(self, 15) } diff --git a/src/port5/pdr0.rs b/src/port5/pdr0.rs index b194ee86..584636ea 100644 --- a/src/port5/pdr0.rs +++ b/src/port5/pdr0.rs @@ -995,49 +995,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - #[must_use] pub fn pd0(&mut self) -> PD0_W { PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - #[must_use] pub fn pd1(&mut self) -> PD1_W { PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - #[must_use] pub fn pd2(&mut self) -> PD2_W { PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - #[must_use] pub fn pd3(&mut self) -> PD3_W { PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - #[must_use] pub fn pd4(&mut self) -> PD4_W { PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - #[must_use] pub fn pd5(&mut self) -> PD5_W { PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - #[must_use] pub fn pd6(&mut self) -> PD6_W { PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - #[must_use] pub fn pd7(&mut self) -> PD7_W { PD7_W::new(self, 28) } diff --git a/src/port5/pdr1.rs b/src/port5/pdr1.rs index cde8072c..060a1fe5 100644 --- a/src/port5/pdr1.rs +++ b/src/port5/pdr1.rs @@ -917,49 +917,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - #[must_use] pub fn pd8(&mut self) -> PD8_W { PD8_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - #[must_use] pub fn pd9(&mut self) -> PD9_W { PD9_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - #[must_use] pub fn pd10(&mut self) -> PD10_W { PD10_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - #[must_use] pub fn pd11(&mut self) -> PD11_W { PD11_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - #[must_use] pub fn pd12(&mut self) -> PD12_W { PD12_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - #[must_use] pub fn pd13(&mut self) -> PD13_W { PD13_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - #[must_use] pub fn pd14(&mut self) -> PD14_W { PD14_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - #[must_use] pub fn pd15(&mut self) -> PD15_W { PD15_W::new(self, 28) } diff --git a/src/port5/pps.rs b/src/port5/pps.rs index 500c40eb..df21007b 100644 --- a/src/port5/pps.rs +++ b/src/port5/pps.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - #[must_use] pub fn pps0(&mut self) -> PPS0_W { PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - #[must_use] pub fn pps1(&mut self) -> PPS1_W { PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - #[must_use] pub fn pps2(&mut self) -> PPS2_W { PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - #[must_use] pub fn pps3(&mut self) -> PPS3_W { PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - #[must_use] pub fn pps4(&mut self) -> PPS4_W { PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - #[must_use] pub fn pps5(&mut self) -> PPS5_W { PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - #[must_use] pub fn pps6(&mut self) -> PPS6_W { PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - #[must_use] pub fn pps7(&mut self) -> PPS7_W { PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - #[must_use] pub fn pps8(&mut self) -> PPS8_W { PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - #[must_use] pub fn pps9(&mut self) -> PPS9_W { PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - #[must_use] pub fn pps10(&mut self) -> PPS10_W { PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - #[must_use] pub fn pps11(&mut self) -> PPS11_W { PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - #[must_use] pub fn pps12(&mut self) -> PPS12_W { PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - #[must_use] pub fn pps13(&mut self) -> PPS13_W { PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - #[must_use] pub fn pps14(&mut self) -> PPS14_W { PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - #[must_use] pub fn pps15(&mut self) -> PPS15_W { PPS15_W::new(self, 15) } diff --git a/src/port6/hwsel.rs b/src/port6/hwsel.rs index 5bd03ff9..46628bf1 100644 --- a/src/port6/hwsel.rs +++ b/src/port6/hwsel.rs @@ -1255,97 +1255,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - #[must_use] pub fn hw0(&mut self) -> HW0_W { HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - #[must_use] pub fn hw1(&mut self) -> HW1_W { HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - #[must_use] pub fn hw2(&mut self) -> HW2_W { HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - #[must_use] pub fn hw3(&mut self) -> HW3_W { HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - #[must_use] pub fn hw4(&mut self) -> HW4_W { HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - #[must_use] pub fn hw5(&mut self) -> HW5_W { HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - #[must_use] pub fn hw6(&mut self) -> HW6_W { HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - #[must_use] pub fn hw7(&mut self) -> HW7_W { HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - #[must_use] pub fn hw8(&mut self) -> HW8_W { HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - #[must_use] pub fn hw9(&mut self) -> HW9_W { HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - #[must_use] pub fn hw10(&mut self) -> HW10_W { HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - #[must_use] pub fn hw11(&mut self) -> HW11_W { HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - #[must_use] pub fn hw12(&mut self) -> HW12_W { HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - #[must_use] pub fn hw13(&mut self) -> HW13_W { HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - #[must_use] pub fn hw14(&mut self) -> HW14_W { HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - #[must_use] pub fn hw15(&mut self) -> HW15_W { HW15_W::new(self, 30) } diff --git a/src/port6/iocr0.rs b/src/port6/iocr0.rs index 12e8cf11..68bf4866 100644 --- a/src/port6/iocr0.rs +++ b/src/port6/iocr0.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc0(&mut self) -> PC0_W { PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc1(&mut self) -> PC1_W { PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc2(&mut self) -> PC2_W { PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc3(&mut self) -> PC3_W { PC3_W::new(self, 27) } diff --git a/src/port6/iocr4.rs b/src/port6/iocr4.rs index f8a2b721..37ceae92 100644 --- a/src/port6/iocr4.rs +++ b/src/port6/iocr4.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc4(&mut self) -> PC4_W { PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc5(&mut self) -> PC5_W { PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc6(&mut self) -> PC6_W { PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc7(&mut self) -> PC7_W { PC7_W::new(self, 27) } diff --git a/src/port6/omr.rs b/src/port6/omr.rs index 61606883..c6a91641 100644 --- a/src/port6/omr.rs +++ b/src/port6/omr.rs @@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] - #[must_use] pub fn ps0(&mut self) -> PS0_W { PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] - #[must_use] pub fn ps1(&mut self) -> PS1_W { PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] - #[must_use] pub fn ps2(&mut self) -> PS2_W { PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] - #[must_use] pub fn ps3(&mut self) -> PS3_W { PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] - #[must_use] pub fn ps4(&mut self) -> PS4_W { PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] - #[must_use] pub fn ps5(&mut self) -> PS5_W { PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] - #[must_use] pub fn ps6(&mut self) -> PS6_W { PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] - #[must_use] pub fn ps7(&mut self) -> PS7_W { PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] - #[must_use] pub fn ps8(&mut self) -> PS8_W { PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] - #[must_use] pub fn ps9(&mut self) -> PS9_W { PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] - #[must_use] pub fn ps10(&mut self) -> PS10_W { PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] - #[must_use] pub fn ps11(&mut self) -> PS11_W { PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] - #[must_use] pub fn ps12(&mut self) -> PS12_W { PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] - #[must_use] pub fn ps13(&mut self) -> PS13_W { PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] - #[must_use] pub fn ps14(&mut self) -> PS14_W { PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] - #[must_use] pub fn ps15(&mut self) -> PS15_W { PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] - #[must_use] pub fn pr0(&mut self) -> PR0_W { PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] - #[must_use] pub fn pr1(&mut self) -> PR1_W { PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] - #[must_use] pub fn pr2(&mut self) -> PR2_W { PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] - #[must_use] pub fn pr3(&mut self) -> PR3_W { PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] - #[must_use] pub fn pr4(&mut self) -> PR4_W { PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] - #[must_use] pub fn pr5(&mut self) -> PR5_W { PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] - #[must_use] pub fn pr6(&mut self) -> PR6_W { PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] - #[must_use] pub fn pr7(&mut self) -> PR7_W { PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] - #[must_use] pub fn pr8(&mut self) -> PR8_W { PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] - #[must_use] pub fn pr9(&mut self) -> PR9_W { PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] - #[must_use] pub fn pr10(&mut self) -> PR10_W { PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] - #[must_use] pub fn pr11(&mut self) -> PR11_W { PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] - #[must_use] pub fn pr12(&mut self) -> PR12_W { PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] - #[must_use] pub fn pr13(&mut self) -> PR13_W { PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] - #[must_use] pub fn pr14(&mut self) -> PR14_W { PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] - #[must_use] pub fn pr15(&mut self) -> PR15_W { PR15_W::new(self, 31) } diff --git a/src/port6/out.rs b/src/port6/out.rs index 11e53ce9..eea86ad7 100644 --- a/src/port6/out.rs +++ b/src/port6/out.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - #[must_use] pub fn p0(&mut self) -> P0_W { P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - #[must_use] pub fn p1(&mut self) -> P1_W { P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - #[must_use] pub fn p2(&mut self) -> P2_W { P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - #[must_use] pub fn p3(&mut self) -> P3_W { P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - #[must_use] pub fn p4(&mut self) -> P4_W { P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - #[must_use] pub fn p5(&mut self) -> P5_W { P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - #[must_use] pub fn p6(&mut self) -> P6_W { P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - #[must_use] pub fn p7(&mut self) -> P7_W { P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - #[must_use] pub fn p8(&mut self) -> P8_W { P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - #[must_use] pub fn p9(&mut self) -> P9_W { P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - #[must_use] pub fn p10(&mut self) -> P10_W { P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - #[must_use] pub fn p11(&mut self) -> P11_W { P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - #[must_use] pub fn p12(&mut self) -> P12_W { P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - #[must_use] pub fn p13(&mut self) -> P13_W { P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - #[must_use] pub fn p14(&mut self) -> P14_W { P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - #[must_use] pub fn p15(&mut self) -> P15_W { P15_W::new(self, 15) } diff --git a/src/port6/pdr0.rs b/src/port6/pdr0.rs index c7a52434..740b1c45 100644 --- a/src/port6/pdr0.rs +++ b/src/port6/pdr0.rs @@ -878,49 +878,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - #[must_use] pub fn pd0(&mut self) -> PD0_W { PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - #[must_use] pub fn pd1(&mut self) -> PD1_W { PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - #[must_use] pub fn pd2(&mut self) -> PD2_W { PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - #[must_use] pub fn pd3(&mut self) -> PD3_W { PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - #[must_use] pub fn pd4(&mut self) -> PD4_W { PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - #[must_use] pub fn pd5(&mut self) -> PD5_W { PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - #[must_use] pub fn pd6(&mut self) -> PD6_W { PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - #[must_use] pub fn pd7(&mut self) -> PD7_W { PD7_W::new(self, 28) } diff --git a/src/port6/pps.rs b/src/port6/pps.rs index c679d72a..f03a44f4 100644 --- a/src/port6/pps.rs +++ b/src/port6/pps.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - #[must_use] pub fn pps0(&mut self) -> PPS0_W { PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - #[must_use] pub fn pps1(&mut self) -> PPS1_W { PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - #[must_use] pub fn pps2(&mut self) -> PPS2_W { PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - #[must_use] pub fn pps3(&mut self) -> PPS3_W { PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - #[must_use] pub fn pps4(&mut self) -> PPS4_W { PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - #[must_use] pub fn pps5(&mut self) -> PPS5_W { PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - #[must_use] pub fn pps6(&mut self) -> PPS6_W { PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - #[must_use] pub fn pps7(&mut self) -> PPS7_W { PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - #[must_use] pub fn pps8(&mut self) -> PPS8_W { PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - #[must_use] pub fn pps9(&mut self) -> PPS9_W { PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - #[must_use] pub fn pps10(&mut self) -> PPS10_W { PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - #[must_use] pub fn pps11(&mut self) -> PPS11_W { PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - #[must_use] pub fn pps12(&mut self) -> PPS12_W { PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - #[must_use] pub fn pps13(&mut self) -> PPS13_W { PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - #[must_use] pub fn pps14(&mut self) -> PPS14_W { PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - #[must_use] pub fn pps15(&mut self) -> PPS15_W { PPS15_W::new(self, 15) } diff --git a/src/port7/hwsel.rs b/src/port7/hwsel.rs index b62af733..06d36fa2 100644 --- a/src/port7/hwsel.rs +++ b/src/port7/hwsel.rs @@ -1255,97 +1255,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - #[must_use] pub fn hw0(&mut self) -> HW0_W { HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - #[must_use] pub fn hw1(&mut self) -> HW1_W { HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - #[must_use] pub fn hw2(&mut self) -> HW2_W { HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - #[must_use] pub fn hw3(&mut self) -> HW3_W { HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - #[must_use] pub fn hw4(&mut self) -> HW4_W { HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - #[must_use] pub fn hw5(&mut self) -> HW5_W { HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - #[must_use] pub fn hw6(&mut self) -> HW6_W { HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - #[must_use] pub fn hw7(&mut self) -> HW7_W { HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - #[must_use] pub fn hw8(&mut self) -> HW8_W { HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - #[must_use] pub fn hw9(&mut self) -> HW9_W { HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - #[must_use] pub fn hw10(&mut self) -> HW10_W { HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - #[must_use] pub fn hw11(&mut self) -> HW11_W { HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - #[must_use] pub fn hw12(&mut self) -> HW12_W { HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - #[must_use] pub fn hw13(&mut self) -> HW13_W { HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - #[must_use] pub fn hw14(&mut self) -> HW14_W { HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - #[must_use] pub fn hw15(&mut self) -> HW15_W { HW15_W::new(self, 30) } diff --git a/src/port7/iocr0.rs b/src/port7/iocr0.rs index 79235d54..1b191cf2 100644 --- a/src/port7/iocr0.rs +++ b/src/port7/iocr0.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc0(&mut self) -> PC0_W { PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc1(&mut self) -> PC1_W { PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc2(&mut self) -> PC2_W { PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc3(&mut self) -> PC3_W { PC3_W::new(self, 27) } diff --git a/src/port7/iocr4.rs b/src/port7/iocr4.rs index 4173a9b2..9fbc29d2 100644 --- a/src/port7/iocr4.rs +++ b/src/port7/iocr4.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc4(&mut self) -> PC4_W { PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc5(&mut self) -> PC5_W { PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc6(&mut self) -> PC6_W { PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc7(&mut self) -> PC7_W { PC7_W::new(self, 27) } diff --git a/src/port7/iocr8.rs b/src/port7/iocr8.rs index eee8da15..3c7f02ec 100644 --- a/src/port7/iocr8.rs +++ b/src/port7/iocr8.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc8(&mut self) -> PC8_W { PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc9(&mut self) -> PC9_W { PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc10(&mut self) -> PC10_W { PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc11(&mut self) -> PC11_W { PC11_W::new(self, 27) } diff --git a/src/port7/omr.rs b/src/port7/omr.rs index ab2d78b8..2f088ff3 100644 --- a/src/port7/omr.rs +++ b/src/port7/omr.rs @@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] - #[must_use] pub fn ps0(&mut self) -> PS0_W { PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] - #[must_use] pub fn ps1(&mut self) -> PS1_W { PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] - #[must_use] pub fn ps2(&mut self) -> PS2_W { PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] - #[must_use] pub fn ps3(&mut self) -> PS3_W { PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] - #[must_use] pub fn ps4(&mut self) -> PS4_W { PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] - #[must_use] pub fn ps5(&mut self) -> PS5_W { PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] - #[must_use] pub fn ps6(&mut self) -> PS6_W { PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] - #[must_use] pub fn ps7(&mut self) -> PS7_W { PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] - #[must_use] pub fn ps8(&mut self) -> PS8_W { PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] - #[must_use] pub fn ps9(&mut self) -> PS9_W { PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] - #[must_use] pub fn ps10(&mut self) -> PS10_W { PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] - #[must_use] pub fn ps11(&mut self) -> PS11_W { PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] - #[must_use] pub fn ps12(&mut self) -> PS12_W { PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] - #[must_use] pub fn ps13(&mut self) -> PS13_W { PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] - #[must_use] pub fn ps14(&mut self) -> PS14_W { PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] - #[must_use] pub fn ps15(&mut self) -> PS15_W { PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] - #[must_use] pub fn pr0(&mut self) -> PR0_W { PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] - #[must_use] pub fn pr1(&mut self) -> PR1_W { PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] - #[must_use] pub fn pr2(&mut self) -> PR2_W { PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] - #[must_use] pub fn pr3(&mut self) -> PR3_W { PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] - #[must_use] pub fn pr4(&mut self) -> PR4_W { PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] - #[must_use] pub fn pr5(&mut self) -> PR5_W { PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] - #[must_use] pub fn pr6(&mut self) -> PR6_W { PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] - #[must_use] pub fn pr7(&mut self) -> PR7_W { PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] - #[must_use] pub fn pr8(&mut self) -> PR8_W { PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] - #[must_use] pub fn pr9(&mut self) -> PR9_W { PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] - #[must_use] pub fn pr10(&mut self) -> PR10_W { PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] - #[must_use] pub fn pr11(&mut self) -> PR11_W { PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] - #[must_use] pub fn pr12(&mut self) -> PR12_W { PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] - #[must_use] pub fn pr13(&mut self) -> PR13_W { PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] - #[must_use] pub fn pr14(&mut self) -> PR14_W { PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] - #[must_use] pub fn pr15(&mut self) -> PR15_W { PR15_W::new(self, 31) } diff --git a/src/port7/out.rs b/src/port7/out.rs index 93d9405e..eb8822ba 100644 --- a/src/port7/out.rs +++ b/src/port7/out.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - #[must_use] pub fn p0(&mut self) -> P0_W { P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - #[must_use] pub fn p1(&mut self) -> P1_W { P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - #[must_use] pub fn p2(&mut self) -> P2_W { P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - #[must_use] pub fn p3(&mut self) -> P3_W { P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - #[must_use] pub fn p4(&mut self) -> P4_W { P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - #[must_use] pub fn p5(&mut self) -> P5_W { P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - #[must_use] pub fn p6(&mut self) -> P6_W { P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - #[must_use] pub fn p7(&mut self) -> P7_W { P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - #[must_use] pub fn p8(&mut self) -> P8_W { P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - #[must_use] pub fn p9(&mut self) -> P9_W { P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - #[must_use] pub fn p10(&mut self) -> P10_W { P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - #[must_use] pub fn p11(&mut self) -> P11_W { P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - #[must_use] pub fn p12(&mut self) -> P12_W { P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - #[must_use] pub fn p13(&mut self) -> P13_W { P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - #[must_use] pub fn p14(&mut self) -> P14_W { P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - #[must_use] pub fn p15(&mut self) -> P15_W { P15_W::new(self, 15) } diff --git a/src/port7/pdr0.rs b/src/port7/pdr0.rs index 1744c30f..822afbdf 100644 --- a/src/port7/pdr0.rs +++ b/src/port7/pdr0.rs @@ -995,49 +995,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - #[must_use] pub fn pd0(&mut self) -> PD0_W { PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - #[must_use] pub fn pd1(&mut self) -> PD1_W { PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - #[must_use] pub fn pd2(&mut self) -> PD2_W { PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - #[must_use] pub fn pd3(&mut self) -> PD3_W { PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - #[must_use] pub fn pd4(&mut self) -> PD4_W { PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - #[must_use] pub fn pd5(&mut self) -> PD5_W { PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - #[must_use] pub fn pd6(&mut self) -> PD6_W { PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - #[must_use] pub fn pd7(&mut self) -> PD7_W { PD7_W::new(self, 28) } diff --git a/src/port7/pdr1.rs b/src/port7/pdr1.rs index a9457691..82a53f10 100644 --- a/src/port7/pdr1.rs +++ b/src/port7/pdr1.rs @@ -917,49 +917,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - #[must_use] pub fn pd8(&mut self) -> PD8_W { PD8_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - #[must_use] pub fn pd9(&mut self) -> PD9_W { PD9_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - #[must_use] pub fn pd10(&mut self) -> PD10_W { PD10_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - #[must_use] pub fn pd11(&mut self) -> PD11_W { PD11_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - #[must_use] pub fn pd12(&mut self) -> PD12_W { PD12_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - #[must_use] pub fn pd13(&mut self) -> PD13_W { PD13_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - #[must_use] pub fn pd14(&mut self) -> PD14_W { PD14_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - #[must_use] pub fn pd15(&mut self) -> PD15_W { PD15_W::new(self, 28) } diff --git a/src/port7/pps.rs b/src/port7/pps.rs index e56b8c51..eb96c0fa 100644 --- a/src/port7/pps.rs +++ b/src/port7/pps.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - #[must_use] pub fn pps0(&mut self) -> PPS0_W { PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - #[must_use] pub fn pps1(&mut self) -> PPS1_W { PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - #[must_use] pub fn pps2(&mut self) -> PPS2_W { PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - #[must_use] pub fn pps3(&mut self) -> PPS3_W { PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - #[must_use] pub fn pps4(&mut self) -> PPS4_W { PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - #[must_use] pub fn pps5(&mut self) -> PPS5_W { PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - #[must_use] pub fn pps6(&mut self) -> PPS6_W { PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - #[must_use] pub fn pps7(&mut self) -> PPS7_W { PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - #[must_use] pub fn pps8(&mut self) -> PPS8_W { PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - #[must_use] pub fn pps9(&mut self) -> PPS9_W { PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - #[must_use] pub fn pps10(&mut self) -> PPS10_W { PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - #[must_use] pub fn pps11(&mut self) -> PPS11_W { PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - #[must_use] pub fn pps12(&mut self) -> PPS12_W { PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - #[must_use] pub fn pps13(&mut self) -> PPS13_W { PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - #[must_use] pub fn pps14(&mut self) -> PPS14_W { PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - #[must_use] pub fn pps15(&mut self) -> PPS15_W { PPS15_W::new(self, 15) } diff --git a/src/port8/hwsel.rs b/src/port8/hwsel.rs index 0ceaf499..fd9c4d89 100644 --- a/src/port8/hwsel.rs +++ b/src/port8/hwsel.rs @@ -1255,97 +1255,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - #[must_use] pub fn hw0(&mut self) -> HW0_W { HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - #[must_use] pub fn hw1(&mut self) -> HW1_W { HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - #[must_use] pub fn hw2(&mut self) -> HW2_W { HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - #[must_use] pub fn hw3(&mut self) -> HW3_W { HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - #[must_use] pub fn hw4(&mut self) -> HW4_W { HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - #[must_use] pub fn hw5(&mut self) -> HW5_W { HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - #[must_use] pub fn hw6(&mut self) -> HW6_W { HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - #[must_use] pub fn hw7(&mut self) -> HW7_W { HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - #[must_use] pub fn hw8(&mut self) -> HW8_W { HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - #[must_use] pub fn hw9(&mut self) -> HW9_W { HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - #[must_use] pub fn hw10(&mut self) -> HW10_W { HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - #[must_use] pub fn hw11(&mut self) -> HW11_W { HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - #[must_use] pub fn hw12(&mut self) -> HW12_W { HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - #[must_use] pub fn hw13(&mut self) -> HW13_W { HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - #[must_use] pub fn hw14(&mut self) -> HW14_W { HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - #[must_use] pub fn hw15(&mut self) -> HW15_W { HW15_W::new(self, 30) } diff --git a/src/port8/iocr0.rs b/src/port8/iocr0.rs index bea9e22d..6e43cf6a 100644 --- a/src/port8/iocr0.rs +++ b/src/port8/iocr0.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc0(&mut self) -> PC0_W { PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc1(&mut self) -> PC1_W { PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc2(&mut self) -> PC2_W { PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc3(&mut self) -> PC3_W { PC3_W::new(self, 27) } diff --git a/src/port8/iocr4.rs b/src/port8/iocr4.rs index 9cbeb162..c49a7ad0 100644 --- a/src/port8/iocr4.rs +++ b/src/port8/iocr4.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc4(&mut self) -> PC4_W { PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc5(&mut self) -> PC5_W { PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc6(&mut self) -> PC6_W { PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc7(&mut self) -> PC7_W { PC7_W::new(self, 27) } diff --git a/src/port8/iocr8.rs b/src/port8/iocr8.rs index 2db9f52b..102b3d57 100644 --- a/src/port8/iocr8.rs +++ b/src/port8/iocr8.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc8(&mut self) -> PC8_W { PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc9(&mut self) -> PC9_W { PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc10(&mut self) -> PC10_W { PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc11(&mut self) -> PC11_W { PC11_W::new(self, 27) } diff --git a/src/port8/omr.rs b/src/port8/omr.rs index 34384545..c3864bab 100644 --- a/src/port8/omr.rs +++ b/src/port8/omr.rs @@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] - #[must_use] pub fn ps0(&mut self) -> PS0_W { PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] - #[must_use] pub fn ps1(&mut self) -> PS1_W { PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] - #[must_use] pub fn ps2(&mut self) -> PS2_W { PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] - #[must_use] pub fn ps3(&mut self) -> PS3_W { PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] - #[must_use] pub fn ps4(&mut self) -> PS4_W { PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] - #[must_use] pub fn ps5(&mut self) -> PS5_W { PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] - #[must_use] pub fn ps6(&mut self) -> PS6_W { PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] - #[must_use] pub fn ps7(&mut self) -> PS7_W { PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] - #[must_use] pub fn ps8(&mut self) -> PS8_W { PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] - #[must_use] pub fn ps9(&mut self) -> PS9_W { PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] - #[must_use] pub fn ps10(&mut self) -> PS10_W { PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] - #[must_use] pub fn ps11(&mut self) -> PS11_W { PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] - #[must_use] pub fn ps12(&mut self) -> PS12_W { PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] - #[must_use] pub fn ps13(&mut self) -> PS13_W { PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] - #[must_use] pub fn ps14(&mut self) -> PS14_W { PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] - #[must_use] pub fn ps15(&mut self) -> PS15_W { PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] - #[must_use] pub fn pr0(&mut self) -> PR0_W { PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] - #[must_use] pub fn pr1(&mut self) -> PR1_W { PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] - #[must_use] pub fn pr2(&mut self) -> PR2_W { PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] - #[must_use] pub fn pr3(&mut self) -> PR3_W { PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] - #[must_use] pub fn pr4(&mut self) -> PR4_W { PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] - #[must_use] pub fn pr5(&mut self) -> PR5_W { PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] - #[must_use] pub fn pr6(&mut self) -> PR6_W { PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] - #[must_use] pub fn pr7(&mut self) -> PR7_W { PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] - #[must_use] pub fn pr8(&mut self) -> PR8_W { PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] - #[must_use] pub fn pr9(&mut self) -> PR9_W { PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] - #[must_use] pub fn pr10(&mut self) -> PR10_W { PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] - #[must_use] pub fn pr11(&mut self) -> PR11_W { PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] - #[must_use] pub fn pr12(&mut self) -> PR12_W { PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] - #[must_use] pub fn pr13(&mut self) -> PR13_W { PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] - #[must_use] pub fn pr14(&mut self) -> PR14_W { PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] - #[must_use] pub fn pr15(&mut self) -> PR15_W { PR15_W::new(self, 31) } diff --git a/src/port8/out.rs b/src/port8/out.rs index 742fc821..9726b8ef 100644 --- a/src/port8/out.rs +++ b/src/port8/out.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - #[must_use] pub fn p0(&mut self) -> P0_W { P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - #[must_use] pub fn p1(&mut self) -> P1_W { P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - #[must_use] pub fn p2(&mut self) -> P2_W { P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - #[must_use] pub fn p3(&mut self) -> P3_W { P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - #[must_use] pub fn p4(&mut self) -> P4_W { P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - #[must_use] pub fn p5(&mut self) -> P5_W { P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - #[must_use] pub fn p6(&mut self) -> P6_W { P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - #[must_use] pub fn p7(&mut self) -> P7_W { P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - #[must_use] pub fn p8(&mut self) -> P8_W { P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - #[must_use] pub fn p9(&mut self) -> P9_W { P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - #[must_use] pub fn p10(&mut self) -> P10_W { P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - #[must_use] pub fn p11(&mut self) -> P11_W { P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - #[must_use] pub fn p12(&mut self) -> P12_W { P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - #[must_use] pub fn p13(&mut self) -> P13_W { P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - #[must_use] pub fn p14(&mut self) -> P14_W { P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - #[must_use] pub fn p15(&mut self) -> P15_W { P15_W::new(self, 15) } diff --git a/src/port8/pdr0.rs b/src/port8/pdr0.rs index 45571544..4e72ece1 100644 --- a/src/port8/pdr0.rs +++ b/src/port8/pdr0.rs @@ -995,49 +995,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - #[must_use] pub fn pd0(&mut self) -> PD0_W { PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - #[must_use] pub fn pd1(&mut self) -> PD1_W { PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - #[must_use] pub fn pd2(&mut self) -> PD2_W { PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - #[must_use] pub fn pd3(&mut self) -> PD3_W { PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - #[must_use] pub fn pd4(&mut self) -> PD4_W { PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - #[must_use] pub fn pd5(&mut self) -> PD5_W { PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - #[must_use] pub fn pd6(&mut self) -> PD6_W { PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - #[must_use] pub fn pd7(&mut self) -> PD7_W { PD7_W::new(self, 28) } diff --git a/src/port8/pdr1.rs b/src/port8/pdr1.rs index 41ab5cb4..632bf929 100644 --- a/src/port8/pdr1.rs +++ b/src/port8/pdr1.rs @@ -917,49 +917,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - #[must_use] pub fn pd8(&mut self) -> PD8_W { PD8_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - #[must_use] pub fn pd9(&mut self) -> PD9_W { PD9_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - #[must_use] pub fn pd10(&mut self) -> PD10_W { PD10_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - #[must_use] pub fn pd11(&mut self) -> PD11_W { PD11_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - #[must_use] pub fn pd12(&mut self) -> PD12_W { PD12_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - #[must_use] pub fn pd13(&mut self) -> PD13_W { PD13_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - #[must_use] pub fn pd14(&mut self) -> PD14_W { PD14_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - #[must_use] pub fn pd15(&mut self) -> PD15_W { PD15_W::new(self, 28) } diff --git a/src/port8/pps.rs b/src/port8/pps.rs index 9b3d3550..04309840 100644 --- a/src/port8/pps.rs +++ b/src/port8/pps.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - #[must_use] pub fn pps0(&mut self) -> PPS0_W { PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - #[must_use] pub fn pps1(&mut self) -> PPS1_W { PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - #[must_use] pub fn pps2(&mut self) -> PPS2_W { PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - #[must_use] pub fn pps3(&mut self) -> PPS3_W { PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - #[must_use] pub fn pps4(&mut self) -> PPS4_W { PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - #[must_use] pub fn pps5(&mut self) -> PPS5_W { PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - #[must_use] pub fn pps6(&mut self) -> PPS6_W { PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - #[must_use] pub fn pps7(&mut self) -> PPS7_W { PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - #[must_use] pub fn pps8(&mut self) -> PPS8_W { PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - #[must_use] pub fn pps9(&mut self) -> PPS9_W { PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - #[must_use] pub fn pps10(&mut self) -> PPS10_W { PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - #[must_use] pub fn pps11(&mut self) -> PPS11_W { PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - #[must_use] pub fn pps12(&mut self) -> PPS12_W { PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - #[must_use] pub fn pps13(&mut self) -> PPS13_W { PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - #[must_use] pub fn pps14(&mut self) -> PPS14_W { PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - #[must_use] pub fn pps15(&mut self) -> PPS15_W { PPS15_W::new(self, 15) } diff --git a/src/port9/hwsel.rs b/src/port9/hwsel.rs index 9a2b53bc..b17d7bfe 100644 --- a/src/port9/hwsel.rs +++ b/src/port9/hwsel.rs @@ -1255,97 +1255,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Port n Pin Hardware Select Bit 0"] #[inline(always)] - #[must_use] pub fn hw0(&mut self) -> HW0_W { HW0_W::new(self, 0) } #[doc = "Bits 2:3 - Port n Pin Hardware Select Bit 1"] #[inline(always)] - #[must_use] pub fn hw1(&mut self) -> HW1_W { HW1_W::new(self, 2) } #[doc = "Bits 4:5 - Port n Pin Hardware Select Bit 2"] #[inline(always)] - #[must_use] pub fn hw2(&mut self) -> HW2_W { HW2_W::new(self, 4) } #[doc = "Bits 6:7 - Port n Pin Hardware Select Bit 3"] #[inline(always)] - #[must_use] pub fn hw3(&mut self) -> HW3_W { HW3_W::new(self, 6) } #[doc = "Bits 8:9 - Port n Pin Hardware Select Bit 4"] #[inline(always)] - #[must_use] pub fn hw4(&mut self) -> HW4_W { HW4_W::new(self, 8) } #[doc = "Bits 10:11 - Port n Pin Hardware Select Bit 5"] #[inline(always)] - #[must_use] pub fn hw5(&mut self) -> HW5_W { HW5_W::new(self, 10) } #[doc = "Bits 12:13 - Port n Pin Hardware Select Bit 6"] #[inline(always)] - #[must_use] pub fn hw6(&mut self) -> HW6_W { HW6_W::new(self, 12) } #[doc = "Bits 14:15 - Port n Pin Hardware Select Bit 7"] #[inline(always)] - #[must_use] pub fn hw7(&mut self) -> HW7_W { HW7_W::new(self, 14) } #[doc = "Bits 16:17 - Port n Pin Hardware Select Bit 8"] #[inline(always)] - #[must_use] pub fn hw8(&mut self) -> HW8_W { HW8_W::new(self, 16) } #[doc = "Bits 18:19 - Port n Pin Hardware Select Bit 9"] #[inline(always)] - #[must_use] pub fn hw9(&mut self) -> HW9_W { HW9_W::new(self, 18) } #[doc = "Bits 20:21 - Port n Pin Hardware Select Bit 10"] #[inline(always)] - #[must_use] pub fn hw10(&mut self) -> HW10_W { HW10_W::new(self, 20) } #[doc = "Bits 22:23 - Port n Pin Hardware Select Bit 11"] #[inline(always)] - #[must_use] pub fn hw11(&mut self) -> HW11_W { HW11_W::new(self, 22) } #[doc = "Bits 24:25 - Port n Pin Hardware Select Bit 12"] #[inline(always)] - #[must_use] pub fn hw12(&mut self) -> HW12_W { HW12_W::new(self, 24) } #[doc = "Bits 26:27 - Port n Pin Hardware Select Bit 13"] #[inline(always)] - #[must_use] pub fn hw13(&mut self) -> HW13_W { HW13_W::new(self, 26) } #[doc = "Bits 28:29 - Port n Pin Hardware Select Bit 14"] #[inline(always)] - #[must_use] pub fn hw14(&mut self) -> HW14_W { HW14_W::new(self, 28) } #[doc = "Bits 30:31 - Port n Pin Hardware Select Bit 15"] #[inline(always)] - #[must_use] pub fn hw15(&mut self) -> HW15_W { HW15_W::new(self, 30) } diff --git a/src/port9/iocr0.rs b/src/port9/iocr0.rs index fa4f5963..6ea34676 100644 --- a/src/port9/iocr0.rs +++ b/src/port9/iocr0.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc0(&mut self) -> PC0_W { PC0_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc1(&mut self) -> PC1_W { PC1_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc2(&mut self) -> PC2_W { PC2_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 0 to 3"] #[inline(always)] - #[must_use] pub fn pc3(&mut self) -> PC3_W { PC3_W::new(self, 27) } diff --git a/src/port9/iocr4.rs b/src/port9/iocr4.rs index e27d11eb..c665fa4e 100644 --- a/src/port9/iocr4.rs +++ b/src/port9/iocr4.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc4(&mut self) -> PC4_W { PC4_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc5(&mut self) -> PC5_W { PC5_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc6(&mut self) -> PC6_W { PC6_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 4 to 7"] #[inline(always)] - #[must_use] pub fn pc7(&mut self) -> PC7_W { PC7_W::new(self, 27) } diff --git a/src/port9/iocr8.rs b/src/port9/iocr8.rs index 19f8ca04..2f83f3c7 100644 --- a/src/port9/iocr8.rs +++ b/src/port9/iocr8.rs @@ -1099,25 +1099,21 @@ impl R { impl W { #[doc = "Bits 3:7 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc8(&mut self) -> PC8_W { PC8_W::new(self, 3) } #[doc = "Bits 11:15 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc9(&mut self) -> PC9_W { PC9_W::new(self, 11) } #[doc = "Bits 19:23 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc10(&mut self) -> PC10_W { PC10_W::new(self, 19) } #[doc = "Bits 27:31 - Port Control for Port n Pin 8 to 11"] #[inline(always)] - #[must_use] pub fn pc11(&mut self) -> PC11_W { PC11_W::new(self, 27) } diff --git a/src/port9/omr.rs b/src/port9/omr.rs index c8d7e406..12edd458 100644 --- a/src/port9/omr.rs +++ b/src/port9/omr.rs @@ -67,193 +67,161 @@ pub type PR15_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Port n Set Bit 0"] #[inline(always)] - #[must_use] pub fn ps0(&mut self) -> PS0_W { PS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Set Bit 1"] #[inline(always)] - #[must_use] pub fn ps1(&mut self) -> PS1_W { PS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Set Bit 2"] #[inline(always)] - #[must_use] pub fn ps2(&mut self) -> PS2_W { PS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Set Bit 3"] #[inline(always)] - #[must_use] pub fn ps3(&mut self) -> PS3_W { PS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Set Bit 4"] #[inline(always)] - #[must_use] pub fn ps4(&mut self) -> PS4_W { PS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Set Bit 5"] #[inline(always)] - #[must_use] pub fn ps5(&mut self) -> PS5_W { PS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Set Bit 6"] #[inline(always)] - #[must_use] pub fn ps6(&mut self) -> PS6_W { PS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Set Bit 7"] #[inline(always)] - #[must_use] pub fn ps7(&mut self) -> PS7_W { PS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Set Bit 8"] #[inline(always)] - #[must_use] pub fn ps8(&mut self) -> PS8_W { PS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Set Bit 9"] #[inline(always)] - #[must_use] pub fn ps9(&mut self) -> PS9_W { PS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Set Bit 10"] #[inline(always)] - #[must_use] pub fn ps10(&mut self) -> PS10_W { PS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Set Bit 11"] #[inline(always)] - #[must_use] pub fn ps11(&mut self) -> PS11_W { PS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Set Bit 12"] #[inline(always)] - #[must_use] pub fn ps12(&mut self) -> PS12_W { PS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Set Bit 13"] #[inline(always)] - #[must_use] pub fn ps13(&mut self) -> PS13_W { PS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Set Bit 14"] #[inline(always)] - #[must_use] pub fn ps14(&mut self) -> PS14_W { PS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Set Bit 15"] #[inline(always)] - #[must_use] pub fn ps15(&mut self) -> PS15_W { PS15_W::new(self, 15) } #[doc = "Bit 16 - Port n Reset Bit 0"] #[inline(always)] - #[must_use] pub fn pr0(&mut self) -> PR0_W { PR0_W::new(self, 16) } #[doc = "Bit 17 - Port n Reset Bit 1"] #[inline(always)] - #[must_use] pub fn pr1(&mut self) -> PR1_W { PR1_W::new(self, 17) } #[doc = "Bit 18 - Port n Reset Bit 2"] #[inline(always)] - #[must_use] pub fn pr2(&mut self) -> PR2_W { PR2_W::new(self, 18) } #[doc = "Bit 19 - Port n Reset Bit 3"] #[inline(always)] - #[must_use] pub fn pr3(&mut self) -> PR3_W { PR3_W::new(self, 19) } #[doc = "Bit 20 - Port n Reset Bit 4"] #[inline(always)] - #[must_use] pub fn pr4(&mut self) -> PR4_W { PR4_W::new(self, 20) } #[doc = "Bit 21 - Port n Reset Bit 5"] #[inline(always)] - #[must_use] pub fn pr5(&mut self) -> PR5_W { PR5_W::new(self, 21) } #[doc = "Bit 22 - Port n Reset Bit 6"] #[inline(always)] - #[must_use] pub fn pr6(&mut self) -> PR6_W { PR6_W::new(self, 22) } #[doc = "Bit 23 - Port n Reset Bit 7"] #[inline(always)] - #[must_use] pub fn pr7(&mut self) -> PR7_W { PR7_W::new(self, 23) } #[doc = "Bit 24 - Port n Reset Bit 8"] #[inline(always)] - #[must_use] pub fn pr8(&mut self) -> PR8_W { PR8_W::new(self, 24) } #[doc = "Bit 25 - Port n Reset Bit 9"] #[inline(always)] - #[must_use] pub fn pr9(&mut self) -> PR9_W { PR9_W::new(self, 25) } #[doc = "Bit 26 - Port n Reset Bit 10"] #[inline(always)] - #[must_use] pub fn pr10(&mut self) -> PR10_W { PR10_W::new(self, 26) } #[doc = "Bit 27 - Port n Reset Bit 11"] #[inline(always)] - #[must_use] pub fn pr11(&mut self) -> PR11_W { PR11_W::new(self, 27) } #[doc = "Bit 28 - Port n Reset Bit 12"] #[inline(always)] - #[must_use] pub fn pr12(&mut self) -> PR12_W { PR12_W::new(self, 28) } #[doc = "Bit 29 - Port n Reset Bit 13"] #[inline(always)] - #[must_use] pub fn pr13(&mut self) -> PR13_W { PR13_W::new(self, 29) } #[doc = "Bit 30 - Port n Reset Bit 14"] #[inline(always)] - #[must_use] pub fn pr14(&mut self) -> PR14_W { PR14_W::new(self, 30) } #[doc = "Bit 31 - Port n Reset Bit 15"] #[inline(always)] - #[must_use] pub fn pr15(&mut self) -> PR15_W { PR15_W::new(self, 31) } diff --git a/src/port9/out.rs b/src/port9/out.rs index 70666899..b9a73631 100644 --- a/src/port9/out.rs +++ b/src/port9/out.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Output Bit 0"] #[inline(always)] - #[must_use] pub fn p0(&mut self) -> P0_W { P0_W::new(self, 0) } #[doc = "Bit 1 - Port n Output Bit 1"] #[inline(always)] - #[must_use] pub fn p1(&mut self) -> P1_W { P1_W::new(self, 1) } #[doc = "Bit 2 - Port n Output Bit 2"] #[inline(always)] - #[must_use] pub fn p2(&mut self) -> P2_W { P2_W::new(self, 2) } #[doc = "Bit 3 - Port n Output Bit 3"] #[inline(always)] - #[must_use] pub fn p3(&mut self) -> P3_W { P3_W::new(self, 3) } #[doc = "Bit 4 - Port n Output Bit 4"] #[inline(always)] - #[must_use] pub fn p4(&mut self) -> P4_W { P4_W::new(self, 4) } #[doc = "Bit 5 - Port n Output Bit 5"] #[inline(always)] - #[must_use] pub fn p5(&mut self) -> P5_W { P5_W::new(self, 5) } #[doc = "Bit 6 - Port n Output Bit 6"] #[inline(always)] - #[must_use] pub fn p6(&mut self) -> P6_W { P6_W::new(self, 6) } #[doc = "Bit 7 - Port n Output Bit 7"] #[inline(always)] - #[must_use] pub fn p7(&mut self) -> P7_W { P7_W::new(self, 7) } #[doc = "Bit 8 - Port n Output Bit 8"] #[inline(always)] - #[must_use] pub fn p8(&mut self) -> P8_W { P8_W::new(self, 8) } #[doc = "Bit 9 - Port n Output Bit 9"] #[inline(always)] - #[must_use] pub fn p9(&mut self) -> P9_W { P9_W::new(self, 9) } #[doc = "Bit 10 - Port n Output Bit 10"] #[inline(always)] - #[must_use] pub fn p10(&mut self) -> P10_W { P10_W::new(self, 10) } #[doc = "Bit 11 - Port n Output Bit 11"] #[inline(always)] - #[must_use] pub fn p11(&mut self) -> P11_W { P11_W::new(self, 11) } #[doc = "Bit 12 - Port n Output Bit 12"] #[inline(always)] - #[must_use] pub fn p12(&mut self) -> P12_W { P12_W::new(self, 12) } #[doc = "Bit 13 - Port n Output Bit 13"] #[inline(always)] - #[must_use] pub fn p13(&mut self) -> P13_W { P13_W::new(self, 13) } #[doc = "Bit 14 - Port n Output Bit 14"] #[inline(always)] - #[must_use] pub fn p14(&mut self) -> P14_W { P14_W::new(self, 14) } #[doc = "Bit 15 - Port n Output Bit 15"] #[inline(always)] - #[must_use] pub fn p15(&mut self) -> P15_W { P15_W::new(self, 15) } diff --git a/src/port9/pdr0.rs b/src/port9/pdr0.rs index 9f033b7d..72a2a96d 100644 --- a/src/port9/pdr0.rs +++ b/src/port9/pdr0.rs @@ -995,49 +995,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.0"] #[inline(always)] - #[must_use] pub fn pd0(&mut self) -> PD0_W { PD0_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.1"] #[inline(always)] - #[must_use] pub fn pd1(&mut self) -> PD1_W { PD1_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.2"] #[inline(always)] - #[must_use] pub fn pd2(&mut self) -> PD2_W { PD2_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.3"] #[inline(always)] - #[must_use] pub fn pd3(&mut self) -> PD3_W { PD3_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.4"] #[inline(always)] - #[must_use] pub fn pd4(&mut self) -> PD4_W { PD4_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.5"] #[inline(always)] - #[must_use] pub fn pd5(&mut self) -> PD5_W { PD5_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.6"] #[inline(always)] - #[must_use] pub fn pd6(&mut self) -> PD6_W { PD6_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.7"] #[inline(always)] - #[must_use] pub fn pd7(&mut self) -> PD7_W { PD7_W::new(self, 28) } diff --git a/src/port9/pdr1.rs b/src/port9/pdr1.rs index 8161ba14..3245cc7e 100644 --- a/src/port9/pdr1.rs +++ b/src/port9/pdr1.rs @@ -917,49 +917,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Pad Driver Mode for Pn.8"] #[inline(always)] - #[must_use] pub fn pd8(&mut self) -> PD8_W { PD8_W::new(self, 0) } #[doc = "Bits 4:6 - Pad Driver Mode for Pn.9"] #[inline(always)] - #[must_use] pub fn pd9(&mut self) -> PD9_W { PD9_W::new(self, 4) } #[doc = "Bits 8:10 - Pad Driver Mode for Pn.10"] #[inline(always)] - #[must_use] pub fn pd10(&mut self) -> PD10_W { PD10_W::new(self, 8) } #[doc = "Bits 12:14 - Pad Driver Mode for Pn.11"] #[inline(always)] - #[must_use] pub fn pd11(&mut self) -> PD11_W { PD11_W::new(self, 12) } #[doc = "Bits 16:18 - Pad Driver Mode for Pn.12"] #[inline(always)] - #[must_use] pub fn pd12(&mut self) -> PD12_W { PD12_W::new(self, 16) } #[doc = "Bits 20:22 - Pad Driver Mode for Pn.13"] #[inline(always)] - #[must_use] pub fn pd13(&mut self) -> PD13_W { PD13_W::new(self, 20) } #[doc = "Bits 24:26 - Pad Driver Mode for Pn.14"] #[inline(always)] - #[must_use] pub fn pd14(&mut self) -> PD14_W { PD14_W::new(self, 24) } #[doc = "Bits 28:30 - Pad Driver Mode for Pn.15"] #[inline(always)] - #[must_use] pub fn pd15(&mut self) -> PD15_W { PD15_W::new(self, 28) } diff --git a/src/port9/pps.rs b/src/port9/pps.rs index b9f2c739..98670151 100644 --- a/src/port9/pps.rs +++ b/src/port9/pps.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Port n Pin Power Save Bit 0"] #[inline(always)] - #[must_use] pub fn pps0(&mut self) -> PPS0_W { PPS0_W::new(self, 0) } #[doc = "Bit 1 - Port n Pin Power Save Bit 1"] #[inline(always)] - #[must_use] pub fn pps1(&mut self) -> PPS1_W { PPS1_W::new(self, 1) } #[doc = "Bit 2 - Port n Pin Power Save Bit 2"] #[inline(always)] - #[must_use] pub fn pps2(&mut self) -> PPS2_W { PPS2_W::new(self, 2) } #[doc = "Bit 3 - Port n Pin Power Save Bit 3"] #[inline(always)] - #[must_use] pub fn pps3(&mut self) -> PPS3_W { PPS3_W::new(self, 3) } #[doc = "Bit 4 - Port n Pin Power Save Bit 4"] #[inline(always)] - #[must_use] pub fn pps4(&mut self) -> PPS4_W { PPS4_W::new(self, 4) } #[doc = "Bit 5 - Port n Pin Power Save Bit 5"] #[inline(always)] - #[must_use] pub fn pps5(&mut self) -> PPS5_W { PPS5_W::new(self, 5) } #[doc = "Bit 6 - Port n Pin Power Save Bit 6"] #[inline(always)] - #[must_use] pub fn pps6(&mut self) -> PPS6_W { PPS6_W::new(self, 6) } #[doc = "Bit 7 - Port n Pin Power Save Bit 7"] #[inline(always)] - #[must_use] pub fn pps7(&mut self) -> PPS7_W { PPS7_W::new(self, 7) } #[doc = "Bit 8 - Port n Pin Power Save Bit 8"] #[inline(always)] - #[must_use] pub fn pps8(&mut self) -> PPS8_W { PPS8_W::new(self, 8) } #[doc = "Bit 9 - Port n Pin Power Save Bit 9"] #[inline(always)] - #[must_use] pub fn pps9(&mut self) -> PPS9_W { PPS9_W::new(self, 9) } #[doc = "Bit 10 - Port n Pin Power Save Bit 10"] #[inline(always)] - #[must_use] pub fn pps10(&mut self) -> PPS10_W { PPS10_W::new(self, 10) } #[doc = "Bit 11 - Port n Pin Power Save Bit 11"] #[inline(always)] - #[must_use] pub fn pps11(&mut self) -> PPS11_W { PPS11_W::new(self, 11) } #[doc = "Bit 12 - Port n Pin Power Save Bit 12"] #[inline(always)] - #[must_use] pub fn pps12(&mut self) -> PPS12_W { PPS12_W::new(self, 12) } #[doc = "Bit 13 - Port n Pin Power Save Bit 13"] #[inline(always)] - #[must_use] pub fn pps13(&mut self) -> PPS13_W { PPS13_W::new(self, 13) } #[doc = "Bit 14 - Port n Pin Power Save Bit 14"] #[inline(always)] - #[must_use] pub fn pps14(&mut self) -> PPS14_W { PPS14_W::new(self, 14) } #[doc = "Bit 15 - Port n Pin Power Save Bit 15"] #[inline(always)] - #[must_use] pub fn pps15(&mut self) -> PPS15_W { PPS15_W::new(self, 15) } diff --git a/src/posif0/halps.rs b/src/posif0/halps.rs index 861e249d..b721148b 100644 --- a/src/posif0/halps.rs +++ b/src/posif0/halps.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:2 - Shadow Hall Current Pattern"] #[inline(always)] - #[must_use] pub fn hcps(&mut self) -> HCPS_W { HCPS_W::new(self, 0) } #[doc = "Bits 3:5 - Shadow Hall expected Pattern"] #[inline(always)] - #[must_use] pub fn heps(&mut self) -> HEPS_W { HEPS_W::new(self, 3) } diff --git a/src/posif0/mcmc.rs b/src/posif0/mcmc.rs index b73050d6..5b2947b0 100644 --- a/src/posif0/mcmc.rs +++ b/src/posif0/mcmc.rs @@ -7,13 +7,11 @@ pub type MPC_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Multi-Channel Pattern Update Enable Clear"] #[inline(always)] - #[must_use] pub fn mnpc(&mut self) -> MNPC_W { MNPC_W::new(self, 0) } #[doc = "Bit 1 - Multi-Channel Pattern clear"] #[inline(always)] - #[must_use] pub fn mpc(&mut self) -> MPC_W { MPC_W::new(self, 1) } diff --git a/src/posif0/mcms.rs b/src/posif0/mcms.rs index c3a7203a..4f3ef17a 100644 --- a/src/posif0/mcms.rs +++ b/src/posif0/mcms.rs @@ -9,19 +9,16 @@ pub type STMR_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Multi-Channel Pattern Update Enable Set"] #[inline(always)] - #[must_use] pub fn mnps(&mut self) -> MNPS_W { MNPS_W::new(self, 0) } #[doc = "Bit 1 - Hall Pattern Shadow Transfer Request"] #[inline(always)] - #[must_use] pub fn sthr(&mut self) -> STHR_W { STHR_W::new(self, 1) } #[doc = "Bit 2 - Multi-Channel Shadow Transfer Request"] #[inline(always)] - #[must_use] pub fn stmr(&mut self) -> STMR_W { STMR_W::new(self, 2) } diff --git a/src/posif0/mcsm.rs b/src/posif0/mcsm.rs index c9e3d79f..727e001e 100644 --- a/src/posif0/mcsm.rs +++ b/src/posif0/mcsm.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Shadow Multi-Channel Pattern"] #[inline(always)] - #[must_use] pub fn mcmps(&mut self) -> MCMPS_W { MCMPS_W::new(self, 0) } diff --git a/src/posif0/pconf.rs b/src/posif0/pconf.rs index 4c506110..39bd61ea 100644 --- a/src/posif0/pconf.rs +++ b/src/posif0/pconf.rs @@ -1260,97 +1260,81 @@ impl R { impl W { #[doc = "Bits 0:1 - Function Selector"] #[inline(always)] - #[must_use] pub fn fsel(&mut self) -> FSEL_W { FSEL_W::new(self, 0) } #[doc = "Bit 2 - Position Decoder Mode selection"] #[inline(always)] - #[must_use] pub fn qdcm(&mut self) -> QDCM_W { QDCM_W::new(self, 2) } #[doc = "Bit 4 - Idle generation enable"] #[inline(always)] - #[must_use] pub fn hidg(&mut self) -> HIDG_W { HIDG_W::new(self, 4) } #[doc = "Bit 5 - Multi-Channel Pattern SW update enable"] #[inline(always)] - #[must_use] pub fn mcue(&mut self) -> MCUE_W { MCUE_W::new(self, 5) } #[doc = "Bits 8:9 - PhaseA/Hal input 1 selector"] #[inline(always)] - #[must_use] pub fn insel0(&mut self) -> INSEL0_W { INSEL0_W::new(self, 8) } #[doc = "Bits 10:11 - PhaseB/Hall input 2 selector"] #[inline(always)] - #[must_use] pub fn insel1(&mut self) -> INSEL1_W { INSEL1_W::new(self, 10) } #[doc = "Bits 12:13 - Index/Hall input 3 selector"] #[inline(always)] - #[must_use] pub fn insel2(&mut self) -> INSEL2_W { INSEL2_W::new(self, 12) } #[doc = "Bit 16 - Delay Pin selector"] #[inline(always)] - #[must_use] pub fn dsel(&mut self) -> DSEL_W { DSEL_W::new(self, 16) } #[doc = "Bit 17 - Edge selector for the sampling trigger"] #[inline(always)] - #[must_use] pub fn spes(&mut self) -> SPES_W { SPES_W::new(self, 17) } #[doc = "Bits 18:20 - Pattern update signal select"] #[inline(always)] - #[must_use] pub fn msets(&mut self) -> MSETS_W { MSETS_W::new(self, 18) } #[doc = "Bit 21 - Multi-Channel pattern update trigger edge"] #[inline(always)] - #[must_use] pub fn mses(&mut self) -> MSES_W { MSES_W::new(self, 21) } #[doc = "Bits 22:23 - PWM synchronization signal selector"] #[inline(always)] - #[must_use] pub fn msyns(&mut self) -> MSYNS_W { MSYNS_W::new(self, 22) } #[doc = "Bits 24:25 - Wrong Hall Event selection"] #[inline(always)] - #[must_use] pub fn ewis(&mut self) -> EWIS_W { EWIS_W::new(self, 24) } #[doc = "Bit 26 - External Wrong Hall Event enable"] #[inline(always)] - #[must_use] pub fn ewie(&mut self) -> EWIE_W { EWIE_W::new(self, 26) } #[doc = "Bit 27 - External Wrong Hall Event active level"] #[inline(always)] - #[must_use] pub fn ewil(&mut self) -> EWIL_W { EWIL_W::new(self, 27) } #[doc = "Bits 28:30 - Low Pass Filters Configuration"] #[inline(always)] - #[must_use] pub fn lpc(&mut self) -> LPC_W { LPC_W::new(self, 28) } diff --git a/src/posif0/pflge.rs b/src/posif0/pflge.rs index 6320a9f1..b4570353 100644 --- a/src/posif0/pflge.rs +++ b/src/posif0/pflge.rs @@ -1051,109 +1051,91 @@ impl R { impl W { #[doc = "Bit 0 - Correct Hall Event Enable"] #[inline(always)] - #[must_use] pub fn eche(&mut self) -> ECHE_W { ECHE_W::new(self, 0) } #[doc = "Bit 1 - Wrong Hall Event Enable"] #[inline(always)] - #[must_use] pub fn ewhe(&mut self) -> EWHE_W { EWHE_W::new(self, 1) } #[doc = "Bit 2 - Hall Input Update Enable"] #[inline(always)] - #[must_use] pub fn ehie(&mut self) -> EHIE_W { EHIE_W::new(self, 2) } #[doc = "Bit 4 - Multi-Channel pattern shadow transfer enable"] #[inline(always)] - #[must_use] pub fn emst(&mut self) -> EMST_W { EMST_W::new(self, 4) } #[doc = "Bit 8 - Quadrature Index Event Enable"] #[inline(always)] - #[must_use] pub fn eindx(&mut self) -> EINDX_W { EINDX_W::new(self, 8) } #[doc = "Bit 9 - Quadrature Phase Error Enable"] #[inline(always)] - #[must_use] pub fn eerr(&mut self) -> EERR_W { EERR_W::new(self, 9) } #[doc = "Bit 10 - Quadrature CLK interrupt Enable"] #[inline(always)] - #[must_use] pub fn ecnt(&mut self) -> ECNT_W { ECNT_W::new(self, 10) } #[doc = "Bit 11 - Quadrature direction change interrupt Enable"] #[inline(always)] - #[must_use] pub fn edir(&mut self) -> EDIR_W { EDIR_W::new(self, 11) } #[doc = "Bit 12 - Quadrature Period CLK interrupt Enable"] #[inline(always)] - #[must_use] pub fn epclk(&mut self) -> EPCLK_W { EPCLK_W::new(self, 12) } #[doc = "Bit 16 - Correct Hall Event Service Request Selector"] #[inline(always)] - #[must_use] pub fn chesel(&mut self) -> CHESEL_W { CHESEL_W::new(self, 16) } #[doc = "Bit 17 - Wrong Hall Event Service Request Selector"] #[inline(always)] - #[must_use] pub fn whesel(&mut self) -> WHESEL_W { WHESEL_W::new(self, 17) } #[doc = "Bit 18 - Hall Inputs Update Event Service Request Selector"] #[inline(always)] - #[must_use] pub fn hiesel(&mut self) -> HIESEL_W { HIESEL_W::new(self, 18) } #[doc = "Bit 20 - Multi-Channel pattern Update Event Service Request Selector"] #[inline(always)] - #[must_use] pub fn mstsel(&mut self) -> MSTSEL_W { MSTSEL_W::new(self, 20) } #[doc = "Bit 24 - Quadrature Index Event Service Request Selector"] #[inline(always)] - #[must_use] pub fn indsel(&mut self) -> INDSEL_W { INDSEL_W::new(self, 24) } #[doc = "Bit 25 - Quadrature Phase Error Event Service Request Selector"] #[inline(always)] - #[must_use] pub fn errsel(&mut self) -> ERRSEL_W { ERRSEL_W::new(self, 25) } #[doc = "Bit 26 - Quadrature Clock Event Service Request Selector"] #[inline(always)] - #[must_use] pub fn cntsel(&mut self) -> CNTSEL_W { CNTSEL_W::new(self, 26) } #[doc = "Bit 27 - Quadrature Direction Update Event Service Request Selector"] #[inline(always)] - #[must_use] pub fn dirsel(&mut self) -> DIRSEL_W { DIRSEL_W::new(self, 27) } #[doc = "Bit 28 - Quadrature Period clock Event Service Request Selector"] #[inline(always)] - #[must_use] pub fn pclsel(&mut self) -> PCLSEL_W { PCLSEL_W::new(self, 28) } diff --git a/src/posif0/prunc.rs b/src/posif0/prunc.rs index 51ee404c..7b29397b 100644 --- a/src/posif0/prunc.rs +++ b/src/posif0/prunc.rs @@ -7,13 +7,11 @@ pub type CSM_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Clear Run bit"] #[inline(always)] - #[must_use] pub fn crb(&mut self) -> CRB_W { CRB_W::new(self, 0) } #[doc = "Bit 1 - Clear Current internal status"] #[inline(always)] - #[must_use] pub fn csm(&mut self) -> CSM_W { CSM_W::new(self, 1) } diff --git a/src/posif0/pruns.rs b/src/posif0/pruns.rs index 24aacec8..018c73c8 100644 --- a/src/posif0/pruns.rs +++ b/src/posif0/pruns.rs @@ -5,7 +5,6 @@ pub type SRB_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Set Run bit"] #[inline(always)] - #[must_use] pub fn srb(&mut self) -> SRB_W { SRB_W::new(self, 0) } diff --git a/src/posif0/psus.rs b/src/posif0/psus.rs index c4006e66..87661171 100644 --- a/src/posif0/psus.rs +++ b/src/posif0/psus.rs @@ -189,13 +189,11 @@ impl R { impl W { #[doc = "Bits 0:1 - Quadrature Mode Suspend Config"] #[inline(always)] - #[must_use] pub fn qsus(&mut self) -> QSUS_W { QSUS_W::new(self, 0) } #[doc = "Bits 2:3 - Multi-Channel Mode Suspend Config"] #[inline(always)] - #[must_use] pub fn msus(&mut self) -> MSUS_W { MSUS_W::new(self, 2) } diff --git a/src/posif0/qdc.rs b/src/posif0/qdc.rs index 2c3ec97c..fed310fa 100644 --- a/src/posif0/qdc.rs +++ b/src/posif0/qdc.rs @@ -300,25 +300,21 @@ impl R { impl W { #[doc = "Bit 0 - Phase A Level selector"] #[inline(always)] - #[must_use] pub fn pals(&mut self) -> PALS_W { PALS_W::new(self, 0) } #[doc = "Bit 1 - Phase B Level selector"] #[inline(always)] - #[must_use] pub fn pbls(&mut self) -> PBLS_W { PBLS_W::new(self, 1) } #[doc = "Bit 2 - Phase signals swap"] #[inline(always)] - #[must_use] pub fn phs(&mut self) -> PHS_W { PHS_W::new(self, 2) } #[doc = "Bits 4:5 - Index Marker generations control"] #[inline(always)] - #[must_use] pub fn icm(&mut self) -> ICM_W { ICM_W::new(self, 4) } diff --git a/src/posif0/rpflg.rs b/src/posif0/rpflg.rs index 9084c15e..6f96dfc7 100644 --- a/src/posif0/rpflg.rs +++ b/src/posif0/rpflg.rs @@ -21,55 +21,46 @@ pub type RPCLK_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Correct Hall Event flag clear"] #[inline(always)] - #[must_use] pub fn rche(&mut self) -> RCHE_W { RCHE_W::new(self, 0) } #[doc = "Bit 1 - Wrong Hall Event flag clear"] #[inline(always)] - #[must_use] pub fn rwhe(&mut self) -> RWHE_W { RWHE_W::new(self, 1) } #[doc = "Bit 2 - Hall Inputs Update Event flag clear"] #[inline(always)] - #[must_use] pub fn rhie(&mut self) -> RHIE_W { RHIE_W::new(self, 2) } #[doc = "Bit 4 - Multi-Channel Pattern shadow transfer flag clear"] #[inline(always)] - #[must_use] pub fn rmst(&mut self) -> RMST_W { RMST_W::new(self, 4) } #[doc = "Bit 8 - Quadrature Index flag clear"] #[inline(always)] - #[must_use] pub fn rindx(&mut self) -> RINDX_W { RINDX_W::new(self, 8) } #[doc = "Bit 9 - Quadrature Phase Error flag clear"] #[inline(always)] - #[must_use] pub fn rerr(&mut self) -> RERR_W { RERR_W::new(self, 9) } #[doc = "Bit 10 - Quadrature CLK flag clear"] #[inline(always)] - #[must_use] pub fn rcnt(&mut self) -> RCNT_W { RCNT_W::new(self, 10) } #[doc = "Bit 11 - Quadrature Direction flag clear"] #[inline(always)] - #[must_use] pub fn rdir(&mut self) -> RDIR_W { RDIR_W::new(self, 11) } #[doc = "Bit 12 - Quadrature period clock flag clear"] #[inline(always)] - #[must_use] pub fn rpclk(&mut self) -> RPCLK_W { RPCLK_W::new(self, 12) } diff --git a/src/posif0/spflg.rs b/src/posif0/spflg.rs index 5876da9f..fec09760 100644 --- a/src/posif0/spflg.rs +++ b/src/posif0/spflg.rs @@ -21,55 +21,46 @@ pub type SPCLK_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Correct Hall Event flag set"] #[inline(always)] - #[must_use] pub fn sche(&mut self) -> SCHE_W { SCHE_W::new(self, 0) } #[doc = "Bit 1 - Wrong Hall Event flag set"] #[inline(always)] - #[must_use] pub fn swhe(&mut self) -> SWHE_W { SWHE_W::new(self, 1) } #[doc = "Bit 2 - Hall Inputs Update Event flag set"] #[inline(always)] - #[must_use] pub fn shie(&mut self) -> SHIE_W { SHIE_W::new(self, 2) } #[doc = "Bit 4 - Multi-Channel Pattern shadow transfer flag set"] #[inline(always)] - #[must_use] pub fn smst(&mut self) -> SMST_W { SMST_W::new(self, 4) } #[doc = "Bit 8 - Quadrature Index flag set"] #[inline(always)] - #[must_use] pub fn sindx(&mut self) -> SINDX_W { SINDX_W::new(self, 8) } #[doc = "Bit 9 - Quadrature Phase Error flag set"] #[inline(always)] - #[must_use] pub fn serr(&mut self) -> SERR_W { SERR_W::new(self, 9) } #[doc = "Bit 10 - Quadrature CLK flag set"] #[inline(always)] - #[must_use] pub fn scnt(&mut self) -> SCNT_W { SCNT_W::new(self, 10) } #[doc = "Bit 11 - Quadrature Direction flag set"] #[inline(always)] - #[must_use] pub fn sdir(&mut self) -> SDIR_W { SDIR_W::new(self, 11) } #[doc = "Bit 12 - Quadrature period clock flag set"] #[inline(always)] - #[must_use] pub fn spclk(&mut self) -> SPCLK_W { SPCLK_W::new(self, 12) } diff --git a/src/ppb/actlr.rs b/src/ppb/actlr.rs index 8cd01a89..0ddcbc5b 100644 --- a/src/ppb/actlr.rs +++ b/src/ppb/actlr.rs @@ -52,31 +52,26 @@ impl R { impl W { #[doc = "Bit 0 - Disable load/store multiple"] #[inline(always)] - #[must_use] pub fn dismcycint(&mut self) -> DISMCYCINT_W { DISMCYCINT_W::new(self, 0) } #[doc = "Bit 1 - Disable write buffer"] #[inline(always)] - #[must_use] pub fn disdefwbuf(&mut self) -> DISDEFWBUF_W { DISDEFWBUF_W::new(self, 1) } #[doc = "Bit 2 - Disable IT folding"] #[inline(always)] - #[must_use] pub fn disfold(&mut self) -> DISFOLD_W { DISFOLD_W::new(self, 2) } #[doc = "Bit 8 - Disable FPCA update"] #[inline(always)] - #[must_use] pub fn disfpca(&mut self) -> DISFPCA_W { DISFPCA_W::new(self, 8) } #[doc = "Bit 9 - Disable out of order FP execution"] #[inline(always)] - #[must_use] pub fn disoofp(&mut self) -> DISOOFP_W { DISOOFP_W::new(self, 9) } diff --git a/src/ppb/afsr.rs b/src/ppb/afsr.rs index dda9d3ec..7b3269c5 100644 --- a/src/ppb/afsr.rs +++ b/src/ppb/afsr.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Reserved"] #[inline(always)] - #[must_use] pub fn value(&mut self) -> VALUE_W { VALUE_W::new(self, 0) } diff --git a/src/ppb/aircr.rs b/src/ppb/aircr.rs index b1f64a8b..eb89e4c4 100644 --- a/src/ppb/aircr.rs +++ b/src/ppb/aircr.rs @@ -101,31 +101,26 @@ impl R { impl W { #[doc = "Bit 0 - Reserved for Debug use."] #[inline(always)] - #[must_use] pub fn vectreset(&mut self) -> VECTRESET_W { VECTRESET_W::new(self, 0) } #[doc = "Bit 1 - Reserved for Debug use."] #[inline(always)] - #[must_use] pub fn vectclractive(&mut self) -> VECTCLRACTIVE_W { VECTCLRACTIVE_W::new(self, 1) } #[doc = "Bit 2 - System reset request"] #[inline(always)] - #[must_use] pub fn sysresetreq(&mut self) -> SYSRESETREQ_W { SYSRESETREQ_W::new(self, 2) } #[doc = "Bits 8:10 - Interrupt priority grouping field"] #[inline(always)] - #[must_use] pub fn prigroup(&mut self) -> PRIGROUP_W { PRIGROUP_W::new(self, 8) } #[doc = "Bits 16:31 - Register key"] #[inline(always)] - #[must_use] pub fn vectkey(&mut self) -> VECTKEY_W { VECTKEY_W::new(self, 16) } diff --git a/src/ppb/bfar.rs b/src/ppb/bfar.rs index 0c079de8..4c132d3f 100644 --- a/src/ppb/bfar.rs +++ b/src/ppb/bfar.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Address causing the fault"] #[inline(always)] - #[must_use] pub fn address(&mut self) -> ADDRESS_W { ADDRESS_W::new(self, 0) } diff --git a/src/ppb/ccr.rs b/src/ppb/ccr.rs index 3126f8f9..37d158ab 100644 --- a/src/ppb/ccr.rs +++ b/src/ppb/ccr.rs @@ -358,37 +358,31 @@ impl R { impl W { #[doc = "Bit 0 - Non Base Thread Mode Enable"] #[inline(always)] - #[must_use] pub fn nonbasethrdena(&mut self) -> NONBASETHRDENA_W { NONBASETHRDENA_W::new(self, 0) } #[doc = "Bit 1 - User Set Pending Enable"] #[inline(always)] - #[must_use] pub fn usersetmpend(&mut self) -> USERSETMPEND_W { USERSETMPEND_W::new(self, 1) } #[doc = "Bit 3 - Unaligned Access Trap Enable"] #[inline(always)] - #[must_use] pub fn unalign_trp(&mut self) -> UNALIGN_TRP_W { UNALIGN_TRP_W::new(self, 3) } #[doc = "Bit 4 - Divide by Zero Trap Enable"] #[inline(always)] - #[must_use] pub fn div_0_trp(&mut self) -> DIV_0_TRP_W { DIV_0_TRP_W::new(self, 4) } #[doc = "Bit 8 - Bus Fault Hard Fault and NMI Ignore"] #[inline(always)] - #[must_use] pub fn bfhfnmign(&mut self) -> BFHFNMIGN_W { BFHFNMIGN_W::new(self, 8) } #[doc = "Bit 9 - Stack Alignment"] #[inline(always)] - #[must_use] pub fn stkalign(&mut self) -> STKALIGN_W { STKALIGN_W::new(self, 9) } diff --git a/src/ppb/cfsr.rs b/src/ppb/cfsr.rs index 9a169710..96b9d5d2 100644 --- a/src/ppb/cfsr.rs +++ b/src/ppb/cfsr.rs @@ -1109,115 +1109,96 @@ impl R { impl W { #[doc = "Bit 0 - Instruction access violation flag"] #[inline(always)] - #[must_use] pub fn iaccviol(&mut self) -> IACCVIOL_W { IACCVIOL_W::new(self, 0) } #[doc = "Bit 1 - Data access violation flag"] #[inline(always)] - #[must_use] pub fn daccviol(&mut self) -> DACCVIOL_W { DACCVIOL_W::new(self, 1) } #[doc = "Bit 3 - MemManage fault on unstacking for a return from exception"] #[inline(always)] - #[must_use] pub fn munstkerr(&mut self) -> MUNSTKERR_W { MUNSTKERR_W::new(self, 3) } #[doc = "Bit 4 - MemManage fault on stacking for exception entry"] #[inline(always)] - #[must_use] pub fn mstkerr(&mut self) -> MSTKERR_W { MSTKERR_W::new(self, 4) } #[doc = "Bit 5 - MemManage fault during floating point lazy state preservation"] #[inline(always)] - #[must_use] pub fn mlsperr(&mut self) -> MLSPERR_W { MLSPERR_W::new(self, 5) } #[doc = "Bit 7 - MemManage Fault Address Register (MMFAR) valid flag"] #[inline(always)] - #[must_use] pub fn mmarvalid(&mut self) -> MMARVALID_W { MMARVALID_W::new(self, 7) } #[doc = "Bit 8 - Instruction bus error"] #[inline(always)] - #[must_use] pub fn ibuserr(&mut self) -> IBUSERR_W { IBUSERR_W::new(self, 8) } #[doc = "Bit 9 - Precise data bus error"] #[inline(always)] - #[must_use] pub fn preciserr(&mut self) -> PRECISERR_W { PRECISERR_W::new(self, 9) } #[doc = "Bit 10 - Imprecise data bus error"] #[inline(always)] - #[must_use] pub fn impreciserr(&mut self) -> IMPRECISERR_W { IMPRECISERR_W::new(self, 10) } #[doc = "Bit 11 - BusFault on unstacking for a return from exception"] #[inline(always)] - #[must_use] pub fn unstkerr(&mut self) -> UNSTKERR_W { UNSTKERR_W::new(self, 11) } #[doc = "Bit 12 - BusFault on stacking for exception entry"] #[inline(always)] - #[must_use] pub fn stkerr(&mut self) -> STKERR_W { STKERR_W::new(self, 12) } #[doc = "Bit 13 - BusFault during floating point lazy state preservation"] #[inline(always)] - #[must_use] pub fn lsperr(&mut self) -> LSPERR_W { LSPERR_W::new(self, 13) } #[doc = "Bit 15 - BusFault Address Register (BFAR) valid flag"] #[inline(always)] - #[must_use] pub fn bfarvalid(&mut self) -> BFARVALID_W { BFARVALID_W::new(self, 15) } #[doc = "Bit 16 - Undefined instruction UsageFault"] #[inline(always)] - #[must_use] pub fn undefinstr(&mut self) -> UNDEFINSTR_W { UNDEFINSTR_W::new(self, 16) } #[doc = "Bit 17 - Invalid state UsageFault"] #[inline(always)] - #[must_use] pub fn invstate(&mut self) -> INVSTATE_W { INVSTATE_W::new(self, 17) } #[doc = "Bit 18 - Invalid PC load UsageFault"] #[inline(always)] - #[must_use] pub fn invpc(&mut self) -> INVPC_W { INVPC_W::new(self, 18) } #[doc = "Bit 19 - No coprocessor UsageFault"] #[inline(always)] - #[must_use] pub fn nocp(&mut self) -> NOCP_W { NOCP_W::new(self, 19) } #[doc = "Bit 24 - Unaligned access UsageFault"] #[inline(always)] - #[must_use] pub fn unaligned(&mut self) -> UNALIGNED_W { UNALIGNED_W::new(self, 24) } #[doc = "Bit 25 - Divide by zero UsageFault"] #[inline(always)] - #[must_use] pub fn divbyzero(&mut self) -> DIVBYZERO_W { DIVBYZERO_W::new(self, 25) } diff --git a/src/ppb/cpacr.rs b/src/ppb/cpacr.rs index 1d369904..205b141f 100644 --- a/src/ppb/cpacr.rs +++ b/src/ppb/cpacr.rs @@ -163,13 +163,11 @@ impl R { impl W { #[doc = "Bits 20:21 - Access privileges for coprocessor 10"] #[inline(always)] - #[must_use] pub fn cp10(&mut self) -> CP10_W { CP10_W::new(self, 20) } #[doc = "Bits 22:23 - Access privileges for coprocessor 11"] #[inline(always)] - #[must_use] pub fn cp11(&mut self) -> CP11_W { CP11_W::new(self, 22) } diff --git a/src/ppb/fpcar.rs b/src/ppb/fpcar.rs index 9f271893..5a2febb8 100644 --- a/src/ppb/fpcar.rs +++ b/src/ppb/fpcar.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 3:31 - Address"] #[inline(always)] - #[must_use] pub fn address(&mut self) -> ADDRESS_W { ADDRESS_W::new(self, 3) } diff --git a/src/ppb/fpccr.rs b/src/ppb/fpccr.rs index de4e6c59..4f36e1bd 100644 --- a/src/ppb/fpccr.rs +++ b/src/ppb/fpccr.rs @@ -529,55 +529,46 @@ impl R { impl W { #[doc = "Bit 0 - Lazy State Preservation Active"] #[inline(always)] - #[must_use] pub fn lspact(&mut self) -> LSPACT_W { LSPACT_W::new(self, 0) } #[doc = "Bit 1 - User allocated Stack Frame"] #[inline(always)] - #[must_use] pub fn user(&mut self) -> USER_W { USER_W::new(self, 1) } #[doc = "Bit 3 - Thread Mode allocated Stack Frame"] #[inline(always)] - #[must_use] pub fn thread(&mut self) -> THREAD_W { THREAD_W::new(self, 3) } #[doc = "Bit 4 - HardFault Ready"] #[inline(always)] - #[must_use] pub fn hfrdy(&mut self) -> HFRDY_W { HFRDY_W::new(self, 4) } #[doc = "Bit 5 - MemManage Ready"] #[inline(always)] - #[must_use] pub fn mmrdy(&mut self) -> MMRDY_W { MMRDY_W::new(self, 5) } #[doc = "Bit 6 - BusFault Ready"] #[inline(always)] - #[must_use] pub fn bfrdy(&mut self) -> BFRDY_W { BFRDY_W::new(self, 6) } #[doc = "Bit 8 - Monitor Ready"] #[inline(always)] - #[must_use] pub fn monrdy(&mut self) -> MONRDY_W { MONRDY_W::new(self, 8) } #[doc = "Bit 30 - Lazy State Preservation Enabled"] #[inline(always)] - #[must_use] pub fn lspen(&mut self) -> LSPEN_W { LSPEN_W::new(self, 30) } #[doc = "Bit 31 - Automatic State Preservation"] #[inline(always)] - #[must_use] pub fn aspen(&mut self) -> ASPEN_W { ASPEN_W::new(self, 31) } diff --git a/src/ppb/fpdscr.rs b/src/ppb/fpdscr.rs index 5dec8d8e..a7b49ba2 100644 --- a/src/ppb/fpdscr.rs +++ b/src/ppb/fpdscr.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 22:23 - Default value for FPSCR.RMode"] #[inline(always)] - #[must_use] pub fn rmode(&mut self) -> RMODE_W { RMODE_W::new(self, 22) } #[doc = "Bit 24 - Default value for FPSCR.FZ"] #[inline(always)] - #[must_use] pub fn fz(&mut self) -> FZ_W { FZ_W::new(self, 24) } #[doc = "Bit 25 - Default value for FPSCR.DN"] #[inline(always)] - #[must_use] pub fn dn(&mut self) -> DN_W { DN_W::new(self, 25) } #[doc = "Bit 26 - Default value for FPSCR.AHP"] #[inline(always)] - #[must_use] pub fn ahp(&mut self) -> AHP_W { AHP_W::new(self, 26) } diff --git a/src/ppb/hfsr.rs b/src/ppb/hfsr.rs index 7049ec73..53d9b3e3 100644 --- a/src/ppb/hfsr.rs +++ b/src/ppb/hfsr.rs @@ -132,19 +132,16 @@ impl R { impl W { #[doc = "Bit 1 - BusFault on vector table read"] #[inline(always)] - #[must_use] pub fn vecttbl(&mut self) -> VECTTBL_W { VECTTBL_W::new(self, 1) } #[doc = "Bit 30 - Forced HardFault"] #[inline(always)] - #[must_use] pub fn forced(&mut self) -> FORCED_W { FORCED_W::new(self, 30) } #[doc = "Bit 31 - Reserved for Debug use"] #[inline(always)] - #[must_use] pub fn debugevt(&mut self) -> DEBUGEVT_W { DEBUGEVT_W::new(self, 31) } diff --git a/src/ppb/icsr.rs b/src/ppb/icsr.rs index ea73ce6e..c4b0f9b4 100644 --- a/src/ppb/icsr.rs +++ b/src/ppb/icsr.rs @@ -305,31 +305,26 @@ impl R { impl W { #[doc = "Bit 25 - SysTick exception clear-pending bit"] #[inline(always)] - #[must_use] pub fn pendstclr(&mut self) -> PENDSTCLR_W { PENDSTCLR_W::new(self, 25) } #[doc = "Bit 26 - SysTick exception set-pending bit"] #[inline(always)] - #[must_use] pub fn pendstset(&mut self) -> PENDSTSET_W { PENDSTSET_W::new(self, 26) } #[doc = "Bit 27 - PendSV clear-pending bit"] #[inline(always)] - #[must_use] pub fn pendsvclr(&mut self) -> PENDSVCLR_W { PENDSVCLR_W::new(self, 27) } #[doc = "Bit 28 - PendSV set-pending bit: 0b0=no effect, 0b1=changes PendSV exception state to pending., 0b0=PendSV exception is not pending, 0b1=PendSV exception is pending.,"] #[inline(always)] - #[must_use] pub fn pendsvset(&mut self) -> PENDSVSET_W { PENDSVSET_W::new(self, 28) } #[doc = "Bit 31 - NMI set-pending bit: 0b0=no effect, 0b1=changes NMI exception state to pending., 0b0=NMI exception is not pending, 0b1=NMI exception is pending.,"] #[inline(always)] - #[must_use] pub fn nmipendset(&mut self) -> NMIPENDSET_W { NMIPENDSET_W::new(self, 31) } diff --git a/src/ppb/mmfar.rs b/src/ppb/mmfar.rs index 50f6a26d..9c27ee68 100644 --- a/src/ppb/mmfar.rs +++ b/src/ppb/mmfar.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Address causing the fault"] #[inline(always)] - #[must_use] pub fn address(&mut self) -> ADDRESS_W { ADDRESS_W::new(self, 0) } diff --git a/src/ppb/mpu_ctrl.rs b/src/ppb/mpu_ctrl.rs index c92fbd1f..1fd22ec1 100644 --- a/src/ppb/mpu_ctrl.rs +++ b/src/ppb/mpu_ctrl.rs @@ -181,19 +181,16 @@ impl R { impl W { #[doc = "Bit 0 - Enable MPU"] #[inline(always)] - #[must_use] pub fn enable(&mut self) -> ENABLE_W { ENABLE_W::new(self, 0) } #[doc = "Bit 1 - Enable the operation of MPU during hard fault, NMI, and FAULTMASK handlers"] #[inline(always)] - #[must_use] pub fn hfnmiena(&mut self) -> HFNMIENA_W { HFNMIENA_W::new(self, 1) } #[doc = "Bit 2 - Enables privileged software access to the default memory map"] #[inline(always)] - #[must_use] pub fn privdefena(&mut self) -> PRIVDEFENA_W { PRIVDEFENA_W::new(self, 2) } diff --git a/src/ppb/mpu_rasr.rs b/src/ppb/mpu_rasr.rs index cb73ff71..4aadc74f 100644 --- a/src/ppb/mpu_rasr.rs +++ b/src/ppb/mpu_rasr.rs @@ -193,55 +193,46 @@ impl R { impl W { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] - #[must_use] pub fn enable(&mut self) -> ENABLE_W { ENABLE_W::new(self, 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] - #[must_use] pub fn size(&mut self) -> SIZE_W { SIZE_W::new(self, 1) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] - #[must_use] pub fn srd(&mut self) -> SRD_W { SRD_W::new(self, 8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] - #[must_use] pub fn b(&mut self) -> B_W { B_W::new(self, 16) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] - #[must_use] pub fn c(&mut self) -> C_W { C_W::new(self, 17) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] - #[must_use] pub fn s(&mut self) -> S_W { S_W::new(self, 18) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] - #[must_use] pub fn tex(&mut self) -> TEX_W { TEX_W::new(self, 19) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] - #[must_use] pub fn ap(&mut self) -> AP_W { AP_W::new(self, 24) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] - #[must_use] pub fn xn(&mut self) -> XN_W { XN_W::new(self, 28) } diff --git a/src/ppb/mpu_rasr_a1.rs b/src/ppb/mpu_rasr_a1.rs index b42f0d14..e259e68f 100644 --- a/src/ppb/mpu_rasr_a1.rs +++ b/src/ppb/mpu_rasr_a1.rs @@ -193,55 +193,46 @@ impl R { impl W { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] - #[must_use] pub fn enable(&mut self) -> ENABLE_W { ENABLE_W::new(self, 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] - #[must_use] pub fn size(&mut self) -> SIZE_W { SIZE_W::new(self, 1) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] - #[must_use] pub fn srd(&mut self) -> SRD_W { SRD_W::new(self, 8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] - #[must_use] pub fn b(&mut self) -> B_W { B_W::new(self, 16) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] - #[must_use] pub fn c(&mut self) -> C_W { C_W::new(self, 17) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] - #[must_use] pub fn s(&mut self) -> S_W { S_W::new(self, 18) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] - #[must_use] pub fn tex(&mut self) -> TEX_W { TEX_W::new(self, 19) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] - #[must_use] pub fn ap(&mut self) -> AP_W { AP_W::new(self, 24) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] - #[must_use] pub fn xn(&mut self) -> XN_W { XN_W::new(self, 28) } diff --git a/src/ppb/mpu_rasr_a2.rs b/src/ppb/mpu_rasr_a2.rs index 776f7e25..266f775e 100644 --- a/src/ppb/mpu_rasr_a2.rs +++ b/src/ppb/mpu_rasr_a2.rs @@ -193,55 +193,46 @@ impl R { impl W { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] - #[must_use] pub fn enable(&mut self) -> ENABLE_W { ENABLE_W::new(self, 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] - #[must_use] pub fn size(&mut self) -> SIZE_W { SIZE_W::new(self, 1) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] - #[must_use] pub fn srd(&mut self) -> SRD_W { SRD_W::new(self, 8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] - #[must_use] pub fn b(&mut self) -> B_W { B_W::new(self, 16) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] - #[must_use] pub fn c(&mut self) -> C_W { C_W::new(self, 17) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] - #[must_use] pub fn s(&mut self) -> S_W { S_W::new(self, 18) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] - #[must_use] pub fn tex(&mut self) -> TEX_W { TEX_W::new(self, 19) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] - #[must_use] pub fn ap(&mut self) -> AP_W { AP_W::new(self, 24) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] - #[must_use] pub fn xn(&mut self) -> XN_W { XN_W::new(self, 28) } diff --git a/src/ppb/mpu_rasr_a3.rs b/src/ppb/mpu_rasr_a3.rs index 18a2f8bc..19346136 100644 --- a/src/ppb/mpu_rasr_a3.rs +++ b/src/ppb/mpu_rasr_a3.rs @@ -193,55 +193,46 @@ impl R { impl W { #[doc = "Bit 0 - Region enable bit."] #[inline(always)] - #[must_use] pub fn enable(&mut self) -> ENABLE_W { ENABLE_W::new(self, 0) } #[doc = "Bits 1:5 - MPU protection region size"] #[inline(always)] - #[must_use] pub fn size(&mut self) -> SIZE_W { SIZE_W::new(self, 1) } #[doc = "Bits 8:15 - Subregion disable bits"] #[inline(always)] - #[must_use] pub fn srd(&mut self) -> SRD_W { SRD_W::new(self, 8) } #[doc = "Bit 16 - Memory access attribute"] #[inline(always)] - #[must_use] pub fn b(&mut self) -> B_W { B_W::new(self, 16) } #[doc = "Bit 17 - Memory access attribute"] #[inline(always)] - #[must_use] pub fn c(&mut self) -> C_W { C_W::new(self, 17) } #[doc = "Bit 18 - Shareable bit"] #[inline(always)] - #[must_use] pub fn s(&mut self) -> S_W { S_W::new(self, 18) } #[doc = "Bits 19:21 - Memory access attribute"] #[inline(always)] - #[must_use] pub fn tex(&mut self) -> TEX_W { TEX_W::new(self, 19) } #[doc = "Bits 24:26 - Access permission field"] #[inline(always)] - #[must_use] pub fn ap(&mut self) -> AP_W { AP_W::new(self, 24) } #[doc = "Bit 28 - Instruction access disable bit"] #[inline(always)] - #[must_use] pub fn xn(&mut self) -> XN_W { XN_W::new(self, 28) } diff --git a/src/ppb/mpu_rbar.rs b/src/ppb/mpu_rbar.rs index 12a75396..706754ff 100644 --- a/src/ppb/mpu_rbar.rs +++ b/src/ppb/mpu_rbar.rs @@ -83,19 +83,16 @@ impl R { impl W { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] - #[must_use] pub fn region(&mut self) -> REGION_W { REGION_W::new(self, 0) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] - #[must_use] pub fn valid(&mut self) -> VALID_W { VALID_W::new(self, 4) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] - #[must_use] pub fn addr(&mut self) -> ADDR_W { ADDR_W::new(self, 9) } diff --git a/src/ppb/mpu_rbar_a1.rs b/src/ppb/mpu_rbar_a1.rs index a37996a3..262a6b2e 100644 --- a/src/ppb/mpu_rbar_a1.rs +++ b/src/ppb/mpu_rbar_a1.rs @@ -83,19 +83,16 @@ impl R { impl W { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] - #[must_use] pub fn region(&mut self) -> REGION_W { REGION_W::new(self, 0) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] - #[must_use] pub fn valid(&mut self) -> VALID_W { VALID_W::new(self, 4) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] - #[must_use] pub fn addr(&mut self) -> ADDR_W { ADDR_W::new(self, 9) } diff --git a/src/ppb/mpu_rbar_a2.rs b/src/ppb/mpu_rbar_a2.rs index 6d2998b4..74b01e9a 100644 --- a/src/ppb/mpu_rbar_a2.rs +++ b/src/ppb/mpu_rbar_a2.rs @@ -83,19 +83,16 @@ impl R { impl W { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] - #[must_use] pub fn region(&mut self) -> REGION_W { REGION_W::new(self, 0) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] - #[must_use] pub fn valid(&mut self) -> VALID_W { VALID_W::new(self, 4) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] - #[must_use] pub fn addr(&mut self) -> ADDR_W { ADDR_W::new(self, 9) } diff --git a/src/ppb/mpu_rbar_a3.rs b/src/ppb/mpu_rbar_a3.rs index 77c2573a..4c36bc8f 100644 --- a/src/ppb/mpu_rbar_a3.rs +++ b/src/ppb/mpu_rbar_a3.rs @@ -83,19 +83,16 @@ impl R { impl W { #[doc = "Bits 0:3 - MPU region field"] #[inline(always)] - #[must_use] pub fn region(&mut self) -> REGION_W { REGION_W::new(self, 0) } #[doc = "Bit 4 - MPU Region Number valid bit"] #[inline(always)] - #[must_use] pub fn valid(&mut self) -> VALID_W { VALID_W::new(self, 4) } #[doc = "Bits 9:31 - Region base address field"] #[inline(always)] - #[must_use] pub fn addr(&mut self) -> ADDR_W { ADDR_W::new(self, 9) } diff --git a/src/ppb/mpu_rnr.rs b/src/ppb/mpu_rnr.rs index 87423c66..e848ef85 100644 --- a/src/ppb/mpu_rnr.rs +++ b/src/ppb/mpu_rnr.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:7 - Region"] #[inline(always)] - #[must_use] pub fn region(&mut self) -> REGION_W { REGION_W::new(self, 0) } diff --git a/src/ppb/nvic_iabr0.rs b/src/ppb/nvic_iabr0.rs index 1d1352c3..e289baab 100644 --- a/src/ppb/nvic_iabr0.rs +++ b/src/ppb/nvic_iabr0.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] - #[must_use] pub fn active(&mut self) -> ACTIVE_W { ACTIVE_W::new(self, 0) } diff --git a/src/ppb/nvic_iabr1.rs b/src/ppb/nvic_iabr1.rs index 14f6e78c..b29a40cf 100644 --- a/src/ppb/nvic_iabr1.rs +++ b/src/ppb/nvic_iabr1.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] - #[must_use] pub fn active(&mut self) -> ACTIVE_W { ACTIVE_W::new(self, 0) } diff --git a/src/ppb/nvic_iabr2.rs b/src/ppb/nvic_iabr2.rs index b4bfadce..613e15e7 100644 --- a/src/ppb/nvic_iabr2.rs +++ b/src/ppb/nvic_iabr2.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] - #[must_use] pub fn active(&mut self) -> ACTIVE_W { ACTIVE_W::new(self, 0) } diff --git a/src/ppb/nvic_iabr3.rs b/src/ppb/nvic_iabr3.rs index c686cad0..23436a4f 100644 --- a/src/ppb/nvic_iabr3.rs +++ b/src/ppb/nvic_iabr3.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt active flags:"] #[inline(always)] - #[must_use] pub fn active(&mut self) -> ACTIVE_W { ACTIVE_W::new(self, 0) } diff --git a/src/ppb/nvic_icer0.rs b/src/ppb/nvic_icer0.rs index c647323e..27ac0099 100644 --- a/src/ppb/nvic_icer0.rs +++ b/src/ppb/nvic_icer0.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] - #[must_use] pub fn clrena(&mut self) -> CLRENA_W { CLRENA_W::new(self, 0) } diff --git a/src/ppb/nvic_icer1.rs b/src/ppb/nvic_icer1.rs index 4638b613..ebe660f6 100644 --- a/src/ppb/nvic_icer1.rs +++ b/src/ppb/nvic_icer1.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] - #[must_use] pub fn clrena(&mut self) -> CLRENA_W { CLRENA_W::new(self, 0) } diff --git a/src/ppb/nvic_icer2.rs b/src/ppb/nvic_icer2.rs index a9dfe960..55ba6f42 100644 --- a/src/ppb/nvic_icer2.rs +++ b/src/ppb/nvic_icer2.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] - #[must_use] pub fn clrena(&mut self) -> CLRENA_W { CLRENA_W::new(self, 0) } diff --git a/src/ppb/nvic_icer3.rs b/src/ppb/nvic_icer3.rs index 83ce0792..c6cb8156 100644 --- a/src/ppb/nvic_icer3.rs +++ b/src/ppb/nvic_icer3.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt clear-enable bits."] #[inline(always)] - #[must_use] pub fn clrena(&mut self) -> CLRENA_W { CLRENA_W::new(self, 0) } diff --git a/src/ppb/nvic_icpr0.rs b/src/ppb/nvic_icpr0.rs index 4e3c2d6e..9f56b409 100644 --- a/src/ppb/nvic_icpr0.rs +++ b/src/ppb/nvic_icpr0.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - #[must_use] pub fn clrpend(&mut self) -> CLRPEND_W { CLRPEND_W::new(self, 0) } diff --git a/src/ppb/nvic_icpr1.rs b/src/ppb/nvic_icpr1.rs index 4e8f961e..11418a05 100644 --- a/src/ppb/nvic_icpr1.rs +++ b/src/ppb/nvic_icpr1.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - #[must_use] pub fn clrpend(&mut self) -> CLRPEND_W { CLRPEND_W::new(self, 0) } diff --git a/src/ppb/nvic_icpr2.rs b/src/ppb/nvic_icpr2.rs index a6f060ee..282ec3ce 100644 --- a/src/ppb/nvic_icpr2.rs +++ b/src/ppb/nvic_icpr2.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - #[must_use] pub fn clrpend(&mut self) -> CLRPEND_W { CLRPEND_W::new(self, 0) } diff --git a/src/ppb/nvic_icpr3.rs b/src/ppb/nvic_icpr3.rs index 4dfa476e..a248a0da 100644 --- a/src/ppb/nvic_icpr3.rs +++ b/src/ppb/nvic_icpr3.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - #[must_use] pub fn clrpend(&mut self) -> CLRPEND_W { CLRPEND_W::new(self, 0) } diff --git a/src/ppb/nvic_ipr0.rs b/src/ppb/nvic_ipr0.rs index 1a94f2a7..bee5cf5d 100644 --- a/src/ppb/nvic_ipr0.rs +++ b/src/ppb/nvic_ipr0.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr1.rs b/src/ppb/nvic_ipr1.rs index a723d30f..9351927e 100644 --- a/src/ppb/nvic_ipr1.rs +++ b/src/ppb/nvic_ipr1.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr10.rs b/src/ppb/nvic_ipr10.rs index 7597ac61..dbe15972 100644 --- a/src/ppb/nvic_ipr10.rs +++ b/src/ppb/nvic_ipr10.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr11.rs b/src/ppb/nvic_ipr11.rs index a4e75c2d..4b4a6d4e 100644 --- a/src/ppb/nvic_ipr11.rs +++ b/src/ppb/nvic_ipr11.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr12.rs b/src/ppb/nvic_ipr12.rs index 43315fc1..74785bf3 100644 --- a/src/ppb/nvic_ipr12.rs +++ b/src/ppb/nvic_ipr12.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr13.rs b/src/ppb/nvic_ipr13.rs index bb86b859..bb5151b9 100644 --- a/src/ppb/nvic_ipr13.rs +++ b/src/ppb/nvic_ipr13.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr14.rs b/src/ppb/nvic_ipr14.rs index 51e3137b..a1164a9c 100644 --- a/src/ppb/nvic_ipr14.rs +++ b/src/ppb/nvic_ipr14.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr15.rs b/src/ppb/nvic_ipr15.rs index 1b10e27a..fcdd42e7 100644 --- a/src/ppb/nvic_ipr15.rs +++ b/src/ppb/nvic_ipr15.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr16.rs b/src/ppb/nvic_ipr16.rs index c8247e2c..8ef41c61 100644 --- a/src/ppb/nvic_ipr16.rs +++ b/src/ppb/nvic_ipr16.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr17.rs b/src/ppb/nvic_ipr17.rs index 84ada4a3..4b789cb6 100644 --- a/src/ppb/nvic_ipr17.rs +++ b/src/ppb/nvic_ipr17.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr18.rs b/src/ppb/nvic_ipr18.rs index 58b2a3c8..18ab9618 100644 --- a/src/ppb/nvic_ipr18.rs +++ b/src/ppb/nvic_ipr18.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr19.rs b/src/ppb/nvic_ipr19.rs index 8a2045af..00c0148c 100644 --- a/src/ppb/nvic_ipr19.rs +++ b/src/ppb/nvic_ipr19.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr2.rs b/src/ppb/nvic_ipr2.rs index 0aa004bc..4ef3d43e 100644 --- a/src/ppb/nvic_ipr2.rs +++ b/src/ppb/nvic_ipr2.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr20.rs b/src/ppb/nvic_ipr20.rs index 79278117..c3db6510 100644 --- a/src/ppb/nvic_ipr20.rs +++ b/src/ppb/nvic_ipr20.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr21.rs b/src/ppb/nvic_ipr21.rs index d1155af3..3112cc0f 100644 --- a/src/ppb/nvic_ipr21.rs +++ b/src/ppb/nvic_ipr21.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr22.rs b/src/ppb/nvic_ipr22.rs index 95d954f4..15be2a54 100644 --- a/src/ppb/nvic_ipr22.rs +++ b/src/ppb/nvic_ipr22.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr23.rs b/src/ppb/nvic_ipr23.rs index 5f88d74b..25b88c97 100644 --- a/src/ppb/nvic_ipr23.rs +++ b/src/ppb/nvic_ipr23.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr24.rs b/src/ppb/nvic_ipr24.rs index be770ff3..f2b94544 100644 --- a/src/ppb/nvic_ipr24.rs +++ b/src/ppb/nvic_ipr24.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr25.rs b/src/ppb/nvic_ipr25.rs index fdb26d7c..aee31a08 100644 --- a/src/ppb/nvic_ipr25.rs +++ b/src/ppb/nvic_ipr25.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr26.rs b/src/ppb/nvic_ipr26.rs index 7c50398b..4397e071 100644 --- a/src/ppb/nvic_ipr26.rs +++ b/src/ppb/nvic_ipr26.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr27.rs b/src/ppb/nvic_ipr27.rs index bcbc1c76..dc6fd872 100644 --- a/src/ppb/nvic_ipr27.rs +++ b/src/ppb/nvic_ipr27.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr3.rs b/src/ppb/nvic_ipr3.rs index 93fecfd2..a0f6ac28 100644 --- a/src/ppb/nvic_ipr3.rs +++ b/src/ppb/nvic_ipr3.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr4.rs b/src/ppb/nvic_ipr4.rs index 7fd1aba9..c064b6a9 100644 --- a/src/ppb/nvic_ipr4.rs +++ b/src/ppb/nvic_ipr4.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr5.rs b/src/ppb/nvic_ipr5.rs index 29a11906..114f9b4b 100644 --- a/src/ppb/nvic_ipr5.rs +++ b/src/ppb/nvic_ipr5.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr6.rs b/src/ppb/nvic_ipr6.rs index 689ce5ff..167189b8 100644 --- a/src/ppb/nvic_ipr6.rs +++ b/src/ppb/nvic_ipr6.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr7.rs b/src/ppb/nvic_ipr7.rs index 46c73359..9634d5d9 100644 --- a/src/ppb/nvic_ipr7.rs +++ b/src/ppb/nvic_ipr7.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr8.rs b/src/ppb/nvic_ipr8.rs index 49aa77b1..8ed328c4 100644 --- a/src/ppb/nvic_ipr8.rs +++ b/src/ppb/nvic_ipr8.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_ipr9.rs b/src/ppb/nvic_ipr9.rs index c843b0d2..090e8256 100644 --- a/src/ppb/nvic_ipr9.rs +++ b/src/ppb/nvic_ipr9.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority value 0"] #[inline(always)] - #[must_use] pub fn pri_0(&mut self) -> PRI_0_W { PRI_0_W::new(self, 0) } #[doc = "Bits 8:15 - Priority value 1"] #[inline(always)] - #[must_use] pub fn pri_1(&mut self) -> PRI_1_W { PRI_1_W::new(self, 8) } #[doc = "Bits 16:23 - Priority value 2"] #[inline(always)] - #[must_use] pub fn pri_2(&mut self) -> PRI_2_W { PRI_2_W::new(self, 16) } #[doc = "Bits 24:31 - Priority value 3"] #[inline(always)] - #[must_use] pub fn pri_3(&mut self) -> PRI_3_W { PRI_3_W::new(self, 24) } diff --git a/src/ppb/nvic_iser0.rs b/src/ppb/nvic_iser0.rs index 05c64f30..dbf399e7 100644 --- a/src/ppb/nvic_iser0.rs +++ b/src/ppb/nvic_iser0.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] - #[must_use] pub fn setena(&mut self) -> SETENA_W { SETENA_W::new(self, 0) } diff --git a/src/ppb/nvic_iser1.rs b/src/ppb/nvic_iser1.rs index 80fc1e5d..caf56b8b 100644 --- a/src/ppb/nvic_iser1.rs +++ b/src/ppb/nvic_iser1.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] - #[must_use] pub fn setena(&mut self) -> SETENA_W { SETENA_W::new(self, 0) } diff --git a/src/ppb/nvic_iser2.rs b/src/ppb/nvic_iser2.rs index 9bee7e59..f8944f37 100644 --- a/src/ppb/nvic_iser2.rs +++ b/src/ppb/nvic_iser2.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] - #[must_use] pub fn setena(&mut self) -> SETENA_W { SETENA_W::new(self, 0) } diff --git a/src/ppb/nvic_iser3.rs b/src/ppb/nvic_iser3.rs index b2faaa0b..cca7c357 100644 --- a/src/ppb/nvic_iser3.rs +++ b/src/ppb/nvic_iser3.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt set-enable bits"] #[inline(always)] - #[must_use] pub fn setena(&mut self) -> SETENA_W { SETENA_W::new(self, 0) } diff --git a/src/ppb/nvic_ispr0.rs b/src/ppb/nvic_ispr0.rs index db41fe52..277a51ab 100644 --- a/src/ppb/nvic_ispr0.rs +++ b/src/ppb/nvic_ispr0.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - #[must_use] pub fn setpend(&mut self) -> SETPEND_W { SETPEND_W::new(self, 0) } diff --git a/src/ppb/nvic_ispr1.rs b/src/ppb/nvic_ispr1.rs index 5276c203..f9299165 100644 --- a/src/ppb/nvic_ispr1.rs +++ b/src/ppb/nvic_ispr1.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - #[must_use] pub fn setpend(&mut self) -> SETPEND_W { SETPEND_W::new(self, 0) } diff --git a/src/ppb/nvic_ispr2.rs b/src/ppb/nvic_ispr2.rs index abf15b5d..e03cc851 100644 --- a/src/ppb/nvic_ispr2.rs +++ b/src/ppb/nvic_ispr2.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - #[must_use] pub fn setpend(&mut self) -> SETPEND_W { SETPEND_W::new(self, 0) } diff --git a/src/ppb/nvic_ispr3.rs b/src/ppb/nvic_ispr3.rs index eff33e3e..f7531083 100644 --- a/src/ppb/nvic_ispr3.rs +++ b/src/ppb/nvic_ispr3.rs @@ -72,7 +72,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Interrupt set-pending bits."] #[inline(always)] - #[must_use] pub fn setpend(&mut self) -> SETPEND_W { SETPEND_W::new(self, 0) } diff --git a/src/ppb/scr.rs b/src/ppb/scr.rs index 2e6656c6..c4d178dd 100644 --- a/src/ppb/scr.rs +++ b/src/ppb/scr.rs @@ -181,19 +181,16 @@ impl R { impl W { #[doc = "Bit 1 - Sleep on Exit"] #[inline(always)] - #[must_use] pub fn sleeponexit(&mut self) -> SLEEPONEXIT_W { SLEEPONEXIT_W::new(self, 1) } #[doc = "Bit 2 - Sleep or Deep Sleep"] #[inline(always)] - #[must_use] pub fn sleepdeep(&mut self) -> SLEEPDEEP_W { SLEEPDEEP_W::new(self, 2) } #[doc = "Bit 4 - Send Event on Pending bit:"] #[inline(always)] - #[must_use] pub fn sevonpend(&mut self) -> SEVONPEND_W { SEVONPEND_W::new(self, 4) } diff --git a/src/ppb/shcsr.rs b/src/ppb/shcsr.rs index a58d218c..5be51bd4 100644 --- a/src/ppb/shcsr.rs +++ b/src/ppb/shcsr.rs @@ -133,85 +133,71 @@ impl R { impl W { #[doc = "Bit 0 - MemManage exception active bit"] #[inline(always)] - #[must_use] pub fn memfaultact(&mut self) -> MEMFAULTACT_W { MEMFAULTACT_W::new(self, 0) } #[doc = "Bit 1 - BusFault exception active bit"] #[inline(always)] - #[must_use] pub fn busfaultact(&mut self) -> BUSFAULTACT_W { BUSFAULTACT_W::new(self, 1) } #[doc = "Bit 3 - UsageFault exception active bit"] #[inline(always)] - #[must_use] pub fn usgfaultact(&mut self) -> USGFAULTACT_W { USGFAULTACT_W::new(self, 3) } #[doc = "Bit 7 - SVCall active bit"] #[inline(always)] - #[must_use] pub fn svcallact(&mut self) -> SVCALLACT_W { SVCALLACT_W::new(self, 7) } #[doc = "Bit 8 - Debug monitor active bit"] #[inline(always)] - #[must_use] pub fn monitoract(&mut self) -> MONITORACT_W { MONITORACT_W::new(self, 8) } #[doc = "Bit 10 - PendSV exception active bit"] #[inline(always)] - #[must_use] pub fn pendsvact(&mut self) -> PENDSVACT_W { PENDSVACT_W::new(self, 10) } #[doc = "Bit 11 - SysTick exception active bit"] #[inline(always)] - #[must_use] pub fn systickact(&mut self) -> SYSTICKACT_W { SYSTICKACT_W::new(self, 11) } #[doc = "Bit 12 - UsageFault exception pending bit"] #[inline(always)] - #[must_use] pub fn usgfaultpended(&mut self) -> USGFAULTPENDED_W { USGFAULTPENDED_W::new(self, 12) } #[doc = "Bit 13 - MemManage exception pending bit"] #[inline(always)] - #[must_use] pub fn memfaultpended(&mut self) -> MEMFAULTPENDED_W { MEMFAULTPENDED_W::new(self, 13) } #[doc = "Bit 14 - BusFault exception pending bit"] #[inline(always)] - #[must_use] pub fn busfaultpended(&mut self) -> BUSFAULTPENDED_W { BUSFAULTPENDED_W::new(self, 14) } #[doc = "Bit 15 - SVCall pending bit"] #[inline(always)] - #[must_use] pub fn svcallpended(&mut self) -> SVCALLPENDED_W { SVCALLPENDED_W::new(self, 15) } #[doc = "Bit 16 - MemManage enable bit"] #[inline(always)] - #[must_use] pub fn memfaultena(&mut self) -> MEMFAULTENA_W { MEMFAULTENA_W::new(self, 16) } #[doc = "Bit 17 - BusFault enable bit"] #[inline(always)] - #[must_use] pub fn busfaultena(&mut self) -> BUSFAULTENA_W { BUSFAULTENA_W::new(self, 17) } #[doc = "Bit 18 - UsageFault enable bit"] #[inline(always)] - #[must_use] pub fn usgfaultena(&mut self) -> USGFAULTENA_W { USGFAULTENA_W::new(self, 18) } diff --git a/src/ppb/shpr1.rs b/src/ppb/shpr1.rs index 152d5d8c..e446ba97 100644 --- a/src/ppb/shpr1.rs +++ b/src/ppb/shpr1.rs @@ -34,19 +34,16 @@ impl R { impl W { #[doc = "Bits 0:7 - Priority of system handler 4, MemManage"] #[inline(always)] - #[must_use] pub fn pri_4(&mut self) -> PRI_4_W { PRI_4_W::new(self, 0) } #[doc = "Bits 8:15 - Priority of system handler 5, BusFault"] #[inline(always)] - #[must_use] pub fn pri_5(&mut self) -> PRI_5_W { PRI_5_W::new(self, 8) } #[doc = "Bits 16:23 - Priority of system handler 6, UsageFault"] #[inline(always)] - #[must_use] pub fn pri_6(&mut self) -> PRI_6_W { PRI_6_W::new(self, 16) } diff --git a/src/ppb/shpr2.rs b/src/ppb/shpr2.rs index 2e3c0058..0708f5f5 100644 --- a/src/ppb/shpr2.rs +++ b/src/ppb/shpr2.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 24:31 - Priority of system handler 11, SVCall"] #[inline(always)] - #[must_use] pub fn pri_11(&mut self) -> PRI_11_W { PRI_11_W::new(self, 24) } diff --git a/src/ppb/shpr3.rs b/src/ppb/shpr3.rs index 34baaa1c..4c6384bb 100644 --- a/src/ppb/shpr3.rs +++ b/src/ppb/shpr3.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 16:23 - Priority of system handler 14"] #[inline(always)] - #[must_use] pub fn pri_14(&mut self) -> PRI_14_W { PRI_14_W::new(self, 16) } #[doc = "Bits 24:31 - Priority of system handler 15"] #[inline(always)] - #[must_use] pub fn pri_15(&mut self) -> PRI_15_W { PRI_15_W::new(self, 24) } diff --git a/src/ppb/stir.rs b/src/ppb/stir.rs index 6d260a60..58405187 100644 --- a/src/ppb/stir.rs +++ b/src/ppb/stir.rs @@ -5,7 +5,6 @@ pub type INTID_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>; impl W { #[doc = "Bits 0:8 - Interrupt ID of the interrupt to trigger"] #[inline(always)] - #[must_use] pub fn intid(&mut self) -> INTID_W { INTID_W::new(self, 0) } diff --git a/src/ppb/syst_calib.rs b/src/ppb/syst_calib.rs index b526dc65..845ceda9 100644 --- a/src/ppb/syst_calib.rs +++ b/src/ppb/syst_calib.rs @@ -132,19 +132,16 @@ impl R { impl W { #[doc = "Bits 0:23 - Ten Milliseconds Reload Value"] #[inline(always)] - #[must_use] pub fn tenms(&mut self) -> TENMS_W { TENMS_W::new(self, 0) } #[doc = "Bit 30 - Ten Milliseconds Skewed"] #[inline(always)] - #[must_use] pub fn skew(&mut self) -> SKEW_W { SKEW_W::new(self, 30) } #[doc = "Bit 31 - No Reference Clock"] #[inline(always)] - #[must_use] pub fn noref(&mut self) -> NOREF_W { NOREF_W::new(self, 31) } diff --git a/src/ppb/syst_csr.rs b/src/ppb/syst_csr.rs index 141b5b35..ea8bd0e1 100644 --- a/src/ppb/syst_csr.rs +++ b/src/ppb/syst_csr.rs @@ -190,25 +190,21 @@ impl R { impl W { #[doc = "Bit 0 - Enable"] #[inline(always)] - #[must_use] pub fn enable(&mut self) -> ENABLE_W { ENABLE_W::new(self, 0) } #[doc = "Bit 1 - Tick Interrupt Enable"] #[inline(always)] - #[must_use] pub fn tickint(&mut self) -> TICKINT_W { TICKINT_W::new(self, 1) } #[doc = "Bit 2 - Indicates the clock source:"] #[inline(always)] - #[must_use] pub fn clksource(&mut self) -> CLKSOURCE_W { CLKSOURCE_W::new(self, 2) } #[doc = "Bit 16 - Counter Flag"] #[inline(always)] - #[must_use] pub fn countflag(&mut self) -> COUNTFLAG_W { COUNTFLAG_W::new(self, 16) } diff --git a/src/ppb/syst_cvr.rs b/src/ppb/syst_cvr.rs index ca5f621e..ffd3399d 100644 --- a/src/ppb/syst_cvr.rs +++ b/src/ppb/syst_cvr.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:23 - Current Value"] #[inline(always)] - #[must_use] pub fn current(&mut self) -> CURRENT_W { CURRENT_W::new(self, 0) } diff --git a/src/ppb/syst_rvr.rs b/src/ppb/syst_rvr.rs index 0fa79e04..ba31c373 100644 --- a/src/ppb/syst_rvr.rs +++ b/src/ppb/syst_rvr.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:23 - Reload Value"] #[inline(always)] - #[must_use] pub fn reload(&mut self) -> RELOAD_W { RELOAD_W::new(self, 0) } diff --git a/src/ppb/vtor.rs b/src/ppb/vtor.rs index 1503b4ae..87ec276a 100644 --- a/src/ppb/vtor.rs +++ b/src/ppb/vtor.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 10:31 - Vector table base offset field"] #[inline(always)] - #[must_use] pub fn tbloff(&mut self) -> TBLOFF_W { TBLOFF_W::new(self, 10) } diff --git a/src/pref/pcon.rs b/src/pref/pcon.rs index e326d0c9..c7f980e4 100644 --- a/src/pref/pcon.rs +++ b/src/pref/pcon.rs @@ -154,19 +154,16 @@ impl R { impl W { #[doc = "Bit 0 - Instruction Prefetch Buffer Bypass"] #[inline(always)] - #[must_use] pub fn ibyp(&mut self) -> IBYP_W { IBYP_W::new(self, 0) } #[doc = "Bit 1 - Instruction Prefetch Buffer Invalidate"] #[inline(always)] - #[must_use] pub fn iinv(&mut self) -> IINV_W { IINV_W::new(self, 1) } #[doc = "Bit 4 - Data Buffer Bypass"] #[inline(always)] - #[must_use] pub fn dbyp(&mut self) -> DBYP_W { DBYP_W::new(self, 4) } diff --git a/src/rtc/atim0.rs b/src/rtc/atim0.rs index 37ed4dcf..f5cbf3d7 100644 --- a/src/rtc/atim0.rs +++ b/src/rtc/atim0.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:5 - Alarm Seconds Compare Value"] #[inline(always)] - #[must_use] pub fn ase(&mut self) -> ASE_W { ASE_W::new(self, 0) } #[doc = "Bits 8:13 - Alarm Minutes Compare Value"] #[inline(always)] - #[must_use] pub fn ami(&mut self) -> AMI_W { AMI_W::new(self, 8) } #[doc = "Bits 16:20 - Alarm Hours Compare Value"] #[inline(always)] - #[must_use] pub fn aho(&mut self) -> AHO_W { AHO_W::new(self, 16) } #[doc = "Bits 24:28 - Alarm Days Compare Value"] #[inline(always)] - #[must_use] pub fn ada(&mut self) -> ADA_W { ADA_W::new(self, 24) } diff --git a/src/rtc/atim1.rs b/src/rtc/atim1.rs index 99bf56b8..68801a33 100644 --- a/src/rtc/atim1.rs +++ b/src/rtc/atim1.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 8:11 - Alarm Month Compare Value"] #[inline(always)] - #[must_use] pub fn amo(&mut self) -> AMO_W { AMO_W::new(self, 8) } #[doc = "Bits 16:31 - Alarm Year Compare Value"] #[inline(always)] - #[must_use] pub fn aye(&mut self) -> AYE_W { AYE_W::new(self, 16) } diff --git a/src/rtc/clrsr.rs b/src/rtc/clrsr.rs index 4d641e97..0fcab2c2 100644 --- a/src/rtc/clrsr.rs +++ b/src/rtc/clrsr.rs @@ -17,43 +17,36 @@ pub type RAI_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Periodic Seconds Interrupt Clear"] #[inline(always)] - #[must_use] pub fn rpse(&mut self) -> RPSE_W { RPSE_W::new(self, 0) } #[doc = "Bit 1 - Periodic Minutes Interrupt Clear"] #[inline(always)] - #[must_use] pub fn rpmi(&mut self) -> RPMI_W { RPMI_W::new(self, 1) } #[doc = "Bit 2 - Periodic Hours Interrupt Clear"] #[inline(always)] - #[must_use] pub fn rpho(&mut self) -> RPHO_W { RPHO_W::new(self, 2) } #[doc = "Bit 3 - Periodic Days Interrupt Clear"] #[inline(always)] - #[must_use] pub fn rpda(&mut self) -> RPDA_W { RPDA_W::new(self, 3) } #[doc = "Bit 5 - Periodic Months Interrupt Clear"] #[inline(always)] - #[must_use] pub fn rpmo(&mut self) -> RPMO_W { RPMO_W::new(self, 5) } #[doc = "Bit 6 - Periodic Years Interrupt Clear"] #[inline(always)] - #[must_use] pub fn rpye(&mut self) -> RPYE_W { RPYE_W::new(self, 6) } #[doc = "Bit 8 - Alarm Interrupt Clear"] #[inline(always)] - #[must_use] pub fn rai(&mut self) -> RAI_W { RAI_W::new(self, 8) } diff --git a/src/rtc/ctr.rs b/src/rtc/ctr.rs index e932c8b6..b178d603 100644 --- a/src/rtc/ctr.rs +++ b/src/rtc/ctr.rs @@ -88,55 +88,46 @@ impl R { impl W { #[doc = "Bit 0 - RTC Module Enable"] #[inline(always)] - #[must_use] pub fn enb(&mut self) -> ENB_W { ENB_W::new(self, 0) } #[doc = "Bit 2 - Timer Alarm Enable for Hibernation Wake-up"] #[inline(always)] - #[must_use] pub fn tae(&mut self) -> TAE_W { TAE_W::new(self, 2) } #[doc = "Bit 8 - Enable Seconds Comparison for Hibernation Wake-up"] #[inline(always)] - #[must_use] pub fn esec(&mut self) -> ESEC_W { ESEC_W::new(self, 8) } #[doc = "Bit 9 - Enable Minutes Comparison for Hibernation Wake-up"] #[inline(always)] - #[must_use] pub fn emic(&mut self) -> EMIC_W { EMIC_W::new(self, 9) } #[doc = "Bit 10 - Enable Hours Comparison for Hibernation Wake-up"] #[inline(always)] - #[must_use] pub fn ehoc(&mut self) -> EHOC_W { EHOC_W::new(self, 10) } #[doc = "Bit 11 - Enable Days Comparison for Hibernation Wake-up"] #[inline(always)] - #[must_use] pub fn edac(&mut self) -> EDAC_W { EDAC_W::new(self, 11) } #[doc = "Bit 13 - Enable Months Comparison for Hibernation Wake-up"] #[inline(always)] - #[must_use] pub fn emoc(&mut self) -> EMOC_W { EMOC_W::new(self, 13) } #[doc = "Bit 14 - Enable Years Comparison for Hibernation Wake-up"] #[inline(always)] - #[must_use] pub fn eyec(&mut self) -> EYEC_W { EYEC_W::new(self, 14) } #[doc = "Bits 16:31 - RTC Clock Divider Value"] #[inline(always)] - #[must_use] pub fn div(&mut self) -> DIV_W { DIV_W::new(self, 16) } diff --git a/src/rtc/msksr.rs b/src/rtc/msksr.rs index 778aaf2e..74845e42 100644 --- a/src/rtc/msksr.rs +++ b/src/rtc/msksr.rs @@ -70,43 +70,36 @@ impl R { impl W { #[doc = "Bit 0 - Periodic Seconds Interrupt Mask"] #[inline(always)] - #[must_use] pub fn mpse(&mut self) -> MPSE_W { MPSE_W::new(self, 0) } #[doc = "Bit 1 - Periodic Minutes Interrupt Mask"] #[inline(always)] - #[must_use] pub fn mpmi(&mut self) -> MPMI_W { MPMI_W::new(self, 1) } #[doc = "Bit 2 - Periodic Hours Interrupt Mask"] #[inline(always)] - #[must_use] pub fn mpho(&mut self) -> MPHO_W { MPHO_W::new(self, 2) } #[doc = "Bit 3 - Periodic Days Interrupt Mask"] #[inline(always)] - #[must_use] pub fn mpda(&mut self) -> MPDA_W { MPDA_W::new(self, 3) } #[doc = "Bit 5 - Periodic Months Interrupt Mask"] #[inline(always)] - #[must_use] pub fn mpmo(&mut self) -> MPMO_W { MPMO_W::new(self, 5) } #[doc = "Bit 6 - Periodic Years Interrupt Mask"] #[inline(always)] - #[must_use] pub fn mpye(&mut self) -> MPYE_W { MPYE_W::new(self, 6) } #[doc = "Bit 8 - Alarm Interrupt Mask"] #[inline(always)] - #[must_use] pub fn mai(&mut self) -> MAI_W { MAI_W::new(self, 8) } diff --git a/src/rtc/tim0.rs b/src/rtc/tim0.rs index e425c0e4..9b8b22bf 100644 --- a/src/rtc/tim0.rs +++ b/src/rtc/tim0.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:5 - Seconds Time Value"] #[inline(always)] - #[must_use] pub fn se(&mut self) -> SE_W { SE_W::new(self, 0) } #[doc = "Bits 8:13 - Minutes Time Value"] #[inline(always)] - #[must_use] pub fn mi(&mut self) -> MI_W { MI_W::new(self, 8) } #[doc = "Bits 16:20 - Hours Time Value"] #[inline(always)] - #[must_use] pub fn ho(&mut self) -> HO_W { HO_W::new(self, 16) } #[doc = "Bits 24:28 - Days Time Value"] #[inline(always)] - #[must_use] pub fn da(&mut self) -> DA_W { DA_W::new(self, 24) } diff --git a/src/rtc/tim1.rs b/src/rtc/tim1.rs index 7502be4c..6d5958db 100644 --- a/src/rtc/tim1.rs +++ b/src/rtc/tim1.rs @@ -34,19 +34,16 @@ impl R { impl W { #[doc = "Bits 0:2 - Days of Week Time Value"] #[inline(always)] - #[must_use] pub fn dawe(&mut self) -> DAWE_W { DAWE_W::new(self, 0) } #[doc = "Bits 8:11 - Month Time Value"] #[inline(always)] - #[must_use] pub fn mo(&mut self) -> MO_W { MO_W::new(self, 8) } #[doc = "Bits 16:31 - Year Time Value"] #[inline(always)] - #[must_use] pub fn ye(&mut self) -> YE_W { YE_W::new(self, 16) } diff --git a/src/scu_clk/ccuclkcr.rs b/src/scu_clk/ccuclkcr.rs index 7fb4097e..a76902f3 100644 --- a/src/scu_clk/ccuclkcr.rs +++ b/src/scu_clk/ccuclkcr.rs @@ -65,7 +65,6 @@ impl R { impl W { #[doc = "Bit 0 - CCU Clock Divider Enable"] #[inline(always)] - #[must_use] pub fn ccudiv(&mut self) -> CCUDIV_W { CCUDIV_W::new(self, 0) } diff --git a/src/scu_clk/cgatclr0.rs b/src/scu_clk/cgatclr0.rs index 1f76a75e..b53f67c9 100644 --- a/src/scu_clk/cgatclr0.rs +++ b/src/scu_clk/cgatclr0.rs @@ -344,67 +344,56 @@ where impl W { #[doc = "Bit 0 - VADC Gating Clear"] #[inline(always)] - #[must_use] pub fn vadc(&mut self) -> VADC_W { VADC_W::new(self, 0) } #[doc = "Bit 1 - DSD Gating Clear"] #[inline(always)] - #[must_use] pub fn dsd(&mut self) -> DSD_W { DSD_W::new(self, 1) } #[doc = "Bit 2 - CCU40 Gating Clear"] #[inline(always)] - #[must_use] pub fn ccu40(&mut self) -> CCU40_W { CCU40_W::new(self, 2) } #[doc = "Bit 3 - CCU41 Gating Clear"] #[inline(always)] - #[must_use] pub fn ccu41(&mut self) -> CCU41_W { CCU41_W::new(self, 3) } #[doc = "Bit 4 - CCU42 Gating Clear"] #[inline(always)] - #[must_use] pub fn ccu42(&mut self) -> CCU42_W { CCU42_W::new(self, 4) } #[doc = "Bit 7 - CCU80 Gating Clear"] #[inline(always)] - #[must_use] pub fn ccu80(&mut self) -> CCU80_W { CCU80_W::new(self, 7) } #[doc = "Bit 8 - CCU81 Gating Clear"] #[inline(always)] - #[must_use] pub fn ccu81(&mut self) -> CCU81_W { CCU81_W::new(self, 8) } #[doc = "Bit 9 - POSIF0 Gating Clear"] #[inline(always)] - #[must_use] pub fn posif0(&mut self) -> POSIF0_W { POSIF0_W::new(self, 9) } #[doc = "Bit 10 - POSIF1 Gating Clear"] #[inline(always)] - #[must_use] pub fn posif1(&mut self) -> POSIF1_W { POSIF1_W::new(self, 10) } #[doc = "Bit 11 - USIC0 Gating Clear"] #[inline(always)] - #[must_use] pub fn usic0(&mut self) -> USIC0_W { USIC0_W::new(self, 11) } #[doc = "Bit 16 - ERU1 Gating Clear"] #[inline(always)] - #[must_use] pub fn eru1(&mut self) -> ERU1_W { ERU1_W::new(self, 16) } diff --git a/src/scu_clk/cgatclr1.rs b/src/scu_clk/cgatclr1.rs index fd0606e7..275e23cd 100644 --- a/src/scu_clk/cgatclr1.rs +++ b/src/scu_clk/cgatclr1.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - CCU43 Gating Clear"] #[inline(always)] - #[must_use] pub fn ccu43(&mut self) -> CCU43_W { CCU43_W::new(self, 0) } #[doc = "Bit 3 - LEDTS Gating Clear"] #[inline(always)] - #[must_use] pub fn ledtscu0(&mut self) -> LEDTSCU0_W { LEDTSCU0_W::new(self, 3) } #[doc = "Bit 4 - MultiCAN Gating Clear"] #[inline(always)] - #[must_use] pub fn mcan0(&mut self) -> MCAN0_W { MCAN0_W::new(self, 4) } #[doc = "Bit 5 - DAC Gating Clear"] #[inline(always)] - #[must_use] pub fn dac(&mut self) -> DAC_W { DAC_W::new(self, 5) } #[doc = "Bit 6 - MMC Interface Gating Clear"] #[inline(always)] - #[must_use] pub fn mmci(&mut self) -> MMCI_W { MMCI_W::new(self, 6) } #[doc = "Bit 7 - USIC1 Gating Clear"] #[inline(always)] - #[must_use] pub fn usic1(&mut self) -> USIC1_W { USIC1_W::new(self, 7) } #[doc = "Bit 8 - USIC2 Gating Clear"] #[inline(always)] - #[must_use] pub fn usic2(&mut self) -> USIC2_W { USIC2_W::new(self, 8) } #[doc = "Bit 9 - PORTS Gating Clear"] #[inline(always)] - #[must_use] pub fn pports(&mut self) -> PPORTS_W { PPORTS_W::new(self, 9) } diff --git a/src/scu_clk/cgatclr2.rs b/src/scu_clk/cgatclr2.rs index 4f246196..794c60db 100644 --- a/src/scu_clk/cgatclr2.rs +++ b/src/scu_clk/cgatclr2.rs @@ -189,37 +189,31 @@ where impl W { #[doc = "Bit 1 - WDT Gating Clear"] #[inline(always)] - #[must_use] pub fn wdt(&mut self) -> WDT_W { WDT_W::new(self, 1) } #[doc = "Bit 2 - ETH0 Gating Clear"] #[inline(always)] - #[must_use] pub fn eth0(&mut self) -> ETH0_W { ETH0_W::new(self, 2) } #[doc = "Bit 4 - DMA0 Gating Clear"] #[inline(always)] - #[must_use] pub fn dma0(&mut self) -> DMA0_W { DMA0_W::new(self, 4) } #[doc = "Bit 5 - DMA1 Gating Clear"] #[inline(always)] - #[must_use] pub fn dma1(&mut self) -> DMA1_W { DMA1_W::new(self, 5) } #[doc = "Bit 6 - FCE Gating Clear"] #[inline(always)] - #[must_use] pub fn fce(&mut self) -> FCE_W { FCE_W::new(self, 6) } #[doc = "Bit 7 - USB Gating Clear"] #[inline(always)] - #[must_use] pub fn usb(&mut self) -> USB_W { USB_W::new(self, 7) } diff --git a/src/scu_clk/cgatclr3.rs b/src/scu_clk/cgatclr3.rs index 50d96d04..8ef10b1a 100644 --- a/src/scu_clk/cgatclr3.rs +++ b/src/scu_clk/cgatclr3.rs @@ -34,7 +34,6 @@ where impl W { #[doc = "Bit 2 - EBU Gating Clear"] #[inline(always)] - #[must_use] pub fn ebu(&mut self) -> EBU_W { EBU_W::new(self, 2) } diff --git a/src/scu_clk/cgatset0.rs b/src/scu_clk/cgatset0.rs index 342f153e..15c66104 100644 --- a/src/scu_clk/cgatset0.rs +++ b/src/scu_clk/cgatset0.rs @@ -344,67 +344,56 @@ where impl W { #[doc = "Bit 0 - VADC Gating Set"] #[inline(always)] - #[must_use] pub fn vadc(&mut self) -> VADC_W { VADC_W::new(self, 0) } #[doc = "Bit 1 - DSD Gating Set"] #[inline(always)] - #[must_use] pub fn dsd(&mut self) -> DSD_W { DSD_W::new(self, 1) } #[doc = "Bit 2 - CCU40 Gating Set"] #[inline(always)] - #[must_use] pub fn ccu40(&mut self) -> CCU40_W { CCU40_W::new(self, 2) } #[doc = "Bit 3 - CCU41 Gating Set"] #[inline(always)] - #[must_use] pub fn ccu41(&mut self) -> CCU41_W { CCU41_W::new(self, 3) } #[doc = "Bit 4 - CCU42 Gating Set"] #[inline(always)] - #[must_use] pub fn ccu42(&mut self) -> CCU42_W { CCU42_W::new(self, 4) } #[doc = "Bit 7 - CCU80 Gating Set"] #[inline(always)] - #[must_use] pub fn ccu80(&mut self) -> CCU80_W { CCU80_W::new(self, 7) } #[doc = "Bit 8 - CCU81 Gating Set"] #[inline(always)] - #[must_use] pub fn ccu81(&mut self) -> CCU81_W { CCU81_W::new(self, 8) } #[doc = "Bit 9 - POSIF0 Gating Set"] #[inline(always)] - #[must_use] pub fn posif0(&mut self) -> POSIF0_W { POSIF0_W::new(self, 9) } #[doc = "Bit 10 - POSIF1 Gating Set"] #[inline(always)] - #[must_use] pub fn posif1(&mut self) -> POSIF1_W { POSIF1_W::new(self, 10) } #[doc = "Bit 11 - USIC0 Gating Set"] #[inline(always)] - #[must_use] pub fn usic0(&mut self) -> USIC0_W { USIC0_W::new(self, 11) } #[doc = "Bit 16 - ERU1 Gating Set"] #[inline(always)] - #[must_use] pub fn eru1(&mut self) -> ERU1_W { ERU1_W::new(self, 16) } diff --git a/src/scu_clk/cgatset1.rs b/src/scu_clk/cgatset1.rs index e6a34e47..d188ff43 100644 --- a/src/scu_clk/cgatset1.rs +++ b/src/scu_clk/cgatset1.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - CCU43 Gating Set"] #[inline(always)] - #[must_use] pub fn ccu43(&mut self) -> CCU43_W { CCU43_W::new(self, 0) } #[doc = "Bit 3 - LEDTS Gating Set"] #[inline(always)] - #[must_use] pub fn ledtscu0(&mut self) -> LEDTSCU0_W { LEDTSCU0_W::new(self, 3) } #[doc = "Bit 4 - MultiCAN Gating Set"] #[inline(always)] - #[must_use] pub fn mcan0(&mut self) -> MCAN0_W { MCAN0_W::new(self, 4) } #[doc = "Bit 5 - DAC Gating Set"] #[inline(always)] - #[must_use] pub fn dac(&mut self) -> DAC_W { DAC_W::new(self, 5) } #[doc = "Bit 6 - MMC Interface Gating Set"] #[inline(always)] - #[must_use] pub fn mmci(&mut self) -> MMCI_W { MMCI_W::new(self, 6) } #[doc = "Bit 7 - USIC1 Gating Set"] #[inline(always)] - #[must_use] pub fn usic1(&mut self) -> USIC1_W { USIC1_W::new(self, 7) } #[doc = "Bit 8 - USIC2 Gating Set"] #[inline(always)] - #[must_use] pub fn usic2(&mut self) -> USIC2_W { USIC2_W::new(self, 8) } #[doc = "Bit 9 - PORTS Gating Set"] #[inline(always)] - #[must_use] pub fn pports(&mut self) -> PPORTS_W { PPORTS_W::new(self, 9) } diff --git a/src/scu_clk/cgatset2.rs b/src/scu_clk/cgatset2.rs index fba2ddc7..100884b7 100644 --- a/src/scu_clk/cgatset2.rs +++ b/src/scu_clk/cgatset2.rs @@ -189,37 +189,31 @@ where impl W { #[doc = "Bit 1 - WDT Gating Set"] #[inline(always)] - #[must_use] pub fn wdt(&mut self) -> WDT_W { WDT_W::new(self, 1) } #[doc = "Bit 2 - ETH0 Gating Set"] #[inline(always)] - #[must_use] pub fn eth0(&mut self) -> ETH0_W { ETH0_W::new(self, 2) } #[doc = "Bit 4 - DMA0 Gating Set"] #[inline(always)] - #[must_use] pub fn dma0(&mut self) -> DMA0_W { DMA0_W::new(self, 4) } #[doc = "Bit 5 - DMA1 Gating Set"] #[inline(always)] - #[must_use] pub fn dma1(&mut self) -> DMA1_W { DMA1_W::new(self, 5) } #[doc = "Bit 6 - FCE Gating Set"] #[inline(always)] - #[must_use] pub fn fce(&mut self) -> FCE_W { FCE_W::new(self, 6) } #[doc = "Bit 7 - USB Gating Set"] #[inline(always)] - #[must_use] pub fn usb(&mut self) -> USB_W { USB_W::new(self, 7) } diff --git a/src/scu_clk/cgatset3.rs b/src/scu_clk/cgatset3.rs index 2a2c2729..43d2a980 100644 --- a/src/scu_clk/cgatset3.rs +++ b/src/scu_clk/cgatset3.rs @@ -34,7 +34,6 @@ where impl W { #[doc = "Bit 2 - EBU Gating Set"] #[inline(always)] - #[must_use] pub fn ebu(&mut self) -> EBU_W { EBU_W::new(self, 2) } diff --git a/src/scu_clk/clkclr.rs b/src/scu_clk/clkclr.rs index 22227c82..25e4f6c0 100644 --- a/src/scu_clk/clkclr.rs +++ b/src/scu_clk/clkclr.rs @@ -189,37 +189,31 @@ where impl W { #[doc = "Bit 0 - USB Clock Disable"] #[inline(always)] - #[must_use] pub fn usbcdi(&mut self) -> USBCDI_W { USBCDI_W::new(self, 0) } #[doc = "Bit 1 - MMC Clock Disable"] #[inline(always)] - #[must_use] pub fn mmccdi(&mut self) -> MMCCDI_W { MMCCDI_W::new(self, 1) } #[doc = "Bit 2 - Ethernet Clock Disable"] #[inline(always)] - #[must_use] pub fn eth0cdi(&mut self) -> ETH0CDI_W { ETH0CDI_W::new(self, 2) } #[doc = "Bit 3 - EBU Clock Disable"] #[inline(always)] - #[must_use] pub fn ebucdi(&mut self) -> EBUCDI_W { EBUCDI_W::new(self, 3) } #[doc = "Bit 4 - CCU Clock Disable"] #[inline(always)] - #[must_use] pub fn ccucdi(&mut self) -> CCUCDI_W { CCUCDI_W::new(self, 4) } #[doc = "Bit 5 - WDT Clock Disable"] #[inline(always)] - #[must_use] pub fn wdtcdi(&mut self) -> WDTCDI_W { WDTCDI_W::new(self, 5) } diff --git a/src/scu_clk/clkset.rs b/src/scu_clk/clkset.rs index 97572532..623c9b06 100644 --- a/src/scu_clk/clkset.rs +++ b/src/scu_clk/clkset.rs @@ -189,37 +189,31 @@ where impl W { #[doc = "Bit 0 - USB Clock Enable"] #[inline(always)] - #[must_use] pub fn usbcen(&mut self) -> USBCEN_W { USBCEN_W::new(self, 0) } #[doc = "Bit 1 - MMC Clock Enable"] #[inline(always)] - #[must_use] pub fn mmccen(&mut self) -> MMCCEN_W { MMCCEN_W::new(self, 1) } #[doc = "Bit 2 - Ethernet Clock Enable"] #[inline(always)] - #[must_use] pub fn eth0cen(&mut self) -> ETH0CEN_W { ETH0CEN_W::new(self, 2) } #[doc = "Bit 3 - EBU Clock Enable"] #[inline(always)] - #[must_use] pub fn ebucen(&mut self) -> EBUCEN_W { EBUCEN_W::new(self, 3) } #[doc = "Bit 4 - CCU Clock Enable"] #[inline(always)] - #[must_use] pub fn ccucen(&mut self) -> CCUCEN_W { CCUCEN_W::new(self, 4) } #[doc = "Bit 5 - WDT Clock Enable"] #[inline(always)] - #[must_use] pub fn wdtcen(&mut self) -> WDTCEN_W { WDTCEN_W::new(self, 5) } diff --git a/src/scu_clk/cpuclkcr.rs b/src/scu_clk/cpuclkcr.rs index e5888d23..e4bc0a65 100644 --- a/src/scu_clk/cpuclkcr.rs +++ b/src/scu_clk/cpuclkcr.rs @@ -65,7 +65,6 @@ impl R { impl W { #[doc = "Bit 0 - CPU Clock Divider Enable"] #[inline(always)] - #[must_use] pub fn cpudiv(&mut self) -> CPUDIV_W { CPUDIV_W::new(self, 0) } diff --git a/src/scu_clk/dsleepcr.rs b/src/scu_clk/dsleepcr.rs index b230c1e4..f2abf590 100644 --- a/src/scu_clk/dsleepcr.rs +++ b/src/scu_clk/dsleepcr.rs @@ -594,61 +594,51 @@ impl R { impl W { #[doc = "Bits 0:1 - System Clock Selection Value"] #[inline(always)] - #[must_use] pub fn syssel(&mut self) -> SYSSEL_W { SYSSEL_W::new(self, 0) } #[doc = "Bit 11 - Flash Power Down"] #[inline(always)] - #[must_use] pub fn fpdn(&mut self) -> FPDN_W { FPDN_W::new(self, 11) } #[doc = "Bit 12 - PLL Power Down"] #[inline(always)] - #[must_use] pub fn pllpdn(&mut self) -> PLLPDN_W { PLLPDN_W::new(self, 12) } #[doc = "Bit 13 - VCO Power Down"] #[inline(always)] - #[must_use] pub fn vcopdn(&mut self) -> VCOPDN_W { VCOPDN_W::new(self, 13) } #[doc = "Bit 16 - USB Clock Control"] #[inline(always)] - #[must_use] pub fn usbcr(&mut self) -> USBCR_W { USBCR_W::new(self, 16) } #[doc = "Bit 17 - MMC Clock Control"] #[inline(always)] - #[must_use] pub fn mmccr(&mut self) -> MMCCR_W { MMCCR_W::new(self, 17) } #[doc = "Bit 18 - Ethernet Clock Control"] #[inline(always)] - #[must_use] pub fn eth0cr(&mut self) -> ETH0CR_W { ETH0CR_W::new(self, 18) } #[doc = "Bit 19 - EBU Clock Control"] #[inline(always)] - #[must_use] pub fn ebucr(&mut self) -> EBUCR_W { EBUCR_W::new(self, 19) } #[doc = "Bit 20 - CCU Clock Control"] #[inline(always)] - #[must_use] pub fn ccucr(&mut self) -> CCUCR_W { CCUCR_W::new(self, 20) } #[doc = "Bit 21 - WDT Clock Control"] #[inline(always)] - #[must_use] pub fn wdtcr(&mut self) -> WDTCR_W { WDTCR_W::new(self, 21) } diff --git a/src/scu_clk/ebuclkcr.rs b/src/scu_clk/ebuclkcr.rs index 01e5ee37..3bf39562 100644 --- a/src/scu_clk/ebuclkcr.rs +++ b/src/scu_clk/ebuclkcr.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:5 - EBU Clock Divider Value"] #[inline(always)] - #[must_use] pub fn ebudiv(&mut self) -> EBUDIV_W { EBUDIV_W::new(self, 0) } diff --git a/src/scu_clk/extclkcr.rs b/src/scu_clk/extclkcr.rs index 527773f6..391653cb 100644 --- a/src/scu_clk/extclkcr.rs +++ b/src/scu_clk/extclkcr.rs @@ -94,13 +94,11 @@ impl R { impl W { #[doc = "Bits 0:1 - External Clock Selection Value"] #[inline(always)] - #[must_use] pub fn ecksel(&mut self) -> ECKSEL_W { ECKSEL_W::new(self, 0) } #[doc = "Bits 16:24 - External Clock Divider Value"] #[inline(always)] - #[must_use] pub fn eckdiv(&mut self) -> ECKDIV_W { ECKDIV_W::new(self, 16) } diff --git a/src/scu_clk/mlinkclkcr.rs b/src/scu_clk/mlinkclkcr.rs index 4272273e..cf8c9519 100644 --- a/src/scu_clk/mlinkclkcr.rs +++ b/src/scu_clk/mlinkclkcr.rs @@ -344,49 +344,41 @@ impl R { impl W { #[doc = "Bits 0:7 - System Clock Division Value"] #[inline(always)] - #[must_use] pub fn sysdiv(&mut self) -> SYSDIV_W { SYSDIV_W::new(self, 0) } #[doc = "Bit 8 - System Clock Selection Value"] #[inline(always)] - #[must_use] pub fn syssel(&mut self) -> SYSSEL_W { SYSSEL_W::new(self, 8) } #[doc = "Bit 10 - CPU Clock Divider Enable"] #[inline(always)] - #[must_use] pub fn cpudiv(&mut self) -> CPUDIV_W { CPUDIV_W::new(self, 10) } #[doc = "Bit 12 - PB Clock Divider Enable"] #[inline(always)] - #[must_use] pub fn pbdiv(&mut self) -> PBDIV_W { PBDIV_W::new(self, 12) } #[doc = "Bit 14 - CCU Clock Divider Enable"] #[inline(always)] - #[must_use] pub fn ccudiv(&mut self) -> CCUDIV_W { CCUDIV_W::new(self, 14) } #[doc = "Bits 16:23 - WDT Clock Divider Value"] #[inline(always)] - #[must_use] pub fn wdtdiv(&mut self) -> WDTDIV_W { WDTDIV_W::new(self, 16) } #[doc = "Bits 24:25 - WDT Clock Selection Value"] #[inline(always)] - #[must_use] pub fn wdtsel(&mut self) -> WDTSEL_W { WDTSEL_W::new(self, 24) } #[doc = "Bits 26:31 - EBU Clock Divider Value"] #[inline(always)] - #[must_use] pub fn ebudiv(&mut self) -> EBUDIV_W { EBUDIV_W::new(self, 26) } diff --git a/src/scu_clk/pbclkcr.rs b/src/scu_clk/pbclkcr.rs index 79eedc07..05127e30 100644 --- a/src/scu_clk/pbclkcr.rs +++ b/src/scu_clk/pbclkcr.rs @@ -65,7 +65,6 @@ impl R { impl W { #[doc = "Bit 0 - PB Clock Divider Enable"] #[inline(always)] - #[must_use] pub fn pbdiv(&mut self) -> PBDIV_W { PBDIV_W::new(self, 0) } diff --git a/src/scu_clk/sleepcr.rs b/src/scu_clk/sleepcr.rs index a7f6ff35..fa9c3b4d 100644 --- a/src/scu_clk/sleepcr.rs +++ b/src/scu_clk/sleepcr.rs @@ -413,43 +413,36 @@ impl R { impl W { #[doc = "Bit 0 - System Clock Selection Value"] #[inline(always)] - #[must_use] pub fn syssel(&mut self) -> SYSSEL_W { SYSSEL_W::new(self, 0) } #[doc = "Bit 16 - USB Clock Control"] #[inline(always)] - #[must_use] pub fn usbcr(&mut self) -> USBCR_W { USBCR_W::new(self, 16) } #[doc = "Bit 17 - MMC Clock Control"] #[inline(always)] - #[must_use] pub fn mmccr(&mut self) -> MMCCR_W { MMCCR_W::new(self, 17) } #[doc = "Bit 18 - Ethernet Clock Control"] #[inline(always)] - #[must_use] pub fn eth0cr(&mut self) -> ETH0CR_W { ETH0CR_W::new(self, 18) } #[doc = "Bit 19 - EBU Clock Control"] #[inline(always)] - #[must_use] pub fn ebucr(&mut self) -> EBUCR_W { EBUCR_W::new(self, 19) } #[doc = "Bit 20 - CCU Clock Control"] #[inline(always)] - #[must_use] pub fn ccucr(&mut self) -> CCUCR_W { CCUCR_W::new(self, 20) } #[doc = "Bit 21 - WDT Clock Control"] #[inline(always)] - #[must_use] pub fn wdtcr(&mut self) -> WDTCR_W { WDTCR_W::new(self, 21) } diff --git a/src/scu_clk/sysclkcr.rs b/src/scu_clk/sysclkcr.rs index 275668f0..e6769d91 100644 --- a/src/scu_clk/sysclkcr.rs +++ b/src/scu_clk/sysclkcr.rs @@ -74,13 +74,11 @@ impl R { impl W { #[doc = "Bits 0:7 - System Clock Division Value"] #[inline(always)] - #[must_use] pub fn sysdiv(&mut self) -> SYSDIV_W { SYSDIV_W::new(self, 0) } #[doc = "Bit 16 - System Clock Selection Value"] #[inline(always)] - #[must_use] pub fn syssel(&mut self) -> SYSSEL_W { SYSSEL_W::new(self, 16) } diff --git a/src/scu_clk/usbclkcr.rs b/src/scu_clk/usbclkcr.rs index 39cbcbdd..718de30d 100644 --- a/src/scu_clk/usbclkcr.rs +++ b/src/scu_clk/usbclkcr.rs @@ -74,13 +74,11 @@ impl R { impl W { #[doc = "Bits 0:2 - USB Clock Divider Value"] #[inline(always)] - #[must_use] pub fn usbdiv(&mut self) -> USBDIV_W { USBDIV_W::new(self, 0) } #[doc = "Bit 16 - USB Clock Selection Value"] #[inline(always)] - #[must_use] pub fn usbsel(&mut self) -> USBSEL_W { USBSEL_W::new(self, 16) } diff --git a/src/scu_clk/wdtclkcr.rs b/src/scu_clk/wdtclkcr.rs index e4000da0..57413544 100644 --- a/src/scu_clk/wdtclkcr.rs +++ b/src/scu_clk/wdtclkcr.rs @@ -94,13 +94,11 @@ impl R { impl W { #[doc = "Bits 0:7 - WDT Clock Divider Value"] #[inline(always)] - #[must_use] pub fn wdtdiv(&mut self) -> WDTDIV_W { WDTDIV_W::new(self, 0) } #[doc = "Bits 16:17 - WDT Clock Selection Value"] #[inline(always)] - #[must_use] pub fn wdtsel(&mut self) -> WDTSEL_W { WDTSEL_W::new(self, 16) } diff --git a/src/scu_general/ccucon.rs b/src/scu_general/ccucon.rs index 0bb8f41e..b3b32d4e 100644 --- a/src/scu_general/ccucon.rs +++ b/src/scu_general/ccucon.rs @@ -355,37 +355,31 @@ impl R { impl W { #[doc = "Bit 0 - Global Start Control CCU40"] #[inline(always)] - #[must_use] pub fn gsc40(&mut self) -> GSC40_W { GSC40_W::new(self, 0) } #[doc = "Bit 1 - Global Start Control CCU41"] #[inline(always)] - #[must_use] pub fn gsc41(&mut self) -> GSC41_W { GSC41_W::new(self, 1) } #[doc = "Bit 2 - Global Start Control CCU42"] #[inline(always)] - #[must_use] pub fn gsc42(&mut self) -> GSC42_W { GSC42_W::new(self, 2) } #[doc = "Bit 3 - Global Start Control CCU43"] #[inline(always)] - #[must_use] pub fn gsc43(&mut self) -> GSC43_W { GSC43_W::new(self, 3) } #[doc = "Bit 8 - Global Start Control CCU80"] #[inline(always)] - #[must_use] pub fn gsc80(&mut self) -> GSC80_W { GSC80_W::new(self, 8) } #[doc = "Bit 9 - Global Start Control CCU81"] #[inline(always)] - #[must_use] pub fn gsc81(&mut self) -> GSC81_W { GSC81_W::new(self, 9) } diff --git a/src/scu_general/dtscon.rs b/src/scu_general/dtscon.rs index 3ef43320..503975cd 100644 --- a/src/scu_general/dtscon.rs +++ b/src/scu_general/dtscon.rs @@ -132,37 +132,31 @@ impl R { impl W { #[doc = "Bit 0 - Sensor Power Down"] #[inline(always)] - #[must_use] pub fn pwd(&mut self) -> PWD_W { PWD_W::new(self, 0) } #[doc = "Bit 1 - Sensor Measurement Start"] #[inline(always)] - #[must_use] pub fn start(&mut self) -> START_W { START_W::new(self, 1) } #[doc = "Bits 4:10 - Offset Calibration Value"] #[inline(always)] - #[must_use] pub fn offset(&mut self) -> OFFSET_W { OFFSET_W::new(self, 4) } #[doc = "Bits 11:16 - Gain Calibration Value"] #[inline(always)] - #[must_use] pub fn gain(&mut self) -> GAIN_W { GAIN_W::new(self, 11) } #[doc = "Bits 17:19 - Reference Trim Calibration Value"] #[inline(always)] - #[must_use] pub fn reftrim(&mut self) -> REFTRIM_W { REFTRIM_W::new(self, 17) } #[doc = "Bits 20:23 - Bandgap Trim Calibration Value"] #[inline(always)] - #[must_use] pub fn bgtrim(&mut self) -> BGTRIM_W { BGTRIM_W::new(self, 20) } diff --git a/src/scu_general/g0orcen.rs b/src/scu_general/g0orcen.rs index 6e8eb962..6ffb62bf 100644 --- a/src/scu_general/g0orcen.rs +++ b/src/scu_general/g0orcen.rs @@ -123,13 +123,11 @@ impl R { impl W { #[doc = "Bit 6 - Enable Out of Range Comparator, Channel 6"] #[inline(always)] - #[must_use] pub fn enorc6(&mut self) -> ENORC6_W { ENORC6_W::new(self, 6) } #[doc = "Bit 7 - Enable Out of Range Comparator, Channel 7"] #[inline(always)] - #[must_use] pub fn enorc7(&mut self) -> ENORC7_W { ENORC7_W::new(self, 7) } diff --git a/src/scu_general/g1orcen.rs b/src/scu_general/g1orcen.rs index 5838950e..5b10559c 100644 --- a/src/scu_general/g1orcen.rs +++ b/src/scu_general/g1orcen.rs @@ -123,13 +123,11 @@ impl R { impl W { #[doc = "Bit 6 - Enable Out of Range Comparator, Channel 6"] #[inline(always)] - #[must_use] pub fn enorc6(&mut self) -> ENORC6_W { ENORC6_W::new(self, 6) } #[doc = "Bit 7 - Enable Out of Range Comparator, Channel 7"] #[inline(always)] - #[must_use] pub fn enorc7(&mut self) -> ENORC7_W { ENORC7_W::new(self, 7) } diff --git a/src/scu_general/gpr0.rs b/src/scu_general/gpr0.rs index b283ac4b..6c0a1b28 100644 --- a/src/scu_general/gpr0.rs +++ b/src/scu_general/gpr0.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - User Data"] #[inline(always)] - #[must_use] pub fn dat(&mut self) -> DAT_W { DAT_W::new(self, 0) } diff --git a/src/scu_general/gpr1.rs b/src/scu_general/gpr1.rs index b5b3a48e..66e2a964 100644 --- a/src/scu_general/gpr1.rs +++ b/src/scu_general/gpr1.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - User Data"] #[inline(always)] - #[must_use] pub fn dat(&mut self) -> DAT_W { DAT_W::new(self, 0) } diff --git a/src/scu_general/rmacr.rs b/src/scu_general/rmacr.rs index 2d427fd0..87e80d37 100644 --- a/src/scu_general/rmacr.rs +++ b/src/scu_general/rmacr.rs @@ -74,13 +74,11 @@ impl R { impl W { #[doc = "Bit 0 - Hibernate Retention Memory Register Update Control"] #[inline(always)] - #[must_use] pub fn rdwr(&mut self) -> RDWR_W { RDWR_W::new(self, 0) } #[doc = "Bits 16:19 - Hibernate Retention Memory Register Address Select"] #[inline(always)] - #[must_use] pub fn addr(&mut self) -> ADDR_W { ADDR_W::new(self, 16) } diff --git a/src/scu_general/rmdata.rs b/src/scu_general/rmdata.rs index e83ae39a..67fb3d31 100644 --- a/src/scu_general/rmdata.rs +++ b/src/scu_general/rmdata.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Hibernate Retention Memory Data"] #[inline(always)] - #[must_use] pub fn data(&mut self) -> DATA_W { DATA_W::new(self, 0) } diff --git a/src/scu_general/sdmmcdel.rs b/src/scu_general/sdmmcdel.rs index 6814aade..ac7bc939 100644 --- a/src/scu_general/sdmmcdel.rs +++ b/src/scu_general/sdmmcdel.rs @@ -74,13 +74,11 @@ impl R { impl W { #[doc = "Bit 0 - Enable delay on the CMD/DAT out lines"] #[inline(always)] - #[must_use] pub fn tapen(&mut self) -> TAPEN_W { TAPEN_W::new(self, 0) } #[doc = "Bits 4:7 - Number of Delay Elements Select"] #[inline(always)] - #[must_use] pub fn tapdel(&mut self) -> TAPDEL_W { TAPDEL_W::new(self, 4) } diff --git a/src/scu_general/stcon.rs b/src/scu_general/stcon.rs index e4fd1901..cab5acc4 100644 --- a/src/scu_general/stcon.rs +++ b/src/scu_general/stcon.rs @@ -213,7 +213,6 @@ impl R { impl W { #[doc = "Bits 8:11 - SW Configuration"] #[inline(always)] - #[must_use] pub fn swcon(&mut self) -> SWCON_W { SWCON_W::new(self, 8) } diff --git a/src/scu_hibernate/hdclr.rs b/src/scu_hibernate/hdclr.rs index 06d1961c..d8e8f17b 100644 --- a/src/scu_hibernate/hdclr.rs +++ b/src/scu_hibernate/hdclr.rs @@ -127,25 +127,21 @@ where impl W { #[doc = "Bit 0 - Wake-up Pin Event Positive Edge Clear"] #[inline(always)] - #[must_use] pub fn epev(&mut self) -> EPEV_W { EPEV_W::new(self, 0) } #[doc = "Bit 1 - Wake-up Pin Event Negative Edge Clear"] #[inline(always)] - #[must_use] pub fn enev(&mut self) -> ENEV_W { ENEV_W::new(self, 1) } #[doc = "Bit 2 - RTC Event Clear"] #[inline(always)] - #[must_use] pub fn rtcev(&mut self) -> RTCEV_W { RTCEV_W::new(self, 2) } #[doc = "Bit 3 - ULP WDG Alarm Clear"] #[inline(always)] - #[must_use] pub fn ulpwdg(&mut self) -> ULPWDG_W { ULPWDG_W::new(self, 3) } diff --git a/src/scu_hibernate/hdcr.rs b/src/scu_hibernate/hdcr.rs index 460dfdb8..75c3f7ca 100644 --- a/src/scu_hibernate/hdcr.rs +++ b/src/scu_hibernate/hdcr.rs @@ -983,79 +983,66 @@ impl R { impl W { #[doc = "Bit 0 - Wake-Up on Pin Event Positive Edge Enable"] #[inline(always)] - #[must_use] pub fn wkpep(&mut self) -> WKPEP_W { WKPEP_W::new(self, 0) } #[doc = "Bit 1 - Wake-up on Pin Event Negative Edge Enable"] #[inline(always)] - #[must_use] pub fn wkpen(&mut self) -> WKPEN_W { WKPEN_W::new(self, 1) } #[doc = "Bit 2 - Wake-up on RTC Event Enable"] #[inline(always)] - #[must_use] pub fn rtce(&mut self) -> RTCE_W { RTCE_W::new(self, 2) } #[doc = "Bit 3 - ULP WDG Alarm Enable"] #[inline(always)] - #[must_use] pub fn ulpwdgen(&mut self) -> ULPWDGEN_W { ULPWDGEN_W::new(self, 3) } #[doc = "Bit 4 - Hibernate Request Value Set"] #[inline(always)] - #[must_use] pub fn hib(&mut self) -> HIB_W { HIB_W::new(self, 4) } #[doc = "Bit 6 - fRTC Clock Selection"] #[inline(always)] - #[must_use] pub fn rcs(&mut self) -> RCS_W { RCS_W::new(self, 6) } #[doc = "Bit 7 - fSTDBY Clock Selection"] #[inline(always)] - #[must_use] pub fn stdbysel(&mut self) -> STDBYSEL_W { STDBYSEL_W::new(self, 7) } #[doc = "Bit 8 - Wake-Up from Hibernate Trigger Input Selection"] #[inline(always)] - #[must_use] pub fn wkupsel(&mut self) -> WKUPSEL_W { WKUPSEL_W::new(self, 8) } #[doc = "Bit 10 - General Purpose Input 0 Selection"] #[inline(always)] - #[must_use] pub fn gpi0sel(&mut self) -> GPI0SEL_W { GPI0SEL_W::new(self, 10) } #[doc = "Bit 12 - HIBIO0 Polarity Set"] #[inline(always)] - #[must_use] pub fn hibio0pol(&mut self) -> HIBIO0POL_W { HIBIO0POL_W::new(self, 12) } #[doc = "Bit 13 - HIBIO1 Polarity Set"] #[inline(always)] - #[must_use] pub fn hibio1pol(&mut self) -> HIBIO1POL_W { HIBIO1POL_W::new(self, 13) } #[doc = "Bits 16:19 - HIB_IO_0 Pin I/O Control (default HIBOUT)"] #[inline(always)] - #[must_use] pub fn hibio0sel(&mut self) -> HIBIO0SEL_W { HIBIO0SEL_W::new(self, 16) } #[doc = "Bits 20:23 - HIB_IO_1 Pin I/O Control (Default WKUP)"] #[inline(always)] - #[must_use] pub fn hibio1sel(&mut self) -> HIBIO1SEL_W { HIBIO1SEL_W::new(self, 20) } diff --git a/src/scu_hibernate/hdset.rs b/src/scu_hibernate/hdset.rs index b0c330e7..123c7eb6 100644 --- a/src/scu_hibernate/hdset.rs +++ b/src/scu_hibernate/hdset.rs @@ -127,25 +127,21 @@ where impl W { #[doc = "Bit 0 - Wake-up Pin Event Positive Edge Set"] #[inline(always)] - #[must_use] pub fn epev(&mut self) -> EPEV_W { EPEV_W::new(self, 0) } #[doc = "Bit 1 - Wake-up Pin Event Negative Edge Set"] #[inline(always)] - #[must_use] pub fn enev(&mut self) -> ENEV_W { ENEV_W::new(self, 1) } #[doc = "Bit 2 - RTC Event Set"] #[inline(always)] - #[must_use] pub fn rtcev(&mut self) -> RTCEV_W { RTCEV_W::new(self, 2) } #[doc = "Bit 3 - ULP WDG Alarm Set"] #[inline(always)] - #[must_use] pub fn ulpwdg(&mut self) -> ULPWDG_W { ULPWDG_W::new(self, 3) } diff --git a/src/scu_hibernate/oscsictrl.rs b/src/scu_hibernate/oscsictrl.rs index 913795a4..ea8ebede 100644 --- a/src/scu_hibernate/oscsictrl.rs +++ b/src/scu_hibernate/oscsictrl.rs @@ -65,7 +65,6 @@ impl R { impl W { #[doc = "Bit 0 - Turn OFF the fOSI Clock Source"] #[inline(always)] - #[must_use] pub fn pwd(&mut self) -> PWD_W { PWD_W::new(self, 0) } diff --git a/src/scu_hibernate/osculctrl.rs b/src/scu_hibernate/osculctrl.rs index e3987769..dacd7950 100644 --- a/src/scu_hibernate/osculctrl.rs +++ b/src/scu_hibernate/osculctrl.rs @@ -156,13 +156,11 @@ impl R { impl W { #[doc = "Bit 0 - XTAL1 Data General Purpose Input Enable"] #[inline(always)] - #[must_use] pub fn x1den(&mut self) -> X1DEN_W { X1DEN_W::new(self, 0) } #[doc = "Bits 4:5 - Oscillator Mode"] #[inline(always)] - #[must_use] pub fn mode(&mut self) -> MODE_W { MODE_W::new(self, 4) } diff --git a/src/scu_interrupt/nmireqen.rs b/src/scu_interrupt/nmireqen.rs index b66a22ae..974a9e6e 100644 --- a/src/scu_interrupt/nmireqen.rs +++ b/src/scu_interrupt/nmireqen.rs @@ -413,43 +413,36 @@ impl R { impl W { #[doc = "Bit 0 - Promote Pre-Warning Interrupt Request to NMI Request"] #[inline(always)] - #[must_use] pub fn prwarn(&mut self) -> PRWARN_W { PRWARN_W::new(self, 0) } #[doc = "Bit 1 - Promote RTC Periodic Interrupt request to NMI Request"] #[inline(always)] - #[must_use] pub fn pi(&mut self) -> PI_W { PI_W::new(self, 1) } #[doc = "Bit 2 - Promote RTC Alarm Interrupt Request to NMI Request"] #[inline(always)] - #[must_use] pub fn ai(&mut self) -> AI_W { AI_W::new(self, 2) } #[doc = "Bit 16 - Promote Channel 0 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] - #[must_use] pub fn eru00(&mut self) -> ERU00_W { ERU00_W::new(self, 16) } #[doc = "Bit 17 - Promote Channel 1 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] - #[must_use] pub fn eru01(&mut self) -> ERU01_W { ERU01_W::new(self, 17) } #[doc = "Bit 18 - Promote Channel 2 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] - #[must_use] pub fn eru02(&mut self) -> ERU02_W { ERU02_W::new(self, 18) } #[doc = "Bit 19 - Promote Channel 3 Interrupt of ERU0 Request to NMI Request"] #[inline(always)] - #[must_use] pub fn eru03(&mut self) -> ERU03_W { ERU03_W::new(self, 19) } diff --git a/src/scu_interrupt/srclr.rs b/src/scu_interrupt/srclr.rs index d9001e0a..694df36c 100644 --- a/src/scu_interrupt/srclr.rs +++ b/src/scu_interrupt/srclr.rs @@ -468,91 +468,76 @@ where impl W { #[doc = "Bit 0 - WDT pre-warning Interrupt Clear"] #[inline(always)] - #[must_use] pub fn prwarn(&mut self) -> PRWARN_W { PRWARN_W::new(self, 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Clear"] #[inline(always)] - #[must_use] pub fn pi(&mut self) -> PI_W { PI_W::new(self, 1) } #[doc = "Bit 2 - RTC Alarm Interrupt Clear"] #[inline(always)] - #[must_use] pub fn ai(&mut self) -> AI_W { AI_W::new(self, 2) } #[doc = "Bit 3 - DLR Request Overrun Interrupt clear"] #[inline(always)] - #[must_use] pub fn dlrovr(&mut self) -> DLROVR_W { DLROVR_W::new(self, 3) } #[doc = "Bit 17 - HDCLR Mirror Register Update Clear"] #[inline(always)] - #[must_use] pub fn hdclr(&mut self) -> HDCLR_W { HDCLR_W::new(self, 17) } #[doc = "Bit 18 - HDSET Mirror Register Update Clear"] #[inline(always)] - #[must_use] pub fn hdset(&mut self) -> HDSET_W { HDSET_W::new(self, 18) } #[doc = "Bit 19 - HDCR Mirror Register Update Clear"] #[inline(always)] - #[must_use] pub fn hdcr(&mut self) -> HDCR_W { HDCR_W::new(self, 19) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Clear"] #[inline(always)] - #[must_use] pub fn oscsictrl(&mut self) -> OSCSICTRL_W { OSCSICTRL_W::new(self, 21) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Clear"] #[inline(always)] - #[must_use] pub fn osculctrl(&mut self) -> OSCULCTRL_W { OSCULCTRL_W::new(self, 23) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Clear"] #[inline(always)] - #[must_use] pub fn rtc_ctr(&mut self) -> RTC_CTR_W { RTC_CTR_W::new(self, 24) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Clear"] #[inline(always)] - #[must_use] pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W { RTC_ATIM0_W::new(self, 25) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Clear"] #[inline(always)] - #[must_use] pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W { RTC_ATIM1_W::new(self, 26) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Clear"] #[inline(always)] - #[must_use] pub fn rtc_tim0(&mut self) -> RTC_TIM0_W { RTC_TIM0_W::new(self, 27) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Clear"] #[inline(always)] - #[must_use] pub fn rtc_tim1(&mut self) -> RTC_TIM1_W { RTC_TIM1_W::new(self, 28) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Clear"] #[inline(always)] - #[must_use] pub fn rmx(&mut self) -> RMX_W { RMX_W::new(self, 29) } diff --git a/src/scu_interrupt/srmsk.rs b/src/scu_interrupt/srmsk.rs index bc8cee2a..9fd7e6ba 100644 --- a/src/scu_interrupt/srmsk.rs +++ b/src/scu_interrupt/srmsk.rs @@ -877,91 +877,76 @@ impl R { impl W { #[doc = "Bit 0 - WDT pre-warning Interrupt Mask"] #[inline(always)] - #[must_use] pub fn prwarn(&mut self) -> PRWARN_W { PRWARN_W::new(self, 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Mask"] #[inline(always)] - #[must_use] pub fn pi(&mut self) -> PI_W { PI_W::new(self, 1) } #[doc = "Bit 2 - RTC Alarm Interrupt Mask"] #[inline(always)] - #[must_use] pub fn ai(&mut self) -> AI_W { AI_W::new(self, 2) } #[doc = "Bit 3 - DLR Request Overrun Interrupt Mask"] #[inline(always)] - #[must_use] pub fn dlrovr(&mut self) -> DLROVR_W { DLROVR_W::new(self, 3) } #[doc = "Bit 17 - HDCLR Mirror Register Update Mask"] #[inline(always)] - #[must_use] pub fn hdclr(&mut self) -> HDCLR_W { HDCLR_W::new(self, 17) } #[doc = "Bit 18 - HDSET Mirror Register Update Mask"] #[inline(always)] - #[must_use] pub fn hdset(&mut self) -> HDSET_W { HDSET_W::new(self, 18) } #[doc = "Bit 19 - HDCR Mirror Register Update Mask"] #[inline(always)] - #[must_use] pub fn hdcr(&mut self) -> HDCR_W { HDCR_W::new(self, 19) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Mask"] #[inline(always)] - #[must_use] pub fn oscsictrl(&mut self) -> OSCSICTRL_W { OSCSICTRL_W::new(self, 21) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Mask"] #[inline(always)] - #[must_use] pub fn osculctrl(&mut self) -> OSCULCTRL_W { OSCULCTRL_W::new(self, 23) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Mask"] #[inline(always)] - #[must_use] pub fn rtc_ctr(&mut self) -> RTC_CTR_W { RTC_CTR_W::new(self, 24) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Mask"] #[inline(always)] - #[must_use] pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W { RTC_ATIM0_W::new(self, 25) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Mask"] #[inline(always)] - #[must_use] pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W { RTC_ATIM1_W::new(self, 26) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Mask"] #[inline(always)] - #[must_use] pub fn rtc_tim0(&mut self) -> RTC_TIM0_W { RTC_TIM0_W::new(self, 27) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Mask"] #[inline(always)] - #[must_use] pub fn rtc_tim1(&mut self) -> RTC_TIM1_W { RTC_TIM1_W::new(self, 28) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Mask"] #[inline(always)] - #[must_use] pub fn rmx(&mut self) -> RMX_W { RMX_W::new(self, 29) } diff --git a/src/scu_interrupt/srset.rs b/src/scu_interrupt/srset.rs index c5af8fd4..bf9e956b 100644 --- a/src/scu_interrupt/srset.rs +++ b/src/scu_interrupt/srset.rs @@ -468,91 +468,76 @@ where impl W { #[doc = "Bit 0 - WDT pre-warning Interrupt Set"] #[inline(always)] - #[must_use] pub fn prwarn(&mut self) -> PRWARN_W { PRWARN_W::new(self, 0) } #[doc = "Bit 1 - RTC Periodic Interrupt Set"] #[inline(always)] - #[must_use] pub fn pi(&mut self) -> PI_W { PI_W::new(self, 1) } #[doc = "Bit 2 - RTC Alarm Interrupt Set"] #[inline(always)] - #[must_use] pub fn ai(&mut self) -> AI_W { AI_W::new(self, 2) } #[doc = "Bit 3 - DLR Request Overrun Interrupt Set"] #[inline(always)] - #[must_use] pub fn dlrovr(&mut self) -> DLROVR_W { DLROVR_W::new(self, 3) } #[doc = "Bit 17 - HDCRCLR Mirror Register Update Set"] #[inline(always)] - #[must_use] pub fn hdcrclr(&mut self) -> HDCRCLR_W { HDCRCLR_W::new(self, 17) } #[doc = "Bit 18 - HDCRSET Mirror Register Update Set"] #[inline(always)] - #[must_use] pub fn hdcrset(&mut self) -> HDCRSET_W { HDCRSET_W::new(self, 18) } #[doc = "Bit 19 - HDCR Mirror Register Update Set"] #[inline(always)] - #[must_use] pub fn hdcr(&mut self) -> HDCR_W { HDCR_W::new(self, 19) } #[doc = "Bit 21 - OSCSICTRL Mirror Register Update Set"] #[inline(always)] - #[must_use] pub fn oscsictrl(&mut self) -> OSCSICTRL_W { OSCSICTRL_W::new(self, 21) } #[doc = "Bit 23 - OSCULCTRL Mirror Register Update Set"] #[inline(always)] - #[must_use] pub fn osculctrl(&mut self) -> OSCULCTRL_W { OSCULCTRL_W::new(self, 23) } #[doc = "Bit 24 - RTC CTR Mirror Register Update Set"] #[inline(always)] - #[must_use] pub fn rtc_ctr(&mut self) -> RTC_CTR_W { RTC_CTR_W::new(self, 24) } #[doc = "Bit 25 - RTC ATIM0 Mirror Register Update Set"] #[inline(always)] - #[must_use] pub fn rtc_atim0(&mut self) -> RTC_ATIM0_W { RTC_ATIM0_W::new(self, 25) } #[doc = "Bit 26 - RTC ATIM1 Mirror Register Update Set"] #[inline(always)] - #[must_use] pub fn rtc_atim1(&mut self) -> RTC_ATIM1_W { RTC_ATIM1_W::new(self, 26) } #[doc = "Bit 27 - RTC TIM0 Mirror Register Update Set"] #[inline(always)] - #[must_use] pub fn rtc_tim0(&mut self) -> RTC_TIM0_W { RTC_TIM0_W::new(self, 27) } #[doc = "Bit 28 - RTC TIM1 Mirror Register Update Set"] #[inline(always)] - #[must_use] pub fn rtc_tim1(&mut self) -> RTC_TIM1_W { RTC_TIM1_W::new(self, 28) } #[doc = "Bit 29 - Retention Memory Mirror Register Update Set"] #[inline(always)] - #[must_use] pub fn rmx(&mut self) -> RMX_W { RMX_W::new(self, 29) } diff --git a/src/scu_osc/clkcalconst.rs b/src/scu_osc/clkcalconst.rs index 0a0711bb..af945409 100644 --- a/src/scu_osc/clkcalconst.rs +++ b/src/scu_osc/clkcalconst.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:3 - Clock Calibration Constant Value"] #[inline(always)] - #[must_use] pub fn calibconst(&mut self) -> CALIBCONST_W { CALIBCONST_W::new(self, 0) } diff --git a/src/scu_osc/oschpctrl.rs b/src/scu_osc/oschpctrl.rs index 82f3bb5c..dc338404 100644 --- a/src/scu_osc/oschpctrl.rs +++ b/src/scu_osc/oschpctrl.rs @@ -314,31 +314,26 @@ impl R { impl W { #[doc = "Bit 0 - XTAL1 Data Enable"] #[inline(always)] - #[must_use] pub fn x1den(&mut self) -> X1DEN_W { X1DEN_W::new(self, 0) } #[doc = "Bit 1 - Shaper Bypass"] #[inline(always)] - #[must_use] pub fn shby(&mut self) -> SHBY_W { SHBY_W::new(self, 1) } #[doc = "Bits 2:3 - Oscillator Gain Selection"] #[inline(always)] - #[must_use] pub fn gainsel(&mut self) -> GAINSEL_W { GAINSEL_W::new(self, 2) } #[doc = "Bits 4:5 - Oscillator Mode"] #[inline(always)] - #[must_use] pub fn mode(&mut self) -> MODE_W { MODE_W::new(self, 4) } #[doc = "Bits 16:19 - OSC Frequency Value"] #[inline(always)] - #[must_use] pub fn oscval(&mut self) -> OSCVAL_W { OSCVAL_W::new(self, 16) } diff --git a/src/scu_parity/mchkcon.rs b/src/scu_parity/mchkcon.rs index 425b064e..2364282f 100644 --- a/src/scu_parity/mchkcon.rs +++ b/src/scu_parity/mchkcon.rs @@ -761,79 +761,66 @@ impl R { impl W { #[doc = "Bit 0 - Select Memory Check for PSRAM"] #[inline(always)] - #[must_use] pub fn selps(&mut self) -> SELPS_W { SELPS_W::new(self, 0) } #[doc = "Bit 1 - Select Memory Check for DSRAM1"] #[inline(always)] - #[must_use] pub fn selds1(&mut self) -> SELDS1_W { SELDS1_W::new(self, 1) } #[doc = "Bit 2 - Select Memory Check for DSRAM2"] #[inline(always)] - #[must_use] pub fn selds2(&mut self) -> SELDS2_W { SELDS2_W::new(self, 2) } #[doc = "Bit 8 - Select Memory Check for USIC0"] #[inline(always)] - #[must_use] pub fn usic0dra(&mut self) -> USIC0DRA_W { USIC0DRA_W::new(self, 8) } #[doc = "Bit 9 - Select Memory Check for USIC1"] #[inline(always)] - #[must_use] pub fn usic1dra(&mut self) -> USIC1DRA_W { USIC1DRA_W::new(self, 9) } #[doc = "Bit 10 - Select Memory Check for USIC2"] #[inline(always)] - #[must_use] pub fn usic2dra(&mut self) -> USIC2DRA_W { USIC2DRA_W::new(self, 10) } #[doc = "Bit 12 - Select Memory Check for MultiCAN"] #[inline(always)] - #[must_use] pub fn mcandra(&mut self) -> MCANDRA_W { MCANDRA_W::new(self, 12) } #[doc = "Bit 13 - Select Memory Check for PMU"] #[inline(always)] - #[must_use] pub fn pprfdra(&mut self) -> PPRFDRA_W { PPRFDRA_W::new(self, 13) } #[doc = "Bit 16 - Select Memory Check for USB SRAM"] #[inline(always)] - #[must_use] pub fn selusb(&mut self) -> SELUSB_W { SELUSB_W::new(self, 16) } #[doc = "Bit 17 - Select Memory Check for ETH0 TX SRAM"] #[inline(always)] - #[must_use] pub fn seleth0tx(&mut self) -> SELETH0TX_W { SELETH0TX_W::new(self, 17) } #[doc = "Bit 18 - Select Memory Check for ETH0 RX SRAM"] #[inline(always)] - #[must_use] pub fn seleth0rx(&mut self) -> SELETH0RX_W { SELETH0RX_W::new(self, 18) } #[doc = "Bit 19 - Select Memory Check for SDMMC SRAM 0"] #[inline(always)] - #[must_use] pub fn selsd0(&mut self) -> SELSD0_W { SELSD0_W::new(self, 19) } #[doc = "Bit 20 - Select Memory Check for SDMMC SRAM 1"] #[inline(always)] - #[must_use] pub fn selsd1(&mut self) -> SELSD1_W { SELSD1_W::new(self, 20) } diff --git a/src/scu_parity/peen.rs b/src/scu_parity/peen.rs index d7d6284b..0795711c 100644 --- a/src/scu_parity/peen.rs +++ b/src/scu_parity/peen.rs @@ -761,79 +761,66 @@ impl R { impl W { #[doc = "Bit 0 - Parity Error Enable for PSRAM"] #[inline(always)] - #[must_use] pub fn peenps(&mut self) -> PEENPS_W { PEENPS_W::new(self, 0) } #[doc = "Bit 1 - Parity Error Enable for DSRAM1"] #[inline(always)] - #[must_use] pub fn peends1(&mut self) -> PEENDS1_W { PEENDS1_W::new(self, 1) } #[doc = "Bit 2 - Parity Error Enable for DSRAM2"] #[inline(always)] - #[must_use] pub fn peends2(&mut self) -> PEENDS2_W { PEENDS2_W::new(self, 2) } #[doc = "Bit 8 - Parity Error Enable for USIC0 Memory"] #[inline(always)] - #[must_use] pub fn peenu0(&mut self) -> PEENU0_W { PEENU0_W::new(self, 8) } #[doc = "Bit 9 - Parity Error Enable for USIC1 Memory"] #[inline(always)] - #[must_use] pub fn peenu1(&mut self) -> PEENU1_W { PEENU1_W::new(self, 9) } #[doc = "Bit 10 - Parity Error Enable for USIC2 Memory"] #[inline(always)] - #[must_use] pub fn peenu2(&mut self) -> PEENU2_W { PEENU2_W::new(self, 10) } #[doc = "Bit 12 - Parity Error Enable for MultiCAN Memory"] #[inline(always)] - #[must_use] pub fn peenmc(&mut self) -> PEENMC_W { PEENMC_W::new(self, 12) } #[doc = "Bit 13 - Parity Error Enable for PMU Prefetch Memory"] #[inline(always)] - #[must_use] pub fn peenpprf(&mut self) -> PEENPPRF_W { PEENPPRF_W::new(self, 13) } #[doc = "Bit 16 - Parity Error Enable for USB Memory"] #[inline(always)] - #[must_use] pub fn peenusb(&mut self) -> PEENUSB_W { PEENUSB_W::new(self, 16) } #[doc = "Bit 17 - Parity Error Enable for ETH TX Memory"] #[inline(always)] - #[must_use] pub fn peeneth0tx(&mut self) -> PEENETH0TX_W { PEENETH0TX_W::new(self, 17) } #[doc = "Bit 18 - Parity Error Enable for ETH RX Memory"] #[inline(always)] - #[must_use] pub fn peeneth0rx(&mut self) -> PEENETH0RX_W { PEENETH0RX_W::new(self, 18) } #[doc = "Bit 19 - Parity Error Enable for SDMMC Memory 0"] #[inline(always)] - #[must_use] pub fn peensd0(&mut self) -> PEENSD0_W { PEENSD0_W::new(self, 19) } #[doc = "Bit 20 - Parity Error Enable for SDMMC Memory 1"] #[inline(always)] - #[must_use] pub fn peensd1(&mut self) -> PEENSD1_W { PEENSD1_W::new(self, 20) } diff --git a/src/scu_parity/peflag.rs b/src/scu_parity/peflag.rs index c24fad6e..2ee61e47 100644 --- a/src/scu_parity/peflag.rs +++ b/src/scu_parity/peflag.rs @@ -761,79 +761,66 @@ impl R { impl W { #[doc = "Bit 0 - Parity Error Flag for PSRAM"] #[inline(always)] - #[must_use] pub fn pefps(&mut self) -> PEFPS_W { PEFPS_W::new(self, 0) } #[doc = "Bit 1 - Parity Error Flag for DSRAM1"] #[inline(always)] - #[must_use] pub fn pefds1(&mut self) -> PEFDS1_W { PEFDS1_W::new(self, 1) } #[doc = "Bit 2 - Parity Error Flag for DSRAM2"] #[inline(always)] - #[must_use] pub fn pefds2(&mut self) -> PEFDS2_W { PEFDS2_W::new(self, 2) } #[doc = "Bit 8 - Parity Error Flag for USIC0 Memory"] #[inline(always)] - #[must_use] pub fn pefu0(&mut self) -> PEFU0_W { PEFU0_W::new(self, 8) } #[doc = "Bit 9 - Parity Error Flag for USIC1 Memory"] #[inline(always)] - #[must_use] pub fn pefu1(&mut self) -> PEFU1_W { PEFU1_W::new(self, 9) } #[doc = "Bit 10 - Parity Error Flag for USIC2 Memory"] #[inline(always)] - #[must_use] pub fn pefu2(&mut self) -> PEFU2_W { PEFU2_W::new(self, 10) } #[doc = "Bit 12 - Parity Error Flag for MultiCAN Memory"] #[inline(always)] - #[must_use] pub fn pefmc(&mut self) -> PEFMC_W { PEFMC_W::new(self, 12) } #[doc = "Bit 13 - Parity Error Flag for PMU Prefetch Memory"] #[inline(always)] - #[must_use] pub fn pefpprf(&mut self) -> PEFPPRF_W { PEFPPRF_W::new(self, 13) } #[doc = "Bit 16 - Parity Error Flag for USB Memory"] #[inline(always)] - #[must_use] pub fn peusb(&mut self) -> PEUSB_W { PEUSB_W::new(self, 16) } #[doc = "Bit 17 - Parity Error Flag for ETH TX Memory"] #[inline(always)] - #[must_use] pub fn peeth0tx(&mut self) -> PEETH0TX_W { PEETH0TX_W::new(self, 17) } #[doc = "Bit 18 - Parity Error Flag for ETH RX Memory"] #[inline(always)] - #[must_use] pub fn peeth0rx(&mut self) -> PEETH0RX_W { PEETH0RX_W::new(self, 18) } #[doc = "Bit 19 - Parity Error Flag for SDMMC Memory 0"] #[inline(always)] - #[must_use] pub fn pesd0(&mut self) -> PESD0_W { PESD0_W::new(self, 19) } #[doc = "Bit 20 - Parity Error Flag for SDMMC Memory 1"] #[inline(always)] - #[must_use] pub fn pesd1(&mut self) -> PESD1_W { PESD1_W::new(self, 20) } diff --git a/src/scu_parity/persten.rs b/src/scu_parity/persten.rs index 8f5b6969..f7df0502 100644 --- a/src/scu_parity/persten.rs +++ b/src/scu_parity/persten.rs @@ -65,7 +65,6 @@ impl R { impl W { #[doc = "Bit 0 - System Reset Enable upon Parity Error Trap"] #[inline(always)] - #[must_use] pub fn rsen(&mut self) -> RSEN_W { RSEN_W::new(self, 0) } diff --git a/src/scu_parity/pete.rs b/src/scu_parity/pete.rs index e90db627..3d2e9851 100644 --- a/src/scu_parity/pete.rs +++ b/src/scu_parity/pete.rs @@ -761,79 +761,66 @@ impl R { impl W { #[doc = "Bit 0 - Parity Error Trap Enable for PSRAM"] #[inline(always)] - #[must_use] pub fn peteps(&mut self) -> PETEPS_W { PETEPS_W::new(self, 0) } #[doc = "Bit 1 - Parity Error Trap Enable for DSRAM1"] #[inline(always)] - #[must_use] pub fn peteds1(&mut self) -> PETEDS1_W { PETEDS1_W::new(self, 1) } #[doc = "Bit 2 - Parity Error Trap Enable for DSRAM2"] #[inline(always)] - #[must_use] pub fn peteds2(&mut self) -> PETEDS2_W { PETEDS2_W::new(self, 2) } #[doc = "Bit 8 - Parity Error Trap Enable for USIC0 Memory"] #[inline(always)] - #[must_use] pub fn peteu0(&mut self) -> PETEU0_W { PETEU0_W::new(self, 8) } #[doc = "Bit 9 - Parity Error Trap Enable for USIC1 Memory"] #[inline(always)] - #[must_use] pub fn peteu1(&mut self) -> PETEU1_W { PETEU1_W::new(self, 9) } #[doc = "Bit 10 - Parity Error Trap Enable for USIC2 Memory"] #[inline(always)] - #[must_use] pub fn peteu2(&mut self) -> PETEU2_W { PETEU2_W::new(self, 10) } #[doc = "Bit 12 - Parity Error Trap Enable for MultiCAN Memory"] #[inline(always)] - #[must_use] pub fn petemc(&mut self) -> PETEMC_W { PETEMC_W::new(self, 12) } #[doc = "Bit 13 - Parity Error Trap Enable for PMU Prefetch Memory"] #[inline(always)] - #[must_use] pub fn petepprf(&mut self) -> PETEPPRF_W { PETEPPRF_W::new(self, 13) } #[doc = "Bit 16 - Parity Error Trap Enable for USB Memory"] #[inline(always)] - #[must_use] pub fn peteusb(&mut self) -> PETEUSB_W { PETEUSB_W::new(self, 16) } #[doc = "Bit 17 - Parity Error Trap Enable for ETH 0TX Memory"] #[inline(always)] - #[must_use] pub fn peteeth0tx(&mut self) -> PETEETH0TX_W { PETEETH0TX_W::new(self, 17) } #[doc = "Bit 18 - Parity Error Trap Enable for ETH0 RX Memory"] #[inline(always)] - #[must_use] pub fn peteeth0rx(&mut self) -> PETEETH0RX_W { PETEETH0RX_W::new(self, 18) } #[doc = "Bit 19 - Parity Error Trap Enable for SDMMC SRAM 0 Memory"] #[inline(always)] - #[must_use] pub fn petesd0(&mut self) -> PETESD0_W { PETESD0_W::new(self, 19) } #[doc = "Bit 20 - Parity Error Trap Enable for SDMMC SRAM 1 Memory"] #[inline(always)] - #[must_use] pub fn petesd1(&mut self) -> PETESD1_W { PETESD1_W::new(self, 20) } diff --git a/src/scu_parity/pmtpr.rs b/src/scu_parity/pmtpr.rs index 572d76f6..4c9634f0 100644 --- a/src/scu_parity/pmtpr.rs +++ b/src/scu_parity/pmtpr.rs @@ -23,7 +23,6 @@ impl R { impl W { #[doc = "Bits 0:7 - Parity Write Values for Memory Test"] #[inline(always)] - #[must_use] pub fn pwr(&mut self) -> PWR_W { PWR_W::new(self, 0) } diff --git a/src/scu_parity/pmtsr.rs b/src/scu_parity/pmtsr.rs index f898aa03..f5071b51 100644 --- a/src/scu_parity/pmtsr.rs +++ b/src/scu_parity/pmtsr.rs @@ -761,79 +761,66 @@ impl R { impl W { #[doc = "Bit 0 - Test Enable Control for PSRAM"] #[inline(always)] - #[must_use] pub fn mtenps(&mut self) -> MTENPS_W { MTENPS_W::new(self, 0) } #[doc = "Bit 1 - Test Enable Control for DSRAM1"] #[inline(always)] - #[must_use] pub fn mtends1(&mut self) -> MTENDS1_W { MTENDS1_W::new(self, 1) } #[doc = "Bit 2 - Test Enable Control for DSRAM2"] #[inline(always)] - #[must_use] pub fn mtends2(&mut self) -> MTENDS2_W { MTENDS2_W::new(self, 2) } #[doc = "Bit 8 - Test Enable Control for USIC0 Memory"] #[inline(always)] - #[must_use] pub fn mteu0(&mut self) -> MTEU0_W { MTEU0_W::new(self, 8) } #[doc = "Bit 9 - Test Enable Control for USIC1 Memory"] #[inline(always)] - #[must_use] pub fn mteu1(&mut self) -> MTEU1_W { MTEU1_W::new(self, 9) } #[doc = "Bit 10 - Test Enable Control for USIC2 Memory"] #[inline(always)] - #[must_use] pub fn mteu2(&mut self) -> MTEU2_W { MTEU2_W::new(self, 10) } #[doc = "Bit 12 - Test Enable Control for MultiCAN Memory"] #[inline(always)] - #[must_use] pub fn mtemc(&mut self) -> MTEMC_W { MTEMC_W::new(self, 12) } #[doc = "Bit 13 - Test Enable Control for PMU Prefetch Memory"] #[inline(always)] - #[must_use] pub fn mtepprf(&mut self) -> MTEPPRF_W { MTEPPRF_W::new(self, 13) } #[doc = "Bit 16 - Test Enable Control for USB Memory"] #[inline(always)] - #[must_use] pub fn mtusb(&mut self) -> MTUSB_W { MTUSB_W::new(self, 16) } #[doc = "Bit 17 - Test Enable Control for ETH TX Memory"] #[inline(always)] - #[must_use] pub fn mteth0tx(&mut self) -> MTETH0TX_W { MTETH0TX_W::new(self, 17) } #[doc = "Bit 18 - Test Enable Control for ETH RX Memory"] #[inline(always)] - #[must_use] pub fn mteth0rx(&mut self) -> MTETH0RX_W { MTETH0RX_W::new(self, 18) } #[doc = "Bit 19 - Test Enable Control for SDMMC Memory 0"] #[inline(always)] - #[must_use] pub fn mtsd0(&mut self) -> MTSD0_W { MTSD0_W::new(self, 19) } #[doc = "Bit 20 - Test Enable Control for SDMMC Memory 1"] #[inline(always)] - #[must_use] pub fn mtsd1(&mut self) -> MTSD1_W { MTSD1_W::new(self, 20) } diff --git a/src/scu_pll/pllcon0.rs b/src/scu_pll/pllcon0.rs index 4c39c485..638c6fb6 100644 --- a/src/scu_pll/pllcon0.rs +++ b/src/scu_pll/pllcon0.rs @@ -531,61 +531,51 @@ impl R { impl W { #[doc = "Bit 0 - VCO Bypass"] #[inline(always)] - #[must_use] pub fn vcobyp(&mut self) -> VCOBYP_W { VCOBYP_W::new(self, 0) } #[doc = "Bit 1 - VCO Power Saving Mode"] #[inline(always)] - #[must_use] pub fn vcopwd(&mut self) -> VCOPWD_W { VCOPWD_W::new(self, 1) } #[doc = "Bit 2 - VCO Trim Control"] #[inline(always)] - #[must_use] pub fn vcotr(&mut self) -> VCOTR_W { VCOTR_W::new(self, 2) } #[doc = "Bit 4 - Disconnect Oscillator from VCO"] #[inline(always)] - #[must_use] pub fn findis(&mut self) -> FINDIS_W { FINDIS_W::new(self, 4) } #[doc = "Bit 6 - Oscillator Disconnect Disable"] #[inline(always)] - #[must_use] pub fn oscdiscdis(&mut self) -> OSCDISCDIS_W { OSCDISCDIS_W::new(self, 6) } #[doc = "Bit 16 - PLL Power Saving Mode"] #[inline(always)] - #[must_use] pub fn pllpwd(&mut self) -> PLLPWD_W { PLLPWD_W::new(self, 16) } #[doc = "Bit 17 - Oscillator Watchdog Reset"] #[inline(always)] - #[must_use] pub fn oscres(&mut self) -> OSCRES_W { OSCRES_W::new(self, 17) } #[doc = "Bit 18 - Restart VCO Lock Detection"] #[inline(always)] - #[must_use] pub fn resld(&mut self) -> RESLD_W { RESLD_W::new(self, 18) } #[doc = "Bit 19 - Automatic Oscillator Calibration Enable"] #[inline(always)] - #[must_use] pub fn aotren(&mut self) -> AOTREN_W { AOTREN_W::new(self, 19) } #[doc = "Bit 20 - Factory Oscillator Calibration"] #[inline(always)] - #[must_use] pub fn fotr(&mut self) -> FOTR_W { FOTR_W::new(self, 20) } diff --git a/src/scu_pll/pllcon1.rs b/src/scu_pll/pllcon1.rs index 4fb0e51f..17d9d09c 100644 --- a/src/scu_pll/pllcon1.rs +++ b/src/scu_pll/pllcon1.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bits 0:6 - K1-Divider Value"] #[inline(always)] - #[must_use] pub fn k1div(&mut self) -> K1DIV_W { K1DIV_W::new(self, 0) } #[doc = "Bits 8:14 - N-Divider Value"] #[inline(always)] - #[must_use] pub fn ndiv(&mut self) -> NDIV_W { NDIV_W::new(self, 8) } #[doc = "Bits 16:22 - K2-Divider Value"] #[inline(always)] - #[must_use] pub fn k2div(&mut self) -> K2DIV_W { K2DIV_W::new(self, 16) } #[doc = "Bits 24:27 - P-Divider Value"] #[inline(always)] - #[must_use] pub fn pdiv(&mut self) -> PDIV_W { PDIV_W::new(self, 24) } diff --git a/src/scu_pll/pllcon2.rs b/src/scu_pll/pllcon2.rs index fbb23ced..2de8e9e7 100644 --- a/src/scu_pll/pllcon2.rs +++ b/src/scu_pll/pllcon2.rs @@ -123,13 +123,11 @@ impl R { impl W { #[doc = "Bit 0 - P-Divider Input Selection"] #[inline(always)] - #[must_use] pub fn pinsel(&mut self) -> PINSEL_W { PINSEL_W::new(self, 0) } #[doc = "Bit 8 - K1-Divider Input Selection"] #[inline(always)] - #[must_use] pub fn k1insel(&mut self) -> K1INSEL_W { K1INSEL_W::new(self, 8) } diff --git a/src/scu_pll/usbpllcon.rs b/src/scu_pll/usbpllcon.rs index 419976b1..e19907b6 100644 --- a/src/scu_pll/usbpllcon.rs +++ b/src/scu_pll/usbpllcon.rs @@ -375,55 +375,46 @@ impl R { impl W { #[doc = "Bit 0 - VCO Bypass"] #[inline(always)] - #[must_use] pub fn vcobyp(&mut self) -> VCOBYP_W { VCOBYP_W::new(self, 0) } #[doc = "Bit 1 - VCO Power Saving Mode"] #[inline(always)] - #[must_use] pub fn vcopwd(&mut self) -> VCOPWD_W { VCOPWD_W::new(self, 1) } #[doc = "Bit 2 - VCO Trim Control"] #[inline(always)] - #[must_use] pub fn vcotr(&mut self) -> VCOTR_W { VCOTR_W::new(self, 2) } #[doc = "Bit 4 - Disconnect Oscillator from VCO"] #[inline(always)] - #[must_use] pub fn findis(&mut self) -> FINDIS_W { FINDIS_W::new(self, 4) } #[doc = "Bit 6 - Oscillator Disconnect Disable"] #[inline(always)] - #[must_use] pub fn oscdiscdis(&mut self) -> OSCDISCDIS_W { OSCDISCDIS_W::new(self, 6) } #[doc = "Bits 8:14 - N-Divider Value"] #[inline(always)] - #[must_use] pub fn ndiv(&mut self) -> NDIV_W { NDIV_W::new(self, 8) } #[doc = "Bit 16 - PLL Power Saving Mode"] #[inline(always)] - #[must_use] pub fn pllpwd(&mut self) -> PLLPWD_W { PLLPWD_W::new(self, 16) } #[doc = "Bit 18 - Restart VCO Lock Detection"] #[inline(always)] - #[must_use] pub fn resld(&mut self) -> RESLD_W { RESLD_W::new(self, 18) } #[doc = "Bits 24:27 - P-Divider Value"] #[inline(always)] - #[must_use] pub fn pdiv(&mut self) -> PDIV_W { PDIV_W::new(self, 24) } diff --git a/src/scu_power/pwrclr.rs b/src/scu_power/pwrclr.rs index e9978697..2675dfdd 100644 --- a/src/scu_power/pwrclr.rs +++ b/src/scu_power/pwrclr.rs @@ -127,25 +127,21 @@ where impl W { #[doc = "Bit 0 - Clear Disable Hibernate Domain"] #[inline(always)] - #[must_use] pub fn hib(&mut self) -> HIB_W { HIB_W::new(self, 0) } #[doc = "Bit 16 - Clear USB PHY Transceiver Disable"] #[inline(always)] - #[must_use] pub fn usbphypdq(&mut self) -> USBPHYPDQ_W { USBPHYPDQ_W::new(self, 16) } #[doc = "Bit 17 - Clear USB On-The-Go Comparators Enable"] #[inline(always)] - #[must_use] pub fn usbotgen(&mut self) -> USBOTGEN_W { USBOTGEN_W::new(self, 17) } #[doc = "Bit 18 - Clear USB Weak Pull-Up at PADN Enable"] #[inline(always)] - #[must_use] pub fn usbpuwq(&mut self) -> USBPUWQ_W { USBPUWQ_W::new(self, 18) } diff --git a/src/scu_power/pwrmon.rs b/src/scu_power/pwrmon.rs index 116c6e8a..724d1cea 100644 --- a/src/scu_power/pwrmon.rs +++ b/src/scu_power/pwrmon.rs @@ -34,19 +34,16 @@ impl R { impl W { #[doc = "Bits 0:7 - Threshold"] #[inline(always)] - #[must_use] pub fn thrs(&mut self) -> THRS_W { THRS_W::new(self, 0) } #[doc = "Bits 8:15 - Interval"] #[inline(always)] - #[must_use] pub fn intv(&mut self) -> INTV_W { INTV_W::new(self, 8) } #[doc = "Bit 16 - Enable"] #[inline(always)] - #[must_use] pub fn enb(&mut self) -> ENB_W { ENB_W::new(self, 16) } diff --git a/src/scu_power/pwrset.rs b/src/scu_power/pwrset.rs index ff0a1772..39dc08cb 100644 --- a/src/scu_power/pwrset.rs +++ b/src/scu_power/pwrset.rs @@ -127,25 +127,21 @@ where impl W { #[doc = "Bit 0 - Set Hibernate Domain Enable"] #[inline(always)] - #[must_use] pub fn hib(&mut self) -> HIB_W { HIB_W::new(self, 0) } #[doc = "Bit 16 - Set USB PHY Transceiver Disable"] #[inline(always)] - #[must_use] pub fn usbphypdq(&mut self) -> USBPHYPDQ_W { USBPHYPDQ_W::new(self, 16) } #[doc = "Bit 17 - Set USB On-The-Go Comparators Enable"] #[inline(always)] - #[must_use] pub fn usbotgen(&mut self) -> USBOTGEN_W { USBOTGEN_W::new(self, 17) } #[doc = "Bit 18 - Set USB Weak Pull-Up at PADN Enable"] #[inline(always)] - #[must_use] pub fn usbpuwq(&mut self) -> USBPUWQ_W { USBPUWQ_W::new(self, 18) } diff --git a/src/scu_reset/prclr0.rs b/src/scu_reset/prclr0.rs index 107f1a6b..d3b42e99 100644 --- a/src/scu_reset/prclr0.rs +++ b/src/scu_reset/prclr0.rs @@ -344,67 +344,56 @@ where impl W { #[doc = "Bit 0 - VADC Reset Clear"] #[inline(always)] - #[must_use] pub fn vadcrs(&mut self) -> VADCRS_W { VADCRS_W::new(self, 0) } #[doc = "Bit 1 - DSD Reset Clear"] #[inline(always)] - #[must_use] pub fn dsdrs(&mut self) -> DSDRS_W { DSDRS_W::new(self, 1) } #[doc = "Bit 2 - CCU40 Reset Clear"] #[inline(always)] - #[must_use] pub fn ccu40rs(&mut self) -> CCU40RS_W { CCU40RS_W::new(self, 2) } #[doc = "Bit 3 - CCU41 Reset Clear"] #[inline(always)] - #[must_use] pub fn ccu41rs(&mut self) -> CCU41RS_W { CCU41RS_W::new(self, 3) } #[doc = "Bit 4 - CCU42 Reset Clear"] #[inline(always)] - #[must_use] pub fn ccu42rs(&mut self) -> CCU42RS_W { CCU42RS_W::new(self, 4) } #[doc = "Bit 7 - CCU80 Reset Clear"] #[inline(always)] - #[must_use] pub fn ccu80rs(&mut self) -> CCU80RS_W { CCU80RS_W::new(self, 7) } #[doc = "Bit 8 - CCU81 Reset Clear"] #[inline(always)] - #[must_use] pub fn ccu81rs(&mut self) -> CCU81RS_W { CCU81RS_W::new(self, 8) } #[doc = "Bit 9 - POSIF0 Reset Clear"] #[inline(always)] - #[must_use] pub fn posif0rs(&mut self) -> POSIF0RS_W { POSIF0RS_W::new(self, 9) } #[doc = "Bit 10 - POSIF1 Reset Clear"] #[inline(always)] - #[must_use] pub fn posif1rs(&mut self) -> POSIF1RS_W { POSIF1RS_W::new(self, 10) } #[doc = "Bit 11 - USIC0 Reset Clear"] #[inline(always)] - #[must_use] pub fn usic0rs(&mut self) -> USIC0RS_W { USIC0RS_W::new(self, 11) } #[doc = "Bit 16 - ERU1 Reset Clear"] #[inline(always)] - #[must_use] pub fn eru1rs(&mut self) -> ERU1RS_W { ERU1RS_W::new(self, 16) } diff --git a/src/scu_reset/prclr1.rs b/src/scu_reset/prclr1.rs index 3cd05bf9..14f8e735 100644 --- a/src/scu_reset/prclr1.rs +++ b/src/scu_reset/prclr1.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - CCU43 Reset Clear"] #[inline(always)] - #[must_use] pub fn ccu43rs(&mut self) -> CCU43RS_W { CCU43RS_W::new(self, 0) } #[doc = "Bit 3 - LEDTS Reset Clear"] #[inline(always)] - #[must_use] pub fn ledtscu0rs(&mut self) -> LEDTSCU0RS_W { LEDTSCU0RS_W::new(self, 3) } #[doc = "Bit 4 - MultiCAN Reset Clear"] #[inline(always)] - #[must_use] pub fn mcan0rs(&mut self) -> MCAN0RS_W { MCAN0RS_W::new(self, 4) } #[doc = "Bit 5 - DAC Reset Clear"] #[inline(always)] - #[must_use] pub fn dacrs(&mut self) -> DACRS_W { DACRS_W::new(self, 5) } #[doc = "Bit 6 - MMC Interface Reset Clear"] #[inline(always)] - #[must_use] pub fn mmcirs(&mut self) -> MMCIRS_W { MMCIRS_W::new(self, 6) } #[doc = "Bit 7 - USIC1 Reset Clear"] #[inline(always)] - #[must_use] pub fn usic1rs(&mut self) -> USIC1RS_W { USIC1RS_W::new(self, 7) } #[doc = "Bit 8 - USIC2 Reset Clear"] #[inline(always)] - #[must_use] pub fn usic2rs(&mut self) -> USIC2RS_W { USIC2RS_W::new(self, 8) } #[doc = "Bit 9 - PORTS Reset Clear"] #[inline(always)] - #[must_use] pub fn pportsrs(&mut self) -> PPORTSRS_W { PPORTSRS_W::new(self, 9) } diff --git a/src/scu_reset/prclr2.rs b/src/scu_reset/prclr2.rs index 0808f79f..088bcf7d 100644 --- a/src/scu_reset/prclr2.rs +++ b/src/scu_reset/prclr2.rs @@ -189,37 +189,31 @@ where impl W { #[doc = "Bit 1 - WDT Reset Clear"] #[inline(always)] - #[must_use] pub fn wdtrs(&mut self) -> WDTRS_W { WDTRS_W::new(self, 1) } #[doc = "Bit 2 - ETH0 Reset Clear"] #[inline(always)] - #[must_use] pub fn eth0rs(&mut self) -> ETH0RS_W { ETH0RS_W::new(self, 2) } #[doc = "Bit 4 - DMA0 Reset Clear"] #[inline(always)] - #[must_use] pub fn dma0rs(&mut self) -> DMA0RS_W { DMA0RS_W::new(self, 4) } #[doc = "Bit 5 - DMA1 Reset Clear"] #[inline(always)] - #[must_use] pub fn dma1rs(&mut self) -> DMA1RS_W { DMA1RS_W::new(self, 5) } #[doc = "Bit 6 - FCE Reset Clear"] #[inline(always)] - #[must_use] pub fn fcers(&mut self) -> FCERS_W { FCERS_W::new(self, 6) } #[doc = "Bit 7 - USB Reset Clear"] #[inline(always)] - #[must_use] pub fn usbrs(&mut self) -> USBRS_W { USBRS_W::new(self, 7) } diff --git a/src/scu_reset/prclr3.rs b/src/scu_reset/prclr3.rs index f72b9008..6e755dcf 100644 --- a/src/scu_reset/prclr3.rs +++ b/src/scu_reset/prclr3.rs @@ -34,7 +34,6 @@ where impl W { #[doc = "Bit 2 - EBU Reset Assert"] #[inline(always)] - #[must_use] pub fn eburs(&mut self) -> EBURS_W { EBURS_W::new(self, 2) } diff --git a/src/scu_reset/prset0.rs b/src/scu_reset/prset0.rs index e2f1abbd..b8e25b55 100644 --- a/src/scu_reset/prset0.rs +++ b/src/scu_reset/prset0.rs @@ -344,67 +344,56 @@ where impl W { #[doc = "Bit 0 - VADC Reset Assert"] #[inline(always)] - #[must_use] pub fn vadcrs(&mut self) -> VADCRS_W { VADCRS_W::new(self, 0) } #[doc = "Bit 1 - DSD Reset Assert"] #[inline(always)] - #[must_use] pub fn dsdrs(&mut self) -> DSDRS_W { DSDRS_W::new(self, 1) } #[doc = "Bit 2 - CCU40 Reset Assert"] #[inline(always)] - #[must_use] pub fn ccu40rs(&mut self) -> CCU40RS_W { CCU40RS_W::new(self, 2) } #[doc = "Bit 3 - CCU41 Reset Assert"] #[inline(always)] - #[must_use] pub fn ccu41rs(&mut self) -> CCU41RS_W { CCU41RS_W::new(self, 3) } #[doc = "Bit 4 - CCU42 Reset Assert"] #[inline(always)] - #[must_use] pub fn ccu42rs(&mut self) -> CCU42RS_W { CCU42RS_W::new(self, 4) } #[doc = "Bit 7 - CCU80 Reset Assert"] #[inline(always)] - #[must_use] pub fn ccu80rs(&mut self) -> CCU80RS_W { CCU80RS_W::new(self, 7) } #[doc = "Bit 8 - CCU81 Reset Assert"] #[inline(always)] - #[must_use] pub fn ccu81rs(&mut self) -> CCU81RS_W { CCU81RS_W::new(self, 8) } #[doc = "Bit 9 - POSIF0 Reset Assert"] #[inline(always)] - #[must_use] pub fn posif0rs(&mut self) -> POSIF0RS_W { POSIF0RS_W::new(self, 9) } #[doc = "Bit 10 - POSIF1 Reset Assert"] #[inline(always)] - #[must_use] pub fn posif1rs(&mut self) -> POSIF1RS_W { POSIF1RS_W::new(self, 10) } #[doc = "Bit 11 - USIC0 Reset Assert"] #[inline(always)] - #[must_use] pub fn usic0rs(&mut self) -> USIC0RS_W { USIC0RS_W::new(self, 11) } #[doc = "Bit 16 - ERU1 Reset Assert"] #[inline(always)] - #[must_use] pub fn eru1rs(&mut self) -> ERU1RS_W { ERU1RS_W::new(self, 16) } diff --git a/src/scu_reset/prset1.rs b/src/scu_reset/prset1.rs index 76c3e03a..c43d7f09 100644 --- a/src/scu_reset/prset1.rs +++ b/src/scu_reset/prset1.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - CCU43 Reset Assert"] #[inline(always)] - #[must_use] pub fn ccu43rs(&mut self) -> CCU43RS_W { CCU43RS_W::new(self, 0) } #[doc = "Bit 3 - LEDTS Reset Assert"] #[inline(always)] - #[must_use] pub fn ledtscu0rs(&mut self) -> LEDTSCU0RS_W { LEDTSCU0RS_W::new(self, 3) } #[doc = "Bit 4 - MultiCAN Reset Assert"] #[inline(always)] - #[must_use] pub fn mcan0rs(&mut self) -> MCAN0RS_W { MCAN0RS_W::new(self, 4) } #[doc = "Bit 5 - DAC Reset Assert"] #[inline(always)] - #[must_use] pub fn dacrs(&mut self) -> DACRS_W { DACRS_W::new(self, 5) } #[doc = "Bit 6 - MMC Interface Reset Assert"] #[inline(always)] - #[must_use] pub fn mmcirs(&mut self) -> MMCIRS_W { MMCIRS_W::new(self, 6) } #[doc = "Bit 7 - USIC1 Reset Assert"] #[inline(always)] - #[must_use] pub fn usic1rs(&mut self) -> USIC1RS_W { USIC1RS_W::new(self, 7) } #[doc = "Bit 8 - USIC2 Reset Assert"] #[inline(always)] - #[must_use] pub fn usic2rs(&mut self) -> USIC2RS_W { USIC2RS_W::new(self, 8) } #[doc = "Bit 9 - PORTS Reset Assert"] #[inline(always)] - #[must_use] pub fn pportsrs(&mut self) -> PPORTSRS_W { PPORTSRS_W::new(self, 9) } diff --git a/src/scu_reset/prset2.rs b/src/scu_reset/prset2.rs index 81aedfd7..a77aff2e 100644 --- a/src/scu_reset/prset2.rs +++ b/src/scu_reset/prset2.rs @@ -189,37 +189,31 @@ where impl W { #[doc = "Bit 1 - WDT Reset Assert"] #[inline(always)] - #[must_use] pub fn wdtrs(&mut self) -> WDTRS_W { WDTRS_W::new(self, 1) } #[doc = "Bit 2 - ETH0 Reset Assert"] #[inline(always)] - #[must_use] pub fn eth0rs(&mut self) -> ETH0RS_W { ETH0RS_W::new(self, 2) } #[doc = "Bit 4 - DMA0 Reset Assert"] #[inline(always)] - #[must_use] pub fn dma0rs(&mut self) -> DMA0RS_W { DMA0RS_W::new(self, 4) } #[doc = "Bit 5 - DMA1 Reset Assert"] #[inline(always)] - #[must_use] pub fn dma1rs(&mut self) -> DMA1RS_W { DMA1RS_W::new(self, 5) } #[doc = "Bit 6 - FCE Reset Assert"] #[inline(always)] - #[must_use] pub fn fcers(&mut self) -> FCERS_W { FCERS_W::new(self, 6) } #[doc = "Bit 7 - USB Reset Assert"] #[inline(always)] - #[must_use] pub fn usbrs(&mut self) -> USBRS_W { USBRS_W::new(self, 7) } diff --git a/src/scu_reset/prset3.rs b/src/scu_reset/prset3.rs index bef8adc0..08caa2e4 100644 --- a/src/scu_reset/prset3.rs +++ b/src/scu_reset/prset3.rs @@ -34,7 +34,6 @@ where impl W { #[doc = "Bit 2 - EBU Reset Assert"] #[inline(always)] - #[must_use] pub fn eburs(&mut self) -> EBURS_W { EBURS_W::new(self, 2) } diff --git a/src/scu_reset/rstclr.rs b/src/scu_reset/rstclr.rs index 0175d07c..fd23e612 100644 --- a/src/scu_reset/rstclr.rs +++ b/src/scu_reset/rstclr.rs @@ -127,25 +127,21 @@ where impl W { #[doc = "Bit 0 - Clear Reset Status"] #[inline(always)] - #[must_use] pub fn rsclr(&mut self) -> RSCLR_W { RSCLR_W::new(self, 0) } #[doc = "Bit 8 - Clear Hibernate Wake-up Reset Status"] #[inline(always)] - #[must_use] pub fn hibwk(&mut self) -> HIBWK_W { HIBWK_W::new(self, 8) } #[doc = "Bit 9 - Clear Hibernate Reset"] #[inline(always)] - #[must_use] pub fn hibrs(&mut self) -> HIBRS_W { HIBRS_W::new(self, 9) } #[doc = "Bit 10 - Enable Lockup Reset"] #[inline(always)] - #[must_use] pub fn lcken(&mut self) -> LCKEN_W { LCKEN_W::new(self, 10) } diff --git a/src/scu_reset/rstset.rs b/src/scu_reset/rstset.rs index 9af87b8a..6be7299e 100644 --- a/src/scu_reset/rstset.rs +++ b/src/scu_reset/rstset.rs @@ -96,19 +96,16 @@ where impl W { #[doc = "Bit 8 - Set Hibernate Wake-up Reset Status"] #[inline(always)] - #[must_use] pub fn hibwk(&mut self) -> HIBWK_W { HIBWK_W::new(self, 8) } #[doc = "Bit 9 - Set Hibernate Reset"] #[inline(always)] - #[must_use] pub fn hibrs(&mut self) -> HIBRS_W { HIBRS_W::new(self, 9) } #[doc = "Bit 10 - Enable Lockup Reset"] #[inline(always)] - #[must_use] pub fn lcken(&mut self) -> LCKEN_W { LCKEN_W::new(self, 10) } diff --git a/src/scu_trap/trapclr.rs b/src/scu_trap/trapclr.rs index 45e97f9f..cb7b4ac3 100644 --- a/src/scu_trap/trapclr.rs +++ b/src/scu_trap/trapclr.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - OSC_HP Oscillator Watchdog Trap Clear"] #[inline(always)] - #[must_use] pub fn soscwdgt(&mut self) -> SOSCWDGT_W { SOSCWDGT_W::new(self, 0) } #[doc = "Bit 2 - System VCO Lock Trap Clear"] #[inline(always)] - #[must_use] pub fn svcolckt(&mut self) -> SVCOLCKT_W { SVCOLCKT_W::new(self, 2) } #[doc = "Bit 3 - USB VCO Lock Trap Clear"] #[inline(always)] - #[must_use] pub fn uvcolckt(&mut self) -> UVCOLCKT_W { UVCOLCKT_W::new(self, 3) } #[doc = "Bit 4 - Parity Error Trap Clear"] #[inline(always)] - #[must_use] pub fn pet(&mut self) -> PET_W { PET_W::new(self, 4) } #[doc = "Bit 5 - Brown Out Trap Clear"] #[inline(always)] - #[must_use] pub fn brwnt(&mut self) -> BRWNT_W { BRWNT_W::new(self, 5) } #[doc = "Bit 6 - OSC_ULP Oscillator Watchdog Trap Clear"] #[inline(always)] - #[must_use] pub fn ulpwdgt(&mut self) -> ULPWDGT_W { ULPWDGT_W::new(self, 6) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Clear"] #[inline(always)] - #[must_use] pub fn bwerr0t(&mut self) -> BWERR0T_W { BWERR0T_W::new(self, 7) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Clear"] #[inline(always)] - #[must_use] pub fn bwerr1t(&mut self) -> BWERR1T_W { BWERR1T_W::new(self, 8) } diff --git a/src/scu_trap/trapdis.rs b/src/scu_trap/trapdis.rs index 6d53f7a1..25d38fa8 100644 --- a/src/scu_trap/trapdis.rs +++ b/src/scu_trap/trapdis.rs @@ -471,49 +471,41 @@ impl R { impl W { #[doc = "Bit 0 - OSC_HP Oscillator Watchdog Trap Disable"] #[inline(always)] - #[must_use] pub fn soscwdgt(&mut self) -> SOSCWDGT_W { SOSCWDGT_W::new(self, 0) } #[doc = "Bit 2 - System VCO Lock Trap Disable"] #[inline(always)] - #[must_use] pub fn svcolckt(&mut self) -> SVCOLCKT_W { SVCOLCKT_W::new(self, 2) } #[doc = "Bit 3 - USB VCO Lock Trap Disable"] #[inline(always)] - #[must_use] pub fn uvcolckt(&mut self) -> UVCOLCKT_W { UVCOLCKT_W::new(self, 3) } #[doc = "Bit 4 - Parity Error Trap Disable"] #[inline(always)] - #[must_use] pub fn pet(&mut self) -> PET_W { PET_W::new(self, 4) } #[doc = "Bit 5 - Brown Out Trap Disable"] #[inline(always)] - #[must_use] pub fn brwnt(&mut self) -> BRWNT_W { BRWNT_W::new(self, 5) } #[doc = "Bit 6 - OSC_ULP Oscillator Watchdog Trap Disable"] #[inline(always)] - #[must_use] pub fn ulpwdgt(&mut self) -> ULPWDGT_W { ULPWDGT_W::new(self, 6) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Disable"] #[inline(always)] - #[must_use] pub fn bwerr0t(&mut self) -> BWERR0T_W { BWERR0T_W::new(self, 7) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Disable"] #[inline(always)] - #[must_use] pub fn bwerr1t(&mut self) -> BWERR1T_W { BWERR1T_W::new(self, 8) } diff --git a/src/scu_trap/trapset.rs b/src/scu_trap/trapset.rs index 77da632b..8b996427 100644 --- a/src/scu_trap/trapset.rs +++ b/src/scu_trap/trapset.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - OSC_HP Oscillator Watchdog Trap Set"] #[inline(always)] - #[must_use] pub fn soscwdgt(&mut self) -> SOSCWDGT_W { SOSCWDGT_W::new(self, 0) } #[doc = "Bit 2 - System VCO Lock Trap Set"] #[inline(always)] - #[must_use] pub fn svcolckt(&mut self) -> SVCOLCKT_W { SVCOLCKT_W::new(self, 2) } #[doc = "Bit 3 - USB VCO Lock Trap Set"] #[inline(always)] - #[must_use] pub fn uvcolckt(&mut self) -> UVCOLCKT_W { UVCOLCKT_W::new(self, 3) } #[doc = "Bit 4 - Parity Error Trap Set"] #[inline(always)] - #[must_use] pub fn pet(&mut self) -> PET_W { PET_W::new(self, 4) } #[doc = "Bit 5 - Brown Out Trap Set"] #[inline(always)] - #[must_use] pub fn brwnt(&mut self) -> BRWNT_W { BRWNT_W::new(self, 5) } #[doc = "Bit 6 - OSC_ULP Oscillator Watchdog Trap Set"] #[inline(always)] - #[must_use] pub fn ulpwdt(&mut self) -> ULPWDT_W { ULPWDT_W::new(self, 6) } #[doc = "Bit 7 - Peripheral Bridge 0 Trap Set"] #[inline(always)] - #[must_use] pub fn bwerr0t(&mut self) -> BWERR0T_W { BWERR0T_W::new(self, 7) } #[doc = "Bit 8 - Peripheral Bridge 1 Trap Set"] #[inline(always)] - #[must_use] pub fn bwerr1t(&mut self) -> BWERR1T_W { BWERR1T_W::new(self, 8) } diff --git a/src/sdmmc/argument1.rs b/src/sdmmc/argument1.rs index cf9bde29..f8205e30 100644 --- a/src/sdmmc/argument1.rs +++ b/src/sdmmc/argument1.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Command Argument"] #[inline(always)] - #[must_use] pub fn argument1(&mut self) -> ARGUMENT1_W { ARGUMENT1_W::new(self, 0) } diff --git a/src/sdmmc/block_count.rs b/src/sdmmc/block_count.rs index 3ba69bf9..c2e368df 100644 --- a/src/sdmmc/block_count.rs +++ b/src/sdmmc/block_count.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Blocks Count for Current Transfer"] #[inline(always)] - #[must_use] pub fn block_count(&mut self) -> BLOCK_COUNT_W { BLOCK_COUNT_W::new(self, 0) } diff --git a/src/sdmmc/block_gap_ctrl.rs b/src/sdmmc/block_gap_ctrl.rs index 2fdb6d76..209f4877 100644 --- a/src/sdmmc/block_gap_ctrl.rs +++ b/src/sdmmc/block_gap_ctrl.rs @@ -190,25 +190,21 @@ impl R { impl W { #[doc = "Bit 0 - Stop At Block Gap Request"] #[inline(always)] - #[must_use] pub fn stop_at_block_gap(&mut self) -> STOP_AT_BLOCK_GAP_W { STOP_AT_BLOCK_GAP_W::new(self, 0) } #[doc = "Bit 1 - Continue Request"] #[inline(always)] - #[must_use] pub fn continue_req(&mut self) -> CONTINUE_REQ_W { CONTINUE_REQ_W::new(self, 1) } #[doc = "Bit 2 - Read Wait Control"] #[inline(always)] - #[must_use] pub fn read_wait_ctrl(&mut self) -> READ_WAIT_CTRL_W { READ_WAIT_CTRL_W::new(self, 2) } #[doc = "Bit 3 - Interrupt At Block Gap"] #[inline(always)] - #[must_use] pub fn int_at_block_gap(&mut self) -> INT_AT_BLOCK_GAP_W { INT_AT_BLOCK_GAP_W::new(self, 3) } diff --git a/src/sdmmc/block_size.rs b/src/sdmmc/block_size.rs index a898d025..e2befd1c 100644 --- a/src/sdmmc/block_size.rs +++ b/src/sdmmc/block_size.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:11 - Transfer Block Size"] #[inline(always)] - #[must_use] pub fn tx_block_size(&mut self) -> TX_BLOCK_SIZE_W { TX_BLOCK_SIZE_W::new(self, 0) } #[doc = "Bit 15 - Transfer Block Size 12th bit."] #[inline(always)] - #[must_use] pub fn tx_block_size_12(&mut self) -> TX_BLOCK_SIZE_12_W { TX_BLOCK_SIZE_12_W::new(self, 15) } diff --git a/src/sdmmc/clock_ctrl.rs b/src/sdmmc/clock_ctrl.rs index 3ef620d8..beccbad8 100644 --- a/src/sdmmc/clock_ctrl.rs +++ b/src/sdmmc/clock_ctrl.rs @@ -320,19 +320,16 @@ impl R { impl W { #[doc = "Bit 0 - Internal Clock Enable"] #[inline(always)] - #[must_use] pub fn internal_clock_en(&mut self) -> INTERNAL_CLOCK_EN_W { INTERNAL_CLOCK_EN_W::new(self, 0) } #[doc = "Bit 2 - SD Clock Enable"] #[inline(always)] - #[must_use] pub fn sdclock_en(&mut self) -> SDCLOCK_EN_W { SDCLOCK_EN_W::new(self, 2) } #[doc = "Bits 8:15 - SDCLK Frequency Select"] #[inline(always)] - #[must_use] pub fn sdclk_freq_sel(&mut self) -> SDCLK_FREQ_SEL_W { SDCLK_FREQ_SEL_W::new(self, 8) } diff --git a/src/sdmmc/command.rs b/src/sdmmc/command.rs index f4e1911f..07d5abe4 100644 --- a/src/sdmmc/command.rs +++ b/src/sdmmc/command.rs @@ -372,37 +372,31 @@ impl R { impl W { #[doc = "Bits 0:1 - Response Type Select"] #[inline(always)] - #[must_use] pub fn resp_type_select(&mut self) -> RESP_TYPE_SELECT_W { RESP_TYPE_SELECT_W::new(self, 0) } #[doc = "Bit 3 - Command CRC Check Enable"] #[inline(always)] - #[must_use] pub fn cmd_crc_check_en(&mut self) -> CMD_CRC_CHECK_EN_W { CMD_CRC_CHECK_EN_W::new(self, 3) } #[doc = "Bit 4 - Command Index Check Enable"] #[inline(always)] - #[must_use] pub fn cmd_ind_check_en(&mut self) -> CMD_IND_CHECK_EN_W { CMD_IND_CHECK_EN_W::new(self, 4) } #[doc = "Bit 5 - Data Present Select"] #[inline(always)] - #[must_use] pub fn data_present_select(&mut self) -> DATA_PRESENT_SELECT_W { DATA_PRESENT_SELECT_W::new(self, 5) } #[doc = "Bits 6:7 - Command Type"] #[inline(always)] - #[must_use] pub fn cmd_type(&mut self) -> CMD_TYPE_W { CMD_TYPE_W::new(self, 6) } #[doc = "Bits 8:13 - Command Index"] #[inline(always)] - #[must_use] pub fn cmd_ind(&mut self) -> CMD_IND_W { CMD_IND_W::new(self, 8) } diff --git a/src/sdmmc/data_buffer.rs b/src/sdmmc/data_buffer.rs index fee60976..9036ec3c 100644 --- a/src/sdmmc/data_buffer.rs +++ b/src/sdmmc/data_buffer.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Data Buffer"] #[inline(always)] - #[must_use] pub fn data_buffer(&mut self) -> DATA_BUFFER_W { DATA_BUFFER_W::new(self, 0) } diff --git a/src/sdmmc/debug_sel.rs b/src/sdmmc/debug_sel.rs index f8810ced..65d88f5c 100644 --- a/src/sdmmc/debug_sel.rs +++ b/src/sdmmc/debug_sel.rs @@ -34,7 +34,6 @@ where impl W { #[doc = "Bit 0 - Debug_sel"] #[inline(always)] - #[must_use] pub fn debug_sel(&mut self) -> DEBUG_SEL_W { DEBUG_SEL_W::new(self, 0) } diff --git a/src/sdmmc/en_int_signal_err.rs b/src/sdmmc/en_int_signal_err.rs index f4389033..08b370c9 100644 --- a/src/sdmmc/en_int_signal_err.rs +++ b/src/sdmmc/en_int_signal_err.rs @@ -645,67 +645,56 @@ impl R { impl W { #[doc = "Bit 0 - Command Timeout Error Signal Enable"] #[inline(always)] - #[must_use] pub fn cmd_timeout_err_en(&mut self) -> CMD_TIMEOUT_ERR_EN_W { CMD_TIMEOUT_ERR_EN_W::new(self, 0) } #[doc = "Bit 1 - Command CRC Error Signal Enable"] #[inline(always)] - #[must_use] pub fn cmd_crc_err_en(&mut self) -> CMD_CRC_ERR_EN_W { CMD_CRC_ERR_EN_W::new(self, 1) } #[doc = "Bit 2 - Command End Bit Error Signal Enable"] #[inline(always)] - #[must_use] pub fn cmd_end_bit_err_en(&mut self) -> CMD_END_BIT_ERR_EN_W { CMD_END_BIT_ERR_EN_W::new(self, 2) } #[doc = "Bit 3 - Command Index Error Signal Enable"] #[inline(always)] - #[must_use] pub fn cmd_ind_err_en(&mut self) -> CMD_IND_ERR_EN_W { CMD_IND_ERR_EN_W::new(self, 3) } #[doc = "Bit 4 - Data Timeout Error Signal Enable"] #[inline(always)] - #[must_use] pub fn data_timeout_err_en(&mut self) -> DATA_TIMEOUT_ERR_EN_W { DATA_TIMEOUT_ERR_EN_W::new(self, 4) } #[doc = "Bit 5 - Data CRC Error Signal Enable"] #[inline(always)] - #[must_use] pub fn data_crc_err_en(&mut self) -> DATA_CRC_ERR_EN_W { DATA_CRC_ERR_EN_W::new(self, 5) } #[doc = "Bit 6 - Data End Bit Error Signal Enable"] #[inline(always)] - #[must_use] pub fn data_end_bit_err_en(&mut self) -> DATA_END_BIT_ERR_EN_W { DATA_END_BIT_ERR_EN_W::new(self, 6) } #[doc = "Bit 7 - Current Limit Error Signal Enable"] #[inline(always)] - #[must_use] pub fn current_limit_err_en(&mut self) -> CURRENT_LIMIT_ERR_EN_W { CURRENT_LIMIT_ERR_EN_W::new(self, 7) } #[doc = "Bit 8 - Auto CMD12 Error Signal Enable"] #[inline(always)] - #[must_use] pub fn acmd_err_en(&mut self) -> ACMD_ERR_EN_W { ACMD_ERR_EN_W::new(self, 8) } #[doc = "Bit 12 - Target Response Error Signal Enable"] #[inline(always)] - #[must_use] pub fn target_resp_err_en(&mut self) -> TARGET_RESP_ERR_EN_W { TARGET_RESP_ERR_EN_W::new(self, 12) } #[doc = "Bit 13 - Ceata Error Signal Enable"] #[inline(always)] - #[must_use] pub fn ceata_err_en(&mut self) -> CEATA_ERR_EN_W { CEATA_ERR_EN_W::new(self, 13) } diff --git a/src/sdmmc/en_int_signal_norm.rs b/src/sdmmc/en_int_signal_norm.rs index 3c9c1a97..c639b8f4 100644 --- a/src/sdmmc/en_int_signal_norm.rs +++ b/src/sdmmc/en_int_signal_norm.rs @@ -478,49 +478,41 @@ impl R { impl W { #[doc = "Bit 0 - Command Complete Signal Enable"] #[inline(always)] - #[must_use] pub fn cmd_complete_en(&mut self) -> CMD_COMPLETE_EN_W { CMD_COMPLETE_EN_W::new(self, 0) } #[doc = "Bit 1 - Transfer Complete Signal Enable"] #[inline(always)] - #[must_use] pub fn tx_complete_en(&mut self) -> TX_COMPLETE_EN_W { TX_COMPLETE_EN_W::new(self, 1) } #[doc = "Bit 2 - Block Gap Event Signal Enable"] #[inline(always)] - #[must_use] pub fn block_gap_event_en(&mut self) -> BLOCK_GAP_EVENT_EN_W { BLOCK_GAP_EVENT_EN_W::new(self, 2) } #[doc = "Bit 4 - Buffer Write Ready Signal Enable"] #[inline(always)] - #[must_use] pub fn buff_write_ready_en(&mut self) -> BUFF_WRITE_READY_EN_W { BUFF_WRITE_READY_EN_W::new(self, 4) } #[doc = "Bit 5 - Buffer Read Ready Signal Enable"] #[inline(always)] - #[must_use] pub fn buff_read_ready_en(&mut self) -> BUFF_READ_READY_EN_W { BUFF_READ_READY_EN_W::new(self, 5) } #[doc = "Bit 6 - Card Insertion Signal Enable"] #[inline(always)] - #[must_use] pub fn card_ins_en(&mut self) -> CARD_INS_EN_W { CARD_INS_EN_W::new(self, 6) } #[doc = "Bit 7 - Card Removal Signal Enable"] #[inline(always)] - #[must_use] pub fn card_removal_en(&mut self) -> CARD_REMOVAL_EN_W { CARD_REMOVAL_EN_W::new(self, 7) } #[doc = "Bit 8 - Card Interrupt Signal Enable"] #[inline(always)] - #[must_use] pub fn card_int_en(&mut self) -> CARD_INT_EN_W { CARD_INT_EN_W::new(self, 8) } diff --git a/src/sdmmc/en_int_status_err.rs b/src/sdmmc/en_int_status_err.rs index ab2495ec..463cd08a 100644 --- a/src/sdmmc/en_int_status_err.rs +++ b/src/sdmmc/en_int_status_err.rs @@ -645,67 +645,56 @@ impl R { impl W { #[doc = "Bit 0 - Command Timeout Error Status Enable"] #[inline(always)] - #[must_use] pub fn cmd_timeout_err_en(&mut self) -> CMD_TIMEOUT_ERR_EN_W { CMD_TIMEOUT_ERR_EN_W::new(self, 0) } #[doc = "Bit 1 - Command CRC Error Status Enable"] #[inline(always)] - #[must_use] pub fn cmd_crc_err_en(&mut self) -> CMD_CRC_ERR_EN_W { CMD_CRC_ERR_EN_W::new(self, 1) } #[doc = "Bit 2 - Command End Bit Error Status Enable"] #[inline(always)] - #[must_use] pub fn cmd_end_bit_err_en(&mut self) -> CMD_END_BIT_ERR_EN_W { CMD_END_BIT_ERR_EN_W::new(self, 2) } #[doc = "Bit 3 - Command Index Error Status Enable"] #[inline(always)] - #[must_use] pub fn cmd_ind_err_en(&mut self) -> CMD_IND_ERR_EN_W { CMD_IND_ERR_EN_W::new(self, 3) } #[doc = "Bit 4 - Data Timeout Error Status Enable"] #[inline(always)] - #[must_use] pub fn data_timeout_err_en(&mut self) -> DATA_TIMEOUT_ERR_EN_W { DATA_TIMEOUT_ERR_EN_W::new(self, 4) } #[doc = "Bit 5 - Data CRC Error Status Enable"] #[inline(always)] - #[must_use] pub fn data_crc_err_en(&mut self) -> DATA_CRC_ERR_EN_W { DATA_CRC_ERR_EN_W::new(self, 5) } #[doc = "Bit 6 - Data End Bit Error Status Enable"] #[inline(always)] - #[must_use] pub fn data_end_bit_err_en(&mut self) -> DATA_END_BIT_ERR_EN_W { DATA_END_BIT_ERR_EN_W::new(self, 6) } #[doc = "Bit 7 - Current Limit Error Status Enable"] #[inline(always)] - #[must_use] pub fn current_limit_err_en(&mut self) -> CURRENT_LIMIT_ERR_EN_W { CURRENT_LIMIT_ERR_EN_W::new(self, 7) } #[doc = "Bit 8 - Auto CMD12 Error Status Enable"] #[inline(always)] - #[must_use] pub fn acmd_err_en(&mut self) -> ACMD_ERR_EN_W { ACMD_ERR_EN_W::new(self, 8) } #[doc = "Bit 12 - Target Response Error Status Enable"] #[inline(always)] - #[must_use] pub fn target_resp_err_en(&mut self) -> TARGET_RESP_ERR_EN_W { TARGET_RESP_ERR_EN_W::new(self, 12) } #[doc = "Bit 13 - Ceata Error Status Enable"] #[inline(always)] - #[must_use] pub fn ceata_err_en(&mut self) -> CEATA_ERR_EN_W { CEATA_ERR_EN_W::new(self, 13) } diff --git a/src/sdmmc/en_int_status_norm.rs b/src/sdmmc/en_int_status_norm.rs index ec52a337..267a9ec2 100644 --- a/src/sdmmc/en_int_status_norm.rs +++ b/src/sdmmc/en_int_status_norm.rs @@ -478,49 +478,41 @@ impl R { impl W { #[doc = "Bit 0 - Command Complete Status Enable"] #[inline(always)] - #[must_use] pub fn cmd_complete_en(&mut self) -> CMD_COMPLETE_EN_W { CMD_COMPLETE_EN_W::new(self, 0) } #[doc = "Bit 1 - Transfer Complete Status Enable"] #[inline(always)] - #[must_use] pub fn tx_complete_en(&mut self) -> TX_COMPLETE_EN_W { TX_COMPLETE_EN_W::new(self, 1) } #[doc = "Bit 2 - Block Gap Event Status Enable"] #[inline(always)] - #[must_use] pub fn block_gap_event_en(&mut self) -> BLOCK_GAP_EVENT_EN_W { BLOCK_GAP_EVENT_EN_W::new(self, 2) } #[doc = "Bit 4 - Buffer Write Ready Status Enable"] #[inline(always)] - #[must_use] pub fn buff_write_ready_en(&mut self) -> BUFF_WRITE_READY_EN_W { BUFF_WRITE_READY_EN_W::new(self, 4) } #[doc = "Bit 5 - Buffer Read Ready Status Enable"] #[inline(always)] - #[must_use] pub fn buff_read_ready_en(&mut self) -> BUFF_READ_READY_EN_W { BUFF_READ_READY_EN_W::new(self, 5) } #[doc = "Bit 6 - Card Insertion Status Enable"] #[inline(always)] - #[must_use] pub fn card_ins_en(&mut self) -> CARD_INS_EN_W { CARD_INS_EN_W::new(self, 6) } #[doc = "Bit 7 - Card Removal Status Enable"] #[inline(always)] - #[must_use] pub fn card_removal_en(&mut self) -> CARD_REMOVAL_EN_W { CARD_REMOVAL_EN_W::new(self, 7) } #[doc = "Bit 8 - Card Interrupt Status Enable"] #[inline(always)] - #[must_use] pub fn card_int_en(&mut self) -> CARD_INT_EN_W { CARD_INT_EN_W::new(self, 8) } diff --git a/src/sdmmc/force_event_acmd_err_status.rs b/src/sdmmc/force_event_acmd_err_status.rs index f1d275d2..f644c458 100644 --- a/src/sdmmc/force_event_acmd_err_status.rs +++ b/src/sdmmc/force_event_acmd_err_status.rs @@ -189,37 +189,31 @@ where impl W { #[doc = "Bit 0 - Force Event for Auto CMD12 NOT Executed"] #[inline(always)] - #[must_use] pub fn fe_acmd_not_exec(&mut self) -> FE_ACMD_NOT_EXEC_W { FE_ACMD_NOT_EXEC_W::new(self, 0) } #[doc = "Bit 1 - Force Event for Auto CMD timeout Error"] #[inline(always)] - #[must_use] pub fn fe_acmd_timeout_err(&mut self) -> FE_ACMD_TIMEOUT_ERR_W { FE_ACMD_TIMEOUT_ERR_W::new(self, 1) } #[doc = "Bit 2 - Force Event for Auto CMD CRC Error"] #[inline(always)] - #[must_use] pub fn fe_acmd_crc_err(&mut self) -> FE_ACMD_CRC_ERR_W { FE_ACMD_CRC_ERR_W::new(self, 2) } #[doc = "Bit 3 - Force Event for Auto CMD End bit Error"] #[inline(always)] - #[must_use] pub fn fe_acmd_end_bit_err(&mut self) -> FE_ACMD_END_BIT_ERR_W { FE_ACMD_END_BIT_ERR_W::new(self, 3) } #[doc = "Bit 4 - Force Event for Auto CMD Index Error"] #[inline(always)] - #[must_use] pub fn fe_acmd_ind_err(&mut self) -> FE_ACMD_IND_ERR_W { FE_ACMD_IND_ERR_W::new(self, 4) } #[doc = "Bit 7 - Force Event for CMD not issued by Auto CMD12 Error"] #[inline(always)] - #[must_use] pub fn fe_cmd_not_issued_acmd12_err(&mut self) -> FE_CMD_NOT_ISSUED_ACMD12_ERR_W { FE_CMD_NOT_ISSUED_ACMD12_ERR_W::new(self, 7) } diff --git a/src/sdmmc/force_event_err_status.rs b/src/sdmmc/force_event_err_status.rs index ab024caa..85c64a1f 100644 --- a/src/sdmmc/force_event_err_status.rs +++ b/src/sdmmc/force_event_err_status.rs @@ -344,67 +344,56 @@ where impl W { #[doc = "Bit 0 - Force Event for Command Timeout Error"] #[inline(always)] - #[must_use] pub fn fe_cmd_timeout_err(&mut self) -> FE_CMD_TIMEOUT_ERR_W { FE_CMD_TIMEOUT_ERR_W::new(self, 0) } #[doc = "Bit 1 - Force Event for Command CRC Error"] #[inline(always)] - #[must_use] pub fn fe_cmd_crc_err(&mut self) -> FE_CMD_CRC_ERR_W { FE_CMD_CRC_ERR_W::new(self, 1) } #[doc = "Bit 2 - Force Event for Command End Bit Error"] #[inline(always)] - #[must_use] pub fn fe_cmd_end_bit_err(&mut self) -> FE_CMD_END_BIT_ERR_W { FE_CMD_END_BIT_ERR_W::new(self, 2) } #[doc = "Bit 3 - Force Event for Command Index Error"] #[inline(always)] - #[must_use] pub fn fe_cmd_ind_err(&mut self) -> FE_CMD_IND_ERR_W { FE_CMD_IND_ERR_W::new(self, 3) } #[doc = "Bit 4 - Force Event for Data Timeout Error"] #[inline(always)] - #[must_use] pub fn fe_data_timeout_err(&mut self) -> FE_DATA_TIMEOUT_ERR_W { FE_DATA_TIMEOUT_ERR_W::new(self, 4) } #[doc = "Bit 5 - Force Event for Data CRC Error"] #[inline(always)] - #[must_use] pub fn fe_data_crc_err(&mut self) -> FE_DATA_CRC_ERR_W { FE_DATA_CRC_ERR_W::new(self, 5) } #[doc = "Bit 6 - Force Event for Data End Bit Error"] #[inline(always)] - #[must_use] pub fn fe_data_end_bit_err(&mut self) -> FE_DATA_END_BIT_ERR_W { FE_DATA_END_BIT_ERR_W::new(self, 6) } #[doc = "Bit 7 - Force Event for Current Limit Error"] #[inline(always)] - #[must_use] pub fn fe_current_limit_err(&mut self) -> FE_CURRENT_LIMIT_ERR_W { FE_CURRENT_LIMIT_ERR_W::new(self, 7) } #[doc = "Bit 8 - Force Event for Auto CMD Error"] #[inline(always)] - #[must_use] pub fn fe_acmd12_err(&mut self) -> FE_ACMD12_ERR_W { FE_ACMD12_ERR_W::new(self, 8) } #[doc = "Bit 12 - Force event for Target Response Error"] #[inline(always)] - #[must_use] pub fn fe_target_response_err(&mut self) -> FE_TARGET_RESPONSE_ERR_W { FE_TARGET_RESPONSE_ERR_W::new(self, 12) } #[doc = "Bit 13 - Force Event for Ceata Error"] #[inline(always)] - #[must_use] pub fn fe_ceata_err(&mut self) -> FE_CEATA_ERR_W { FE_CEATA_ERR_W::new(self, 13) } diff --git a/src/sdmmc/host_ctrl.rs b/src/sdmmc/host_ctrl.rs index 570a3b77..c7a76f65 100644 --- a/src/sdmmc/host_ctrl.rs +++ b/src/sdmmc/host_ctrl.rs @@ -355,37 +355,31 @@ impl R { impl W { #[doc = "Bit 0 - LED Control"] #[inline(always)] - #[must_use] pub fn led_ctrl(&mut self) -> LED_CTRL_W { LED_CTRL_W::new(self, 0) } #[doc = "Bit 1 - Data Transfer Width (SD1 or SD4)"] #[inline(always)] - #[must_use] pub fn data_tx_width(&mut self) -> DATA_TX_WIDTH_W { DATA_TX_WIDTH_W::new(self, 1) } #[doc = "Bit 2 - High Speed Enable"] #[inline(always)] - #[must_use] pub fn high_speed_en(&mut self) -> HIGH_SPEED_EN_W { HIGH_SPEED_EN_W::new(self, 2) } #[doc = "Bit 5 - Extended Data Transfer Width"] #[inline(always)] - #[must_use] pub fn sd_8bit_mode(&mut self) -> SD_8BIT_MODE_W { SD_8BIT_MODE_W::new(self, 5) } #[doc = "Bit 6 - Card Detect Test Level"] #[inline(always)] - #[must_use] pub fn card_detect_test_level(&mut self) -> CARD_DETECT_TEST_LEVEL_W { CARD_DETECT_TEST_LEVEL_W::new(self, 6) } #[doc = "Bit 7 - Card detect signal detetction"] #[inline(always)] - #[must_use] pub fn card_det_signal_detect(&mut self) -> CARD_DET_SIGNAL_DETECT_W { CARD_DET_SIGNAL_DETECT_W::new(self, 7) } diff --git a/src/sdmmc/int_status_err.rs b/src/sdmmc/int_status_err.rs index bc9e7b05..5dea92b4 100644 --- a/src/sdmmc/int_status_err.rs +++ b/src/sdmmc/int_status_err.rs @@ -587,61 +587,51 @@ impl R { impl W { #[doc = "Bit 0 - Command Timeout Error"] #[inline(always)] - #[must_use] pub fn cmd_timeout_err(&mut self) -> CMD_TIMEOUT_ERR_W { CMD_TIMEOUT_ERR_W::new(self, 0) } #[doc = "Bit 1 - Command CRC Error"] #[inline(always)] - #[must_use] pub fn cmd_crc_err(&mut self) -> CMD_CRC_ERR_W { CMD_CRC_ERR_W::new(self, 1) } #[doc = "Bit 2 - Command End Bit Error"] #[inline(always)] - #[must_use] pub fn cmd_end_bit_err(&mut self) -> CMD_END_BIT_ERR_W { CMD_END_BIT_ERR_W::new(self, 2) } #[doc = "Bit 3 - Command Index Error"] #[inline(always)] - #[must_use] pub fn cmd_ind_err(&mut self) -> CMD_IND_ERR_W { CMD_IND_ERR_W::new(self, 3) } #[doc = "Bit 4 - Data Timeout Error"] #[inline(always)] - #[must_use] pub fn data_timeout_err(&mut self) -> DATA_TIMEOUT_ERR_W { DATA_TIMEOUT_ERR_W::new(self, 4) } #[doc = "Bit 5 - Data CRC Error"] #[inline(always)] - #[must_use] pub fn data_crc_err(&mut self) -> DATA_CRC_ERR_W { DATA_CRC_ERR_W::new(self, 5) } #[doc = "Bit 6 - Data End Bit Error"] #[inline(always)] - #[must_use] pub fn data_end_bit_err(&mut self) -> DATA_END_BIT_ERR_W { DATA_END_BIT_ERR_W::new(self, 6) } #[doc = "Bit 7 - Current Limit Error"] #[inline(always)] - #[must_use] pub fn current_limit_err(&mut self) -> CURRENT_LIMIT_ERR_W { CURRENT_LIMIT_ERR_W::new(self, 7) } #[doc = "Bit 8 - Auto CMD Error"] #[inline(always)] - #[must_use] pub fn acmd_err(&mut self) -> ACMD_ERR_W { ACMD_ERR_W::new(self, 8) } #[doc = "Bit 13 - Ceata Error Status"] #[inline(always)] - #[must_use] pub fn ceata_err(&mut self) -> CEATA_ERR_W { CEATA_ERR_W::new(self, 13) } diff --git a/src/sdmmc/int_status_norm.rs b/src/sdmmc/int_status_norm.rs index 07cb6683..2e08d837 100644 --- a/src/sdmmc/int_status_norm.rs +++ b/src/sdmmc/int_status_norm.rs @@ -495,43 +495,36 @@ impl R { impl W { #[doc = "Bit 0 - Command Complete"] #[inline(always)] - #[must_use] pub fn cmd_complete(&mut self) -> CMD_COMPLETE_W { CMD_COMPLETE_W::new(self, 0) } #[doc = "Bit 1 - Transfer Complete"] #[inline(always)] - #[must_use] pub fn tx_complete(&mut self) -> TX_COMPLETE_W { TX_COMPLETE_W::new(self, 1) } #[doc = "Bit 2 - Block Gap Event"] #[inline(always)] - #[must_use] pub fn block_gap_event(&mut self) -> BLOCK_GAP_EVENT_W { BLOCK_GAP_EVENT_W::new(self, 2) } #[doc = "Bit 4 - Buffer Write Ready"] #[inline(always)] - #[must_use] pub fn buff_write_ready(&mut self) -> BUFF_WRITE_READY_W { BUFF_WRITE_READY_W::new(self, 4) } #[doc = "Bit 5 - Buffer Read Ready"] #[inline(always)] - #[must_use] pub fn buff_read_ready(&mut self) -> BUFF_READ_READY_W { BUFF_READ_READY_W::new(self, 5) } #[doc = "Bit 6 - Card Insertion"] #[inline(always)] - #[must_use] pub fn card_ins(&mut self) -> CARD_INS_W { CARD_INS_W::new(self, 6) } #[doc = "Bit 7 - Card Removal"] #[inline(always)] - #[must_use] pub fn card_removal(&mut self) -> CARD_REMOVAL_W { CARD_REMOVAL_W::new(self, 7) } diff --git a/src/sdmmc/power_ctrl.rs b/src/sdmmc/power_ctrl.rs index 34711853..8d0d4839 100644 --- a/src/sdmmc/power_ctrl.rs +++ b/src/sdmmc/power_ctrl.rs @@ -126,19 +126,16 @@ impl R { impl W { #[doc = "Bit 0 - SD Bus Power"] #[inline(always)] - #[must_use] pub fn sd_bus_power(&mut self) -> SD_BUS_POWER_W { SD_BUS_POWER_W::new(self, 0) } #[doc = "Bits 1:3 - SD Bus Voltage Select"] #[inline(always)] - #[must_use] pub fn sd_bus_voltage_sel(&mut self) -> SD_BUS_VOLTAGE_SEL_W { SD_BUS_VOLTAGE_SEL_W::new(self, 1) } #[doc = "Bit 4 - Hardware reset"] #[inline(always)] - #[must_use] pub fn hardware_reset(&mut self) -> HARDWARE_RESET_W { HARDWARE_RESET_W::new(self, 4) } diff --git a/src/sdmmc/sw_reset.rs b/src/sdmmc/sw_reset.rs index b7b718e0..4d3b8e21 100644 --- a/src/sdmmc/sw_reset.rs +++ b/src/sdmmc/sw_reset.rs @@ -132,19 +132,16 @@ impl R { impl W { #[doc = "Bit 0 - Software Reset for All"] #[inline(always)] - #[must_use] pub fn sw_rst_all(&mut self) -> SW_RST_ALL_W { SW_RST_ALL_W::new(self, 0) } #[doc = "Bit 1 - Software Reset for CMD Line"] #[inline(always)] - #[must_use] pub fn sw_rst_cmd_line(&mut self) -> SW_RST_CMD_LINE_W { SW_RST_CMD_LINE_W::new(self, 1) } #[doc = "Bit 2 - Software Reset for DAT Line"] #[inline(always)] - #[must_use] pub fn sw_rst_dat_line(&mut self) -> SW_RST_DAT_LINE_W { SW_RST_DAT_LINE_W::new(self, 2) } diff --git a/src/sdmmc/timeout_ctrl.rs b/src/sdmmc/timeout_ctrl.rs index cfd623e8..add22a11 100644 --- a/src/sdmmc/timeout_ctrl.rs +++ b/src/sdmmc/timeout_ctrl.rs @@ -85,7 +85,6 @@ impl R { impl W { #[doc = "Bits 0:3 - Data Timeout Counter Value"] #[inline(always)] - #[must_use] pub fn dat_timeout_cnt_val(&mut self) -> DAT_TIMEOUT_CNT_VAL_W { DAT_TIMEOUT_CNT_VAL_W::new(self, 0) } diff --git a/src/sdmmc/transfer_mode.rs b/src/sdmmc/transfer_mode.rs index 87833f1b..015faa89 100644 --- a/src/sdmmc/transfer_mode.rs +++ b/src/sdmmc/transfer_mode.rs @@ -304,31 +304,26 @@ impl R { impl W { #[doc = "Bit 1 - Block Count Enable"] #[inline(always)] - #[must_use] pub fn block_count_en(&mut self) -> BLOCK_COUNT_EN_W { BLOCK_COUNT_EN_W::new(self, 1) } #[doc = "Bits 2:3 - Auto CMD Enable"] #[inline(always)] - #[must_use] pub fn acmd_en(&mut self) -> ACMD_EN_W { ACMD_EN_W::new(self, 2) } #[doc = "Bit 4 - Data Transfer Direction Select"] #[inline(always)] - #[must_use] pub fn tx_dir_select(&mut self) -> TX_DIR_SELECT_W { TX_DIR_SELECT_W::new(self, 4) } #[doc = "Bit 5 - Multi / Single Block Select"] #[inline(always)] - #[must_use] pub fn multi_block_select(&mut self) -> MULTI_BLOCK_SELECT_W { MULTI_BLOCK_SELECT_W::new(self, 5) } #[doc = "Bit 6 - Command Completion Signal Enable for CE-ATA Device"] #[inline(always)] - #[must_use] pub fn cmd_comp_ata(&mut self) -> CMD_COMP_ATA_W { CMD_COMP_ATA_W::new(self, 6) } diff --git a/src/sdmmc/wakeup_ctrl.rs b/src/sdmmc/wakeup_ctrl.rs index 99e655c3..b51db79f 100644 --- a/src/sdmmc/wakeup_ctrl.rs +++ b/src/sdmmc/wakeup_ctrl.rs @@ -181,19 +181,16 @@ impl R { impl W { #[doc = "Bit 0 - Wakeup Event Enable On Card Interrupt"] #[inline(always)] - #[must_use] pub fn wakeup_event_en_int(&mut self) -> WAKEUP_EVENT_EN_INT_W { WAKEUP_EVENT_EN_INT_W::new(self, 0) } #[doc = "Bit 1 - Wakeup Event Enable On SD Card Insertion"] #[inline(always)] - #[must_use] pub fn wakeup_event_en_ins(&mut self) -> WAKEUP_EVENT_EN_INS_W { WAKEUP_EVENT_EN_INS_W::new(self, 1) } #[doc = "Bit 2 - Wakeup Event Enable On SD Card Removal"] #[inline(always)] - #[must_use] pub fn wakeup_event_en_rem(&mut self) -> WAKEUP_EVENT_EN_REM_W { WAKEUP_EVENT_EN_REM_W::new(self, 2) } diff --git a/src/sdmmc_con/sdmmc_con.rs b/src/sdmmc_con/sdmmc_con.rs index 9c56ce96..62bc9b99 100644 --- a/src/sdmmc_con/sdmmc_con.rs +++ b/src/sdmmc_con/sdmmc_con.rs @@ -239,25 +239,21 @@ impl R { impl W { #[doc = "Bit 0 - SDMMC Write Protection Input Multiplexer Control"] #[inline(always)] - #[must_use] pub fn wpsel(&mut self) -> WPSEL_W { WPSEL_W::new(self, 0) } #[doc = "Bit 4 - SDMMC Write Protect Software Control"] #[inline(always)] - #[must_use] pub fn wpsval(&mut self) -> WPSVAL_W { WPSVAL_W::new(self, 4) } #[doc = "Bit 16 - SDMMC Card Detection Control"] #[inline(always)] - #[must_use] pub fn cdsel(&mut self) -> CDSEL_W { CDSEL_W::new(self, 16) } #[doc = "Bit 20 - SDMMC Write Protect Software Control"] #[inline(always)] - #[must_use] pub fn cdsval(&mut self) -> CDSVAL_W { CDSVAL_W::new(self, 20) } diff --git a/src/usb0.rs b/src/usb0.rs index 1e0234b4..2eb3b31f 100644 --- a/src/usb0.rs +++ b/src/usb0.rs @@ -82,42 +82,42 @@ impl RegisterBlock { #[doc = "0x14 - Interrupt Register \\[DEVICEMODE\\]"] #[inline(always)] pub const fn gintsts_devicemode(&self) -> &GINTSTS_DEVICEMODE { - unsafe { &*(self as *const Self).cast::().add(20).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(20).cast() } } #[doc = "0x14 - Interrupt Register \\[HOSTMODE\\]"] #[inline(always)] pub const fn gintsts_hostmode(&self) -> &GINTSTS_HOSTMODE { - unsafe { &*(self as *const Self).cast::().add(20).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(20).cast() } } #[doc = "0x18 - Interrupt Mask Register \\[DEVICEMODE\\]"] #[inline(always)] pub const fn gintmsk_devicemode(&self) -> &GINTMSK_DEVICEMODE { - unsafe { &*(self as *const Self).cast::().add(24).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(24).cast() } } #[doc = "0x18 - Interrupt Mask Register \\[HOSTMODE\\]"] #[inline(always)] pub const fn gintmsk_hostmode(&self) -> &GINTMSK_HOSTMODE { - unsafe { &*(self as *const Self).cast::().add(24).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(24).cast() } } #[doc = "0x1c - Receive Status Debug Read Register \\[DEVICEMODE\\]"] #[inline(always)] pub const fn grxstsr_devicemode(&self) -> &GRXSTSR_DEVICEMODE { - unsafe { &*(self as *const Self).cast::().add(28).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(28).cast() } } #[doc = "0x1c - Receive Status Debug Read Register \\[HOSTMODE\\]"] #[inline(always)] pub const fn grxstsr_hostmode(&self) -> &GRXSTSR_HOSTMODE { - unsafe { &*(self as *const Self).cast::().add(28).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(28).cast() } } #[doc = "0x20 - Receive Status Read and Pop Register \\[HOSTMODE\\]"] #[inline(always)] pub const fn grxstsp_hostmode(&self) -> &GRXSTSP_HOSTMODE { - unsafe { &*(self as *const Self).cast::().add(32).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(32).cast() } } #[doc = "0x20 - Receive Status Read and Pop Register \\[DEVICEMODE\\]"] #[inline(always)] pub const fn grxstsp_devicemode(&self) -> &GRXSTSP_DEVICEMODE { - unsafe { &*(self as *const Self).cast::().add(32).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(32).cast() } } #[doc = "0x24 - Receive FIFO Size Register"] #[inline(always)] @@ -127,12 +127,12 @@ impl RegisterBlock { #[doc = "0x28 - Non-Periodic Transmit FIFO Size Register \\[DEVICEMODE\\]"] #[inline(always)] pub const fn gnptxfsiz_devicemode(&self) -> &GNPTXFSIZ_DEVICEMODE { - unsafe { &*(self as *const Self).cast::().add(40).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(40).cast() } } #[doc = "0x28 - Non-Periodic Transmit FIFO Size Register \\[HOSTMODE\\]"] #[inline(always)] pub const fn gnptxfsiz_hostmode(&self) -> &GNPTXFSIZ_HOSTMODE { - unsafe { &*(self as *const Self).cast::().add(40).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(40).cast() } } #[doc = "0x2c - Non-Periodic Transmit FIFO/Queue Status Register"] #[inline(always)] diff --git a/src/usb0/daintmsk.rs b/src/usb0/daintmsk.rs index e3088800..2c129327 100644 --- a/src/usb0/daintmsk.rs +++ b/src/usb0/daintmsk.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:15 - IN EP Interrupt Mask Bits"] #[inline(always)] - #[must_use] pub fn in_ep_msk(&mut self) -> IN_EP_MSK_W { IN_EP_MSK_W::new(self, 0) } #[doc = "Bits 16:31 - OUT EP Interrupt Mask Bits"] #[inline(always)] - #[must_use] pub fn out_ep_msk(&mut self) -> OUT_EP_MSK_W { OUT_EP_MSK_W::new(self, 16) } diff --git a/src/usb0/dcfg.rs b/src/usb0/dcfg.rs index 819c4424..890eaa63 100644 --- a/src/usb0/dcfg.rs +++ b/src/usb0/dcfg.rs @@ -304,37 +304,31 @@ impl R { impl W { #[doc = "Bits 0:1 - Device Speed"] #[inline(always)] - #[must_use] pub fn dev_spd(&mut self) -> DEV_SPD_W { DEV_SPD_W::new(self, 0) } #[doc = "Bit 2 - Non-Zero-Length Status OUT Handshake"] #[inline(always)] - #[must_use] pub fn nzsts_outhshk(&mut self) -> NZSTS_OUTHSHK_W { NZSTS_OUTHSHK_W::new(self, 2) } #[doc = "Bits 4:10 - Device Address"] #[inline(always)] - #[must_use] pub fn dev_addr(&mut self) -> DEV_ADDR_W { DEV_ADDR_W::new(self, 4) } #[doc = "Bits 11:12 - Periodic Frame Interval"] #[inline(always)] - #[must_use] pub fn per_fr_int(&mut self) -> PER_FR_INT_W { PER_FR_INT_W::new(self, 11) } #[doc = "Bit 23 - Enable Scatter/Gather DMA in Device mode."] #[inline(always)] - #[must_use] pub fn desc_dma(&mut self) -> DESC_DMA_W { DESC_DMA_W::new(self, 23) } #[doc = "Bits 24:25 - Periodic Scheduling Interval"] #[inline(always)] - #[must_use] pub fn per_sch_intvl(&mut self) -> PER_SCH_INTVL_W { PER_SCH_INTVL_W::new(self, 24) } diff --git a/src/usb0/dctl.rs b/src/usb0/dctl.rs index 2d80dd3f..66195685 100644 --- a/src/usb0/dctl.rs +++ b/src/usb0/dctl.rs @@ -380,61 +380,51 @@ impl R { impl W { #[doc = "Bit 0 - Remote Wakeup Signaling"] #[inline(always)] - #[must_use] pub fn rmt_wk_up_sig(&mut self) -> RMT_WK_UP_SIG_W { RMT_WK_UP_SIG_W::new(self, 0) } #[doc = "Bit 1 - Soft Disconnect"] #[inline(always)] - #[must_use] pub fn sft_discon(&mut self) -> SFT_DISCON_W { SFT_DISCON_W::new(self, 1) } #[doc = "Bit 7 - Set Global Non-periodic IN NAK"] #[inline(always)] - #[must_use] pub fn sgnpin_nak(&mut self) -> SGNPIN_NAK_W { SGNPIN_NAK_W::new(self, 7) } #[doc = "Bit 8 - Clear Global Non-periodic IN NAK"] #[inline(always)] - #[must_use] pub fn cgnpin_nak(&mut self) -> CGNPIN_NAK_W { CGNPIN_NAK_W::new(self, 8) } #[doc = "Bit 9 - Set Global OUT NAK"] #[inline(always)] - #[must_use] pub fn sgoutnak(&mut self) -> SGOUTNAK_W { SGOUTNAK_W::new(self, 9) } #[doc = "Bit 10 - Clear Global OUT NAK"] #[inline(always)] - #[must_use] pub fn cgoutnak(&mut self) -> CGOUTNAK_W { CGOUTNAK_W::new(self, 10) } #[doc = "Bits 13:14 - Global Multi Count"] #[inline(always)] - #[must_use] pub fn gmc(&mut self) -> GMC_W { GMC_W::new(self, 13) } #[doc = "Bit 15 - Ignore frame number for isochronous endpoints in case of Scatter/Gather DMA"] #[inline(always)] - #[must_use] pub fn ignr_frm_num(&mut self) -> IGNR_FRM_NUM_W { IGNR_FRM_NUM_W::new(self, 15) } #[doc = "Bit 16 - Set NAK automatically on babble"] #[inline(always)] - #[must_use] pub fn nak_on_bble(&mut self) -> NAK_ON_BBLE_W { NAK_ON_BBLE_W::new(self, 16) } #[doc = "Bit 17 - Enable continue on BNA"] #[inline(always)] - #[must_use] pub fn en_cont_on_bna(&mut self) -> EN_CONT_ON_BNA_W { EN_CONT_ON_BNA_W::new(self, 17) } diff --git a/src/usb0/diepempmsk.rs b/src/usb0/diepempmsk.rs index c9acf879..4fa70c78 100644 --- a/src/usb0/diepempmsk.rs +++ b/src/usb0/diepempmsk.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - IN EP Tx FIFO Empty Interrupt Mask Bits"] #[inline(always)] - #[must_use] pub fn in_ep_txf_emp_msk(&mut self) -> IN_EP_TXF_EMP_MSK_W { IN_EP_TXF_EMP_MSK_W::new(self, 0) } diff --git a/src/usb0/diepmsk.rs b/src/usb0/diepmsk.rs index 3804c2b1..71c78402 100644 --- a/src/usb0/diepmsk.rs +++ b/src/usb0/diepmsk.rs @@ -88,55 +88,46 @@ impl R { impl W { #[doc = "Bit 0 - Transfer Completed Interrupt Mask"] #[inline(always)] - #[must_use] pub fn xfer_compl_msk(&mut self) -> XFER_COMPL_MSK_W { XFER_COMPL_MSK_W::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"] #[inline(always)] - #[must_use] pub fn epdisbld_msk(&mut self) -> EPDISBLD_MSK_W { EPDISBLD_MSK_W::new(self, 1) } #[doc = "Bit 2 - AHB Error Mask"] #[inline(always)] - #[must_use] pub fn ahberr_msk(&mut self) -> AHBERR_MSK_W { AHBERR_MSK_W::new(self, 2) } #[doc = "Bit 3 - Timeout Condition Mask"] #[inline(always)] - #[must_use] pub fn time_outmsk(&mut self) -> TIME_OUTMSK_W { TIME_OUTMSK_W::new(self, 3) } #[doc = "Bit 4 - IN Token Received When TxFIFO Empty Mask"] #[inline(always)] - #[must_use] pub fn intkn_txfemp_msk(&mut self) -> INTKN_TXFEMP_MSK_W { INTKN_TXFEMP_MSK_W::new(self, 4) } #[doc = "Bit 6 - IN Endpoint NAK Effective Mask"] #[inline(always)] - #[must_use] pub fn inepnak_eff_msk(&mut self) -> INEPNAK_EFF_MSK_W { INEPNAK_EFF_MSK_W::new(self, 6) } #[doc = "Bit 8 - Fifo Underrun Mask"] #[inline(always)] - #[must_use] pub fn txfifo_undrn_msk(&mut self) -> TXFIFO_UNDRN_MSK_W { TXFIFO_UNDRN_MSK_W::new(self, 8) } #[doc = "Bit 9 - BNA Interrupt Mask"] #[inline(always)] - #[must_use] pub fn bnain_intr_msk(&mut self) -> BNAIN_INTR_MSK_W { BNAIN_INTR_MSK_W::new(self, 9) } #[doc = "Bit 13 - NAK interrupt Mask"] #[inline(always)] - #[must_use] pub fn nakmsk(&mut self) -> NAKMSK_W { NAKMSK_W::new(self, 13) } diff --git a/src/usb0/dieptxf1.rs b/src/usb0/dieptxf1.rs index cca04384..97b4d9f4 100644 --- a/src/usb0/dieptxf1.rs +++ b/src/usb0/dieptxf1.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - #[must_use] pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { INEPN_TX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - #[must_use] pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { INEPN_TX_FDEP_W::new(self, 16) } diff --git a/src/usb0/dieptxf2.rs b/src/usb0/dieptxf2.rs index f62fe482..8aac19bd 100644 --- a/src/usb0/dieptxf2.rs +++ b/src/usb0/dieptxf2.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - #[must_use] pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { INEPN_TX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - #[must_use] pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { INEPN_TX_FDEP_W::new(self, 16) } diff --git a/src/usb0/dieptxf3.rs b/src/usb0/dieptxf3.rs index 8f7d0abd..49f703eb 100644 --- a/src/usb0/dieptxf3.rs +++ b/src/usb0/dieptxf3.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - #[must_use] pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { INEPN_TX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - #[must_use] pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { INEPN_TX_FDEP_W::new(self, 16) } diff --git a/src/usb0/dieptxf4.rs b/src/usb0/dieptxf4.rs index 91a635bf..60ed2dae 100644 --- a/src/usb0/dieptxf4.rs +++ b/src/usb0/dieptxf4.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - #[must_use] pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { INEPN_TX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - #[must_use] pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { INEPN_TX_FDEP_W::new(self, 16) } diff --git a/src/usb0/dieptxf5.rs b/src/usb0/dieptxf5.rs index 33be8854..60a1c047 100644 --- a/src/usb0/dieptxf5.rs +++ b/src/usb0/dieptxf5.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - #[must_use] pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { INEPN_TX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - #[must_use] pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { INEPN_TX_FDEP_W::new(self, 16) } diff --git a/src/usb0/dieptxf6.rs b/src/usb0/dieptxf6.rs index 453c8299..97f52fd6 100644 --- a/src/usb0/dieptxf6.rs +++ b/src/usb0/dieptxf6.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:15 - IN Endpoint FIFOn Transmit RAM Start Address"] #[inline(always)] - #[must_use] pub fn inepn_tx_fst_addr(&mut self) -> INEPN_TX_FST_ADDR_W { INEPN_TX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO Depth"] #[inline(always)] - #[must_use] pub fn inepn_tx_fdep(&mut self) -> INEPN_TX_FDEP_W { INEPN_TX_FDEP_W::new(self, 16) } diff --git a/src/usb0/doepmsk.rs b/src/usb0/doepmsk.rs index ba72e390..f97d18c6 100644 --- a/src/usb0/doepmsk.rs +++ b/src/usb0/doepmsk.rs @@ -106,67 +106,56 @@ impl R { impl W { #[doc = "Bit 0 - Transfer Completed Interrupt Mask"] #[inline(always)] - #[must_use] pub fn xfer_compl_msk(&mut self) -> XFER_COMPL_MSK_W { XFER_COMPL_MSK_W::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt Mask"] #[inline(always)] - #[must_use] pub fn epdisbld_msk(&mut self) -> EPDISBLD_MSK_W { EPDISBLD_MSK_W::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - #[must_use] pub fn ahberr_msk(&mut self) -> AHBERR_MSK_W { AHBERR_MSK_W::new(self, 2) } #[doc = "Bit 3 - SETUP Phase Done Mask"] #[inline(always)] - #[must_use] pub fn set_upmsk(&mut self) -> SET_UPMSK_W { SET_UPMSK_W::new(self, 3) } #[doc = "Bit 4 - OUT Token Received when Endpoint Disabled Mask"] #[inline(always)] - #[must_use] pub fn outtkn_epdis_msk(&mut self) -> OUTTKN_EPDIS_MSK_W { OUTTKN_EPDIS_MSK_W::new(self, 4) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received Mask"] #[inline(always)] - #[must_use] pub fn back2back_setup(&mut self) -> BACK2BACK_SETUP_W { BACK2BACK_SETUP_W::new(self, 6) } #[doc = "Bit 8 - OUT Packet Error Mask"] #[inline(always)] - #[must_use] pub fn out_pkt_err_msk(&mut self) -> OUT_PKT_ERR_MSK_W { OUT_PKT_ERR_MSK_W::new(self, 8) } #[doc = "Bit 9 - BNA interrupt Mask"] #[inline(always)] - #[must_use] pub fn bna_out_intr_msk(&mut self) -> BNA_OUT_INTR_MSK_W { BNA_OUT_INTR_MSK_W::new(self, 9) } #[doc = "Bit 12 - Babble Interrupt Mask"] #[inline(always)] - #[must_use] pub fn bble_err_msk(&mut self) -> BBLE_ERR_MSK_W { BBLE_ERR_MSK_W::new(self, 12) } #[doc = "Bit 13 - NAK Interrupt Mask"] #[inline(always)] - #[must_use] pub fn nakmsk(&mut self) -> NAKMSK_W { NAKMSK_W::new(self, 13) } #[doc = "Bit 14 - NYET Interrupt Mask"] #[inline(always)] - #[must_use] pub fn nyetmsk(&mut self) -> NYETMSK_W { NYETMSK_W::new(self, 14) } diff --git a/src/usb0/dvbusdis.rs b/src/usb0/dvbusdis.rs index f6df7d4a..7f270fdf 100644 --- a/src/usb0/dvbusdis.rs +++ b/src/usb0/dvbusdis.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Device Vbus Discharge Time"] #[inline(always)] - #[must_use] pub fn dvbusdis(&mut self) -> DVBUSDIS_W { DVBUSDIS_W::new(self, 0) } diff --git a/src/usb0/dvbuspulse.rs b/src/usb0/dvbuspulse.rs index 089b1bbd..11323868 100644 --- a/src/usb0/dvbuspulse.rs +++ b/src/usb0/dvbuspulse.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:11 - Device Vbus Pulsing Time"] #[inline(always)] - #[must_use] pub fn dvbuspulse(&mut self) -> DVBUSPULSE_W { DVBUSPULSE_W::new(self, 0) } diff --git a/src/usb0/gahbcfg.rs b/src/usb0/gahbcfg.rs index 43ec0d42..a4f57a1d 100644 --- a/src/usb0/gahbcfg.rs +++ b/src/usb0/gahbcfg.rs @@ -401,37 +401,31 @@ impl R { impl W { #[doc = "Bit 0 - Global Interrupt Mask"] #[inline(always)] - #[must_use] pub fn glbl_intr_msk(&mut self) -> GLBL_INTR_MSK_W { GLBL_INTR_MSK_W::new(self, 0) } #[doc = "Bits 1:4 - Burst Length/Type"] #[inline(always)] - #[must_use] pub fn hbst_len(&mut self) -> HBST_LEN_W { HBST_LEN_W::new(self, 1) } #[doc = "Bit 5 - DMA Enable"] #[inline(always)] - #[must_use] pub fn dmaen(&mut self) -> DMAEN_W { DMAEN_W::new(self, 5) } #[doc = "Bit 7 - Non-Periodic TxFIFO Empty Level"] #[inline(always)] - #[must_use] pub fn nptx_femp_lvl(&mut self) -> NPTX_FEMP_LVL_W { NPTX_FEMP_LVL_W::new(self, 7) } #[doc = "Bit 8 - Periodic TxFIFO Empty Level"] #[inline(always)] - #[must_use] pub fn ptx_femp_lvl(&mut self) -> PTX_FEMP_LVL_W { PTX_FEMP_LVL_W::new(self, 8) } #[doc = "Bit 23 - AHB Single Support"] #[inline(always)] - #[must_use] pub fn ahbsingle(&mut self) -> AHBSINGLE_W { AHBSINGLE_W::new(self, 23) } diff --git a/src/usb0/gdfifocfg.rs b/src/usb0/gdfifocfg.rs index 76f28f6c..736d5f7e 100644 --- a/src/usb0/gdfifocfg.rs +++ b/src/usb0/gdfifocfg.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:15 - GDFIFOCfg"] #[inline(always)] - #[must_use] pub fn gdfifocfg(&mut self) -> GDFIFOCFG_W { GDFIFOCFG_W::new(self, 0) } #[doc = "Bits 16:31 - EPInfoBaseAddr"] #[inline(always)] - #[must_use] pub fn epinfo_base_addr(&mut self) -> EPINFO_BASE_ADDR_W { EPINFO_BASE_ADDR_W::new(self, 16) } diff --git a/src/usb0/gintmsk_devicemode.rs b/src/usb0/gintmsk_devicemode.rs index 4912ad5a..be4c5688 100644 --- a/src/usb0/gintmsk_devicemode.rs +++ b/src/usb0/gintmsk_devicemode.rs @@ -187,121 +187,101 @@ impl R { impl W { #[doc = "Bit 1 - Mode Mismatch Interrupt Mask"] #[inline(always)] - #[must_use] pub fn mode_mis_msk(&mut self) -> MODE_MIS_MSK_W { MODE_MIS_MSK_W::new(self, 1) } #[doc = "Bit 2 - OTG Interrupt Mask"] #[inline(always)] - #[must_use] pub fn otgint_msk(&mut self) -> OTGINT_MSK_W { OTGINT_MSK_W::new(self, 2) } #[doc = "Bit 3 - Start of Frame Mask"] #[inline(always)] - #[must_use] pub fn sof_msk(&mut self) -> SOF_MSK_W { SOF_MSK_W::new(self, 3) } #[doc = "Bit 4 - Receive FIFO Non-Empty Mask"] #[inline(always)] - #[must_use] pub fn rx_flvl_msk(&mut self) -> RX_FLVL_MSK_W { RX_FLVL_MSK_W::new(self, 4) } #[doc = "Bit 6 - Global Non-periodic IN NAK Effective Mask"] #[inline(always)] - #[must_use] pub fn ginnak_eff_msk(&mut self) -> GINNAK_EFF_MSK_W { GINNAK_EFF_MSK_W::new(self, 6) } #[doc = "Bit 7 - Global OUT NAK Effective Mask"] #[inline(always)] - #[must_use] pub fn goutnak_eff_msk(&mut self) -> GOUTNAK_EFF_MSK_W { GOUTNAK_EFF_MSK_W::new(self, 7) } #[doc = "Bit 10 - Early Suspend Mask"] #[inline(always)] - #[must_use] pub fn erly_susp_msk(&mut self) -> ERLY_SUSP_MSK_W { ERLY_SUSP_MSK_W::new(self, 10) } #[doc = "Bit 11 - USB Suspend Mask"] #[inline(always)] - #[must_use] pub fn usbsusp_msk(&mut self) -> USBSUSP_MSK_W { USBSUSP_MSK_W::new(self, 11) } #[doc = "Bit 12 - USB Reset Mask"] #[inline(always)] - #[must_use] pub fn usbrst_msk(&mut self) -> USBRST_MSK_W { USBRST_MSK_W::new(self, 12) } #[doc = "Bit 13 - Enumeration Done Mask"] #[inline(always)] - #[must_use] pub fn enum_done_msk(&mut self) -> ENUM_DONE_MSK_W { ENUM_DONE_MSK_W::new(self, 13) } #[doc = "Bit 14 - Isochronous OUT Packet Dropped Interrupt Mask"] #[inline(always)] - #[must_use] pub fn isoout_drop_msk(&mut self) -> ISOOUT_DROP_MSK_W { ISOOUT_DROP_MSK_W::new(self, 14) } #[doc = "Bit 15 - End of Periodic Frame Interrupt Mask"] #[inline(always)] - #[must_use] pub fn eopfmsk(&mut self) -> EOPFMSK_W { EOPFMSK_W::new(self, 15) } #[doc = "Bit 18 - IN Endpoints Interrupt Mask"] #[inline(always)] - #[must_use] pub fn iepint_msk(&mut self) -> IEPINT_MSK_W { IEPINT_MSK_W::new(self, 18) } #[doc = "Bit 19 - OUT Endpoints Interrupt Mask"] #[inline(always)] - #[must_use] pub fn oepint_msk(&mut self) -> OEPINT_MSK_W { OEPINT_MSK_W::new(self, 19) } #[doc = "Bit 20 - Incomplete Isochronous IN Transfer Mask"] #[inline(always)] - #[must_use] pub fn incomp_isoinmsk(&mut self) -> INCOMP_ISOINMSK_W { INCOMP_ISOINMSK_W::new(self, 20) } #[doc = "Bit 21 - Incomplete Isochronous OUT Transfer Mask"] #[inline(always)] - #[must_use] pub fn incompl_sooutmsk(&mut self) -> INCOMPL_SOOUTMSK_W { INCOMPL_SOOUTMSK_W::new(self, 21) } #[doc = "Bit 28 - Connector ID Status Change Mask"] #[inline(always)] - #[must_use] pub fn con_idsts_chng_msk(&mut self) -> CON_IDSTS_CHNG_MSK_W { CON_IDSTS_CHNG_MSK_W::new(self, 28) } #[doc = "Bit 29 - Disconnect Detected Interrupt Mask"] #[inline(always)] - #[must_use] pub fn disconn_int_msk(&mut self) -> DISCONN_INT_MSK_W { DISCONN_INT_MSK_W::new(self, 29) } #[doc = "Bit 30 - Session Request/New Session Detected Interrupt Mask"] #[inline(always)] - #[must_use] pub fn sess_req_int_msk(&mut self) -> SESS_REQ_INT_MSK_W { SESS_REQ_INT_MSK_W::new(self, 30) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt Mask"] #[inline(always)] - #[must_use] pub fn wk_up_int_msk(&mut self) -> WK_UP_INT_MSK_W { WK_UP_INT_MSK_W::new(self, 31) } diff --git a/src/usb0/gintmsk_hostmode.rs b/src/usb0/gintmsk_hostmode.rs index c1985b9d..75086225 100644 --- a/src/usb0/gintmsk_hostmode.rs +++ b/src/usb0/gintmsk_hostmode.rs @@ -115,73 +115,61 @@ impl R { impl W { #[doc = "Bit 1 - Mode Mismatch Interrupt Mask"] #[inline(always)] - #[must_use] pub fn mode_mis_msk(&mut self) -> MODE_MIS_MSK_W { MODE_MIS_MSK_W::new(self, 1) } #[doc = "Bit 2 - OTG Interrupt Mask"] #[inline(always)] - #[must_use] pub fn otgint_msk(&mut self) -> OTGINT_MSK_W { OTGINT_MSK_W::new(self, 2) } #[doc = "Bit 3 - Start of Frame Mask"] #[inline(always)] - #[must_use] pub fn sof_msk(&mut self) -> SOF_MSK_W { SOF_MSK_W::new(self, 3) } #[doc = "Bit 4 - Receive FIFO Non-Empty Mask"] #[inline(always)] - #[must_use] pub fn rx_flvl_msk(&mut self) -> RX_FLVL_MSK_W { RX_FLVL_MSK_W::new(self, 4) } #[doc = "Bit 21 - Incomplete Periodic Transfer Mask"] #[inline(always)] - #[must_use] pub fn incompl_pmsk(&mut self) -> INCOMPL_PMSK_W { INCOMPL_PMSK_W::new(self, 21) } #[doc = "Bit 24 - Host Port Interrupt Mask"] #[inline(always)] - #[must_use] pub fn prt_int_msk(&mut self) -> PRT_INT_MSK_W { PRT_INT_MSK_W::new(self, 24) } #[doc = "Bit 25 - Host Channels Interrupt Mask"] #[inline(always)] - #[must_use] pub fn hch_int_msk(&mut self) -> HCH_INT_MSK_W { HCH_INT_MSK_W::new(self, 25) } #[doc = "Bit 26 - Periodic TxFIFO Empty Mask"] #[inline(always)] - #[must_use] pub fn ptx_femp_msk(&mut self) -> PTX_FEMP_MSK_W { PTX_FEMP_MSK_W::new(self, 26) } #[doc = "Bit 28 - Connector ID Status Change Mask"] #[inline(always)] - #[must_use] pub fn con_idsts_chng_msk(&mut self) -> CON_IDSTS_CHNG_MSK_W { CON_IDSTS_CHNG_MSK_W::new(self, 28) } #[doc = "Bit 29 - Disconnect Detected Interrupt Mask"] #[inline(always)] - #[must_use] pub fn disconn_int_msk(&mut self) -> DISCONN_INT_MSK_W { DISCONN_INT_MSK_W::new(self, 29) } #[doc = "Bit 30 - Session Request/New Session Detected Interrupt Mask"] #[inline(always)] - #[must_use] pub fn sess_req_int_msk(&mut self) -> SESS_REQ_INT_MSK_W { SESS_REQ_INT_MSK_W::new(self, 30) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt Mask"] #[inline(always)] - #[must_use] pub fn wk_up_int_msk(&mut self) -> WK_UP_INT_MSK_W { WK_UP_INT_MSK_W::new(self, 31) } diff --git a/src/usb0/gintsts_devicemode.rs b/src/usb0/gintsts_devicemode.rs index f46ad945..26d89cd9 100644 --- a/src/usb0/gintsts_devicemode.rs +++ b/src/usb0/gintsts_devicemode.rs @@ -207,79 +207,66 @@ impl R { impl W { #[doc = "Bit 1 - Mode Mismatch Interrupt"] #[inline(always)] - #[must_use] pub fn mode_mis(&mut self) -> MODE_MIS_W { MODE_MIS_W::new(self, 1) } #[doc = "Bit 3 - Start of Frame"] #[inline(always)] - #[must_use] pub fn sof(&mut self) -> SOF_W { SOF_W::new(self, 3) } #[doc = "Bit 10 - Early Suspend"] #[inline(always)] - #[must_use] pub fn erly_susp(&mut self) -> ERLY_SUSP_W { ERLY_SUSP_W::new(self, 10) } #[doc = "Bit 11 - USB Suspend"] #[inline(always)] - #[must_use] pub fn usbsusp(&mut self) -> USBSUSP_W { USBSUSP_W::new(self, 11) } #[doc = "Bit 12 - USB Reset"] #[inline(always)] - #[must_use] pub fn usbrst(&mut self) -> USBRST_W { USBRST_W::new(self, 12) } #[doc = "Bit 13 - Enumeration Done"] #[inline(always)] - #[must_use] pub fn enum_done(&mut self) -> ENUM_DONE_W { ENUM_DONE_W::new(self, 13) } #[doc = "Bit 14 - Isochronous OUT Packet Dropped Interrupt"] #[inline(always)] - #[must_use] pub fn isoout_drop(&mut self) -> ISOOUT_DROP_W { ISOOUT_DROP_W::new(self, 14) } #[doc = "Bit 15 - End of Periodic Frame Interrupt"] #[inline(always)] - #[must_use] pub fn eopf(&mut self) -> EOPF_W { EOPF_W::new(self, 15) } #[doc = "Bit 20 - Incomplete Isochronous IN Transfer"] #[inline(always)] - #[must_use] pub fn incomp_isoin(&mut self) -> INCOMP_ISOIN_W { INCOMP_ISOIN_W::new(self, 20) } #[doc = "Bit 21 - Incomplete Isochronous OUT Transfer"] #[inline(always)] - #[must_use] pub fn incompl_soout(&mut self) -> INCOMPL_SOOUT_W { INCOMPL_SOOUT_W::new(self, 21) } #[doc = "Bit 28 - Connector ID Status Change"] #[inline(always)] - #[must_use] pub fn con_idsts_chng(&mut self) -> CON_IDSTS_CHNG_W { CON_IDSTS_CHNG_W::new(self, 28) } #[doc = "Bit 30 - Session Request/New Session Detected Interrupt"] #[inline(always)] - #[must_use] pub fn sess_req_int(&mut self) -> SESS_REQ_INT_W { SESS_REQ_INT_W::new(self, 30) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt"] #[inline(always)] - #[must_use] pub fn wk_up_int(&mut self) -> WK_UP_INT_W { WK_UP_INT_W::new(self, 31) } diff --git a/src/usb0/gintsts_hostmode.rs b/src/usb0/gintsts_hostmode.rs index 754677ae..4631ca47 100644 --- a/src/usb0/gintsts_hostmode.rs +++ b/src/usb0/gintsts_hostmode.rs @@ -146,43 +146,36 @@ impl R { impl W { #[doc = "Bit 1 - Mode Mismatch Interrupt"] #[inline(always)] - #[must_use] pub fn mode_mis(&mut self) -> MODE_MIS_W { MODE_MIS_W::new(self, 1) } #[doc = "Bit 3 - Start of Frame"] #[inline(always)] - #[must_use] pub fn sof(&mut self) -> SOF_W { SOF_W::new(self, 3) } #[doc = "Bit 21 - Incomplete Periodic Transfer"] #[inline(always)] - #[must_use] pub fn incompl_p(&mut self) -> INCOMPL_P_W { INCOMPL_P_W::new(self, 21) } #[doc = "Bit 28 - Connector ID Status Change"] #[inline(always)] - #[must_use] pub fn con_idsts_chng(&mut self) -> CON_IDSTS_CHNG_W { CON_IDSTS_CHNG_W::new(self, 28) } #[doc = "Bit 29 - Disconnect Detected Interrupt"] #[inline(always)] - #[must_use] pub fn disconn_int(&mut self) -> DISCONN_INT_W { DISCONN_INT_W::new(self, 29) } #[doc = "Bit 30 - Session Request/New Session Detected Interrupt"] #[inline(always)] - #[must_use] pub fn sess_req_int(&mut self) -> SESS_REQ_INT_W { SESS_REQ_INT_W::new(self, 30) } #[doc = "Bit 31 - Resume/Remote Wakeup Detected Interrupt"] #[inline(always)] - #[must_use] pub fn wk_up_int(&mut self) -> WK_UP_INT_W { WK_UP_INT_W::new(self, 31) } diff --git a/src/usb0/gnptxfsiz_devicemode.rs b/src/usb0/gnptxfsiz_devicemode.rs index 9432fb2f..153205b0 100644 --- a/src/usb0/gnptxfsiz_devicemode.rs +++ b/src/usb0/gnptxfsiz_devicemode.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:15 - IN Endpoint FIFO0 Transmit RAM Start Address"] #[inline(always)] - #[must_use] pub fn ineptx_f0st_addr(&mut self) -> INEPTX_F0ST_ADDR_W { INEPTX_F0ST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - IN Endpoint TxFIFO 0 Depth"] #[inline(always)] - #[must_use] pub fn ineptx_f0dep(&mut self) -> INEPTX_F0DEP_W { INEPTX_F0DEP_W::new(self, 16) } diff --git a/src/usb0/gnptxfsiz_hostmode.rs b/src/usb0/gnptxfsiz_hostmode.rs index 0046fb17..d9b3586e 100644 --- a/src/usb0/gnptxfsiz_hostmode.rs +++ b/src/usb0/gnptxfsiz_hostmode.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:15 - Non-periodic Transmit RAM Start Address"] #[inline(always)] - #[must_use] pub fn nptx_fst_addr(&mut self) -> NPTX_FST_ADDR_W { NPTX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - Non-periodic TxFIFO Depth"] #[inline(always)] - #[must_use] pub fn nptx_fdep(&mut self) -> NPTX_FDEP_W { NPTX_FDEP_W::new(self, 16) } diff --git a/src/usb0/gotgctl.rs b/src/usb0/gotgctl.rs index 23fbddf8..bb79e317 100644 --- a/src/usb0/gotgctl.rs +++ b/src/usb0/gotgctl.rs @@ -891,67 +891,56 @@ impl R { impl W { #[doc = "Bit 1 - Session Request"] #[inline(always)] - #[must_use] pub fn ses_req(&mut self) -> SES_REQ_W { SES_REQ_W::new(self, 1) } #[doc = "Bit 2 - VBUS Valid Override Enable"] #[inline(always)] - #[must_use] pub fn vbvalid_ov_en(&mut self) -> VBVALID_OV_EN_W { VBVALID_OV_EN_W::new(self, 2) } #[doc = "Bit 3 - VBUS Valid Override Value"] #[inline(always)] - #[must_use] pub fn vbvalid_ov_val(&mut self) -> VBVALID_OV_VAL_W { VBVALID_OV_VAL_W::new(self, 3) } #[doc = "Bit 4 - A-Peripheral Session Valid Override Enable"] #[inline(always)] - #[must_use] pub fn avalid_ov_en(&mut self) -> AVALID_OV_EN_W { AVALID_OV_EN_W::new(self, 4) } #[doc = "Bit 5 - A-Peripheral Session Valid Override Value"] #[inline(always)] - #[must_use] pub fn avalid_ov_val(&mut self) -> AVALID_OV_VAL_W { AVALID_OV_VAL_W::new(self, 5) } #[doc = "Bit 6 - B-Peripheral Session Valid Override Enable"] #[inline(always)] - #[must_use] pub fn bvalid_ov_en(&mut self) -> BVALID_OV_EN_W { BVALID_OV_EN_W::new(self, 6) } #[doc = "Bit 7 - B-Peripheral Session Valid Override Value"] #[inline(always)] - #[must_use] pub fn bvalid_ov_val(&mut self) -> BVALID_OV_VAL_W { BVALID_OV_VAL_W::new(self, 7) } #[doc = "Bit 9 - HNP Request"] #[inline(always)] - #[must_use] pub fn hnpreq(&mut self) -> HNPREQ_W { HNPREQ_W::new(self, 9) } #[doc = "Bit 10 - Host Set HNP Enable"] #[inline(always)] - #[must_use] pub fn hst_set_hnpen(&mut self) -> HST_SET_HNPEN_W { HST_SET_HNPEN_W::new(self, 10) } #[doc = "Bit 11 - Device HNP Enabled"] #[inline(always)] - #[must_use] pub fn dev_hnpen(&mut self) -> DEV_HNPEN_W { DEV_HNPEN_W::new(self, 11) } #[doc = "Bit 20 - OTG Version"] #[inline(always)] - #[must_use] pub fn otgver(&mut self) -> OTGVER_W { OTGVER_W::new(self, 20) } diff --git a/src/usb0/gotgint.rs b/src/usb0/gotgint.rs index 7a75528b..451fabc1 100644 --- a/src/usb0/gotgint.rs +++ b/src/usb0/gotgint.rs @@ -61,37 +61,31 @@ impl R { impl W { #[doc = "Bit 2 - Session End Detected"] #[inline(always)] - #[must_use] pub fn ses_end_det(&mut self) -> SES_END_DET_W { SES_END_DET_W::new(self, 2) } #[doc = "Bit 8 - Session Request Success Status Change"] #[inline(always)] - #[must_use] pub fn ses_req_suc_sts_chng(&mut self) -> SES_REQ_SUC_STS_CHNG_W { SES_REQ_SUC_STS_CHNG_W::new(self, 8) } #[doc = "Bit 9 - Host Negotiation Success Status Change"] #[inline(always)] - #[must_use] pub fn hst_neg_suc_sts_chng(&mut self) -> HST_NEG_SUC_STS_CHNG_W { HST_NEG_SUC_STS_CHNG_W::new(self, 9) } #[doc = "Bit 17 - Host Negotiation Detected"] #[inline(always)] - #[must_use] pub fn hst_neg_det(&mut self) -> HST_NEG_DET_W { HST_NEG_DET_W::new(self, 17) } #[doc = "Bit 18 - A-Device Timeout Change"] #[inline(always)] - #[must_use] pub fn adev_toutchg(&mut self) -> ADEV_TOUTCHG_W { ADEV_TOUTCHG_W::new(self, 18) } #[doc = "Bit 19 - Debounce Done"] #[inline(always)] - #[must_use] pub fn dbnce_done(&mut self) -> DBNCE_DONE_W { DBNCE_DONE_W::new(self, 19) } diff --git a/src/usb0/grstctl.rs b/src/usb0/grstctl.rs index 0e8b3e64..bbd8b680 100644 --- a/src/usb0/grstctl.rs +++ b/src/usb0/grstctl.rs @@ -161,31 +161,26 @@ impl R { impl W { #[doc = "Bit 0 - Core Soft Reset"] #[inline(always)] - #[must_use] pub fn csft_rst(&mut self) -> CSFT_RST_W { CSFT_RST_W::new(self, 0) } #[doc = "Bit 2 - Host Frame Counter Reset"] #[inline(always)] - #[must_use] pub fn frm_cntr_rst(&mut self) -> FRM_CNTR_RST_W { FRM_CNTR_RST_W::new(self, 2) } #[doc = "Bit 4 - RxFIFO Flush"] #[inline(always)] - #[must_use] pub fn rx_fflsh(&mut self) -> RX_FFLSH_W { RX_FFLSH_W::new(self, 4) } #[doc = "Bit 5 - TxFIFO Flush"] #[inline(always)] - #[must_use] pub fn tx_fflsh(&mut self) -> TX_FFLSH_W { TX_FFLSH_W::new(self, 5) } #[doc = "Bits 6:10 - TxFIFO Number"] #[inline(always)] - #[must_use] pub fn tx_fnum(&mut self) -> TX_FNUM_W { TX_FNUM_W::new(self, 6) } diff --git a/src/usb0/grxfsiz.rs b/src/usb0/grxfsiz.rs index d560025b..783bd25f 100644 --- a/src/usb0/grxfsiz.rs +++ b/src/usb0/grxfsiz.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - RxFIFO Depth"] #[inline(always)] - #[must_use] pub fn rx_fdep(&mut self) -> RX_FDEP_W { RX_FDEP_W::new(self, 0) } diff --git a/src/usb0/guid.rs b/src/usb0/guid.rs index 4243116d..28aba3f3 100644 --- a/src/usb0/guid.rs +++ b/src/usb0/guid.rs @@ -34,19 +34,16 @@ impl R { impl W { #[doc = "Bits 0:7 - Module Revision"] #[inline(always)] - #[must_use] pub fn mod_rev(&mut self) -> MOD_REV_W { MOD_REV_W::new(self, 0) } #[doc = "Bits 8:15 - Module Type"] #[inline(always)] - #[must_use] pub fn mod_type(&mut self) -> MOD_TYPE_W { MOD_TYPE_W::new(self, 8) } #[doc = "Bits 16:31 - Module Number"] #[inline(always)] - #[must_use] pub fn mod_number(&mut self) -> MOD_NUMBER_W { MOD_NUMBER_W::new(self, 16) } diff --git a/src/usb0/gusbcfg.rs b/src/usb0/gusbcfg.rs index a07d1ece..54c57418 100644 --- a/src/usb0/gusbcfg.rs +++ b/src/usb0/gusbcfg.rs @@ -404,55 +404,46 @@ impl R { impl W { #[doc = "Bits 0:2 - FS Timeout Calibration"] #[inline(always)] - #[must_use] pub fn tout_cal(&mut self) -> TOUT_CAL_W { TOUT_CAL_W::new(self, 0) } #[doc = "Bit 8 - SRP-Capable"] #[inline(always)] - #[must_use] pub fn srpcap(&mut self) -> SRPCAP_W { SRPCAP_W::new(self, 8) } #[doc = "Bit 9 - HNP-Capable"] #[inline(always)] - #[must_use] pub fn hnpcap(&mut self) -> HNPCAP_W { HNPCAP_W::new(self, 9) } #[doc = "Bits 10:13 - USB Turnaround Time"] #[inline(always)] - #[must_use] pub fn usbtrd_tim(&mut self) -> USBTRD_TIM_W { USBTRD_TIM_W::new(self, 10) } #[doc = "Bit 16 - UTMIFS Interface Select"] #[inline(always)] - #[must_use] pub fn otg_i2csel(&mut self) -> OTG_I2CSEL_W { OTG_I2CSEL_W::new(self, 16) } #[doc = "Bit 28 - Tx End Delay"] #[inline(always)] - #[must_use] pub fn tx_end_delay(&mut self) -> TX_END_DELAY_W { TX_END_DELAY_W::new(self, 28) } #[doc = "Bit 29 - Force Host Mode"] #[inline(always)] - #[must_use] pub fn force_hst_mode(&mut self) -> FORCE_HST_MODE_W { FORCE_HST_MODE_W::new(self, 29) } #[doc = "Bit 30 - Force Device Mode"] #[inline(always)] - #[must_use] pub fn force_dev_mode(&mut self) -> FORCE_DEV_MODE_W { FORCE_DEV_MODE_W::new(self, 30) } #[doc = "Bit 31 - Corrupt Tx packet"] #[inline(always)] - #[must_use] pub fn ctp(&mut self) -> CTP_W { CTP_W::new(self, 31) } diff --git a/src/usb0/haintmsk.rs b/src/usb0/haintmsk.rs index f2bde566..480b6bef 100644 --- a/src/usb0/haintmsk.rs +++ b/src/usb0/haintmsk.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:13 - Channel Interrupt Mask"] #[inline(always)] - #[must_use] pub fn haintmsk(&mut self) -> HAINTMSK_W { HAINTMSK_W::new(self, 0) } diff --git a/src/usb0/hcfg.rs b/src/usb0/hcfg.rs index fd221026..9adcd60f 100644 --- a/src/usb0/hcfg.rs +++ b/src/usb0/hcfg.rs @@ -226,31 +226,26 @@ impl R { impl W { #[doc = "Bits 0:1 - FS PHY Clock Select"] #[inline(always)] - #[must_use] pub fn fslspclk_sel(&mut self) -> FSLSPCLK_SEL_W { FSLSPCLK_SEL_W::new(self, 0) } #[doc = "Bit 2 - FS-Only Support"] #[inline(always)] - #[must_use] pub fn fslssupp(&mut self) -> FSLSSUPP_W { FSLSSUPP_W::new(self, 2) } #[doc = "Bit 23 - Enable Scatter/gather DMA in Host mode"] #[inline(always)] - #[must_use] pub fn desc_dma(&mut self) -> DESC_DMA_W { DESC_DMA_W::new(self, 23) } #[doc = "Bits 24:25 - Frame List Entries"] #[inline(always)] - #[must_use] pub fn fr_list_en(&mut self) -> FR_LIST_EN_W { FR_LIST_EN_W::new(self, 24) } #[doc = "Bit 26 - Enable Periodic Scheduling"] #[inline(always)] - #[must_use] pub fn per_sched_ena(&mut self) -> PER_SCHED_ENA_W { PER_SCHED_ENA_W::new(self, 26) } diff --git a/src/usb0/hfir.rs b/src/usb0/hfir.rs index c855c0e7..db62eecf 100644 --- a/src/usb0/hfir.rs +++ b/src/usb0/hfir.rs @@ -74,13 +74,11 @@ impl R { impl W { #[doc = "Bits 0:15 - Frame Interval"] #[inline(always)] - #[must_use] pub fn fr_int(&mut self) -> FR_INT_W { FR_INT_W::new(self, 0) } #[doc = "Bit 16 - Reload Control"] #[inline(always)] - #[must_use] pub fn hfirrld_ctrl(&mut self) -> HFIRRLD_CTRL_W { HFIRRLD_CTRL_W::new(self, 16) } diff --git a/src/usb0/hflbaddr.rs b/src/usb0/hflbaddr.rs index 94860f31..925935f2 100644 --- a/src/usb0/hflbaddr.rs +++ b/src/usb0/hflbaddr.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Starting Address"] #[inline(always)] - #[must_use] pub fn starting_address(&mut self) -> STARTING_ADDRESS_W { STARTING_ADDRESS_W::new(self, 0) } diff --git a/src/usb0/hfnum.rs b/src/usb0/hfnum.rs index 0545df5b..ebe3b379 100644 --- a/src/usb0/hfnum.rs +++ b/src/usb0/hfnum.rs @@ -23,7 +23,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Frame Number"] #[inline(always)] - #[must_use] pub fn fr_num(&mut self) -> FR_NUM_W { FR_NUM_W::new(self, 0) } diff --git a/src/usb0/hprt.rs b/src/usb0/hprt.rs index d7b69c2e..e4cd9b3e 100644 --- a/src/usb0/hprt.rs +++ b/src/usb0/hprt.rs @@ -452,49 +452,41 @@ impl R { impl W { #[doc = "Bit 1 - Port Connect Detected"] #[inline(always)] - #[must_use] pub fn prt_conn_det(&mut self) -> PRT_CONN_DET_W { PRT_CONN_DET_W::new(self, 1) } #[doc = "Bit 2 - Port Enable"] #[inline(always)] - #[must_use] pub fn prt_ena(&mut self) -> PRT_ENA_W { PRT_ENA_W::new(self, 2) } #[doc = "Bit 3 - Port Enable/Disable Change"] #[inline(always)] - #[must_use] pub fn prt_en_chng(&mut self) -> PRT_EN_CHNG_W { PRT_EN_CHNG_W::new(self, 3) } #[doc = "Bit 5 - Port Overcurrent Change"] #[inline(always)] - #[must_use] pub fn prt_ovr_curr_chng(&mut self) -> PRT_OVR_CURR_CHNG_W { PRT_OVR_CURR_CHNG_W::new(self, 5) } #[doc = "Bit 6 - Port Resume"] #[inline(always)] - #[must_use] pub fn prt_res(&mut self) -> PRT_RES_W { PRT_RES_W::new(self, 6) } #[doc = "Bit 7 - Port Suspend"] #[inline(always)] - #[must_use] pub fn prt_susp(&mut self) -> PRT_SUSP_W { PRT_SUSP_W::new(self, 7) } #[doc = "Bit 8 - Port Reset"] #[inline(always)] - #[must_use] pub fn prt_rst(&mut self) -> PRT_RST_W { PRT_RST_W::new(self, 8) } #[doc = "Bit 12 - Port Power"] #[inline(always)] - #[must_use] pub fn prt_pwr(&mut self) -> PRT_PWR_W { PRT_PWR_W::new(self, 12) } diff --git a/src/usb0/hptxfsiz.rs b/src/usb0/hptxfsiz.rs index b76dcc8c..17c918ec 100644 --- a/src/usb0/hptxfsiz.rs +++ b/src/usb0/hptxfsiz.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:15 - Host Periodic TxFIFO Start Address"] #[inline(always)] - #[must_use] pub fn ptx_fst_addr(&mut self) -> PTX_FST_ADDR_W { PTX_FST_ADDR_W::new(self, 0) } #[doc = "Bits 16:31 - Host Periodic TxFIFO Depth"] #[inline(always)] - #[must_use] pub fn ptx_fsize(&mut self) -> PTX_FSIZE_W { PTX_FSIZE_W::new(self, 16) } diff --git a/src/usb0/hptxsts.rs b/src/usb0/hptxsts.rs index 2b4c6302..dc6a57e8 100644 --- a/src/usb0/hptxsts.rs +++ b/src/usb0/hptxsts.rs @@ -147,7 +147,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Periodic Transmit Data FIFO Space Available"] #[inline(always)] - #[must_use] pub fn ptx_fspc_avail(&mut self) -> PTX_FSPC_AVAIL_W { PTX_FSPC_AVAIL_W::new(self, 0) } diff --git a/src/usb0/pcgcctl.rs b/src/usb0/pcgcctl.rs index 582a6784..58b75df0 100644 --- a/src/usb0/pcgcctl.rs +++ b/src/usb0/pcgcctl.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bit 0 - Stop Pclk"] #[inline(always)] - #[must_use] pub fn stop_pclk(&mut self) -> STOP_PCLK_W { STOP_PCLK_W::new(self, 0) } #[doc = "Bit 1 - Gate Hclk"] #[inline(always)] - #[must_use] pub fn gate_hclk(&mut self) -> GATE_HCLK_W { GATE_HCLK_W::new(self, 1) } diff --git a/src/usb0_ch0.rs b/src/usb0_ch0.rs index 6900dba4..8ef1def8 100644 --- a/src/usb0_ch0.rs +++ b/src/usb0_ch0.rs @@ -29,22 +29,22 @@ impl RegisterBlock { #[doc = "0x10 - Host Channel Transfer Size Register \\[SCATGATHER\\]"] #[inline(always)] pub const fn hctsiz_scatgather(&self) -> &HCTSIZ_SCATGATHER { - unsafe { &*(self as *const Self).cast::().add(16).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(16).cast() } } #[doc = "0x10 - Host Channel Transfer Size Register \\[BUFFERMODE\\]"] #[inline(always)] pub const fn hctsiz_buffermode(&self) -> &HCTSIZ_BUFFERMODE { - unsafe { &*(self as *const Self).cast::().add(16).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(16).cast() } } #[doc = "0x14 - Host Channel DMA Address Register \\[SCATGATHER\\]"] #[inline(always)] pub const fn hcdma_scatgather(&self) -> &HCDMA_SCATGATHER { - unsafe { &*(self as *const Self).cast::().add(20).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(20).cast() } } #[doc = "0x14 - Host Channel DMA Address Register \\[BUFFERMODE\\]"] #[inline(always)] pub const fn hcdma_buffermode(&self) -> &HCDMA_BUFFERMODE { - unsafe { &*(self as *const Self).cast::().add(20).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(20).cast() } } #[doc = "0x1c - Host Channel DMA Buffer Address Register"] #[inline(always)] diff --git a/src/usb0_ch0/hcchar.rs b/src/usb0_ch0/hcchar.rs index 76f1808c..c741c9ab 100644 --- a/src/usb0_ch0/hcchar.rs +++ b/src/usb0_ch0/hcchar.rs @@ -386,55 +386,46 @@ impl R { impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - #[must_use] pub fn mps(&mut self) -> MPS_W { MPS_W::new(self, 0) } #[doc = "Bits 11:14 - Endpoint Number"] #[inline(always)] - #[must_use] pub fn epnum(&mut self) -> EPNUM_W { EPNUM_W::new(self, 11) } #[doc = "Bit 15 - Endpoint Direction"] #[inline(always)] - #[must_use] pub fn epdir(&mut self) -> EPDIR_W { EPDIR_W::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - #[must_use] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W::new(self, 18) } #[doc = "Bits 20:21 - Multi Count / Error Count"] #[inline(always)] - #[must_use] pub fn mc_ec(&mut self) -> MC_EC_W { MC_EC_W::new(self, 20) } #[doc = "Bits 22:28 - Device Address"] #[inline(always)] - #[must_use] pub fn dev_addr(&mut self) -> DEV_ADDR_W { DEV_ADDR_W::new(self, 22) } #[doc = "Bit 29 - Odd Frame"] #[inline(always)] - #[must_use] pub fn odd_frm(&mut self) -> ODD_FRM_W { ODD_FRM_W::new(self, 29) } #[doc = "Bit 30 - Channel Disable"] #[inline(always)] - #[must_use] pub fn ch_dis(&mut self) -> CH_DIS_W { CH_DIS_W::new(self, 30) } #[doc = "Bit 31 - Channel Enable"] #[inline(always)] - #[must_use] pub fn ch_ena(&mut self) -> CH_ENA_W { CH_ENA_W::new(self, 31) } diff --git a/src/usb0_ch0/hcdma_buffermode.rs b/src/usb0_ch0/hcdma_buffermode.rs index 8b5519be..5a4ff29f 100644 --- a/src/usb0_ch0/hcdma_buffermode.rs +++ b/src/usb0_ch0/hcdma_buffermode.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - #[must_use] pub fn dmaaddr(&mut self) -> DMAADDR_W { DMAADDR_W::new(self, 0) } diff --git a/src/usb0_ch0/hcdma_scatgather.rs b/src/usb0_ch0/hcdma_scatgather.rs index 293e9a2c..a9901ca2 100644 --- a/src/usb0_ch0/hcdma_scatgather.rs +++ b/src/usb0_ch0/hcdma_scatgather.rs @@ -81,13 +81,11 @@ impl R { impl W { #[doc = "Bits 3:8 - Current Transfer Desc:"] #[inline(always)] - #[must_use] pub fn ctd(&mut self) -> CTD_W { CTD_W::new(self, 3) } #[doc = "Bits 9:31 - DMA Address"] #[inline(always)] - #[must_use] pub fn dmaaddr(&mut self) -> DMAADDR_W { DMAADDR_W::new(self, 9) } diff --git a/src/usb0_ch0/hcint.rs b/src/usb0_ch0/hcint.rs index 0c5ba92e..fb2155c0 100644 --- a/src/usb0_ch0/hcint.rs +++ b/src/usb0_ch0/hcint.rs @@ -133,85 +133,71 @@ impl R { impl W { #[doc = "Bit 0 - Transfer Completed"] #[inline(always)] - #[must_use] pub fn xfer_compl(&mut self) -> XFER_COMPL_W { XFER_COMPL_W::new(self, 0) } #[doc = "Bit 1 - Channel Halted"] #[inline(always)] - #[must_use] pub fn ch_hltd(&mut self) -> CH_HLTD_W { CH_HLTD_W::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - #[must_use] pub fn ahberr(&mut self) -> AHBERR_W { AHBERR_W::new(self, 2) } #[doc = "Bit 3 - STALL Response Received Interrupt"] #[inline(always)] - #[must_use] pub fn stall(&mut self) -> STALL_W { STALL_W::new(self, 3) } #[doc = "Bit 4 - NAK Response Received Interrupt"] #[inline(always)] - #[must_use] pub fn nak(&mut self) -> NAK_W { NAK_W::new(self, 4) } #[doc = "Bit 5 - ACK Response Received/Transmitted Interrupt"] #[inline(always)] - #[must_use] pub fn ack(&mut self) -> ACK_W { ACK_W::new(self, 5) } #[doc = "Bit 6 - NYET Response Received Interrupt"] #[inline(always)] - #[must_use] pub fn nyet(&mut self) -> NYET_W { NYET_W::new(self, 6) } #[doc = "Bit 7 - Transaction Error"] #[inline(always)] - #[must_use] pub fn xact_err(&mut self) -> XACT_ERR_W { XACT_ERR_W::new(self, 7) } #[doc = "Bit 8 - Babble Error"] #[inline(always)] - #[must_use] pub fn bbl_err(&mut self) -> BBL_ERR_W { BBL_ERR_W::new(self, 8) } #[doc = "Bit 9 - Frame Overrun"] #[inline(always)] - #[must_use] pub fn frm_ovrun(&mut self) -> FRM_OVRUN_W { FRM_OVRUN_W::new(self, 9) } #[doc = "Bit 10 - Data Toggle Error"] #[inline(always)] - #[must_use] pub fn data_tgl_err(&mut self) -> DATA_TGL_ERR_W { DATA_TGL_ERR_W::new(self, 10) } #[doc = "Bit 11 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - #[must_use] pub fn bnaintr(&mut self) -> BNAINTR_W { BNAINTR_W::new(self, 11) } #[doc = "Bit 12 - Excessive Transaction Error"] #[inline(always)] - #[must_use] pub fn xcs_xact_err(&mut self) -> XCS_XACT_ERR_W { XCS_XACT_ERR_W::new(self, 12) } #[doc = "Bit 13 - Descriptor rollover interrupt"] #[inline(always)] - #[must_use] pub fn desc_lst_rollintr(&mut self) -> DESC_LST_ROLLINTR_W { DESC_LST_ROLLINTR_W::new(self, 13) } diff --git a/src/usb0_ch0/hcintmsk.rs b/src/usb0_ch0/hcintmsk.rs index 5ce49881..c89727b8 100644 --- a/src/usb0_ch0/hcintmsk.rs +++ b/src/usb0_ch0/hcintmsk.rs @@ -124,79 +124,66 @@ impl R { impl W { #[doc = "Bit 0 - Transfer Completed Mask"] #[inline(always)] - #[must_use] pub fn xfer_compl_msk(&mut self) -> XFER_COMPL_MSK_W { XFER_COMPL_MSK_W::new(self, 0) } #[doc = "Bit 1 - Channel Halted Mask"] #[inline(always)] - #[must_use] pub fn ch_hltd_msk(&mut self) -> CH_HLTD_MSK_W { CH_HLTD_MSK_W::new(self, 1) } #[doc = "Bit 2 - AHB Error Mask"] #[inline(always)] - #[must_use] pub fn ahberr_msk(&mut self) -> AHBERR_MSK_W { AHBERR_MSK_W::new(self, 2) } #[doc = "Bit 3 - STALL Response Received Interrupt Mask"] #[inline(always)] - #[must_use] pub fn stall_msk(&mut self) -> STALL_MSK_W { STALL_MSK_W::new(self, 3) } #[doc = "Bit 4 - NAK Response Received Interrupt Mask"] #[inline(always)] - #[must_use] pub fn nak_msk(&mut self) -> NAK_MSK_W { NAK_MSK_W::new(self, 4) } #[doc = "Bit 5 - ACK Response Received/Transmitted Interrupt Mask"] #[inline(always)] - #[must_use] pub fn ack_msk(&mut self) -> ACK_MSK_W { ACK_MSK_W::new(self, 5) } #[doc = "Bit 6 - NYET Response Received Interrupt Mask"] #[inline(always)] - #[must_use] pub fn nyet_msk(&mut self) -> NYET_MSK_W { NYET_MSK_W::new(self, 6) } #[doc = "Bit 7 - Transaction Error Mask"] #[inline(always)] - #[must_use] pub fn xact_err_msk(&mut self) -> XACT_ERR_MSK_W { XACT_ERR_MSK_W::new(self, 7) } #[doc = "Bit 8 - Babble Error Mask"] #[inline(always)] - #[must_use] pub fn bbl_err_msk(&mut self) -> BBL_ERR_MSK_W { BBL_ERR_MSK_W::new(self, 8) } #[doc = "Bit 9 - Frame Overrun Mask"] #[inline(always)] - #[must_use] pub fn frm_ovrun_msk(&mut self) -> FRM_OVRUN_MSK_W { FRM_OVRUN_MSK_W::new(self, 9) } #[doc = "Bit 10 - Data Toggle Error Mask"] #[inline(always)] - #[must_use] pub fn data_tgl_err_msk(&mut self) -> DATA_TGL_ERR_MSK_W { DATA_TGL_ERR_MSK_W::new(self, 10) } #[doc = "Bit 11 - BNA (Buffer Not Available) Interrupt mask register"] #[inline(always)] - #[must_use] pub fn bnaintr_msk(&mut self) -> BNAINTR_MSK_W { BNAINTR_MSK_W::new(self, 11) } #[doc = "Bit 13 - Descriptor rollover interrupt Mask register"] #[inline(always)] - #[must_use] pub fn desc_lst_rollintr_msk(&mut self) -> DESC_LST_ROLLINTR_MSK_W { DESC_LST_ROLLINTR_MSK_W::new(self, 13) } diff --git a/src/usb0_ch0/hctsiz_buffermode.rs b/src/usb0_ch0/hctsiz_buffermode.rs index 6cebb853..b1d1b10c 100644 --- a/src/usb0_ch0/hctsiz_buffermode.rs +++ b/src/usb0_ch0/hctsiz_buffermode.rs @@ -116,19 +116,16 @@ impl R { impl W { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] - #[must_use] pub fn xfer_size(&mut self) -> XFER_SIZE_W { XFER_SIZE_W::new(self, 0) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] - #[must_use] pub fn pkt_cnt(&mut self) -> PKT_CNT_W { PKT_CNT_W::new(self, 19) } #[doc = "Bits 29:30 - PID"] #[inline(always)] - #[must_use] pub fn pid(&mut self) -> PID_W { PID_W::new(self, 29) } diff --git a/src/usb0_ch0/hctsiz_scatgather.rs b/src/usb0_ch0/hctsiz_scatgather.rs index 08066bde..9cb2eabc 100644 --- a/src/usb0_ch0/hctsiz_scatgather.rs +++ b/src/usb0_ch0/hctsiz_scatgather.rs @@ -116,19 +116,16 @@ impl R { impl W { #[doc = "Bits 0:7 - Schedule information"] #[inline(always)] - #[must_use] pub fn sched_info(&mut self) -> SCHED_INFO_W { SCHED_INFO_W::new(self, 0) } #[doc = "Bits 8:15 - Number of Transfer Descriptors: 0=1 descriptor, 63=64 descriptors, 1=2 descriptors, 3=4 descriptors, 7=8 descriptors, 15=16 descriptors, 31=32 descriptors, 63=64 descriptors,"] #[inline(always)] - #[must_use] pub fn ntd(&mut self) -> NTD_W { NTD_W::new(self, 8) } #[doc = "Bits 29:30 - PID"] #[inline(always)] - #[must_use] pub fn pid(&mut self) -> PID_W { PID_W::new(self, 29) } diff --git a/src/usb0_ep0/diepctl0.rs b/src/usb0_ep0/diepctl0.rs index 2d21e517..9865b6df 100644 --- a/src/usb0_ep0/diepctl0.rs +++ b/src/usb0_ep0/diepctl0.rs @@ -193,43 +193,36 @@ impl R { impl W { #[doc = "Bits 0:1 - Maximum Packet Size"] #[inline(always)] - #[must_use] pub fn mps(&mut self) -> MPS_W { MPS_W::new(self, 0) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - #[must_use] pub fn stall(&mut self) -> STALL_W { STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - #[must_use] pub fn tx_fnum(&mut self) -> TX_FNUM_W { TX_FNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] - #[must_use] pub fn cnak(&mut self) -> CNAK_W { CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] - #[must_use] pub fn snak(&mut self) -> SNAK_W { SNAK_W::new(self, 27) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - #[must_use] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - #[must_use] pub fn epena(&mut self) -> EPENA_W { EPENA_W::new(self, 31) } diff --git a/src/usb0_ep0/diepdma0.rs b/src/usb0_ep0/diepdma0.rs index ea895738..7c08fd6e 100644 --- a/src/usb0_ep0/diepdma0.rs +++ b/src/usb0_ep0/diepdma0.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - #[must_use] pub fn dmaaddr(&mut self) -> DMAADDR_W { DMAADDR_W::new(self, 0) } diff --git a/src/usb0_ep0/diepint0.rs b/src/usb0_ep0/diepint0.rs index 13241c3b..bdabc316 100644 --- a/src/usb0_ep0/diepint0.rs +++ b/src/usb0_ep0/diepint0.rs @@ -77,43 +77,36 @@ impl R { impl W { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] - #[must_use] pub fn xfer_compl(&mut self) -> XFER_COMPL_W { XFER_COMPL_W::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] - #[must_use] pub fn epdisbld(&mut self) -> EPDISBLD_W { EPDISBLD_W::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - #[must_use] pub fn ahberr(&mut self) -> AHBERR_W { AHBERR_W::new(self, 2) } #[doc = "Bit 3 - Timeout Condition"] #[inline(always)] - #[must_use] pub fn time_out(&mut self) -> TIME_OUT_W { TIME_OUT_W::new(self, 3) } #[doc = "Bit 4 - IN Token Received When TxFIFO is Empty"] #[inline(always)] - #[must_use] pub fn intkn_txfemp(&mut self) -> INTKN_TXFEMP_W { INTKN_TXFEMP_W::new(self, 4) } #[doc = "Bit 6 - IN Endpoint NAK Effective"] #[inline(always)] - #[must_use] pub fn inepnak_eff(&mut self) -> INEPNAK_EFF_W { INEPNAK_EFF_W::new(self, 6) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - #[must_use] pub fn bnaintr(&mut self) -> BNAINTR_W { BNAINTR_W::new(self, 9) } diff --git a/src/usb0_ep0/dieptsiz0.rs b/src/usb0_ep0/dieptsiz0.rs index 806450a0..167912c4 100644 --- a/src/usb0_ep0/dieptsiz0.rs +++ b/src/usb0_ep0/dieptsiz0.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:6 - Transfer Size"] #[inline(always)] - #[must_use] pub fn xfer_size(&mut self) -> XFER_SIZE_W { XFER_SIZE_W::new(self, 0) } #[doc = "Bits 19:20 - Packet Count"] #[inline(always)] - #[must_use] pub fn pkt_cnt(&mut self) -> PKT_CNT_W { PKT_CNT_W::new(self, 19) } diff --git a/src/usb0_ep0/doepctl0.rs b/src/usb0_ep0/doepctl0.rs index bb11db50..bd573291 100644 --- a/src/usb0_ep0/doepctl0.rs +++ b/src/usb0_ep0/doepctl0.rs @@ -163,31 +163,26 @@ impl R { impl W { #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - #[must_use] pub fn snp(&mut self) -> SNP_W { SNP_W::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - #[must_use] pub fn stall(&mut self) -> STALL_W { STALL_W::new(self, 21) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] - #[must_use] pub fn cnak(&mut self) -> CNAK_W { CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] - #[must_use] pub fn snak(&mut self) -> SNAK_W { SNAK_W::new(self, 27) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - #[must_use] pub fn epena(&mut self) -> EPENA_W { EPENA_W::new(self, 31) } diff --git a/src/usb0_ep0/doepdma0.rs b/src/usb0_ep0/doepdma0.rs index 97ec7c03..fa62c351 100644 --- a/src/usb0_ep0/doepdma0.rs +++ b/src/usb0_ep0/doepdma0.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - #[must_use] pub fn dmaaddr(&mut self) -> DMAADDR_W { DMAADDR_W::new(self, 0) } diff --git a/src/usb0_ep0/doepint0.rs b/src/usb0_ep0/doepint0.rs index 989701f4..32a9c6ae 100644 --- a/src/usb0_ep0/doepint0.rs +++ b/src/usb0_ep0/doepint0.rs @@ -115,73 +115,61 @@ impl R { impl W { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] - #[must_use] pub fn xfer_compl(&mut self) -> XFER_COMPL_W { XFER_COMPL_W::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] - #[must_use] pub fn epdisbld(&mut self) -> EPDISBLD_W { EPDISBLD_W::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - #[must_use] pub fn ahberr(&mut self) -> AHBERR_W { AHBERR_W::new(self, 2) } #[doc = "Bit 3 - SETUP Phase Done"] #[inline(always)] - #[must_use] pub fn set_up(&mut self) -> SET_UP_W { SET_UP_W::new(self, 3) } #[doc = "Bit 4 - OUT Token Received When Endpoint Disabled"] #[inline(always)] - #[must_use] pub fn outtkn_epdis(&mut self) -> OUTTKN_EPDIS_W { OUTTKN_EPDIS_W::new(self, 4) } #[doc = "Bit 5 - Status Phase Received For Control Write"] #[inline(always)] - #[must_use] pub fn sts_phse_rcvd(&mut self) -> STS_PHSE_RCVD_W { STS_PHSE_RCVD_W::new(self, 5) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received"] #[inline(always)] - #[must_use] pub fn back2back_setup(&mut self) -> BACK2BACK_SETUP_W { BACK2BACK_SETUP_W::new(self, 6) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - #[must_use] pub fn bnaintr(&mut self) -> BNAINTR_W { BNAINTR_W::new(self, 9) } #[doc = "Bit 11 - Packet Dropped Status"] #[inline(always)] - #[must_use] pub fn pkt_drp_sts(&mut self) -> PKT_DRP_STS_W { PKT_DRP_STS_W::new(self, 11) } #[doc = "Bit 12 - BbleErr (Babble Error) interrupt"] #[inline(always)] - #[must_use] pub fn bble_err_intrpt(&mut self) -> BBLE_ERR_INTRPT_W { BBLE_ERR_INTRPT_W::new(self, 12) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] - #[must_use] pub fn nakintrpt(&mut self) -> NAKINTRPT_W { NAKINTRPT_W::new(self, 13) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] - #[must_use] pub fn nyetintrpt(&mut self) -> NYETINTRPT_W { NYETINTRPT_W::new(self, 14) } diff --git a/src/usb0_ep0/doeptsiz0.rs b/src/usb0_ep0/doeptsiz0.rs index a2dcb269..c48cb653 100644 --- a/src/usb0_ep0/doeptsiz0.rs +++ b/src/usb0_ep0/doeptsiz0.rs @@ -103,19 +103,16 @@ impl R { impl W { #[doc = "Bits 0:6 - Transfer Size"] #[inline(always)] - #[must_use] pub fn xfer_size(&mut self) -> XFER_SIZE_W { XFER_SIZE_W::new(self, 0) } #[doc = "Bits 19:20 - Packet Count"] #[inline(always)] - #[must_use] pub fn pkt_cnt(&mut self) -> PKT_CNT_W { PKT_CNT_W::new(self, 19) } #[doc = "Bits 29:30 - SETUP Packet Count"] #[inline(always)] - #[must_use] pub fn supcnt(&mut self) -> SUPCNT_W { SUPCNT_W::new(self, 29) } diff --git a/src/usb0_ep1.rs b/src/usb0_ep1.rs index 51917522..1a1286b3 100644 --- a/src/usb0_ep1.rs +++ b/src/usb0_ep1.rs @@ -23,12 +23,12 @@ impl RegisterBlock { #[doc = "0x00 - Device Endpoint Control Register \\[INTBULK\\]"] #[inline(always)] pub const fn diepctl_intbulk(&self) -> &DIEPCTL_INTBULK { - unsafe { &*(self as *const Self).cast::().add(0).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().cast() } } #[doc = "0x00 - Device Endpoint Control Register \\[ISOCONT\\]"] #[inline(always)] pub const fn diepctl_isocont(&self) -> &DIEPCTL_ISOCONT { - unsafe { &*(self as *const Self).cast::().add(0).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().cast() } } #[doc = "0x08 - Device Endpoint Interrupt Register"] #[inline(always)] @@ -58,12 +58,12 @@ impl RegisterBlock { #[doc = "0x200 - Device Endpoint Control Register \\[INTBULK\\]"] #[inline(always)] pub const fn doepctl_intbulk(&self) -> &DOEPCTL_INTBULK { - unsafe { &*(self as *const Self).cast::().add(512).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(512).cast() } } #[doc = "0x200 - Device Endpoint Control Register \\[ISOCONT\\]"] #[inline(always)] pub const fn doepctl_isocont(&self) -> &DOEPCTL_ISOCONT { - unsafe { &*(self as *const Self).cast::().add(512).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(512).cast() } } #[doc = "0x208 - Device Endpoint Interrupt Register"] #[inline(always)] @@ -73,12 +73,12 @@ impl RegisterBlock { #[doc = "0x210 - Device Endpoint Transfer Size Register \\[CONT\\]"] #[inline(always)] pub const fn doeptsiz_control(&self) -> &DOEPTSIZ_CONTROL { - unsafe { &*(self as *const Self).cast::().add(528).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(528).cast() } } #[doc = "0x210 - Device Endpoint Transfer Size Register \\[ISO\\]"] #[inline(always)] pub const fn doeptsiz_iso(&self) -> &DOEPTSIZ_ISO { - unsafe { &*(self as *const Self).cast::().add(528).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(528).cast() } } #[doc = "0x214 - Device Endpoint DMA Address Register"] #[inline(always)] diff --git a/src/usb0_ep1/diepctl_intbulk.rs b/src/usb0_ep1/diepctl_intbulk.rs index c22f3a0f..ee5f6cfd 100644 --- a/src/usb0_ep1/diepctl_intbulk.rs +++ b/src/usb0_ep1/diepctl_intbulk.rs @@ -251,73 +251,61 @@ impl R { impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - #[must_use] pub fn mps(&mut self) -> MPS_W { MPS_W::new(self, 0) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - #[must_use] pub fn usbact_ep(&mut self) -> USBACT_EP_W { USBACT_EP_W::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - #[must_use] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W::new(self, 18) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - #[must_use] pub fn snp(&mut self) -> SNP_W { SNP_W::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - #[must_use] pub fn stall(&mut self) -> STALL_W { STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - #[must_use] pub fn tx_fnum(&mut self) -> TX_FNUM_W { TX_FNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] - #[must_use] pub fn cnak(&mut self) -> CNAK_W { CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] - #[must_use] pub fn snak(&mut self) -> SNAK_W { SNAK_W::new(self, 27) } #[doc = "Bit 28 - Set DATA0 PID"] #[inline(always)] - #[must_use] pub fn set_d0pid(&mut self) -> SET_D0PID_W { SET_D0PID_W::new(self, 28) } #[doc = "Bit 29 - 29 Set DATA1 PID"] #[inline(always)] - #[must_use] pub fn set_d1pid(&mut self) -> SET_D1PID_W { SET_D1PID_W::new(self, 29) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - #[must_use] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - #[must_use] pub fn epena(&mut self) -> EPENA_W { EPENA_W::new(self, 31) } diff --git a/src/usb0_ep1/diepctl_isocont.rs b/src/usb0_ep1/diepctl_isocont.rs index 97543e7d..2b8e2a2c 100644 --- a/src/usb0_ep1/diepctl_isocont.rs +++ b/src/usb0_ep1/diepctl_isocont.rs @@ -251,73 +251,61 @@ impl R { impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - #[must_use] pub fn mps(&mut self) -> MPS_W { MPS_W::new(self, 0) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - #[must_use] pub fn usbact_ep(&mut self) -> USBACT_EP_W { USBACT_EP_W::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - #[must_use] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W::new(self, 18) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - #[must_use] pub fn snp(&mut self) -> SNP_W { SNP_W::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - #[must_use] pub fn stall(&mut self) -> STALL_W { STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - #[must_use] pub fn tx_fnum(&mut self) -> TX_FNUM_W { TX_FNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] - #[must_use] pub fn cnak(&mut self) -> CNAK_W { CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] - #[must_use] pub fn snak(&mut self) -> SNAK_W { SNAK_W::new(self, 27) } #[doc = "Bit 28 - In non-Scatter/Gather DMA mode: Set Even frame"] #[inline(always)] - #[must_use] pub fn set_even_fr(&mut self) -> SET_EVEN_FR_W { SET_EVEN_FR_W::new(self, 28) } #[doc = "Bit 29 - Set Odd frame"] #[inline(always)] - #[must_use] pub fn set_odd_fr(&mut self) -> SET_ODD_FR_W { SET_ODD_FR_W::new(self, 29) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - #[must_use] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - #[must_use] pub fn epena(&mut self) -> EPENA_W { EPENA_W::new(self, 31) } diff --git a/src/usb0_ep1/diepdma.rs b/src/usb0_ep1/diepdma.rs index 535143ff..eb97b7da 100644 --- a/src/usb0_ep1/diepdma.rs +++ b/src/usb0_ep1/diepdma.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - #[must_use] pub fn dmaaddr(&mut self) -> DMAADDR_W { DMAADDR_W::new(self, 0) } diff --git a/src/usb0_ep1/diepint.rs b/src/usb0_ep1/diepint.rs index abf99acc..c49f0398 100644 --- a/src/usb0_ep1/diepint.rs +++ b/src/usb0_ep1/diepint.rs @@ -77,43 +77,36 @@ impl R { impl W { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] - #[must_use] pub fn xfer_compl(&mut self) -> XFER_COMPL_W { XFER_COMPL_W::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] - #[must_use] pub fn epdisbld(&mut self) -> EPDISBLD_W { EPDISBLD_W::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - #[must_use] pub fn ahberr(&mut self) -> AHBERR_W { AHBERR_W::new(self, 2) } #[doc = "Bit 3 - Timeout Condition"] #[inline(always)] - #[must_use] pub fn time_out(&mut self) -> TIME_OUT_W { TIME_OUT_W::new(self, 3) } #[doc = "Bit 4 - IN Token Received When TxFIFO is Empty"] #[inline(always)] - #[must_use] pub fn intkn_txfemp(&mut self) -> INTKN_TXFEMP_W { INTKN_TXFEMP_W::new(self, 4) } #[doc = "Bit 6 - IN Endpoint NAK Effective"] #[inline(always)] - #[must_use] pub fn inepnak_eff(&mut self) -> INEPNAK_EFF_W { INEPNAK_EFF_W::new(self, 6) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - #[must_use] pub fn bnaintr(&mut self) -> BNAINTR_W { BNAINTR_W::new(self, 9) } diff --git a/src/usb0_ep1/dieptsiz.rs b/src/usb0_ep1/dieptsiz.rs index 15b5c443..53ab966b 100644 --- a/src/usb0_ep1/dieptsiz.rs +++ b/src/usb0_ep1/dieptsiz.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] - #[must_use] pub fn xfer_size(&mut self) -> XFER_SIZE_W { XFER_SIZE_W::new(self, 0) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] - #[must_use] pub fn pkt_cnt(&mut self) -> PKT_CNT_W { PKT_CNT_W::new(self, 19) } diff --git a/src/usb0_ep1/doepctl_intbulk.rs b/src/usb0_ep1/doepctl_intbulk.rs index d9dfddd4..e807fb57 100644 --- a/src/usb0_ep1/doepctl_intbulk.rs +++ b/src/usb0_ep1/doepctl_intbulk.rs @@ -251,73 +251,61 @@ impl R { impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - #[must_use] pub fn mps(&mut self) -> MPS_W { MPS_W::new(self, 0) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - #[must_use] pub fn usbact_ep(&mut self) -> USBACT_EP_W { USBACT_EP_W::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - #[must_use] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W::new(self, 18) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - #[must_use] pub fn snp(&mut self) -> SNP_W { SNP_W::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - #[must_use] pub fn stall(&mut self) -> STALL_W { STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - #[must_use] pub fn tx_fnum(&mut self) -> TX_FNUM_W { TX_FNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] - #[must_use] pub fn cnak(&mut self) -> CNAK_W { CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] - #[must_use] pub fn snak(&mut self) -> SNAK_W { SNAK_W::new(self, 27) } #[doc = "Bit 28 - Set DATA0 PID"] #[inline(always)] - #[must_use] pub fn set_d0pid(&mut self) -> SET_D0PID_W { SET_D0PID_W::new(self, 28) } #[doc = "Bit 29 - 29 Set DATA1 PID"] #[inline(always)] - #[must_use] pub fn set_d1pid(&mut self) -> SET_D1PID_W { SET_D1PID_W::new(self, 29) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - #[must_use] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - #[must_use] pub fn epena(&mut self) -> EPENA_W { EPENA_W::new(self, 31) } diff --git a/src/usb0_ep1/doepctl_isocont.rs b/src/usb0_ep1/doepctl_isocont.rs index fe9261aa..e8a6a0ec 100644 --- a/src/usb0_ep1/doepctl_isocont.rs +++ b/src/usb0_ep1/doepctl_isocont.rs @@ -251,73 +251,61 @@ impl R { impl W { #[doc = "Bits 0:10 - Maximum Packet Size"] #[inline(always)] - #[must_use] pub fn mps(&mut self) -> MPS_W { MPS_W::new(self, 0) } #[doc = "Bit 15 - USB Active Endpoint"] #[inline(always)] - #[must_use] pub fn usbact_ep(&mut self) -> USBACT_EP_W { USBACT_EP_W::new(self, 15) } #[doc = "Bits 18:19 - Endpoint Type"] #[inline(always)] - #[must_use] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W::new(self, 18) } #[doc = "Bit 20 - Snoop Mode"] #[inline(always)] - #[must_use] pub fn snp(&mut self) -> SNP_W { SNP_W::new(self, 20) } #[doc = "Bit 21 - STALL Handshake"] #[inline(always)] - #[must_use] pub fn stall(&mut self) -> STALL_W { STALL_W::new(self, 21) } #[doc = "Bits 22:25 - TxFIFO Number"] #[inline(always)] - #[must_use] pub fn tx_fnum(&mut self) -> TX_FNUM_W { TX_FNUM_W::new(self, 22) } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] - #[must_use] pub fn cnak(&mut self) -> CNAK_W { CNAK_W::new(self, 26) } #[doc = "Bit 27 - Set NAK"] #[inline(always)] - #[must_use] pub fn snak(&mut self) -> SNAK_W { SNAK_W::new(self, 27) } #[doc = "Bit 28 - In non-Scatter/Gather DMA mode: Set Even frame"] #[inline(always)] - #[must_use] pub fn set_even_fr(&mut self) -> SET_EVEN_FR_W { SET_EVEN_FR_W::new(self, 28) } #[doc = "Bit 29 - Set Odd frame"] #[inline(always)] - #[must_use] pub fn set_odd_fr(&mut self) -> SET_ODD_FR_W { SET_ODD_FR_W::new(self, 29) } #[doc = "Bit 30 - Endpoint Disable"] #[inline(always)] - #[must_use] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W::new(self, 30) } #[doc = "Bit 31 - Endpoint Enable"] #[inline(always)] - #[must_use] pub fn epena(&mut self) -> EPENA_W { EPENA_W::new(self, 31) } diff --git a/src/usb0_ep1/doepdma.rs b/src/usb0_ep1/doepdma.rs index 21356edb..e1ec0119 100644 --- a/src/usb0_ep1/doepdma.rs +++ b/src/usb0_ep1/doepdma.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - DMA Address"] #[inline(always)] - #[must_use] pub fn dmaaddr(&mut self) -> DMAADDR_W { DMAADDR_W::new(self, 0) } diff --git a/src/usb0_ep1/doepint.rs b/src/usb0_ep1/doepint.rs index dc1f8660..aee1d2b1 100644 --- a/src/usb0_ep1/doepint.rs +++ b/src/usb0_ep1/doepint.rs @@ -115,73 +115,61 @@ impl R { impl W { #[doc = "Bit 0 - Transfer Completed Interrupt"] #[inline(always)] - #[must_use] pub fn xfer_compl(&mut self) -> XFER_COMPL_W { XFER_COMPL_W::new(self, 0) } #[doc = "Bit 1 - Endpoint Disabled Interrupt"] #[inline(always)] - #[must_use] pub fn epdisbld(&mut self) -> EPDISBLD_W { EPDISBLD_W::new(self, 1) } #[doc = "Bit 2 - AHB Error"] #[inline(always)] - #[must_use] pub fn ahberr(&mut self) -> AHBERR_W { AHBERR_W::new(self, 2) } #[doc = "Bit 3 - SETUP Phase Done"] #[inline(always)] - #[must_use] pub fn set_up(&mut self) -> SET_UP_W { SET_UP_W::new(self, 3) } #[doc = "Bit 4 - OUT Token Received When Endpoint Disabled"] #[inline(always)] - #[must_use] pub fn outtkn_epdis(&mut self) -> OUTTKN_EPDIS_W { OUTTKN_EPDIS_W::new(self, 4) } #[doc = "Bit 5 - Status Phase Received For Control Write"] #[inline(always)] - #[must_use] pub fn sts_phse_rcvd(&mut self) -> STS_PHSE_RCVD_W { STS_PHSE_RCVD_W::new(self, 5) } #[doc = "Bit 6 - Back-to-Back SETUP Packets Received"] #[inline(always)] - #[must_use] pub fn back2back_setup(&mut self) -> BACK2BACK_SETUP_W { BACK2BACK_SETUP_W::new(self, 6) } #[doc = "Bit 9 - BNA (Buffer Not Available) Interrupt"] #[inline(always)] - #[must_use] pub fn bnaintr(&mut self) -> BNAINTR_W { BNAINTR_W::new(self, 9) } #[doc = "Bit 11 - Packet Dropped Status"] #[inline(always)] - #[must_use] pub fn pkt_drp_sts(&mut self) -> PKT_DRP_STS_W { PKT_DRP_STS_W::new(self, 11) } #[doc = "Bit 12 - BbleErr (Babble Error) interrupt"] #[inline(always)] - #[must_use] pub fn bble_err_intrpt(&mut self) -> BBLE_ERR_INTRPT_W { BBLE_ERR_INTRPT_W::new(self, 12) } #[doc = "Bit 13 - NAK interrupt"] #[inline(always)] - #[must_use] pub fn nakintrpt(&mut self) -> NAKINTRPT_W { NAKINTRPT_W::new(self, 13) } #[doc = "Bit 14 - NYET interrupt"] #[inline(always)] - #[must_use] pub fn nyetintrpt(&mut self) -> NYETINTRPT_W { NYETINTRPT_W::new(self, 14) } diff --git a/src/usb0_ep1/doeptsiz_control.rs b/src/usb0_ep1/doeptsiz_control.rs index f65f4ce3..1dcf811f 100644 --- a/src/usb0_ep1/doeptsiz_control.rs +++ b/src/usb0_ep1/doeptsiz_control.rs @@ -34,19 +34,16 @@ impl R { impl W { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] - #[must_use] pub fn xfer_size(&mut self) -> XFER_SIZE_W { XFER_SIZE_W::new(self, 0) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] - #[must_use] pub fn pkt_cnt(&mut self) -> PKT_CNT_W { PKT_CNT_W::new(self, 19) } #[doc = "Bits 29:30 - SETUP Packet Count: 0b00=1 packet, 0b00=2 packets, 0b00=3 packets,"] #[inline(always)] - #[must_use] pub fn supcnt(&mut self) -> SUPCNT_W { SUPCNT_W::new(self, 29) } diff --git a/src/usb0_ep1/doeptsiz_iso.rs b/src/usb0_ep1/doeptsiz_iso.rs index 68ad84bc..b4ba3e9f 100644 --- a/src/usb0_ep1/doeptsiz_iso.rs +++ b/src/usb0_ep1/doeptsiz_iso.rs @@ -88,13 +88,11 @@ impl R { impl W { #[doc = "Bits 0:18 - Transfer Size"] #[inline(always)] - #[must_use] pub fn xfer_size(&mut self) -> XFER_SIZE_W { XFER_SIZE_W::new(self, 0) } #[doc = "Bits 19:28 - Packet Count"] #[inline(always)] - #[must_use] pub fn pkt_cnt(&mut self) -> PKT_CNT_W { PKT_CNT_W::new(self, 19) } diff --git a/src/usic0_ch0.rs b/src/usic0_ch0.rs index 577c0dbe..9eace0f4 100644 --- a/src/usic0_ch0.rs +++ b/src/usic0_ch0.rs @@ -111,27 +111,27 @@ impl RegisterBlock { #[doc = "0x3c - Protocol Control Register \\[IIS Mode\\]"] #[inline(always)] pub const fn pcr_iismode(&self) -> &PCR_IISMODE { - unsafe { &*(self as *const Self).cast::().add(60).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(60).cast() } } #[doc = "0x3c - Protocol Control Register \\[IIC Mode\\]"] #[inline(always)] pub const fn pcr_iicmode(&self) -> &PCR_IICMODE { - unsafe { &*(self as *const Self).cast::().add(60).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(60).cast() } } #[doc = "0x3c - Protocol Control Register \\[SSC Mode\\]"] #[inline(always)] pub const fn pcr_sscmode(&self) -> &PCR_SSCMODE { - unsafe { &*(self as *const Self).cast::().add(60).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(60).cast() } } #[doc = "0x3c - Protocol Control Register \\[ASC Mode\\]"] #[inline(always)] pub const fn pcr_ascmode(&self) -> &PCR_ASCMODE { - unsafe { &*(self as *const Self).cast::().add(60).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(60).cast() } } #[doc = "0x3c - Protocol Control Register"] #[inline(always)] pub const fn pcr(&self) -> &PCR { - unsafe { &*(self as *const Self).cast::().add(60).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(60).cast() } } #[doc = "0x40 - Channel Control Register"] #[inline(always)] @@ -146,27 +146,27 @@ impl RegisterBlock { #[doc = "0x48 - Protocol Status Register \\[IIS Mode\\]"] #[inline(always)] pub const fn psr_iismode(&self) -> &PSR_IISMODE { - unsafe { &*(self as *const Self).cast::().add(72).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(72).cast() } } #[doc = "0x48 - Protocol Status Register \\[IIC Mode\\]"] #[inline(always)] pub const fn psr_iicmode(&self) -> &PSR_IICMODE { - unsafe { &*(self as *const Self).cast::().add(72).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(72).cast() } } #[doc = "0x48 - Protocol Status Register \\[SSC Mode\\]"] #[inline(always)] pub const fn psr_sscmode(&self) -> &PSR_SSCMODE { - unsafe { &*(self as *const Self).cast::().add(72).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(72).cast() } } #[doc = "0x48 - Protocol Status Register \\[ASC Mode\\]"] #[inline(always)] pub const fn psr_ascmode(&self) -> &PSR_ASCMODE { - unsafe { &*(self as *const Self).cast::().add(72).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(72).cast() } } #[doc = "0x48 - Protocol Status Register"] #[inline(always)] pub const fn psr(&self) -> &PSR { - unsafe { &*(self as *const Self).cast::().add(72).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(72).cast() } } #[doc = "0x4c - Protocol Status Clear Register"] #[inline(always)] diff --git a/src/usic0_ch0/brg.rs b/src/usic0_ch0/brg.rs index f061d7a5..df60edda 100644 --- a/src/usic0_ch0/brg.rs +++ b/src/usic0_ch0/brg.rs @@ -526,61 +526,51 @@ impl R { impl W { #[doc = "Bits 0:1 - Clock Selection"] #[inline(always)] - #[must_use] pub fn clksel(&mut self) -> CLKSEL_W { CLKSEL_W::new(self, 0) } #[doc = "Bit 3 - Timing Measurement Enable"] #[inline(always)] - #[must_use] pub fn tmen(&mut self) -> TMEN_W { TMEN_W::new(self, 3) } #[doc = "Bit 4 - Enable 2:1 Divider for fPPP"] #[inline(always)] - #[must_use] pub fn pppen(&mut self) -> PPPEN_W { PPPEN_W::new(self, 4) } #[doc = "Bits 6:7 - Input Selection for CTQ"] #[inline(always)] - #[must_use] pub fn ctqsel(&mut self) -> CTQSEL_W { CTQSEL_W::new(self, 6) } #[doc = "Bits 8:9 - Pre-Divider for Time Quanta Counter"] #[inline(always)] - #[must_use] pub fn pctq(&mut self) -> PCTQ_W { PCTQ_W::new(self, 8) } #[doc = "Bits 10:14 - Denominator for Time Quanta Counter"] #[inline(always)] - #[must_use] pub fn dctq(&mut self) -> DCTQ_W { DCTQ_W::new(self, 10) } #[doc = "Bits 16:25 - Divider Mode: Divider Factor to Generate fPDIV"] #[inline(always)] - #[must_use] pub fn pdiv(&mut self) -> PDIV_W { PDIV_W::new(self, 16) } #[doc = "Bit 28 - Shift Clock Output Select"] #[inline(always)] - #[must_use] pub fn sclkosel(&mut self) -> SCLKOSEL_W { SCLKOSEL_W::new(self, 28) } #[doc = "Bit 29 - Master Clock Configuration"] #[inline(always)] - #[must_use] pub fn mclkcfg(&mut self) -> MCLKCFG_W { MCLKCFG_W::new(self, 29) } #[doc = "Bits 30:31 - Shift Clock Output Configuration"] #[inline(always)] - #[must_use] pub fn sclkcfg(&mut self) -> SCLKCFG_W { SCLKCFG_W::new(self, 30) } diff --git a/src/usic0_ch0/byp.rs b/src/usic0_ch0/byp.rs index 4fe75804..fe38bb34 100644 --- a/src/usic0_ch0/byp.rs +++ b/src/usic0_ch0/byp.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Bypass Data"] #[inline(always)] - #[must_use] pub fn bdata(&mut self) -> BDATA_W { BDATA_W::new(self, 0) } diff --git a/src/usic0_ch0/bypcr.rs b/src/usic0_ch0/bypcr.rs index c94c13a9..653a7ab9 100644 --- a/src/usic0_ch0/bypcr.rs +++ b/src/usic0_ch0/bypcr.rs @@ -340,43 +340,36 @@ impl R { impl W { #[doc = "Bits 0:3 - Bypass Word Length"] #[inline(always)] - #[must_use] pub fn bwle(&mut self) -> BWLE_W { BWLE_W::new(self, 0) } #[doc = "Bit 8 - Bypass Data Single Shot Mode"] #[inline(always)] - #[must_use] pub fn bdssm(&mut self) -> BDSSM_W { BDSSM_W::new(self, 8) } #[doc = "Bits 10:11 - Bypass Data Enable"] #[inline(always)] - #[must_use] pub fn bden(&mut self) -> BDEN_W { BDEN_W::new(self, 10) } #[doc = "Bit 12 - Bypass Data Valid Trigger"] #[inline(always)] - #[must_use] pub fn bdvtr(&mut self) -> BDVTR_W { BDVTR_W::new(self, 12) } #[doc = "Bit 13 - Bypass Priority"] #[inline(always)] - #[must_use] pub fn bprio(&mut self) -> BPRIO_W { BPRIO_W::new(self, 13) } #[doc = "Bits 16:20 - Bypass Select Outputs"] #[inline(always)] - #[must_use] pub fn bselo(&mut self) -> BSELO_W { BSELO_W::new(self, 16) } #[doc = "Bits 21:23 - Bypass Hardware Port Control"] #[inline(always)] - #[must_use] pub fn bhpc(&mut self) -> BHPC_W { BHPC_W::new(self, 21) } diff --git a/src/usic0_ch0/ccr.rs b/src/usic0_ch0/ccr.rs index 22464ba5..9e924c65 100644 --- a/src/usic0_ch0/ccr.rs +++ b/src/usic0_ch0/ccr.rs @@ -689,61 +689,51 @@ impl R { impl W { #[doc = "Bits 0:3 - Operating Mode"] #[inline(always)] - #[must_use] pub fn mode(&mut self) -> MODE_W { MODE_W::new(self, 0) } #[doc = "Bits 6:7 - Hardware Port Control Enable"] #[inline(always)] - #[must_use] pub fn hpcen(&mut self) -> HPCEN_W { HPCEN_W::new(self, 6) } #[doc = "Bits 8:9 - Parity Mode"] #[inline(always)] - #[must_use] pub fn pm(&mut self) -> PM_W { PM_W::new(self, 8) } #[doc = "Bit 10 - Receiver Start Interrupt Enable"] #[inline(always)] - #[must_use] pub fn rsien(&mut self) -> RSIEN_W { RSIEN_W::new(self, 10) } #[doc = "Bit 11 - Data Lost Interrupt Enable"] #[inline(always)] - #[must_use] pub fn dlien(&mut self) -> DLIEN_W { DLIEN_W::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Interrupt Enable"] #[inline(always)] - #[must_use] pub fn tsien(&mut self) -> TSIEN_W { TSIEN_W::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Interrupt Enable"] #[inline(always)] - #[must_use] pub fn tbien(&mut self) -> TBIEN_W { TBIEN_W::new(self, 13) } #[doc = "Bit 14 - Receive Interrupt Enable"] #[inline(always)] - #[must_use] pub fn rien(&mut self) -> RIEN_W { RIEN_W::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Interrupt Enable"] #[inline(always)] - #[must_use] pub fn aien(&mut self) -> AIEN_W { AIEN_W::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Interrupt Enable"] #[inline(always)] - #[must_use] pub fn brgien(&mut self) -> BRGIEN_W { BRGIEN_W::new(self, 16) } diff --git a/src/usic0_ch0/cmtr.rs b/src/usic0_ch0/cmtr.rs index 0db3b5ad..e5b65d10 100644 --- a/src/usic0_ch0/cmtr.rs +++ b/src/usic0_ch0/cmtr.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:9 - Captured Timer Value"] #[inline(always)] - #[must_use] pub fn ctv(&mut self) -> CTV_W { CTV_W::new(self, 0) } diff --git a/src/usic0_ch0/dx0cr.rs b/src/usic0_ch0/dx0cr.rs index 129f4094..42aa7a8f 100644 --- a/src/usic0_ch0/dx0cr.rs +++ b/src/usic0_ch0/dx0cr.rs @@ -572,43 +572,36 @@ impl R { impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - #[must_use] pub fn dsel(&mut self) -> DSEL_W { DSEL_W::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - #[must_use] pub fn insw(&mut self) -> INSW_W { INSW_W::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - #[must_use] pub fn dfen(&mut self) -> DFEN_W { DFEN_W::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - #[must_use] pub fn dsen(&mut self) -> DSEN_W { DSEN_W::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - #[must_use] pub fn dpol(&mut self) -> DPOL_W { DPOL_W::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - #[must_use] pub fn sfsel(&mut self) -> SFSEL_W { SFSEL_W::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - #[must_use] pub fn cm(&mut self) -> CM_W { CM_W::new(self, 10) } diff --git a/src/usic0_ch0/dx1cr.rs b/src/usic0_ch0/dx1cr.rs index 707c6902..6c7192ba 100644 --- a/src/usic0_ch0/dx1cr.rs +++ b/src/usic0_ch0/dx1cr.rs @@ -630,49 +630,41 @@ impl R { impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - #[must_use] pub fn dsel(&mut self) -> DSEL_W { DSEL_W::new(self, 0) } #[doc = "Bit 3 - Delay Compensation Enable"] #[inline(always)] - #[must_use] pub fn dcen(&mut self) -> DCEN_W { DCEN_W::new(self, 3) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - #[must_use] pub fn insw(&mut self) -> INSW_W { INSW_W::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - #[must_use] pub fn dfen(&mut self) -> DFEN_W { DFEN_W::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - #[must_use] pub fn dsen(&mut self) -> DSEN_W { DSEN_W::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - #[must_use] pub fn dpol(&mut self) -> DPOL_W { DPOL_W::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - #[must_use] pub fn sfsel(&mut self) -> SFSEL_W { SFSEL_W::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - #[must_use] pub fn cm(&mut self) -> CM_W { CM_W::new(self, 10) } diff --git a/src/usic0_ch0/dx2cr.rs b/src/usic0_ch0/dx2cr.rs index 6390e4a1..3ffc3a67 100644 --- a/src/usic0_ch0/dx2cr.rs +++ b/src/usic0_ch0/dx2cr.rs @@ -572,43 +572,36 @@ impl R { impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - #[must_use] pub fn dsel(&mut self) -> DSEL_W { DSEL_W::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - #[must_use] pub fn insw(&mut self) -> INSW_W { INSW_W::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - #[must_use] pub fn dfen(&mut self) -> DFEN_W { DFEN_W::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - #[must_use] pub fn dsen(&mut self) -> DSEN_W { DSEN_W::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - #[must_use] pub fn dpol(&mut self) -> DPOL_W { DPOL_W::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - #[must_use] pub fn sfsel(&mut self) -> SFSEL_W { SFSEL_W::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - #[must_use] pub fn cm(&mut self) -> CM_W { CM_W::new(self, 10) } diff --git a/src/usic0_ch0/dx3cr.rs b/src/usic0_ch0/dx3cr.rs index 808069e6..8ee5ca1c 100644 --- a/src/usic0_ch0/dx3cr.rs +++ b/src/usic0_ch0/dx3cr.rs @@ -572,43 +572,36 @@ impl R { impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - #[must_use] pub fn dsel(&mut self) -> DSEL_W { DSEL_W::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - #[must_use] pub fn insw(&mut self) -> INSW_W { INSW_W::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - #[must_use] pub fn dfen(&mut self) -> DFEN_W { DFEN_W::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - #[must_use] pub fn dsen(&mut self) -> DSEN_W { DSEN_W::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - #[must_use] pub fn dpol(&mut self) -> DPOL_W { DPOL_W::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - #[must_use] pub fn sfsel(&mut self) -> SFSEL_W { SFSEL_W::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - #[must_use] pub fn cm(&mut self) -> CM_W { CM_W::new(self, 10) } diff --git a/src/usic0_ch0/dx4cr.rs b/src/usic0_ch0/dx4cr.rs index 4d76b492..87840a58 100644 --- a/src/usic0_ch0/dx4cr.rs +++ b/src/usic0_ch0/dx4cr.rs @@ -572,43 +572,36 @@ impl R { impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - #[must_use] pub fn dsel(&mut self) -> DSEL_W { DSEL_W::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - #[must_use] pub fn insw(&mut self) -> INSW_W { INSW_W::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - #[must_use] pub fn dfen(&mut self) -> DFEN_W { DFEN_W::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - #[must_use] pub fn dsen(&mut self) -> DSEN_W { DSEN_W::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - #[must_use] pub fn dpol(&mut self) -> DPOL_W { DPOL_W::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - #[must_use] pub fn sfsel(&mut self) -> SFSEL_W { SFSEL_W::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - #[must_use] pub fn cm(&mut self) -> CM_W { CM_W::new(self, 10) } diff --git a/src/usic0_ch0/dx5cr.rs b/src/usic0_ch0/dx5cr.rs index fe654b46..5a3782ec 100644 --- a/src/usic0_ch0/dx5cr.rs +++ b/src/usic0_ch0/dx5cr.rs @@ -572,43 +572,36 @@ impl R { impl W { #[doc = "Bits 0:2 - Data Selection for Input Signal"] #[inline(always)] - #[must_use] pub fn dsel(&mut self) -> DSEL_W { DSEL_W::new(self, 0) } #[doc = "Bit 4 - Input Switch"] #[inline(always)] - #[must_use] pub fn insw(&mut self) -> INSW_W { INSW_W::new(self, 4) } #[doc = "Bit 5 - Digital Filter Enable"] #[inline(always)] - #[must_use] pub fn dfen(&mut self) -> DFEN_W { DFEN_W::new(self, 5) } #[doc = "Bit 6 - Data Synchronization Enable"] #[inline(always)] - #[must_use] pub fn dsen(&mut self) -> DSEN_W { DSEN_W::new(self, 6) } #[doc = "Bit 8 - Data Polarity for DXn"] #[inline(always)] - #[must_use] pub fn dpol(&mut self) -> DPOL_W { DPOL_W::new(self, 8) } #[doc = "Bit 9 - Sampling Frequency Selection"] #[inline(always)] - #[must_use] pub fn sfsel(&mut self) -> SFSEL_W { SFSEL_W::new(self, 9) } #[doc = "Bits 10:11 - Combination Mode"] #[inline(always)] - #[must_use] pub fn cm(&mut self) -> CM_W { CM_W::new(self, 10) } diff --git a/src/usic0_ch0/fdr.rs b/src/usic0_ch0/fdr.rs index 119ab9bc..f9b5bb48 100644 --- a/src/usic0_ch0/fdr.rs +++ b/src/usic0_ch0/fdr.rs @@ -114,13 +114,11 @@ impl R { impl W { #[doc = "Bits 0:9 - Step Value"] #[inline(always)] - #[must_use] pub fn step(&mut self) -> STEP_W { STEP_W::new(self, 0) } #[doc = "Bits 14:15 - Divider Mode"] #[inline(always)] - #[must_use] pub fn dm(&mut self) -> DM_W { DM_W::new(self, 14) } diff --git a/src/usic0_ch0/fmr.rs b/src/usic0_ch0/fmr.rs index 3622ae70..a291777f 100644 --- a/src/usic0_ch0/fmr.rs +++ b/src/usic0_ch0/fmr.rs @@ -326,61 +326,51 @@ where impl W { #[doc = "Bits 0:1 - Modify Transmit Data Valid"] #[inline(always)] - #[must_use] pub fn mtdv(&mut self) -> MTDV_W { MTDV_W::new(self, 0) } #[doc = "Bit 4 - Activate Bit TVC"] #[inline(always)] - #[must_use] pub fn atvc(&mut self) -> ATVC_W { ATVC_W::new(self, 4) } #[doc = "Bit 14 - Clear Bits RDV for RBUF0"] #[inline(always)] - #[must_use] pub fn crdv0(&mut self) -> CRDV0_W { CRDV0_W::new(self, 14) } #[doc = "Bit 15 - Clear Bit RDV for RBUF1"] #[inline(always)] - #[must_use] pub fn crdv1(&mut self) -> CRDV1_W { CRDV1_W::new(self, 15) } #[doc = "Bit 16 - Set Interrupt Output SRx"] #[inline(always)] - #[must_use] pub fn sio0(&mut self) -> SIO0_W { SIO0_W::new(self, 16) } #[doc = "Bit 17 - Set Interrupt Output SRx"] #[inline(always)] - #[must_use] pub fn sio1(&mut self) -> SIO1_W { SIO1_W::new(self, 17) } #[doc = "Bit 18 - Set Interrupt Output SRx"] #[inline(always)] - #[must_use] pub fn sio2(&mut self) -> SIO2_W { SIO2_W::new(self, 18) } #[doc = "Bit 19 - Set Interrupt Output SRx"] #[inline(always)] - #[must_use] pub fn sio3(&mut self) -> SIO3_W { SIO3_W::new(self, 19) } #[doc = "Bit 20 - Set Interrupt Output SRx"] #[inline(always)] - #[must_use] pub fn sio4(&mut self) -> SIO4_W { SIO4_W::new(self, 20) } #[doc = "Bit 21 - Set Interrupt Output SRx"] #[inline(always)] - #[must_use] pub fn sio5(&mut self) -> SIO5_W { SIO5_W::new(self, 21) } diff --git a/src/usic0_ch0/in_.rs b/src/usic0_ch0/in_.rs index 2a977840..fb810665 100644 --- a/src/usic0_ch0/in_.rs +++ b/src/usic0_ch0/in_.rs @@ -5,7 +5,6 @@ pub type TDATA_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>; impl W { #[doc = "Bits 0:15 - Transmit Data"] #[inline(always)] - #[must_use] pub fn tdata(&mut self) -> TDATA_W { TDATA_W::new(self, 0) } diff --git a/src/usic0_ch0/inpr.rs b/src/usic0_ch0/inpr.rs index 6e3b89c0..73144f71 100644 --- a/src/usic0_ch0/inpr.rs +++ b/src/usic0_ch0/inpr.rs @@ -160,31 +160,26 @@ impl R { impl W { #[doc = "Bits 0:2 - Transmit Shift Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn tsinp(&mut self) -> TSINP_W { TSINP_W::new(self, 0) } #[doc = "Bits 4:6 - Transmit Buffer Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn tbinp(&mut self) -> TBINP_W { TBINP_W::new(self, 4) } #[doc = "Bits 8:10 - Receive Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn rinp(&mut self) -> RINP_W { RINP_W::new(self, 8) } #[doc = "Bits 12:14 - Alternative Receive Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn ainp(&mut self) -> AINP_W { AINP_W::new(self, 12) } #[doc = "Bits 16:18 - Transmit Shift Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn pinp(&mut self) -> PINP_W { PINP_W::new(self, 16) } diff --git a/src/usic0_ch0/kscfg.rs b/src/usic0_ch0/kscfg.rs index 3822a424..8d678c5b 100644 --- a/src/usic0_ch0/kscfg.rs +++ b/src/usic0_ch0/kscfg.rs @@ -258,37 +258,31 @@ impl R { impl W { #[doc = "Bit 0 - Module Enable"] #[inline(always)] - #[must_use] pub fn moden(&mut self) -> MODEN_W { MODEN_W::new(self, 0) } #[doc = "Bit 1 - Bit Protection for MODEN"] #[inline(always)] - #[must_use] pub fn bpmoden(&mut self) -> BPMODEN_W { BPMODEN_W::new(self, 1) } #[doc = "Bits 4:5 - Normal Operation Mode Configuration"] #[inline(always)] - #[must_use] pub fn nomcfg(&mut self) -> NOMCFG_W { NOMCFG_W::new(self, 4) } #[doc = "Bit 7 - Bit Protection for NOMCFG"] #[inline(always)] - #[must_use] pub fn bpnom(&mut self) -> BPNOM_W { BPNOM_W::new(self, 7) } #[doc = "Bits 8:9 - Suspend Mode Configuration"] #[inline(always)] - #[must_use] pub fn sumcfg(&mut self) -> SUMCFG_W { SUMCFG_W::new(self, 8) } #[doc = "Bit 11 - Bit Protection for SUMCFG"] #[inline(always)] - #[must_use] pub fn bpsum(&mut self) -> BPSUM_W { BPSUM_W::new(self, 11) } diff --git a/src/usic0_ch0/pcr.rs b/src/usic0_ch0/pcr.rs index ed7a6187..e0236de6 100644 --- a/src/usic0_ch0/pcr.rs +++ b/src/usic0_ch0/pcr.rs @@ -295,193 +295,161 @@ impl R { impl W { #[doc = "Bit 0 - Protocol Control Bit 0"] #[inline(always)] - #[must_use] pub fn ctr0(&mut self) -> CTR0_W { CTR0_W::new(self, 0) } #[doc = "Bit 1 - Protocol Control Bit 1"] #[inline(always)] - #[must_use] pub fn ctr1(&mut self) -> CTR1_W { CTR1_W::new(self, 1) } #[doc = "Bit 2 - Protocol Control Bit 2"] #[inline(always)] - #[must_use] pub fn ctr2(&mut self) -> CTR2_W { CTR2_W::new(self, 2) } #[doc = "Bit 3 - Protocol Control Bit 3"] #[inline(always)] - #[must_use] pub fn ctr3(&mut self) -> CTR3_W { CTR3_W::new(self, 3) } #[doc = "Bit 4 - Protocol Control Bit 4"] #[inline(always)] - #[must_use] pub fn ctr4(&mut self) -> CTR4_W { CTR4_W::new(self, 4) } #[doc = "Bit 5 - Protocol Control Bit 5"] #[inline(always)] - #[must_use] pub fn ctr5(&mut self) -> CTR5_W { CTR5_W::new(self, 5) } #[doc = "Bit 6 - Protocol Control Bit 6"] #[inline(always)] - #[must_use] pub fn ctr6(&mut self) -> CTR6_W { CTR6_W::new(self, 6) } #[doc = "Bit 7 - Protocol Control Bit 7"] #[inline(always)] - #[must_use] pub fn ctr7(&mut self) -> CTR7_W { CTR7_W::new(self, 7) } #[doc = "Bit 8 - Protocol Control Bit 8"] #[inline(always)] - #[must_use] pub fn ctr8(&mut self) -> CTR8_W { CTR8_W::new(self, 8) } #[doc = "Bit 9 - Protocol Control Bit 9"] #[inline(always)] - #[must_use] pub fn ctr9(&mut self) -> CTR9_W { CTR9_W::new(self, 9) } #[doc = "Bit 10 - Protocol Control Bit 10"] #[inline(always)] - #[must_use] pub fn ctr10(&mut self) -> CTR10_W { CTR10_W::new(self, 10) } #[doc = "Bit 11 - Protocol Control Bit 11"] #[inline(always)] - #[must_use] pub fn ctr11(&mut self) -> CTR11_W { CTR11_W::new(self, 11) } #[doc = "Bit 12 - Protocol Control Bit 12"] #[inline(always)] - #[must_use] pub fn ctr12(&mut self) -> CTR12_W { CTR12_W::new(self, 12) } #[doc = "Bit 13 - Protocol Control Bit 13"] #[inline(always)] - #[must_use] pub fn ctr13(&mut self) -> CTR13_W { CTR13_W::new(self, 13) } #[doc = "Bit 14 - Protocol Control Bit 14"] #[inline(always)] - #[must_use] pub fn ctr14(&mut self) -> CTR14_W { CTR14_W::new(self, 14) } #[doc = "Bit 15 - Protocol Control Bit 15"] #[inline(always)] - #[must_use] pub fn ctr15(&mut self) -> CTR15_W { CTR15_W::new(self, 15) } #[doc = "Bit 16 - Protocol Control Bit 16"] #[inline(always)] - #[must_use] pub fn ctr16(&mut self) -> CTR16_W { CTR16_W::new(self, 16) } #[doc = "Bit 17 - Protocol Control Bit 17"] #[inline(always)] - #[must_use] pub fn ctr17(&mut self) -> CTR17_W { CTR17_W::new(self, 17) } #[doc = "Bit 18 - Protocol Control Bit 18"] #[inline(always)] - #[must_use] pub fn ctr18(&mut self) -> CTR18_W { CTR18_W::new(self, 18) } #[doc = "Bit 19 - Protocol Control Bit 19"] #[inline(always)] - #[must_use] pub fn ctr19(&mut self) -> CTR19_W { CTR19_W::new(self, 19) } #[doc = "Bit 20 - Protocol Control Bit 20"] #[inline(always)] - #[must_use] pub fn ctr20(&mut self) -> CTR20_W { CTR20_W::new(self, 20) } #[doc = "Bit 21 - Protocol Control Bit 21"] #[inline(always)] - #[must_use] pub fn ctr21(&mut self) -> CTR21_W { CTR21_W::new(self, 21) } #[doc = "Bit 22 - Protocol Control Bit 22"] #[inline(always)] - #[must_use] pub fn ctr22(&mut self) -> CTR22_W { CTR22_W::new(self, 22) } #[doc = "Bit 23 - Protocol Control Bit 23"] #[inline(always)] - #[must_use] pub fn ctr23(&mut self) -> CTR23_W { CTR23_W::new(self, 23) } #[doc = "Bit 24 - Protocol Control Bit 24"] #[inline(always)] - #[must_use] pub fn ctr24(&mut self) -> CTR24_W { CTR24_W::new(self, 24) } #[doc = "Bit 25 - Protocol Control Bit 25"] #[inline(always)] - #[must_use] pub fn ctr25(&mut self) -> CTR25_W { CTR25_W::new(self, 25) } #[doc = "Bit 26 - Protocol Control Bit 26"] #[inline(always)] - #[must_use] pub fn ctr26(&mut self) -> CTR26_W { CTR26_W::new(self, 26) } #[doc = "Bit 27 - Protocol Control Bit 27"] #[inline(always)] - #[must_use] pub fn ctr27(&mut self) -> CTR27_W { CTR27_W::new(self, 27) } #[doc = "Bit 28 - Protocol Control Bit 28"] #[inline(always)] - #[must_use] pub fn ctr28(&mut self) -> CTR28_W { CTR28_W::new(self, 28) } #[doc = "Bit 29 - Protocol Control Bit 29"] #[inline(always)] - #[must_use] pub fn ctr29(&mut self) -> CTR29_W { CTR29_W::new(self, 29) } #[doc = "Bit 30 - Protocol Control Bit 30"] #[inline(always)] - #[must_use] pub fn ctr30(&mut self) -> CTR30_W { CTR30_W::new(self, 30) } #[doc = "Bit 31 - Protocol Control Bit 31"] #[inline(always)] - #[must_use] pub fn ctr31(&mut self) -> CTR31_W { CTR31_W::new(self, 31) } diff --git a/src/usic0_ch0/pcr_ascmode.rs b/src/usic0_ch0/pcr_ascmode.rs index 1b3d473d..3ac39040 100644 --- a/src/usic0_ch0/pcr_ascmode.rs +++ b/src/usic0_ch0/pcr_ascmode.rs @@ -757,79 +757,66 @@ impl R { impl W { #[doc = "Bit 0 - Sample Mode"] #[inline(always)] - #[must_use] pub fn smd(&mut self) -> SMD_W { SMD_W::new(self, 0) } #[doc = "Bit 1 - Stop Bits"] #[inline(always)] - #[must_use] pub fn stpb(&mut self) -> STPB_W { STPB_W::new(self, 1) } #[doc = "Bit 2 - Idle Detection Mode"] #[inline(always)] - #[must_use] pub fn idm(&mut self) -> IDM_W { IDM_W::new(self, 2) } #[doc = "Bit 3 - Synchronization Break Interrupt Enable"] #[inline(always)] - #[must_use] pub fn sbien(&mut self) -> SBIEN_W { SBIEN_W::new(self, 3) } #[doc = "Bit 4 - Collision Detection Enable"] #[inline(always)] - #[must_use] pub fn cden(&mut self) -> CDEN_W { CDEN_W::new(self, 4) } #[doc = "Bit 5 - Receiver Noise Detection Interrupt Enable"] #[inline(always)] - #[must_use] pub fn rnien(&mut self) -> RNIEN_W { RNIEN_W::new(self, 5) } #[doc = "Bit 6 - Format Error Interrupt Enable"] #[inline(always)] - #[must_use] pub fn feien(&mut self) -> FEIEN_W { FEIEN_W::new(self, 6) } #[doc = "Bit 7 - Frame Finished Interrupt Enable"] #[inline(always)] - #[must_use] pub fn ffien(&mut self) -> FFIEN_W { FFIEN_W::new(self, 7) } #[doc = "Bits 8:12 - Sample Point"] #[inline(always)] - #[must_use] pub fn sp(&mut self) -> SP_W { SP_W::new(self, 8) } #[doc = "Bits 13:15 - Pulse Length"] #[inline(always)] - #[must_use] pub fn pl(&mut self) -> PL_W { PL_W::new(self, 13) } #[doc = "Bit 16 - Receiver Status Enable"] #[inline(always)] - #[must_use] pub fn rsten(&mut self) -> RSTEN_W { RSTEN_W::new(self, 16) } #[doc = "Bit 17 - Transmitter Status Enable"] #[inline(always)] - #[must_use] pub fn tsten(&mut self) -> TSTEN_W { TSTEN_W::new(self, 17) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] - #[must_use] pub fn mclk(&mut self) -> MCLK_W { MCLK_W::new(self, 31) } diff --git a/src/usic0_ch0/pcr_iicmode.rs b/src/usic0_ch0/pcr_iicmode.rs index a833776b..0e76399a 100644 --- a/src/usic0_ch0/pcr_iicmode.rs +++ b/src/usic0_ch0/pcr_iicmode.rs @@ -721,85 +721,71 @@ impl R { impl W { #[doc = "Bits 0:15 - Slave Address"] #[inline(always)] - #[must_use] pub fn slad(&mut self) -> SLAD_W { SLAD_W::new(self, 0) } #[doc = "Bit 16 - Acknowledge 00H"] #[inline(always)] - #[must_use] pub fn ack00(&mut self) -> ACK00_W { ACK00_W::new(self, 16) } #[doc = "Bit 17 - Symbol Timing"] #[inline(always)] - #[must_use] pub fn stim(&mut self) -> STIM_W { STIM_W::new(self, 17) } #[doc = "Bit 18 - Start Condition Received Interrupt Enable"] #[inline(always)] - #[must_use] pub fn scrien(&mut self) -> SCRIEN_W { SCRIEN_W::new(self, 18) } #[doc = "Bit 19 - Repeated Start Condition Received Interrupt Enable"] #[inline(always)] - #[must_use] pub fn rscrien(&mut self) -> RSCRIEN_W { RSCRIEN_W::new(self, 19) } #[doc = "Bit 20 - Stop Condition Received Interrupt Enable"] #[inline(always)] - #[must_use] pub fn pcrien(&mut self) -> PCRIEN_W { PCRIEN_W::new(self, 20) } #[doc = "Bit 21 - Non-Acknowledge Interrupt Enable"] #[inline(always)] - #[must_use] pub fn nackien(&mut self) -> NACKIEN_W { NACKIEN_W::new(self, 21) } #[doc = "Bit 22 - Arbitration Lost Interrupt Enable"] #[inline(always)] - #[must_use] pub fn arlien(&mut self) -> ARLIEN_W { ARLIEN_W::new(self, 22) } #[doc = "Bit 23 - Slave Read Request Interrupt Enable"] #[inline(always)] - #[must_use] pub fn srrien(&mut self) -> SRRIEN_W { SRRIEN_W::new(self, 23) } #[doc = "Bit 24 - Error Interrupt Enable"] #[inline(always)] - #[must_use] pub fn errien(&mut self) -> ERRIEN_W { ERRIEN_W::new(self, 24) } #[doc = "Bit 25 - Slave Acknowledge Disable"] #[inline(always)] - #[must_use] pub fn sackdis(&mut self) -> SACKDIS_W { SACKDIS_W::new(self, 25) } #[doc = "Bits 26:29 - Hardware Delay"] #[inline(always)] - #[must_use] pub fn hdel(&mut self) -> HDEL_W { HDEL_W::new(self, 26) } #[doc = "Bit 30 - Acknowledge Interrupt Enable"] #[inline(always)] - #[must_use] pub fn ackien(&mut self) -> ACKIEN_W { ACKIEN_W::new(self, 30) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] - #[must_use] pub fn mclk(&mut self) -> MCLK_W { MCLK_W::new(self, 31) } diff --git a/src/usic0_ch0/pcr_iismode.rs b/src/usic0_ch0/pcr_iismode.rs index 2b18c4a9..99d1097c 100644 --- a/src/usic0_ch0/pcr_iismode.rs +++ b/src/usic0_ch0/pcr_iismode.rs @@ -480,55 +480,46 @@ impl R { impl W { #[doc = "Bit 0 - WA Generation Enable"] #[inline(always)] - #[must_use] pub fn wagen(&mut self) -> WAGEN_W { WAGEN_W::new(self, 0) } #[doc = "Bit 1 - Data Transfers Enable"] #[inline(always)] - #[must_use] pub fn dten(&mut self) -> DTEN_W { DTEN_W::new(self, 1) } #[doc = "Bit 2 - Select Inversion"] #[inline(always)] - #[must_use] pub fn selinv(&mut self) -> SELINV_W { SELINV_W::new(self, 2) } #[doc = "Bit 4 - WA Falling Edge Interrupt Enable"] #[inline(always)] - #[must_use] pub fn wafeien(&mut self) -> WAFEIEN_W { WAFEIEN_W::new(self, 4) } #[doc = "Bit 5 - WA Rising Edge Interrupt Enable"] #[inline(always)] - #[must_use] pub fn wareien(&mut self) -> WAREIEN_W { WAREIEN_W::new(self, 5) } #[doc = "Bit 6 - END Interrupt Enable"] #[inline(always)] - #[must_use] pub fn endien(&mut self) -> ENDIEN_W { ENDIEN_W::new(self, 6) } #[doc = "Bit 15 - DX2T Interrupt Enable"] #[inline(always)] - #[must_use] pub fn dx2tien(&mut self) -> DX2TIEN_W { DX2TIEN_W::new(self, 15) } #[doc = "Bits 16:21 - Transfer Delay"] #[inline(always)] - #[must_use] pub fn tdel(&mut self) -> TDEL_W { TDEL_W::new(self, 16) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] - #[must_use] pub fn mclk(&mut self) -> MCLK_W { MCLK_W::new(self, 31) } diff --git a/src/usic0_ch0/pcr_sscmode.rs b/src/usic0_ch0/pcr_sscmode.rs index 6904186e..6ad8be0f 100644 --- a/src/usic0_ch0/pcr_sscmode.rs +++ b/src/usic0_ch0/pcr_sscmode.rs @@ -761,85 +761,71 @@ impl R { impl W { #[doc = "Bit 0 - MSLS Enable"] #[inline(always)] - #[must_use] pub fn mslsen(&mut self) -> MSLSEN_W { MSLSEN_W::new(self, 0) } #[doc = "Bit 1 - Select Control"] #[inline(always)] - #[must_use] pub fn selctr(&mut self) -> SELCTR_W { SELCTR_W::new(self, 1) } #[doc = "Bit 2 - Select Inversion"] #[inline(always)] - #[must_use] pub fn selinv(&mut self) -> SELINV_W { SELINV_W::new(self, 2) } #[doc = "Bit 3 - Frame End Mode"] #[inline(always)] - #[must_use] pub fn fem(&mut self) -> FEM_W { FEM_W::new(self, 3) } #[doc = "Bits 4:5 - Input Frequency Selection"] #[inline(always)] - #[must_use] pub fn ctqsel1(&mut self) -> CTQSEL1_W { CTQSEL1_W::new(self, 4) } #[doc = "Bits 6:7 - Divider Factor PCTQ1 for Tiw and Tnf"] #[inline(always)] - #[must_use] pub fn pctq1(&mut self) -> PCTQ1_W { PCTQ1_W::new(self, 6) } #[doc = "Bits 8:12 - Divider Factor DCTQ1 for Tiw and Tnf"] #[inline(always)] - #[must_use] pub fn dctq1(&mut self) -> DCTQ1_W { DCTQ1_W::new(self, 8) } #[doc = "Bit 13 - Parity Error Interrupt Enable"] #[inline(always)] - #[must_use] pub fn parien(&mut self) -> PARIEN_W { PARIEN_W::new(self, 13) } #[doc = "Bit 14 - MSLS Interrupt Enable"] #[inline(always)] - #[must_use] pub fn mslsien(&mut self) -> MSLSIEN_W { MSLSIEN_W::new(self, 14) } #[doc = "Bit 15 - DX2T Interrupt Enable"] #[inline(always)] - #[must_use] pub fn dx2tien(&mut self) -> DX2TIEN_W { DX2TIEN_W::new(self, 15) } #[doc = "Bits 16:23 - Select Output"] #[inline(always)] - #[must_use] pub fn selo(&mut self) -> SELO_W { SELO_W::new(self, 16) } #[doc = "Bit 24 - Enable Inter-Word Delay Tiw"] #[inline(always)] - #[must_use] pub fn tiwen(&mut self) -> TIWEN_W { TIWEN_W::new(self, 24) } #[doc = "Bit 25 - Slave Mode Clock Phase Select"] #[inline(always)] - #[must_use] pub fn slphsel(&mut self) -> SLPHSEL_W { SLPHSEL_W::new(self, 25) } #[doc = "Bit 31 - Master Clock Enable"] #[inline(always)] - #[must_use] pub fn mclk(&mut self) -> MCLK_W { MCLK_W::new(self, 31) } diff --git a/src/usic0_ch0/pscr.rs b/src/usic0_ch0/pscr.rs index 67f11c5c..e83096d5 100644 --- a/src/usic0_ch0/pscr.rs +++ b/src/usic0_ch0/pscr.rs @@ -530,103 +530,86 @@ where impl W { #[doc = "Bit 0 - Clear Status Flag 0 in PSR"] #[inline(always)] - #[must_use] pub fn cst0(&mut self) -> CST0_W { CST0_W::new(self, 0) } #[doc = "Bit 1 - Clear Status Flag 1 in PSR"] #[inline(always)] - #[must_use] pub fn cst1(&mut self) -> CST1_W { CST1_W::new(self, 1) } #[doc = "Bit 2 - Clear Status Flag 2 in PSR"] #[inline(always)] - #[must_use] pub fn cst2(&mut self) -> CST2_W { CST2_W::new(self, 2) } #[doc = "Bit 3 - Clear Status Flag 3 in PSR"] #[inline(always)] - #[must_use] pub fn cst3(&mut self) -> CST3_W { CST3_W::new(self, 3) } #[doc = "Bit 4 - Clear Status Flag 4 in PSR"] #[inline(always)] - #[must_use] pub fn cst4(&mut self) -> CST4_W { CST4_W::new(self, 4) } #[doc = "Bit 5 - Clear Status Flag 5 in PSR"] #[inline(always)] - #[must_use] pub fn cst5(&mut self) -> CST5_W { CST5_W::new(self, 5) } #[doc = "Bit 6 - Clear Status Flag 6 in PSR"] #[inline(always)] - #[must_use] pub fn cst6(&mut self) -> CST6_W { CST6_W::new(self, 6) } #[doc = "Bit 7 - Clear Status Flag 7 in PSR"] #[inline(always)] - #[must_use] pub fn cst7(&mut self) -> CST7_W { CST7_W::new(self, 7) } #[doc = "Bit 8 - Clear Status Flag 8 in PSR"] #[inline(always)] - #[must_use] pub fn cst8(&mut self) -> CST8_W { CST8_W::new(self, 8) } #[doc = "Bit 9 - Clear Status Flag 9 in PSR"] #[inline(always)] - #[must_use] pub fn cst9(&mut self) -> CST9_W { CST9_W::new(self, 9) } #[doc = "Bit 10 - Clear Receiver Start Indication Flag"] #[inline(always)] - #[must_use] pub fn crsif(&mut self) -> CRSIF_W { CRSIF_W::new(self, 10) } #[doc = "Bit 11 - Clear Data Lost Indication Flag"] #[inline(always)] - #[must_use] pub fn cdlif(&mut self) -> CDLIF_W { CDLIF_W::new(self, 11) } #[doc = "Bit 12 - Clear Transmit Shift Indication Flag"] #[inline(always)] - #[must_use] pub fn ctsif(&mut self) -> CTSIF_W { CTSIF_W::new(self, 12) } #[doc = "Bit 13 - Clear Transmit Buffer Indication Flag"] #[inline(always)] - #[must_use] pub fn ctbif(&mut self) -> CTBIF_W { CTBIF_W::new(self, 13) } #[doc = "Bit 14 - Clear Receive Indication Flag"] #[inline(always)] - #[must_use] pub fn crif(&mut self) -> CRIF_W { CRIF_W::new(self, 14) } #[doc = "Bit 15 - Clear Alternative Receive Indication Flag"] #[inline(always)] - #[must_use] pub fn caif(&mut self) -> CAIF_W { CAIF_W::new(self, 15) } #[doc = "Bit 16 - Clear Baud Rate Generator Indication Flag"] #[inline(always)] - #[must_use] pub fn cbrgif(&mut self) -> CBRGIF_W { CBRGIF_W::new(self, 16) } diff --git a/src/usic0_ch0/psr.rs b/src/usic0_ch0/psr.rs index 4743cef0..4c905ef1 100644 --- a/src/usic0_ch0/psr.rs +++ b/src/usic0_ch0/psr.rs @@ -503,103 +503,86 @@ impl R { impl W { #[doc = "Bit 0 - Protocol Status Flag 0"] #[inline(always)] - #[must_use] pub fn st0(&mut self) -> ST0_W { ST0_W::new(self, 0) } #[doc = "Bit 1 - Protocol Status Flag 1"] #[inline(always)] - #[must_use] pub fn st1(&mut self) -> ST1_W { ST1_W::new(self, 1) } #[doc = "Bit 2 - Protocol Status Flag 2"] #[inline(always)] - #[must_use] pub fn st2(&mut self) -> ST2_W { ST2_W::new(self, 2) } #[doc = "Bit 3 - Protocol Status Flag 3"] #[inline(always)] - #[must_use] pub fn st3(&mut self) -> ST3_W { ST3_W::new(self, 3) } #[doc = "Bit 4 - Protocol Status Flag 4"] #[inline(always)] - #[must_use] pub fn st4(&mut self) -> ST4_W { ST4_W::new(self, 4) } #[doc = "Bit 5 - Protocol Status Flag 5"] #[inline(always)] - #[must_use] pub fn st5(&mut self) -> ST5_W { ST5_W::new(self, 5) } #[doc = "Bit 6 - Protocol Status Flag 6"] #[inline(always)] - #[must_use] pub fn st6(&mut self) -> ST6_W { ST6_W::new(self, 6) } #[doc = "Bit 7 - Protocol Status Flag 7"] #[inline(always)] - #[must_use] pub fn st7(&mut self) -> ST7_W { ST7_W::new(self, 7) } #[doc = "Bit 8 - Protocol Status Flag 8"] #[inline(always)] - #[must_use] pub fn st8(&mut self) -> ST8_W { ST8_W::new(self, 8) } #[doc = "Bit 9 - Protocol Status Flag 9"] #[inline(always)] - #[must_use] pub fn st9(&mut self) -> ST9_W { ST9_W::new(self, 9) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - #[must_use] pub fn rsif(&mut self) -> RSIF_W { RSIF_W::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - #[must_use] pub fn dlif(&mut self) -> DLIF_W { DLIF_W::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - #[must_use] pub fn tsif(&mut self) -> TSIF_W { TSIF_W::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - #[must_use] pub fn tbif(&mut self) -> TBIF_W { TBIF_W::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - #[must_use] pub fn rif(&mut self) -> RIF_W { RIF_W::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - #[must_use] pub fn aif(&mut self) -> AIF_W { AIF_W::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - #[must_use] pub fn brgif(&mut self) -> BRGIF_W { BRGIF_W::new(self, 16) } diff --git a/src/usic0_ch0/psr_ascmode.rs b/src/usic0_ch0/psr_ascmode.rs index 9ec6f072..c7a21d64 100644 --- a/src/usic0_ch0/psr_ascmode.rs +++ b/src/usic0_ch0/psr_ascmode.rs @@ -976,97 +976,81 @@ impl R { impl W { #[doc = "Bit 0 - Transmission Idle"] #[inline(always)] - #[must_use] pub fn txidle(&mut self) -> TXIDLE_W { TXIDLE_W::new(self, 0) } #[doc = "Bit 1 - Reception Idle"] #[inline(always)] - #[must_use] pub fn rxidle(&mut self) -> RXIDLE_W { RXIDLE_W::new(self, 1) } #[doc = "Bit 2 - Synchronization Break Detected"] #[inline(always)] - #[must_use] pub fn sbd(&mut self) -> SBD_W { SBD_W::new(self, 2) } #[doc = "Bit 3 - Collision Detected"] #[inline(always)] - #[must_use] pub fn col(&mut self) -> COL_W { COL_W::new(self, 3) } #[doc = "Bit 4 - Receiver Noise Detected"] #[inline(always)] - #[must_use] pub fn rns(&mut self) -> RNS_W { RNS_W::new(self, 4) } #[doc = "Bit 5 - Format Error in Stop Bit 0"] #[inline(always)] - #[must_use] pub fn fer0(&mut self) -> FER0_W { FER0_W::new(self, 5) } #[doc = "Bit 6 - Format Error in Stop Bit 1"] #[inline(always)] - #[must_use] pub fn fer1(&mut self) -> FER1_W { FER1_W::new(self, 6) } #[doc = "Bit 7 - Receive Frame Finished"] #[inline(always)] - #[must_use] pub fn rff(&mut self) -> RFF_W { RFF_W::new(self, 7) } #[doc = "Bit 8 - Transmitter Frame Finished"] #[inline(always)] - #[must_use] pub fn tff(&mut self) -> TFF_W { TFF_W::new(self, 8) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - #[must_use] pub fn rsif(&mut self) -> RSIF_W { RSIF_W::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - #[must_use] pub fn dlif(&mut self) -> DLIF_W { DLIF_W::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - #[must_use] pub fn tsif(&mut self) -> TSIF_W { TSIF_W::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - #[must_use] pub fn tbif(&mut self) -> TBIF_W { TBIF_W::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - #[must_use] pub fn rif(&mut self) -> RIF_W { RIF_W::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - #[must_use] pub fn aif(&mut self) -> AIF_W { AIF_W::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - #[must_use] pub fn brgif(&mut self) -> BRGIF_W { BRGIF_W::new(self, 16) } diff --git a/src/usic0_ch0/psr_iicmode.rs b/src/usic0_ch0/psr_iicmode.rs index eff9fb29..1aac69c2 100644 --- a/src/usic0_ch0/psr_iicmode.rs +++ b/src/usic0_ch0/psr_iicmode.rs @@ -993,103 +993,86 @@ impl R { impl W { #[doc = "Bit 0 - Slave Select"] #[inline(always)] - #[must_use] pub fn slsel(&mut self) -> SLSEL_W { SLSEL_W::new(self, 0) } #[doc = "Bit 1 - Wrong TDF Code Found"] #[inline(always)] - #[must_use] pub fn wtdf(&mut self) -> WTDF_W { WTDF_W::new(self, 1) } #[doc = "Bit 2 - Start Condition Received"] #[inline(always)] - #[must_use] pub fn scr(&mut self) -> SCR_W { SCR_W::new(self, 2) } #[doc = "Bit 3 - Repeated Start Condition Received"] #[inline(always)] - #[must_use] pub fn rscr(&mut self) -> RSCR_W { RSCR_W::new(self, 3) } #[doc = "Bit 4 - Stop Condition Received"] #[inline(always)] - #[must_use] pub fn pcr(&mut self) -> PCR_W { PCR_W::new(self, 4) } #[doc = "Bit 5 - Non-Acknowledge Received"] #[inline(always)] - #[must_use] pub fn nack(&mut self) -> NACK_W { NACK_W::new(self, 5) } #[doc = "Bit 6 - Arbitration Lost"] #[inline(always)] - #[must_use] pub fn arl(&mut self) -> ARL_W { ARL_W::new(self, 6) } #[doc = "Bit 7 - Slave Read Request"] #[inline(always)] - #[must_use] pub fn srr(&mut self) -> SRR_W { SRR_W::new(self, 7) } #[doc = "Bit 8 - Error"] #[inline(always)] - #[must_use] pub fn err(&mut self) -> ERR_W { ERR_W::new(self, 8) } #[doc = "Bit 9 - Acknowledge Received"] #[inline(always)] - #[must_use] pub fn ack(&mut self) -> ACK_W { ACK_W::new(self, 9) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - #[must_use] pub fn rsif(&mut self) -> RSIF_W { RSIF_W::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - #[must_use] pub fn dlif(&mut self) -> DLIF_W { DLIF_W::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - #[must_use] pub fn tsif(&mut self) -> TSIF_W { TSIF_W::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - #[must_use] pub fn tbif(&mut self) -> TBIF_W { TBIF_W::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - #[must_use] pub fn rif(&mut self) -> RIF_W { RIF_W::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - #[must_use] pub fn aif(&mut self) -> AIF_W { AIF_W::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - #[must_use] pub fn brgif(&mut self) -> BRGIF_W { BRGIF_W::new(self, 16) } diff --git a/src/usic0_ch0/psr_iismode.rs b/src/usic0_ch0/psr_iismode.rs index 01085450..9af9a4bc 100644 --- a/src/usic0_ch0/psr_iismode.rs +++ b/src/usic0_ch0/psr_iismode.rs @@ -761,79 +761,66 @@ impl R { impl W { #[doc = "Bit 0 - Word Address"] #[inline(always)] - #[must_use] pub fn wa(&mut self) -> WA_W { WA_W::new(self, 0) } #[doc = "Bit 1 - DX2S Status"] #[inline(always)] - #[must_use] pub fn dx2s(&mut self) -> DX2S_W { DX2S_W::new(self, 1) } #[doc = "Bit 3 - DX2T Event Detected"] #[inline(always)] - #[must_use] pub fn dx2tev(&mut self) -> DX2TEV_W { DX2TEV_W::new(self, 3) } #[doc = "Bit 4 - WA Falling Edge Event"] #[inline(always)] - #[must_use] pub fn wafe(&mut self) -> WAFE_W { WAFE_W::new(self, 4) } #[doc = "Bit 5 - WA Rising Edge Event"] #[inline(always)] - #[must_use] pub fn ware(&mut self) -> WARE_W { WARE_W::new(self, 5) } #[doc = "Bit 6 - WA Generation End"] #[inline(always)] - #[must_use] pub fn end(&mut self) -> END_W { END_W::new(self, 6) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - #[must_use] pub fn rsif(&mut self) -> RSIF_W { RSIF_W::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - #[must_use] pub fn dlif(&mut self) -> DLIF_W { DLIF_W::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - #[must_use] pub fn tsif(&mut self) -> TSIF_W { TSIF_W::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - #[must_use] pub fn tbif(&mut self) -> TBIF_W { TBIF_W::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - #[must_use] pub fn rif(&mut self) -> RIF_W { RIF_W::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - #[must_use] pub fn aif(&mut self) -> AIF_W { AIF_W::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - #[must_use] pub fn brgif(&mut self) -> BRGIF_W { BRGIF_W::new(self, 16) } diff --git a/src/usic0_ch0/psr_sscmode.rs b/src/usic0_ch0/psr_sscmode.rs index 69857d16..53aa7b2b 100644 --- a/src/usic0_ch0/psr_sscmode.rs +++ b/src/usic0_ch0/psr_sscmode.rs @@ -703,73 +703,61 @@ impl R { impl W { #[doc = "Bit 0 - MSLS Status"] #[inline(always)] - #[must_use] pub fn msls(&mut self) -> MSLS_W { MSLS_W::new(self, 0) } #[doc = "Bit 1 - DX2S Status"] #[inline(always)] - #[must_use] pub fn dx2s(&mut self) -> DX2S_W { DX2S_W::new(self, 1) } #[doc = "Bit 2 - MSLS Event Detected"] #[inline(always)] - #[must_use] pub fn mslsev(&mut self) -> MSLSEV_W { MSLSEV_W::new(self, 2) } #[doc = "Bit 3 - DX2T Event Detected"] #[inline(always)] - #[must_use] pub fn dx2tev(&mut self) -> DX2TEV_W { DX2TEV_W::new(self, 3) } #[doc = "Bit 4 - Parity Error Event Detected"] #[inline(always)] - #[must_use] pub fn parerr(&mut self) -> PARERR_W { PARERR_W::new(self, 4) } #[doc = "Bit 10 - Receiver Start Indication Flag"] #[inline(always)] - #[must_use] pub fn rsif(&mut self) -> RSIF_W { RSIF_W::new(self, 10) } #[doc = "Bit 11 - Data Lost Indication Flag"] #[inline(always)] - #[must_use] pub fn dlif(&mut self) -> DLIF_W { DLIF_W::new(self, 11) } #[doc = "Bit 12 - Transmit Shift Indication Flag"] #[inline(always)] - #[must_use] pub fn tsif(&mut self) -> TSIF_W { TSIF_W::new(self, 12) } #[doc = "Bit 13 - Transmit Buffer Indication Flag"] #[inline(always)] - #[must_use] pub fn tbif(&mut self) -> TBIF_W { TBIF_W::new(self, 13) } #[doc = "Bit 14 - Receive Indication Flag"] #[inline(always)] - #[must_use] pub fn rif(&mut self) -> RIF_W { RIF_W::new(self, 14) } #[doc = "Bit 15 - Alternative Receive Indication Flag"] #[inline(always)] - #[must_use] pub fn aif(&mut self) -> AIF_W { AIF_W::new(self, 15) } #[doc = "Bit 16 - Baud Rate Generator Indication Flag"] #[inline(always)] - #[must_use] pub fn brgif(&mut self) -> BRGIF_W { BRGIF_W::new(self, 16) } diff --git a/src/usic0_ch0/rbctr.rs b/src/usic0_ch0/rbctr.rs index f38026a3..69bec67a 100644 --- a/src/usic0_ch0/rbctr.rs +++ b/src/usic0_ch0/rbctr.rs @@ -915,79 +915,66 @@ impl R { impl W { #[doc = "Bits 0:5 - Data Pointer"] #[inline(always)] - #[must_use] pub fn dptr(&mut self) -> DPTR_W { DPTR_W::new(self, 0) } #[doc = "Bits 8:13 - Limit For Interrupt Generation"] #[inline(always)] - #[must_use] pub fn limit(&mut self) -> LIMIT_W { LIMIT_W::new(self, 8) } #[doc = "Bit 14 - Standard Receive Buffer Trigger Mode"] #[inline(always)] - #[must_use] pub fn srbtm(&mut self) -> SRBTM_W { SRBTM_W::new(self, 14) } #[doc = "Bit 15 - Standard Receive Buffer Trigger Enable"] #[inline(always)] - #[must_use] pub fn srbten(&mut self) -> SRBTEN_W { SRBTEN_W::new(self, 15) } #[doc = "Bits 16:18 - Standard Receive Buffer Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn srbinp(&mut self) -> SRBINP_W { SRBINP_W::new(self, 16) } #[doc = "Bits 19:21 - Alternative Receive Buffer Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn arbinp(&mut self) -> ARBINP_W { ARBINP_W::new(self, 19) } #[doc = "Bits 22:23 - Receiver Control Information Mode"] #[inline(always)] - #[must_use] pub fn rcim(&mut self) -> RCIM_W { RCIM_W::new(self, 22) } #[doc = "Bits 24:26 - Buffer Size"] #[inline(always)] - #[must_use] pub fn size(&mut self) -> SIZE_W { SIZE_W::new(self, 24) } #[doc = "Bit 27 - Receiver Notification Mode"] #[inline(always)] - #[must_use] pub fn rnm(&mut self) -> RNM_W { RNM_W::new(self, 27) } #[doc = "Bit 28 - Buffer Event on Limit Overflow"] #[inline(always)] - #[must_use] pub fn lof(&mut self) -> LOF_W { LOF_W::new(self, 28) } #[doc = "Bit 29 - Alternative Receive Buffer Interrupt Enable"] #[inline(always)] - #[must_use] pub fn arbien(&mut self) -> ARBIEN_W { ARBIEN_W::new(self, 29) } #[doc = "Bit 30 - Standard Receive Buffer Interrupt Enable"] #[inline(always)] - #[must_use] pub fn srbien(&mut self) -> SRBIEN_W { SRBIEN_W::new(self, 30) } #[doc = "Bit 31 - Receive Buffer Error Interrupt Enable"] #[inline(always)] - #[must_use] pub fn rberien(&mut self) -> RBERIEN_W { RBERIEN_W::new(self, 31) } diff --git a/src/usic0_ch0/sctr.rs b/src/usic0_ch0/sctr.rs index 01502342..457c15a4 100644 --- a/src/usic0_ch0/sctr.rs +++ b/src/usic0_ch0/sctr.rs @@ -521,49 +521,41 @@ impl R { impl W { #[doc = "Bit 0 - Shift Direction"] #[inline(always)] - #[must_use] pub fn sdir(&mut self) -> SDIR_W { SDIR_W::new(self, 0) } #[doc = "Bit 1 - Passive Data Level"] #[inline(always)] - #[must_use] pub fn pdl(&mut self) -> PDL_W { PDL_W::new(self, 1) } #[doc = "Bits 2:3 - Data Shift Mode"] #[inline(always)] - #[must_use] pub fn dsm(&mut self) -> DSM_W { DSM_W::new(self, 2) } #[doc = "Bit 4 - Port Control Direction"] #[inline(always)] - #[must_use] pub fn hpcdir(&mut self) -> HPCDIR_W { HPCDIR_W::new(self, 4) } #[doc = "Bits 6:7 - Data Output Configuration"] #[inline(always)] - #[must_use] pub fn docfg(&mut self) -> DOCFG_W { DOCFG_W::new(self, 6) } #[doc = "Bits 8:9 - Transmission Mode"] #[inline(always)] - #[must_use] pub fn trm(&mut self) -> TRM_W { TRM_W::new(self, 8) } #[doc = "Bits 16:21 - Frame Length"] #[inline(always)] - #[must_use] pub fn fle(&mut self) -> FLE_W { FLE_W::new(self, 16) } #[doc = "Bits 24:27 - Word Length"] #[inline(always)] - #[must_use] pub fn wle(&mut self) -> WLE_W { WLE_W::new(self, 24) } diff --git a/src/usic0_ch0/tbctr.rs b/src/usic0_ch0/tbctr.rs index efc913d7..5f294e41 100644 --- a/src/usic0_ch0/tbctr.rs +++ b/src/usic0_ch0/tbctr.rs @@ -672,61 +672,51 @@ impl R { impl W { #[doc = "Bits 0:5 - Data Pointer"] #[inline(always)] - #[must_use] pub fn dptr(&mut self) -> DPTR_W { DPTR_W::new(self, 0) } #[doc = "Bits 8:13 - Limit For Interrupt Generation"] #[inline(always)] - #[must_use] pub fn limit(&mut self) -> LIMIT_W { LIMIT_W::new(self, 8) } #[doc = "Bit 14 - Standard Transmit Buffer Trigger Mode"] #[inline(always)] - #[must_use] pub fn stbtm(&mut self) -> STBTM_W { STBTM_W::new(self, 14) } #[doc = "Bit 15 - Standard Transmit Buffer Trigger Enable"] #[inline(always)] - #[must_use] pub fn stbten(&mut self) -> STBTEN_W { STBTEN_W::new(self, 15) } #[doc = "Bits 16:18 - Standard Transmit Buffer Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn stbinp(&mut self) -> STBINP_W { STBINP_W::new(self, 16) } #[doc = "Bits 19:21 - Alternative Transmit Buffer Interrupt Node Pointer"] #[inline(always)] - #[must_use] pub fn atbinp(&mut self) -> ATBINP_W { ATBINP_W::new(self, 19) } #[doc = "Bits 24:26 - Buffer Size"] #[inline(always)] - #[must_use] pub fn size(&mut self) -> SIZE_W { SIZE_W::new(self, 24) } #[doc = "Bit 28 - Buffer Event on Limit Overflow"] #[inline(always)] - #[must_use] pub fn lof(&mut self) -> LOF_W { LOF_W::new(self, 28) } #[doc = "Bit 30 - Standard Transmit Buffer Interrupt Enable"] #[inline(always)] - #[must_use] pub fn stbien(&mut self) -> STBIEN_W { STBIEN_W::new(self, 30) } #[doc = "Bit 31 - Transmit Buffer Error Interrupt Enable"] #[inline(always)] - #[must_use] pub fn tberien(&mut self) -> TBERIEN_W { TBERIEN_W::new(self, 31) } diff --git a/src/usic0_ch0/tbuf.rs b/src/usic0_ch0/tbuf.rs index 78006e7d..35b306b0 100644 --- a/src/usic0_ch0/tbuf.rs +++ b/src/usic0_ch0/tbuf.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Transmit Data"] #[inline(always)] - #[must_use] pub fn tdata(&mut self) -> TDATA_W { TDATA_W::new(self, 0) } diff --git a/src/usic0_ch0/tcsr.rs b/src/usic0_ch0/tcsr.rs index 33ba2036..00f2cd75 100644 --- a/src/usic0_ch0/tcsr.rs +++ b/src/usic0_ch0/tcsr.rs @@ -889,67 +889,56 @@ impl R { impl W { #[doc = "Bit 0 - WLE Mode"] #[inline(always)] - #[must_use] pub fn wlemd(&mut self) -> WLEMD_W { WLEMD_W::new(self, 0) } #[doc = "Bit 1 - Select Mode"] #[inline(always)] - #[must_use] pub fn selmd(&mut self) -> SELMD_W { SELMD_W::new(self, 1) } #[doc = "Bit 2 - FLE Mode"] #[inline(always)] - #[must_use] pub fn flemd(&mut self) -> FLEMD_W { FLEMD_W::new(self, 2) } #[doc = "Bit 3 - WA Mode"] #[inline(always)] - #[must_use] pub fn wamd(&mut self) -> WAMD_W { WAMD_W::new(self, 3) } #[doc = "Bit 4 - Hardware Port Control Mode"] #[inline(always)] - #[must_use] pub fn hpcmd(&mut self) -> HPCMD_W { HPCMD_W::new(self, 4) } #[doc = "Bit 5 - Start Of Frame"] #[inline(always)] - #[must_use] pub fn sof(&mut self) -> SOF_W { SOF_W::new(self, 5) } #[doc = "Bit 6 - End Of Frame"] #[inline(always)] - #[must_use] pub fn eof(&mut self) -> EOF_W { EOF_W::new(self, 6) } #[doc = "Bit 8 - TBUF Data Single Shot Mode"] #[inline(always)] - #[must_use] pub fn tdssm(&mut self) -> TDSSM_W { TDSSM_W::new(self, 8) } #[doc = "Bits 10:11 - TBUF Data Enable"] #[inline(always)] - #[must_use] pub fn tden(&mut self) -> TDEN_W { TDEN_W::new(self, 10) } #[doc = "Bit 12 - TBUF Data Valid Trigger"] #[inline(always)] - #[must_use] pub fn tdvtr(&mut self) -> TDVTR_W { TDVTR_W::new(self, 12) } #[doc = "Bit 13 - Word Address"] #[inline(always)] - #[must_use] pub fn wa(&mut self) -> WA_W { WA_W::new(self, 13) } diff --git a/src/usic0_ch0/trbscr.rs b/src/usic0_ch0/trbscr.rs index 61d99c08..988689b6 100644 --- a/src/usic0_ch0/trbscr.rs +++ b/src/usic0_ch0/trbscr.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - Clear Standard Receive Buffer Event"] #[inline(always)] - #[must_use] pub fn csrbi(&mut self) -> CSRBI_W { CSRBI_W::new(self, 0) } #[doc = "Bit 1 - Clear Receive Buffer Error Event"] #[inline(always)] - #[must_use] pub fn crberi(&mut self) -> CRBERI_W { CRBERI_W::new(self, 1) } #[doc = "Bit 2 - Clear Alternative Receive Buffer Event"] #[inline(always)] - #[must_use] pub fn carbi(&mut self) -> CARBI_W { CARBI_W::new(self, 2) } #[doc = "Bit 8 - Clear Standard Transmit Buffer Event"] #[inline(always)] - #[must_use] pub fn cstbi(&mut self) -> CSTBI_W { CSTBI_W::new(self, 8) } #[doc = "Bit 9 - Clear Transmit Buffer Error Event"] #[inline(always)] - #[must_use] pub fn ctberi(&mut self) -> CTBERI_W { CTBERI_W::new(self, 9) } #[doc = "Bit 10 - Clear Bypass Data Valid"] #[inline(always)] - #[must_use] pub fn cbdv(&mut self) -> CBDV_W { CBDV_W::new(self, 10) } #[doc = "Bit 14 - Flush Receive Buffer"] #[inline(always)] - #[must_use] pub fn flushrb(&mut self) -> FLUSHRB_W { FLUSHRB_W::new(self, 14) } #[doc = "Bit 15 - Flush Transmit Buffer"] #[inline(always)] - #[must_use] pub fn flushtb(&mut self) -> FLUSHTB_W { FLUSHTB_W::new(self, 15) } diff --git a/src/usic0_ch0/trbsr.rs b/src/usic0_ch0/trbsr.rs index 6234275c..8db05232 100644 --- a/src/usic0_ch0/trbsr.rs +++ b/src/usic0_ch0/trbsr.rs @@ -639,31 +639,26 @@ impl R { impl W { #[doc = "Bit 0 - Standard Receive Buffer Event"] #[inline(always)] - #[must_use] pub fn srbi(&mut self) -> SRBI_W { SRBI_W::new(self, 0) } #[doc = "Bit 1 - Receive Buffer Error Event"] #[inline(always)] - #[must_use] pub fn rberi(&mut self) -> RBERI_W { RBERI_W::new(self, 1) } #[doc = "Bit 2 - Alternative Receive Buffer Event"] #[inline(always)] - #[must_use] pub fn arbi(&mut self) -> ARBI_W { ARBI_W::new(self, 2) } #[doc = "Bit 8 - Standard Transmit Buffer Event"] #[inline(always)] - #[must_use] pub fn stbi(&mut self) -> STBI_W { STBI_W::new(self, 8) } #[doc = "Bit 9 - Transmit Buffer Error Event"] #[inline(always)] - #[must_use] pub fn tberi(&mut self) -> TBERI_W { TBERI_W::new(self, 9) } diff --git a/src/vadc/brsctrl.rs b/src/vadc/brsctrl.rs index 896b800f..aceecead 100644 --- a/src/vadc/brsctrl.rs +++ b/src/vadc/brsctrl.rs @@ -270,37 +270,31 @@ impl R { impl W { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] - #[must_use] pub fn srcresreg(&mut self) -> SRCRESREG_W { SRCRESREG_W::new(self, 0) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] - #[must_use] pub fn xtsel(&mut self) -> XTSEL_W { XTSEL_W::new(self, 8) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] - #[must_use] pub fn xtmode(&mut self) -> XTMODE_W { XTMODE_W::new(self, 13) } #[doc = "Bit 15 - Write Control for Trigger Configuration"] #[inline(always)] - #[must_use] pub fn xtwc(&mut self) -> XTWC_W { XTWC_W::new(self, 15) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] - #[must_use] pub fn gtsel(&mut self) -> GTSEL_W { GTSEL_W::new(self, 16) } #[doc = "Bit 23 - Write Control for Gate Configuration"] #[inline(always)] - #[must_use] pub fn gtwc(&mut self) -> GTWC_W { GTWC_W::new(self, 23) } diff --git a/src/vadc/brsmr.rs b/src/vadc/brsmr.rs index 5241d160..8dd4f74f 100644 --- a/src/vadc/brsmr.rs +++ b/src/vadc/brsmr.rs @@ -491,49 +491,41 @@ impl R { impl W { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] - #[must_use] pub fn engt(&mut self) -> ENGT_W { ENGT_W::new(self, 0) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] - #[must_use] pub fn entr(&mut self) -> ENTR_W { ENTR_W::new(self, 2) } #[doc = "Bit 3 - Enable Source Interrupt"] #[inline(always)] - #[must_use] pub fn ensi(&mut self) -> ENSI_W { ENSI_W::new(self, 3) } #[doc = "Bit 4 - Autoscan Enable"] #[inline(always)] - #[must_use] pub fn scan(&mut self) -> SCAN_W { SCAN_W::new(self, 4) } #[doc = "Bit 5 - Autoscan Source Load Event Mode"] #[inline(always)] - #[must_use] pub fn ldm(&mut self) -> LDM_W { LDM_W::new(self, 5) } #[doc = "Bit 8 - Clear Pending Bits"] #[inline(always)] - #[must_use] pub fn clrpnd(&mut self) -> CLRPND_W { CLRPND_W::new(self, 8) } #[doc = "Bit 9 - Generate Load Event"] #[inline(always)] - #[must_use] pub fn ldev(&mut self) -> LDEV_W { LDEV_W::new(self, 9) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] - #[must_use] pub fn rptdis(&mut self) -> RPTDIS_W { RPTDIS_W::new(self, 16) } diff --git a/src/vadc/brspnd.rs b/src/vadc/brspnd.rs index dcce6d87..8f76366c 100644 --- a/src/vadc/brspnd.rs +++ b/src/vadc/brspnd.rs @@ -471,49 +471,41 @@ impl R { impl W { #[doc = "Bit 0 - Channels Pending Group x"] #[inline(always)] - #[must_use] pub fn chpndg0(&mut self) -> CHPNDG0_W { CHPNDG0_W::new(self, 0) } #[doc = "Bit 1 - Channels Pending Group x"] #[inline(always)] - #[must_use] pub fn chpndg1(&mut self) -> CHPNDG1_W { CHPNDG1_W::new(self, 1) } #[doc = "Bit 2 - Channels Pending Group x"] #[inline(always)] - #[must_use] pub fn chpndg2(&mut self) -> CHPNDG2_W { CHPNDG2_W::new(self, 2) } #[doc = "Bit 3 - Channels Pending Group x"] #[inline(always)] - #[must_use] pub fn chpndg3(&mut self) -> CHPNDG3_W { CHPNDG3_W::new(self, 3) } #[doc = "Bit 4 - Channels Pending Group x"] #[inline(always)] - #[must_use] pub fn chpndg4(&mut self) -> CHPNDG4_W { CHPNDG4_W::new(self, 4) } #[doc = "Bit 5 - Channels Pending Group x"] #[inline(always)] - #[must_use] pub fn chpndg5(&mut self) -> CHPNDG5_W { CHPNDG5_W::new(self, 5) } #[doc = "Bit 6 - Channels Pending Group x"] #[inline(always)] - #[must_use] pub fn chpndg6(&mut self) -> CHPNDG6_W { CHPNDG6_W::new(self, 6) } #[doc = "Bit 7 - Channels Pending Group x"] #[inline(always)] - #[must_use] pub fn chpndg7(&mut self) -> CHPNDG7_W { CHPNDG7_W::new(self, 7) } diff --git a/src/vadc/brssel.rs b/src/vadc/brssel.rs index 21ad8ceb..e10b4b55 100644 --- a/src/vadc/brssel.rs +++ b/src/vadc/brssel.rs @@ -471,49 +471,41 @@ impl R { impl W { #[doc = "Bit 0 - Channel Selection Group x"] #[inline(always)] - #[must_use] pub fn chselg0(&mut self) -> CHSELG0_W { CHSELG0_W::new(self, 0) } #[doc = "Bit 1 - Channel Selection Group x"] #[inline(always)] - #[must_use] pub fn chselg1(&mut self) -> CHSELG1_W { CHSELG1_W::new(self, 1) } #[doc = "Bit 2 - Channel Selection Group x"] #[inline(always)] - #[must_use] pub fn chselg2(&mut self) -> CHSELG2_W { CHSELG2_W::new(self, 2) } #[doc = "Bit 3 - Channel Selection Group x"] #[inline(always)] - #[must_use] pub fn chselg3(&mut self) -> CHSELG3_W { CHSELG3_W::new(self, 3) } #[doc = "Bit 4 - Channel Selection Group x"] #[inline(always)] - #[must_use] pub fn chselg4(&mut self) -> CHSELG4_W { CHSELG4_W::new(self, 4) } #[doc = "Bit 5 - Channel Selection Group x"] #[inline(always)] - #[must_use] pub fn chselg5(&mut self) -> CHSELG5_W { CHSELG5_W::new(self, 5) } #[doc = "Bit 6 - Channel Selection Group x"] #[inline(always)] - #[must_use] pub fn chselg6(&mut self) -> CHSELG6_W { CHSELG6_W::new(self, 6) } #[doc = "Bit 7 - Channel Selection Group x"] #[inline(always)] - #[must_use] pub fn chselg7(&mut self) -> CHSELG7_W { CHSELG7_W::new(self, 7) } diff --git a/src/vadc/clc.rs b/src/vadc/clc.rs index e1613540..19cf2cea 100644 --- a/src/vadc/clc.rs +++ b/src/vadc/clc.rs @@ -164,13 +164,11 @@ impl R { impl W { #[doc = "Bit 0 - Module Disable Request Bit"] #[inline(always)] - #[must_use] pub fn disr(&mut self) -> DISR_W { DISR_W::new(self, 0) } #[doc = "Bit 3 - Sleep Mode Enable Control"] #[inline(always)] - #[must_use] pub fn edis(&mut self) -> EDIS_W { EDIS_W::new(self, 3) } diff --git a/src/vadc/emuxsel.rs b/src/vadc/emuxsel.rs index abc1c7d8..c5fb1c47 100644 --- a/src/vadc/emuxsel.rs +++ b/src/vadc/emuxsel.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:3 - External Multiplexer Group for Interface x"] #[inline(always)] - #[must_use] pub fn emuxgrp0(&mut self) -> EMUXGRP0_W { EMUXGRP0_W::new(self, 0) } #[doc = "Bits 4:7 - External Multiplexer Group for Interface x"] #[inline(always)] - #[must_use] pub fn emuxgrp1(&mut self) -> EMUXGRP1_W { EMUXGRP1_W::new(self, 4) } diff --git a/src/vadc/globbound.rs b/src/vadc/globbound.rs index 94700203..713df314 100644 --- a/src/vadc/globbound.rs +++ b/src/vadc/globbound.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:11 - Boundary Value 0 for Limit Checking"] #[inline(always)] - #[must_use] pub fn boundary0(&mut self) -> BOUNDARY0_W { BOUNDARY0_W::new(self, 0) } #[doc = "Bits 16:27 - Boundary Value 1 for Limit Checking"] #[inline(always)] - #[must_use] pub fn boundary1(&mut self) -> BOUNDARY1_W { BOUNDARY1_W::new(self, 16) } diff --git a/src/vadc/globcfg.rs b/src/vadc/globcfg.rs index 3c718764..75159bde 100644 --- a/src/vadc/globcfg.rs +++ b/src/vadc/globcfg.rs @@ -541,55 +541,46 @@ impl R { impl W { #[doc = "Bits 0:4 - Divider Factor for the Analog Internal Clock"] #[inline(always)] - #[must_use] pub fn diva(&mut self) -> DIVA_W { DIVA_W::new(self, 0) } #[doc = "Bit 7 - Double Clock for the MSB Conversion"] #[inline(always)] - #[must_use] pub fn dcmsb(&mut self) -> DCMSB_W { DCMSB_W::new(self, 7) } #[doc = "Bits 8:9 - Divider Factor for the Arbiter Clock"] #[inline(always)] - #[must_use] pub fn divd(&mut self) -> DIVD_W { DIVD_W::new(self, 8) } #[doc = "Bit 15 - Write Control for Divider Parameters"] #[inline(always)] - #[must_use] pub fn divwc(&mut self) -> DIVWC_W { DIVWC_W::new(self, 15) } #[doc = "Bit 16 - Disable Post-Calibration"] #[inline(always)] - #[must_use] pub fn dpcal0(&mut self) -> DPCAL0_W { DPCAL0_W::new(self, 16) } #[doc = "Bit 17 - Disable Post-Calibration"] #[inline(always)] - #[must_use] pub fn dpcal1(&mut self) -> DPCAL1_W { DPCAL1_W::new(self, 17) } #[doc = "Bit 18 - Disable Post-Calibration"] #[inline(always)] - #[must_use] pub fn dpcal2(&mut self) -> DPCAL2_W { DPCAL2_W::new(self, 18) } #[doc = "Bit 19 - Disable Post-Calibration"] #[inline(always)] - #[must_use] pub fn dpcal3(&mut self) -> DPCAL3_W { DPCAL3_W::new(self, 19) } #[doc = "Bit 31 - Start-Up Calibration"] #[inline(always)] - #[must_use] pub fn sucal(&mut self) -> SUCAL_W { SUCAL_W::new(self, 31) } diff --git a/src/vadc/globeflag.rs b/src/vadc/globeflag.rs index 258f9e3c..e24bd250 100644 --- a/src/vadc/globeflag.rs +++ b/src/vadc/globeflag.rs @@ -185,25 +185,21 @@ impl R { impl W { #[doc = "Bit 0 - Source Event (Background)"] #[inline(always)] - #[must_use] pub fn sevglb(&mut self) -> SEVGLB_W { SEVGLB_W::new(self, 0) } #[doc = "Bit 8 - Global Result Event"] #[inline(always)] - #[must_use] pub fn revglb(&mut self) -> REVGLB_W { REVGLB_W::new(self, 8) } #[doc = "Bit 16 - Clear Source Event (Background)"] #[inline(always)] - #[must_use] pub fn sevglbclr(&mut self) -> SEVGLBCLR_W { SEVGLBCLR_W::new(self, 16) } #[doc = "Bit 24 - Clear Global Result Event"] #[inline(always)] - #[must_use] pub fn revglbclr(&mut self) -> REVGLBCLR_W { REVGLBCLR_W::new(self, 24) } diff --git a/src/vadc/globevnp.rs b/src/vadc/globevnp.rs index f5cb453b..40021062 100644 --- a/src/vadc/globevnp.rs +++ b/src/vadc/globevnp.rs @@ -189,13 +189,11 @@ impl R { impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Backgr. Source"] #[inline(always)] - #[must_use] pub fn sev0np(&mut self) -> SEV0NP_W { SEV0NP_W::new(self, 0) } #[doc = "Bits 16:19 - Service Request Node Pointer Backgr. Result"] #[inline(always)] - #[must_use] pub fn rev0np(&mut self) -> REV0NP_W { REV0NP_W::new(self, 16) } diff --git a/src/vadc/globiclass.rs b/src/vadc/globiclass.rs index e7300997..93c4a061 100644 --- a/src/vadc/globiclass.rs +++ b/src/vadc/globiclass.rs @@ -207,25 +207,21 @@ impl R { impl W { #[doc = "Bits 0:4 - Sample Time Control for Standard Conversions"] #[inline(always)] - #[must_use] pub fn stcs(&mut self) -> STCS_W { STCS_W::new(self, 0) } #[doc = "Bits 8:10 - Conversion Mode for Standard Conversions"] #[inline(always)] - #[must_use] pub fn cms(&mut self) -> CMS_W { CMS_W::new(self, 8) } #[doc = "Bits 16:20 - Sample Time Control for EMUX Conversions"] #[inline(always)] - #[must_use] pub fn stce(&mut self) -> STCE_W { STCE_W::new(self, 16) } #[doc = "Bits 24:26 - Conversion Mode for EMUX Conversions"] #[inline(always)] - #[must_use] pub fn cme(&mut self) -> CME_W { CME_W::new(self, 24) } diff --git a/src/vadc/globrcr.rs b/src/vadc/globrcr.rs index 3b3e3388..e714aaec 100644 --- a/src/vadc/globrcr.rs +++ b/src/vadc/globrcr.rs @@ -175,19 +175,16 @@ impl R { impl W { #[doc = "Bits 16:19 - Data Reduction Control"] #[inline(always)] - #[must_use] pub fn drctr(&mut self) -> DRCTR_W { DRCTR_W::new(self, 16) } #[doc = "Bit 24 - Wait-for-Read Mode Enable"] #[inline(always)] - #[must_use] pub fn wfr(&mut self) -> WFR_W { WFR_W::new(self, 24) } #[doc = "Bit 31 - Service Request Generation Enable"] #[inline(always)] - #[must_use] pub fn srgen(&mut self) -> SRGEN_W { SRGEN_W::new(self, 31) } diff --git a/src/vadc/globres.rs b/src/vadc/globres.rs index 019b9ee8..563302f0 100644 --- a/src/vadc/globres.rs +++ b/src/vadc/globres.rs @@ -143,13 +143,11 @@ impl R { impl W { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] - #[must_use] pub fn result(&mut self) -> RESULT_W { RESULT_W::new(self, 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] - #[must_use] pub fn vf(&mut self) -> VF_W { VF_W::new(self, 31) } diff --git a/src/vadc/globresd.rs b/src/vadc/globresd.rs index edfff83e..d09f940f 100644 --- a/src/vadc/globresd.rs +++ b/src/vadc/globresd.rs @@ -143,13 +143,11 @@ impl R { impl W { #[doc = "Bits 0:15 - Result of most recent conversion"] #[inline(always)] - #[must_use] pub fn result(&mut self) -> RESULT_W { RESULT_W::new(self, 0) } #[doc = "Bit 31 - Valid Flag"] #[inline(always)] - #[must_use] pub fn vf(&mut self) -> VF_W { VF_W::new(self, 31) } diff --git a/src/vadc/globtf.rs b/src/vadc/globtf.rs index 9d8aacec..974f42f8 100644 --- a/src/vadc/globtf.rs +++ b/src/vadc/globtf.rs @@ -285,37 +285,31 @@ impl R { impl W { #[doc = "Bits 4:7 - Converter Diagnostics Group"] #[inline(always)] - #[must_use] pub fn cdgr(&mut self) -> CDGR_W { CDGR_W::new(self, 4) } #[doc = "Bit 8 - Converter Diagnostics Enable"] #[inline(always)] - #[must_use] pub fn cden(&mut self) -> CDEN_W { CDEN_W::new(self, 8) } #[doc = "Bits 9:10 - Converter Diagnostics Pull-Devices Select"] #[inline(always)] - #[must_use] pub fn cdsel(&mut self) -> CDSEL_W { CDSEL_W::new(self, 9) } #[doc = "Bit 15 - Write Control for Conversion Diagnostics"] #[inline(always)] - #[must_use] pub fn cdwc(&mut self) -> CDWC_W { CDWC_W::new(self, 15) } #[doc = "Bit 16 - Pull-Down Diagnostics Enable"] #[inline(always)] - #[must_use] pub fn pdd(&mut self) -> PDD_W { PDD_W::new(self, 16) } #[doc = "Bit 23 - Write Control for Multiplexer Diagnostics"] #[inline(always)] - #[must_use] pub fn mdwc(&mut self) -> MDWC_W { MDWC_W::new(self, 23) } diff --git a/src/vadc/ocs.rs b/src/vadc/ocs.rs index f95037fd..d695ca8a 100644 --- a/src/vadc/ocs.rs +++ b/src/vadc/ocs.rs @@ -266,31 +266,26 @@ impl R { impl W { #[doc = "Bits 0:1 - Trigger Set for OTGB0/1"] #[inline(always)] - #[must_use] pub fn tgs(&mut self) -> TGS_W { TGS_W::new(self, 0) } #[doc = "Bit 2 - OTGB0/1 Bus Select"] #[inline(always)] - #[must_use] pub fn tgb(&mut self) -> TGB_W { TGB_W::new(self, 2) } #[doc = "Bit 3 - TGS, TGB Write Protection"] #[inline(always)] - #[must_use] pub fn tg_p(&mut self) -> TG_P_W { TG_P_W::new(self, 3) } #[doc = "Bits 24:27 - OCDS Suspend Control"] #[inline(always)] - #[must_use] pub fn sus(&mut self) -> SUS_W { SUS_W::new(self, 24) } #[doc = "Bit 28 - SUS Write Protection"] #[inline(always)] - #[must_use] pub fn sus_p(&mut self) -> SUS_P_W { SUS_P_W::new(self, 28) } diff --git a/src/vadc_g0.rs b/src/vadc_g0.rs index 673d1332..a08c143b 100644 --- a/src/vadc_g0.rs +++ b/src/vadc_g0.rs @@ -144,12 +144,12 @@ impl RegisterBlock { #[doc = "0x110 - Queue 0 Backup Register"] #[inline(always)] pub const fn qbur0(&self) -> &QBUR0 { - unsafe { &*(self as *const Self).cast::().add(272).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(272).cast() } } #[doc = "0x110 - Queue 0 Input Register"] #[inline(always)] pub const fn qinr0(&self) -> &QINR0 { - unsafe { &*(self as *const Self).cast::().add(272).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(272).cast() } } #[doc = "0x120 - Autoscan Source Control Register"] #[inline(always)] diff --git a/src/vadc_g0/alias.rs b/src/vadc_g0/alias.rs index 3029b53d..efbbd1a9 100644 --- a/src/vadc_g0/alias.rs +++ b/src/vadc_g0/alias.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:4 - Alias Value for CH0 Conversion Requests"] #[inline(always)] - #[must_use] pub fn alias0(&mut self) -> ALIAS0_W { ALIAS0_W::new(self, 0) } #[doc = "Bits 8:12 - Alias Value for CH1 Conversion Requests"] #[inline(always)] - #[must_use] pub fn alias1(&mut self) -> ALIAS1_W { ALIAS1_W::new(self, 8) } diff --git a/src/vadc_g0/arbcfg.rs b/src/vadc_g0/arbcfg.rs index 633b6356..9aa26f2a 100644 --- a/src/vadc_g0/arbcfg.rs +++ b/src/vadc_g0/arbcfg.rs @@ -335,19 +335,16 @@ impl R { impl W { #[doc = "Bits 0:1 - Analog Converter Control"] #[inline(always)] - #[must_use] pub fn anonc(&mut self) -> ANONC_W { ANONC_W::new(self, 0) } #[doc = "Bits 4:5 - Arbitration Round Length"] #[inline(always)] - #[must_use] pub fn arbrnd(&mut self) -> ARBRND_W { ARBRND_W::new(self, 4) } #[doc = "Bit 7 - Arbitration Mode"] #[inline(always)] - #[must_use] pub fn arbm(&mut self) -> ARBM_W { ARBM_W::new(self, 7) } diff --git a/src/vadc_g0/arbpr.rs b/src/vadc_g0/arbpr.rs index fdb1c9ec..9679cfcf 100644 --- a/src/vadc_g0/arbpr.rs +++ b/src/vadc_g0/arbpr.rs @@ -550,55 +550,46 @@ impl R { impl W { #[doc = "Bits 0:1 - Priority of Request Source x"] #[inline(always)] - #[must_use] pub fn prio0(&mut self) -> PRIO0_W { PRIO0_W::new(self, 0) } #[doc = "Bit 3 - Conversion Start Mode of Request Source x"] #[inline(always)] - #[must_use] pub fn csm0(&mut self) -> CSM0_W { CSM0_W::new(self, 3) } #[doc = "Bits 4:5 - Priority of Request Source x"] #[inline(always)] - #[must_use] pub fn prio1(&mut self) -> PRIO1_W { PRIO1_W::new(self, 4) } #[doc = "Bit 7 - Conversion Start Mode of Request Source x"] #[inline(always)] - #[must_use] pub fn csm1(&mut self) -> CSM1_W { CSM1_W::new(self, 7) } #[doc = "Bits 8:9 - Priority of Request Source x"] #[inline(always)] - #[must_use] pub fn prio2(&mut self) -> PRIO2_W { PRIO2_W::new(self, 8) } #[doc = "Bit 11 - Conversion Start Mode of Request Source x"] #[inline(always)] - #[must_use] pub fn csm2(&mut self) -> CSM2_W { CSM2_W::new(self, 11) } #[doc = "Bit 24 - Arbitration Slot 0 Enable"] #[inline(always)] - #[must_use] pub fn asen0(&mut self) -> ASEN0_W { ASEN0_W::new(self, 24) } #[doc = "Bit 25 - Arbitration Slot 1 Enable"] #[inline(always)] - #[must_use] pub fn asen1(&mut self) -> ASEN1_W { ASEN1_W::new(self, 25) } #[doc = "Bit 26 - Arbitration Slot 2 Enable"] #[inline(always)] - #[must_use] pub fn asen2(&mut self) -> ASEN2_W { ASEN2_W::new(self, 26) } diff --git a/src/vadc_g0/asctrl.rs b/src/vadc_g0/asctrl.rs index a8c19c4f..dc4ae8f2 100644 --- a/src/vadc_g0/asctrl.rs +++ b/src/vadc_g0/asctrl.rs @@ -359,49 +359,41 @@ impl R { impl W { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] - #[must_use] pub fn srcresreg(&mut self) -> SRCRESREG_W { SRCRESREG_W::new(self, 0) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] - #[must_use] pub fn xtsel(&mut self) -> XTSEL_W { XTSEL_W::new(self, 8) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] - #[must_use] pub fn xtmode(&mut self) -> XTMODE_W { XTMODE_W::new(self, 13) } #[doc = "Bit 15 - Write Control for Trigger Configuration"] #[inline(always)] - #[must_use] pub fn xtwc(&mut self) -> XTWC_W { XTWC_W::new(self, 15) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] - #[must_use] pub fn gtsel(&mut self) -> GTSEL_W { GTSEL_W::new(self, 16) } #[doc = "Bit 23 - Write Control for Gate Configuration"] #[inline(always)] - #[must_use] pub fn gtwc(&mut self) -> GTWC_W { GTWC_W::new(self, 23) } #[doc = "Bit 28 - Timer Mode Enable"] #[inline(always)] - #[must_use] pub fn tmen(&mut self) -> TMEN_W { TMEN_W::new(self, 28) } #[doc = "Bit 31 - Write Control for Timer Mode"] #[inline(always)] - #[must_use] pub fn tmwc(&mut self) -> TMWC_W { TMWC_W::new(self, 31) } diff --git a/src/vadc_g0/asmr.rs b/src/vadc_g0/asmr.rs index 0cd23894..53614027 100644 --- a/src/vadc_g0/asmr.rs +++ b/src/vadc_g0/asmr.rs @@ -491,49 +491,41 @@ impl R { impl W { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] - #[must_use] pub fn engt(&mut self) -> ENGT_W { ENGT_W::new(self, 0) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] - #[must_use] pub fn entr(&mut self) -> ENTR_W { ENTR_W::new(self, 2) } #[doc = "Bit 3 - Enable Source Interrupt"] #[inline(always)] - #[must_use] pub fn ensi(&mut self) -> ENSI_W { ENSI_W::new(self, 3) } #[doc = "Bit 4 - Autoscan Enable"] #[inline(always)] - #[must_use] pub fn scan(&mut self) -> SCAN_W { SCAN_W::new(self, 4) } #[doc = "Bit 5 - Autoscan Source Load Event Mode"] #[inline(always)] - #[must_use] pub fn ldm(&mut self) -> LDM_W { LDM_W::new(self, 5) } #[doc = "Bit 8 - Clear Pending Bits"] #[inline(always)] - #[must_use] pub fn clrpnd(&mut self) -> CLRPND_W { CLRPND_W::new(self, 8) } #[doc = "Bit 9 - Generate Load Event"] #[inline(always)] - #[must_use] pub fn ldev(&mut self) -> LDEV_W { LDEV_W::new(self, 9) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] - #[must_use] pub fn rptdis(&mut self) -> RPTDIS_W { RPTDIS_W::new(self, 16) } diff --git a/src/vadc_g0/aspnd.rs b/src/vadc_g0/aspnd.rs index 1ac92e4f..c487e87b 100644 --- a/src/vadc_g0/aspnd.rs +++ b/src/vadc_g0/aspnd.rs @@ -471,49 +471,41 @@ impl R { impl W { #[doc = "Bit 0 - Channels Pending"] #[inline(always)] - #[must_use] pub fn chpnd0(&mut self) -> CHPND0_W { CHPND0_W::new(self, 0) } #[doc = "Bit 1 - Channels Pending"] #[inline(always)] - #[must_use] pub fn chpnd1(&mut self) -> CHPND1_W { CHPND1_W::new(self, 1) } #[doc = "Bit 2 - Channels Pending"] #[inline(always)] - #[must_use] pub fn chpnd2(&mut self) -> CHPND2_W { CHPND2_W::new(self, 2) } #[doc = "Bit 3 - Channels Pending"] #[inline(always)] - #[must_use] pub fn chpnd3(&mut self) -> CHPND3_W { CHPND3_W::new(self, 3) } #[doc = "Bit 4 - Channels Pending"] #[inline(always)] - #[must_use] pub fn chpnd4(&mut self) -> CHPND4_W { CHPND4_W::new(self, 4) } #[doc = "Bit 5 - Channels Pending"] #[inline(always)] - #[must_use] pub fn chpnd5(&mut self) -> CHPND5_W { CHPND5_W::new(self, 5) } #[doc = "Bit 6 - Channels Pending"] #[inline(always)] - #[must_use] pub fn chpnd6(&mut self) -> CHPND6_W { CHPND6_W::new(self, 6) } #[doc = "Bit 7 - Channels Pending"] #[inline(always)] - #[must_use] pub fn chpnd7(&mut self) -> CHPND7_W { CHPND7_W::new(self, 7) } diff --git a/src/vadc_g0/assel.rs b/src/vadc_g0/assel.rs index d92af792..b2505d07 100644 --- a/src/vadc_g0/assel.rs +++ b/src/vadc_g0/assel.rs @@ -471,49 +471,41 @@ impl R { impl W { #[doc = "Bit 0 - Channel Selection"] #[inline(always)] - #[must_use] pub fn chsel0(&mut self) -> CHSEL0_W { CHSEL0_W::new(self, 0) } #[doc = "Bit 1 - Channel Selection"] #[inline(always)] - #[must_use] pub fn chsel1(&mut self) -> CHSEL1_W { CHSEL1_W::new(self, 1) } #[doc = "Bit 2 - Channel Selection"] #[inline(always)] - #[must_use] pub fn chsel2(&mut self) -> CHSEL2_W { CHSEL2_W::new(self, 2) } #[doc = "Bit 3 - Channel Selection"] #[inline(always)] - #[must_use] pub fn chsel3(&mut self) -> CHSEL3_W { CHSEL3_W::new(self, 3) } #[doc = "Bit 4 - Channel Selection"] #[inline(always)] - #[must_use] pub fn chsel4(&mut self) -> CHSEL4_W { CHSEL4_W::new(self, 4) } #[doc = "Bit 5 - Channel Selection"] #[inline(always)] - #[must_use] pub fn chsel5(&mut self) -> CHSEL5_W { CHSEL5_W::new(self, 5) } #[doc = "Bit 6 - Channel Selection"] #[inline(always)] - #[must_use] pub fn chsel6(&mut self) -> CHSEL6_W { CHSEL6_W::new(self, 6) } #[doc = "Bit 7 - Channel Selection"] #[inline(always)] - #[must_use] pub fn chsel7(&mut self) -> CHSEL7_W { CHSEL7_W::new(self, 7) } diff --git a/src/vadc_g0/bfl.rs b/src/vadc_g0/bfl.rs index d793de95..0e22b3ef 100644 --- a/src/vadc_g0/bfl.rs +++ b/src/vadc_g0/bfl.rs @@ -635,49 +635,41 @@ impl R { impl W { #[doc = "Bit 8 - Boundary Flag 0 Activation Select"] #[inline(always)] - #[must_use] pub fn bfa0(&mut self) -> BFA0_W { BFA0_W::new(self, 8) } #[doc = "Bit 9 - Boundary Flag 1 Activation Select"] #[inline(always)] - #[must_use] pub fn bfa1(&mut self) -> BFA1_W { BFA1_W::new(self, 9) } #[doc = "Bit 10 - Boundary Flag 2 Activation Select"] #[inline(always)] - #[must_use] pub fn bfa2(&mut self) -> BFA2_W { BFA2_W::new(self, 10) } #[doc = "Bit 11 - Boundary Flag 3 Activation Select"] #[inline(always)] - #[must_use] pub fn bfa3(&mut self) -> BFA3_W { BFA3_W::new(self, 11) } #[doc = "Bit 16 - Boundary Flag 0 Inversion Control"] #[inline(always)] - #[must_use] pub fn bfi0(&mut self) -> BFI0_W { BFI0_W::new(self, 16) } #[doc = "Bit 17 - Boundary Flag 1 Inversion Control"] #[inline(always)] - #[must_use] pub fn bfi1(&mut self) -> BFI1_W { BFI1_W::new(self, 17) } #[doc = "Bit 18 - Boundary Flag 2 Inversion Control"] #[inline(always)] - #[must_use] pub fn bfi2(&mut self) -> BFI2_W { BFI2_W::new(self, 18) } #[doc = "Bit 19 - Boundary Flag 3 Inversion Control"] #[inline(always)] - #[must_use] pub fn bfi3(&mut self) -> BFI3_W { BFI3_W::new(self, 19) } diff --git a/src/vadc_g0/bflc.rs b/src/vadc_g0/bflc.rs index 8037fe27..ea9ee979 100644 --- a/src/vadc_g0/bflc.rs +++ b/src/vadc_g0/bflc.rs @@ -371,25 +371,21 @@ impl R { impl W { #[doc = "Bits 0:3 - Boundary Flag y Mode Control"] #[inline(always)] - #[must_use] pub fn bfm0(&mut self) -> BFM0_W { BFM0_W::new(self, 0) } #[doc = "Bits 4:7 - Boundary Flag y Mode Control"] #[inline(always)] - #[must_use] pub fn bfm1(&mut self) -> BFM1_W { BFM1_W::new(self, 4) } #[doc = "Bits 8:11 - Boundary Flag y Mode Control"] #[inline(always)] - #[must_use] pub fn bfm2(&mut self) -> BFM2_W { BFM2_W::new(self, 8) } #[doc = "Bits 12:15 - Boundary Flag y Mode Control"] #[inline(always)] - #[must_use] pub fn bfm3(&mut self) -> BFM3_W { BFM3_W::new(self, 12) } diff --git a/src/vadc_g0/bflnp.rs b/src/vadc_g0/bflnp.rs index 2523f3dc..9fa28967 100644 --- a/src/vadc_g0/bflnp.rs +++ b/src/vadc_g0/bflnp.rs @@ -423,25 +423,21 @@ impl R { impl W { #[doc = "Bits 0:3 - Boundary Flag y Node Pointer"] #[inline(always)] - #[must_use] pub fn bfl0np(&mut self) -> BFL0NP_W { BFL0NP_W::new(self, 0) } #[doc = "Bits 4:7 - Boundary Flag y Node Pointer"] #[inline(always)] - #[must_use] pub fn bfl1np(&mut self) -> BFL1NP_W { BFL1NP_W::new(self, 4) } #[doc = "Bits 8:11 - Boundary Flag y Node Pointer"] #[inline(always)] - #[must_use] pub fn bfl2np(&mut self) -> BFL2NP_W { BFL2NP_W::new(self, 8) } #[doc = "Bits 12:15 - Boundary Flag y Node Pointer"] #[inline(always)] - #[must_use] pub fn bfl3np(&mut self) -> BFL3NP_W { BFL3NP_W::new(self, 12) } diff --git a/src/vadc_g0/bfls.rs b/src/vadc_g0/bfls.rs index fb781ac2..35fafb0c 100644 --- a/src/vadc_g0/bfls.rs +++ b/src/vadc_g0/bfls.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - Boundary Flag 0 Clear"] #[inline(always)] - #[must_use] pub fn bfc0(&mut self) -> BFC0_W { BFC0_W::new(self, 0) } #[doc = "Bit 1 - Boundary Flag 1 Clear"] #[inline(always)] - #[must_use] pub fn bfc1(&mut self) -> BFC1_W { BFC1_W::new(self, 1) } #[doc = "Bit 2 - Boundary Flag 2 Clear"] #[inline(always)] - #[must_use] pub fn bfc2(&mut self) -> BFC2_W { BFC2_W::new(self, 2) } #[doc = "Bit 3 - Boundary Flag 3 Clear"] #[inline(always)] - #[must_use] pub fn bfc3(&mut self) -> BFC3_W { BFC3_W::new(self, 3) } #[doc = "Bit 16 - Boundary Flag 0 Set"] #[inline(always)] - #[must_use] pub fn bfs0(&mut self) -> BFS0_W { BFS0_W::new(self, 16) } #[doc = "Bit 17 - Boundary Flag 1 Set"] #[inline(always)] - #[must_use] pub fn bfs1(&mut self) -> BFS1_W { BFS1_W::new(self, 17) } #[doc = "Bit 18 - Boundary Flag 2 Set"] #[inline(always)] - #[must_use] pub fn bfs2(&mut self) -> BFS2_W { BFS2_W::new(self, 18) } #[doc = "Bit 19 - Boundary Flag 3 Set"] #[inline(always)] - #[must_use] pub fn bfs3(&mut self) -> BFS3_W { BFS3_W::new(self, 19) } diff --git a/src/vadc_g0/bound.rs b/src/vadc_g0/bound.rs index 0bc27916..6bff3c98 100644 --- a/src/vadc_g0/bound.rs +++ b/src/vadc_g0/bound.rs @@ -25,13 +25,11 @@ impl R { impl W { #[doc = "Bits 0:11 - Boundary Value 0 for Limit Checking"] #[inline(always)] - #[must_use] pub fn boundary0(&mut self) -> BOUNDARY0_W { BOUNDARY0_W::new(self, 0) } #[doc = "Bits 16:27 - Boundary Value 1 for Limit Checking"] #[inline(always)] - #[must_use] pub fn boundary1(&mut self) -> BOUNDARY1_W { BOUNDARY1_W::new(self, 16) } diff --git a/src/vadc_g0/cefclr.rs b/src/vadc_g0/cefclr.rs index 190a9eb6..95f9ae09 100644 --- a/src/vadc_g0/cefclr.rs +++ b/src/vadc_g0/cefclr.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - Clear Channel Event for Channel 0"] #[inline(always)] - #[must_use] pub fn cev0(&mut self) -> CEV0_W { CEV0_W::new(self, 0) } #[doc = "Bit 1 - Clear Channel Event for Channel 1"] #[inline(always)] - #[must_use] pub fn cev1(&mut self) -> CEV1_W { CEV1_W::new(self, 1) } #[doc = "Bit 2 - Clear Channel Event for Channel 2"] #[inline(always)] - #[must_use] pub fn cev2(&mut self) -> CEV2_W { CEV2_W::new(self, 2) } #[doc = "Bit 3 - Clear Channel Event for Channel 3"] #[inline(always)] - #[must_use] pub fn cev3(&mut self) -> CEV3_W { CEV3_W::new(self, 3) } #[doc = "Bit 4 - Clear Channel Event for Channel 4"] #[inline(always)] - #[must_use] pub fn cev4(&mut self) -> CEV4_W { CEV4_W::new(self, 4) } #[doc = "Bit 5 - Clear Channel Event for Channel 5"] #[inline(always)] - #[must_use] pub fn cev5(&mut self) -> CEV5_W { CEV5_W::new(self, 5) } #[doc = "Bit 6 - Clear Channel Event for Channel 6"] #[inline(always)] - #[must_use] pub fn cev6(&mut self) -> CEV6_W { CEV6_W::new(self, 6) } #[doc = "Bit 7 - Clear Channel Event for Channel 7"] #[inline(always)] - #[must_use] pub fn cev7(&mut self) -> CEV7_W { CEV7_W::new(self, 7) } diff --git a/src/vadc_g0/ceflag.rs b/src/vadc_g0/ceflag.rs index 7c50801a..58f4ff68 100644 --- a/src/vadc_g0/ceflag.rs +++ b/src/vadc_g0/ceflag.rs @@ -471,49 +471,41 @@ impl R { impl W { #[doc = "Bit 0 - Channel Event for Channel 0"] #[inline(always)] - #[must_use] pub fn cev0(&mut self) -> CEV0_W { CEV0_W::new(self, 0) } #[doc = "Bit 1 - Channel Event for Channel 1"] #[inline(always)] - #[must_use] pub fn cev1(&mut self) -> CEV1_W { CEV1_W::new(self, 1) } #[doc = "Bit 2 - Channel Event for Channel 2"] #[inline(always)] - #[must_use] pub fn cev2(&mut self) -> CEV2_W { CEV2_W::new(self, 2) } #[doc = "Bit 3 - Channel Event for Channel 3"] #[inline(always)] - #[must_use] pub fn cev3(&mut self) -> CEV3_W { CEV3_W::new(self, 3) } #[doc = "Bit 4 - Channel Event for Channel 4"] #[inline(always)] - #[must_use] pub fn cev4(&mut self) -> CEV4_W { CEV4_W::new(self, 4) } #[doc = "Bit 5 - Channel Event for Channel 5"] #[inline(always)] - #[must_use] pub fn cev5(&mut self) -> CEV5_W { CEV5_W::new(self, 5) } #[doc = "Bit 6 - Channel Event for Channel 6"] #[inline(always)] - #[must_use] pub fn cev6(&mut self) -> CEV6_W { CEV6_W::new(self, 6) } #[doc = "Bit 7 - Channel Event for Channel 7"] #[inline(always)] - #[must_use] pub fn cev7(&mut self) -> CEV7_W { CEV7_W::new(self, 7) } diff --git a/src/vadc_g0/cevnp0.rs b/src/vadc_g0/cevnp0.rs index aef85d3c..be7c95a5 100644 --- a/src/vadc_g0/cevnp0.rs +++ b/src/vadc_g0/cevnp0.rs @@ -735,49 +735,41 @@ impl R { impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Channel Event i"] #[inline(always)] - #[must_use] pub fn cev0np(&mut self) -> CEV0NP_W { CEV0NP_W::new(self, 0) } #[doc = "Bits 4:7 - Service Request Node Pointer Channel Event i"] #[inline(always)] - #[must_use] pub fn cev1np(&mut self) -> CEV1NP_W { CEV1NP_W::new(self, 4) } #[doc = "Bits 8:11 - Service Request Node Pointer Channel Event i"] #[inline(always)] - #[must_use] pub fn cev2np(&mut self) -> CEV2NP_W { CEV2NP_W::new(self, 8) } #[doc = "Bits 12:15 - Service Request Node Pointer Channel Event i"] #[inline(always)] - #[must_use] pub fn cev3np(&mut self) -> CEV3NP_W { CEV3NP_W::new(self, 12) } #[doc = "Bits 16:19 - Service Request Node Pointer Channel Event i"] #[inline(always)] - #[must_use] pub fn cev4np(&mut self) -> CEV4NP_W { CEV4NP_W::new(self, 16) } #[doc = "Bits 20:23 - Service Request Node Pointer Channel Event i"] #[inline(always)] - #[must_use] pub fn cev5np(&mut self) -> CEV5NP_W { CEV5NP_W::new(self, 20) } #[doc = "Bits 24:27 - Service Request Node Pointer Channel Event i"] #[inline(always)] - #[must_use] pub fn cev6np(&mut self) -> CEV6NP_W { CEV6NP_W::new(self, 24) } #[doc = "Bits 28:31 - Service Request Node Pointer Channel Event i"] #[inline(always)] - #[must_use] pub fn cev7np(&mut self) -> CEV7NP_W { CEV7NP_W::new(self, 28) } diff --git a/src/vadc_g0/chass.rs b/src/vadc_g0/chass.rs index 21aca02a..2bd2aee8 100644 --- a/src/vadc_g0/chass.rs +++ b/src/vadc_g0/chass.rs @@ -471,49 +471,41 @@ impl R { impl W { #[doc = "Bit 0 - Assignment for Channel 0"] #[inline(always)] - #[must_use] pub fn assch0(&mut self) -> ASSCH0_W { ASSCH0_W::new(self, 0) } #[doc = "Bit 1 - Assignment for Channel 1"] #[inline(always)] - #[must_use] pub fn assch1(&mut self) -> ASSCH1_W { ASSCH1_W::new(self, 1) } #[doc = "Bit 2 - Assignment for Channel 2"] #[inline(always)] - #[must_use] pub fn assch2(&mut self) -> ASSCH2_W { ASSCH2_W::new(self, 2) } #[doc = "Bit 3 - Assignment for Channel 3"] #[inline(always)] - #[must_use] pub fn assch3(&mut self) -> ASSCH3_W { ASSCH3_W::new(self, 3) } #[doc = "Bit 4 - Assignment for Channel 4"] #[inline(always)] - #[must_use] pub fn assch4(&mut self) -> ASSCH4_W { ASSCH4_W::new(self, 4) } #[doc = "Bit 5 - Assignment for Channel 5"] #[inline(always)] - #[must_use] pub fn assch5(&mut self) -> ASSCH5_W { ASSCH5_W::new(self, 5) } #[doc = "Bit 6 - Assignment for Channel 6"] #[inline(always)] - #[must_use] pub fn assch6(&mut self) -> ASSCH6_W { ASSCH6_W::new(self, 6) } #[doc = "Bit 7 - Assignment for Channel 7"] #[inline(always)] - #[must_use] pub fn assch7(&mut self) -> ASSCH7_W { ASSCH7_W::new(self, 7) } diff --git a/src/vadc_g0/chctr.rs b/src/vadc_g0/chctr.rs index 744f1fc8..bbbe1ca2 100644 --- a/src/vadc_g0/chctr.rs +++ b/src/vadc_g0/chctr.rs @@ -791,67 +791,56 @@ impl R { impl W { #[doc = "Bits 0:1 - Input Class Select"] #[inline(always)] - #[must_use] pub fn iclsel(&mut self) -> ICLSEL_W { ICLSEL_W::new(self, 0) } #[doc = "Bits 4:5 - Lower Boundary Select"] #[inline(always)] - #[must_use] pub fn bndsell(&mut self) -> BNDSELL_W { BNDSELL_W::new(self, 4) } #[doc = "Bits 6:7 - Upper Boundary Select"] #[inline(always)] - #[must_use] pub fn bndselu(&mut self) -> BNDSELU_W { BNDSELU_W::new(self, 6) } #[doc = "Bits 8:9 - Channel Event Mode"] #[inline(always)] - #[must_use] pub fn chevmode(&mut self) -> CHEVMODE_W { CHEVMODE_W::new(self, 8) } #[doc = "Bit 10 - Synchronization Request"] #[inline(always)] - #[must_use] pub fn sync(&mut self) -> SYNC_W { SYNC_W::new(self, 10) } #[doc = "Bit 11 - Reference Input Selection"] #[inline(always)] - #[must_use] pub fn refsel(&mut self) -> REFSEL_W { REFSEL_W::new(self, 11) } #[doc = "Bits 16:19 - Result Register"] #[inline(always)] - #[must_use] pub fn resreg(&mut self) -> RESREG_W { RESREG_W::new(self, 16) } #[doc = "Bit 20 - Result Target for Background Source"] #[inline(always)] - #[must_use] pub fn restbs(&mut self) -> RESTBS_W { RESTBS_W::new(self, 20) } #[doc = "Bit 21 - Result Position"] #[inline(always)] - #[must_use] pub fn respos(&mut self) -> RESPOS_W { RESPOS_W::new(self, 21) } #[doc = "Bits 28:29 - Broken Wire Detection Channel"] #[inline(always)] - #[must_use] pub fn bwdch(&mut self) -> BWDCH_W { BWDCH_W::new(self, 28) } #[doc = "Bit 30 - Broken Wire Detection Enable"] #[inline(always)] - #[must_use] pub fn bwden(&mut self) -> BWDEN_W { BWDEN_W::new(self, 30) } diff --git a/src/vadc_g0/emuxctr.rs b/src/vadc_g0/emuxctr.rs index 4bcfbdf5..86cd24b9 100644 --- a/src/vadc_g0/emuxctr.rs +++ b/src/vadc_g0/emuxctr.rs @@ -311,37 +311,31 @@ impl R { impl W { #[doc = "Bits 0:2 - External Multiplexer Start Selection"] #[inline(always)] - #[must_use] pub fn emuxset(&mut self) -> EMUXSET_W { EMUXSET_W::new(self, 0) } #[doc = "Bits 16:25 - External Multiplexer Channel Select"] #[inline(always)] - #[must_use] pub fn emuxch(&mut self) -> EMUXCH_W { EMUXCH_W::new(self, 16) } #[doc = "Bits 26:27 - External Multiplexer Mode"] #[inline(always)] - #[must_use] pub fn emuxmode(&mut self) -> EMUXMODE_W { EMUXMODE_W::new(self, 26) } #[doc = "Bit 28 - External Multiplexer Coding Scheme"] #[inline(always)] - #[must_use] pub fn emxcod(&mut self) -> EMXCOD_W { EMXCOD_W::new(self, 28) } #[doc = "Bit 29 - External Multiplexer Sample Time Control"] #[inline(always)] - #[must_use] pub fn emxst(&mut self) -> EMXST_W { EMXST_W::new(self, 29) } #[doc = "Bit 31 - Write Control for EMUX Configuration"] #[inline(always)] - #[must_use] pub fn emxwc(&mut self) -> EMXWC_W { EMXWC_W::new(self, 31) } diff --git a/src/vadc_g0/iclass.rs b/src/vadc_g0/iclass.rs index 8dd2fd7a..a03055a9 100644 --- a/src/vadc_g0/iclass.rs +++ b/src/vadc_g0/iclass.rs @@ -207,25 +207,21 @@ impl R { impl W { #[doc = "Bits 0:4 - Sample Time Control for Standard Conversions"] #[inline(always)] - #[must_use] pub fn stcs(&mut self) -> STCS_W { STCS_W::new(self, 0) } #[doc = "Bits 8:10 - Conversion Mode for Standard Conversions"] #[inline(always)] - #[must_use] pub fn cms(&mut self) -> CMS_W { CMS_W::new(self, 8) } #[doc = "Bits 16:20 - Sample Time Control for EMUX Conversions"] #[inline(always)] - #[must_use] pub fn stce(&mut self) -> STCE_W { STCE_W::new(self, 16) } #[doc = "Bits 24:26 - Conversion Mode for EMUX Conversions"] #[inline(always)] - #[must_use] pub fn cme(&mut self) -> CME_W { CME_W::new(self, 24) } diff --git a/src/vadc_g0/qctrl0.rs b/src/vadc_g0/qctrl0.rs index c50c4161..6e084370 100644 --- a/src/vadc_g0/qctrl0.rs +++ b/src/vadc_g0/qctrl0.rs @@ -359,49 +359,41 @@ impl R { impl W { #[doc = "Bits 0:3 - Source-specific Result Register"] #[inline(always)] - #[must_use] pub fn srcresreg(&mut self) -> SRCRESREG_W { SRCRESREG_W::new(self, 0) } #[doc = "Bits 8:11 - External Trigger Input Selection"] #[inline(always)] - #[must_use] pub fn xtsel(&mut self) -> XTSEL_W { XTSEL_W::new(self, 8) } #[doc = "Bits 13:14 - Trigger Operating Mode"] #[inline(always)] - #[must_use] pub fn xtmode(&mut self) -> XTMODE_W { XTMODE_W::new(self, 13) } #[doc = "Bit 15 - Write Control for Trigger Configuration"] #[inline(always)] - #[must_use] pub fn xtwc(&mut self) -> XTWC_W { XTWC_W::new(self, 15) } #[doc = "Bits 16:19 - Gate Input Selection"] #[inline(always)] - #[must_use] pub fn gtsel(&mut self) -> GTSEL_W { GTSEL_W::new(self, 16) } #[doc = "Bit 23 - Write Control for Gate Configuration"] #[inline(always)] - #[must_use] pub fn gtwc(&mut self) -> GTWC_W { GTWC_W::new(self, 23) } #[doc = "Bit 28 - Timer Mode Enable"] #[inline(always)] - #[must_use] pub fn tmen(&mut self) -> TMEN_W { TMEN_W::new(self, 28) } #[doc = "Bit 31 - Write Control for Timer Mode"] #[inline(always)] - #[must_use] pub fn tmwc(&mut self) -> TMWC_W { TMWC_W::new(self, 31) } diff --git a/src/vadc_g0/qinr0.rs b/src/vadc_g0/qinr0.rs index f9ddfb71..65f02c89 100644 --- a/src/vadc_g0/qinr0.rs +++ b/src/vadc_g0/qinr0.rs @@ -98,25 +98,21 @@ where impl W { #[doc = "Bits 0:4 - Request Channel Number"] #[inline(always)] - #[must_use] pub fn reqchnr(&mut self) -> REQCHNR_W { REQCHNR_W::new(self, 0) } #[doc = "Bit 5 - Refill"] #[inline(always)] - #[must_use] pub fn rf(&mut self) -> RF_W { RF_W::new(self, 5) } #[doc = "Bit 6 - Enable Source Interrupt"] #[inline(always)] - #[must_use] pub fn ensi(&mut self) -> ENSI_W { ENSI_W::new(self, 6) } #[doc = "Bit 7 - External Trigger"] #[inline(always)] - #[must_use] pub fn extr(&mut self) -> EXTR_W { EXTR_W::new(self, 7) } diff --git a/src/vadc_g0/qmr0.rs b/src/vadc_g0/qmr0.rs index 2ae9b3bd..b45f6a83 100644 --- a/src/vadc_g0/qmr0.rs +++ b/src/vadc_g0/qmr0.rs @@ -338,43 +338,36 @@ impl R { impl W { #[doc = "Bits 0:1 - Enable Gate"] #[inline(always)] - #[must_use] pub fn engt(&mut self) -> ENGT_W { ENGT_W::new(self, 0) } #[doc = "Bit 2 - Enable External Trigger"] #[inline(always)] - #[must_use] pub fn entr(&mut self) -> ENTR_W { ENTR_W::new(self, 2) } #[doc = "Bit 8 - Clear Valid Bit"] #[inline(always)] - #[must_use] pub fn clrv(&mut self) -> CLRV_W { CLRV_W::new(self, 8) } #[doc = "Bit 9 - Trigger Event"] #[inline(always)] - #[must_use] pub fn trev(&mut self) -> TREV_W { TREV_W::new(self, 9) } #[doc = "Bit 10 - Flush Queue"] #[inline(always)] - #[must_use] pub fn flush(&mut self) -> FLUSH_W { FLUSH_W::new(self, 10) } #[doc = "Bit 11 - Clear Event Flag"] #[inline(always)] - #[must_use] pub fn cev(&mut self) -> CEV_W { CEV_W::new(self, 11) } #[doc = "Bit 16 - Repeat Disable"] #[inline(always)] - #[must_use] pub fn rptdis(&mut self) -> RPTDIS_W { RPTDIS_W::new(self, 16) } diff --git a/src/vadc_g0/rcr.rs b/src/vadc_g0/rcr.rs index c9145fd5..7dcb1a5f 100644 --- a/src/vadc_g0/rcr.rs +++ b/src/vadc_g0/rcr.rs @@ -275,31 +275,26 @@ impl R { impl W { #[doc = "Bits 16:19 - Data Reduction Control"] #[inline(always)] - #[must_use] pub fn drctr(&mut self) -> DRCTR_W { DRCTR_W::new(self, 16) } #[doc = "Bits 20:21 - Data Modification Mode"] #[inline(always)] - #[must_use] pub fn dmm(&mut self) -> DMM_W { DMM_W::new(self, 20) } #[doc = "Bit 24 - Wait-for-Read Mode Enable"] #[inline(always)] - #[must_use] pub fn wfr(&mut self) -> WFR_W { WFR_W::new(self, 24) } #[doc = "Bits 25:26 - FIFO Mode Enable"] #[inline(always)] - #[must_use] pub fn fen(&mut self) -> FEN_W { FEN_W::new(self, 25) } #[doc = "Bit 31 - Service Request Generation Enable"] #[inline(always)] - #[must_use] pub fn srgen(&mut self) -> SRGEN_W { SRGEN_W::new(self, 31) } diff --git a/src/vadc_g0/refclr.rs b/src/vadc_g0/refclr.rs index db8e1dc8..79d14f2a 100644 --- a/src/vadc_g0/refclr.rs +++ b/src/vadc_g0/refclr.rs @@ -499,97 +499,81 @@ where impl W { #[doc = "Bit 0 - Clear Result Event for Result Register 0"] #[inline(always)] - #[must_use] pub fn rev0(&mut self) -> REV0_W { REV0_W::new(self, 0) } #[doc = "Bit 1 - Clear Result Event for Result Register 1"] #[inline(always)] - #[must_use] pub fn rev1(&mut self) -> REV1_W { REV1_W::new(self, 1) } #[doc = "Bit 2 - Clear Result Event for Result Register 2"] #[inline(always)] - #[must_use] pub fn rev2(&mut self) -> REV2_W { REV2_W::new(self, 2) } #[doc = "Bit 3 - Clear Result Event for Result Register 3"] #[inline(always)] - #[must_use] pub fn rev3(&mut self) -> REV3_W { REV3_W::new(self, 3) } #[doc = "Bit 4 - Clear Result Event for Result Register 4"] #[inline(always)] - #[must_use] pub fn rev4(&mut self) -> REV4_W { REV4_W::new(self, 4) } #[doc = "Bit 5 - Clear Result Event for Result Register 5"] #[inline(always)] - #[must_use] pub fn rev5(&mut self) -> REV5_W { REV5_W::new(self, 5) } #[doc = "Bit 6 - Clear Result Event for Result Register 6"] #[inline(always)] - #[must_use] pub fn rev6(&mut self) -> REV6_W { REV6_W::new(self, 6) } #[doc = "Bit 7 - Clear Result Event for Result Register 7"] #[inline(always)] - #[must_use] pub fn rev7(&mut self) -> REV7_W { REV7_W::new(self, 7) } #[doc = "Bit 8 - Clear Result Event for Result Register 8"] #[inline(always)] - #[must_use] pub fn rev8(&mut self) -> REV8_W { REV8_W::new(self, 8) } #[doc = "Bit 9 - Clear Result Event for Result Register 9"] #[inline(always)] - #[must_use] pub fn rev9(&mut self) -> REV9_W { REV9_W::new(self, 9) } #[doc = "Bit 10 - Clear Result Event for Result Register 10"] #[inline(always)] - #[must_use] pub fn rev10(&mut self) -> REV10_W { REV10_W::new(self, 10) } #[doc = "Bit 11 - Clear Result Event for Result Register 11"] #[inline(always)] - #[must_use] pub fn rev11(&mut self) -> REV11_W { REV11_W::new(self, 11) } #[doc = "Bit 12 - Clear Result Event for Result Register 12"] #[inline(always)] - #[must_use] pub fn rev12(&mut self) -> REV12_W { REV12_W::new(self, 12) } #[doc = "Bit 13 - Clear Result Event for Result Register 13"] #[inline(always)] - #[must_use] pub fn rev13(&mut self) -> REV13_W { REV13_W::new(self, 13) } #[doc = "Bit 14 - Clear Result Event for Result Register 14"] #[inline(always)] - #[must_use] pub fn rev14(&mut self) -> REV14_W { REV14_W::new(self, 14) } #[doc = "Bit 15 - Clear Result Event for Result Register 15"] #[inline(always)] - #[must_use] pub fn rev15(&mut self) -> REV15_W { REV15_W::new(self, 15) } diff --git a/src/vadc_g0/reflag.rs b/src/vadc_g0/reflag.rs index 6ad27888..2d65ea21 100644 --- a/src/vadc_g0/reflag.rs +++ b/src/vadc_g0/reflag.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Result Event for Result Register 0"] #[inline(always)] - #[must_use] pub fn rev0(&mut self) -> REV0_W { REV0_W::new(self, 0) } #[doc = "Bit 1 - Result Event for Result Register 1"] #[inline(always)] - #[must_use] pub fn rev1(&mut self) -> REV1_W { REV1_W::new(self, 1) } #[doc = "Bit 2 - Result Event for Result Register 2"] #[inline(always)] - #[must_use] pub fn rev2(&mut self) -> REV2_W { REV2_W::new(self, 2) } #[doc = "Bit 3 - Result Event for Result Register 3"] #[inline(always)] - #[must_use] pub fn rev3(&mut self) -> REV3_W { REV3_W::new(self, 3) } #[doc = "Bit 4 - Result Event for Result Register 4"] #[inline(always)] - #[must_use] pub fn rev4(&mut self) -> REV4_W { REV4_W::new(self, 4) } #[doc = "Bit 5 - Result Event for Result Register 5"] #[inline(always)] - #[must_use] pub fn rev5(&mut self) -> REV5_W { REV5_W::new(self, 5) } #[doc = "Bit 6 - Result Event for Result Register 6"] #[inline(always)] - #[must_use] pub fn rev6(&mut self) -> REV6_W { REV6_W::new(self, 6) } #[doc = "Bit 7 - Result Event for Result Register 7"] #[inline(always)] - #[must_use] pub fn rev7(&mut self) -> REV7_W { REV7_W::new(self, 7) } #[doc = "Bit 8 - Result Event for Result Register 8"] #[inline(always)] - #[must_use] pub fn rev8(&mut self) -> REV8_W { REV8_W::new(self, 8) } #[doc = "Bit 9 - Result Event for Result Register 9"] #[inline(always)] - #[must_use] pub fn rev9(&mut self) -> REV9_W { REV9_W::new(self, 9) } #[doc = "Bit 10 - Result Event for Result Register 10"] #[inline(always)] - #[must_use] pub fn rev10(&mut self) -> REV10_W { REV10_W::new(self, 10) } #[doc = "Bit 11 - Result Event for Result Register 11"] #[inline(always)] - #[must_use] pub fn rev11(&mut self) -> REV11_W { REV11_W::new(self, 11) } #[doc = "Bit 12 - Result Event for Result Register 12"] #[inline(always)] - #[must_use] pub fn rev12(&mut self) -> REV12_W { REV12_W::new(self, 12) } #[doc = "Bit 13 - Result Event for Result Register 13"] #[inline(always)] - #[must_use] pub fn rev13(&mut self) -> REV13_W { REV13_W::new(self, 13) } #[doc = "Bit 14 - Result Event for Result Register 14"] #[inline(always)] - #[must_use] pub fn rev14(&mut self) -> REV14_W { REV14_W::new(self, 14) } #[doc = "Bit 15 - Result Event for Result Register 15"] #[inline(always)] - #[must_use] pub fn rev15(&mut self) -> REV15_W { REV15_W::new(self, 15) } diff --git a/src/vadc_g0/res.rs b/src/vadc_g0/res.rs index f2aedcf7..584b8d89 100644 --- a/src/vadc_g0/res.rs +++ b/src/vadc_g0/res.rs @@ -174,7 +174,6 @@ impl R { impl W { #[doc = "Bits 0:15 - Result of Most Recent Conversion"] #[inline(always)] - #[must_use] pub fn result(&mut self) -> RESULT_W { RESULT_W::new(self, 0) } diff --git a/src/vadc_g0/revnp0.rs b/src/vadc_g0/revnp0.rs index 9a094113..3025ee34 100644 --- a/src/vadc_g0/revnp0.rs +++ b/src/vadc_g0/revnp0.rs @@ -735,49 +735,41 @@ impl R { impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev0np(&mut self) -> REV0NP_W { REV0NP_W::new(self, 0) } #[doc = "Bits 4:7 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev1np(&mut self) -> REV1NP_W { REV1NP_W::new(self, 4) } #[doc = "Bits 8:11 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev2np(&mut self) -> REV2NP_W { REV2NP_W::new(self, 8) } #[doc = "Bits 12:15 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev3np(&mut self) -> REV3NP_W { REV3NP_W::new(self, 12) } #[doc = "Bits 16:19 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev4np(&mut self) -> REV4NP_W { REV4NP_W::new(self, 16) } #[doc = "Bits 20:23 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev5np(&mut self) -> REV5NP_W { REV5NP_W::new(self, 20) } #[doc = "Bits 24:27 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev6np(&mut self) -> REV6NP_W { REV6NP_W::new(self, 24) } #[doc = "Bits 28:31 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev7np(&mut self) -> REV7NP_W { REV7NP_W::new(self, 28) } diff --git a/src/vadc_g0/revnp1.rs b/src/vadc_g0/revnp1.rs index 2c75b2b9..a8da8d6e 100644 --- a/src/vadc_g0/revnp1.rs +++ b/src/vadc_g0/revnp1.rs @@ -735,49 +735,41 @@ impl R { impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev8np(&mut self) -> REV8NP_W { REV8NP_W::new(self, 0) } #[doc = "Bits 4:7 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev9np(&mut self) -> REV9NP_W { REV9NP_W::new(self, 4) } #[doc = "Bits 8:11 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev10np(&mut self) -> REV10NP_W { REV10NP_W::new(self, 8) } #[doc = "Bits 12:15 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev11np(&mut self) -> REV11NP_W { REV11NP_W::new(self, 12) } #[doc = "Bits 16:19 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev12np(&mut self) -> REV12NP_W { REV12NP_W::new(self, 16) } #[doc = "Bits 20:23 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev13np(&mut self) -> REV13NP_W { REV13NP_W::new(self, 20) } #[doc = "Bits 24:27 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev14np(&mut self) -> REV14NP_W { REV14NP_W::new(self, 24) } #[doc = "Bits 28:31 - Service Request Node Pointer Result Event i"] #[inline(always)] - #[must_use] pub fn rev15np(&mut self) -> REV15NP_W { REV15NP_W::new(self, 28) } diff --git a/src/vadc_g0/sefclr.rs b/src/vadc_g0/sefclr.rs index 200e14df..b3d61fcc 100644 --- a/src/vadc_g0/sefclr.rs +++ b/src/vadc_g0/sefclr.rs @@ -65,13 +65,11 @@ where impl W { #[doc = "Bit 0 - Clear Source Event 0/1"] #[inline(always)] - #[must_use] pub fn sev0(&mut self) -> SEV0_W { SEV0_W::new(self, 0) } #[doc = "Bit 1 - Clear Source Event 0/1"] #[inline(always)] - #[must_use] pub fn sev1(&mut self) -> SEV1_W { SEV1_W::new(self, 1) } diff --git a/src/vadc_g0/seflag.rs b/src/vadc_g0/seflag.rs index 3b080447..6690897c 100644 --- a/src/vadc_g0/seflag.rs +++ b/src/vadc_g0/seflag.rs @@ -123,13 +123,11 @@ impl R { impl W { #[doc = "Bit 0 - Source Event 0/1"] #[inline(always)] - #[must_use] pub fn sev0(&mut self) -> SEV0_W { SEV0_W::new(self, 0) } #[doc = "Bit 1 - Source Event 0/1"] #[inline(always)] - #[must_use] pub fn sev1(&mut self) -> SEV1_W { SEV1_W::new(self, 1) } diff --git a/src/vadc_g0/sevnp.rs b/src/vadc_g0/sevnp.rs index 8306dff0..2089fab4 100644 --- a/src/vadc_g0/sevnp.rs +++ b/src/vadc_g0/sevnp.rs @@ -189,13 +189,11 @@ impl R { impl W { #[doc = "Bits 0:3 - Service Request Node Pointer Source Event i"] #[inline(always)] - #[must_use] pub fn sev0np(&mut self) -> SEV0NP_W { SEV0NP_W::new(self, 0) } #[doc = "Bits 4:7 - Service Request Node Pointer Source Event i"] #[inline(always)] - #[must_use] pub fn sev1np(&mut self) -> SEV1NP_W { SEV1NP_W::new(self, 4) } diff --git a/src/vadc_g0/sract.rs b/src/vadc_g0/sract.rs index e2f077b6..0e94a695 100644 --- a/src/vadc_g0/sract.rs +++ b/src/vadc_g0/sract.rs @@ -251,49 +251,41 @@ where impl W { #[doc = "Bit 0 - Activate Group Service Request Node 0"] #[inline(always)] - #[must_use] pub fn agsr0(&mut self) -> AGSR0_W { AGSR0_W::new(self, 0) } #[doc = "Bit 1 - Activate Group Service Request Node 1"] #[inline(always)] - #[must_use] pub fn agsr1(&mut self) -> AGSR1_W { AGSR1_W::new(self, 1) } #[doc = "Bit 2 - Activate Group Service Request Node 2"] #[inline(always)] - #[must_use] pub fn agsr2(&mut self) -> AGSR2_W { AGSR2_W::new(self, 2) } #[doc = "Bit 3 - Activate Group Service Request Node 3"] #[inline(always)] - #[must_use] pub fn agsr3(&mut self) -> AGSR3_W { AGSR3_W::new(self, 3) } #[doc = "Bit 8 - Activate Shared Service Request Node 0"] #[inline(always)] - #[must_use] pub fn assr0(&mut self) -> ASSR0_W { ASSR0_W::new(self, 8) } #[doc = "Bit 9 - Activate Shared Service Request Node 1"] #[inline(always)] - #[must_use] pub fn assr1(&mut self) -> ASSR1_W { ASSR1_W::new(self, 9) } #[doc = "Bit 10 - Activate Shared Service Request Node 2"] #[inline(always)] - #[must_use] pub fn assr2(&mut self) -> ASSR2_W { ASSR2_W::new(self, 10) } #[doc = "Bit 11 - Activate Shared Service Request Node 3"] #[inline(always)] - #[must_use] pub fn assr3(&mut self) -> ASSR3_W { ASSR3_W::new(self, 11) } diff --git a/src/vadc_g0/synctr.rs b/src/vadc_g0/synctr.rs index 6762b273..a3a1d9b5 100644 --- a/src/vadc_g0/synctr.rs +++ b/src/vadc_g0/synctr.rs @@ -272,25 +272,21 @@ impl R { impl W { #[doc = "Bits 0:1 - Start Selection"] #[inline(always)] - #[must_use] pub fn stsel(&mut self) -> STSEL_W { STSEL_W::new(self, 0) } #[doc = "Bit 4 - Evaluate Ready Input Rx"] #[inline(always)] - #[must_use] pub fn evalr1(&mut self) -> EVALR1_W { EVALR1_W::new(self, 4) } #[doc = "Bit 5 - Evaluate Ready Input Rx"] #[inline(always)] - #[must_use] pub fn evalr2(&mut self) -> EVALR2_W { EVALR2_W::new(self, 5) } #[doc = "Bit 6 - Evaluate Ready Input Rx"] #[inline(always)] - #[must_use] pub fn evalr3(&mut self) -> EVALR3_W { EVALR3_W::new(self, 6) } diff --git a/src/vadc_g0/vfr.rs b/src/vadc_g0/vfr.rs index 6b8d00e5..b5ec4f2f 100644 --- a/src/vadc_g0/vfr.rs +++ b/src/vadc_g0/vfr.rs @@ -935,97 +935,81 @@ impl R { impl W { #[doc = "Bit 0 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf0(&mut self) -> VF0_W { VF0_W::new(self, 0) } #[doc = "Bit 1 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf1(&mut self) -> VF1_W { VF1_W::new(self, 1) } #[doc = "Bit 2 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf2(&mut self) -> VF2_W { VF2_W::new(self, 2) } #[doc = "Bit 3 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf3(&mut self) -> VF3_W { VF3_W::new(self, 3) } #[doc = "Bit 4 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf4(&mut self) -> VF4_W { VF4_W::new(self, 4) } #[doc = "Bit 5 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf5(&mut self) -> VF5_W { VF5_W::new(self, 5) } #[doc = "Bit 6 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf6(&mut self) -> VF6_W { VF6_W::new(self, 6) } #[doc = "Bit 7 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf7(&mut self) -> VF7_W { VF7_W::new(self, 7) } #[doc = "Bit 8 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf8(&mut self) -> VF8_W { VF8_W::new(self, 8) } #[doc = "Bit 9 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf9(&mut self) -> VF9_W { VF9_W::new(self, 9) } #[doc = "Bit 10 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf10(&mut self) -> VF10_W { VF10_W::new(self, 10) } #[doc = "Bit 11 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf11(&mut self) -> VF11_W { VF11_W::new(self, 11) } #[doc = "Bit 12 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf12(&mut self) -> VF12_W { VF12_W::new(self, 12) } #[doc = "Bit 13 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf13(&mut self) -> VF13_W { VF13_W::new(self, 13) } #[doc = "Bit 14 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf14(&mut self) -> VF14_W { VF14_W::new(self, 14) } #[doc = "Bit 15 - Valid Flag of Result Register x"] #[inline(always)] - #[must_use] pub fn vf15(&mut self) -> VF15_W { VF15_W::new(self, 15) } diff --git a/src/wdt/ctr.rs b/src/wdt/ctr.rs index 55d830dd..b2e2173a 100644 --- a/src/wdt/ctr.rs +++ b/src/wdt/ctr.rs @@ -43,25 +43,21 @@ impl R { impl W { #[doc = "Bit 0 - Enable"] #[inline(always)] - #[must_use] pub fn enb(&mut self) -> ENB_W { ENB_W::new(self, 0) } #[doc = "Bit 1 - Pre-warning"] #[inline(always)] - #[must_use] pub fn pre(&mut self) -> PRE_W { PRE_W::new(self, 1) } #[doc = "Bit 4 - Debug Suspend"] #[inline(always)] - #[must_use] pub fn dsp(&mut self) -> DSP_W { DSP_W::new(self, 4) } #[doc = "Bits 8:15 - Service Indication Pulse Width"] #[inline(always)] - #[must_use] pub fn spw(&mut self) -> SPW_W { SPW_W::new(self, 8) } diff --git a/src/wdt/srv.rs b/src/wdt/srv.rs index c462cc9d..40df64a2 100644 --- a/src/wdt/srv.rs +++ b/src/wdt/srv.rs @@ -5,7 +5,6 @@ pub type SRV_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>; impl W { #[doc = "Bits 0:31 - Service"] #[inline(always)] - #[must_use] pub fn srv(&mut self) -> SRV_W { SRV_W::new(self, 0) } diff --git a/src/wdt/wdtclr.rs b/src/wdt/wdtclr.rs index 47272913..d7959b5a 100644 --- a/src/wdt/wdtclr.rs +++ b/src/wdt/wdtclr.rs @@ -5,7 +5,6 @@ pub type ALMC_W<'a, REG> = crate::BitWriter<'a, REG>; impl W { #[doc = "Bit 0 - Pre-warning Alarm"] #[inline(always)] - #[must_use] pub fn almc(&mut self) -> ALMC_W { ALMC_W::new(self, 0) } diff --git a/src/wdt/wlb.rs b/src/wdt/wlb.rs index 6a98f715..4abbf7bf 100644 --- a/src/wdt/wlb.rs +++ b/src/wdt/wlb.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Window Lower Bound"] #[inline(always)] - #[must_use] pub fn wlb(&mut self) -> WLB_W { WLB_W::new(self, 0) } diff --git a/src/wdt/wub.rs b/src/wdt/wub.rs index 093eb369..a30c31da 100644 --- a/src/wdt/wub.rs +++ b/src/wdt/wub.rs @@ -16,7 +16,6 @@ impl R { impl W { #[doc = "Bits 0:31 - Window Upper Bound"] #[inline(always)] - #[must_use] pub fn wub(&mut self) -> WUB_W { WUB_W::new(self, 0) }