commit release FANNG-MPC v0.2.0 (#2)

commit release FANNG-MPC v0.2.0
Crypto-TII · May 31, 2024 · bb81c12 · bb81c12
1 parent 55a2875
commit bb81c12
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diff --git a/Assembler/documentation_parser/src/lib.rs b/Assembler/documentation_parser/src/lib.rs
@@ -1,3 +1,5 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
+
 extern crate proc_macro;
 use proc_macro::TokenStream;
 use proc_macro2::Literal;

diff --git a/Assembler/src/asm.rs b/Assembler/src/asm.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/asm/augmented_block.rs b/Assembler/src/asm/augmented_block.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/asm/graphviz.rs b/Assembler/src/asm/graphviz.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/asm/instructions.rs b/Assembler/src/asm/instructions.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 
@@ -16,6 +17,9 @@ pub enum IoInstruction {
     CTDyn {
         registers: Vec<Spanned<register::Secret>>,
     },
+    SRand {
+        registers: Vec<Spanned<register::Secret>>,
+    },
 }
 
 check_type_size!(INSTRUCTION: Instruction<'static>, 80);

diff --git a/Assembler/src/asm/parser.rs b/Assembler/src/asm/parser.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 
@@ -65,7 +66,8 @@ impl<'a> Statement<'a> {
             | "bitsint" | "andint" | "orint" | "xorint" | "shlint" | "shrint" | "legendrec"
             | "digestc" | "neg" | "negb" | "invsint" | "eqzint" | "ltzint" | "invint"
             | "eqzsint" | "ltzsint" | "rand" | "randc" | "randint" | "randsint" | "randfloat"
-            | "randsbit" | "getspc" | "getsps" | "getspint" | "getspsint" | "getspsbit"
+            | "randsbit" | "osrand" | "loadsrand" | "otriple" | "loadtriple"
+            | "getspc" | "getsps" | "getspint" | "getspsint" | "getspsbit"
             | "ldmc" | "ldms" | "ldmci" | "ldmsi" | "ldmint" | "ldminti" | "ldmsint"
             | "ldmsinti" | "stmc" | "stms" | "stmci" | "stmsi" | "stmint" | "stminti"
             | "stmsint" | "stmsinti" | "open_channel" | "close_channel" | "private_input"
@@ -78,7 +80,7 @@ impl<'a> Statement<'a> {
             | "rpokeint" | "rpokec" | "rpokes" | "rpokesint" | "rpokesbit" | "rpeekint"
             | "rpeekc" | "rpeeks" | "rpeeksint" | "rpeeksbit" | "popint" | "popc" | "pops"
             | "popsint" | "popsbit" | "pushint" | "pushc" | "pushs" | "pushsint" | "pushsbit"
-            | "ldarg" | "ldtn" | "opensint" | "opensbit" | "dabit" | "mul2sint" | "sintbit"
+            | "ldarg" | "ldtn" | "opensint" | "opensbit" | "dabit" | "odabit" | "loaddabit" | "mul2sint" | "sintbit"
             | "gc" | "ogc" | "loadgc" | "egc" | "lf" | "loadct" | "print_reg" | "print_char_regint" | "print_char4_regint"
             | "print_int" | "print_fix_plain" | "print_ieee_float" | "print_float"
             | "print_mem" | "print_fix" | "print_char" | "print_char4" | "newc" | "news"
@@ -135,7 +137,7 @@ impl<'a> Statement<'a> {
                     registers,
                 }
             }
-            "ct_dyn" | "input_shares" | "output_shares" => {
+            "ct_dyn" | "input_shares" | "output_shares" | "srand"=> {
                 let channel = args.index_or_err(cx, 1).require_uint(cx);
                 let registers: Vec<_> = args.elem.iter().skip(2).map(|op| op.require(cx)).collect();
                 assert_eq!(
@@ -146,6 +148,7 @@ impl<'a> Statement<'a> {
                     "input_shares" => IoInstruction::InputShares { registers },
                     "output_shares" => IoInstruction::OutputShares { registers },
                     "ct_dyn" => IoInstruction::CTDyn { registers },
+                    "srand" => IoInstruction::SRand { registers },
                     _ => unreachable!(),
                 };
                 Instruction::Io { instr, channel }

diff --git a/Assembler/src/asm/relexer.rs b/Assembler/src/asm/relexer.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 
@@ -211,6 +212,13 @@ impl<'a> Statement<'a> {
                         .chain(registers.iter().copied().map(Into::into))
                         .collect(),
                 ),
+                IoInstruction::SRand { registers } => (
+                    "srand",
+                    std::iter::once(self.span.with(registers.len() + 1).into_operand(cx))
+                        .chain(std::iter::once(channel.into_operand(cx)))
+                        .chain(registers.iter().copied().map(Into::into))
+                        .collect(),
+                ),
             },
             Instruction::Nop => ("nop", vec![]),
         };

diff --git a/Assembler/src/asm/statement.rs b/Assembler/src/asm/statement.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 
@@ -242,6 +243,11 @@ impl IoInstruction {
                     reg.map_all_values(cx, &mut f);
                 }
             }
+            IoInstruction::SRand { registers } => {
+                for reg in registers {
+                    reg.map_all_values(cx, &mut f);
+                }
+            }
         }
     }
 }
diff --git a/Assembler/src/bin/cranelift-ir.rs b/Assembler/src/bin/cranelift-ir.rs
@@ -1,3 +1,5 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
+
 #![warn(clippy::all)]
 #![deny(rust_2018_idioms)]
 

diff --git a/Assembler/src/bin/scale_repo_helper.rs b/Assembler/src/bin/scale_repo_helper.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/bin/scasm_tests.rs b/Assembler/src/bin/scasm_tests.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/binary.rs b/Assembler/src/binary.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/binary/instructions.rs b/Assembler/src/binary/instructions.rs
@@ -1,3 +1,5 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
+
 use crate::lexer::RegisterKind;
 use documentation_parser::instructions;
 use std::collections::HashMap;

diff --git a/Assembler/src/compiler.rs b/Assembler/src/compiler.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/cranelift.rs b/Assembler/src/cranelift.rs
@@ -1,3 +1,5 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
+
 use crate::asm::Instruction;
 use crate::asm::MemoryBank;
 use crate::asm::{BinaryOperation, Body, JumpMode, Terminator};

diff --git a/Assembler/src/errors.rs b/Assembler/src/errors.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/lexer.rs b/Assembler/src/lexer.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/lexer/binary.rs b/Assembler/src/lexer/binary.rs
@@ -1,2 +1,3 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
diff --git a/Assembler/src/lexer/parser.rs b/Assembler/src/lexer/parser.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/lexer/printer.rs b/Assembler/src/lexer/printer.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/lib.rs b/Assembler/src/lib.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/main.rs b/Assembler/src/main.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/span.rs b/Assembler/src/span.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms.rs b/Assembler/src/transforms.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/assignment_chain.rs b/Assembler/src/transforms/assignment_chain.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/cmp.rs b/Assembler/src/transforms/cmp.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/cond_flip.rs b/Assembler/src/transforms/cond_flip.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/dce.rs b/Assembler/src/transforms/dce.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/dead_block_removal.rs b/Assembler/src/transforms/dead_block_removal.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/destination_propagation.rs b/Assembler/src/transforms/destination_propagation.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/goto_chain_collapse.rs b/Assembler/src/transforms/goto_chain_collapse.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/merge_instructions.rs b/Assembler/src/transforms/merge_instructions.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/move_done_block_to_end.rs b/Assembler/src/transforms/move_done_block_to_end.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/nop.rs b/Assembler/src/transforms/nop.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/nop_removal.rs b/Assembler/src/transforms/nop_removal.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/optimizer_step1.rs b/Assembler/src/transforms/optimizer_step1.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/print.rs b/Assembler/src/transforms/print.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/print_merge.rs b/Assembler/src/transforms/print_merge.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/register_reuse.rs b/Assembler/src/transforms/register_reuse.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/transforms/validate.rs b/Assembler/src/transforms/validate.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/src/visitor.rs b/Assembler/src/visitor.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/tests/broken_asm.rs b/Assembler/tests/broken_asm.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/tests/gen_tex.rs b/Assembler/tests/gen_tex.rs
@@ -1,3 +1,5 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
+
 use std::io::Write;
 
 #[test]

diff --git a/Assembler/tests/lex.rs b/Assembler/tests/lex.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Assembler/tests/optimizations.rs b/Assembler/tests/optimizations.rs
@@ -1,3 +1,4 @@
+// Copyright (c) 2024, Technology Innovation Institute, Yas Island, Abu Dhabi, United Arab Emirates.
 // Copyright (c) 2021, COSIC-KU Leuven, Kasteelpark Arenberg 10, bus 2452, B-3001 Leuven-Heverlee, Belgium.
 // Copyright (c) 2021, Cosmian Tech SAS, 53-55 rue La Boétie, Paris, France.
 

diff --git a/Circuits/VHDL/LSSS_to_GC_512/dc/Makefile b/Circuits/VHDL/LSSS_to_GC_512/dc/Makefile
@@ -9,7 +9,7 @@
 #>                      / /__  / /_/ / _\ \   _/ /  / /__                       
 #>                      \___/  \____/ /___/  /___/  \___/                       
 #>                                                                              
-#>                              ALL RIGHTS RESERVED                             
+#>                              ALL RIGHTS RESERVED       
 #>        The entire notice above must be reproduced on all authorized copies.  
 #> =============================================================================
 #> File name     : Makefile                                                     

diff --git a/Circuits/VHDL/LSSS_to_GC_512/dc/synthesize.tcl b/Circuits/VHDL/LSSS_to_GC_512/dc/synthesize.tcl
@@ -9,7 +9,7 @@
 #>                      / /__  / /_/ / _\ \   _/ /  / /__                       
 #>                      \___/  \____/ /___/  /___/  \___/                       
 #>                                                                              
-#>                              ALL RIGHTS RESERVED                             
+#>                              ALL RIGHTS RESERVED                
 #>        The entire notice above must be reproduced on all authorized copies.  
 #> =============================================================================
 #> File name     : synthesize.tcl                                               

diff --git a/Circuits/VHDL/LSSS_to_GC_512/src/LSSS_to_GC_512.vhd b/Circuits/VHDL/LSSS_to_GC_512/src/LSSS_to_GC_512.vhd
@@ -9,7 +9,7 @@
 --                      / /__  / /_/ / _\ \   _/ /  / /__                       
 --                      \___/  \____/ /___/  /___/  \___/                       
 --                                                                              
---                              ALL RIGHTS RESERVED                             
+--                              ALL RIGHTS RESERVED                                                          
 --        The entire notice above must be reproduced on all authorized copies.  
 -- =============================================================================
 -- File name     : LSSS_to_GC_512.vhd                                                  

diff --git a/Circuits/VHDL/LSSS_to_GC_512/src/Makefile b/Circuits/VHDL/LSSS_to_GC_512/src/Makefile
@@ -9,8 +9,8 @@
 #                      / /__  / /_/ / _\ \   _/ /  / /__                       
 #                      \___/  \____/ /___/  /___/  \___/                       
 #                                                                              
-#                              ALL RIGHTS RESERVED                             
-#        The entire notice above must be reproduced on all authorized copies.  
+#                              ALL RIGHTS RESERVED                                                         
+#        The entire notice above must be reproduced on all authorized copies.        
 # =============================================================================
 # File name     : Makefile                                                     
 # Time created  : Fri Jan 31 09:36:02 2020