Copy-2: Verilog implementation

FPGAwars · Mar 24, 2021 · 919166c · 919166c
1 parent cd8895e
commit 919166c
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Showing 3 changed files with 282 additions and 72 deletions.
diff --git a/blocks/Copy/Copy-02.ice b/blocks/Copy/Copy-02.ice
@@ -32,52 +32,33 @@
             "clock": false
           },
           "position": {
-            "x": 456,
-            "y": 144
+            "x": 568,
+            "y": 160
           }
         },
         {
-          "id": "3266f4f1-eba1-4272-a937-4415542dcb7f",
-          "type": "basic.code",
-          "data": {
-            "code": "assign o = {i, i};",
-            "params": [],
-            "ports": {
-              "in": [
-                {
-                  "name": "i"
-                }
-              ],
-              "out": [
-                {
-                  "name": "o",
-                  "range": "[1:0]",
-                  "size": 2
-                }
-              ]
-            }
-          },
+          "id": "defdee9e-31ab-45ff-8352-e0da57699522",
+          "type": "80ac841b78ab68b7668296f4d0b0b4daadc7bcf9",
           "position": {
-            "x": 632,
+            "x": 768,
             "y": 144
           },
           "size": {
-            "width": 208,
+            "width": 96,
             "height": 64
           }
         }
       ],
       "wires": [
         {
           "source": {
-            "block": "3266f4f1-eba1-4272-a937-4415542dcb7f",
-            "port": "o"
+            "block": "defdee9e-31ab-45ff-8352-e0da57699522",
+            "port": "99661aef-c9bf-473e-93c4-8f5edf511d36"
           },
           "target": {
             "block": "a2b77ebf-2ba8-494f-bf22-b2410234d608",
             "port": "in"
           },
-          "vertices": [],
           "size": 2
         },
         {
@@ -86,12 +67,147 @@
             "port": "out"
           },
           "target": {
-            "block": "3266f4f1-eba1-4272-a937-4415542dcb7f",
-            "port": "i"
+            "block": "defdee9e-31ab-45ff-8352-e0da57699522",
+            "port": "e4111201-8441-4e7d-bcd2-bcf9d265d043"
           }
+        },
+        {
+          "source": {
+            "block": "cf3b4c7c-042a-45f7-b958-990d7157f928",
+            "port": "out"
+          },
+          "target": {
+            "block": "defdee9e-31ab-45ff-8352-e0da57699522",
+            "port": "969e11ca-69e8-403b-a566-7bf2fbe3a5a8"
+          },
+          "vertices": [
+            {
+              "x": 712,
+              "y": 184
+            }
+          ]
         }
       ]
     }
   },
-  "dependencies": {}
+  "dependencies": {
+    "80ac841b78ab68b7668296f4d0b0b4daadc7bcf9": {
+      "package": {
+        "name": "Bus2-Join-all",
+        "version": "0.1",
+        "description": "Bus2-Join-all: Joint two wires into a 2-bits Bus",
+        "author": "Juan González-Gómez (Obijuan)",
+        "image": "%3Csvg%20xmlns=%22http://www.w3.org/2000/svg%22%20width=%22354.768%22%20height=%22241.058%22%20viewBox=%220%200%20332.59497%20225.99201%22%3E%3Cpath%20d=%22M164.218%2077.643L103.07%2016.705C92.386%206.25%2078.036.461%2063.11.5H.5v26.186l61.698.046c8.012-.043%2015.705%203.133%2021.47%208.81l61.448%2061.315a57.292%2057.292%200%200%200%2039.993%2016.139%2057.292%2057.292%200%200%200-39.993%2016.14L83.668%20190.45c-5.765%205.677-13.458%208.853-21.47%208.81L.5%20199.306v26.186h62.612c14.924.039%2029.463-5.9%2040.204-16.28l60.902-60.863a29.857%2029.857%200%200%201%2021.347-8.81l146.53-.113V86.457H185.571a29.884%2029.884%200%200%201-21.353-8.814z%22%20fill=%22green%22%20stroke=%22#000%22%20stroke-linecap=%22round%22%20stroke-linejoin=%22round%22/%3E%3C/svg%3E"
+      },
+      "design": {
+        "graph": {
+          "blocks": [
+            {
+              "id": "969e11ca-69e8-403b-a566-7bf2fbe3a5a8",
+              "type": "basic.input",
+              "data": {
+                "name": "1",
+                "clock": false
+              },
+              "position": {
+                "x": 112,
+                "y": 144
+              }
+            },
+            {
+              "id": "99661aef-c9bf-473e-93c4-8f5edf511d36",
+              "type": "basic.output",
+              "data": {
+                "name": "",
+                "range": "[1:0]",
+                "size": 2
+              },
+              "position": {
+                "x": 584,
+                "y": 200
+              }
+            },
+            {
+              "id": "e4111201-8441-4e7d-bcd2-bcf9d265d043",
+              "type": "basic.input",
+              "data": {
+                "name": "0",
+                "clock": false
+              },
+              "position": {
+                "x": 112,
+                "y": 256
+              }
+            },
+            {
+              "id": "16e78204-213e-4833-9096-89d735307ec2",
+              "type": "basic.code",
+              "data": {
+                "code": "assign o = {i1, i0};\n",
+                "params": [],
+                "ports": {
+                  "in": [
+                    {
+                      "name": "i1"
+                    },
+                    {
+                      "name": "i0"
+                    }
+                  ],
+                  "out": [
+                    {
+                      "name": "o",
+                      "range": "[1:0]",
+                      "size": 2
+                    }
+                  ]
+                }
+              },
+              "position": {
+                "x": 296,
+                "y": 176
+              },
+              "size": {
+                "width": 224,
+                "height": 112
+              }
+            }
+          ],
+          "wires": [
+            {
+              "source": {
+                "block": "969e11ca-69e8-403b-a566-7bf2fbe3a5a8",
+                "port": "out"
+              },
+              "target": {
+                "block": "16e78204-213e-4833-9096-89d735307ec2",
+                "port": "i1"
+              }
+            },
+            {
+              "source": {
+                "block": "e4111201-8441-4e7d-bcd2-bcf9d265d043",
+                "port": "out"
+              },
+              "target": {
+                "block": "16e78204-213e-4833-9096-89d735307ec2",
+                "port": "i0"
+              }
+            },
+            {
+              "source": {
+                "block": "16e78204-213e-4833-9096-89d735307ec2",
+                "port": "o"
+              },
+              "target": {
+                "block": "99661aef-c9bf-473e-93c4-8f5edf511d36",
+                "port": "in"
+              },
+              "size": 2
+            }
+          ]
+        }
+      }
+    }
+  }
 }
diff --git a/blocks/Copy/Verilog/Copy-02-verilog.ice b/blocks/Copy/Verilog/Copy-02-verilog.ice
@@ -0,0 +1,97 @@
+{
+  "version": "1.2",
+  "package": {
+    "name": "Copy-2-verilog",
+    "version": "0.1-c1616587380260",
+    "description": "Copy-2: Copy the input wire twice and generate a 2 bits Bus output (Verilog implementation)",
+    "author": "Juan González-Gómez (Obijuan)",
+    "image": "%3Csvg%20xmlns=%22http://www.w3.org/2000/svg%22%20width=%22311.429%22%20height=%22131.811%22%20viewBox=%220%200%2082.398813%2034.875011%22%20id=%22svg840%22%3E%3Cg%20id=%22layer2%22%20transform=%22translate(-33.717%20-91.738)%22%20fill=%22none%22%20stroke-linecap=%22round%22%3E%3Cpath%20id=%22path865-3-6%22%20d=%22M36.363%20123.968l77.107-.336%22%20stroke=%22green%22%20stroke-width=%225.292%22/%3E%3Cpath%20d=%22M88.632%20114.651l20.928-20.928%22%20id=%22path850%22%20stroke=%22#000%22%20stroke-width=%223.969%22/%3E%3Cpath%20d=%22M109.56%20114.651L88.632%2093.723%22%20id=%22path852%22%20stroke=%22#000%22%20stroke-width=%223.969%22/%3E%3C/g%3E%3Cstyle%20id=%22style263%22%3E.st0%7Bdisplay:none%7D.st1%7Bfill:none;stroke:#000;stroke-width:.75;stroke-linejoin:round;stroke-miterlimit:10%7D.st2%7Bfill:#010002%7D%3C/style%3E%3C/svg%3E"
+  },
+  "design": {
+    "board": "alhambra-ii",
+    "graph": {
+      "blocks": [
+        {
+          "id": "a2b77ebf-2ba8-494f-bf22-b2410234d608",
+          "type": "basic.output",
+          "data": {
+            "name": "",
+            "range": "[1:0]",
+            "size": 2
+          },
+          "position": {
+            "x": 928,
+            "y": 144
+          }
+        },
+        {
+          "id": "cf3b4c7c-042a-45f7-b958-990d7157f928",
+          "type": "basic.input",
+          "data": {
+            "name": "",
+            "clock": false
+          },
+          "position": {
+            "x": 456,
+            "y": 144
+          }
+        },
+        {
+          "id": "3266f4f1-eba1-4272-a937-4415542dcb7f",
+          "type": "basic.code",
+          "data": {
+            "code": "assign o = {i, i};",
+            "params": [],
+            "ports": {
+              "in": [
+                {
+                  "name": "i"
+                }
+              ],
+              "out": [
+                {
+                  "name": "o",
+                  "range": "[1:0]",
+                  "size": 2
+                }
+              ]
+            }
+          },
+          "position": {
+            "x": 632,
+            "y": 144
+          },
+          "size": {
+            "width": 208,
+            "height": 64
+          }
+        }
+      ],
+      "wires": [
+        {
+          "source": {
+            "block": "3266f4f1-eba1-4272-a937-4415542dcb7f",
+            "port": "o"
+          },
+          "target": {
+            "block": "a2b77ebf-2ba8-494f-bf22-b2410234d608",
+            "port": "in"
+          },
+          "vertices": [],
+          "size": 2
+        },
+        {
+          "source": {
+            "block": "cf3b4c7c-042a-45f7-b958-990d7157f928",
+            "port": "out"
+          },
+          "target": {
+            "block": "3266f4f1-eba1-4272-a937-4415542dcb7f",
+            "port": "i"
+          }
+        }
+      ]
+    }
+  },
+  "dependencies": {}
+}