feat(Other): Add MAX32650 to Zephyr folder

Libraries/CMSIS/Device/Maxim/MAX32650/Include/uart_regs.h

@@ -9,7 +9,7 @@
  *
  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
  * Analog Devices, Inc.),
- * Copyright (C) 2023-2024 Analog Devices, Inc.
+ * Copyright (C) 2023-2025 Analog Devices, Inc.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -510,11 +510,11 @@ typedef struct {
 #define MXC_V_UART_DMA_RXDMA_EN_EN                     ((uint32_t)0x1UL) /**< DMA_RXDMA_EN_EN Value */
 #define MXC_S_UART_DMA_RXDMA_EN_EN                     (MXC_V_UART_DMA_RXDMA_EN_EN << MXC_F_UART_DMA_RXDMA_EN_POS) /**< DMA_RXDMA_EN_EN Setting */
 
-#define MXC_F_UART_DMA_TXDMA_LVL_POS                   8 /**< DMA_TXDMA_LVL Position */
-#define MXC_F_UART_DMA_TXDMA_LVL                       ((uint32_t)(0x3FUL << MXC_F_UART_DMA_TXDMA_LVL_POS)) /**< DMA_TXDMA_LVL Mask */
+#define MXC_F_UART_DMA_TXDMA_LEVEL_POS                   8 /**< DMA_TXDMA_LVL Position */
+#define MXC_F_UART_DMA_TXDMA_LEVEL                       ((uint32_t)(0x3FUL << MXC_F_UART_DMA_TXDMA_LEVEL_POS)) /**< DMA_TXDMA_LVL Mask */
 
-#define MXC_F_UART_DMA_RXDMA_LVL_POS                   16 /**< DMA_RXDMA_LVL Position */
-#define MXC_F_UART_DMA_RXDMA_LVL                       ((uint32_t)(0x3FUL << MXC_F_UART_DMA_RXDMA_LVL_POS)) /**< DMA_RXDMA_LVL Mask */
+#define MXC_F_UART_DMA_RXDMA_LEVEL_POS                   16 /**< DMA_RXDMA_LVL Position */
+#define MXC_F_UART_DMA_RXDMA_LEVEL                       ((uint32_t)(0x3FUL << MXC_F_UART_DMA_RXDMA_LEVEL_POS)) /**< DMA_RXDMA_LVL Mask */
 
 /**@} end of group UART_DMA_Register */
 

Libraries/PeriphDrivers/Include/MAX32650/gpio.h

@@ -7,7 +7,7 @@
  *
  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
  * Analog Devices, Inc.),
- * Copyright (C) 2023-2024 Analog Devices, Inc.
+ * Copyright (C) 2023-2025 Analog Devices, Inc.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -113,8 +113,8 @@ typedef enum {
     MXC_GPIO_PAD_NONE, /**< No pull-up or pull-down */
     MXC_GPIO_PAD_WEAK_PULL_UP, /**< Set pad to weak pull-up */
     MXC_GPIO_PAD_WEAK_PULL_DOWN, /**< Set pad to weak pull-down */
-    MXC_GPIO_PAD_STRONG_PULL_UP, /**< Set pad to strong pull-up */
-    MXC_GPIO_PAD_STRONG_PULL_DOWN, /**< Set pad to strong pull-down */
+    MXC_GPIO_PAD_PULL_UP, /**< Set pad to strong pull-up */
+    MXC_GPIO_PAD_PULL_DOWN, /**< Set pad to strong pull-down */
 } mxc_gpio_pad_t;
 
 /**

Libraries/PeriphDrivers/Include/MAX32650/uart.h

@@ -8,7 +8,7 @@
  *
  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
  * Analog Devices, Inc.),
- * Copyright (C) 2023-2024 Analog Devices, Inc.
+ * Copyright (C) 2023-2025 Analog Devices, Inc.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -32,6 +32,7 @@
 #include <stdint.h>
 #include "uart_regs.h"
 #include "mxc_sys.h"
+#include "mxc_errors.h"
 
 #ifdef __cplusplus
 extern "C" {

Libraries/PeriphDrivers/Source/GPIO/gpio_me10.c

@@ -2,7 +2,7 @@
  *
  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 
  * Analog Devices, Inc.),
- * Copyright (C) 2023-2024 Analog Devices, Inc.
+ * Copyright (C) 2023-2025 Analog Devices, Inc.
  *
  * Licensed under the Apache License, Version 2.0 (the "License");
  * you may not use this file except in compliance with the License.
@@ -135,12 +135,12 @@ int MXC_GPIO_Config(const mxc_gpio_cfg_t *cfg)
         gpio->pdpu_sel1 |= cfg->mask;
         gpio->pssel |= cfg->mask;
         break;
-    case MXC_GPIO_PAD_STRONG_PULL_UP:
+    case MXC_GPIO_PAD_PULL_UP:
         gpio->pdpu_sel0 |= cfg->mask;
         gpio->pdpu_sel1 &= ~cfg->mask;
         gpio->pssel &= ~cfg->mask;
         break;
-    case MXC_GPIO_PAD_STRONG_PULL_DOWN:
+    case MXC_GPIO_PAD_PULL_DOWN:
         gpio->pdpu_sel0 &= ~cfg->mask;
         gpio->pdpu_sel1 |= cfg->mask;
         gpio->pssel &= ~cfg->mask;

Libraries/zephyr/MAX/Include/wrap_max32_sys.h

@@ -34,14 +34,20 @@ void max32xx_system_init(void);
 /*
  *  MAX32665, MAX32666 related mapping
  */
-#if defined(CONFIG_SOC_MAX32665) || defined(CONFIG_SOC_MAX32666)
+#if defined(CONFIG_SOC_MAX32665) || defined(CONFIG_SOC_MAX32666) || defined(CONFIG_SOC_MAX32650)
 
 #define ADI_MAX32_CLK_IPO MXC_SYS_CLOCK_HIRC96
-#define ADI_MAX32_CLK_ERFO MXC_SYS_CLOCK_XTAL32M
 #define ADI_MAX32_CLK_IBRO MXC_SYS_CLOCK_HIRC8
+#if !defined(CONFIG_SOC_MAX32650)
+#define ADI_MAX32_CLK_ERFO MXC_SYS_CLOCK_XTAL32M
 #define ADI_MAX32_CLK_ISO MXC_SYS_CLOCK_HIRC
 #define ADI_MAX32_CLK_INRO MXC_SYS_CLOCK_LIRC8K
 #define ADI_MAX32_CLK_ERTCO MXC_SYS_CLOCK_XTAL32K
+#else
+#define ADI_MAX32_CLK_ISO MXC_SYS_CLOCK_HFXIN
+#define ADI_MAX32_CLK_INRO MXC_SYS_CLOCK_NANORING
+#define ADI_MAX32_CLK_ERTCO MXC_SYS_CLOCK_X32K
+#endif
 
 #define z_sysclk_prescaler(v) MXC_SYS_SYSTEM_DIV_##v
 #define sysclk_prescaler(v) z_sysclk_prescaler(v)

Libraries/zephyr/MAX/Include/wrap_max32_uart.h

@@ -26,26 +26,46 @@
 extern "C" {
 #endif
 
-#if defined(CONFIG_SOC_MAX32665) || defined(CONFIG_SOC_MAX32666)
+#if defined(CONFIG_SOC_MAX32665) || defined(CONFIG_SOC_MAX32666) || defined(CONFIG_SOC_MAX32650)
+#if !defined(CONFIG_SOC_MAX32650)
 // status flags
 #define ADI_MAX32_UART_RX_EMPTY MXC_F_UART_STATUS_RX_EMPTY
 #define ADI_MAX32_UART_TX_EMPTY MXC_F_UART_STATUS_TX_EMPTY
+#define ADI_MAX32_UART_STATUS_TX_FULL MXC_F_UART_STATUS_TX_FULL
 // error flags
 #define ADI_MAX32_UART_ERROR_OVERRUN MXC_F_UART_INT_FL_RX_OVERRUN
 #define ADI_MAX32_UART_ERROR_PARITY MXC_F_UART_INT_FL_RX_PARITY_ERROR
 #define ADI_MAX32_UART_ERROR_FRAMING MXC_F_UART_INT_FL_RX_FRAME_ERROR
+#else
+// status flags
+#define ADI_MAX32_UART_RX_EMPTY MXC_F_UART_STAT_RX_EMPTY
+#define ADI_MAX32_UART_TX_EMPTY MXC_F_UART_STAT_TX_EMPTY
+#define ADI_MAX32_UART_STATUS_TX_FULL MXC_F_UART_STAT_TX_FULL
+// error flags
+#define ADI_MAX32_UART_ERROR_OVERRUN MXC_F_UART_INT_FL_RX_OVR
+#define ADI_MAX32_UART_ERROR_PARITY MXC_F_UART_INT_FL_PARITY
+#define ADI_MAX32_UART_ERROR_FRAMING MXC_F_UART_INT_FL_FRAME
+#endif
 // interrupt flag
 #define ADI_MAX32_UART_INT_EOT MXC_F_UART_INT_EN_LAST_BREAK // End Of Transmission Interrupt
 #define ADI_MAX32_UART_INT_OE MXC_F_UART_INT_EN_RX_OVERRUN // Overrun Error Interrupt
 #define ADI_MAX32_UART_INT_BE MXC_F_UART_INT_EN_BREAK // Break Error Interrupt
 #define ADI_MAX32_UART_INT_PE MXC_F_UART_INT_EN_RX_PARITY_ERROR // Parity Error Interrupt
 #define ADI_MAX32_UART_INT_FE MXC_F_UART_INT_EN_RX_FRAME_ERROR // Framing Error Interrupt
+#if !defined(CONFIG_SOC_MAX32650)
 #define ADI_MAX32_UART_INT_RT MXC_F_UART_INT_EN_RX_TIMEOUT // Receive Timeout Interrupt
 #define ADI_MAX32_UART_INT_TX MXC_F_UART_INT_EN_TX_FIFO_THRESH // Transmit Interrupt
 #define ADI_MAX32_UART_INT_RX MXC_F_UART_INT_EN_RX_FIFO_THRESH // Receive Interrupt
 #define ADI_MAX32_UART_INT_CTS MXC_F_UART_INT_EN_CTS_CHANGE // CTS Modem Interrupt
 #define ADI_MAX32_UART_INT_TX_OEM \
     MXC_F_UART_INT_EN_TX_FIFO_ALMOST_EMPTY // TX FIFO Almost Empty Interrupt
+#else
+#define ADI_MAX32_UART_INT_RT MXC_F_UART_INT_EN_RX_TO // Receive Timeout Interrupt
+#define ADI_MAX32_UART_INT_TX MXC_F_UART_INT_EN_TX_FIFO_LVL // Transmit Interrupt
+#define ADI_MAX32_UART_INT_RX MXC_F_UART_INT_EN_RX_FIFO_LVL // Receive Interrupt
+#define ADI_MAX32_UART_INT_CTS MXC_F_UART_INT_EN_CTS // CTS Modem Interrupt
+#define ADI_MAX32_UART_INT_TX_OEM MXC_F_UART_INT_EN_TX_FIFO_AE // TX FIFO Almost Empty Interrupt
+#endif
 // parity
 #define ADI_MAX32_UART_CFG_PARITY_NONE MXC_UART_PARITY_DISABLE
 #define ADI_MAX32_UART_CFG_PARITY_ODD MXC_UART_PARITY_ODD
@@ -72,7 +92,11 @@ static inline int Wrap_MXC_UART_Init(mxc_uart_regs_t *uart)
         return ret;
     }
 
+#if defined(CONFIG_SOC_MAX32650)
+    uart->ctrl0 |= MXC_F_UART_CTRL0_ENABLE;
+#else
     uart->ctrl |= MXC_F_UART_CTRL_ENABLE;
+#endif
 
     return ret;
 }
@@ -136,6 +160,7 @@ static inline void Wrap_MXC_UART_DisableRxDMA(mxc_uart_regs_t *uart)
 // status flags
 #define ADI_MAX32_UART_RX_EMPTY MXC_F_UART_STATUS_RX_EM
 #define ADI_MAX32_UART_TX_EMPTY MXC_F_UART_STATUS_TX_EM
+#define ADI_MAX32_UART_STATUS_TX_FULL MXC_F_UART_STATUS_TX_FULL
 
 #if defined(CONFIG_SOC_MAX32662) || defined(CONFIG_SOC_MAX32657)
 // error flags

Libraries/zephyr/MAX/Source/MAX32650/CMakeLists.txt

@@ -0,0 +1,164 @@
+##############################################################################
+#
+# Copyright (C) 2025 Analog Devices, Inc.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+##############################################################################
+
+
+if(NOT TARGET_REV)
+  # Default version A1, not actively use in driver but requires to be defined.
+  zephyr_compile_definitions(-DTARGET_REV=0x4131)
+endif()
+
+zephyr_include_directories(
+    ${MSDK_PERIPH_SRC_DIR}/SYS
+    ${MSDK_PERIPH_SRC_DIR}/ADC
+    ${MSDK_PERIPH_SRC_DIR}/DMA
+    ${MSDK_PERIPH_SRC_DIR}/FLC
+    ${MSDK_PERIPH_SRC_DIR}/GPIO
+    ${MSDK_PERIPH_SRC_DIR}/I2C
+    ${MSDK_PERIPH_SRC_DIR}/SPIMSS
+    ${MSDK_PERIPH_SRC_DIR}/ICC
+    ${MSDK_PERIPH_SRC_DIR}/LP
+    ${MSDK_PERIPH_SRC_DIR}/OWM 
+    ${MSDK_PERIPH_SRC_DIR}/PT
+    ${MSDK_PERIPH_SRC_DIR}/RTC
+    ${MSDK_PERIPH_SRC_DIR}/SEMA
+    ${MSDK_PERIPH_SRC_DIR}/SPI
+    ${MSDK_PERIPH_SRC_DIR}/TRNG
+    ${MSDK_PERIPH_SRC_DIR}/TMR
+    ${MSDK_PERIPH_SRC_DIR}/UART
+    ${MSDK_PERIPH_SRC_DIR}/WDT
+)
+
+if(CONFIG_ARM)
+  zephyr_library_sources(${MSDK_CMSIS_DIR}/Source/system_max32650.c)
+  zephyr_library_sources(${MSDK_PERIPH_SRC_DIR}/SYS/mxc_lock.c)
+elseif(CONFIG_RISCV)
+  zephyr_library_sources(${MSDK_CMSIS_DIR}/Source/system_riscv_max32650.c)
+endif()
+
+zephyr_library_sources(
+    ./max32xxx_system.c
+
+    ${MSDK_PERIPH_SRC_DIR}/SYS/mxc_assert.c
+    ${MSDK_PERIPH_SRC_DIR}/SYS/mxc_delay.c
+    ${MSDK_PERIPH_SRC_DIR}/SYS/pins_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/SYS/sys_me10.c
+
+    ${MSDK_PERIPH_SRC_DIR}/ICC/icc_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/ICC/icc_reva.c
+
+    ${MSDK_PERIPH_SRC_DIR}/LP/lp_me10.c
+
+    ${MSDK_PERIPH_SRC_DIR}/PT/pt_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/PT/pt_reva.c
+
+    ${MSDK_PERIPH_SRC_DIR}/SEMA/sema_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/SEMA/sema_reva.c
+
+    ${MSDK_PERIPH_SRC_DIR}/DMA/dma_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/DMA/dma_reva.c
+)
+
+if (CONFIG_UART_MAX32)
+zephyr_library_sources(
+    ${MSDK_PERIPH_SRC_DIR}/UART/uart_common.c
+    ${MSDK_PERIPH_SRC_DIR}/UART/uart_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/UART/uart_reva.c
+)
+endif()
+
+if (CONFIG_GPIO_MAX32)
+zephyr_library_sources(
+    ${MSDK_PERIPH_SRC_DIR}/GPIO/gpio_common.c
+    ${MSDK_PERIPH_SRC_DIR}/GPIO/gpio_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/GPIO/gpio_reva.c
+)
+endif()
+
+if (CONFIG_SPI_MAX32)
+zephyr_library_sources(
+    ${MSDK_PERIPH_SRC_DIR}/SPI/spi_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/SPI/spi_reva1.c
+)
+endif()
+
+if (CONFIG_I2C_MAX32)
+zephyr_library_sources(
+    ${MSDK_PERIPH_SRC_DIR}/I2C/i2c_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/I2C/i2c_reva.c
+)
+endif()
+
+if (CONFIG_WDT_MAX32)
+zephyr_library_sources(
+    ${MSDK_PERIPH_SRC_DIR}/WDT/wdt_common.c
+    ${MSDK_PERIPH_SRC_DIR}/WDT/wdt_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/WDT/wdt_reva.c
+)
+endif()
+
+if (CONFIG_RTC_MAX32 OR CONFIG_COUNTER_RTC_MAX32)
+zephyr_library_sources(
+    ${MSDK_PERIPH_SRC_DIR}/RTC/rtc_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/RTC/rtc_reva.c
+)
+endif()
+
+if (CONFIG_SOC_FLASH_MAX32 OR CONFIG_HWINFO_MAX32)
+zephyr_library_sources(
+    ${MSDK_PERIPH_SRC_DIR}/FLC/flc_common.c
+    ${MSDK_PERIPH_SRC_DIR}/FLC/flc_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/FLC/flc_reva.c
+)
+endif()
+
+if (CONFIG_ADC_MAX32)
+zephyr_library_sources(
+    ${MSDK_PERIPH_SRC_DIR}/ADC/adc_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/ADC/adc_reva.c
+)
+endif()
+
+if (CONFIG_W1_MAX32)
+zephyr_library_sources(
+    ${MSDK_PERIPH_SRC_DIR}/OWM/owm_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/OWM/owm_reva.c
+)
+endif()
+
+if (CONFIG_PWM_MAX32 OR CONFIG_TIMER_MAX32 OR CONFIG_COUNTER_TIMER_MAX32) 
+zephyr_library_sources(
+    ${MSDK_PERIPH_SRC_DIR}/TMR/tmr_common.c
+    ${MSDK_PERIPH_SRC_DIR}/TMR/tmr_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/TMR/tmr_reva.c
+)
+endif()
+
+if (CONFIG_I2S_MAX32)
+zephyr_library_sources(
+    ${MSDK_PERIPH_SRC_DIR}/SPIMSS/i2s_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/SPIMSS/i2s_reva.c
+)
+endif()
+
+if (CONFIG_ENTROPY_MAX32_TRNG)
+zephyr_library_sources(
+    ${MSDK_PERIPH_SRC_DIR}/TRNG/trng_me10.c
+    ${MSDK_PERIPH_SRC_DIR}/TRNG/trng_reva.c
+)
+endif()
+