Support CH585, CH32V317, CH32V002/4/5/6/7, CH32M007

CHANGELOG.md

@@ -7,6 +7,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ## [Unreleased]
 
+### Added
+
+- Support CH585/CH584, CH32V317, CH32V002/4/5/6/7, CH32M007, #76
+
 ## [0.0.9] - 2024-10-03
 
 ### Added

Cargo.toml

@@ -22,17 +22,17 @@ clap = { version = "4", features = ["derive"] }
 hex = "0.4.3"
 ihex = "3.0.0"
 log = "0.4"
-nu-pretty-hex = "0.98.0"
+nu-pretty-hex = "0.99.1"
 rusb = "0.9.1"
 simplelog = "0.12.0"
-thiserror = "1"
-object = { version = "0.36.0", default-features = false, features = [
+thiserror = "2"
+object = { version = "0.36", default-features = false, features = [
     "elf",
     "read_core",
     "std",
 ] }
 indicatif = "0.17.7"
-serialport = "4.5.0"
-libloading = "0.8.1"
-chrono = "0.4.31"
+serialport = "4.6"
+libloading = "0.8"
+chrono = "0.4"
 clap-verbosity-flag = "2"

README.md

@@ -59,10 +59,12 @@ Current firmware version: 2.11 (aka. v31).
 - [CH569]/CH565
 - [CH573]/CH571
 - [CH583]/CH582/CH581
+- [CH585]/CH584
 - [CH592]/CH591
 - [ ] [CH643] - I don't have this chip, help wanted
-- [ ] [CH641] - I don't have this chip, help wanted
-- [CH32X035]
+- [ ] [CH32V317] - I don't have this chip, help wanted
+- [CH641]
+- [CH32X035]/CH32X033
 - [CH32L103]
 - [ ] [CH8571] - No other source about this chip, help wanted
 - ... (Feel free to open an issue if you have tested on other chips)
@@ -72,13 +74,15 @@ Current firmware version: 2.11 (aka. v31).
 [CH32V203]: https://www.wch-ic.com/products/CH32V203.html
 [CH32V208]: https://www.wch-ic.com/products/CH32V208.html
 [CH32V307]: https://www.wch-ic.com/products/CH32V307.html
+[CH32V317]: https://www.wch.cn/products/CH32V317.html
 [CH32X035]: https://www.wch-ic.com/products/CH32X035.html
 [CH32L103]: https://www.wch-ic.com/products/CH32L103.html
 [CH569]: https://www.wch-ic.com/products/CH569.html
 [CH573]: https://www.wch-ic.com/products/CH573.html
 [CH583]: https://www.wch-ic.com/products/CH583.html
+[CH585]: https://www.wch-ic.com/products/CH585.html
 [CH592]: https://www.wch-ic.com/products/CH592.html
-[CH641]: https://www.wch.cn/downloads/CH641DS0_PDF.html
+[CH641]: https://www.wch-ic.com/products/CH641.html
 [CH643]: https://www.wch-ic.com/products/CH643.html
 [CH8571]: https://www.wch.cn/news/606.html
 

src/chips.rs

@@ -10,6 +10,8 @@ pub fn chip_id_to_chip_name(chip_id: u32) -> Option<&'static str> {
         0x810_00000 => Some("CH581"),
         0x820_00000 => Some("CH582"),
         0x830_00000 => Some("CH583"),
+        0x840_00000 => Some("CH584"),
+        0x850_00000 => Some("CH585"),
         0x920_00000 => Some("CH592"),
         0x003_00000 => match chip_id & 0xFFFFFF0F {
             0x003_00500 => Some("CH32V003F4P6"),
@@ -18,6 +20,40 @@ pub fn chip_id_to_chip_name(chip_id: u32) -> Option<&'static str> {
             0x003_30500 => Some("CH32V003J4M6"),
             _ => None,
         },
+        // https://github.com/openwch/ch32v002_004_005_006_007/blob/main/EVT/EXAM/SRC/Peripheral/src/ch32v00X_dbgmcu.c
+        0x006_00000 => match chip_id & 0xFFFFFF0F {
+            0x006_00600 => Some("CH32V006K8U6"),
+            0x006_10600 => Some("CH32V006E8R6"),
+            0x006_20600 => Some("CH32V006F8U6"),
+            0x006_30600 => Some("CH32V006F8P6"),
+            _ => None,
+        },
+        0x007_00000 => match chip_id & 0xFFFFFF0F {
+            0x007_00800 => Some("CH32M007G8R6"),
+            0x007_10600 => Some("CH32V007E8R6"),
+            0x007_20600 => Some("CH32V007F8U6"),
+            _ => None,
+        },
+        0x005_00000 => match chip_id & 0xFFFFFF0F {
+            0x005_00600 => Some("CH32V005E6R6"),
+            0x005_10600 => Some("CH32V005F6U6"),
+            0x005_20600 => Some("CH32V005F6P6"),
+            0x005_30600 => Some("CH32V005D6U6"),
+            _ => None,
+        },
+        0x002_00000 => match chip_id & 0xFFFFFF0F {
+            0x002_00600 => Some("CH32V002F4P6"),
+            0x002_10600 => Some("CH32V002F4U6"),
+            0x002_20600 => Some("CH32V002A4M6"),
+            0x002_30600 => Some("CH32V002D4U6"),
+            0x002_40600 => Some("CH32V002J4M6"),
+            _ => None,
+        },
+        0x004_00000 => match chip_id & 0xFFFFFF0F {
+            0x004_00600 => Some("CH32V004F6P1"),
+            0x004_10600 => Some("CH32V004F6U1"),
+            _ => None,
+        },
         0x035_00000 => match chip_id & 0xFFFFFF0F {
             0x035_00601 => Some("CH32X035R8T6"),
             0x035_10601 => Some("CH32X035C8T6"),
@@ -65,7 +101,7 @@ pub fn chip_id_to_chip_name(chip_id: u32) -> Option<&'static str> {
             0x208_3050C => Some("CH32V208GBU6"),
             _ => None,
         },
-        0x303_00000 | 0x305_00000 | 0x307_00000 => match chip_id & 0xFFFFFF0F {
+        0x303_00000 | 0x305_00000 | 0x307_00000 | 0x317_00000 => match chip_id & 0xFFFFFF0F {
             0x303_30504 => Some("CH32V303CBT6"),
             0x303_20504 => Some("CH32V303RBT6"),
             0x303_10504 => Some("CH32V303RCT6"),
@@ -77,6 +113,9 @@ pub fn chip_id_to_chip_name(chip_id: u32) -> Option<&'static str> {
             0x307_20508 => Some("CH32V307FBP6"),
             0x307_10508 => Some("CH32V307RCT6"),
             0x307_00508 => Some("CH32V307VCT6"),
+            0x317_0B508 => Some("CH32V317VCT6"),
+            0x317_3B508 => Some("CH32V317WCU6"),
+            0x317_5B508 => Some("CH32V317TCU6"),
             _ => None,
         },
         0x641 => match chip_id & 0xFFFFFF0F {

src/commands/control.rs

@@ -1,5 +1,4 @@
-//! Probe control commands.
-//  COMMAND_ID = 0x0d
+//! Probe control commands. COMMAND_ID = 0x0d
 
 use crate::{probe::WchLinkVariant, RiscvChip};
 

src/commands/mod.rs

@@ -425,4 +425,5 @@ impl Command for DisableDebug {
 // 81 0D 01 0F ClearCodeFlashB
 // 81 0D 02 08 xx ClearCodeFlash
 // 81 11 01 0D unknown in query info, before GetChipRomRamSplit
-// 81 0D 02 EE 00 stop flash ?
+// 81 0D 02 EE 00/02/03 SetSDLineMode
+// 81 0F 01 01 SetIAPMode