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fix the unmap assert
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ZhiyuanSue committed Sep 18, 2024
1 parent 3001af8 commit dd4c4cc
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Showing 3 changed files with 12 additions and 28 deletions.
2 changes: 1 addition & 1 deletion kernel/src/syscall/invocation/invoke_mmu_op.rs
Original file line number Diff line number Diff line change
Expand Up @@ -152,7 +152,7 @@ pub fn invoke_page_map(
// frame_slot.cap = cap;
pt_slot.update(pte);

clean_by_va_pou(
clean_by_va_pou(
convert_ref_type_to_usize(pt_slot),
pptr_to_paddr(convert_ref_type_to_usize(pt_slot)),
);
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4 changes: 2 additions & 2 deletions sel4_vspace/src/arch/aarch64/interface.rs
Original file line number Diff line number Diff line change
Expand Up @@ -310,17 +310,17 @@ pub fn unmap_page_table(asid: asid_t, vaddr: vptr_t, pt: &PTE) {
let mut pte = find_ret.vspace_root.unwrap();
let mut level: usize = 0;
while level < UPT_LEVELS - 1 && pte as usize != pt as *const PTE as usize {
level = level + 1;
ptSlot = unsafe { pte.add(VAddr(vaddr).GET_UPT_INDEX(level)) };
if ptr_to_mut(ptSlot).get_type() != (pte_tag_t::pte_table) as usize {
return;
}
pte = paddr_to_pptr(ptr_to_mut(ptSlot).next_level_paddr()) as *mut PTE;
level = level + 1;
}
if pte as usize != pt as *const PTE as usize {
return;
}
assert!(ptSlot.is_null());
assert!(!ptSlot.is_null());
unsafe {
*(ptSlot) = PTE(0);
ptr_to_mut(pte).update(*(ptSlot));
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34 changes: 9 additions & 25 deletions sel4_vspace/src/arch/aarch64/pte.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,13 +4,13 @@ use super::utils::paddr_to_pptr;
use super::{mair_types, seL4_VSpaceIndexBits, UPT_LEVELS};
use crate::{lookupPTSlot_ret_t, vptr_t};
use sel4_common::utils::ptr_to_mut;
use sel4_common::MASK;
use sel4_common::{
arch::vm_rights_t,
sel4_config::{seL4_PageBits, seL4_PageTableBits, PT_INDEX_BITS},
utils::{convert_ref_type_to_usize, convert_to_mut_type_ref},
BIT,
};
use sel4_common::MASK;

#[allow(unused)]
pub enum VMPageSize {
Expand Down Expand Up @@ -187,32 +187,16 @@ impl PTE {
) -> Self {
let nonexecutable = attr.get_armExecuteNever();
let cacheable = attr.get_armPageCacheable();
let mut attrindx =mair_types::DEVICE_nGnRnE as usize;
let mut attrindx = mair_types::DEVICE_nGnRnE as usize;
if cacheable {
attrindx=mair_types::NORMAL as usize;
attrindx = mair_types::NORMAL as usize;
}
let nG: usize = 1;
let vm_right:usize = Self::ap_from_vm_rights_t(rights).bits() >> 6;
let vm_right: usize = Self::ap_from_vm_rights_t(rights).bits() >> 6;
if VMPageSize::ARMSmallPage as usize == page_size {
PTE::pte_new_4k_page(
nonexecutable as usize,
paddr,
nG,
1,
0,
vm_right,
attrindx,
)
PTE::pte_new_4k_page(nonexecutable as usize, paddr, nG, 1, 0, vm_right, attrindx)
} else {
PTE::pte_new_page(
nonexecutable as usize,
paddr,
nG,
1,
0,
vm_right,
attrindx,
)
PTE::pte_new_page(nonexecutable as usize, paddr, nG, 1, 0, vm_right, attrindx)
}
}

Expand Down Expand Up @@ -268,18 +252,18 @@ impl PTE {
let mut pt = self.0 as *mut PTE;
let mut level: usize = UPT_LEVELS - 1;
let ptBitsLeft = PT_INDEX_BITS * level + seL4_PageBits;
pt = unsafe { pt.add((vptr >> ptBitsLeft) & MASK!(seL4_VSpaceIndexBits)) };
pt = unsafe { pt.add((vptr >> ptBitsLeft) & MASK!(seL4_VSpaceIndexBits)) };
let mut ret: lookupPTSlot_ret_t = lookupPTSlot_ret_t {
ptSlot: pt,
ptBitsLeft: ptBitsLeft,
};

while ptr_to_mut(ret.ptSlot).get_type() == (pte_tag_t::pte_table) as usize && level > 0 {
level = level - 1;
ret.ptBitsLeft = ret.ptBitsLeft - PT_INDEX_BITS;
let paddr = ptr_to_mut(ret.ptSlot).next_level_paddr();
pt = paddr_to_pptr(paddr) as *mut PTE;
pt = unsafe { pt.add((vptr >> ret.ptBitsLeft) & MASK!(PT_INDEX_BITS)) };
pt = unsafe { pt.add((vptr >> ret.ptBitsLeft) & MASK!(PT_INDEX_BITS)) };
ret.ptSlot = pt;
}
ret
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