Unrolled build for rust-lang#137599

Rollup merge of rust-lang#137599 - davidtwco:use-minicore-more, r=jieyouxu tests: use minicore more minicore makes it much easier to add new language items to all of the existing `no_core` tests. Most of the remaining tests that *could* use minicore either fail because.. 1. LLVM IR output changes and doesn't pass the test as written. I didn't look into these further. 2. The test has revisions w/ different compilation flags, expecting some to fail, and when using minicore, minicore is compiled with those flags and fails in the expected way because of the flags rather than the test, and that's considered a failure. But these tests can be changed and make adding new language items a lot easier. r? ```@jieyouxu```
rust-lang-ci · Mar 1, 2025 · c2b88f6 · c2b88f6
2 parents aa3c2d7 + 92eb445
commit c2b88f6
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diff --git a/tests/assembly/aarch64-pointer-auth.rs b/tests/assembly/aarch64-pointer-auth.rs
@@ -1,5 +1,6 @@
 // Test that PAC instructions are emitted when branch-protection is specified.
 
+//@ add-core-stubs
 //@ revisions: PACRET PAUTHLR_NOP PAUTHLR
 //@ assembly-output: emit-asm
 //@ needs-llvm-components: aarch64
@@ -14,8 +15,8 @@
 #![no_core]
 #![crate_type = "lib"]
 
-#[lang = "sized"]
-trait Sized {}
+extern crate minicore;
+use minicore::*;
 
 // PACRET: hint #25
 // PACRET: hint #29

diff --git a/tests/assembly/cmse.rs b/tests/assembly/cmse.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ revisions: hard soft
 //@ assembly-output: emit-asm
 //@ [hard] compile-flags: --target thumbv8m.main-none-eabihf --crate-type lib -Copt-level=1
@@ -7,10 +8,9 @@
 #![crate_type = "lib"]
 #![feature(abi_c_cmse_nonsecure_call, cmse_nonsecure_entry, no_core, lang_items)]
 #![no_core]
-#[lang = "sized"]
-pub trait Sized {}
-#[lang = "copy"]
-pub trait Copy {}
+
+extern crate minicore;
+use minicore::*;
 
 // CHECK-LABEL: __acle_se_entry_point:
 // CHECK-NEXT: entry_point:

diff --git a/tests/assembly/dwarf4.rs b/tests/assembly/dwarf4.rs
@@ -1,16 +1,15 @@
 // Makes sure that `-Z dwarf-version=4` causes `rustc` to emit DWARF version 4.
 //@ assembly-output: emit-asm
+//@ add-core-stubs
 //@ compile-flags: -g --target x86_64-unknown-linux-gnu -Z dwarf-version=4 -Copt-level=0
 //@ needs-llvm-components: x86
 
 #![feature(no_core, lang_items)]
 #![crate_type = "rlib"]
 #![no_core]
 
-#[lang = "sized"]
-trait Sized {}
-#[lang = "copy"]
-trait Copy {}
+extern crate minicore;
+use minicore::*;
 
 pub fn wibble() {}
 

diff --git a/tests/assembly/dwarf5.rs b/tests/assembly/dwarf5.rs
@@ -1,4 +1,5 @@
 // Makes sure that `-Z dwarf-version=5` causes `rustc` to emit DWARF version 5.
+//@ add-core-stubs
 //@ assembly-output: emit-asm
 //@ compile-flags: -g --target x86_64-unknown-linux-gnu -Z dwarf-version=5 -Copt-level=0
 //@ needs-llvm-components: x86
@@ -7,10 +8,8 @@
 #![crate_type = "rlib"]
 #![no_core]
 
-#[lang = "sized"]
-trait Sized {}
-#[lang = "copy"]
-trait Copy {}
+extern crate minicore;
+use minicore::*;
 
 pub fn wibble() {}
 

diff --git a/tests/assembly/pic-relocation-model.rs b/tests/assembly/pic-relocation-model.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ revisions: x64
 //@ assembly-output: emit-asm
 //@ [x64] compile-flags: --target x86_64-unknown-linux-gnu -Crelocation-model=pic
@@ -7,10 +8,8 @@
 #![no_core]
 #![crate_type = "rlib"]
 
-#[lang = "sized"]
-trait Sized {}
-#[lang = "copy"]
-trait Copy {}
+extern crate minicore;
+use minicore::*;
 
 // CHECK-LABEL: call_other_fn:
 // CHECK:       {{(jmpq|callq)}} *other_fn@GOTPCREL(%rip)

diff --git a/tests/assembly/pie-relocation-model.rs b/tests/assembly/pie-relocation-model.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ revisions: x64
 //@ assembly-output: emit-asm
 //@ [x64] compile-flags: --target x86_64-unknown-linux-gnu -Crelocation-model=pie
@@ -7,10 +8,8 @@
 #![no_core]
 #![crate_type = "rlib"]
 
-#[lang = "sized"]
-trait Sized {}
-#[lang = "copy"]
-trait Copy {}
+extern crate minicore;
+use minicore::*;
 
 // CHECK-LABEL: call_other_fn:
 // With PIE local functions are called "directly".

diff --git a/tests/assembly/powerpc64-struct-abi.rs b/tests/assembly/powerpc64-struct-abi.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ revisions: elfv1-be elfv2-be elfv2-le aix
 //@ assembly-output: emit-asm
 //@ compile-flags: -Copt-level=3
@@ -20,21 +21,9 @@
 #![no_core]
 #![crate_type = "lib"]
 
-#[lang = "sized"]
-trait Sized {}
+extern crate minicore;
+use minicore::*;
 
-#[lang = "copy"]
-trait Copy {}
-
-#[lang = "freeze"]
-trait Freeze {}
-
-#[lang = "unpin"]
-trait Unpin {}
-
-impl Copy for u8 {}
-impl Copy for u16 {}
-impl Copy for u32 {}
 impl Copy for FiveU32s {}
 impl Copy for FiveU16s {}
 impl Copy for ThreeU8s {}

diff --git a/tests/assembly/riscv-soft-abi-with-float-features.rs b/tests/assembly/riscv-soft-abi-with-float-features.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ assembly-output: emit-asm
 //@ compile-flags: --target riscv64imac-unknown-none-elf -Ctarget-feature=+f,+d
 //@ needs-llvm-components: riscv
@@ -9,15 +10,8 @@
 #![crate_type = "lib"]
 #![no_core]
 
-#[lang = "sized"]
-trait Sized {}
-
-#[lang = "copy"]
-trait Copy {}
-
-impl Copy for f16 {}
-impl Copy for f32 {}
-impl Copy for f64 {}
+extern crate minicore;
+use minicore::*;
 
 // This test checks that the floats are all returned in `a0` as required by the `lp64` ABI.
 

diff --git a/tests/assembly/s390x-backchain-toggle.rs b/tests/assembly/s390x-backchain-toggle.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ revisions: enable-backchain disable-backchain
 //@ assembly-output: emit-asm
 //@ compile-flags: -Copt-level=3 --crate-type=lib --target=s390x-unknown-linux-gnu
@@ -8,8 +9,8 @@
 #![no_std]
 #![no_core]
 
-#[lang = "sized"]
-trait Sized {}
+extern crate minicore;
+use minicore::*;
 
 extern "C" {
     fn extern_func();

diff --git a/tests/assembly/simd-bitmask.rs b/tests/assembly/simd-bitmask.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ revisions: x86 x86-avx2 x86-avx512 aarch64
 //@ [x86] compile-flags: --target=x86_64-unknown-linux-gnu -C llvm-args=-x86-asm-syntax=intel
 //@ [x86] needs-llvm-components: x86
@@ -16,12 +17,8 @@
 #![no_core]
 #![allow(non_camel_case_types)]
 
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {}
+extern crate minicore;
+use minicore::*;
 
 #[repr(simd)]
 pub struct m8x16([i8; 16]);

diff --git a/tests/assembly/simd-intrinsic-gather.rs b/tests/assembly/simd-intrinsic-gather.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ revisions: x86-avx512
 //@ [x86-avx512] compile-flags: --target=x86_64-unknown-linux-gnu -C llvm-args=-x86-asm-syntax=intel
 //@ [x86-avx512] compile-flags: -C target-feature=+avx512f,+avx512vl,+avx512bw,+avx512dq
@@ -9,12 +10,8 @@
 #![no_core]
 #![allow(non_camel_case_types)]
 
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {}
+extern crate minicore;
+use minicore::*;
 
 #[repr(simd)]
 pub struct f64x4([f64; 4]);

diff --git a/tests/assembly/simd-intrinsic-mask-load.rs b/tests/assembly/simd-intrinsic-mask-load.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ revisions: x86-avx2 x86-avx512
 //@ [x86-avx2] compile-flags: --target=x86_64-unknown-linux-gnu -C llvm-args=-x86-asm-syntax=intel
 //@ [x86-avx2] compile-flags: -C target-feature=+avx2
@@ -12,13 +13,8 @@
 #![no_core]
 #![allow(non_camel_case_types)]
 
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {}
-impl<T: ?Sized> Copy for *const T {}
+extern crate minicore;
+use minicore::*;
 
 #[repr(simd)]
 pub struct i8x16([i8; 16]);

diff --git a/tests/assembly/simd-intrinsic-mask-reduce.rs b/tests/assembly/simd-intrinsic-mask-reduce.rs
@@ -1,4 +1,5 @@
 // verify that simd mask reductions do not introduce additional bit shift operations
+//@ add-core-stubs
 //@ revisions: x86 aarch64
 //@ [x86] compile-flags: --target=x86_64-unknown-linux-gnu -C llvm-args=-x86-asm-syntax=intel
 // Set the base cpu explicitly, in case the default has been changed.
@@ -13,12 +14,8 @@
 #![no_core]
 #![allow(non_camel_case_types)]
 
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {}
+extern crate minicore;
+use minicore::*;
 
 #[repr(simd)]
 pub struct mask8x16([i8; 16]);

diff --git a/tests/assembly/simd-intrinsic-mask-store.rs b/tests/assembly/simd-intrinsic-mask-store.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ revisions: x86-avx2 x86-avx512
 //@ [x86-avx2] compile-flags: --target=x86_64-unknown-linux-gnu -C llvm-args=-x86-asm-syntax=intel
 //@ [x86-avx2] compile-flags: -C target-feature=+avx2
@@ -12,13 +13,8 @@
 #![no_core]
 #![allow(non_camel_case_types)]
 
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {}
-impl<T: ?Sized> Copy for *mut T {}
+extern crate minicore;
+use minicore::*;
 
 #[repr(simd)]
 pub struct i8x16([i8; 16]);

diff --git a/tests/assembly/simd-intrinsic-scatter.rs b/tests/assembly/simd-intrinsic-scatter.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ revisions: x86-avx512
 //@ [x86-avx512] compile-flags: --target=x86_64-unknown-linux-gnu -C llvm-args=-x86-asm-syntax=intel
 //@ [x86-avx512] compile-flags: -C target-feature=+avx512f,+avx512vl,+avx512bw,+avx512dq
@@ -9,12 +10,8 @@
 #![no_core]
 #![allow(non_camel_case_types)]
 
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {}
+extern crate minicore;
+use minicore::*;
 
 #[repr(simd)]
 pub struct f64x4([f64; 4]);

diff --git a/tests/assembly/simd-intrinsic-select.rs b/tests/assembly/simd-intrinsic-select.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ revisions: x86-avx2 x86-avx512 aarch64
 //@ [x86-avx2] compile-flags: --target=x86_64-unknown-linux-gnu -C llvm-args=-x86-asm-syntax=intel
 //@ [x86-avx2] compile-flags: -C target-feature=+avx2
@@ -14,12 +15,8 @@
 #![no_core]
 #![allow(non_camel_case_types)]
 
-// Because we don't have core yet.
-#[lang = "sized"]
-pub trait Sized {}
-
-#[lang = "copy"]
-trait Copy {}
+extern crate minicore;
+use minicore::*;
 
 #[repr(simd)]
 pub struct i8x16([i8; 16]);

diff --git a/tests/assembly/sparc-struct-abi.rs b/tests/assembly/sparc-struct-abi.rs
@@ -2,18 +2,16 @@
 // - float structure members are passes in floating point registers
 // (#86163)
 
+//@ add-core-stubs
 //@ assembly-output: emit-asm
 //@ needs-llvm-components: sparc
 //@ compile-flags: --target=sparcv9-sun-solaris -Copt-level=3
 #![crate_type = "lib"]
 #![feature(no_core, lang_items)]
 #![no_core]
 
-#[lang = "sized"]
-pub trait Sized {}
-#[lang = "copy"]
-pub trait Copy {}
-impl Copy for f32 {}
+extern crate minicore;
+use minicore::*;
 
 #[repr(C)]
 pub struct Franta {

diff --git a/tests/assembly/stack-probes.rs b/tests/assembly/stack-probes.rs
@@ -1,3 +1,4 @@
+//@ add-core-stubs
 //@ revisions: x86_64 i686 aarch64
 //@ assembly-output: emit-asm
 //@[x86_64] compile-flags: --target x86_64-unknown-linux-gnu -C llvm-args=-x86-asm-syntax=intel
@@ -11,12 +12,8 @@
 #![crate_type = "lib"]
 #![no_core]
 
-#[lang = "sized"]
-trait Sized {}
-#[lang = "copy"]
-trait Copy {}
-
-impl Copy for u8 {}
+extern crate minicore;
+use minicore::*;
 
 // Check that inline-asm stack probes are generated correctly.
 // To avoid making this test fragile to slight asm changes,

diff --git a/tests/assembly/stack-protector/stack-protector-target-support.rs b/tests/assembly/stack-protector/stack-protector-target-support.rs
@@ -1,6 +1,7 @@
 // Test that stack smash protection code is emitted for all tier1 and tier2
 // targets, with the exception of nvptx64-nvidia-cuda
 //
+//@ add-core-stubs
 //@ revisions: r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23
 //@ revisions: r24 r25 r26 r27 r28 r29 r30 r31 r32 r33     r35 r36 r37 r38 r39 r40 r41 r42 r43 r44
 //@ revisions: r45 r46 r47 r48 r49 r50 r51 r52 r53 r54 r55 r56 r57 r58 r59 r60 r61 r62 r63 r64 r65
@@ -183,10 +184,8 @@
 #![crate_type = "lib"]
 #![no_core]
 
-#[lang = "sized"]
-trait Sized {}
-#[lang = "copy"]
-trait Copy {}
+extern crate minicore;
+use minicore::*;
 
 #[no_mangle]
 pub fn foo() {