Skip to content

Commit

Permalink
Use unsigned type for sizes/addresses
Browse files Browse the repository at this point in the history
  • Loading branch information
@joelsmithTT
joelsmithTT committed Nov 24, 2024
1 parent 16c78bc commit a7e79bd
Show file tree
Hide file tree
Showing 3 changed files with 222 additions and 222 deletions.
66 changes: 33 additions & 33 deletions src/firmware/riscv/blackhole/eth_l1_address_map.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,35 +9,35 @@ namespace eth_l1_mem {


struct address_map {

// Sizes
static constexpr std::int32_t FIRMWARE_SIZE = 32 * 1024;
static constexpr std::int32_t ERISC_BARRIER_SIZE = 0x20; // 32 bytes reserved for Barrier
static constexpr std::int32_t COMMAND_Q_SIZE = 4 * 1024;
static constexpr std::int32_t DATA_BUFFER_SIZE_HOST = 4 * 1024;
static constexpr std::int32_t DATA_BUFFER_SIZE_ETH = 4 * 1024;
static constexpr std::int32_t DATA_BUFFER_SIZE_NOC = 16 * 1024;
static constexpr std::int32_t DATA_BUFFER_SIZE = 24 * 1024;
static constexpr std::int32_t EPOCH_RUNTIME_CONFIG_SIZE = 128; //
static constexpr std::int32_t OVERLAY_BLOB_SIZE = (32 * 1024) - EPOCH_RUNTIME_CONFIG_SIZE;
static constexpr std::int32_t OVERLAY_MAX_EXTRA_BLOB_SIZE = (0 * 1024);
static constexpr std::int32_t TILE_HEADER_BUF_SIZE = 32 * 1024; //
static constexpr std::int32_t NCRISC_L1_EPOCH_Q_SIZE = 32;
static constexpr std::int32_t FW_L1_BLOCK_SIZE = OVERLAY_BLOB_SIZE + EPOCH_RUNTIME_CONFIG_SIZE + TILE_HEADER_BUF_SIZE;
static constexpr std::int32_t FW_DRAM_BLOCK_SIZE = OVERLAY_BLOB_SIZE + OVERLAY_MAX_EXTRA_BLOB_SIZE + EPOCH_RUNTIME_CONFIG_SIZE + TILE_HEADER_BUF_SIZE;
static constexpr uint32_t FIRMWARE_SIZE = 32 * 1024;
static constexpr uint32_t ERISC_BARRIER_SIZE = 0x20; // 32 bytes reserved for Barrier
static constexpr uint32_t COMMAND_Q_SIZE = 4 * 1024;
static constexpr uint32_t DATA_BUFFER_SIZE_HOST = 4 * 1024;
static constexpr uint32_t DATA_BUFFER_SIZE_ETH = 4 * 1024;
static constexpr uint32_t DATA_BUFFER_SIZE_NOC = 16 * 1024;
static constexpr uint32_t DATA_BUFFER_SIZE = 24 * 1024;
static constexpr uint32_t EPOCH_RUNTIME_CONFIG_SIZE = 128; //
static constexpr uint32_t OVERLAY_BLOB_SIZE = (32 * 1024) - EPOCH_RUNTIME_CONFIG_SIZE;
static constexpr uint32_t OVERLAY_MAX_EXTRA_BLOB_SIZE = (0 * 1024);
static constexpr uint32_t TILE_HEADER_BUF_SIZE = 32 * 1024; //
static constexpr uint32_t NCRISC_L1_EPOCH_Q_SIZE = 32;
static constexpr uint32_t FW_L1_BLOCK_SIZE = OVERLAY_BLOB_SIZE + EPOCH_RUNTIME_CONFIG_SIZE + TILE_HEADER_BUF_SIZE;
static constexpr uint32_t FW_DRAM_BLOCK_SIZE = OVERLAY_BLOB_SIZE + OVERLAY_MAX_EXTRA_BLOB_SIZE + EPOCH_RUNTIME_CONFIG_SIZE + TILE_HEADER_BUF_SIZE;
// Base addresses
static constexpr std::int32_t FIRMWARE_BASE = 0x9040;
static constexpr std::int32_t ERISC_BARRIER_BASE = 0x11FE0;
static constexpr std::int32_t L1_EPOCH_Q_BASE = 0x9000; // Epoch Q start in L1.
static constexpr std::int32_t L1_DRAM_POLLING_CTRL_BASE = 0x9020;
static constexpr std::int32_t COMMAND_Q_BASE = L1_EPOCH_Q_BASE + FIRMWARE_SIZE;
static constexpr std::int32_t DATA_BUFFER_BASE = COMMAND_Q_BASE + COMMAND_Q_SIZE;
static constexpr std::int32_t TILE_HEADER_BUFFER_BASE = DATA_BUFFER_BASE + DATA_BUFFER_SIZE;
static constexpr std::int32_t EPOCH_RUNTIME_CONFIG_BASE = TILE_HEADER_BUFFER_BASE + TILE_HEADER_BUF_SIZE;
static constexpr std::int32_t OVERLAY_BLOB_BASE = EPOCH_RUNTIME_CONFIG_BASE + EPOCH_RUNTIME_CONFIG_SIZE;
static constexpr std::int32_t DATA_BUFFER_SPACE_BASE = OVERLAY_BLOB_BASE + OVERLAY_BLOB_SIZE;

static std::int32_t OVERLAY_FULL_BLOB_SIZE() {
static constexpr uint32_t FIRMWARE_BASE = 0x9040;
static constexpr uint32_t ERISC_BARRIER_BASE = 0x11FE0;
static constexpr uint32_t L1_EPOCH_Q_BASE = 0x9000; // Epoch Q start in L1.
static constexpr uint32_t L1_DRAM_POLLING_CTRL_BASE = 0x9020;
static constexpr uint32_t COMMAND_Q_BASE = L1_EPOCH_Q_BASE + FIRMWARE_SIZE;
static constexpr uint32_t DATA_BUFFER_BASE = COMMAND_Q_BASE + COMMAND_Q_SIZE;
static constexpr uint32_t TILE_HEADER_BUFFER_BASE = DATA_BUFFER_BASE + DATA_BUFFER_SIZE;
static constexpr uint32_t EPOCH_RUNTIME_CONFIG_BASE = TILE_HEADER_BUFFER_BASE + TILE_HEADER_BUF_SIZE;
static constexpr uint32_t OVERLAY_BLOB_BASE = EPOCH_RUNTIME_CONFIG_BASE + EPOCH_RUNTIME_CONFIG_SIZE;
static constexpr uint32_t DATA_BUFFER_SPACE_BASE = OVERLAY_BLOB_BASE + OVERLAY_BLOB_SIZE;

static uint32_t OVERLAY_FULL_BLOB_SIZE() {
return OVERLAY_BLOB_SIZE + OVERLAY_MAX_EXTRA_BLOB_SIZE;
};

Expand All @@ -48,15 +48,15 @@ template<std::size_t A, std::size_t B> struct TAssertEquality {

static constexpr bool _DATA_BUFFER_SPACE_BASE_CORRECT = TAssertEquality<DATA_BUFFER_SPACE_BASE, 0x28000>::_cResult;

static constexpr std::int32_t MAX_SIZE = 256*1024;
static constexpr std::int32_t MAX_L1_LOADING_SIZE = 1 * 256 * 1024;
static constexpr std::int32_t RISC_LOCAL_MEM_BASE = 0xffb00000; // Actaul local memory address as seen from risc firmware
static constexpr uint32_t MAX_SIZE = 256*1024;
static constexpr uint32_t MAX_L1_LOADING_SIZE = 1 * 256 * 1024;

static constexpr uint32_t RISC_LOCAL_MEM_BASE = 0xffb00000; // Actaul local memory address as seen from risc firmware
// As part of the init risc firmware will copy local memory data from
// l1 locations listed above into internal local memory that starts
// l1 locations listed above into internal local memory that starts
// at RISC_LOCAL_MEM_BASE address

static constexpr std::uint32_t FW_VERSION_ADDR = 0x210;
static constexpr uint32_t FW_VERSION_ADDR = 0x210;
};
} // namespace llk

Loading

0 comments on commit a7e79bd

Please sign in to comment.