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dual-issue

Here are 2 public repositories matching this topic...

Ellen7ions / Gemini

pipeline mips cache dual-issue

Updated Mar 16, 2024
Verilog

dominiksalvet / super-riscv

Superscalar dual-issue RISC-V processor

open-source pipeline core rtl forwarding systemverilog gtkwave testbench superscalar in-order risc-v microarchitecture low-power verilator ahb3-lite instruction-level-parallelism dual-issue riscv-gcc

Updated Jul 31, 2024
SystemVerilog

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