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A verilog implementation of the Motorola MC14500B based on public information

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MC14500B FPGA Implementation

Motivation:

This project was a fun learning project. I read about the Motorola MC14500B on Hackaday, and fell in love with the idea of a 1-bit processor that was so easily described using a few logic gates while remaining powerful enough to implement an educational computer on. I originally had a fun project planned for this where I hooked up a bunch of these in parallel and used them in a SIMD configuration, but I figured out that the inout nature of the data port wasn't compatible with the version of Yosys used on the TinyFPGA. I could've moved this to Quartus and a bigger board, but I had gotten bored. I thought I'd just release the project as is. It's a good little demonstration of meeting design specifications, simple processor routing, and verilog inouts.

This processor was written using APIO's synthesis and simulation toolchain. It was written in one night, so don't expect the signals to match up perfectly, but I tried to stay as true to the original documentation and patent as possible. If the testbench looks terrible, it's because it is. I basically wrote the testbench to test the pathing and routing and trusted that the LU instructions were written correctly. If I go back and rewrite this in Silice, I'll do a better testbench.

I've included a few resources related to the design, TinyFPGA development, and prior work on this topic by other developers.

Files:

  • mc14500b.v - Contains logic and info
  • mc14500b_tb.v - Bad testbench

Missing:

I didn't include a few of the features required to build a system around the MC14500B. I wanted to make this an "instantiate and go" type project where if anyone wants to do something fun like build a WDR-1 on an FPGA, they can just plop it into whatever architecture they want. See the ICU Handbook for more info on system implementation ideas:

If you're looking for a bit more of a serious implementation, I'd check out the linurs source below for their block-based FPGA implementation, assembler, and simulator.

The following are required for any implementation, as the processor lacks them:

  • MC14516B or equivalent Program Counter - Just a normal 4 bit binary counter, easily implemented in verilog, traditionally for complex implementations you string a few together
  • 4 bit Program nemory - Memory that stores instructions and has 4 bit addressing and 4+ bit data
  • Some kind of branch handler - The jmp and rtn instructions don't do much without a memory branch handler

Resources:

Testbenching:

MC14500B stuff:

Other Examples of MC14500B Implementations (not necessarily used as resources here, but I wanted to honor prior work):

TinyFPGA Stuff (I never implemented this on the FPGA as intended, just wanted to put this all in one place):

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